Version:  2.0.40 2.2.26 2.4.37 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17

Linux/sound/soc/sh/fsi.c

  1 /*
  2  * Fifo-attached Serial Interface (FSI) support for SH7724
  3  *
  4  * Copyright (C) 2009 Renesas Solutions Corp.
  5  * Kuninori Morimoto <morimoto.kuninori@renesas.com>
  6  *
  7  * Based on ssi.c
  8  * Copyright (c) 2007 Manuel Lauss <mano@roarinelk.homelinux.net>
  9  *
 10  * This program is free software; you can redistribute it and/or modify
 11  * it under the terms of the GNU General Public License version 2 as
 12  * published by the Free Software Foundation.
 13  */
 14 
 15 #include <linux/delay.h>
 16 #include <linux/dma-mapping.h>
 17 #include <linux/pm_runtime.h>
 18 #include <linux/io.h>
 19 #include <linux/of.h>
 20 #include <linux/of_device.h>
 21 #include <linux/scatterlist.h>
 22 #include <linux/sh_dma.h>
 23 #include <linux/slab.h>
 24 #include <linux/module.h>
 25 #include <linux/workqueue.h>
 26 #include <sound/soc.h>
 27 #include <sound/pcm_params.h>
 28 #include <sound/sh_fsi.h>
 29 
 30 /* PortA/PortB register */
 31 #define REG_DO_FMT      0x0000
 32 #define REG_DOFF_CTL    0x0004
 33 #define REG_DOFF_ST     0x0008
 34 #define REG_DI_FMT      0x000C
 35 #define REG_DIFF_CTL    0x0010
 36 #define REG_DIFF_ST     0x0014
 37 #define REG_CKG1        0x0018
 38 #define REG_CKG2        0x001C
 39 #define REG_DIDT        0x0020
 40 #define REG_DODT        0x0024
 41 #define REG_MUTE_ST     0x0028
 42 #define REG_OUT_DMAC    0x002C
 43 #define REG_OUT_SEL     0x0030
 44 #define REG_IN_DMAC     0x0038
 45 
 46 /* master register */
 47 #define MST_CLK_RST     0x0210
 48 #define MST_SOFT_RST    0x0214
 49 #define MST_FIFO_SZ     0x0218
 50 
 51 /* core register (depend on FSI version) */
 52 #define A_MST_CTLR      0x0180
 53 #define B_MST_CTLR      0x01A0
 54 #define CPU_INT_ST      0x01F4
 55 #define CPU_IEMSK       0x01F8
 56 #define CPU_IMSK        0x01FC
 57 #define INT_ST          0x0200
 58 #define IEMSK           0x0204
 59 #define IMSK            0x0208
 60 
 61 /* DO_FMT */
 62 /* DI_FMT */
 63 #define CR_BWS_MASK     (0x3 << 20) /* FSI2 */
 64 #define CR_BWS_24       (0x0 << 20) /* FSI2 */
 65 #define CR_BWS_16       (0x1 << 20) /* FSI2 */
 66 #define CR_BWS_20       (0x2 << 20) /* FSI2 */
 67 
 68 #define CR_DTMD_PCM             (0x0 << 8) /* FSI2 */
 69 #define CR_DTMD_SPDIF_PCM       (0x1 << 8) /* FSI2 */
 70 #define CR_DTMD_SPDIF_STREAM    (0x2 << 8) /* FSI2 */
 71 
 72 #define CR_MONO         (0x0 << 4)
 73 #define CR_MONO_D       (0x1 << 4)
 74 #define CR_PCM          (0x2 << 4)
 75 #define CR_I2S          (0x3 << 4)
 76 #define CR_TDM          (0x4 << 4)
 77 #define CR_TDM_D        (0x5 << 4)
 78 
 79 /* OUT_DMAC */
 80 /* IN_DMAC */
 81 #define VDMD_MASK       (0x3 << 4)
 82 #define VDMD_FRONT      (0x0 << 4) /* Package in front */
 83 #define VDMD_BACK       (0x1 << 4) /* Package in back */
 84 #define VDMD_STREAM     (0x2 << 4) /* Stream mode(16bit * 2) */
 85 
 86 #define DMA_ON          (0x1 << 0)
 87 
 88 /* DOFF_CTL */
 89 /* DIFF_CTL */
 90 #define IRQ_HALF        0x00100000
 91 #define FIFO_CLR        0x00000001
 92 
 93 /* DOFF_ST */
 94 #define ERR_OVER        0x00000010
 95 #define ERR_UNDER       0x00000001
 96 #define ST_ERR          (ERR_OVER | ERR_UNDER)
 97 
 98 /* CKG1 */
 99 #define ACKMD_MASK      0x00007000
100 #define BPFMD_MASK      0x00000700
101 #define DIMD            (1 << 4)
102 #define DOMD            (1 << 0)
103 
104 /* A/B MST_CTLR */
105 #define BP      (1 << 4)        /* Fix the signal of Biphase output */
106 #define SE      (1 << 0)        /* Fix the master clock */
107 
108 /* CLK_RST */
109 #define CRB     (1 << 4)
110 #define CRA     (1 << 0)
111 
112 /* IO SHIFT / MACRO */
113 #define BI_SHIFT        12
114 #define BO_SHIFT        8
115 #define AI_SHIFT        4
116 #define AO_SHIFT        0
117 #define AB_IO(param, shift)     (param << shift)
118 
119 /* SOFT_RST */
120 #define PBSR            (1 << 12) /* Port B Software Reset */
121 #define PASR            (1 <<  8) /* Port A Software Reset */
122 #define IR              (1 <<  4) /* Interrupt Reset */
123 #define FSISR           (1 <<  0) /* Software Reset */
124 
125 /* OUT_SEL (FSI2) */
126 #define DMMD            (1 << 4) /* SPDIF output timing 0: Biphase only */
127                                  /*                     1: Biphase and serial */
128 
129 /* FIFO_SZ */
130 #define FIFO_SZ_MASK    0x7
131 
132 #define FSI_RATES SNDRV_PCM_RATE_8000_96000
133 
134 #define FSI_FMTS (SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S16_LE)
135 
136 /*
137  * bus options
138  *
139  * 0x000000BA
140  *
141  * A : sample widtht 16bit setting
142  * B : sample widtht 24bit setting
143  */
144 
145 #define SHIFT_16DATA            0
146 #define SHIFT_24DATA            4
147 
148 #define PACKAGE_24BITBUS_BACK           0
149 #define PACKAGE_24BITBUS_FRONT          1
150 #define PACKAGE_16BITBUS_STREAM         2
151 
152 #define BUSOP_SET(s, a) ((a) << SHIFT_ ## s ## DATA)
153 #define BUSOP_GET(s, a) (((a) >> SHIFT_ ## s ## DATA) & 0xF)
154 
155 /*
156  * FSI driver use below type name for variable
157  *
158  * xxx_num      : number of data
159  * xxx_pos      : position of data
160  * xxx_capa     : capacity of data
161  */
162 
163 /*
164  *      period/frame/sample image
165  *
166  * ex) PCM (2ch)
167  *
168  * period pos                                      period pos
169  *   [n]                                             [n + 1]
170  *   |<-------------------- period--------------------->|
171  * ==|============================================ ... =|==
172  *   |                                                  |
173  *   ||<-----  frame ----->|<------ frame ----->|  ...  |
174  *   |+--------------------+--------------------+- ...  |
175  *   ||[ sample ][ sample ]|[ sample ][ sample ]|  ...  |
176  *   |+--------------------+--------------------+- ...  |
177  * ==|============================================ ... =|==
178  */
179 
180 /*
181  *      FSI FIFO image
182  *
183  *      |            |
184  *      |            |
185  *      | [ sample ] |
186  *      | [ sample ] |
187  *      | [ sample ] |
188  *      | [ sample ] |
189  *              --> go to codecs
190  */
191 
192 /*
193  *      FSI clock
194  *
195  * FSIxCLK [CPG] (ick) -------> |
196  *                              |-> FSI_DIV (div)-> FSI2
197  * FSIxCK [external] (xck) ---> |
198  */
199 
200 /*
201  *              struct
202  */
203 
204 struct fsi_stream_handler;
205 struct fsi_stream {
206 
207         /*
208          * these are initialized by fsi_stream_init()
209          */
210         struct snd_pcm_substream *substream;
211         int fifo_sample_capa;   /* sample capacity of FSI FIFO */
212         int buff_sample_capa;   /* sample capacity of ALSA buffer */
213         int buff_sample_pos;    /* sample position of ALSA buffer */
214         int period_samples;     /* sample number / 1 period */
215         int period_pos;         /* current period position */
216         int sample_width;       /* sample width */
217         int uerr_num;
218         int oerr_num;
219 
220         /*
221          * bus options
222          */
223         u32 bus_option;
224 
225         /*
226          * thse are initialized by fsi_handler_init()
227          */
228         struct fsi_stream_handler *handler;
229         struct fsi_priv         *priv;
230 
231         /*
232          * these are for DMAEngine
233          */
234         struct dma_chan         *chan;
235         int                     dma_id;
236 };
237 
238 struct fsi_clk {
239         /* see [FSI clock] */
240         struct clk *own;
241         struct clk *xck;
242         struct clk *ick;
243         struct clk *div;
244         int (*set_rate)(struct device *dev,
245                         struct fsi_priv *fsi);
246 
247         unsigned long rate;
248         unsigned int count;
249 };
250 
251 struct fsi_priv {
252         void __iomem *base;
253         struct fsi_master *master;
254 
255         struct fsi_stream playback;
256         struct fsi_stream capture;
257 
258         struct fsi_clk clock;
259 
260         u32 fmt;
261 
262         int chan_num:16;
263         unsigned int clk_master:1;
264         unsigned int clk_cpg:1;
265         unsigned int spdif:1;
266         unsigned int enable_stream:1;
267         unsigned int bit_clk_inv:1;
268         unsigned int lr_clk_inv:1;
269 };
270 
271 struct fsi_stream_handler {
272         int (*init)(struct fsi_priv *fsi, struct fsi_stream *io);
273         int (*quit)(struct fsi_priv *fsi, struct fsi_stream *io);
274         int (*probe)(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev);
275         int (*transfer)(struct fsi_priv *fsi, struct fsi_stream *io);
276         int (*remove)(struct fsi_priv *fsi, struct fsi_stream *io);
277         int (*start_stop)(struct fsi_priv *fsi, struct fsi_stream *io,
278                            int enable);
279 };
280 #define fsi_stream_handler_call(io, func, args...)      \
281         (!(io) ? -ENODEV :                              \
282          !((io)->handler->func) ? 0 :                   \
283          (io)->handler->func(args))
284 
285 struct fsi_core {
286         int ver;
287 
288         u32 int_st;
289         u32 iemsk;
290         u32 imsk;
291         u32 a_mclk;
292         u32 b_mclk;
293 };
294 
295 struct fsi_master {
296         void __iomem *base;
297         struct fsi_priv fsia;
298         struct fsi_priv fsib;
299         const struct fsi_core *core;
300         spinlock_t lock;
301 };
302 
303 static int fsi_stream_is_play(struct fsi_priv *fsi, struct fsi_stream *io);
304 
305 /*
306  *              basic read write function
307  */
308 
309 static void __fsi_reg_write(u32 __iomem *reg, u32 data)
310 {
311         /* valid data area is 24bit */
312         data &= 0x00ffffff;
313 
314         __raw_writel(data, reg);
315 }
316 
317 static u32 __fsi_reg_read(u32 __iomem *reg)
318 {
319         return __raw_readl(reg);
320 }
321 
322 static void __fsi_reg_mask_set(u32 __iomem *reg, u32 mask, u32 data)
323 {
324         u32 val = __fsi_reg_read(reg);
325 
326         val &= ~mask;
327         val |= data & mask;
328 
329         __fsi_reg_write(reg, val);
330 }
331 
332 #define fsi_reg_write(p, r, d)\
333         __fsi_reg_write((p->base + REG_##r), d)
334 
335 #define fsi_reg_read(p, r)\
336         __fsi_reg_read((p->base + REG_##r))
337 
338 #define fsi_reg_mask_set(p, r, m, d)\
339         __fsi_reg_mask_set((p->base + REG_##r), m, d)
340 
341 #define fsi_master_read(p, r) _fsi_master_read(p, MST_##r)
342 #define fsi_core_read(p, r)   _fsi_master_read(p, p->core->r)
343 static u32 _fsi_master_read(struct fsi_master *master, u32 reg)
344 {
345         u32 ret;
346         unsigned long flags;
347 
348         spin_lock_irqsave(&master->lock, flags);
349         ret = __fsi_reg_read(master->base + reg);
350         spin_unlock_irqrestore(&master->lock, flags);
351 
352         return ret;
353 }
354 
355 #define fsi_master_mask_set(p, r, m, d) _fsi_master_mask_set(p, MST_##r, m, d)
356 #define fsi_core_mask_set(p, r, m, d)  _fsi_master_mask_set(p, p->core->r, m, d)
357 static void _fsi_master_mask_set(struct fsi_master *master,
358                                u32 reg, u32 mask, u32 data)
359 {
360         unsigned long flags;
361 
362         spin_lock_irqsave(&master->lock, flags);
363         __fsi_reg_mask_set(master->base + reg, mask, data);
364         spin_unlock_irqrestore(&master->lock, flags);
365 }
366 
367 /*
368  *              basic function
369  */
370 static int fsi_version(struct fsi_master *master)
371 {
372         return master->core->ver;
373 }
374 
375 static struct fsi_master *fsi_get_master(struct fsi_priv *fsi)
376 {
377         return fsi->master;
378 }
379 
380 static int fsi_is_clk_master(struct fsi_priv *fsi)
381 {
382         return fsi->clk_master;
383 }
384 
385 static int fsi_is_port_a(struct fsi_priv *fsi)
386 {
387         return fsi->master->base == fsi->base;
388 }
389 
390 static int fsi_is_spdif(struct fsi_priv *fsi)
391 {
392         return fsi->spdif;
393 }
394 
395 static int fsi_is_enable_stream(struct fsi_priv *fsi)
396 {
397         return fsi->enable_stream;
398 }
399 
400 static int fsi_is_play(struct snd_pcm_substream *substream)
401 {
402         return substream->stream == SNDRV_PCM_STREAM_PLAYBACK;
403 }
404 
405 static struct snd_soc_dai *fsi_get_dai(struct snd_pcm_substream *substream)
406 {
407         struct snd_soc_pcm_runtime *rtd = substream->private_data;
408 
409         return  rtd->cpu_dai;
410 }
411 
412 static struct fsi_priv *fsi_get_priv_frm_dai(struct snd_soc_dai *dai)
413 {
414         struct fsi_master *master = snd_soc_dai_get_drvdata(dai);
415 
416         if (dai->id == 0)
417                 return &master->fsia;
418         else
419                 return &master->fsib;
420 }
421 
422 static struct fsi_priv *fsi_get_priv(struct snd_pcm_substream *substream)
423 {
424         return fsi_get_priv_frm_dai(fsi_get_dai(substream));
425 }
426 
427 static u32 fsi_get_port_shift(struct fsi_priv *fsi, struct fsi_stream *io)
428 {
429         int is_play = fsi_stream_is_play(fsi, io);
430         int is_porta = fsi_is_port_a(fsi);
431         u32 shift;
432 
433         if (is_porta)
434                 shift = is_play ? AO_SHIFT : AI_SHIFT;
435         else
436                 shift = is_play ? BO_SHIFT : BI_SHIFT;
437 
438         return shift;
439 }
440 
441 static int fsi_frame2sample(struct fsi_priv *fsi, int frames)
442 {
443         return frames * fsi->chan_num;
444 }
445 
446 static int fsi_sample2frame(struct fsi_priv *fsi, int samples)
447 {
448         return samples / fsi->chan_num;
449 }
450 
451 static int fsi_get_current_fifo_samples(struct fsi_priv *fsi,
452                                         struct fsi_stream *io)
453 {
454         int is_play = fsi_stream_is_play(fsi, io);
455         u32 status;
456         int frames;
457 
458         status = is_play ?
459                 fsi_reg_read(fsi, DOFF_ST) :
460                 fsi_reg_read(fsi, DIFF_ST);
461 
462         frames = 0x1ff & (status >> 8);
463 
464         return fsi_frame2sample(fsi, frames);
465 }
466 
467 static void fsi_count_fifo_err(struct fsi_priv *fsi)
468 {
469         u32 ostatus = fsi_reg_read(fsi, DOFF_ST);
470         u32 istatus = fsi_reg_read(fsi, DIFF_ST);
471 
472         if (ostatus & ERR_OVER)
473                 fsi->playback.oerr_num++;
474 
475         if (ostatus & ERR_UNDER)
476                 fsi->playback.uerr_num++;
477 
478         if (istatus & ERR_OVER)
479                 fsi->capture.oerr_num++;
480 
481         if (istatus & ERR_UNDER)
482                 fsi->capture.uerr_num++;
483 
484         fsi_reg_write(fsi, DOFF_ST, 0);
485         fsi_reg_write(fsi, DIFF_ST, 0);
486 }
487 
488 /*
489  *              fsi_stream_xx() function
490  */
491 static inline int fsi_stream_is_play(struct fsi_priv *fsi,
492                                      struct fsi_stream *io)
493 {
494         return &fsi->playback == io;
495 }
496 
497 static inline struct fsi_stream *fsi_stream_get(struct fsi_priv *fsi,
498                                         struct snd_pcm_substream *substream)
499 {
500         return fsi_is_play(substream) ? &fsi->playback : &fsi->capture;
501 }
502 
503 static int fsi_stream_is_working(struct fsi_priv *fsi,
504                                  struct fsi_stream *io)
505 {
506         struct fsi_master *master = fsi_get_master(fsi);
507         unsigned long flags;
508         int ret;
509 
510         spin_lock_irqsave(&master->lock, flags);
511         ret = !!(io->substream && io->substream->runtime);
512         spin_unlock_irqrestore(&master->lock, flags);
513 
514         return ret;
515 }
516 
517 static struct fsi_priv *fsi_stream_to_priv(struct fsi_stream *io)
518 {
519         return io->priv;
520 }
521 
522 static void fsi_stream_init(struct fsi_priv *fsi,
523                             struct fsi_stream *io,
524                             struct snd_pcm_substream *substream)
525 {
526         struct snd_pcm_runtime *runtime = substream->runtime;
527         struct fsi_master *master = fsi_get_master(fsi);
528         unsigned long flags;
529 
530         spin_lock_irqsave(&master->lock, flags);
531         io->substream   = substream;
532         io->buff_sample_capa    = fsi_frame2sample(fsi, runtime->buffer_size);
533         io->buff_sample_pos     = 0;
534         io->period_samples      = fsi_frame2sample(fsi, runtime->period_size);
535         io->period_pos          = 0;
536         io->sample_width        = samples_to_bytes(runtime, 1);
537         io->bus_option          = 0;
538         io->oerr_num    = -1; /* ignore 1st err */
539         io->uerr_num    = -1; /* ignore 1st err */
540         fsi_stream_handler_call(io, init, fsi, io);
541         spin_unlock_irqrestore(&master->lock, flags);
542 }
543 
544 static void fsi_stream_quit(struct fsi_priv *fsi, struct fsi_stream *io)
545 {
546         struct snd_soc_dai *dai = fsi_get_dai(io->substream);
547         struct fsi_master *master = fsi_get_master(fsi);
548         unsigned long flags;
549 
550         spin_lock_irqsave(&master->lock, flags);
551 
552         if (io->oerr_num > 0)
553                 dev_err(dai->dev, "over_run = %d\n", io->oerr_num);
554 
555         if (io->uerr_num > 0)
556                 dev_err(dai->dev, "under_run = %d\n", io->uerr_num);
557 
558         fsi_stream_handler_call(io, quit, fsi, io);
559         io->substream   = NULL;
560         io->buff_sample_capa    = 0;
561         io->buff_sample_pos     = 0;
562         io->period_samples      = 0;
563         io->period_pos          = 0;
564         io->sample_width        = 0;
565         io->bus_option          = 0;
566         io->oerr_num    = 0;
567         io->uerr_num    = 0;
568         spin_unlock_irqrestore(&master->lock, flags);
569 }
570 
571 static int fsi_stream_transfer(struct fsi_stream *io)
572 {
573         struct fsi_priv *fsi = fsi_stream_to_priv(io);
574         if (!fsi)
575                 return -EIO;
576 
577         return fsi_stream_handler_call(io, transfer, fsi, io);
578 }
579 
580 #define fsi_stream_start(fsi, io)\
581         fsi_stream_handler_call(io, start_stop, fsi, io, 1)
582 
583 #define fsi_stream_stop(fsi, io)\
584         fsi_stream_handler_call(io, start_stop, fsi, io, 0)
585 
586 static int fsi_stream_probe(struct fsi_priv *fsi, struct device *dev)
587 {
588         struct fsi_stream *io;
589         int ret1, ret2;
590 
591         io = &fsi->playback;
592         ret1 = fsi_stream_handler_call(io, probe, fsi, io, dev);
593 
594         io = &fsi->capture;
595         ret2 = fsi_stream_handler_call(io, probe, fsi, io, dev);
596 
597         if (ret1 < 0)
598                 return ret1;
599         if (ret2 < 0)
600                 return ret2;
601 
602         return 0;
603 }
604 
605 static int fsi_stream_remove(struct fsi_priv *fsi)
606 {
607         struct fsi_stream *io;
608         int ret1, ret2;
609 
610         io = &fsi->playback;
611         ret1 = fsi_stream_handler_call(io, remove, fsi, io);
612 
613         io = &fsi->capture;
614         ret2 = fsi_stream_handler_call(io, remove, fsi, io);
615 
616         if (ret1 < 0)
617                 return ret1;
618         if (ret2 < 0)
619                 return ret2;
620 
621         return 0;
622 }
623 
624 /*
625  *      format/bus/dma setting
626  */
627 static void fsi_format_bus_setup(struct fsi_priv *fsi, struct fsi_stream *io,
628                                  u32 bus, struct device *dev)
629 {
630         struct fsi_master *master = fsi_get_master(fsi);
631         int is_play = fsi_stream_is_play(fsi, io);
632         u32 fmt = fsi->fmt;
633 
634         if (fsi_version(master) >= 2) {
635                 u32 dma = 0;
636 
637                 /*
638                  * FSI2 needs DMA/Bus setting
639                  */
640                 switch (bus) {
641                 case PACKAGE_24BITBUS_FRONT:
642                         fmt |= CR_BWS_24;
643                         dma |= VDMD_FRONT;
644                         dev_dbg(dev, "24bit bus / package in front\n");
645                         break;
646                 case PACKAGE_16BITBUS_STREAM:
647                         fmt |= CR_BWS_16;
648                         dma |= VDMD_STREAM;
649                         dev_dbg(dev, "16bit bus / stream mode\n");
650                         break;
651                 case PACKAGE_24BITBUS_BACK:
652                 default:
653                         fmt |= CR_BWS_24;
654                         dma |= VDMD_BACK;
655                         dev_dbg(dev, "24bit bus / package in back\n");
656                         break;
657                 }
658 
659                 if (is_play)
660                         fsi_reg_write(fsi, OUT_DMAC,    dma);
661                 else
662                         fsi_reg_write(fsi, IN_DMAC,     dma);
663         }
664 
665         if (is_play)
666                 fsi_reg_write(fsi, DO_FMT, fmt);
667         else
668                 fsi_reg_write(fsi, DI_FMT, fmt);
669 }
670 
671 /*
672  *              irq function
673  */
674 
675 static void fsi_irq_enable(struct fsi_priv *fsi, struct fsi_stream *io)
676 {
677         u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
678         struct fsi_master *master = fsi_get_master(fsi);
679 
680         fsi_core_mask_set(master, imsk,  data, data);
681         fsi_core_mask_set(master, iemsk, data, data);
682 }
683 
684 static void fsi_irq_disable(struct fsi_priv *fsi, struct fsi_stream *io)
685 {
686         u32 data = AB_IO(1, fsi_get_port_shift(fsi, io));
687         struct fsi_master *master = fsi_get_master(fsi);
688 
689         fsi_core_mask_set(master, imsk,  data, 0);
690         fsi_core_mask_set(master, iemsk, data, 0);
691 }
692 
693 static u32 fsi_irq_get_status(struct fsi_master *master)
694 {
695         return fsi_core_read(master, int_st);
696 }
697 
698 static void fsi_irq_clear_status(struct fsi_priv *fsi)
699 {
700         u32 data = 0;
701         struct fsi_master *master = fsi_get_master(fsi);
702 
703         data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->playback));
704         data |= AB_IO(1, fsi_get_port_shift(fsi, &fsi->capture));
705 
706         /* clear interrupt factor */
707         fsi_core_mask_set(master, int_st, data, 0);
708 }
709 
710 /*
711  *              SPDIF master clock function
712  *
713  * These functions are used later FSI2
714  */
715 static void fsi_spdif_clk_ctrl(struct fsi_priv *fsi, int enable)
716 {
717         struct fsi_master *master = fsi_get_master(fsi);
718         u32 mask, val;
719 
720         mask = BP | SE;
721         val = enable ? mask : 0;
722 
723         fsi_is_port_a(fsi) ?
724                 fsi_core_mask_set(master, a_mclk, mask, val) :
725                 fsi_core_mask_set(master, b_mclk, mask, val);
726 }
727 
728 /*
729  *              clock function
730  */
731 static int fsi_clk_init(struct device *dev,
732                         struct fsi_priv *fsi,
733                         int xck,
734                         int ick,
735                         int div,
736                         int (*set_rate)(struct device *dev,
737                                         struct fsi_priv *fsi))
738 {
739         struct fsi_clk *clock = &fsi->clock;
740         int is_porta = fsi_is_port_a(fsi);
741 
742         clock->xck      = NULL;
743         clock->ick      = NULL;
744         clock->div      = NULL;
745         clock->rate     = 0;
746         clock->count    = 0;
747         clock->set_rate = set_rate;
748 
749         clock->own = devm_clk_get(dev, NULL);
750         if (IS_ERR(clock->own))
751                 return -EINVAL;
752 
753         /* external clock */
754         if (xck) {
755                 clock->xck = devm_clk_get(dev, is_porta ? "xcka" : "xckb");
756                 if (IS_ERR(clock->xck)) {
757                         dev_err(dev, "can't get xck clock\n");
758                         return -EINVAL;
759                 }
760                 if (clock->xck == clock->own) {
761                         dev_err(dev, "cpu doesn't support xck clock\n");
762                         return -EINVAL;
763                 }
764         }
765 
766         /* FSIACLK/FSIBCLK */
767         if (ick) {
768                 clock->ick = devm_clk_get(dev,  is_porta ? "icka" : "ickb");
769                 if (IS_ERR(clock->ick)) {
770                         dev_err(dev, "can't get ick clock\n");
771                         return -EINVAL;
772                 }
773                 if (clock->ick == clock->own) {
774                         dev_err(dev, "cpu doesn't support ick clock\n");
775                         return -EINVAL;
776                 }
777         }
778 
779         /* FSI-DIV */
780         if (div) {
781                 clock->div = devm_clk_get(dev,  is_porta ? "diva" : "divb");
782                 if (IS_ERR(clock->div)) {
783                         dev_err(dev, "can't get div clock\n");
784                         return -EINVAL;
785                 }
786                 if (clock->div == clock->own) {
787                         dev_err(dev, "cpu doens't support div clock\n");
788                         return -EINVAL;
789                 }
790         }
791 
792         return 0;
793 }
794 
795 #define fsi_clk_invalid(fsi) fsi_clk_valid(fsi, 0)
796 static void fsi_clk_valid(struct fsi_priv *fsi, unsigned long rate)
797 {
798         fsi->clock.rate = rate;
799 }
800 
801 static int fsi_clk_is_valid(struct fsi_priv *fsi)
802 {
803         return  fsi->clock.set_rate &&
804                 fsi->clock.rate;
805 }
806 
807 static int fsi_clk_enable(struct device *dev,
808                           struct fsi_priv *fsi)
809 {
810         struct fsi_clk *clock = &fsi->clock;
811         int ret = -EINVAL;
812 
813         if (!fsi_clk_is_valid(fsi))
814                 return ret;
815 
816         if (0 == clock->count) {
817                 ret = clock->set_rate(dev, fsi);
818                 if (ret < 0) {
819                         fsi_clk_invalid(fsi);
820                         return ret;
821                 }
822 
823                 if (clock->xck)
824                         clk_enable(clock->xck);
825                 if (clock->ick)
826                         clk_enable(clock->ick);
827                 if (clock->div)
828                         clk_enable(clock->div);
829 
830                 clock->count++;
831         }
832 
833         return ret;
834 }
835 
836 static int fsi_clk_disable(struct device *dev,
837                             struct fsi_priv *fsi)
838 {
839         struct fsi_clk *clock = &fsi->clock;
840 
841         if (!fsi_clk_is_valid(fsi))
842                 return -EINVAL;
843 
844         if (1 == clock->count--) {
845                 if (clock->xck)
846                         clk_disable(clock->xck);
847                 if (clock->ick)
848                         clk_disable(clock->ick);
849                 if (clock->div)
850                         clk_disable(clock->div);
851         }
852 
853         return 0;
854 }
855 
856 static int fsi_clk_set_ackbpf(struct device *dev,
857                               struct fsi_priv *fsi,
858                               int ackmd, int bpfmd)
859 {
860         u32 data = 0;
861 
862         /* check ackmd/bpfmd relationship */
863         if (bpfmd > ackmd) {
864                 dev_err(dev, "unsupported rate (%d/%d)\n", ackmd, bpfmd);
865                 return -EINVAL;
866         }
867 
868         /*  ACKMD */
869         switch (ackmd) {
870         case 512:
871                 data |= (0x0 << 12);
872                 break;
873         case 256:
874                 data |= (0x1 << 12);
875                 break;
876         case 128:
877                 data |= (0x2 << 12);
878                 break;
879         case 64:
880                 data |= (0x3 << 12);
881                 break;
882         case 32:
883                 data |= (0x4 << 12);
884                 break;
885         default:
886                 dev_err(dev, "unsupported ackmd (%d)\n", ackmd);
887                 return -EINVAL;
888         }
889 
890         /* BPFMD */
891         switch (bpfmd) {
892         case 32:
893                 data |= (0x0 << 8);
894                 break;
895         case 64:
896                 data |= (0x1 << 8);
897                 break;
898         case 128:
899                 data |= (0x2 << 8);
900                 break;
901         case 256:
902                 data |= (0x3 << 8);
903                 break;
904         case 512:
905                 data |= (0x4 << 8);
906                 break;
907         case 16:
908                 data |= (0x7 << 8);
909                 break;
910         default:
911                 dev_err(dev, "unsupported bpfmd (%d)\n", bpfmd);
912                 return -EINVAL;
913         }
914 
915         dev_dbg(dev, "ACKMD/BPFMD = %d/%d\n", ackmd, bpfmd);
916 
917         fsi_reg_mask_set(fsi, CKG1, (ACKMD_MASK | BPFMD_MASK) , data);
918         udelay(10);
919 
920         return 0;
921 }
922 
923 static int fsi_clk_set_rate_external(struct device *dev,
924                                      struct fsi_priv *fsi)
925 {
926         struct clk *xck = fsi->clock.xck;
927         struct clk *ick = fsi->clock.ick;
928         unsigned long rate = fsi->clock.rate;
929         unsigned long xrate;
930         int ackmd, bpfmd;
931         int ret = 0;
932 
933         /* check clock rate */
934         xrate = clk_get_rate(xck);
935         if (xrate % rate) {
936                 dev_err(dev, "unsupported clock rate\n");
937                 return -EINVAL;
938         }
939 
940         clk_set_parent(ick, xck);
941         clk_set_rate(ick, xrate);
942 
943         bpfmd = fsi->chan_num * 32;
944         ackmd = xrate / rate;
945 
946         dev_dbg(dev, "external/rate = %ld/%ld\n", xrate, rate);
947 
948         ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
949         if (ret < 0)
950                 dev_err(dev, "%s failed", __func__);
951 
952         return ret;
953 }
954 
955 static int fsi_clk_set_rate_cpg(struct device *dev,
956                                 struct fsi_priv *fsi)
957 {
958         struct clk *ick = fsi->clock.ick;
959         struct clk *div = fsi->clock.div;
960         unsigned long rate = fsi->clock.rate;
961         unsigned long target = 0; /* 12288000 or 11289600 */
962         unsigned long actual, cout;
963         unsigned long diff, min;
964         unsigned long best_cout, best_act;
965         int adj;
966         int ackmd, bpfmd;
967         int ret = -EINVAL;
968 
969         if (!(12288000 % rate))
970                 target = 12288000;
971         if (!(11289600 % rate))
972                 target = 11289600;
973         if (!target) {
974                 dev_err(dev, "unsupported rate\n");
975                 return ret;
976         }
977 
978         bpfmd = fsi->chan_num * 32;
979         ackmd = target / rate;
980         ret = fsi_clk_set_ackbpf(dev, fsi, ackmd, bpfmd);
981         if (ret < 0) {
982                 dev_err(dev, "%s failed", __func__);
983                 return ret;
984         }
985 
986         /*
987          * The clock flow is
988          *
989          * [CPG] = cout => [FSI_DIV] = audio => [FSI] => [codec]
990          *
991          * But, it needs to find best match of CPG and FSI_DIV
992          * combination, since it is difficult to generate correct
993          * frequency of audio clock from ick clock only.
994          * Because ick is created from its parent clock.
995          *
996          * target       = rate x [512/256/128/64]fs
997          * cout         = round(target x adjustment)
998          * actual       = cout / adjustment (by FSI-DIV) ~= target
999          * audio        = actual
1000          */
1001         min = ~0;
1002         best_cout = 0;
1003         best_act = 0;
1004         for (adj = 1; adj < 0xffff; adj++) {
1005 
1006                 cout = target * adj;
1007                 if (cout > 100000000) /* max clock = 100MHz */
1008                         break;
1009 
1010                 /* cout/actual audio clock */
1011                 cout    = clk_round_rate(ick, cout);
1012                 actual  = cout / adj;
1013 
1014                 /* find best frequency */
1015                 diff = abs(actual - target);
1016                 if (diff < min) {
1017                         min             = diff;
1018                         best_cout       = cout;
1019                         best_act        = actual;
1020                 }
1021         }
1022 
1023         ret = clk_set_rate(ick, best_cout);
1024         if (ret < 0) {
1025                 dev_err(dev, "ick clock failed\n");
1026                 return -EIO;
1027         }
1028 
1029         ret = clk_set_rate(div, clk_round_rate(div, best_act));
1030         if (ret < 0) {
1031                 dev_err(dev, "div clock failed\n");
1032                 return -EIO;
1033         }
1034 
1035         dev_dbg(dev, "ick/div = %ld/%ld\n",
1036                 clk_get_rate(ick), clk_get_rate(div));
1037 
1038         return ret;
1039 }
1040 
1041 static void fsi_pointer_update(struct fsi_stream *io, int size)
1042 {
1043         io->buff_sample_pos += size;
1044 
1045         if (io->buff_sample_pos >=
1046             io->period_samples * (io->period_pos + 1)) {
1047                 struct snd_pcm_substream *substream = io->substream;
1048                 struct snd_pcm_runtime *runtime = substream->runtime;
1049 
1050                 io->period_pos++;
1051 
1052                 if (io->period_pos >= runtime->periods) {
1053                         io->buff_sample_pos = 0;
1054                         io->period_pos = 0;
1055                 }
1056 
1057                 snd_pcm_period_elapsed(substream);
1058         }
1059 }
1060 
1061 /*
1062  *              pio data transfer handler
1063  */
1064 static void fsi_pio_push16(struct fsi_priv *fsi, u8 *_buf, int samples)
1065 {
1066         int i;
1067 
1068         if (fsi_is_enable_stream(fsi)) {
1069                 /*
1070                  * stream mode
1071                  * see
1072                  *      fsi_pio_push_init()
1073                  */
1074                 u32 *buf = (u32 *)_buf;
1075 
1076                 for (i = 0; i < samples / 2; i++)
1077                         fsi_reg_write(fsi, DODT, buf[i]);
1078         } else {
1079                 /* normal mode */
1080                 u16 *buf = (u16 *)_buf;
1081 
1082                 for (i = 0; i < samples; i++)
1083                         fsi_reg_write(fsi, DODT, ((u32)*(buf + i) << 8));
1084         }
1085 }
1086 
1087 static void fsi_pio_pop16(struct fsi_priv *fsi, u8 *_buf, int samples)
1088 {
1089         u16 *buf = (u16 *)_buf;
1090         int i;
1091 
1092         for (i = 0; i < samples; i++)
1093                 *(buf + i) = (u16)(fsi_reg_read(fsi, DIDT) >> 8);
1094 }
1095 
1096 static void fsi_pio_push32(struct fsi_priv *fsi, u8 *_buf, int samples)
1097 {
1098         u32 *buf = (u32 *)_buf;
1099         int i;
1100 
1101         for (i = 0; i < samples; i++)
1102                 fsi_reg_write(fsi, DODT, *(buf + i));
1103 }
1104 
1105 static void fsi_pio_pop32(struct fsi_priv *fsi, u8 *_buf, int samples)
1106 {
1107         u32 *buf = (u32 *)_buf;
1108         int i;
1109 
1110         for (i = 0; i < samples; i++)
1111                 *(buf + i) = fsi_reg_read(fsi, DIDT);
1112 }
1113 
1114 static u8 *fsi_pio_get_area(struct fsi_priv *fsi, struct fsi_stream *io)
1115 {
1116         struct snd_pcm_runtime *runtime = io->substream->runtime;
1117 
1118         return runtime->dma_area +
1119                 samples_to_bytes(runtime, io->buff_sample_pos);
1120 }
1121 
1122 static int fsi_pio_transfer(struct fsi_priv *fsi, struct fsi_stream *io,
1123                 void (*run16)(struct fsi_priv *fsi, u8 *buf, int samples),
1124                 void (*run32)(struct fsi_priv *fsi, u8 *buf, int samples),
1125                 int samples)
1126 {
1127         u8 *buf;
1128 
1129         if (!fsi_stream_is_working(fsi, io))
1130                 return -EINVAL;
1131 
1132         buf = fsi_pio_get_area(fsi, io);
1133 
1134         switch (io->sample_width) {
1135         case 2:
1136                 run16(fsi, buf, samples);
1137                 break;
1138         case 4:
1139                 run32(fsi, buf, samples);
1140                 break;
1141         default:
1142                 return -EINVAL;
1143         }
1144 
1145         fsi_pointer_update(io, samples);
1146 
1147         return 0;
1148 }
1149 
1150 static int fsi_pio_pop(struct fsi_priv *fsi, struct fsi_stream *io)
1151 {
1152         int sample_residues;    /* samples in FSI fifo */
1153         int sample_space;       /* ALSA free samples space */
1154         int samples;
1155 
1156         sample_residues = fsi_get_current_fifo_samples(fsi, io);
1157         sample_space    = io->buff_sample_capa - io->buff_sample_pos;
1158 
1159         samples = min(sample_residues, sample_space);
1160 
1161         return fsi_pio_transfer(fsi, io,
1162                                   fsi_pio_pop16,
1163                                   fsi_pio_pop32,
1164                                   samples);
1165 }
1166 
1167 static int fsi_pio_push(struct fsi_priv *fsi, struct fsi_stream *io)
1168 {
1169         int sample_residues;    /* ALSA residue samples */
1170         int sample_space;       /* FSI fifo free samples space */
1171         int samples;
1172 
1173         sample_residues = io->buff_sample_capa - io->buff_sample_pos;
1174         sample_space    = io->fifo_sample_capa -
1175                 fsi_get_current_fifo_samples(fsi, io);
1176 
1177         samples = min(sample_residues, sample_space);
1178 
1179         return fsi_pio_transfer(fsi, io,
1180                                   fsi_pio_push16,
1181                                   fsi_pio_push32,
1182                                   samples);
1183 }
1184 
1185 static int fsi_pio_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1186                                int enable)
1187 {
1188         struct fsi_master *master = fsi_get_master(fsi);
1189         u32 clk  = fsi_is_port_a(fsi) ? CRA  : CRB;
1190 
1191         if (enable)
1192                 fsi_irq_enable(fsi, io);
1193         else
1194                 fsi_irq_disable(fsi, io);
1195 
1196         if (fsi_is_clk_master(fsi))
1197                 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1198 
1199         return 0;
1200 }
1201 
1202 static int fsi_pio_push_init(struct fsi_priv *fsi, struct fsi_stream *io)
1203 {
1204         /*
1205          * we can use 16bit stream mode
1206          * when "playback" and "16bit data"
1207          * and platform allows "stream mode"
1208          * see
1209          *      fsi_pio_push16()
1210          */
1211         if (fsi_is_enable_stream(fsi))
1212                 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1213                                  BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1214         else
1215                 io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1216                                  BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1217         return 0;
1218 }
1219 
1220 static int fsi_pio_pop_init(struct fsi_priv *fsi, struct fsi_stream *io)
1221 {
1222         /*
1223          * always 24bit bus, package back when "capture"
1224          */
1225         io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1226                          BUSOP_SET(16, PACKAGE_24BITBUS_BACK);
1227         return 0;
1228 }
1229 
1230 static struct fsi_stream_handler fsi_pio_push_handler = {
1231         .init           = fsi_pio_push_init,
1232         .transfer       = fsi_pio_push,
1233         .start_stop     = fsi_pio_start_stop,
1234 };
1235 
1236 static struct fsi_stream_handler fsi_pio_pop_handler = {
1237         .init           = fsi_pio_pop_init,
1238         .transfer       = fsi_pio_pop,
1239         .start_stop     = fsi_pio_start_stop,
1240 };
1241 
1242 static irqreturn_t fsi_interrupt(int irq, void *data)
1243 {
1244         struct fsi_master *master = data;
1245         u32 int_st = fsi_irq_get_status(master);
1246 
1247         /* clear irq status */
1248         fsi_master_mask_set(master, SOFT_RST, IR, 0);
1249         fsi_master_mask_set(master, SOFT_RST, IR, IR);
1250 
1251         if (int_st & AB_IO(1, AO_SHIFT))
1252                 fsi_stream_transfer(&master->fsia.playback);
1253         if (int_st & AB_IO(1, BO_SHIFT))
1254                 fsi_stream_transfer(&master->fsib.playback);
1255         if (int_st & AB_IO(1, AI_SHIFT))
1256                 fsi_stream_transfer(&master->fsia.capture);
1257         if (int_st & AB_IO(1, BI_SHIFT))
1258                 fsi_stream_transfer(&master->fsib.capture);
1259 
1260         fsi_count_fifo_err(&master->fsia);
1261         fsi_count_fifo_err(&master->fsib);
1262 
1263         fsi_irq_clear_status(&master->fsia);
1264         fsi_irq_clear_status(&master->fsib);
1265 
1266         return IRQ_HANDLED;
1267 }
1268 
1269 /*
1270  *              dma data transfer handler
1271  */
1272 static int fsi_dma_init(struct fsi_priv *fsi, struct fsi_stream *io)
1273 {
1274         /*
1275          * 24bit data : 24bit bus / package in back
1276          * 16bit data : 16bit bus / stream mode
1277          */
1278         io->bus_option = BUSOP_SET(24, PACKAGE_24BITBUS_BACK) |
1279                          BUSOP_SET(16, PACKAGE_16BITBUS_STREAM);
1280 
1281         return 0;
1282 }
1283 
1284 static void fsi_dma_complete(void *data)
1285 {
1286         struct fsi_stream *io = (struct fsi_stream *)data;
1287         struct fsi_priv *fsi = fsi_stream_to_priv(io);
1288 
1289         fsi_pointer_update(io, io->period_samples);
1290 
1291         fsi_count_fifo_err(fsi);
1292 }
1293 
1294 static int fsi_dma_transfer(struct fsi_priv *fsi, struct fsi_stream *io)
1295 {
1296         struct snd_soc_dai *dai = fsi_get_dai(io->substream);
1297         struct snd_pcm_substream *substream = io->substream;
1298         struct dma_async_tx_descriptor *desc;
1299         int is_play = fsi_stream_is_play(fsi, io);
1300         enum dma_data_direction dir = is_play ? DMA_TO_DEVICE : DMA_FROM_DEVICE;
1301         int ret = -EIO;
1302 
1303         desc = dmaengine_prep_dma_cyclic(io->chan,
1304                                          substream->runtime->dma_addr,
1305                                          snd_pcm_lib_buffer_bytes(substream),
1306                                          snd_pcm_lib_period_bytes(substream),
1307                                          dir,
1308                                          DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
1309         if (!desc) {
1310                 dev_err(dai->dev, "dmaengine_prep_dma_cyclic() fail\n");
1311                 goto fsi_dma_transfer_err;
1312         }
1313 
1314         desc->callback          = fsi_dma_complete;
1315         desc->callback_param    = io;
1316 
1317         if (dmaengine_submit(desc) < 0) {
1318                 dev_err(dai->dev, "tx_submit() fail\n");
1319                 goto fsi_dma_transfer_err;
1320         }
1321 
1322         dma_async_issue_pending(io->chan);
1323 
1324         /*
1325          * FIXME
1326          *
1327          * In DMAEngine case, codec and FSI cannot be started simultaneously
1328          * since FSI is using the scheduler work queue.
1329          * Therefore, in capture case, probably FSI FIFO will have got
1330          * overflow error in this point.
1331          * in that case, DMA cannot start transfer until error was cleared.
1332          */
1333         if (!is_play) {
1334                 if (ERR_OVER & fsi_reg_read(fsi, DIFF_ST)) {
1335                         fsi_reg_mask_set(fsi, DIFF_CTL, FIFO_CLR, FIFO_CLR);
1336                         fsi_reg_write(fsi, DIFF_ST, 0);
1337                 }
1338         }
1339 
1340         ret = 0;
1341 
1342 fsi_dma_transfer_err:
1343         return ret;
1344 }
1345 
1346 static int fsi_dma_push_start_stop(struct fsi_priv *fsi, struct fsi_stream *io,
1347                                  int start)
1348 {
1349         struct fsi_master *master = fsi_get_master(fsi);
1350         u32 clk  = fsi_is_port_a(fsi) ? CRA  : CRB;
1351         u32 enable = start ? DMA_ON : 0;
1352 
1353         fsi_reg_mask_set(fsi, OUT_DMAC, DMA_ON, enable);
1354 
1355         dmaengine_terminate_all(io->chan);
1356 
1357         if (fsi_is_clk_master(fsi))
1358                 fsi_master_mask_set(master, CLK_RST, clk, (enable) ? clk : 0);
1359 
1360         return 0;
1361 }
1362 
1363 static int fsi_dma_probe(struct fsi_priv *fsi, struct fsi_stream *io, struct device *dev)
1364 {
1365         dma_cap_mask_t mask;
1366         int is_play = fsi_stream_is_play(fsi, io);
1367 
1368         dma_cap_zero(mask);
1369         dma_cap_set(DMA_SLAVE, mask);
1370 
1371         io->chan = dma_request_slave_channel_compat(mask,
1372                                 shdma_chan_filter, (void *)io->dma_id,
1373                                 dev, is_play ? "tx" : "rx");
1374         if (io->chan) {
1375                 struct dma_slave_config cfg;
1376                 int ret;
1377 
1378                 cfg.slave_id    = io->dma_id;
1379                 cfg.dst_addr    = 0; /* use default addr */
1380                 cfg.src_addr    = 0; /* use default addr */
1381                 cfg.direction   = is_play ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM;
1382 
1383                 ret = dmaengine_slave_config(io->chan, &cfg);
1384                 if (ret < 0) {
1385                         dma_release_channel(io->chan);
1386                         io->chan = NULL;
1387                 }
1388         }
1389 
1390         if (!io->chan) {
1391 
1392                 /* switch to PIO handler */
1393                 if (is_play)
1394                         fsi->playback.handler   = &fsi_pio_push_handler;
1395                 else
1396                         fsi->capture.handler    = &fsi_pio_pop_handler;
1397 
1398                 dev_info(dev, "switch handler (dma => pio)\n");
1399 
1400                 /* probe again */
1401                 return fsi_stream_probe(fsi, dev);
1402         }
1403 
1404         return 0;
1405 }
1406 
1407 static int fsi_dma_remove(struct fsi_priv *fsi, struct fsi_stream *io)
1408 {
1409         fsi_stream_stop(fsi, io);
1410 
1411         if (io->chan)
1412                 dma_release_channel(io->chan);
1413 
1414         io->chan = NULL;
1415         return 0;
1416 }
1417 
1418 static struct fsi_stream_handler fsi_dma_push_handler = {
1419         .init           = fsi_dma_init,
1420         .probe          = fsi_dma_probe,
1421         .transfer       = fsi_dma_transfer,
1422         .remove         = fsi_dma_remove,
1423         .start_stop     = fsi_dma_push_start_stop,
1424 };
1425 
1426 /*
1427  *              dai ops
1428  */
1429 static void fsi_fifo_init(struct fsi_priv *fsi,
1430                           struct fsi_stream *io,
1431                           struct device *dev)
1432 {
1433         struct fsi_master *master = fsi_get_master(fsi);
1434         int is_play = fsi_stream_is_play(fsi, io);
1435         u32 shift, i;
1436         int frame_capa;
1437 
1438         /* get on-chip RAM capacity */
1439         shift = fsi_master_read(master, FIFO_SZ);
1440         shift >>= fsi_get_port_shift(fsi, io);
1441         shift &= FIFO_SZ_MASK;
1442         frame_capa = 256 << shift;
1443         dev_dbg(dev, "fifo = %d words\n", frame_capa);
1444 
1445         /*
1446          * The maximum number of sample data varies depending
1447          * on the number of channels selected for the format.
1448          *
1449          * FIFOs are used in 4-channel units in 3-channel mode
1450          * and in 8-channel units in 5- to 7-channel mode
1451          * meaning that more FIFOs than the required size of DPRAM
1452          * are used.
1453          *
1454          * ex) if 256 words of DP-RAM is connected
1455          * 1 channel:  256 (256 x 1 = 256)
1456          * 2 channels: 128 (128 x 2 = 256)
1457          * 3 channels:  64 ( 64 x 3 = 192)
1458          * 4 channels:  64 ( 64 x 4 = 256)
1459          * 5 channels:  32 ( 32 x 5 = 160)
1460          * 6 channels:  32 ( 32 x 6 = 192)
1461          * 7 channels:  32 ( 32 x 7 = 224)
1462          * 8 channels:  32 ( 32 x 8 = 256)
1463          */
1464         for (i = 1; i < fsi->chan_num; i <<= 1)
1465                 frame_capa >>= 1;
1466         dev_dbg(dev, "%d channel %d store\n",
1467                 fsi->chan_num, frame_capa);
1468 
1469         io->fifo_sample_capa = fsi_frame2sample(fsi, frame_capa);
1470 
1471         /*
1472          * set interrupt generation factor
1473          * clear FIFO
1474          */
1475         if (is_play) {
1476                 fsi_reg_write(fsi,      DOFF_CTL, IRQ_HALF);
1477                 fsi_reg_mask_set(fsi,   DOFF_CTL, FIFO_CLR, FIFO_CLR);
1478         } else {
1479                 fsi_reg_write(fsi,      DIFF_CTL, IRQ_HALF);
1480                 fsi_reg_mask_set(fsi,   DIFF_CTL, FIFO_CLR, FIFO_CLR);
1481         }
1482 }
1483 
1484 static int fsi_hw_startup(struct fsi_priv *fsi,
1485                           struct fsi_stream *io,
1486                           struct device *dev)
1487 {
1488         u32 data = 0;
1489 
1490         /* clock setting */
1491         if (fsi_is_clk_master(fsi))
1492                 data = DIMD | DOMD;
1493 
1494         fsi_reg_mask_set(fsi, CKG1, (DIMD | DOMD), data);
1495 
1496         /* clock inversion (CKG2) */
1497         data = 0;
1498         if (fsi->bit_clk_inv)
1499                 data |= (1 << 0);
1500         if (fsi->lr_clk_inv)
1501                 data |= (1 << 4);
1502         if (fsi_is_clk_master(fsi))
1503                 data <<= 8;
1504         fsi_reg_write(fsi, CKG2, data);
1505 
1506         /* spdif ? */
1507         if (fsi_is_spdif(fsi)) {
1508                 fsi_spdif_clk_ctrl(fsi, 1);
1509                 fsi_reg_mask_set(fsi, OUT_SEL, DMMD, DMMD);
1510         }
1511 
1512         /*
1513          * get bus settings
1514          */
1515         data = 0;
1516         switch (io->sample_width) {
1517         case 2:
1518                 data = BUSOP_GET(16, io->bus_option);
1519                 break;
1520         case 4:
1521                 data = BUSOP_GET(24, io->bus_option);
1522                 break;
1523         }
1524         fsi_format_bus_setup(fsi, io, data, dev);
1525 
1526         /* irq clear */
1527         fsi_irq_disable(fsi, io);
1528         fsi_irq_clear_status(fsi);
1529 
1530         /* fifo init */
1531         fsi_fifo_init(fsi, io, dev);
1532 
1533         /* start master clock */
1534         if (fsi_is_clk_master(fsi))
1535                 return fsi_clk_enable(dev, fsi);
1536 
1537         return 0;
1538 }
1539 
1540 static int fsi_hw_shutdown(struct fsi_priv *fsi,
1541                             struct device *dev)
1542 {
1543         /* stop master clock */
1544         if (fsi_is_clk_master(fsi))
1545                 return fsi_clk_disable(dev, fsi);
1546 
1547         return 0;
1548 }
1549 
1550 static int fsi_dai_startup(struct snd_pcm_substream *substream,
1551                            struct snd_soc_dai *dai)
1552 {
1553         struct fsi_priv *fsi = fsi_get_priv(substream);
1554 
1555         fsi_clk_invalid(fsi);
1556 
1557         return 0;
1558 }
1559 
1560 static void fsi_dai_shutdown(struct snd_pcm_substream *substream,
1561                              struct snd_soc_dai *dai)
1562 {
1563         struct fsi_priv *fsi = fsi_get_priv(substream);
1564 
1565         fsi_clk_invalid(fsi);
1566 }
1567 
1568 static int fsi_dai_trigger(struct snd_pcm_substream *substream, int cmd,
1569                            struct snd_soc_dai *dai)
1570 {
1571         struct fsi_priv *fsi = fsi_get_priv(substream);
1572         struct fsi_stream *io = fsi_stream_get(fsi, substream);
1573         int ret = 0;
1574 
1575         switch (cmd) {
1576         case SNDRV_PCM_TRIGGER_START:
1577                 fsi_stream_init(fsi, io, substream);
1578                 if (!ret)
1579                         ret = fsi_hw_startup(fsi, io, dai->dev);
1580                 if (!ret)
1581                         ret = fsi_stream_start(fsi, io);
1582                 if (!ret)
1583                         ret = fsi_stream_transfer(io);
1584                 break;
1585         case SNDRV_PCM_TRIGGER_STOP:
1586                 if (!ret)
1587                         ret = fsi_hw_shutdown(fsi, dai->dev);
1588                 fsi_stream_stop(fsi, io);
1589                 fsi_stream_quit(fsi, io);
1590                 break;
1591         }
1592 
1593         return ret;
1594 }
1595 
1596 static int fsi_set_fmt_dai(struct fsi_priv *fsi, unsigned int fmt)
1597 {
1598         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1599         case SND_SOC_DAIFMT_I2S:
1600                 fsi->fmt = CR_I2S;
1601                 fsi->chan_num = 2;
1602                 break;
1603         case SND_SOC_DAIFMT_LEFT_J:
1604                 fsi->fmt = CR_PCM;
1605                 fsi->chan_num = 2;
1606                 break;
1607         default:
1608                 return -EINVAL;
1609         }
1610 
1611         return 0;
1612 }
1613 
1614 static int fsi_set_fmt_spdif(struct fsi_priv *fsi)
1615 {
1616         struct fsi_master *master = fsi_get_master(fsi);
1617 
1618         if (fsi_version(master) < 2)
1619                 return -EINVAL;
1620 
1621         fsi->fmt = CR_DTMD_SPDIF_PCM | CR_PCM;
1622         fsi->chan_num = 2;
1623 
1624         return 0;
1625 }
1626 
1627 static int fsi_dai_set_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1628 {
1629         struct fsi_priv *fsi = fsi_get_priv_frm_dai(dai);
1630         int ret;
1631 
1632         /* set master/slave audio interface */
1633         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1634         case SND_SOC_DAIFMT_CBM_CFM:
1635                 break;
1636         case SND_SOC_DAIFMT_CBS_CFS:
1637                 fsi->clk_master = 1; /* codec is slave, cpu is master */
1638                 break;
1639         default:
1640                 return -EINVAL;
1641         }
1642 
1643         /* set clock inversion */
1644         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1645         case SND_SOC_DAIFMT_NB_IF:
1646                 fsi->bit_clk_inv = 0;
1647                 fsi->lr_clk_inv = 1;
1648                 break;
1649         case SND_SOC_DAIFMT_IB_NF:
1650                 fsi->bit_clk_inv = 1;
1651                 fsi->lr_clk_inv = 0;
1652                 break;
1653         case SND_SOC_DAIFMT_IB_IF:
1654                 fsi->bit_clk_inv = 1;
1655                 fsi->lr_clk_inv = 1;
1656                 break;
1657         case SND_SOC_DAIFMT_NB_NF:
1658         default:
1659                 fsi->bit_clk_inv = 0;
1660                 fsi->lr_clk_inv = 0;
1661                 break;
1662         }
1663 
1664         if (fsi_is_clk_master(fsi)) {
1665                 if (fsi->clk_cpg)
1666                         fsi_clk_init(dai->dev, fsi, 0, 1, 1,
1667                                      fsi_clk_set_rate_cpg);
1668                 else
1669                         fsi_clk_init(dai->dev, fsi, 1, 1, 0,
1670                                      fsi_clk_set_rate_external);
1671         }
1672 
1673         /* set format */
1674         if (fsi_is_spdif(fsi))
1675                 ret = fsi_set_fmt_spdif(fsi);
1676         else
1677                 ret = fsi_set_fmt_dai(fsi, fmt & SND_SOC_DAIFMT_FORMAT_MASK);
1678 
1679         return ret;
1680 }
1681 
1682 static int fsi_dai_hw_params(struct snd_pcm_substream *substream,
1683                              struct snd_pcm_hw_params *params,
1684                              struct snd_soc_dai *dai)
1685 {
1686         struct fsi_priv *fsi = fsi_get_priv(substream);
1687 
1688         if (fsi_is_clk_master(fsi))
1689                 fsi_clk_valid(fsi, params_rate(params));
1690 
1691         return 0;
1692 }
1693 
1694 static const struct snd_soc_dai_ops fsi_dai_ops = {
1695         .startup        = fsi_dai_startup,
1696         .shutdown       = fsi_dai_shutdown,
1697         .trigger        = fsi_dai_trigger,
1698         .set_fmt        = fsi_dai_set_fmt,
1699         .hw_params      = fsi_dai_hw_params,
1700 };
1701 
1702 /*
1703  *              pcm ops
1704  */
1705 
1706 static struct snd_pcm_hardware fsi_pcm_hardware = {
1707         .info =         SNDRV_PCM_INFO_INTERLEAVED      |
1708                         SNDRV_PCM_INFO_MMAP             |
1709                         SNDRV_PCM_INFO_MMAP_VALID       |
1710                         SNDRV_PCM_INFO_PAUSE,
1711         .buffer_bytes_max       = 64 * 1024,
1712         .period_bytes_min       = 32,
1713         .period_bytes_max       = 8192,
1714         .periods_min            = 1,
1715         .periods_max            = 32,
1716         .fifo_size              = 256,
1717 };
1718 
1719 static int fsi_pcm_open(struct snd_pcm_substream *substream)
1720 {
1721         struct snd_pcm_runtime *runtime = substream->runtime;
1722         int ret = 0;
1723 
1724         snd_soc_set_runtime_hwparams(substream, &fsi_pcm_hardware);
1725 
1726         ret = snd_pcm_hw_constraint_integer(runtime,
1727                                             SNDRV_PCM_HW_PARAM_PERIODS);
1728 
1729         return ret;
1730 }
1731 
1732 static int fsi_hw_params(struct snd_pcm_substream *substream,
1733                          struct snd_pcm_hw_params *hw_params)
1734 {
1735         return snd_pcm_lib_malloc_pages(substream,
1736                                         params_buffer_bytes(hw_params));
1737 }
1738 
1739 static int fsi_hw_free(struct snd_pcm_substream *substream)
1740 {
1741         return snd_pcm_lib_free_pages(substream);
1742 }
1743 
1744 static snd_pcm_uframes_t fsi_pointer(struct snd_pcm_substream *substream)
1745 {
1746         struct fsi_priv *fsi = fsi_get_priv(substream);
1747         struct fsi_stream *io = fsi_stream_get(fsi, substream);
1748 
1749         return fsi_sample2frame(fsi, io->buff_sample_pos);
1750 }
1751 
1752 static struct snd_pcm_ops fsi_pcm_ops = {
1753         .open           = fsi_pcm_open,
1754         .ioctl          = snd_pcm_lib_ioctl,
1755         .hw_params      = fsi_hw_params,
1756         .hw_free        = fsi_hw_free,
1757         .pointer        = fsi_pointer,
1758 };
1759 
1760 /*
1761  *              snd_soc_platform
1762  */
1763 
1764 #define PREALLOC_BUFFER         (32 * 1024)
1765 #define PREALLOC_BUFFER_MAX     (32 * 1024)
1766 
1767 static void fsi_pcm_free(struct snd_pcm *pcm)
1768 {
1769         snd_pcm_lib_preallocate_free_for_all(pcm);
1770 }
1771 
1772 static int fsi_pcm_new(struct snd_soc_pcm_runtime *rtd)
1773 {
1774         return snd_pcm_lib_preallocate_pages_for_all(
1775                 rtd->pcm,
1776                 SNDRV_DMA_TYPE_DEV,
1777                 rtd->card->snd_card->dev,
1778                 PREALLOC_BUFFER, PREALLOC_BUFFER_MAX);
1779 }
1780 
1781 /*
1782  *              alsa struct
1783  */
1784 
1785 static struct snd_soc_dai_driver fsi_soc_dai[] = {
1786         {
1787                 .name                   = "fsia-dai",
1788                 .playback = {
1789                         .rates          = FSI_RATES,
1790                         .formats        = FSI_FMTS,
1791                         .channels_min   = 2,
1792                         .channels_max   = 2,
1793                 },
1794                 .capture = {
1795                         .rates          = FSI_RATES,
1796                         .formats        = FSI_FMTS,
1797                         .channels_min   = 2,
1798                         .channels_max   = 2,
1799                 },
1800                 .ops = &fsi_dai_ops,
1801         },
1802         {
1803                 .name                   = "fsib-dai",
1804                 .playback = {
1805                         .rates          = FSI_RATES,
1806                         .formats        = FSI_FMTS,
1807                         .channels_min   = 2,
1808                         .channels_max   = 2,
1809                 },
1810                 .capture = {
1811                         .rates          = FSI_RATES,
1812                         .formats        = FSI_FMTS,
1813                         .channels_min   = 2,
1814                         .channels_max   = 2,
1815                 },
1816                 .ops = &fsi_dai_ops,
1817         },
1818 };
1819 
1820 static struct snd_soc_platform_driver fsi_soc_platform = {
1821         .ops            = &fsi_pcm_ops,
1822         .pcm_new        = fsi_pcm_new,
1823         .pcm_free       = fsi_pcm_free,
1824 };
1825 
1826 static const struct snd_soc_component_driver fsi_soc_component = {
1827         .name           = "fsi",
1828 };
1829 
1830 /*
1831  *              platform function
1832  */
1833 static void fsi_of_parse(char *name,
1834                          struct device_node *np,
1835                          struct sh_fsi_port_info *info,
1836                          struct device *dev)
1837 {
1838         int i;
1839         char prop[128];
1840         unsigned long flags = 0;
1841         struct {
1842                 char *name;
1843                 unsigned int val;
1844         } of_parse_property[] = {
1845                 { "spdif-connection",           SH_FSI_FMT_SPDIF },
1846                 { "stream-mode-support",        SH_FSI_ENABLE_STREAM_MODE },
1847                 { "use-internal-clock",         SH_FSI_CLK_CPG },
1848         };
1849 
1850         for (i = 0; i < ARRAY_SIZE(of_parse_property); i++) {
1851                 sprintf(prop, "%s,%s", name, of_parse_property[i].name);
1852                 if (of_get_property(np, prop, NULL))
1853                         flags |= of_parse_property[i].val;
1854         }
1855         info->flags = flags;
1856 
1857         dev_dbg(dev, "%s flags : %lx\n", name, info->flags);
1858 }
1859 
1860 static void fsi_port_info_init(struct fsi_priv *fsi,
1861                                struct sh_fsi_port_info *info)
1862 {
1863         if (info->flags & SH_FSI_FMT_SPDIF)
1864                 fsi->spdif = 1;
1865 
1866         if (info->flags & SH_FSI_CLK_CPG)
1867                 fsi->clk_cpg = 1;
1868 
1869         if (info->flags & SH_FSI_ENABLE_STREAM_MODE)
1870                 fsi->enable_stream = 1;
1871 }
1872 
1873 static void fsi_handler_init(struct fsi_priv *fsi,
1874                              struct sh_fsi_port_info *info)
1875 {
1876         fsi->playback.handler   = &fsi_pio_push_handler; /* default PIO */
1877         fsi->playback.priv      = fsi;
1878         fsi->capture.handler    = &fsi_pio_pop_handler;  /* default PIO */
1879         fsi->capture.priv       = fsi;
1880 
1881         if (info->tx_id) {
1882                 fsi->playback.dma_id  = info->tx_id;
1883                 fsi->playback.handler = &fsi_dma_push_handler;
1884         }
1885 }
1886 
1887 static struct of_device_id fsi_of_match[];
1888 static int fsi_probe(struct platform_device *pdev)
1889 {
1890         struct fsi_master *master;
1891         struct device_node *np = pdev->dev.of_node;
1892         struct sh_fsi_platform_info info;
1893         const struct fsi_core *core;
1894         struct fsi_priv *fsi;
1895         struct resource *res;
1896         unsigned int irq;
1897         int ret;
1898 
1899         memset(&info, 0, sizeof(info));
1900 
1901         core = NULL;
1902         if (np) {
1903                 const struct of_device_id *of_id;
1904 
1905                 of_id = of_match_device(fsi_of_match, &pdev->dev);
1906                 if (of_id) {
1907                         core = of_id->data;
1908                         fsi_of_parse("fsia", np, &info.port_a, &pdev->dev);
1909                         fsi_of_parse("fsib", np, &info.port_b, &pdev->dev);
1910                 }
1911         } else {
1912                 const struct platform_device_id *id_entry = pdev->id_entry;
1913                 if (id_entry)
1914                         core = (struct fsi_core *)id_entry->driver_data;
1915 
1916                 if (pdev->dev.platform_data)
1917                         memcpy(&info, pdev->dev.platform_data, sizeof(info));
1918         }
1919 
1920         if (!core) {
1921                 dev_err(&pdev->dev, "unknown fsi device\n");
1922                 return -ENODEV;
1923         }
1924 
1925         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1926         irq = platform_get_irq(pdev, 0);
1927         if (!res || (int)irq <= 0) {
1928                 dev_err(&pdev->dev, "Not enough FSI platform resources.\n");
1929                 return -ENODEV;
1930         }
1931 
1932         master = devm_kzalloc(&pdev->dev, sizeof(*master), GFP_KERNEL);
1933         if (!master) {
1934                 dev_err(&pdev->dev, "Could not allocate master\n");
1935                 return -ENOMEM;
1936         }
1937 
1938         master->base = devm_ioremap_nocache(&pdev->dev,
1939                                             res->start, resource_size(res));
1940         if (!master->base) {
1941                 dev_err(&pdev->dev, "Unable to ioremap FSI registers.\n");
1942                 return -ENXIO;
1943         }
1944 
1945         /* master setting */
1946         master->core            = core;
1947         spin_lock_init(&master->lock);
1948 
1949         /* FSI A setting */
1950         fsi             = &master->fsia;
1951         fsi->base       = master->base;
1952         fsi->master     = master;
1953         fsi_port_info_init(fsi, &info.port_a);
1954         fsi_handler_init(fsi, &info.port_a);
1955         ret = fsi_stream_probe(fsi, &pdev->dev);
1956         if (ret < 0) {
1957                 dev_err(&pdev->dev, "FSIA stream probe failed\n");
1958                 return ret;
1959         }
1960 
1961         /* FSI B setting */
1962         fsi             = &master->fsib;
1963         fsi->base       = master->base + 0x40;
1964         fsi->master     = master;
1965         fsi_port_info_init(fsi, &info.port_b);
1966         fsi_handler_init(fsi, &info.port_b);
1967         ret = fsi_stream_probe(fsi, &pdev->dev);
1968         if (ret < 0) {
1969                 dev_err(&pdev->dev, "FSIB stream probe failed\n");
1970                 goto exit_fsia;
1971         }
1972 
1973         pm_runtime_enable(&pdev->dev);
1974         dev_set_drvdata(&pdev->dev, master);
1975 
1976         ret = devm_request_irq(&pdev->dev, irq, &fsi_interrupt, 0,
1977                                dev_name(&pdev->dev), master);
1978         if (ret) {
1979                 dev_err(&pdev->dev, "irq request err\n");
1980                 goto exit_fsib;
1981         }
1982 
1983         ret = snd_soc_register_platform(&pdev->dev, &fsi_soc_platform);
1984         if (ret < 0) {
1985                 dev_err(&pdev->dev, "cannot snd soc register\n");
1986                 goto exit_fsib;
1987         }
1988 
1989         ret = snd_soc_register_component(&pdev->dev, &fsi_soc_component,
1990                                     fsi_soc_dai, ARRAY_SIZE(fsi_soc_dai));
1991         if (ret < 0) {
1992                 dev_err(&pdev->dev, "cannot snd component register\n");
1993                 goto exit_snd_soc;
1994         }
1995 
1996         return ret;
1997 
1998 exit_snd_soc:
1999         snd_soc_unregister_platform(&pdev->dev);
2000 exit_fsib:
2001         pm_runtime_disable(&pdev->dev);
2002         fsi_stream_remove(&master->fsib);
2003 exit_fsia:
2004         fsi_stream_remove(&master->fsia);
2005 
2006         return ret;
2007 }
2008 
2009 static int fsi_remove(struct platform_device *pdev)
2010 {
2011         struct fsi_master *master;
2012 
2013         master = dev_get_drvdata(&pdev->dev);
2014 
2015         pm_runtime_disable(&pdev->dev);
2016 
2017         snd_soc_unregister_component(&pdev->dev);
2018         snd_soc_unregister_platform(&pdev->dev);
2019 
2020         fsi_stream_remove(&master->fsia);
2021         fsi_stream_remove(&master->fsib);
2022 
2023         return 0;
2024 }
2025 
2026 static void __fsi_suspend(struct fsi_priv *fsi,
2027                           struct fsi_stream *io,
2028                           struct device *dev)
2029 {
2030         if (!fsi_stream_is_working(fsi, io))
2031                 return;
2032 
2033         fsi_stream_stop(fsi, io);
2034         fsi_hw_shutdown(fsi, dev);
2035 }
2036 
2037 static void __fsi_resume(struct fsi_priv *fsi,
2038                          struct fsi_stream *io,
2039                          struct device *dev)
2040 {
2041         if (!fsi_stream_is_working(fsi, io))
2042                 return;
2043 
2044         fsi_hw_startup(fsi, io, dev);
2045         fsi_stream_start(fsi, io);
2046 }
2047 
2048 static int fsi_suspend(struct device *dev)
2049 {
2050         struct fsi_master *master = dev_get_drvdata(dev);
2051         struct fsi_priv *fsia = &master->fsia;
2052         struct fsi_priv *fsib = &master->fsib;
2053 
2054         __fsi_suspend(fsia, &fsia->playback, dev);
2055         __fsi_suspend(fsia, &fsia->capture, dev);
2056 
2057         __fsi_suspend(fsib, &fsib->playback, dev);
2058         __fsi_suspend(fsib, &fsib->capture, dev);
2059 
2060         return 0;
2061 }
2062 
2063 static int fsi_resume(struct device *dev)
2064 {
2065         struct fsi_master *master = dev_get_drvdata(dev);
2066         struct fsi_priv *fsia = &master->fsia;
2067         struct fsi_priv *fsib = &master->fsib;
2068 
2069         __fsi_resume(fsia, &fsia->playback, dev);
2070         __fsi_resume(fsia, &fsia->capture, dev);
2071 
2072         __fsi_resume(fsib, &fsib->playback, dev);
2073         __fsi_resume(fsib, &fsib->capture, dev);
2074 
2075         return 0;
2076 }
2077 
2078 static struct dev_pm_ops fsi_pm_ops = {
2079         .suspend                = fsi_suspend,
2080         .resume                 = fsi_resume,
2081 };
2082 
2083 static struct fsi_core fsi1_core = {
2084         .ver    = 1,
2085 
2086         /* Interrupt */
2087         .int_st = INT_ST,
2088         .iemsk  = IEMSK,
2089         .imsk   = IMSK,
2090 };
2091 
2092 static struct fsi_core fsi2_core = {
2093         .ver    = 2,
2094 
2095         /* Interrupt */
2096         .int_st = CPU_INT_ST,
2097         .iemsk  = CPU_IEMSK,
2098         .imsk   = CPU_IMSK,
2099         .a_mclk = A_MST_CTLR,
2100         .b_mclk = B_MST_CTLR,
2101 };
2102 
2103 static struct of_device_id fsi_of_match[] = {
2104         { .compatible = "renesas,sh_fsi",       .data = &fsi1_core},
2105         { .compatible = "renesas,sh_fsi2",      .data = &fsi2_core},
2106         {},
2107 };
2108 MODULE_DEVICE_TABLE(of, fsi_of_match);
2109 
2110 static struct platform_device_id fsi_id_table[] = {
2111         { "sh_fsi",     (kernel_ulong_t)&fsi1_core },
2112         { "sh_fsi2",    (kernel_ulong_t)&fsi2_core },
2113         {},
2114 };
2115 MODULE_DEVICE_TABLE(platform, fsi_id_table);
2116 
2117 static struct platform_driver fsi_driver = {
2118         .driver         = {
2119                 .name   = "fsi-pcm-audio",
2120                 .pm     = &fsi_pm_ops,
2121                 .of_match_table = fsi_of_match,
2122         },
2123         .probe          = fsi_probe,
2124         .remove         = fsi_remove,
2125         .id_table       = fsi_id_table,
2126 };
2127 
2128 module_platform_driver(fsi_driver);
2129 
2130 MODULE_LICENSE("GPL");
2131 MODULE_DESCRIPTION("SuperH onchip FSI audio driver");
2132 MODULE_AUTHOR("Kuninori Morimoto <morimoto.kuninori@renesas.com>");
2133 MODULE_ALIAS("platform:fsi-pcm-audio");
2134 

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