Version:  2.0.40 2.2.26 2.4.37 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16

Linux/sound/soc/samsung/i2s.c

  1 /* sound/soc/samsung/i2s.c
  2  *
  3  * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4  *
  5  * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6  *      Jaswinder Singh <jassisinghbrar@gmail.com>
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License version 2 as
 10  * published by the Free Software Foundation.
 11  */
 12 
 13 #include <linux/delay.h>
 14 #include <linux/slab.h>
 15 #include <linux/clk.h>
 16 #include <linux/io.h>
 17 #include <linux/module.h>
 18 #include <linux/of.h>
 19 #include <linux/of_gpio.h>
 20 #include <linux/pm_runtime.h>
 21 
 22 #include <sound/soc.h>
 23 #include <sound/pcm_params.h>
 24 
 25 #include <linux/platform_data/asoc-s3c.h>
 26 
 27 #include "dma.h"
 28 #include "idma.h"
 29 #include "i2s.h"
 30 #include "i2s-regs.h"
 31 
 32 #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
 33 
 34 enum samsung_dai_type {
 35         TYPE_PRI,
 36         TYPE_SEC,
 37 };
 38 
 39 struct samsung_i2s_dai_data {
 40         int dai_type;
 41         u32 quirks;
 42 };
 43 
 44 struct i2s_dai {
 45         /* Platform device for this DAI */
 46         struct platform_device *pdev;
 47         /* IOREMAP'd SFRs */
 48         void __iomem    *addr;
 49         /* Physical base address of SFRs */
 50         u32     base;
 51         /* Rate of RCLK source clock */
 52         unsigned long rclk_srcrate;
 53         /* Frame Clock */
 54         unsigned frmclk;
 55         /*
 56          * Specifically requested RCLK,BCLK by MACHINE Driver.
 57          * 0 indicates CPU driver is free to choose any value.
 58          */
 59         unsigned rfs, bfs;
 60         /* I2S Controller's core clock */
 61         struct clk *clk;
 62         /* Clock for generating I2S signals */
 63         struct clk *op_clk;
 64         /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
 65         struct i2s_dai *pri_dai;
 66         /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
 67         struct i2s_dai *sec_dai;
 68 #define DAI_OPENED      (1 << 0) /* Dai is opened */
 69 #define DAI_MANAGER     (1 << 1) /* Dai is the manager */
 70         unsigned mode;
 71         /* Driver for this DAI */
 72         struct snd_soc_dai_driver i2s_dai_drv;
 73         /* DMA parameters */
 74         struct s3c_dma_params dma_playback;
 75         struct s3c_dma_params dma_capture;
 76         struct s3c_dma_params idma_playback;
 77         u32     quirks;
 78         u32     suspend_i2smod;
 79         u32     suspend_i2scon;
 80         u32     suspend_i2spsr;
 81         unsigned long gpios[7]; /* i2s gpio line numbers */
 82 };
 83 
 84 /* Lock for cross i/f checks */
 85 static DEFINE_SPINLOCK(lock);
 86 
 87 /* If this is the 'overlay' stereo DAI */
 88 static inline bool is_secondary(struct i2s_dai *i2s)
 89 {
 90         return i2s->pri_dai ? true : false;
 91 }
 92 
 93 /* If operating in SoC-Slave mode */
 94 static inline bool is_slave(struct i2s_dai *i2s)
 95 {
 96         return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
 97 }
 98 
 99 /* If this interface of the controller is transmitting data */
100 static inline bool tx_active(struct i2s_dai *i2s)
101 {
102         u32 active;
103 
104         if (!i2s)
105                 return false;
106 
107         active = readl(i2s->addr + I2SCON);
108 
109         if (is_secondary(i2s))
110                 active &= CON_TXSDMA_ACTIVE;
111         else
112                 active &= CON_TXDMA_ACTIVE;
113 
114         return active ? true : false;
115 }
116 
117 /* If the other interface of the controller is transmitting data */
118 static inline bool other_tx_active(struct i2s_dai *i2s)
119 {
120         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
121 
122         return tx_active(other);
123 }
124 
125 /* If any interface of the controller is transmitting data */
126 static inline bool any_tx_active(struct i2s_dai *i2s)
127 {
128         return tx_active(i2s) || other_tx_active(i2s);
129 }
130 
131 /* If this interface of the controller is receiving data */
132 static inline bool rx_active(struct i2s_dai *i2s)
133 {
134         u32 active;
135 
136         if (!i2s)
137                 return false;
138 
139         active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
140 
141         return active ? true : false;
142 }
143 
144 /* If the other interface of the controller is receiving data */
145 static inline bool other_rx_active(struct i2s_dai *i2s)
146 {
147         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
148 
149         return rx_active(other);
150 }
151 
152 /* If any interface of the controller is receiving data */
153 static inline bool any_rx_active(struct i2s_dai *i2s)
154 {
155         return rx_active(i2s) || other_rx_active(i2s);
156 }
157 
158 /* If the other DAI is transmitting or receiving data */
159 static inline bool other_active(struct i2s_dai *i2s)
160 {
161         return other_rx_active(i2s) || other_tx_active(i2s);
162 }
163 
164 /* If this DAI is transmitting or receiving data */
165 static inline bool this_active(struct i2s_dai *i2s)
166 {
167         return tx_active(i2s) || rx_active(i2s);
168 }
169 
170 /* If the controller is active anyway */
171 static inline bool any_active(struct i2s_dai *i2s)
172 {
173         return this_active(i2s) || other_active(i2s);
174 }
175 
176 static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
177 {
178         return snd_soc_dai_get_drvdata(dai);
179 }
180 
181 static inline bool is_opened(struct i2s_dai *i2s)
182 {
183         if (i2s && (i2s->mode & DAI_OPENED))
184                 return true;
185         else
186                 return false;
187 }
188 
189 static inline bool is_manager(struct i2s_dai *i2s)
190 {
191         if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
192                 return true;
193         else
194                 return false;
195 }
196 
197 /* Read RCLK of I2S (in multiples of LRCLK) */
198 static inline unsigned get_rfs(struct i2s_dai *i2s)
199 {
200         u32 rfs;
201 
202         if (i2s->quirks & QUIRK_SUPPORTS_TDM)
203                 rfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_RCLK_SHIFT;
204         else
205                 rfs = (readl(i2s->addr + I2SMOD) >> MOD_RCLK_SHIFT);
206         rfs &= MOD_RCLK_MASK;
207 
208         switch (rfs) {
209         case 3: return 768;
210         case 2: return 384;
211         case 1: return 512;
212         default: return 256;
213         }
214 }
215 
216 /* Write RCLK of I2S (in multiples of LRCLK) */
217 static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
218 {
219         u32 mod = readl(i2s->addr + I2SMOD);
220         int rfs_shift;
221 
222         if (i2s->quirks & QUIRK_SUPPORTS_TDM)
223                 rfs_shift = EXYNOS5420_MOD_RCLK_SHIFT;
224         else
225                 rfs_shift = MOD_RCLK_SHIFT;
226         mod &= ~(MOD_RCLK_MASK << rfs_shift);
227 
228         switch (rfs) {
229         case 768:
230                 mod |= (MOD_RCLK_768FS << rfs_shift);
231                 break;
232         case 512:
233                 mod |= (MOD_RCLK_512FS << rfs_shift);
234                 break;
235         case 384:
236                 mod |= (MOD_RCLK_384FS << rfs_shift);
237                 break;
238         default:
239                 mod |= (MOD_RCLK_256FS << rfs_shift);
240                 break;
241         }
242 
243         writel(mod, i2s->addr + I2SMOD);
244 }
245 
246 /* Read Bit-Clock of I2S (in multiples of LRCLK) */
247 static inline unsigned get_bfs(struct i2s_dai *i2s)
248 {
249         u32 bfs;
250 
251         if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
252                 bfs = readl(i2s->addr + I2SMOD) >> EXYNOS5420_MOD_BCLK_SHIFT;
253                 bfs &= EXYNOS5420_MOD_BCLK_MASK;
254         } else {
255                 bfs =  readl(i2s->addr + I2SMOD) >> MOD_BCLK_SHIFT;
256                 bfs &= MOD_BCLK_MASK;
257         }
258 
259         switch (bfs) {
260         case 8: return 256;
261         case 7: return 192;
262         case 6: return 128;
263         case 5: return 96;
264         case 4: return 64;
265         case 3: return 24;
266         case 2: return 16;
267         case 1: return 48;
268         default: return 32;
269         }
270 }
271 
272 /* Write Bit-Clock of I2S (in multiples of LRCLK) */
273 static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
274 {
275         u32 mod = readl(i2s->addr + I2SMOD);
276         int bfs_shift;
277         int tdm = i2s->quirks & QUIRK_SUPPORTS_TDM;
278 
279         if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
280                 bfs_shift = EXYNOS5420_MOD_BCLK_SHIFT;
281                 mod &= ~(EXYNOS5420_MOD_BCLK_MASK << bfs_shift);
282         } else {
283                 bfs_shift = MOD_BCLK_SHIFT;
284                 mod &= ~(MOD_BCLK_MASK << bfs_shift);
285         }
286 
287         /* Non-TDM I2S controllers do not support BCLK > 48 * FS */
288         if (!tdm && bfs > 48) {
289                 dev_err(&i2s->pdev->dev, "Unsupported BCLK divider\n");
290                 return;
291         }
292 
293         switch (bfs) {
294         case 48:
295                 mod |= (MOD_BCLK_48FS << bfs_shift);
296                 break;
297         case 32:
298                 mod |= (MOD_BCLK_32FS << bfs_shift);
299                 break;
300         case 24:
301                 mod |= (MOD_BCLK_24FS << bfs_shift);
302                 break;
303         case 16:
304                 mod |= (MOD_BCLK_16FS << bfs_shift);
305                 break;
306         case 64:
307                 mod |= (EXYNOS5420_MOD_BCLK_64FS << bfs_shift);
308                 break;
309         case 96:
310                 mod |= (EXYNOS5420_MOD_BCLK_96FS << bfs_shift);
311                 break;
312         case 128:
313                 mod |= (EXYNOS5420_MOD_BCLK_128FS << bfs_shift);
314                 break;
315         case 192:
316                 mod |= (EXYNOS5420_MOD_BCLK_192FS << bfs_shift);
317                 break;
318         case 256:
319                 mod |= (EXYNOS5420_MOD_BCLK_256FS << bfs_shift);
320                 break;
321         default:
322                 dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
323                 return;
324         }
325 
326         writel(mod, i2s->addr + I2SMOD);
327 }
328 
329 /* Sample-Size */
330 static inline int get_blc(struct i2s_dai *i2s)
331 {
332         int blc = readl(i2s->addr + I2SMOD);
333 
334         blc = (blc >> 13) & 0x3;
335 
336         switch (blc) {
337         case 2: return 24;
338         case 1: return 8;
339         default: return 16;
340         }
341 }
342 
343 /* TX Channel Control */
344 static void i2s_txctrl(struct i2s_dai *i2s, int on)
345 {
346         void __iomem *addr = i2s->addr;
347         u32 con = readl(addr + I2SCON);
348         u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
349 
350         if (on) {
351                 con |= CON_ACTIVE;
352                 con &= ~CON_TXCH_PAUSE;
353 
354                 if (is_secondary(i2s)) {
355                         con |= CON_TXSDMA_ACTIVE;
356                         con &= ~CON_TXSDMA_PAUSE;
357                 } else {
358                         con |= CON_TXDMA_ACTIVE;
359                         con &= ~CON_TXDMA_PAUSE;
360                 }
361 
362                 if (any_rx_active(i2s))
363                         mod |= MOD_TXRX;
364                 else
365                         mod |= MOD_TXONLY;
366         } else {
367                 if (is_secondary(i2s)) {
368                         con |=  CON_TXSDMA_PAUSE;
369                         con &= ~CON_TXSDMA_ACTIVE;
370                 } else {
371                         con |=  CON_TXDMA_PAUSE;
372                         con &= ~CON_TXDMA_ACTIVE;
373                 }
374 
375                 if (other_tx_active(i2s)) {
376                         writel(con, addr + I2SCON);
377                         return;
378                 }
379 
380                 con |=  CON_TXCH_PAUSE;
381 
382                 if (any_rx_active(i2s))
383                         mod |= MOD_RXONLY;
384                 else
385                         con &= ~CON_ACTIVE;
386         }
387 
388         writel(mod, addr + I2SMOD);
389         writel(con, addr + I2SCON);
390 }
391 
392 /* RX Channel Control */
393 static void i2s_rxctrl(struct i2s_dai *i2s, int on)
394 {
395         void __iomem *addr = i2s->addr;
396         u32 con = readl(addr + I2SCON);
397         u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
398 
399         if (on) {
400                 con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
401                 con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
402 
403                 if (any_tx_active(i2s))
404                         mod |= MOD_TXRX;
405                 else
406                         mod |= MOD_RXONLY;
407         } else {
408                 con |=  CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
409                 con &= ~CON_RXDMA_ACTIVE;
410 
411                 if (any_tx_active(i2s))
412                         mod |= MOD_TXONLY;
413                 else
414                         con &= ~CON_ACTIVE;
415         }
416 
417         writel(mod, addr + I2SMOD);
418         writel(con, addr + I2SCON);
419 }
420 
421 /* Flush FIFO of an interface */
422 static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
423 {
424         void __iomem *fic;
425         u32 val;
426 
427         if (!i2s)
428                 return;
429 
430         if (is_secondary(i2s))
431                 fic = i2s->addr + I2SFICS;
432         else
433                 fic = i2s->addr + I2SFIC;
434 
435         /* Flush the FIFO */
436         writel(readl(fic) | flush, fic);
437 
438         /* Be patient */
439         val = msecs_to_loops(1) / 1000; /* 1 usec */
440         while (--val)
441                 cpu_relax();
442 
443         writel(readl(fic) & ~flush, fic);
444 }
445 
446 static int i2s_set_sysclk(struct snd_soc_dai *dai,
447           int clk_id, unsigned int rfs, int dir)
448 {
449         struct i2s_dai *i2s = to_info(dai);
450         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
451         u32 mod = readl(i2s->addr + I2SMOD);
452 
453         switch (clk_id) {
454         case SAMSUNG_I2S_OPCLK:
455                 mod &= ~MOD_OPCLK_MASK;
456                 mod |= dir;
457                 break;
458         case SAMSUNG_I2S_CDCLK:
459                 /* Shouldn't matter in GATING(CLOCK_IN) mode */
460                 if (dir == SND_SOC_CLOCK_IN)
461                         rfs = 0;
462 
463                 if ((rfs && other->rfs && (other->rfs != rfs)) ||
464                                 (any_active(i2s) &&
465                                 (((dir == SND_SOC_CLOCK_IN)
466                                         && !(mod & MOD_CDCLKCON)) ||
467                                 ((dir == SND_SOC_CLOCK_OUT)
468                                         && (mod & MOD_CDCLKCON))))) {
469                         dev_err(&i2s->pdev->dev,
470                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
471                         return -EAGAIN;
472                 }
473 
474                 if (dir == SND_SOC_CLOCK_IN)
475                         mod |= MOD_CDCLKCON;
476                 else
477                         mod &= ~MOD_CDCLKCON;
478 
479                 i2s->rfs = rfs;
480                 break;
481 
482         case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
483         case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
484                 if ((i2s->quirks & QUIRK_NO_MUXPSR)
485                                 || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
486                         clk_id = 0;
487                 else
488                         clk_id = 1;
489 
490                 if (!any_active(i2s)) {
491                         if (i2s->op_clk && !IS_ERR(i2s->op_clk)) {
492                                 if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
493                                         (!clk_id && (mod & MOD_IMS_SYSMUX))) {
494                                         clk_disable_unprepare(i2s->op_clk);
495                                         clk_put(i2s->op_clk);
496                                 } else {
497                                         i2s->rclk_srcrate =
498                                                 clk_get_rate(i2s->op_clk);
499                                         return 0;
500                                 }
501                         }
502 
503                         if (clk_id)
504                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
505                                                 "i2s_opclk1");
506                         else
507                                 i2s->op_clk = clk_get(&i2s->pdev->dev,
508                                                 "i2s_opclk0");
509 
510                         if (WARN_ON(IS_ERR(i2s->op_clk)))
511                                 return PTR_ERR(i2s->op_clk);
512 
513                         clk_prepare_enable(i2s->op_clk);
514                         i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
515 
516                         /* Over-ride the other's */
517                         if (other) {
518                                 other->op_clk = i2s->op_clk;
519                                 other->rclk_srcrate = i2s->rclk_srcrate;
520                         }
521                 } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
522                                 || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
523                         dev_err(&i2s->pdev->dev,
524                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
525                         return -EAGAIN;
526                 } else {
527                         /* Call can't be on the active DAI */
528                         i2s->op_clk = other->op_clk;
529                         i2s->rclk_srcrate = other->rclk_srcrate;
530                         return 0;
531                 }
532 
533                 if (clk_id == 0)
534                         mod &= ~MOD_IMS_SYSMUX;
535                 else
536                         mod |= MOD_IMS_SYSMUX;
537                 break;
538 
539         default:
540                 dev_err(&i2s->pdev->dev, "We don't serve that!\n");
541                 return -EINVAL;
542         }
543 
544         writel(mod, i2s->addr + I2SMOD);
545 
546         return 0;
547 }
548 
549 static int i2s_set_fmt(struct snd_soc_dai *dai,
550         unsigned int fmt)
551 {
552         struct i2s_dai *i2s = to_info(dai);
553         u32 mod = readl(i2s->addr + I2SMOD);
554         int lrp_shift, sdf_shift, sdf_mask, lrp_rlow;
555         u32 tmp = 0;
556 
557         if (i2s->quirks & QUIRK_SUPPORTS_TDM) {
558                 lrp_shift = EXYNOS5420_MOD_LRP_SHIFT;
559                 sdf_shift = EXYNOS5420_MOD_SDF_SHIFT;
560         } else {
561                 lrp_shift = MOD_LRP_SHIFT;
562                 sdf_shift = MOD_SDF_SHIFT;
563         }
564 
565         sdf_mask = MOD_SDF_MASK << sdf_shift;
566         lrp_rlow = MOD_LR_RLOW << lrp_shift;
567 
568         /* Format is priority */
569         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
570         case SND_SOC_DAIFMT_RIGHT_J:
571                 tmp |= lrp_rlow;
572                 tmp |= (MOD_SDF_MSB << sdf_shift);
573                 break;
574         case SND_SOC_DAIFMT_LEFT_J:
575                 tmp |= lrp_rlow;
576                 tmp |= (MOD_SDF_LSB << sdf_shift);
577                 break;
578         case SND_SOC_DAIFMT_I2S:
579                 tmp |= (MOD_SDF_IIS << sdf_shift);
580                 break;
581         default:
582                 dev_err(&i2s->pdev->dev, "Format not supported\n");
583                 return -EINVAL;
584         }
585 
586         /*
587          * INV flag is relative to the FORMAT flag - if set it simply
588          * flips the polarity specified by the Standard
589          */
590         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
591         case SND_SOC_DAIFMT_NB_NF:
592                 break;
593         case SND_SOC_DAIFMT_NB_IF:
594                 if (tmp & lrp_rlow)
595                         tmp &= ~lrp_rlow;
596                 else
597                         tmp |= lrp_rlow;
598                 break;
599         default:
600                 dev_err(&i2s->pdev->dev, "Polarity not supported\n");
601                 return -EINVAL;
602         }
603 
604         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
605         case SND_SOC_DAIFMT_CBM_CFM:
606                 tmp |= MOD_SLAVE;
607                 break;
608         case SND_SOC_DAIFMT_CBS_CFS:
609                 /* Set default source clock in Master mode */
610                 if (i2s->rclk_srcrate == 0)
611                         i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
612                                                         0, SND_SOC_CLOCK_IN);
613                 break;
614         default:
615                 dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
616                 return -EINVAL;
617         }
618 
619         /*
620          * Don't change the I2S mode if any controller is active on this
621          * channel.
622          */
623         if (any_active(i2s) &&
624                 ((mod & (sdf_mask | lrp_rlow | MOD_SLAVE)) != tmp)) {
625                 dev_err(&i2s->pdev->dev,
626                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
627                 return -EAGAIN;
628         }
629 
630         mod &= ~(sdf_mask | lrp_rlow | MOD_SLAVE);
631         mod |= tmp;
632         writel(mod, i2s->addr + I2SMOD);
633 
634         return 0;
635 }
636 
637 static int i2s_hw_params(struct snd_pcm_substream *substream,
638         struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
639 {
640         struct i2s_dai *i2s = to_info(dai);
641         u32 mod = readl(i2s->addr + I2SMOD);
642 
643         if (!is_secondary(i2s))
644                 mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
645 
646         switch (params_channels(params)) {
647         case 6:
648                 mod |= MOD_DC2_EN;
649         case 4:
650                 mod |= MOD_DC1_EN;
651                 break;
652         case 2:
653                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
654                         i2s->dma_playback.dma_size = 4;
655                 else
656                         i2s->dma_capture.dma_size = 4;
657                 break;
658         case 1:
659                 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
660                         i2s->dma_playback.dma_size = 2;
661                 else
662                         i2s->dma_capture.dma_size = 2;
663 
664                 break;
665         default:
666                 dev_err(&i2s->pdev->dev, "%d channels not supported\n",
667                                 params_channels(params));
668                 return -EINVAL;
669         }
670 
671         if (is_secondary(i2s))
672                 mod &= ~MOD_BLCS_MASK;
673         else
674                 mod &= ~MOD_BLCP_MASK;
675 
676         if (is_manager(i2s))
677                 mod &= ~MOD_BLC_MASK;
678 
679         switch (params_width(params)) {
680         case 8:
681                 if (is_secondary(i2s))
682                         mod |= MOD_BLCS_8BIT;
683                 else
684                         mod |= MOD_BLCP_8BIT;
685                 if (is_manager(i2s))
686                         mod |= MOD_BLC_8BIT;
687                 break;
688         case 16:
689                 if (is_secondary(i2s))
690                         mod |= MOD_BLCS_16BIT;
691                 else
692                         mod |= MOD_BLCP_16BIT;
693                 if (is_manager(i2s))
694                         mod |= MOD_BLC_16BIT;
695                 break;
696         case 24:
697                 if (is_secondary(i2s))
698                         mod |= MOD_BLCS_24BIT;
699                 else
700                         mod |= MOD_BLCP_24BIT;
701                 if (is_manager(i2s))
702                         mod |= MOD_BLC_24BIT;
703                 break;
704         default:
705                 dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
706                                 params_format(params));
707                 return -EINVAL;
708         }
709         writel(mod, i2s->addr + I2SMOD);
710 
711         samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
712 
713         i2s->frmclk = params_rate(params);
714 
715         return 0;
716 }
717 
718 /* We set constraints on the substream acc to the version of I2S */
719 static int i2s_startup(struct snd_pcm_substream *substream,
720           struct snd_soc_dai *dai)
721 {
722         struct i2s_dai *i2s = to_info(dai);
723         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
724         unsigned long flags;
725 
726         spin_lock_irqsave(&lock, flags);
727 
728         i2s->mode |= DAI_OPENED;
729 
730         if (is_manager(other))
731                 i2s->mode &= ~DAI_MANAGER;
732         else
733                 i2s->mode |= DAI_MANAGER;
734 
735         if (!any_active(i2s) && (i2s->quirks & QUIRK_NEED_RSTCLR))
736                 writel(CON_RSTCLR, i2s->addr + I2SCON);
737 
738         spin_unlock_irqrestore(&lock, flags);
739 
740         return 0;
741 }
742 
743 static void i2s_shutdown(struct snd_pcm_substream *substream,
744         struct snd_soc_dai *dai)
745 {
746         struct i2s_dai *i2s = to_info(dai);
747         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
748         unsigned long flags;
749 
750         spin_lock_irqsave(&lock, flags);
751 
752         i2s->mode &= ~DAI_OPENED;
753         i2s->mode &= ~DAI_MANAGER;
754 
755         if (is_opened(other))
756                 other->mode |= DAI_MANAGER;
757 
758         /* Reset any constraint on RFS and BFS */
759         i2s->rfs = 0;
760         i2s->bfs = 0;
761 
762         spin_unlock_irqrestore(&lock, flags);
763 
764         /* Gate CDCLK by default */
765         if (!is_opened(other))
766                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
767                                 0, SND_SOC_CLOCK_IN);
768 }
769 
770 static int config_setup(struct i2s_dai *i2s)
771 {
772         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
773         unsigned rfs, bfs, blc;
774         u32 psr;
775 
776         blc = get_blc(i2s);
777 
778         bfs = i2s->bfs;
779 
780         if (!bfs && other)
781                 bfs = other->bfs;
782 
783         /* Select least possible multiple(2) if no constraint set */
784         if (!bfs)
785                 bfs = blc * 2;
786 
787         rfs = i2s->rfs;
788 
789         if (!rfs && other)
790                 rfs = other->rfs;
791 
792         if ((rfs == 256 || rfs == 512) && (blc == 24)) {
793                 dev_err(&i2s->pdev->dev,
794                         "%d-RFS not supported for 24-blc\n", rfs);
795                 return -EINVAL;
796         }
797 
798         if (!rfs) {
799                 if (bfs == 16 || bfs == 32)
800                         rfs = 256;
801                 else
802                         rfs = 384;
803         }
804 
805         /* If already setup and running */
806         if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
807                 dev_err(&i2s->pdev->dev,
808                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
809                 return -EAGAIN;
810         }
811 
812         set_bfs(i2s, bfs);
813         set_rfs(i2s, rfs);
814 
815         /* Don't bother with PSR in Slave mode */
816         if (is_slave(i2s))
817                 return 0;
818 
819         if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
820                 psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
821                 writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
822                 dev_dbg(&i2s->pdev->dev,
823                         "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
824                                 i2s->rclk_srcrate, psr, rfs, bfs);
825         }
826 
827         return 0;
828 }
829 
830 static int i2s_trigger(struct snd_pcm_substream *substream,
831         int cmd, struct snd_soc_dai *dai)
832 {
833         int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
834         struct snd_soc_pcm_runtime *rtd = substream->private_data;
835         struct i2s_dai *i2s = to_info(rtd->cpu_dai);
836         unsigned long flags;
837 
838         switch (cmd) {
839         case SNDRV_PCM_TRIGGER_START:
840         case SNDRV_PCM_TRIGGER_RESUME:
841         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
842                 local_irq_save(flags);
843 
844                 if (config_setup(i2s)) {
845                         local_irq_restore(flags);
846                         return -EINVAL;
847                 }
848 
849                 if (capture)
850                         i2s_rxctrl(i2s, 1);
851                 else
852                         i2s_txctrl(i2s, 1);
853 
854                 local_irq_restore(flags);
855                 break;
856         case SNDRV_PCM_TRIGGER_STOP:
857         case SNDRV_PCM_TRIGGER_SUSPEND:
858         case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
859                 local_irq_save(flags);
860 
861                 if (capture) {
862                         i2s_rxctrl(i2s, 0);
863                         i2s_fifo(i2s, FIC_RXFLUSH);
864                 } else {
865                         i2s_txctrl(i2s, 0);
866                         i2s_fifo(i2s, FIC_TXFLUSH);
867                 }
868 
869                 local_irq_restore(flags);
870                 break;
871         }
872 
873         return 0;
874 }
875 
876 static int i2s_set_clkdiv(struct snd_soc_dai *dai,
877         int div_id, int div)
878 {
879         struct i2s_dai *i2s = to_info(dai);
880         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
881 
882         switch (div_id) {
883         case SAMSUNG_I2S_DIV_BCLK:
884                 if ((any_active(i2s) && div && (get_bfs(i2s) != div))
885                         || (other && other->bfs && (other->bfs != div))) {
886                         dev_err(&i2s->pdev->dev,
887                                 "%s:%d Other DAI busy\n", __func__, __LINE__);
888                         return -EAGAIN;
889                 }
890                 i2s->bfs = div;
891                 break;
892         default:
893                 dev_err(&i2s->pdev->dev,
894                         "Invalid clock divider(%d)\n", div_id);
895                 return -EINVAL;
896         }
897 
898         return 0;
899 }
900 
901 static snd_pcm_sframes_t
902 i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
903 {
904         struct i2s_dai *i2s = to_info(dai);
905         u32 reg = readl(i2s->addr + I2SFIC);
906         snd_pcm_sframes_t delay;
907 
908         if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
909                 delay = FIC_RXCOUNT(reg);
910         else if (is_secondary(i2s))
911                 delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
912         else
913                 delay = FIC_TXCOUNT(reg);
914 
915         return delay;
916 }
917 
918 #ifdef CONFIG_PM
919 static int i2s_suspend(struct snd_soc_dai *dai)
920 {
921         struct i2s_dai *i2s = to_info(dai);
922 
923         if (dai->active) {
924                 i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
925                 i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
926                 i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
927         }
928 
929         return 0;
930 }
931 
932 static int i2s_resume(struct snd_soc_dai *dai)
933 {
934         struct i2s_dai *i2s = to_info(dai);
935 
936         if (dai->active) {
937                 writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
938                 writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
939                 writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
940         }
941 
942         return 0;
943 }
944 #else
945 #define i2s_suspend NULL
946 #define i2s_resume  NULL
947 #endif
948 
949 static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
950 {
951         struct i2s_dai *i2s = to_info(dai);
952         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
953 
954         if (other && other->clk) { /* If this is probe on secondary */
955                 samsung_asoc_init_dma_data(dai, &other->sec_dai->dma_playback,
956                                            NULL);
957                 goto probe_exit;
958         }
959 
960         i2s->addr = ioremap(i2s->base, 0x100);
961         if (i2s->addr == NULL) {
962                 dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
963                 return -ENXIO;
964         }
965 
966         i2s->clk = clk_get(&i2s->pdev->dev, "iis");
967         if (IS_ERR(i2s->clk)) {
968                 dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
969                 iounmap(i2s->addr);
970                 return -ENOENT;
971         }
972         clk_prepare_enable(i2s->clk);
973 
974         samsung_asoc_init_dma_data(dai, &i2s->dma_playback, &i2s->dma_capture);
975 
976         if (other) {
977                 other->addr = i2s->addr;
978                 other->clk = i2s->clk;
979         }
980 
981         if (i2s->quirks & QUIRK_NEED_RSTCLR)
982                 writel(CON_RSTCLR, i2s->addr + I2SCON);
983 
984         if (i2s->quirks & QUIRK_SEC_DAI)
985                 idma_reg_addr_init(i2s->addr,
986                                         i2s->sec_dai->idma_playback.dma_addr);
987 
988 probe_exit:
989         /* Reset any constraint on RFS and BFS */
990         i2s->rfs = 0;
991         i2s->bfs = 0;
992         i2s->rclk_srcrate = 0;
993         i2s_txctrl(i2s, 0);
994         i2s_rxctrl(i2s, 0);
995         i2s_fifo(i2s, FIC_TXFLUSH);
996         i2s_fifo(other, FIC_TXFLUSH);
997         i2s_fifo(i2s, FIC_RXFLUSH);
998 
999         /* Gate CDCLK by default */
1000         if (!is_opened(other))
1001                 i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
1002                                 0, SND_SOC_CLOCK_IN);
1003 
1004         return 0;
1005 }
1006 
1007 static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
1008 {
1009         struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
1010         struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
1011 
1012         if (!other || !other->clk) {
1013 
1014                 if (i2s->quirks & QUIRK_NEED_RSTCLR)
1015                         writel(0, i2s->addr + I2SCON);
1016 
1017                 clk_disable_unprepare(i2s->clk);
1018                 clk_put(i2s->clk);
1019 
1020                 iounmap(i2s->addr);
1021         }
1022 
1023         i2s->clk = NULL;
1024 
1025         return 0;
1026 }
1027 
1028 static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
1029         .trigger = i2s_trigger,
1030         .hw_params = i2s_hw_params,
1031         .set_fmt = i2s_set_fmt,
1032         .set_clkdiv = i2s_set_clkdiv,
1033         .set_sysclk = i2s_set_sysclk,
1034         .startup = i2s_startup,
1035         .shutdown = i2s_shutdown,
1036         .delay = i2s_delay,
1037 };
1038 
1039 static const struct snd_soc_component_driver samsung_i2s_component = {
1040         .name           = "samsung-i2s",
1041 };
1042 
1043 #define SAMSUNG_I2S_RATES       SNDRV_PCM_RATE_8000_96000
1044 
1045 #define SAMSUNG_I2S_FMTS        (SNDRV_PCM_FMTBIT_S8 | \
1046                                         SNDRV_PCM_FMTBIT_S16_LE | \
1047                                         SNDRV_PCM_FMTBIT_S24_LE)
1048 
1049 static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
1050 {
1051         struct i2s_dai *i2s;
1052         int ret;
1053 
1054         i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
1055         if (i2s == NULL)
1056                 return NULL;
1057 
1058         i2s->pdev = pdev;
1059         i2s->pri_dai = NULL;
1060         i2s->sec_dai = NULL;
1061         i2s->i2s_dai_drv.symmetric_rates = 1;
1062         i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
1063         i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
1064         i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
1065         i2s->i2s_dai_drv.suspend = i2s_suspend;
1066         i2s->i2s_dai_drv.resume = i2s_resume;
1067         i2s->i2s_dai_drv.playback.channels_min = 1;
1068         i2s->i2s_dai_drv.playback.channels_max = 2;
1069         i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
1070         i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
1071 
1072         if (!sec) {
1073                 i2s->i2s_dai_drv.capture.channels_min = 1;
1074                 i2s->i2s_dai_drv.capture.channels_max = 2;
1075                 i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
1076                 i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
1077                 dev_set_drvdata(&i2s->pdev->dev, i2s);
1078         } else {        /* Create a new platform_device for Secondary */
1079                 i2s->pdev = platform_device_alloc("samsung-i2s-sec", -1);
1080                 if (!i2s->pdev)
1081                         return NULL;
1082 
1083                 i2s->pdev->dev.parent = &pdev->dev;
1084 
1085                 platform_set_drvdata(i2s->pdev, i2s);
1086                 ret = platform_device_add(i2s->pdev);
1087                 if (ret < 0)
1088                         return NULL;
1089         }
1090 
1091         return i2s;
1092 }
1093 
1094 static const struct of_device_id exynos_i2s_match[];
1095 
1096 static inline const struct samsung_i2s_dai_data *samsung_i2s_get_driver_data(
1097                                                 struct platform_device *pdev)
1098 {
1099 #ifdef CONFIG_OF
1100         if (pdev->dev.of_node) {
1101                 const struct of_device_id *match;
1102                 match = of_match_node(exynos_i2s_match, pdev->dev.of_node);
1103                 return match->data;
1104         } else
1105 #endif
1106                 return (struct samsung_i2s_dai_data *)
1107                                 platform_get_device_id(pdev)->driver_data;
1108 }
1109 
1110 #ifdef CONFIG_PM_RUNTIME
1111 static int i2s_runtime_suspend(struct device *dev)
1112 {
1113         struct i2s_dai *i2s = dev_get_drvdata(dev);
1114 
1115         clk_disable_unprepare(i2s->clk);
1116 
1117         return 0;
1118 }
1119 
1120 static int i2s_runtime_resume(struct device *dev)
1121 {
1122         struct i2s_dai *i2s = dev_get_drvdata(dev);
1123 
1124         clk_prepare_enable(i2s->clk);
1125 
1126         return 0;
1127 }
1128 #endif /* CONFIG_PM_RUNTIME */
1129 
1130 static int samsung_i2s_probe(struct platform_device *pdev)
1131 {
1132         struct i2s_dai *pri_dai, *sec_dai = NULL;
1133         struct s3c_audio_pdata *i2s_pdata = pdev->dev.platform_data;
1134         struct samsung_i2s *i2s_cfg = NULL;
1135         struct resource *res;
1136         u32 regs_base, quirks = 0, idma_addr = 0;
1137         struct device_node *np = pdev->dev.of_node;
1138         const struct samsung_i2s_dai_data *i2s_dai_data;
1139         int ret = 0;
1140 
1141         /* Call during Seconday interface registration */
1142         i2s_dai_data = samsung_i2s_get_driver_data(pdev);
1143 
1144         if (i2s_dai_data->dai_type == TYPE_SEC) {
1145                 sec_dai = dev_get_drvdata(&pdev->dev);
1146                 if (!sec_dai) {
1147                         dev_err(&pdev->dev, "Unable to get drvdata\n");
1148                         return -EFAULT;
1149                 }
1150                 devm_snd_soc_register_component(&sec_dai->pdev->dev,
1151                                                 &samsung_i2s_component,
1152                                                 &sec_dai->i2s_dai_drv, 1);
1153                 samsung_asoc_dma_platform_register(&pdev->dev);
1154                 return 0;
1155         }
1156 
1157         pri_dai = i2s_alloc_dai(pdev, false);
1158         if (!pri_dai) {
1159                 dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
1160                 return -ENOMEM;
1161         }
1162 
1163         if (!np) {
1164                 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1165                 if (!res) {
1166                         dev_err(&pdev->dev,
1167                                 "Unable to get I2S-TX dma resource\n");
1168                         return -ENXIO;
1169                 }
1170                 pri_dai->dma_playback.channel = res->start;
1171 
1172                 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1173                 if (!res) {
1174                         dev_err(&pdev->dev,
1175                                 "Unable to get I2S-RX dma resource\n");
1176                         return -ENXIO;
1177                 }
1178                 pri_dai->dma_capture.channel = res->start;
1179 
1180                 if (i2s_pdata == NULL) {
1181                         dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
1182                         return -EINVAL;
1183                 }
1184 
1185                 if (&i2s_pdata->type)
1186                         i2s_cfg = &i2s_pdata->type.i2s;
1187 
1188                 if (i2s_cfg) {
1189                         quirks = i2s_cfg->quirks;
1190                         idma_addr = i2s_cfg->idma_addr;
1191                 }
1192         } else {
1193                 quirks = i2s_dai_data->quirks;
1194                 if (of_property_read_u32(np, "samsung,idma-addr",
1195                                          &idma_addr)) {
1196                         if (quirks & QUIRK_SEC_DAI) {
1197                                 dev_err(&pdev->dev, "idma address is not"\
1198                                                 "specified");
1199                                 return -EINVAL;
1200                         }
1201                 }
1202         }
1203 
1204         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1205         if (!res) {
1206                 dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
1207                 return -ENXIO;
1208         }
1209 
1210         if (!request_mem_region(res->start, resource_size(res),
1211                                                         "samsung-i2s")) {
1212                 dev_err(&pdev->dev, "Unable to request SFR region\n");
1213                 return -EBUSY;
1214         }
1215         regs_base = res->start;
1216 
1217         pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
1218         pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
1219         pri_dai->dma_playback.client =
1220                 (struct s3c_dma_client *)&pri_dai->dma_playback;
1221         pri_dai->dma_playback.ch_name = "tx";
1222         pri_dai->dma_capture.client =
1223                 (struct s3c_dma_client *)&pri_dai->dma_capture;
1224         pri_dai->dma_capture.ch_name = "rx";
1225         pri_dai->dma_playback.dma_size = 4;
1226         pri_dai->dma_capture.dma_size = 4;
1227         pri_dai->base = regs_base;
1228         pri_dai->quirks = quirks;
1229 
1230         if (quirks & QUIRK_PRI_6CHAN)
1231                 pri_dai->i2s_dai_drv.playback.channels_max = 6;
1232 
1233         if (quirks & QUIRK_SEC_DAI) {
1234                 sec_dai = i2s_alloc_dai(pdev, true);
1235                 if (!sec_dai) {
1236                         dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
1237                         ret = -ENOMEM;
1238                         goto err;
1239                 }
1240                 sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
1241                 sec_dai->dma_playback.client =
1242                         (struct s3c_dma_client *)&sec_dai->dma_playback;
1243                 sec_dai->dma_playback.ch_name = "tx-sec";
1244 
1245                 if (!np) {
1246                         res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
1247                         if (res)
1248                                 sec_dai->dma_playback.channel = res->start;
1249                 }
1250 
1251                 sec_dai->dma_playback.dma_size = 4;
1252                 sec_dai->base = regs_base;
1253                 sec_dai->quirks = quirks;
1254                 sec_dai->idma_playback.dma_addr = idma_addr;
1255                 sec_dai->pri_dai = pri_dai;
1256                 pri_dai->sec_dai = sec_dai;
1257         }
1258 
1259         if (i2s_pdata && i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
1260                 dev_err(&pdev->dev, "Unable to configure gpio\n");
1261                 ret = -EINVAL;
1262                 goto err;
1263         }
1264 
1265         devm_snd_soc_register_component(&pri_dai->pdev->dev,
1266                                         &samsung_i2s_component,
1267                                         &pri_dai->i2s_dai_drv, 1);
1268 
1269         pm_runtime_enable(&pdev->dev);
1270 
1271         samsung_asoc_dma_platform_register(&pdev->dev);
1272 
1273         return 0;
1274 err:
1275         if (res)
1276                 release_mem_region(regs_base, resource_size(res));
1277 
1278         return ret;
1279 }
1280 
1281 static int samsung_i2s_remove(struct platform_device *pdev)
1282 {
1283         struct i2s_dai *i2s, *other;
1284         struct resource *res;
1285 
1286         i2s = dev_get_drvdata(&pdev->dev);
1287         other = i2s->pri_dai ? : i2s->sec_dai;
1288 
1289         if (other) {
1290                 other->pri_dai = NULL;
1291                 other->sec_dai = NULL;
1292         } else {
1293                 pm_runtime_disable(&pdev->dev);
1294                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1295                 if (res)
1296                         release_mem_region(res->start, resource_size(res));
1297         }
1298 
1299         i2s->pri_dai = NULL;
1300         i2s->sec_dai = NULL;
1301 
1302         return 0;
1303 }
1304 
1305 static const struct samsung_i2s_dai_data i2sv3_dai_type = {
1306         .dai_type = TYPE_PRI,
1307         .quirks = QUIRK_NO_MUXPSR,
1308 };
1309 
1310 static const struct samsung_i2s_dai_data i2sv5_dai_type = {
1311         .dai_type = TYPE_PRI,
1312         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR,
1313 };
1314 
1315 static const struct samsung_i2s_dai_data i2sv6_dai_type = {
1316         .dai_type = TYPE_PRI,
1317         .quirks = QUIRK_PRI_6CHAN | QUIRK_SEC_DAI | QUIRK_NEED_RSTCLR |
1318                         QUIRK_SUPPORTS_TDM,
1319 };
1320 
1321 static const struct samsung_i2s_dai_data samsung_dai_type_pri = {
1322         .dai_type = TYPE_PRI,
1323 };
1324 
1325 static const struct samsung_i2s_dai_data samsung_dai_type_sec = {
1326         .dai_type = TYPE_SEC,
1327 };
1328 
1329 static struct platform_device_id samsung_i2s_driver_ids[] = {
1330         {
1331                 .name           = "samsung-i2s",
1332                 .driver_data    = (kernel_ulong_t)&samsung_dai_type_pri,
1333         }, {
1334                 .name           = "samsung-i2s-sec",
1335                 .driver_data    = (kernel_ulong_t)&samsung_dai_type_sec,
1336         },
1337         {},
1338 };
1339 MODULE_DEVICE_TABLE(platform, samsung_i2s_driver_ids);
1340 
1341 #ifdef CONFIG_OF
1342 static const struct of_device_id exynos_i2s_match[] = {
1343         {
1344                 .compatible = "samsung,s3c6410-i2s",
1345                 .data = &i2sv3_dai_type,
1346         }, {
1347                 .compatible = "samsung,s5pv210-i2s",
1348                 .data = &i2sv5_dai_type,
1349         }, {
1350                 .compatible = "samsung,exynos5420-i2s",
1351                 .data = &i2sv6_dai_type,
1352         },
1353         {},
1354 };
1355 MODULE_DEVICE_TABLE(of, exynos_i2s_match);
1356 #endif
1357 
1358 static const struct dev_pm_ops samsung_i2s_pm = {
1359         SET_RUNTIME_PM_OPS(i2s_runtime_suspend,
1360                                 i2s_runtime_resume, NULL)
1361 };
1362 
1363 static struct platform_driver samsung_i2s_driver = {
1364         .probe  = samsung_i2s_probe,
1365         .remove = samsung_i2s_remove,
1366         .id_table = samsung_i2s_driver_ids,
1367         .driver = {
1368                 .name = "samsung-i2s",
1369                 .owner = THIS_MODULE,
1370                 .of_match_table = of_match_ptr(exynos_i2s_match),
1371                 .pm = &samsung_i2s_pm,
1372         },
1373 };
1374 
1375 module_platform_driver(samsung_i2s_driver);
1376 
1377 /* Module information */
1378 MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
1379 MODULE_DESCRIPTION("Samsung I2S Interface");
1380 MODULE_ALIAS("platform:samsung-i2s");
1381 MODULE_LICENSE("GPL");
1382 

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