Version:  2.0.40 2.2.26 2.4.37 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5

Linux/sound/soc/codecs/wm8737.c

  1 /*
  2  * wm8737.c  --  WM8737 ALSA SoC Audio driver
  3  *
  4  * Copyright 2010 Wolfson Microelectronics plc
  5  *
  6  * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License version 2 as
 10  * published by the Free Software Foundation.
 11  */
 12 
 13 #include <linux/module.h>
 14 #include <linux/moduleparam.h>
 15 #include <linux/init.h>
 16 #include <linux/delay.h>
 17 #include <linux/pm.h>
 18 #include <linux/i2c.h>
 19 #include <linux/regmap.h>
 20 #include <linux/regulator/consumer.h>
 21 #include <linux/spi/spi.h>
 22 #include <linux/slab.h>
 23 #include <linux/of_device.h>
 24 #include <sound/core.h>
 25 #include <sound/pcm.h>
 26 #include <sound/pcm_params.h>
 27 #include <sound/soc.h>
 28 #include <sound/soc-dapm.h>
 29 #include <sound/initval.h>
 30 #include <sound/tlv.h>
 31 
 32 #include "wm8737.h"
 33 
 34 #define WM8737_NUM_SUPPLIES 4
 35 static const char *wm8737_supply_names[WM8737_NUM_SUPPLIES] = {
 36         "DCVDD",
 37         "DBVDD",
 38         "AVDD",
 39         "MVDD",
 40 };
 41 
 42 /* codec private data */
 43 struct wm8737_priv {
 44         struct regmap *regmap;
 45         struct regulator_bulk_data supplies[WM8737_NUM_SUPPLIES];
 46         unsigned int mclk;
 47 };
 48 
 49 static const struct reg_default wm8737_reg_defaults[] = {
 50         {  0, 0x00C3 },     /* R0  - Left PGA volume */
 51         {  1, 0x00C3 },     /* R1  - Right PGA volume */
 52         {  2, 0x0007 },     /* R2  - AUDIO path L */
 53         {  3, 0x0007 },     /* R3  - AUDIO path R */
 54         {  4, 0x0000 },     /* R4  - 3D Enhance */
 55         {  5, 0x0000 },     /* R5  - ADC Control */
 56         {  6, 0x0000 },     /* R6  - Power Management */
 57         {  7, 0x000A },     /* R7  - Audio Format */
 58         {  8, 0x0000 },     /* R8  - Clocking */
 59         {  9, 0x000F },     /* R9  - MIC Preamp Control */
 60         { 10, 0x0003 },     /* R10 - Misc Bias Control */
 61         { 11, 0x0000 },     /* R11 - Noise Gate */
 62         { 12, 0x007C },     /* R12 - ALC1 */
 63         { 13, 0x0000 },     /* R13 - ALC2 */
 64         { 14, 0x0032 },     /* R14 - ALC3 */
 65 };
 66 
 67 static bool wm8737_volatile(struct device *dev, unsigned int reg)
 68 {
 69         switch (reg) {
 70         case WM8737_RESET:
 71                 return true;
 72         default:
 73                 return false;
 74         }
 75 }
 76 
 77 static int wm8737_reset(struct snd_soc_codec *codec)
 78 {
 79         return snd_soc_write(codec, WM8737_RESET, 0);
 80 }
 81 
 82 static const DECLARE_TLV_DB_RANGE(micboost_tlv,
 83         0, 0, TLV_DB_SCALE_ITEM(1300, 0, 0),
 84         1, 1, TLV_DB_SCALE_ITEM(1800, 0, 0),
 85         2, 2, TLV_DB_SCALE_ITEM(2800, 0, 0),
 86         3, 3, TLV_DB_SCALE_ITEM(3300, 0, 0)
 87 );
 88 static const DECLARE_TLV_DB_SCALE(pga_tlv, -9750, 50, 1);
 89 static const DECLARE_TLV_DB_SCALE(adc_tlv, -600, 600, 0);
 90 static const DECLARE_TLV_DB_SCALE(ng_tlv, -7800, 600, 0);
 91 static const DECLARE_TLV_DB_SCALE(alc_max_tlv, -1200, 600, 0);
 92 static const DECLARE_TLV_DB_SCALE(alc_target_tlv, -1800, 100, 0);
 93 
 94 static const char *micbias_enum_text[] = {
 95         "25%",
 96         "50%",
 97         "75%",
 98         "100%",
 99 };
100 
101 static SOC_ENUM_SINGLE_DECL(micbias_enum,
102                             WM8737_MIC_PREAMP_CONTROL, 0, micbias_enum_text);
103 
104 static const char *low_cutoff_text[] = {
105         "Low", "High"
106 };
107 
108 static SOC_ENUM_SINGLE_DECL(low_3d,
109                             WM8737_3D_ENHANCE, 6, low_cutoff_text);
110 
111 static const char *high_cutoff_text[] = {
112         "High", "Low"
113 };
114 
115 static SOC_ENUM_SINGLE_DECL(high_3d,
116                             WM8737_3D_ENHANCE, 5, high_cutoff_text);
117 
118 static const char *alc_fn_text[] = {
119         "Disabled", "Right", "Left", "Stereo"
120 };
121 
122 static SOC_ENUM_SINGLE_DECL(alc_fn,
123                             WM8737_ALC1, 7, alc_fn_text);
124 
125 static const char *alc_hold_text[] = {
126         "", "2.67ms", "5.33ms", "10.66ms", "21.32ms", "42.64ms", "85.28ms",
127         "170.56ms", "341.12ms", "682.24ms", "1.364s", "2.728s", "5.458s",
128         "10.916s", "21.832s", "43.691s"
129 };
130 
131 static SOC_ENUM_SINGLE_DECL(alc_hold,
132                             WM8737_ALC2, 0, alc_hold_text);
133 
134 static const char *alc_atk_text[] = {
135         "8.4ms", "16.8ms", "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms",
136         "1.075s", "2.15s", "4.3s", "8.6s"
137 };
138 
139 static SOC_ENUM_SINGLE_DECL(alc_atk,
140                             WM8737_ALC3, 0, alc_atk_text);
141 
142 static const char *alc_dcy_text[] = {
143         "33.6ms", "67.2ms", "134.4ms", "268.8ms", "537.6ms", "1.075s", "2.15s",
144         "4.3s", "8.6s", "17.2s", "34.41s"
145 };
146 
147 static SOC_ENUM_SINGLE_DECL(alc_dcy,
148                             WM8737_ALC3, 4, alc_dcy_text);
149 
150 static const struct snd_kcontrol_new wm8737_snd_controls[] = {
151 SOC_DOUBLE_R_TLV("Mic Boost Volume", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
152                  6, 3, 0, micboost_tlv),
153 SOC_DOUBLE_R("Mic Boost Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
154              4, 1, 0),
155 SOC_DOUBLE("Mic ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
156            3, 1, 0),
157 
158 SOC_DOUBLE_R_TLV("Capture Volume", WM8737_LEFT_PGA_VOLUME,
159                  WM8737_RIGHT_PGA_VOLUME, 0, 255, 0, pga_tlv),
160 SOC_DOUBLE("Capture ZC Switch", WM8737_AUDIO_PATH_L, WM8737_AUDIO_PATH_R,
161            2, 1, 0),
162 
163 SOC_DOUBLE("INPUT1 DC Bias Switch", WM8737_MISC_BIAS_CONTROL, 0, 1, 1, 0),
164 
165 SOC_ENUM("Mic PGA Bias", micbias_enum),
166 SOC_SINGLE("ADC Low Power Switch", WM8737_ADC_CONTROL, 2, 1, 0),
167 SOC_SINGLE("High Pass Filter Switch", WM8737_ADC_CONTROL, 0, 1, 1),
168 SOC_DOUBLE("Polarity Invert Switch", WM8737_ADC_CONTROL, 5, 6, 1, 0),
169 
170 SOC_SINGLE("3D Switch", WM8737_3D_ENHANCE, 0, 1, 0),
171 SOC_SINGLE("3D Depth", WM8737_3D_ENHANCE, 1, 15, 0),
172 SOC_ENUM("3D Low Cut-off", low_3d),
173 SOC_ENUM("3D High Cut-off", low_3d),
174 SOC_SINGLE_TLV("3D ADC Volume", WM8737_3D_ENHANCE, 7, 1, 1, adc_tlv),
175 
176 SOC_SINGLE("Noise Gate Switch", WM8737_NOISE_GATE, 0, 1, 0),
177 SOC_SINGLE_TLV("Noise Gate Threshold Volume", WM8737_NOISE_GATE, 2, 7, 0,
178                ng_tlv),
179 
180 SOC_ENUM("ALC", alc_fn),
181 SOC_SINGLE_TLV("ALC Max Gain Volume", WM8737_ALC1, 4, 7, 0, alc_max_tlv),
182 SOC_SINGLE_TLV("ALC Target Volume", WM8737_ALC1, 0, 15, 0, alc_target_tlv),
183 SOC_ENUM("ALC Hold Time", alc_hold),
184 SOC_SINGLE("ALC ZC Switch", WM8737_ALC2, 4, 1, 0),
185 SOC_ENUM("ALC Attack Time", alc_atk),
186 SOC_ENUM("ALC Decay Time", alc_dcy),
187 };
188 
189 static const char *linsel_text[] = {
190         "LINPUT1", "LINPUT2", "LINPUT3", "LINPUT1 DC",
191 };
192 
193 static SOC_ENUM_SINGLE_DECL(linsel_enum,
194                             WM8737_AUDIO_PATH_L, 7, linsel_text);
195 
196 static const struct snd_kcontrol_new linsel_mux =
197         SOC_DAPM_ENUM("LINSEL", linsel_enum);
198 
199 
200 static const char *rinsel_text[] = {
201         "RINPUT1", "RINPUT2", "RINPUT3", "RINPUT1 DC",
202 };
203 
204 static SOC_ENUM_SINGLE_DECL(rinsel_enum,
205                             WM8737_AUDIO_PATH_R, 7, rinsel_text);
206 
207 static const struct snd_kcontrol_new rinsel_mux =
208         SOC_DAPM_ENUM("RINSEL", rinsel_enum);
209 
210 static const char *bypass_text[] = {
211         "Direct", "Preamp"
212 };
213 
214 static SOC_ENUM_SINGLE_DECL(lbypass_enum,
215                             WM8737_MIC_PREAMP_CONTROL, 2, bypass_text);
216 
217 static const struct snd_kcontrol_new lbypass_mux =
218         SOC_DAPM_ENUM("Left Bypass", lbypass_enum);
219 
220 
221 static SOC_ENUM_SINGLE_DECL(rbypass_enum,
222                             WM8737_MIC_PREAMP_CONTROL, 3, bypass_text);
223 
224 static const struct snd_kcontrol_new rbypass_mux =
225         SOC_DAPM_ENUM("Left Bypass", rbypass_enum);
226 
227 static const struct snd_soc_dapm_widget wm8737_dapm_widgets[] = {
228 SND_SOC_DAPM_INPUT("LINPUT1"),
229 SND_SOC_DAPM_INPUT("LINPUT2"),
230 SND_SOC_DAPM_INPUT("LINPUT3"),
231 SND_SOC_DAPM_INPUT("RINPUT1"),
232 SND_SOC_DAPM_INPUT("RINPUT2"),
233 SND_SOC_DAPM_INPUT("RINPUT3"),
234 SND_SOC_DAPM_INPUT("LACIN"),
235 SND_SOC_DAPM_INPUT("RACIN"),
236 
237 SND_SOC_DAPM_MUX("LINSEL", SND_SOC_NOPM, 0, 0, &linsel_mux),
238 SND_SOC_DAPM_MUX("RINSEL", SND_SOC_NOPM, 0, 0, &rinsel_mux),
239 
240 SND_SOC_DAPM_MUX("Left Preamp Mux", SND_SOC_NOPM, 0, 0, &lbypass_mux),
241 SND_SOC_DAPM_MUX("Right Preamp Mux", SND_SOC_NOPM, 0, 0, &rbypass_mux),
242 
243 SND_SOC_DAPM_PGA("PGAL", WM8737_POWER_MANAGEMENT, 5, 0, NULL, 0),
244 SND_SOC_DAPM_PGA("PGAR", WM8737_POWER_MANAGEMENT, 4, 0, NULL, 0),
245 
246 SND_SOC_DAPM_DAC("ADCL", NULL, WM8737_POWER_MANAGEMENT, 3, 0),
247 SND_SOC_DAPM_DAC("ADCR", NULL, WM8737_POWER_MANAGEMENT, 2, 0),
248 
249 SND_SOC_DAPM_AIF_OUT("AIF", "Capture", 0, WM8737_POWER_MANAGEMENT, 6, 0),
250 };
251 
252 static const struct snd_soc_dapm_route intercon[] = {
253         { "LINSEL", "LINPUT1", "LINPUT1" },
254         { "LINSEL", "LINPUT2", "LINPUT2" },
255         { "LINSEL", "LINPUT3", "LINPUT3" },
256         { "LINSEL", "LINPUT1 DC", "LINPUT1" },
257 
258         { "RINSEL", "RINPUT1", "RINPUT1" },
259         { "RINSEL", "RINPUT2", "RINPUT2" },
260         { "RINSEL", "RINPUT3", "RINPUT3" },
261         { "RINSEL", "RINPUT1 DC", "RINPUT1" },
262 
263         { "Left Preamp Mux", "Preamp", "LINSEL" },
264         { "Left Preamp Mux", "Direct", "LACIN" },
265 
266         { "Right Preamp Mux", "Preamp", "RINSEL" },
267         { "Right Preamp Mux", "Direct", "RACIN" },
268 
269         { "PGAL", NULL, "Left Preamp Mux" },
270         { "PGAR", NULL, "Right Preamp Mux" },
271 
272         { "ADCL", NULL, "PGAL" },
273         { "ADCR", NULL, "PGAR" },
274 
275         { "AIF", NULL, "ADCL" },
276         { "AIF", NULL, "ADCR" },
277 };
278 
279 /* codec mclk clock divider coefficients */
280 static const struct {
281         u32 mclk;
282         u32 rate;
283         u8 usb;
284         u8 sr;
285 } coeff_div[] = {
286         { 12288000,  8000, 0,  0x4 },
287         { 12288000, 12000, 0,  0x8 },
288         { 12288000, 16000, 0,  0xa },
289         { 12288000, 24000, 0, 0x1c },
290         { 12288000, 32000, 0,  0xc },
291         { 12288000, 48000, 0,    0 },
292         { 12288000, 96000, 0,  0xe },
293 
294         { 11289600,  8000, 0, 0x14 },
295         { 11289600, 11025, 0, 0x18 },
296         { 11289600, 22050, 0, 0x1a },
297         { 11289600, 44100, 0, 0x10 },
298         { 11289600, 88200, 0, 0x1e },
299 
300         { 18432000,  8000, 0,  0x5 },
301         { 18432000, 12000, 0,  0x9 },
302         { 18432000, 16000, 0,  0xb },
303         { 18432000, 24000, 0, 0x1b },
304         { 18432000, 32000, 0,  0xd },
305         { 18432000, 48000, 0,  0x1 },
306         { 18432000, 96000, 0, 0x1f },
307 
308         { 16934400,  8000, 0, 0x15 },
309         { 16934400, 11025, 0, 0x19 },
310         { 16934400, 22050, 0, 0x1b },
311         { 16934400, 44100, 0, 0x11 },
312         { 16934400, 88200, 0, 0x1f },
313 
314         { 12000000,  8000, 1,  0x4 },
315         { 12000000, 11025, 1, 0x19 },
316         { 12000000, 12000, 1,  0x8 },
317         { 12000000, 16000, 1,  0xa },
318         { 12000000, 22050, 1, 0x1b },
319         { 12000000, 24000, 1, 0x1c },
320         { 12000000, 32000, 1,  0xc },
321         { 12000000, 44100, 1, 0x11 },
322         { 12000000, 48000, 1,  0x0 },
323         { 12000000, 88200, 1, 0x1f },
324         { 12000000, 96000, 1,  0xe },
325 };
326 
327 static int wm8737_hw_params(struct snd_pcm_substream *substream,
328                             struct snd_pcm_hw_params *params,
329                             struct snd_soc_dai *dai)
330 {
331         struct snd_soc_codec *codec = dai->codec;
332         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
333         int i;
334         u16 clocking = 0;
335         u16 af = 0;
336 
337         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
338                 if (coeff_div[i].rate != params_rate(params))
339                         continue;
340 
341                 if (coeff_div[i].mclk == wm8737->mclk)
342                         break;
343 
344                 if (coeff_div[i].mclk == wm8737->mclk * 2) {
345                         clocking |= WM8737_CLKDIV2;
346                         break;
347                 }
348         }
349 
350         if (i == ARRAY_SIZE(coeff_div)) {
351                 dev_err(codec->dev, "%dHz MCLK can't support %dHz\n",
352                         wm8737->mclk, params_rate(params));
353                 return -EINVAL;
354         }
355 
356         clocking |= coeff_div[i].usb | (coeff_div[i].sr << WM8737_SR_SHIFT);
357 
358         switch (params_width(params)) {
359         case 16:
360                 break;
361         case 20:
362                 af |= 0x8;
363                 break;
364         case 24:
365                 af |= 0x10;
366                 break;
367         case 32:
368                 af |= 0x18;
369                 break;
370         default:
371                 return -EINVAL;
372         }
373 
374         snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT, WM8737_WL_MASK, af);
375         snd_soc_update_bits(codec, WM8737_CLOCKING,
376                             WM8737_USB_MODE | WM8737_CLKDIV2 | WM8737_SR_MASK,
377                             clocking);
378 
379         return 0;
380 }
381 
382 static int wm8737_set_dai_sysclk(struct snd_soc_dai *codec_dai,
383                                  int clk_id, unsigned int freq, int dir)
384 {
385         struct snd_soc_codec *codec = codec_dai->codec;
386         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
387         int i;
388 
389         for (i = 0; i < ARRAY_SIZE(coeff_div); i++) {
390                 if (freq == coeff_div[i].mclk ||
391                     freq == coeff_div[i].mclk * 2) {
392                         wm8737->mclk = freq;
393                         return 0;
394                 }
395         }
396 
397         dev_err(codec->dev, "MCLK rate %dHz not supported\n", freq);
398 
399         return -EINVAL;
400 }
401 
402 
403 static int wm8737_set_dai_fmt(struct snd_soc_dai *codec_dai,
404                 unsigned int fmt)
405 {
406         struct snd_soc_codec *codec = codec_dai->codec;
407         u16 af = 0;
408 
409         switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
410         case SND_SOC_DAIFMT_CBM_CFM:
411                 af |= WM8737_MS;
412                 break;
413         case SND_SOC_DAIFMT_CBS_CFS:
414                 break;
415         default:
416                 return -EINVAL;
417         }
418 
419         switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
420         case SND_SOC_DAIFMT_I2S:
421                 af |= 0x2;
422                 break;
423         case SND_SOC_DAIFMT_RIGHT_J:
424                 break;
425         case SND_SOC_DAIFMT_LEFT_J:
426                 af |= 0x1;
427                 break;
428         case SND_SOC_DAIFMT_DSP_A:
429                 af |= 0x3;
430                 break;
431         case SND_SOC_DAIFMT_DSP_B:
432                 af |= 0x13;
433                 break;
434         default:
435                 return -EINVAL;
436         }
437 
438         switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
439         case SND_SOC_DAIFMT_NB_NF:
440                 break;
441         case SND_SOC_DAIFMT_NB_IF:
442                 af |= WM8737_LRP;
443                 break;
444         default:
445                 return -EINVAL;
446         }
447 
448         snd_soc_update_bits(codec, WM8737_AUDIO_FORMAT,
449                             WM8737_FORMAT_MASK | WM8737_LRP | WM8737_MS, af);
450 
451         return 0;
452 }
453 
454 static int wm8737_set_bias_level(struct snd_soc_codec *codec,
455                                  enum snd_soc_bias_level level)
456 {
457         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
458         int ret;
459 
460         switch (level) {
461         case SND_SOC_BIAS_ON:
462                 break;
463 
464         case SND_SOC_BIAS_PREPARE:
465                 /* VMID at 2*75k */
466                 snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
467                                     WM8737_VMIDSEL_MASK, 0);
468                 break;
469 
470         case SND_SOC_BIAS_STANDBY:
471                 if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
472                         ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
473                                                     wm8737->supplies);
474                         if (ret != 0) {
475                                 dev_err(codec->dev,
476                                         "Failed to enable supplies: %d\n",
477                                         ret);
478                                 return ret;
479                         }
480 
481                         regcache_sync(wm8737->regmap);
482 
483                         /* Fast VMID ramp at 2*2.5k */
484                         snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
485                                             WM8737_VMIDSEL_MASK,
486                                             2 << WM8737_VMIDSEL_SHIFT);
487 
488                         /* Bring VMID up */
489                         snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
490                                             WM8737_VMID_MASK |
491                                             WM8737_VREF_MASK,
492                                             WM8737_VMID_MASK |
493                                             WM8737_VREF_MASK);
494 
495                         msleep(500);
496                 }
497 
498                 /* VMID at 2*300k */
499                 snd_soc_update_bits(codec, WM8737_MISC_BIAS_CONTROL,
500                                     WM8737_VMIDSEL_MASK,
501                                     1 << WM8737_VMIDSEL_SHIFT);
502 
503                 break;
504 
505         case SND_SOC_BIAS_OFF:
506                 snd_soc_update_bits(codec, WM8737_POWER_MANAGEMENT,
507                                     WM8737_VMID_MASK | WM8737_VREF_MASK, 0);
508 
509                 regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies),
510                                        wm8737->supplies);
511                 break;
512         }
513 
514         return 0;
515 }
516 
517 #define WM8737_RATES SNDRV_PCM_RATE_8000_96000
518 
519 #define WM8737_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE |\
520                         SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
521 
522 static const struct snd_soc_dai_ops wm8737_dai_ops = {
523         .hw_params      = wm8737_hw_params,
524         .set_sysclk     = wm8737_set_dai_sysclk,
525         .set_fmt        = wm8737_set_dai_fmt,
526 };
527 
528 static struct snd_soc_dai_driver wm8737_dai = {
529         .name = "wm8737",
530         .capture = {
531                 .stream_name = "Capture",
532                 .channels_min = 2,  /* Mono modes not yet supported */
533                 .channels_max = 2,
534                 .rates = WM8737_RATES,
535                 .formats = WM8737_FORMATS,
536         },
537         .ops = &wm8737_dai_ops,
538 };
539 
540 static int wm8737_probe(struct snd_soc_codec *codec)
541 {
542         struct wm8737_priv *wm8737 = snd_soc_codec_get_drvdata(codec);
543         int ret;
544 
545         ret = regulator_bulk_enable(ARRAY_SIZE(wm8737->supplies),
546                                     wm8737->supplies);
547         if (ret != 0) {
548                 dev_err(codec->dev, "Failed to enable supplies: %d\n", ret);
549                 goto err_get;
550         }
551 
552         ret = wm8737_reset(codec);
553         if (ret < 0) {
554                 dev_err(codec->dev, "Failed to issue reset\n");
555                 goto err_enable;
556         }
557 
558         snd_soc_update_bits(codec, WM8737_LEFT_PGA_VOLUME, WM8737_LVU,
559                             WM8737_LVU);
560         snd_soc_update_bits(codec, WM8737_RIGHT_PGA_VOLUME, WM8737_RVU,
561                             WM8737_RVU);
562 
563         snd_soc_codec_force_bias_level(codec, SND_SOC_BIAS_STANDBY);
564 
565         /* Bias level configuration will have done an extra enable */
566         regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
567 
568         return 0;
569 
570 err_enable:
571         regulator_bulk_disable(ARRAY_SIZE(wm8737->supplies), wm8737->supplies);
572 err_get:
573         return ret;
574 }
575 
576 static struct snd_soc_codec_driver soc_codec_dev_wm8737 = {
577         .probe          = wm8737_probe,
578         .set_bias_level = wm8737_set_bias_level,
579         .suspend_bias_off = true,
580 
581         .controls = wm8737_snd_controls,
582         .num_controls = ARRAY_SIZE(wm8737_snd_controls),
583         .dapm_widgets = wm8737_dapm_widgets,
584         .num_dapm_widgets = ARRAY_SIZE(wm8737_dapm_widgets),
585         .dapm_routes = intercon,
586         .num_dapm_routes = ARRAY_SIZE(intercon),
587 };
588 
589 static const struct of_device_id wm8737_of_match[] = {
590         { .compatible = "wlf,wm8737", },
591         { }
592 };
593 
594 MODULE_DEVICE_TABLE(of, wm8737_of_match);
595 
596 static const struct regmap_config wm8737_regmap = {
597         .reg_bits = 7,
598         .val_bits = 9,
599         .max_register = WM8737_MAX_REGISTER,
600 
601         .reg_defaults = wm8737_reg_defaults,
602         .num_reg_defaults = ARRAY_SIZE(wm8737_reg_defaults),
603         .cache_type = REGCACHE_RBTREE,
604 
605         .volatile_reg = wm8737_volatile,
606 };
607 
608 #if IS_ENABLED(CONFIG_I2C)
609 static int wm8737_i2c_probe(struct i2c_client *i2c,
610                             const struct i2c_device_id *id)
611 {
612         struct wm8737_priv *wm8737;
613         int ret, i;
614 
615         wm8737 = devm_kzalloc(&i2c->dev, sizeof(struct wm8737_priv),
616                               GFP_KERNEL);
617         if (wm8737 == NULL)
618                 return -ENOMEM;
619 
620         for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
621                 wm8737->supplies[i].supply = wm8737_supply_names[i];
622 
623         ret = devm_regulator_bulk_get(&i2c->dev, ARRAY_SIZE(wm8737->supplies),
624                                       wm8737->supplies);
625         if (ret != 0) {
626                 dev_err(&i2c->dev, "Failed to request supplies: %d\n", ret);
627                 return ret;
628         }
629 
630         wm8737->regmap = devm_regmap_init_i2c(i2c, &wm8737_regmap);
631         if (IS_ERR(wm8737->regmap))
632                 return PTR_ERR(wm8737->regmap);
633 
634         i2c_set_clientdata(i2c, wm8737);
635 
636         ret =  snd_soc_register_codec(&i2c->dev,
637                                       &soc_codec_dev_wm8737, &wm8737_dai, 1);
638 
639         return ret;
640 
641 }
642 
643 static int wm8737_i2c_remove(struct i2c_client *client)
644 {
645         snd_soc_unregister_codec(&client->dev);
646 
647         return 0;
648 }
649 
650 static const struct i2c_device_id wm8737_i2c_id[] = {
651         { "wm8737", 0 },
652         { }
653 };
654 MODULE_DEVICE_TABLE(i2c, wm8737_i2c_id);
655 
656 static struct i2c_driver wm8737_i2c_driver = {
657         .driver = {
658                 .name = "wm8737",
659                 .of_match_table = wm8737_of_match,
660         },
661         .probe =    wm8737_i2c_probe,
662         .remove =   wm8737_i2c_remove,
663         .id_table = wm8737_i2c_id,
664 };
665 #endif
666 
667 #if defined(CONFIG_SPI_MASTER)
668 static int wm8737_spi_probe(struct spi_device *spi)
669 {
670         struct wm8737_priv *wm8737;
671         int ret, i;
672 
673         wm8737 = devm_kzalloc(&spi->dev, sizeof(struct wm8737_priv),
674                               GFP_KERNEL);
675         if (wm8737 == NULL)
676                 return -ENOMEM;
677 
678         for (i = 0; i < ARRAY_SIZE(wm8737->supplies); i++)
679                 wm8737->supplies[i].supply = wm8737_supply_names[i];
680 
681         ret = devm_regulator_bulk_get(&spi->dev, ARRAY_SIZE(wm8737->supplies),
682                                       wm8737->supplies);
683         if (ret != 0) {
684                 dev_err(&spi->dev, "Failed to request supplies: %d\n", ret);
685                 return ret;
686         }
687 
688         wm8737->regmap = devm_regmap_init_spi(spi, &wm8737_regmap);
689         if (IS_ERR(wm8737->regmap))
690                 return PTR_ERR(wm8737->regmap);
691 
692         spi_set_drvdata(spi, wm8737);
693 
694         ret = snd_soc_register_codec(&spi->dev,
695                                      &soc_codec_dev_wm8737, &wm8737_dai, 1);
696 
697         return ret;
698 }
699 
700 static int wm8737_spi_remove(struct spi_device *spi)
701 {
702         snd_soc_unregister_codec(&spi->dev);
703 
704         return 0;
705 }
706 
707 static struct spi_driver wm8737_spi_driver = {
708         .driver = {
709                 .name   = "wm8737",
710                 .of_match_table = wm8737_of_match,
711         },
712         .probe          = wm8737_spi_probe,
713         .remove         = wm8737_spi_remove,
714 };
715 #endif /* CONFIG_SPI_MASTER */
716 
717 static int __init wm8737_modinit(void)
718 {
719         int ret;
720 #if IS_ENABLED(CONFIG_I2C)
721         ret = i2c_add_driver(&wm8737_i2c_driver);
722         if (ret != 0) {
723                 printk(KERN_ERR "Failed to register WM8737 I2C driver: %d\n",
724                        ret);
725         }
726 #endif
727 #if defined(CONFIG_SPI_MASTER)
728         ret = spi_register_driver(&wm8737_spi_driver);
729         if (ret != 0) {
730                 printk(KERN_ERR "Failed to register WM8737 SPI driver: %d\n",
731                        ret);
732         }
733 #endif
734         return 0;
735 }
736 module_init(wm8737_modinit);
737 
738 static void __exit wm8737_exit(void)
739 {
740 #if defined(CONFIG_SPI_MASTER)
741         spi_unregister_driver(&wm8737_spi_driver);
742 #endif
743 #if IS_ENABLED(CONFIG_I2C)
744         i2c_del_driver(&wm8737_i2c_driver);
745 #endif
746 }
747 module_exit(wm8737_exit);
748 
749 MODULE_DESCRIPTION("ASoC WM8737 driver");
750 MODULE_AUTHOR("Mark Brown <broonie@opensource.wolfsonmicro.com>");
751 MODULE_LICENSE("GPL");
752 

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