Version:  2.0.40 2.2.26 2.4.37 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0

Linux/sound/soc/atmel/atmel_ssc_dai.c

  1 /*
  2  * atmel_ssc_dai.c  --  ALSA SoC ATMEL SSC Audio Layer Platform driver
  3  *
  4  * Copyright (C) 2005 SAN People
  5  * Copyright (C) 2008 Atmel
  6  *
  7  * Author: Sedji Gaouaou <sedji.gaouaou@atmel.com>
  8  *         ATMEL CORP.
  9  *
 10  * Based on at91-ssc.c by
 11  * Frank Mandarino <fmandarino@endrelia.com>
 12  * Based on pxa2xx Platform drivers by
 13  * Liam Girdwood <lrg@slimlogic.co.uk>
 14  *
 15  * This program is free software; you can redistribute it and/or modify
 16  * it under the terms of the GNU General Public License as published by
 17  * the Free Software Foundation; either version 2 of the License, or
 18  * (at your option) any later version.
 19  *
 20  * This program is distributed in the hope that it will be useful,
 21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 23  * GNU General Public License for more details.
 24  *
 25  * You should have received a copy of the GNU General Public License
 26  * along with this program; if not, write to the Free Software
 27  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 28  */
 29 
 30 #include <linux/init.h>
 31 #include <linux/module.h>
 32 #include <linux/interrupt.h>
 33 #include <linux/device.h>
 34 #include <linux/delay.h>
 35 #include <linux/clk.h>
 36 #include <linux/atmel_pdc.h>
 37 
 38 #include <linux/atmel-ssc.h>
 39 #include <sound/core.h>
 40 #include <sound/pcm.h>
 41 #include <sound/pcm_params.h>
 42 #include <sound/initval.h>
 43 #include <sound/soc.h>
 44 
 45 #include "atmel-pcm.h"
 46 #include "atmel_ssc_dai.h"
 47 
 48 
 49 #define NUM_SSC_DEVICES         3
 50 
 51 /*
 52  * SSC PDC registers required by the PCM DMA engine.
 53  */
 54 static struct atmel_pdc_regs pdc_tx_reg = {
 55         .xpr            = ATMEL_PDC_TPR,
 56         .xcr            = ATMEL_PDC_TCR,
 57         .xnpr           = ATMEL_PDC_TNPR,
 58         .xncr           = ATMEL_PDC_TNCR,
 59 };
 60 
 61 static struct atmel_pdc_regs pdc_rx_reg = {
 62         .xpr            = ATMEL_PDC_RPR,
 63         .xcr            = ATMEL_PDC_RCR,
 64         .xnpr           = ATMEL_PDC_RNPR,
 65         .xncr           = ATMEL_PDC_RNCR,
 66 };
 67 
 68 /*
 69  * SSC & PDC status bits for transmit and receive.
 70  */
 71 static struct atmel_ssc_mask ssc_tx_mask = {
 72         .ssc_enable     = SSC_BIT(CR_TXEN),
 73         .ssc_disable    = SSC_BIT(CR_TXDIS),
 74         .ssc_endx       = SSC_BIT(SR_ENDTX),
 75         .ssc_endbuf     = SSC_BIT(SR_TXBUFE),
 76         .ssc_error      = SSC_BIT(SR_OVRUN),
 77         .pdc_enable     = ATMEL_PDC_TXTEN,
 78         .pdc_disable    = ATMEL_PDC_TXTDIS,
 79 };
 80 
 81 static struct atmel_ssc_mask ssc_rx_mask = {
 82         .ssc_enable     = SSC_BIT(CR_RXEN),
 83         .ssc_disable    = SSC_BIT(CR_RXDIS),
 84         .ssc_endx       = SSC_BIT(SR_ENDRX),
 85         .ssc_endbuf     = SSC_BIT(SR_RXBUFF),
 86         .ssc_error      = SSC_BIT(SR_OVRUN),
 87         .pdc_enable     = ATMEL_PDC_RXTEN,
 88         .pdc_disable    = ATMEL_PDC_RXTDIS,
 89 };
 90 
 91 
 92 /*
 93  * DMA parameters.
 94  */
 95 static struct atmel_pcm_dma_params ssc_dma_params[NUM_SSC_DEVICES][2] = {
 96         {{
 97         .name           = "SSC0 PCM out",
 98         .pdc            = &pdc_tx_reg,
 99         .mask           = &ssc_tx_mask,
100         },
101         {
102         .name           = "SSC0 PCM in",
103         .pdc            = &pdc_rx_reg,
104         .mask           = &ssc_rx_mask,
105         } },
106         {{
107         .name           = "SSC1 PCM out",
108         .pdc            = &pdc_tx_reg,
109         .mask           = &ssc_tx_mask,
110         },
111         {
112         .name           = "SSC1 PCM in",
113         .pdc            = &pdc_rx_reg,
114         .mask           = &ssc_rx_mask,
115         } },
116         {{
117         .name           = "SSC2 PCM out",
118         .pdc            = &pdc_tx_reg,
119         .mask           = &ssc_tx_mask,
120         },
121         {
122         .name           = "SSC2 PCM in",
123         .pdc            = &pdc_rx_reg,
124         .mask           = &ssc_rx_mask,
125         } },
126 };
127 
128 
129 static struct atmel_ssc_info ssc_info[NUM_SSC_DEVICES] = {
130         {
131         .name           = "ssc0",
132         .lock           = __SPIN_LOCK_UNLOCKED(ssc_info[0].lock),
133         .dir_mask       = SSC_DIR_MASK_UNUSED,
134         .initialized    = 0,
135         },
136         {
137         .name           = "ssc1",
138         .lock           = __SPIN_LOCK_UNLOCKED(ssc_info[1].lock),
139         .dir_mask       = SSC_DIR_MASK_UNUSED,
140         .initialized    = 0,
141         },
142         {
143         .name           = "ssc2",
144         .lock           = __SPIN_LOCK_UNLOCKED(ssc_info[2].lock),
145         .dir_mask       = SSC_DIR_MASK_UNUSED,
146         .initialized    = 0,
147         },
148 };
149 
150 
151 /*
152  * SSC interrupt handler.  Passes PDC interrupts to the DMA
153  * interrupt handler in the PCM driver.
154  */
155 static irqreturn_t atmel_ssc_interrupt(int irq, void *dev_id)
156 {
157         struct atmel_ssc_info *ssc_p = dev_id;
158         struct atmel_pcm_dma_params *dma_params;
159         u32 ssc_sr;
160         u32 ssc_substream_mask;
161         int i;
162 
163         ssc_sr = (unsigned long)ssc_readl(ssc_p->ssc->regs, SR)
164                         & (unsigned long)ssc_readl(ssc_p->ssc->regs, IMR);
165 
166         /*
167          * Loop through the substreams attached to this SSC.  If
168          * a DMA-related interrupt occurred on that substream, call
169          * the DMA interrupt handler function, if one has been
170          * registered in the dma_params structure by the PCM driver.
171          */
172         for (i = 0; i < ARRAY_SIZE(ssc_p->dma_params); i++) {
173                 dma_params = ssc_p->dma_params[i];
174 
175                 if ((dma_params != NULL) &&
176                         (dma_params->dma_intr_handler != NULL)) {
177                         ssc_substream_mask = (dma_params->mask->ssc_endx |
178                                         dma_params->mask->ssc_endbuf);
179                         if (ssc_sr & ssc_substream_mask) {
180                                 dma_params->dma_intr_handler(ssc_sr,
181                                                 dma_params->
182                                                 substream);
183                         }
184                 }
185         }
186 
187         return IRQ_HANDLED;
188 }
189 
190 
191 /*-------------------------------------------------------------------------*\
192  * DAI functions
193 \*-------------------------------------------------------------------------*/
194 /*
195  * Startup.  Only that one substream allowed in each direction.
196  */
197 static int atmel_ssc_startup(struct snd_pcm_substream *substream,
198                              struct snd_soc_dai *dai)
199 {
200         struct atmel_ssc_info *ssc_p = &ssc_info[dai->id];
201         struct atmel_pcm_dma_params *dma_params;
202         int dir, dir_mask;
203 
204         pr_debug("atmel_ssc_startup: SSC_SR=0x%u\n",
205                 ssc_readl(ssc_p->ssc->regs, SR));
206 
207         /* Enable PMC peripheral clock for this SSC */
208         pr_debug("atmel_ssc_dai: Starting clock\n");
209         clk_enable(ssc_p->ssc->clk);
210 
211         /* Reset the SSC to keep it at a clean status */
212         ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
213 
214         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
215                 dir = 0;
216                 dir_mask = SSC_DIR_MASK_PLAYBACK;
217         } else {
218                 dir = 1;
219                 dir_mask = SSC_DIR_MASK_CAPTURE;
220         }
221 
222         dma_params = &ssc_dma_params[dai->id][dir];
223         dma_params->ssc = ssc_p->ssc;
224         dma_params->substream = substream;
225 
226         ssc_p->dma_params[dir] = dma_params;
227 
228         snd_soc_dai_set_dma_data(dai, substream, dma_params);
229 
230         spin_lock_irq(&ssc_p->lock);
231         if (ssc_p->dir_mask & dir_mask) {
232                 spin_unlock_irq(&ssc_p->lock);
233                 return -EBUSY;
234         }
235         ssc_p->dir_mask |= dir_mask;
236         spin_unlock_irq(&ssc_p->lock);
237 
238         return 0;
239 }
240 
241 /*
242  * Shutdown.  Clear DMA parameters and shutdown the SSC if there
243  * are no other substreams open.
244  */
245 static void atmel_ssc_shutdown(struct snd_pcm_substream *substream,
246                                struct snd_soc_dai *dai)
247 {
248         struct atmel_ssc_info *ssc_p = &ssc_info[dai->id];
249         struct atmel_pcm_dma_params *dma_params;
250         int dir, dir_mask;
251 
252         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
253                 dir = 0;
254         else
255                 dir = 1;
256 
257         dma_params = ssc_p->dma_params[dir];
258 
259         if (dma_params != NULL) {
260                 dma_params->ssc = NULL;
261                 dma_params->substream = NULL;
262                 ssc_p->dma_params[dir] = NULL;
263         }
264 
265         dir_mask = 1 << dir;
266 
267         spin_lock_irq(&ssc_p->lock);
268         ssc_p->dir_mask &= ~dir_mask;
269         if (!ssc_p->dir_mask) {
270                 if (ssc_p->initialized) {
271                         free_irq(ssc_p->ssc->irq, ssc_p);
272                         ssc_p->initialized = 0;
273                 }
274 
275                 /* Reset the SSC */
276                 ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_SWRST));
277                 /* Clear the SSC dividers */
278                 ssc_p->cmr_div = ssc_p->tcmr_period = ssc_p->rcmr_period = 0;
279         }
280         spin_unlock_irq(&ssc_p->lock);
281 
282         /* Shutdown the SSC clock. */
283         pr_debug("atmel_ssc_dai: Stopping clock\n");
284         clk_disable(ssc_p->ssc->clk);
285 }
286 
287 
288 /*
289  * Record the DAI format for use in hw_params().
290  */
291 static int atmel_ssc_set_dai_fmt(struct snd_soc_dai *cpu_dai,
292                 unsigned int fmt)
293 {
294         struct atmel_ssc_info *ssc_p = &ssc_info[cpu_dai->id];
295 
296         ssc_p->daifmt = fmt;
297         return 0;
298 }
299 
300 /*
301  * Record SSC clock dividers for use in hw_params().
302  */
303 static int atmel_ssc_set_dai_clkdiv(struct snd_soc_dai *cpu_dai,
304         int div_id, int div)
305 {
306         struct atmel_ssc_info *ssc_p = &ssc_info[cpu_dai->id];
307 
308         switch (div_id) {
309         case ATMEL_SSC_CMR_DIV:
310                 /*
311                  * The same master clock divider is used for both
312                  * transmit and receive, so if a value has already
313                  * been set, it must match this value.
314                  */
315                 if (ssc_p->dir_mask !=
316                         (SSC_DIR_MASK_PLAYBACK | SSC_DIR_MASK_CAPTURE))
317                         ssc_p->cmr_div = div;
318                 else if (ssc_p->cmr_div == 0)
319                         ssc_p->cmr_div = div;
320                 else
321                         if (div != ssc_p->cmr_div)
322                                 return -EBUSY;
323                 break;
324 
325         case ATMEL_SSC_TCMR_PERIOD:
326                 ssc_p->tcmr_period = div;
327                 break;
328 
329         case ATMEL_SSC_RCMR_PERIOD:
330                 ssc_p->rcmr_period = div;
331                 break;
332 
333         default:
334                 return -EINVAL;
335         }
336 
337         return 0;
338 }
339 
340 /*
341  * Configure the SSC.
342  */
343 static int atmel_ssc_hw_params(struct snd_pcm_substream *substream,
344         struct snd_pcm_hw_params *params,
345         struct snd_soc_dai *dai)
346 {
347         int id = dai->id;
348         struct atmel_ssc_info *ssc_p = &ssc_info[id];
349         struct ssc_device *ssc = ssc_p->ssc;
350         struct atmel_pcm_dma_params *dma_params;
351         int dir, channels, bits;
352         u32 tfmr, rfmr, tcmr, rcmr;
353         int ret;
354         int fslen, fslen_ext;
355 
356         /*
357          * Currently, there is only one set of dma params for
358          * each direction.  If more are added, this code will
359          * have to be changed to select the proper set.
360          */
361         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
362                 dir = 0;
363         else
364                 dir = 1;
365 
366         dma_params = ssc_p->dma_params[dir];
367 
368         channels = params_channels(params);
369 
370         /*
371          * Determine sample size in bits and the PDC increment.
372          */
373         switch (params_format(params)) {
374         case SNDRV_PCM_FORMAT_S8:
375                 bits = 8;
376                 dma_params->pdc_xfer_size = 1;
377                 break;
378         case SNDRV_PCM_FORMAT_S16_LE:
379                 bits = 16;
380                 dma_params->pdc_xfer_size = 2;
381                 break;
382         case SNDRV_PCM_FORMAT_S24_LE:
383                 bits = 24;
384                 dma_params->pdc_xfer_size = 4;
385                 break;
386         case SNDRV_PCM_FORMAT_S32_LE:
387                 bits = 32;
388                 dma_params->pdc_xfer_size = 4;
389                 break;
390         default:
391                 printk(KERN_WARNING "atmel_ssc_dai: unsupported PCM format");
392                 return -EINVAL;
393         }
394 
395         /*
396          * Compute SSC register settings.
397          */
398         switch (ssc_p->daifmt
399                 & (SND_SOC_DAIFMT_FORMAT_MASK | SND_SOC_DAIFMT_MASTER_MASK)) {
400 
401         case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS:
402                 /*
403                  * I2S format, SSC provides BCLK and LRC clocks.
404                  *
405                  * The SSC transmit and receive clocks are generated
406                  * from the MCK divider, and the BCLK signal
407                  * is output on the SSC TK line.
408                  */
409 
410                 if (bits > 16 && !ssc->pdata->has_fslen_ext) {
411                         dev_err(dai->dev,
412                                 "sample size %d is too large for SSC device\n",
413                                 bits);
414                         return -EINVAL;
415                 }
416 
417                 fslen_ext = (bits - 1) / 16;
418                 fslen = (bits - 1) % 16;
419 
420                 rcmr =    SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)
421                         | SSC_BF(RCMR_STTDLY, START_DELAY)
422                         | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
423                         | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
424                         | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
425                         | SSC_BF(RCMR_CKS, SSC_CKS_DIV);
426 
427                 rfmr =    SSC_BF(RFMR_FSLEN_EXT, fslen_ext)
428                         | SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
429                         | SSC_BF(RFMR_FSOS, SSC_FSOS_NEGATIVE)
430                         | SSC_BF(RFMR_FSLEN, fslen)
431                         | SSC_BF(RFMR_DATNB, (channels - 1))
432                         | SSC_BIT(RFMR_MSBF)
433                         | SSC_BF(RFMR_LOOP, 0)
434                         | SSC_BF(RFMR_DATLEN, (bits - 1));
435 
436                 tcmr =    SSC_BF(TCMR_PERIOD, ssc_p->tcmr_period)
437                         | SSC_BF(TCMR_STTDLY, START_DELAY)
438                         | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
439                         | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
440                         | SSC_BF(TCMR_CKO, SSC_CKO_CONTINUOUS)
441                         | SSC_BF(TCMR_CKS, SSC_CKS_DIV);
442 
443                 tfmr =    SSC_BF(TFMR_FSLEN_EXT, fslen_ext)
444                         | SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
445                         | SSC_BF(TFMR_FSDEN, 0)
446                         | SSC_BF(TFMR_FSOS, SSC_FSOS_NEGATIVE)
447                         | SSC_BF(TFMR_FSLEN, fslen)
448                         | SSC_BF(TFMR_DATNB, (channels - 1))
449                         | SSC_BIT(TFMR_MSBF)
450                         | SSC_BF(TFMR_DATDEF, 0)
451                         | SSC_BF(TFMR_DATLEN, (bits - 1));
452                 break;
453 
454         case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFM:
455                 /* I2S format, CODEC supplies BCLK and LRC clocks. */
456                 rcmr =    SSC_BF(RCMR_PERIOD, 0)
457                         | SSC_BF(RCMR_STTDLY, START_DELAY)
458                         | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
459                         | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
460                         | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
461                         | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
462                                            SSC_CKS_PIN : SSC_CKS_CLOCK);
463 
464                 rfmr =    SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
465                         | SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
466                         | SSC_BF(RFMR_FSLEN, 0)
467                         | SSC_BF(RFMR_DATNB, (channels - 1))
468                         | SSC_BIT(RFMR_MSBF)
469                         | SSC_BF(RFMR_LOOP, 0)
470                         | SSC_BF(RFMR_DATLEN, (bits - 1));
471 
472                 tcmr =    SSC_BF(TCMR_PERIOD, 0)
473                         | SSC_BF(TCMR_STTDLY, START_DELAY)
474                         | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
475                         | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
476                         | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
477                         | SSC_BF(TCMR_CKS, ssc->clk_from_rk_pin ?
478                                            SSC_CKS_CLOCK : SSC_CKS_PIN);
479 
480                 tfmr =    SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
481                         | SSC_BF(TFMR_FSDEN, 0)
482                         | SSC_BF(TFMR_FSOS, SSC_FSOS_NONE)
483                         | SSC_BF(TFMR_FSLEN, 0)
484                         | SSC_BF(TFMR_DATNB, (channels - 1))
485                         | SSC_BIT(TFMR_MSBF)
486                         | SSC_BF(TFMR_DATDEF, 0)
487                         | SSC_BF(TFMR_DATLEN, (bits - 1));
488                 break;
489 
490         case SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBM_CFS:
491                 /* I2S format, CODEC supplies BCLK, SSC supplies LRCLK. */
492                 if (bits > 16 && !ssc->pdata->has_fslen_ext) {
493                         dev_err(dai->dev,
494                                 "sample size %d is too large for SSC device\n",
495                                 bits);
496                         return -EINVAL;
497                 }
498 
499                 fslen_ext = (bits - 1) / 16;
500                 fslen = (bits - 1) % 16;
501 
502                 rcmr =    SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)
503                         | SSC_BF(RCMR_STTDLY, START_DELAY)
504                         | SSC_BF(RCMR_START, SSC_START_FALLING_RF)
505                         | SSC_BF(RCMR_CKI, SSC_CKI_RISING)
506                         | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
507                         | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
508                                            SSC_CKS_PIN : SSC_CKS_CLOCK);
509 
510                 rfmr =    SSC_BF(RFMR_FSLEN_EXT, fslen_ext)
511                         | SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
512                         | SSC_BF(RFMR_FSOS, SSC_FSOS_NEGATIVE)
513                         | SSC_BF(RFMR_FSLEN, fslen)
514                         | SSC_BF(RFMR_DATNB, (channels - 1))
515                         | SSC_BIT(RFMR_MSBF)
516                         | SSC_BF(RFMR_LOOP, 0)
517                         | SSC_BF(RFMR_DATLEN, (bits - 1));
518 
519                 tcmr =    SSC_BF(TCMR_PERIOD, ssc_p->tcmr_period)
520                         | SSC_BF(TCMR_STTDLY, START_DELAY)
521                         | SSC_BF(TCMR_START, SSC_START_FALLING_RF)
522                         | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
523                         | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
524                         | SSC_BF(TCMR_CKS, ssc->clk_from_rk_pin ?
525                                            SSC_CKS_CLOCK : SSC_CKS_PIN);
526 
527                 tfmr =    SSC_BF(TFMR_FSLEN_EXT, fslen_ext)
528                         | SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_NEGATIVE)
529                         | SSC_BF(TFMR_FSDEN, 0)
530                         | SSC_BF(TFMR_FSOS, SSC_FSOS_NEGATIVE)
531                         | SSC_BF(TFMR_FSLEN, fslen)
532                         | SSC_BF(TFMR_DATNB, (channels - 1))
533                         | SSC_BIT(TFMR_MSBF)
534                         | SSC_BF(TFMR_DATDEF, 0)
535                         | SSC_BF(TFMR_DATLEN, (bits - 1));
536                 break;
537 
538         case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBS_CFS:
539                 /*
540                  * DSP/PCM Mode A format, SSC provides BCLK and LRC clocks.
541                  *
542                  * The SSC transmit and receive clocks are generated from the
543                  * MCK divider, and the BCLK signal is output
544                  * on the SSC TK line.
545                  */
546                 rcmr =    SSC_BF(RCMR_PERIOD, ssc_p->rcmr_period)
547                         | SSC_BF(RCMR_STTDLY, 1)
548                         | SSC_BF(RCMR_START, SSC_START_RISING_RF)
549                         | SSC_BF(RCMR_CKI, SSC_CKI_FALLING)
550                         | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
551                         | SSC_BF(RCMR_CKS, SSC_CKS_DIV);
552 
553                 rfmr =    SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
554                         | SSC_BF(RFMR_FSOS, SSC_FSOS_POSITIVE)
555                         | SSC_BF(RFMR_FSLEN, 0)
556                         | SSC_BF(RFMR_DATNB, (channels - 1))
557                         | SSC_BIT(RFMR_MSBF)
558                         | SSC_BF(RFMR_LOOP, 0)
559                         | SSC_BF(RFMR_DATLEN, (bits - 1));
560 
561                 tcmr =    SSC_BF(TCMR_PERIOD, ssc_p->tcmr_period)
562                         | SSC_BF(TCMR_STTDLY, 1)
563                         | SSC_BF(TCMR_START, SSC_START_RISING_RF)
564                         | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
565                         | SSC_BF(TCMR_CKO, SSC_CKO_CONTINUOUS)
566                         | SSC_BF(TCMR_CKS, SSC_CKS_DIV);
567 
568                 tfmr =    SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
569                         | SSC_BF(TFMR_FSDEN, 0)
570                         | SSC_BF(TFMR_FSOS, SSC_FSOS_POSITIVE)
571                         | SSC_BF(TFMR_FSLEN, 0)
572                         | SSC_BF(TFMR_DATNB, (channels - 1))
573                         | SSC_BIT(TFMR_MSBF)
574                         | SSC_BF(TFMR_DATDEF, 0)
575                         | SSC_BF(TFMR_DATLEN, (bits - 1));
576                 break;
577 
578         case SND_SOC_DAIFMT_DSP_A | SND_SOC_DAIFMT_CBM_CFM:
579                 /*
580                  * DSP/PCM Mode A format, CODEC supplies BCLK and LRC clocks.
581                  *
582                  * Data is transferred on first BCLK after LRC pulse rising
583                  * edge.If stereo, the right channel data is contiguous with
584                  * the left channel data.
585                  */
586                 rcmr =    SSC_BF(RCMR_PERIOD, 0)
587                         | SSC_BF(RCMR_STTDLY, START_DELAY)
588                         | SSC_BF(RCMR_START, SSC_START_RISING_RF)
589                         | SSC_BF(RCMR_CKI, SSC_CKI_FALLING)
590                         | SSC_BF(RCMR_CKO, SSC_CKO_NONE)
591                         | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
592                                            SSC_CKS_PIN : SSC_CKS_CLOCK);
593 
594                 rfmr =    SSC_BF(RFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
595                         | SSC_BF(RFMR_FSOS, SSC_FSOS_NONE)
596                         | SSC_BF(RFMR_FSLEN, 0)
597                         | SSC_BF(RFMR_DATNB, (channels - 1))
598                         | SSC_BIT(RFMR_MSBF)
599                         | SSC_BF(RFMR_LOOP, 0)
600                         | SSC_BF(RFMR_DATLEN, (bits - 1));
601 
602                 tcmr =    SSC_BF(TCMR_PERIOD, 0)
603                         | SSC_BF(TCMR_STTDLY, START_DELAY)
604                         | SSC_BF(TCMR_START, SSC_START_RISING_RF)
605                         | SSC_BF(TCMR_CKI, SSC_CKI_FALLING)
606                         | SSC_BF(TCMR_CKO, SSC_CKO_NONE)
607                         | SSC_BF(RCMR_CKS, ssc->clk_from_rk_pin ?
608                                            SSC_CKS_CLOCK : SSC_CKS_PIN);
609 
610                 tfmr =    SSC_BF(TFMR_FSEDGE, SSC_FSEDGE_POSITIVE)
611                         | SSC_BF(TFMR_FSDEN, 0)
612                         | SSC_BF(TFMR_FSOS, SSC_FSOS_NONE)
613                         | SSC_BF(TFMR_FSLEN, 0)
614                         | SSC_BF(TFMR_DATNB, (channels - 1))
615                         | SSC_BIT(TFMR_MSBF)
616                         | SSC_BF(TFMR_DATDEF, 0)
617                         | SSC_BF(TFMR_DATLEN, (bits - 1));
618                 break;
619 
620         default:
621                 printk(KERN_WARNING "atmel_ssc_dai: unsupported DAI format 0x%x\n",
622                         ssc_p->daifmt);
623                 return -EINVAL;
624         }
625         pr_debug("atmel_ssc_hw_params: "
626                         "RCMR=%08x RFMR=%08x TCMR=%08x TFMR=%08x\n",
627                         rcmr, rfmr, tcmr, tfmr);
628 
629         if (!ssc_p->initialized) {
630                 if (!ssc_p->ssc->pdata->use_dma) {
631                         ssc_writel(ssc_p->ssc->regs, PDC_RPR, 0);
632                         ssc_writel(ssc_p->ssc->regs, PDC_RCR, 0);
633                         ssc_writel(ssc_p->ssc->regs, PDC_RNPR, 0);
634                         ssc_writel(ssc_p->ssc->regs, PDC_RNCR, 0);
635 
636                         ssc_writel(ssc_p->ssc->regs, PDC_TPR, 0);
637                         ssc_writel(ssc_p->ssc->regs, PDC_TCR, 0);
638                         ssc_writel(ssc_p->ssc->regs, PDC_TNPR, 0);
639                         ssc_writel(ssc_p->ssc->regs, PDC_TNCR, 0);
640                 }
641 
642                 ret = request_irq(ssc_p->ssc->irq, atmel_ssc_interrupt, 0,
643                                 ssc_p->name, ssc_p);
644                 if (ret < 0) {
645                         printk(KERN_WARNING
646                                         "atmel_ssc_dai: request_irq failure\n");
647                         pr_debug("Atmel_ssc_dai: Stoping clock\n");
648                         clk_disable(ssc_p->ssc->clk);
649                         return ret;
650                 }
651 
652                 ssc_p->initialized = 1;
653         }
654 
655         /* set SSC clock mode register */
656         ssc_writel(ssc_p->ssc->regs, CMR, ssc_p->cmr_div);
657 
658         /* set receive clock mode and format */
659         ssc_writel(ssc_p->ssc->regs, RCMR, rcmr);
660         ssc_writel(ssc_p->ssc->regs, RFMR, rfmr);
661 
662         /* set transmit clock mode and format */
663         ssc_writel(ssc_p->ssc->regs, TCMR, tcmr);
664         ssc_writel(ssc_p->ssc->regs, TFMR, tfmr);
665 
666         pr_debug("atmel_ssc_dai,hw_params: SSC initialized\n");
667         return 0;
668 }
669 
670 
671 static int atmel_ssc_prepare(struct snd_pcm_substream *substream,
672                              struct snd_soc_dai *dai)
673 {
674         struct atmel_ssc_info *ssc_p = &ssc_info[dai->id];
675         struct atmel_pcm_dma_params *dma_params;
676         int dir;
677 
678         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
679                 dir = 0;
680         else
681                 dir = 1;
682 
683         dma_params = ssc_p->dma_params[dir];
684 
685         ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
686         ssc_writel(ssc_p->ssc->regs, IDR, dma_params->mask->ssc_error);
687 
688         pr_debug("%s enabled SSC_SR=0x%08x\n",
689                         dir ? "receive" : "transmit",
690                         ssc_readl(ssc_p->ssc->regs, SR));
691         return 0;
692 }
693 
694 static int atmel_ssc_trigger(struct snd_pcm_substream *substream,
695                              int cmd, struct snd_soc_dai *dai)
696 {
697         struct atmel_ssc_info *ssc_p = &ssc_info[dai->id];
698         struct atmel_pcm_dma_params *dma_params;
699         int dir;
700 
701         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
702                 dir = 0;
703         else
704                 dir = 1;
705 
706         dma_params = ssc_p->dma_params[dir];
707 
708         switch (cmd) {
709         case SNDRV_PCM_TRIGGER_START:
710         case SNDRV_PCM_TRIGGER_RESUME:
711         case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
712                 ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_enable);
713                 break;
714         default:
715                 ssc_writel(ssc_p->ssc->regs, CR, dma_params->mask->ssc_disable);
716                 break;
717         }
718 
719         return 0;
720 }
721 
722 #ifdef CONFIG_PM
723 static int atmel_ssc_suspend(struct snd_soc_dai *cpu_dai)
724 {
725         struct atmel_ssc_info *ssc_p;
726 
727         if (!cpu_dai->active)
728                 return 0;
729 
730         ssc_p = &ssc_info[cpu_dai->id];
731 
732         /* Save the status register before disabling transmit and receive */
733         ssc_p->ssc_state.ssc_sr = ssc_readl(ssc_p->ssc->regs, SR);
734         ssc_writel(ssc_p->ssc->regs, CR, SSC_BIT(CR_TXDIS) | SSC_BIT(CR_RXDIS));
735 
736         /* Save the current interrupt mask, then disable unmasked interrupts */
737         ssc_p->ssc_state.ssc_imr = ssc_readl(ssc_p->ssc->regs, IMR);
738         ssc_writel(ssc_p->ssc->regs, IDR, ssc_p->ssc_state.ssc_imr);
739 
740         ssc_p->ssc_state.ssc_cmr = ssc_readl(ssc_p->ssc->regs, CMR);
741         ssc_p->ssc_state.ssc_rcmr = ssc_readl(ssc_p->ssc->regs, RCMR);
742         ssc_p->ssc_state.ssc_rfmr = ssc_readl(ssc_p->ssc->regs, RFMR);
743         ssc_p->ssc_state.ssc_tcmr = ssc_readl(ssc_p->ssc->regs, TCMR);
744         ssc_p->ssc_state.ssc_tfmr = ssc_readl(ssc_p->ssc->regs, TFMR);
745 
746         return 0;
747 }
748 
749 
750 
751 static int atmel_ssc_resume(struct snd_soc_dai *cpu_dai)
752 {
753         struct atmel_ssc_info *ssc_p;
754         u32 cr;
755 
756         if (!cpu_dai->active)
757                 return 0;
758 
759         ssc_p = &ssc_info[cpu_dai->id];
760 
761         /* restore SSC register settings */
762         ssc_writel(ssc_p->ssc->regs, TFMR, ssc_p->ssc_state.ssc_tfmr);
763         ssc_writel(ssc_p->ssc->regs, TCMR, ssc_p->ssc_state.ssc_tcmr);
764         ssc_writel(ssc_p->ssc->regs, RFMR, ssc_p->ssc_state.ssc_rfmr);
765         ssc_writel(ssc_p->ssc->regs, RCMR, ssc_p->ssc_state.ssc_rcmr);
766         ssc_writel(ssc_p->ssc->regs, CMR, ssc_p->ssc_state.ssc_cmr);
767 
768         /* re-enable interrupts */
769         ssc_writel(ssc_p->ssc->regs, IER, ssc_p->ssc_state.ssc_imr);
770 
771         /* Re-enable receive and transmit as appropriate */
772         cr = 0;
773         cr |=
774             (ssc_p->ssc_state.ssc_sr & SSC_BIT(SR_RXEN)) ? SSC_BIT(CR_RXEN) : 0;
775         cr |=
776             (ssc_p->ssc_state.ssc_sr & SSC_BIT(SR_TXEN)) ? SSC_BIT(CR_TXEN) : 0;
777         ssc_writel(ssc_p->ssc->regs, CR, cr);
778 
779         return 0;
780 }
781 #else /* CONFIG_PM */
782 #  define atmel_ssc_suspend     NULL
783 #  define atmel_ssc_resume      NULL
784 #endif /* CONFIG_PM */
785 
786 #define ATMEL_SSC_RATES (SNDRV_PCM_RATE_8000_96000)
787 
788 #define ATMEL_SSC_FORMATS (SNDRV_PCM_FMTBIT_S8     | SNDRV_PCM_FMTBIT_S16_LE |\
789                           SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S32_LE)
790 
791 static const struct snd_soc_dai_ops atmel_ssc_dai_ops = {
792         .startup        = atmel_ssc_startup,
793         .shutdown       = atmel_ssc_shutdown,
794         .prepare        = atmel_ssc_prepare,
795         .trigger        = atmel_ssc_trigger,
796         .hw_params      = atmel_ssc_hw_params,
797         .set_fmt        = atmel_ssc_set_dai_fmt,
798         .set_clkdiv     = atmel_ssc_set_dai_clkdiv,
799 };
800 
801 static struct snd_soc_dai_driver atmel_ssc_dai = {
802                 .suspend = atmel_ssc_suspend,
803                 .resume = atmel_ssc_resume,
804                 .playback = {
805                         .channels_min = 1,
806                         .channels_max = 2,
807                         .rates = ATMEL_SSC_RATES,
808                         .formats = ATMEL_SSC_FORMATS,},
809                 .capture = {
810                         .channels_min = 1,
811                         .channels_max = 2,
812                         .rates = ATMEL_SSC_RATES,
813                         .formats = ATMEL_SSC_FORMATS,},
814                 .ops = &atmel_ssc_dai_ops,
815 };
816 
817 static const struct snd_soc_component_driver atmel_ssc_component = {
818         .name           = "atmel-ssc",
819 };
820 
821 static int asoc_ssc_init(struct device *dev)
822 {
823         struct platform_device *pdev = to_platform_device(dev);
824         struct ssc_device *ssc = platform_get_drvdata(pdev);
825         int ret;
826 
827         ret = snd_soc_register_component(dev, &atmel_ssc_component,
828                                          &atmel_ssc_dai, 1);
829         if (ret) {
830                 dev_err(dev, "Could not register DAI: %d\n", ret);
831                 goto err;
832         }
833 
834         if (ssc->pdata->use_dma)
835                 ret = atmel_pcm_dma_platform_register(dev);
836         else
837                 ret = atmel_pcm_pdc_platform_register(dev);
838 
839         if (ret) {
840                 dev_err(dev, "Could not register PCM: %d\n", ret);
841                 goto err_unregister_dai;
842         }
843 
844         return 0;
845 
846 err_unregister_dai:
847         snd_soc_unregister_component(dev);
848 err:
849         return ret;
850 }
851 
852 static void asoc_ssc_exit(struct device *dev)
853 {
854         struct platform_device *pdev = to_platform_device(dev);
855         struct ssc_device *ssc = platform_get_drvdata(pdev);
856 
857         if (ssc->pdata->use_dma)
858                 atmel_pcm_dma_platform_unregister(dev);
859         else
860                 atmel_pcm_pdc_platform_unregister(dev);
861 
862         snd_soc_unregister_component(dev);
863 }
864 
865 /**
866  * atmel_ssc_set_audio - Allocate the specified SSC for audio use.
867  */
868 int atmel_ssc_set_audio(int ssc_id)
869 {
870         struct ssc_device *ssc;
871         int ret;
872 
873         /* If we can grab the SSC briefly to parent the DAI device off it */
874         ssc = ssc_request(ssc_id);
875         if (IS_ERR(ssc)) {
876                 pr_err("Unable to parent ASoC SSC DAI on SSC: %ld\n",
877                         PTR_ERR(ssc));
878                 return PTR_ERR(ssc);
879         } else {
880                 ssc_info[ssc_id].ssc = ssc;
881         }
882 
883         ret = asoc_ssc_init(&ssc->pdev->dev);
884 
885         return ret;
886 }
887 EXPORT_SYMBOL_GPL(atmel_ssc_set_audio);
888 
889 void atmel_ssc_put_audio(int ssc_id)
890 {
891         struct ssc_device *ssc = ssc_info[ssc_id].ssc;
892 
893         asoc_ssc_exit(&ssc->pdev->dev);
894         ssc_free(ssc);
895 }
896 EXPORT_SYMBOL_GPL(atmel_ssc_put_audio);
897 
898 /* Module information */
899 MODULE_AUTHOR("Sedji Gaouaou, sedji.gaouaou@atmel.com, www.atmel.com");
900 MODULE_DESCRIPTION("ATMEL SSC ASoC Interface");
901 MODULE_LICENSE("GPL");
902 

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