Version:  2.0.40 2.2.26 2.4.37 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16

Linux/sound/pci/rme9652/hdsp.c

  1 /*
  2  *   ALSA driver for RME Hammerfall DSP audio interface(s)
  3  *
  4  *      Copyright (c) 2002  Paul Davis
  5  *                          Marcus Andersson
  6  *                          Thomas Charbonnel
  7  *
  8  *   This program is free software; you can redistribute it and/or modify
  9  *   it under the terms of the GNU General Public License as published by
 10  *   the Free Software Foundation; either version 2 of the License, or
 11  *   (at your option) any later version.
 12  *
 13  *   This program is distributed in the hope that it will be useful,
 14  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 15  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16  *   GNU General Public License for more details.
 17  *
 18  *   You should have received a copy of the GNU General Public License
 19  *   along with this program; if not, write to the Free Software
 20  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 21  *
 22  */
 23 
 24 #include <linux/init.h>
 25 #include <linux/delay.h>
 26 #include <linux/interrupt.h>
 27 #include <linux/slab.h>
 28 #include <linux/pci.h>
 29 #include <linux/firmware.h>
 30 #include <linux/moduleparam.h>
 31 #include <linux/math64.h>
 32 
 33 #include <sound/core.h>
 34 #include <sound/control.h>
 35 #include <sound/pcm.h>
 36 #include <sound/info.h>
 37 #include <sound/asoundef.h>
 38 #include <sound/rawmidi.h>
 39 #include <sound/hwdep.h>
 40 #include <sound/initval.h>
 41 #include <sound/hdsp.h>
 42 
 43 #include <asm/byteorder.h>
 44 #include <asm/current.h>
 45 #include <asm/io.h>
 46 
 47 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 0-MAX */
 48 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
 49 static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;      /* Enable this card */
 50 
 51 module_param_array(index, int, NULL, 0444);
 52 MODULE_PARM_DESC(index, "Index value for RME Hammerfall DSP interface.");
 53 module_param_array(id, charp, NULL, 0444);
 54 MODULE_PARM_DESC(id, "ID string for RME Hammerfall DSP interface.");
 55 module_param_array(enable, bool, NULL, 0444);
 56 MODULE_PARM_DESC(enable, "Enable/disable specific Hammerfall DSP soundcards.");
 57 MODULE_AUTHOR("Paul Davis <paul@linuxaudiosystems.com>, Marcus Andersson, Thomas Charbonnel <thomas@undata.org>");
 58 MODULE_DESCRIPTION("RME Hammerfall DSP");
 59 MODULE_LICENSE("GPL");
 60 MODULE_SUPPORTED_DEVICE("{{RME Hammerfall-DSP},"
 61                 "{RME HDSP-9652},"
 62                 "{RME HDSP-9632}}");
 63 #ifdef HDSP_FW_LOADER
 64 MODULE_FIRMWARE("multiface_firmware.bin");
 65 MODULE_FIRMWARE("multiface_firmware_rev11.bin");
 66 MODULE_FIRMWARE("digiface_firmware.bin");
 67 MODULE_FIRMWARE("digiface_firmware_rev11.bin");
 68 #endif
 69 
 70 #define HDSP_MAX_CHANNELS        26
 71 #define HDSP_MAX_DS_CHANNELS     14
 72 #define HDSP_MAX_QS_CHANNELS     8
 73 #define DIGIFACE_SS_CHANNELS     26
 74 #define DIGIFACE_DS_CHANNELS     14
 75 #define MULTIFACE_SS_CHANNELS    18
 76 #define MULTIFACE_DS_CHANNELS    14
 77 #define H9652_SS_CHANNELS        26
 78 #define H9652_DS_CHANNELS        14
 79 /* This does not include possible Analog Extension Boards
 80    AEBs are detected at card initialization
 81 */
 82 #define H9632_SS_CHANNELS        12
 83 #define H9632_DS_CHANNELS        8
 84 #define H9632_QS_CHANNELS        4
 85 
 86 /* Write registers. These are defined as byte-offsets from the iobase value.
 87  */
 88 #define HDSP_resetPointer               0
 89 #define HDSP_freqReg                    0
 90 #define HDSP_outputBufferAddress        32
 91 #define HDSP_inputBufferAddress         36
 92 #define HDSP_controlRegister            64
 93 #define HDSP_interruptConfirmation      96
 94 #define HDSP_outputEnable               128
 95 #define HDSP_control2Reg                256
 96 #define HDSP_midiDataOut0               352
 97 #define HDSP_midiDataOut1               356
 98 #define HDSP_fifoData                   368
 99 #define HDSP_inputEnable                384
100 
101 /* Read registers. These are defined as byte-offsets from the iobase value
102  */
103 
104 #define HDSP_statusRegister    0
105 #define HDSP_timecode        128
106 #define HDSP_status2Register 192
107 #define HDSP_midiDataIn0     360
108 #define HDSP_midiDataIn1     364
109 #define HDSP_midiStatusOut0  384
110 #define HDSP_midiStatusOut1  388
111 #define HDSP_midiStatusIn0   392
112 #define HDSP_midiStatusIn1   396
113 #define HDSP_fifoStatus      400
114 
115 /* the meters are regular i/o-mapped registers, but offset
116    considerably from the rest. the peak registers are reset
117    when read; the least-significant 4 bits are full-scale counters;
118    the actual peak value is in the most-significant 24 bits.
119 */
120 
121 #define HDSP_playbackPeakLevel  4096  /* 26 * 32 bit values */
122 #define HDSP_inputPeakLevel     4224  /* 26 * 32 bit values */
123 #define HDSP_outputPeakLevel    4352  /* (26+2) * 32 bit values */
124 #define HDSP_playbackRmsLevel   4612  /* 26 * 64 bit values */
125 #define HDSP_inputRmsLevel      4868  /* 26 * 64 bit values */
126 
127 
128 /* This is for H9652 cards
129    Peak values are read downward from the base
130    Rms values are read upward
131    There are rms values for the outputs too
132    26*3 values are read in ss mode
133    14*3 in ds mode, with no gap between values
134 */
135 #define HDSP_9652_peakBase      7164
136 #define HDSP_9652_rmsBase       4096
137 
138 /* c.f. the hdsp_9632_meters_t struct */
139 #define HDSP_9632_metersBase    4096
140 
141 #define HDSP_IO_EXTENT     7168
142 
143 /* control2 register bits */
144 
145 #define HDSP_TMS                0x01
146 #define HDSP_TCK                0x02
147 #define HDSP_TDI                0x04
148 #define HDSP_JTAG               0x08
149 #define HDSP_PWDN               0x10
150 #define HDSP_PROGRAM            0x020
151 #define HDSP_CONFIG_MODE_0      0x040
152 #define HDSP_CONFIG_MODE_1      0x080
153 #define HDSP_VERSION_BIT        0x100
154 #define HDSP_BIGENDIAN_MODE     0x200
155 #define HDSP_RD_MULTIPLE        0x400
156 #define HDSP_9652_ENABLE_MIXER  0x800
157 #define HDSP_TDO                0x10000000
158 
159 #define HDSP_S_PROGRAM          (HDSP_PROGRAM|HDSP_CONFIG_MODE_0)
160 #define HDSP_S_LOAD             (HDSP_PROGRAM|HDSP_CONFIG_MODE_1)
161 
162 /* Control Register bits */
163 
164 #define HDSP_Start                (1<<0)  /* start engine */
165 #define HDSP_Latency0             (1<<1)  /* buffer size = 2^n where n is defined by Latency{2,1,0} */
166 #define HDSP_Latency1             (1<<2)  /* [ see above ] */
167 #define HDSP_Latency2             (1<<3)  /* [ see above ] */
168 #define HDSP_ClockModeMaster      (1<<4)  /* 1=Master, 0=Slave/Autosync */
169 #define HDSP_AudioInterruptEnable (1<<5)  /* what do you think ? */
170 #define HDSP_Frequency0           (1<<6)  /* 0=44.1kHz/88.2kHz/176.4kHz 1=48kHz/96kHz/192kHz */
171 #define HDSP_Frequency1           (1<<7)  /* 0=32kHz/64kHz/128kHz */
172 #define HDSP_DoubleSpeed          (1<<8)  /* 0=normal speed, 1=double speed */
173 #define HDSP_SPDIFProfessional    (1<<9)  /* 0=consumer, 1=professional */
174 #define HDSP_SPDIFEmphasis        (1<<10) /* 0=none, 1=on */
175 #define HDSP_SPDIFNonAudio        (1<<11) /* 0=off, 1=on */
176 #define HDSP_SPDIFOpticalOut      (1<<12) /* 1=use 1st ADAT connector for SPDIF, 0=do not */
177 #define HDSP_SyncRef2             (1<<13)
178 #define HDSP_SPDIFInputSelect0    (1<<14)
179 #define HDSP_SPDIFInputSelect1    (1<<15)
180 #define HDSP_SyncRef0             (1<<16)
181 #define HDSP_SyncRef1             (1<<17)
182 #define HDSP_AnalogExtensionBoard (1<<18) /* For H9632 cards */
183 #define HDSP_XLRBreakoutCable     (1<<20) /* For H9632 cards */
184 #define HDSP_Midi0InterruptEnable (1<<22)
185 #define HDSP_Midi1InterruptEnable (1<<23)
186 #define HDSP_LineOut              (1<<24)
187 #define HDSP_ADGain0              (1<<25) /* From here : H9632 specific */
188 #define HDSP_ADGain1              (1<<26)
189 #define HDSP_DAGain0              (1<<27)
190 #define HDSP_DAGain1              (1<<28)
191 #define HDSP_PhoneGain0           (1<<29)
192 #define HDSP_PhoneGain1           (1<<30)
193 #define HDSP_QuadSpeed            (1<<31)
194 
195 #define HDSP_ADGainMask       (HDSP_ADGain0|HDSP_ADGain1)
196 #define HDSP_ADGainMinus10dBV  HDSP_ADGainMask
197 #define HDSP_ADGainPlus4dBu   (HDSP_ADGain0)
198 #define HDSP_ADGainLowGain     0
199 
200 #define HDSP_DAGainMask         (HDSP_DAGain0|HDSP_DAGain1)
201 #define HDSP_DAGainHighGain      HDSP_DAGainMask
202 #define HDSP_DAGainPlus4dBu     (HDSP_DAGain0)
203 #define HDSP_DAGainMinus10dBV    0
204 
205 #define HDSP_PhoneGainMask      (HDSP_PhoneGain0|HDSP_PhoneGain1)
206 #define HDSP_PhoneGain0dB        HDSP_PhoneGainMask
207 #define HDSP_PhoneGainMinus6dB  (HDSP_PhoneGain0)
208 #define HDSP_PhoneGainMinus12dB  0
209 
210 #define HDSP_LatencyMask    (HDSP_Latency0|HDSP_Latency1|HDSP_Latency2)
211 #define HDSP_FrequencyMask  (HDSP_Frequency0|HDSP_Frequency1|HDSP_DoubleSpeed|HDSP_QuadSpeed)
212 
213 #define HDSP_SPDIFInputMask    (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
214 #define HDSP_SPDIFInputADAT1    0
215 #define HDSP_SPDIFInputCoaxial (HDSP_SPDIFInputSelect0)
216 #define HDSP_SPDIFInputCdrom   (HDSP_SPDIFInputSelect1)
217 #define HDSP_SPDIFInputAES     (HDSP_SPDIFInputSelect0|HDSP_SPDIFInputSelect1)
218 
219 #define HDSP_SyncRefMask        (HDSP_SyncRef0|HDSP_SyncRef1|HDSP_SyncRef2)
220 #define HDSP_SyncRef_ADAT1       0
221 #define HDSP_SyncRef_ADAT2      (HDSP_SyncRef0)
222 #define HDSP_SyncRef_ADAT3      (HDSP_SyncRef1)
223 #define HDSP_SyncRef_SPDIF      (HDSP_SyncRef0|HDSP_SyncRef1)
224 #define HDSP_SyncRef_WORD       (HDSP_SyncRef2)
225 #define HDSP_SyncRef_ADAT_SYNC  (HDSP_SyncRef0|HDSP_SyncRef2)
226 
227 /* Sample Clock Sources */
228 
229 #define HDSP_CLOCK_SOURCE_AUTOSYNC           0
230 #define HDSP_CLOCK_SOURCE_INTERNAL_32KHZ     1
231 #define HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ   2
232 #define HDSP_CLOCK_SOURCE_INTERNAL_48KHZ     3
233 #define HDSP_CLOCK_SOURCE_INTERNAL_64KHZ     4
234 #define HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ   5
235 #define HDSP_CLOCK_SOURCE_INTERNAL_96KHZ     6
236 #define HDSP_CLOCK_SOURCE_INTERNAL_128KHZ    7
237 #define HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ  8
238 #define HDSP_CLOCK_SOURCE_INTERNAL_192KHZ    9
239 
240 /* Preferred sync reference choices - used by "pref_sync_ref" control switch */
241 
242 #define HDSP_SYNC_FROM_WORD      0
243 #define HDSP_SYNC_FROM_SPDIF     1
244 #define HDSP_SYNC_FROM_ADAT1     2
245 #define HDSP_SYNC_FROM_ADAT_SYNC 3
246 #define HDSP_SYNC_FROM_ADAT2     4
247 #define HDSP_SYNC_FROM_ADAT3     5
248 
249 /* SyncCheck status */
250 
251 #define HDSP_SYNC_CHECK_NO_LOCK 0
252 #define HDSP_SYNC_CHECK_LOCK    1
253 #define HDSP_SYNC_CHECK_SYNC    2
254 
255 /* AutoSync references - used by "autosync_ref" control switch */
256 
257 #define HDSP_AUTOSYNC_FROM_WORD      0
258 #define HDSP_AUTOSYNC_FROM_ADAT_SYNC 1
259 #define HDSP_AUTOSYNC_FROM_SPDIF     2
260 #define HDSP_AUTOSYNC_FROM_NONE      3
261 #define HDSP_AUTOSYNC_FROM_ADAT1     4
262 #define HDSP_AUTOSYNC_FROM_ADAT2     5
263 #define HDSP_AUTOSYNC_FROM_ADAT3     6
264 
265 /* Possible sources of S/PDIF input */
266 
267 #define HDSP_SPDIFIN_OPTICAL  0 /* optical  (ADAT1) */
268 #define HDSP_SPDIFIN_COAXIAL  1 /* coaxial (RCA) */
269 #define HDSP_SPDIFIN_INTERNAL 2 /* internal (CDROM) */
270 #define HDSP_SPDIFIN_AES      3 /* xlr for H9632 (AES)*/
271 
272 #define HDSP_Frequency32KHz    HDSP_Frequency0
273 #define HDSP_Frequency44_1KHz  HDSP_Frequency1
274 #define HDSP_Frequency48KHz    (HDSP_Frequency1|HDSP_Frequency0)
275 #define HDSP_Frequency64KHz    (HDSP_DoubleSpeed|HDSP_Frequency0)
276 #define HDSP_Frequency88_2KHz  (HDSP_DoubleSpeed|HDSP_Frequency1)
277 #define HDSP_Frequency96KHz    (HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
278 /* For H9632 cards */
279 #define HDSP_Frequency128KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency0)
280 #define HDSP_Frequency176_4KHz (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1)
281 #define HDSP_Frequency192KHz   (HDSP_QuadSpeed|HDSP_DoubleSpeed|HDSP_Frequency1|HDSP_Frequency0)
282 /* RME says n = 104857600000000, but in the windows MADI driver, I see:
283         return 104857600000000 / rate; // 100 MHz
284         return 110100480000000 / rate; // 105 MHz
285 */
286 #define DDS_NUMERATOR 104857600000000ULL;  /*  =  2^20 * 10^8 */
287 
288 #define hdsp_encode_latency(x)       (((x)<<1) & HDSP_LatencyMask)
289 #define hdsp_decode_latency(x)       (((x) & HDSP_LatencyMask)>>1)
290 
291 #define hdsp_encode_spdif_in(x) (((x)&0x3)<<14)
292 #define hdsp_decode_spdif_in(x) (((x)>>14)&0x3)
293 
294 /* Status Register bits */
295 
296 #define HDSP_audioIRQPending    (1<<0)
297 #define HDSP_Lock2              (1<<1)     /* this is for Digiface and H9652 */
298 #define HDSP_spdifFrequency3    HDSP_Lock2 /* this is for H9632 only */
299 #define HDSP_Lock1              (1<<2)
300 #define HDSP_Lock0              (1<<3)
301 #define HDSP_SPDIFSync          (1<<4)
302 #define HDSP_TimecodeLock       (1<<5)
303 #define HDSP_BufferPositionMask 0x000FFC0 /* Bit 6..15 : h/w buffer pointer */
304 #define HDSP_Sync2              (1<<16)
305 #define HDSP_Sync1              (1<<17)
306 #define HDSP_Sync0              (1<<18)
307 #define HDSP_DoubleSpeedStatus  (1<<19)
308 #define HDSP_ConfigError        (1<<20)
309 #define HDSP_DllError           (1<<21)
310 #define HDSP_spdifFrequency0    (1<<22)
311 #define HDSP_spdifFrequency1    (1<<23)
312 #define HDSP_spdifFrequency2    (1<<24)
313 #define HDSP_SPDIFErrorFlag     (1<<25)
314 #define HDSP_BufferID           (1<<26)
315 #define HDSP_TimecodeSync       (1<<27)
316 #define HDSP_AEBO               (1<<28) /* H9632 specific Analog Extension Boards */
317 #define HDSP_AEBI               (1<<29) /* 0 = present, 1 = absent */
318 #define HDSP_midi0IRQPending    (1<<30)
319 #define HDSP_midi1IRQPending    (1<<31)
320 
321 #define HDSP_spdifFrequencyMask    (HDSP_spdifFrequency0|HDSP_spdifFrequency1|HDSP_spdifFrequency2)
322 #define HDSP_spdifFrequencyMask_9632 (HDSP_spdifFrequency0|\
323                                       HDSP_spdifFrequency1|\
324                                       HDSP_spdifFrequency2|\
325                                       HDSP_spdifFrequency3)
326 
327 #define HDSP_spdifFrequency32KHz   (HDSP_spdifFrequency0)
328 #define HDSP_spdifFrequency44_1KHz (HDSP_spdifFrequency1)
329 #define HDSP_spdifFrequency48KHz   (HDSP_spdifFrequency0|HDSP_spdifFrequency1)
330 
331 #define HDSP_spdifFrequency64KHz   (HDSP_spdifFrequency2)
332 #define HDSP_spdifFrequency88_2KHz (HDSP_spdifFrequency0|HDSP_spdifFrequency2)
333 #define HDSP_spdifFrequency96KHz   (HDSP_spdifFrequency2|HDSP_spdifFrequency1)
334 
335 /* This is for H9632 cards */
336 #define HDSP_spdifFrequency128KHz   (HDSP_spdifFrequency0|\
337                                      HDSP_spdifFrequency1|\
338                                      HDSP_spdifFrequency2)
339 #define HDSP_spdifFrequency176_4KHz HDSP_spdifFrequency3
340 #define HDSP_spdifFrequency192KHz   (HDSP_spdifFrequency3|HDSP_spdifFrequency0)
341 
342 /* Status2 Register bits */
343 
344 #define HDSP_version0     (1<<0)
345 #define HDSP_version1     (1<<1)
346 #define HDSP_version2     (1<<2)
347 #define HDSP_wc_lock      (1<<3)
348 #define HDSP_wc_sync      (1<<4)
349 #define HDSP_inp_freq0    (1<<5)
350 #define HDSP_inp_freq1    (1<<6)
351 #define HDSP_inp_freq2    (1<<7)
352 #define HDSP_SelSyncRef0  (1<<8)
353 #define HDSP_SelSyncRef1  (1<<9)
354 #define HDSP_SelSyncRef2  (1<<10)
355 
356 #define HDSP_wc_valid (HDSP_wc_lock|HDSP_wc_sync)
357 
358 #define HDSP_systemFrequencyMask (HDSP_inp_freq0|HDSP_inp_freq1|HDSP_inp_freq2)
359 #define HDSP_systemFrequency32   (HDSP_inp_freq0)
360 #define HDSP_systemFrequency44_1 (HDSP_inp_freq1)
361 #define HDSP_systemFrequency48   (HDSP_inp_freq0|HDSP_inp_freq1)
362 #define HDSP_systemFrequency64   (HDSP_inp_freq2)
363 #define HDSP_systemFrequency88_2 (HDSP_inp_freq0|HDSP_inp_freq2)
364 #define HDSP_systemFrequency96   (HDSP_inp_freq1|HDSP_inp_freq2)
365 /* FIXME : more values for 9632 cards ? */
366 
367 #define HDSP_SelSyncRefMask        (HDSP_SelSyncRef0|HDSP_SelSyncRef1|HDSP_SelSyncRef2)
368 #define HDSP_SelSyncRef_ADAT1      0
369 #define HDSP_SelSyncRef_ADAT2      (HDSP_SelSyncRef0)
370 #define HDSP_SelSyncRef_ADAT3      (HDSP_SelSyncRef1)
371 #define HDSP_SelSyncRef_SPDIF      (HDSP_SelSyncRef0|HDSP_SelSyncRef1)
372 #define HDSP_SelSyncRef_WORD       (HDSP_SelSyncRef2)
373 #define HDSP_SelSyncRef_ADAT_SYNC  (HDSP_SelSyncRef0|HDSP_SelSyncRef2)
374 
375 /* Card state flags */
376 
377 #define HDSP_InitializationComplete  (1<<0)
378 #define HDSP_FirmwareLoaded          (1<<1)
379 #define HDSP_FirmwareCached          (1<<2)
380 
381 /* FIFO wait times, defined in terms of 1/10ths of msecs */
382 
383 #define HDSP_LONG_WAIT   5000
384 #define HDSP_SHORT_WAIT  30
385 
386 #define UNITY_GAIN                       32768
387 #define MINUS_INFINITY_GAIN              0
388 
389 /* the size of a substream (1 mono data stream) */
390 
391 #define HDSP_CHANNEL_BUFFER_SAMPLES  (16*1024)
392 #define HDSP_CHANNEL_BUFFER_BYTES    (4*HDSP_CHANNEL_BUFFER_SAMPLES)
393 
394 /* the size of the area we need to allocate for DMA transfers. the
395    size is the same regardless of the number of channels - the
396    Multiface still uses the same memory area.
397 
398    Note that we allocate 1 more channel than is apparently needed
399    because the h/w seems to write 1 byte beyond the end of the last
400    page. Sigh.
401 */
402 
403 #define HDSP_DMA_AREA_BYTES ((HDSP_MAX_CHANNELS+1) * HDSP_CHANNEL_BUFFER_BYTES)
404 #define HDSP_DMA_AREA_KILOBYTES (HDSP_DMA_AREA_BYTES/1024)
405 
406 /* use hotplug firmware loader? */
407 #if defined(CONFIG_FW_LOADER) || defined(CONFIG_FW_LOADER_MODULE)
408 #if !defined(HDSP_USE_HWDEP_LOADER)
409 #define HDSP_FW_LOADER
410 #endif
411 #endif
412 
413 struct hdsp_9632_meters {
414     u32 input_peak[16];
415     u32 playback_peak[16];
416     u32 output_peak[16];
417     u32 xxx_peak[16];
418     u32 padding[64];
419     u32 input_rms_low[16];
420     u32 playback_rms_low[16];
421     u32 output_rms_low[16];
422     u32 xxx_rms_low[16];
423     u32 input_rms_high[16];
424     u32 playback_rms_high[16];
425     u32 output_rms_high[16];
426     u32 xxx_rms_high[16];
427 };
428 
429 struct hdsp_midi {
430     struct hdsp             *hdsp;
431     int                      id;
432     struct snd_rawmidi           *rmidi;
433     struct snd_rawmidi_substream *input;
434     struct snd_rawmidi_substream *output;
435     char                     istimer; /* timer in use */
436     struct timer_list        timer;
437     spinlock_t               lock;
438     int                      pending;
439 };
440 
441 struct hdsp {
442         spinlock_t            lock;
443         struct snd_pcm_substream *capture_substream;
444         struct snd_pcm_substream *playback_substream;
445         struct hdsp_midi      midi[2];
446         struct tasklet_struct midi_tasklet;
447         int                   use_midi_tasklet;
448         int                   precise_ptr;
449         u32                   control_register;      /* cached value */
450         u32                   control2_register;     /* cached value */
451         u32                   creg_spdif;
452         u32                   creg_spdif_stream;
453         int                   clock_source_locked;
454         char                 *card_name;             /* digiface/multiface */
455         enum HDSP_IO_Type     io_type;               /* ditto, but for code use */
456         unsigned short        firmware_rev;
457         unsigned short        state;                 /* stores state bits */
458         u32                   firmware_cache[24413]; /* this helps recover from accidental iobox power failure */
459         size_t                period_bytes;          /* guess what this is */
460         unsigned char         max_channels;
461         unsigned char         qs_in_channels;        /* quad speed mode for H9632 */
462         unsigned char         ds_in_channels;
463         unsigned char         ss_in_channels;       /* different for multiface/digiface */
464         unsigned char         qs_out_channels;
465         unsigned char         ds_out_channels;
466         unsigned char         ss_out_channels;
467 
468         struct snd_dma_buffer capture_dma_buf;
469         struct snd_dma_buffer playback_dma_buf;
470         unsigned char        *capture_buffer;       /* suitably aligned address */
471         unsigned char        *playback_buffer;      /* suitably aligned address */
472 
473         pid_t                 capture_pid;
474         pid_t                 playback_pid;
475         int                   running;
476         int                   system_sample_rate;
477         char                 *channel_map;
478         int                   dev;
479         int                   irq;
480         unsigned long         port;
481         void __iomem         *iobase;
482         struct snd_card *card;
483         struct snd_pcm *pcm;
484         struct snd_hwdep          *hwdep;
485         struct pci_dev       *pci;
486         struct snd_kcontrol *spdif_ctl;
487         unsigned short        mixer_matrix[HDSP_MATRIX_MIXER_SIZE];
488         unsigned int          dds_value; /* last value written to freq register */
489 };
490 
491 /* These tables map the ALSA channels 1..N to the channels that we
492    need to use in order to find the relevant channel buffer. RME
493    refer to this kind of mapping as between "the ADAT channel and
494    the DMA channel." We index it using the logical audio channel,
495    and the value is the DMA channel (i.e. channel buffer number)
496    where the data for that channel can be read/written from/to.
497 */
498 
499 static char channel_map_df_ss[HDSP_MAX_CHANNELS] = {
500         0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17,
501         18, 19, 20, 21, 22, 23, 24, 25
502 };
503 
504 static char channel_map_mf_ss[HDSP_MAX_CHANNELS] = { /* Multiface */
505         /* Analog */
506         0, 1, 2, 3, 4, 5, 6, 7,
507         /* ADAT 2 */
508         16, 17, 18, 19, 20, 21, 22, 23,
509         /* SPDIF */
510         24, 25,
511         -1, -1, -1, -1, -1, -1, -1, -1
512 };
513 
514 static char channel_map_ds[HDSP_MAX_CHANNELS] = {
515         /* ADAT channels are remapped */
516         1, 3, 5, 7, 9, 11, 13, 15, 17, 19, 21, 23,
517         /* channels 12 and 13 are S/PDIF */
518         24, 25,
519         /* others don't exist */
520         -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1
521 };
522 
523 static char channel_map_H9632_ss[HDSP_MAX_CHANNELS] = {
524         /* ADAT channels */
525         0, 1, 2, 3, 4, 5, 6, 7,
526         /* SPDIF */
527         8, 9,
528         /* Analog */
529         10, 11,
530         /* AO4S-192 and AI4S-192 extension boards */
531         12, 13, 14, 15,
532         /* others don't exist */
533         -1, -1, -1, -1, -1, -1, -1, -1,
534         -1, -1
535 };
536 
537 static char channel_map_H9632_ds[HDSP_MAX_CHANNELS] = {
538         /* ADAT */
539         1, 3, 5, 7,
540         /* SPDIF */
541         8, 9,
542         /* Analog */
543         10, 11,
544         /* AO4S-192 and AI4S-192 extension boards */
545         12, 13, 14, 15,
546         /* others don't exist */
547         -1, -1, -1, -1, -1, -1, -1, -1,
548         -1, -1, -1, -1, -1, -1
549 };
550 
551 static char channel_map_H9632_qs[HDSP_MAX_CHANNELS] = {
552         /* ADAT is disabled in this mode */
553         /* SPDIF */
554         8, 9,
555         /* Analog */
556         10, 11,
557         /* AO4S-192 and AI4S-192 extension boards */
558         12, 13, 14, 15,
559         /* others don't exist */
560         -1, -1, -1, -1, -1, -1, -1, -1,
561         -1, -1, -1, -1, -1, -1, -1, -1,
562         -1, -1
563 };
564 
565 static int snd_hammerfall_get_buffer(struct pci_dev *pci, struct snd_dma_buffer *dmab, size_t size)
566 {
567         dmab->dev.type = SNDRV_DMA_TYPE_DEV;
568         dmab->dev.dev = snd_dma_pci_data(pci);
569         if (snd_dma_get_reserved_buf(dmab, snd_dma_pci_buf_id(pci))) {
570                 if (dmab->bytes >= size)
571                         return 0;
572         }
573         if (snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, snd_dma_pci_data(pci),
574                                 size, dmab) < 0)
575                 return -ENOMEM;
576         return 0;
577 }
578 
579 static void snd_hammerfall_free_buffer(struct snd_dma_buffer *dmab, struct pci_dev *pci)
580 {
581         if (dmab->area) {
582                 dmab->dev.dev = NULL; /* make it anonymous */
583                 snd_dma_reserve_buf(dmab, snd_dma_pci_buf_id(pci));
584         }
585 }
586 
587 
588 static struct pci_device_id snd_hdsp_ids[] = {
589         {
590                 .vendor = PCI_VENDOR_ID_XILINX,
591                 .device = PCI_DEVICE_ID_XILINX_HAMMERFALL_DSP,
592                 .subvendor = PCI_ANY_ID,
593                 .subdevice = PCI_ANY_ID,
594         }, /* RME Hammerfall-DSP */
595         { 0, },
596 };
597 
598 MODULE_DEVICE_TABLE(pci, snd_hdsp_ids);
599 
600 /* prototypes */
601 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp);
602 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp);
603 static int snd_hdsp_enable_io (struct hdsp *hdsp);
604 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp);
605 static void snd_hdsp_initialize_channels (struct hdsp *hdsp);
606 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout);
607 static int hdsp_autosync_ref(struct hdsp *hdsp);
608 static int snd_hdsp_set_defaults(struct hdsp *hdsp);
609 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp);
610 
611 static int hdsp_playback_to_output_key (struct hdsp *hdsp, int in, int out)
612 {
613         switch (hdsp->io_type) {
614         case Multiface:
615         case Digiface:
616         default:
617                 if (hdsp->firmware_rev == 0xa)
618                         return (64 * out) + (32 + (in));
619                 else
620                         return (52 * out) + (26 + (in));
621         case H9632:
622                 return (32 * out) + (16 + (in));
623         case H9652:
624                 return (52 * out) + (26 + (in));
625         }
626 }
627 
628 static int hdsp_input_to_output_key (struct hdsp *hdsp, int in, int out)
629 {
630         switch (hdsp->io_type) {
631         case Multiface:
632         case Digiface:
633         default:
634                 if (hdsp->firmware_rev == 0xa)
635                         return (64 * out) + in;
636                 else
637                         return (52 * out) + in;
638         case H9632:
639                 return (32 * out) + in;
640         case H9652:
641                 return (52 * out) + in;
642         }
643 }
644 
645 static void hdsp_write(struct hdsp *hdsp, int reg, int val)
646 {
647         writel(val, hdsp->iobase + reg);
648 }
649 
650 static unsigned int hdsp_read(struct hdsp *hdsp, int reg)
651 {
652         return readl (hdsp->iobase + reg);
653 }
654 
655 static int hdsp_check_for_iobox (struct hdsp *hdsp)
656 {
657         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return 0;
658         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_ConfigError) {
659                 snd_printk ("Hammerfall-DSP: no Digiface or Multiface connected!\n");
660                 hdsp->state &= ~HDSP_FirmwareLoaded;
661                 return -EIO;
662         }
663         return 0;
664 }
665 
666 static int hdsp_wait_for_iobox(struct hdsp *hdsp, unsigned int loops,
667                                unsigned int delay)
668 {
669         unsigned int i;
670 
671         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
672                 return 0;
673 
674         for (i = 0; i != loops; ++i) {
675                 if (hdsp_read(hdsp, HDSP_statusRegister) & HDSP_ConfigError)
676                         msleep(delay);
677                 else {
678                         snd_printd("Hammerfall-DSP: iobox found after %ums!\n",
679                                    i * delay);
680                         return 0;
681                 }
682         }
683 
684         snd_printk("Hammerfall-DSP: no Digiface or Multiface connected!\n");
685         hdsp->state &= ~HDSP_FirmwareLoaded;
686         return -EIO;
687 }
688 
689 static int snd_hdsp_load_firmware_from_cache(struct hdsp *hdsp) {
690 
691         int i;
692         unsigned long flags;
693 
694         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
695 
696                 snd_printk ("Hammerfall-DSP: loading firmware\n");
697 
698                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_PROGRAM);
699                 hdsp_write (hdsp, HDSP_fifoData, 0);
700 
701                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
702                         snd_printk ("Hammerfall-DSP: timeout waiting for download preparation\n");
703                         return -EIO;
704                 }
705 
706                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
707 
708                 for (i = 0; i < 24413; ++i) {
709                         hdsp_write(hdsp, HDSP_fifoData, hdsp->firmware_cache[i]);
710                         if (hdsp_fifo_wait (hdsp, 127, HDSP_LONG_WAIT)) {
711                                 snd_printk ("Hammerfall-DSP: timeout during firmware loading\n");
712                                 return -EIO;
713                         }
714                 }
715 
716                 ssleep(3);
717 
718                 if (hdsp_fifo_wait (hdsp, 0, HDSP_LONG_WAIT)) {
719                         snd_printk ("Hammerfall-DSP: timeout at end of firmware loading\n");
720                         return -EIO;
721                 }
722 
723 #ifdef SNDRV_BIG_ENDIAN
724                 hdsp->control2_register = HDSP_BIGENDIAN_MODE;
725 #else
726                 hdsp->control2_register = 0;
727 #endif
728                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
729                 snd_printk ("Hammerfall-DSP: finished firmware loading\n");
730 
731         }
732         if (hdsp->state & HDSP_InitializationComplete) {
733                 snd_printk(KERN_INFO "Hammerfall-DSP: firmware loaded from cache, restoring defaults\n");
734                 spin_lock_irqsave(&hdsp->lock, flags);
735                 snd_hdsp_set_defaults(hdsp);
736                 spin_unlock_irqrestore(&hdsp->lock, flags);
737         }
738 
739         hdsp->state |= HDSP_FirmwareLoaded;
740 
741         return 0;
742 }
743 
744 static int hdsp_get_iobox_version (struct hdsp *hdsp)
745 {
746         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
747 
748                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_PROGRAM);
749                 hdsp_write (hdsp, HDSP_fifoData, 0);
750                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT) < 0)
751                         return -EIO;
752 
753                 hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
754                 hdsp_write (hdsp, HDSP_fifoData, 0);
755 
756                 if (hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT)) {
757                         hdsp->io_type = Multiface;
758                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_VERSION_BIT);
759                         hdsp_write (hdsp, HDSP_control2Reg, HDSP_S_LOAD);
760                         hdsp_fifo_wait (hdsp, 0, HDSP_SHORT_WAIT);
761                 } else {
762                         hdsp->io_type = Digiface;
763                 }
764         } else {
765                 /* firmware was already loaded, get iobox type */
766                 if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
767                         hdsp->io_type = Multiface;
768                 else
769                         hdsp->io_type = Digiface;
770         }
771         return 0;
772 }
773 
774 
775 #ifdef HDSP_FW_LOADER
776 static int hdsp_request_fw_loader(struct hdsp *hdsp);
777 #endif
778 
779 static int hdsp_check_for_firmware (struct hdsp *hdsp, int load_on_demand)
780 {
781         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
782                 return 0;
783         if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
784                 hdsp->state &= ~HDSP_FirmwareLoaded;
785                 if (! load_on_demand)
786                         return -EIO;
787                 snd_printk(KERN_ERR "Hammerfall-DSP: firmware not present.\n");
788                 /* try to load firmware */
789                 if (! (hdsp->state & HDSP_FirmwareCached)) {
790 #ifdef HDSP_FW_LOADER
791                         if (! hdsp_request_fw_loader(hdsp))
792                                 return 0;
793 #endif
794                         snd_printk(KERN_ERR
795                                    "Hammerfall-DSP: No firmware loaded nor "
796                                    "cached, please upload firmware.\n");
797                         return -EIO;
798                 }
799                 if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
800                         snd_printk(KERN_ERR
801                                    "Hammerfall-DSP: Firmware loading from "
802                                    "cache failed, please upload manually.\n");
803                         return -EIO;
804                 }
805         }
806         return 0;
807 }
808 
809 
810 static int hdsp_fifo_wait(struct hdsp *hdsp, int count, int timeout)
811 {
812         int i;
813 
814         /* the fifoStatus registers reports on how many words
815            are available in the command FIFO.
816         */
817 
818         for (i = 0; i < timeout; i++) {
819 
820                 if ((int)(hdsp_read (hdsp, HDSP_fifoStatus) & 0xff) <= count)
821                         return 0;
822 
823                 /* not very friendly, but we only do this during a firmware
824                    load and changing the mixer, so we just put up with it.
825                 */
826 
827                 udelay (100);
828         }
829 
830         snd_printk ("Hammerfall-DSP: wait for FIFO status <= %d failed after %d iterations\n",
831                     count, timeout);
832         return -1;
833 }
834 
835 static int hdsp_read_gain (struct hdsp *hdsp, unsigned int addr)
836 {
837         if (addr >= HDSP_MATRIX_MIXER_SIZE)
838                 return 0;
839 
840         return hdsp->mixer_matrix[addr];
841 }
842 
843 static int hdsp_write_gain(struct hdsp *hdsp, unsigned int addr, unsigned short data)
844 {
845         unsigned int ad;
846 
847         if (addr >= HDSP_MATRIX_MIXER_SIZE)
848                 return -1;
849 
850         if (hdsp->io_type == H9652 || hdsp->io_type == H9632) {
851 
852                 /* from martin bjornsen:
853 
854                    "You can only write dwords to the
855                    mixer memory which contain two
856                    mixer values in the low and high
857                    word. So if you want to change
858                    value 0 you have to read value 1
859                    from the cache and write both to
860                    the first dword in the mixer
861                    memory."
862                 */
863 
864                 if (hdsp->io_type == H9632 && addr >= 512)
865                         return 0;
866 
867                 if (hdsp->io_type == H9652 && addr >= 1352)
868                         return 0;
869 
870                 hdsp->mixer_matrix[addr] = data;
871 
872 
873                 /* `addr' addresses a 16-bit wide address, but
874                    the address space accessed via hdsp_write
875                    uses byte offsets. put another way, addr
876                    varies from 0 to 1351, but to access the
877                    corresponding memory location, we need
878                    to access 0 to 2703 ...
879                 */
880                 ad = addr/2;
881 
882                 hdsp_write (hdsp, 4096 + (ad*4),
883                             (hdsp->mixer_matrix[(addr&0x7fe)+1] << 16) +
884                             hdsp->mixer_matrix[addr&0x7fe]);
885 
886                 return 0;
887 
888         } else {
889 
890                 ad = (addr << 16) + data;
891 
892                 if (hdsp_fifo_wait(hdsp, 127, HDSP_LONG_WAIT))
893                         return -1;
894 
895                 hdsp_write (hdsp, HDSP_fifoData, ad);
896                 hdsp->mixer_matrix[addr] = data;
897 
898         }
899 
900         return 0;
901 }
902 
903 static int snd_hdsp_use_is_exclusive(struct hdsp *hdsp)
904 {
905         unsigned long flags;
906         int ret = 1;
907 
908         spin_lock_irqsave(&hdsp->lock, flags);
909         if ((hdsp->playback_pid != hdsp->capture_pid) &&
910             (hdsp->playback_pid >= 0) && (hdsp->capture_pid >= 0))
911                 ret = 0;
912         spin_unlock_irqrestore(&hdsp->lock, flags);
913         return ret;
914 }
915 
916 static int hdsp_spdif_sample_rate(struct hdsp *hdsp)
917 {
918         unsigned int status = hdsp_read(hdsp, HDSP_statusRegister);
919         unsigned int rate_bits = (status & HDSP_spdifFrequencyMask);
920 
921         /* For the 9632, the mask is different */
922         if (hdsp->io_type == H9632)
923                  rate_bits = (status & HDSP_spdifFrequencyMask_9632);
924 
925         if (status & HDSP_SPDIFErrorFlag)
926                 return 0;
927 
928         switch (rate_bits) {
929         case HDSP_spdifFrequency32KHz: return 32000;
930         case HDSP_spdifFrequency44_1KHz: return 44100;
931         case HDSP_spdifFrequency48KHz: return 48000;
932         case HDSP_spdifFrequency64KHz: return 64000;
933         case HDSP_spdifFrequency88_2KHz: return 88200;
934         case HDSP_spdifFrequency96KHz: return 96000;
935         case HDSP_spdifFrequency128KHz:
936                 if (hdsp->io_type == H9632) return 128000;
937                 break;
938         case HDSP_spdifFrequency176_4KHz:
939                 if (hdsp->io_type == H9632) return 176400;
940                 break;
941         case HDSP_spdifFrequency192KHz:
942                 if (hdsp->io_type == H9632) return 192000;
943                 break;
944         default:
945                 break;
946         }
947         snd_printk ("Hammerfall-DSP: unknown spdif frequency status; bits = 0x%x, status = 0x%x\n", rate_bits, status);
948         return 0;
949 }
950 
951 static int hdsp_external_sample_rate(struct hdsp *hdsp)
952 {
953         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
954         unsigned int rate_bits = status2 & HDSP_systemFrequencyMask;
955 
956         /* For the 9632 card, there seems to be no bit for indicating external
957          * sample rate greater than 96kHz. The card reports the corresponding
958          * single speed. So the best means seems to get spdif rate when
959          * autosync reference is spdif */
960         if (hdsp->io_type == H9632 &&
961             hdsp_autosync_ref(hdsp) == HDSP_AUTOSYNC_FROM_SPDIF)
962                  return hdsp_spdif_sample_rate(hdsp);
963 
964         switch (rate_bits) {
965         case HDSP_systemFrequency32:   return 32000;
966         case HDSP_systemFrequency44_1: return 44100;
967         case HDSP_systemFrequency48:   return 48000;
968         case HDSP_systemFrequency64:   return 64000;
969         case HDSP_systemFrequency88_2: return 88200;
970         case HDSP_systemFrequency96:   return 96000;
971         default:
972                 return 0;
973         }
974 }
975 
976 static void hdsp_compute_period_size(struct hdsp *hdsp)
977 {
978         hdsp->period_bytes = 1 << ((hdsp_decode_latency(hdsp->control_register) + 8));
979 }
980 
981 static snd_pcm_uframes_t hdsp_hw_pointer(struct hdsp *hdsp)
982 {
983         int position;
984 
985         position = hdsp_read(hdsp, HDSP_statusRegister);
986 
987         if (!hdsp->precise_ptr)
988                 return (position & HDSP_BufferID) ? (hdsp->period_bytes / 4) : 0;
989 
990         position &= HDSP_BufferPositionMask;
991         position /= 4;
992         position &= (hdsp->period_bytes/2) - 1;
993         return position;
994 }
995 
996 static void hdsp_reset_hw_pointer(struct hdsp *hdsp)
997 {
998         hdsp_write (hdsp, HDSP_resetPointer, 0);
999         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1000                 /* HDSP_resetPointer = HDSP_freqReg, which is strange and
1001                  * requires (?) to write again DDS value after a reset pointer
1002                  * (at least, it works like this) */
1003                 hdsp_write (hdsp, HDSP_freqReg, hdsp->dds_value);
1004 }
1005 
1006 static void hdsp_start_audio(struct hdsp *s)
1007 {
1008         s->control_register |= (HDSP_AudioInterruptEnable | HDSP_Start);
1009         hdsp_write(s, HDSP_controlRegister, s->control_register);
1010 }
1011 
1012 static void hdsp_stop_audio(struct hdsp *s)
1013 {
1014         s->control_register &= ~(HDSP_Start | HDSP_AudioInterruptEnable);
1015         hdsp_write(s, HDSP_controlRegister, s->control_register);
1016 }
1017 
1018 static void hdsp_silence_playback(struct hdsp *hdsp)
1019 {
1020         memset(hdsp->playback_buffer, 0, HDSP_DMA_AREA_BYTES);
1021 }
1022 
1023 static int hdsp_set_interrupt_interval(struct hdsp *s, unsigned int frames)
1024 {
1025         int n;
1026 
1027         spin_lock_irq(&s->lock);
1028 
1029         frames >>= 7;
1030         n = 0;
1031         while (frames) {
1032                 n++;
1033                 frames >>= 1;
1034         }
1035 
1036         s->control_register &= ~HDSP_LatencyMask;
1037         s->control_register |= hdsp_encode_latency(n);
1038 
1039         hdsp_write(s, HDSP_controlRegister, s->control_register);
1040 
1041         hdsp_compute_period_size(s);
1042 
1043         spin_unlock_irq(&s->lock);
1044 
1045         return 0;
1046 }
1047 
1048 static void hdsp_set_dds_value(struct hdsp *hdsp, int rate)
1049 {
1050         u64 n;
1051 
1052         if (rate >= 112000)
1053                 rate /= 4;
1054         else if (rate >= 56000)
1055                 rate /= 2;
1056 
1057         n = DDS_NUMERATOR;
1058         n = div_u64(n, rate);
1059         /* n should be less than 2^32 for being written to FREQ register */
1060         snd_BUG_ON(n >> 32);
1061         /* HDSP_freqReg and HDSP_resetPointer are the same, so keep the DDS
1062            value to write it after a reset */
1063         hdsp->dds_value = n;
1064         hdsp_write(hdsp, HDSP_freqReg, hdsp->dds_value);
1065 }
1066 
1067 static int hdsp_set_rate(struct hdsp *hdsp, int rate, int called_internally)
1068 {
1069         int reject_if_open = 0;
1070         int current_rate;
1071         int rate_bits;
1072 
1073         /* ASSUMPTION: hdsp->lock is either held, or
1074            there is no need for it (e.g. during module
1075            initialization).
1076         */
1077 
1078         if (!(hdsp->control_register & HDSP_ClockModeMaster)) {
1079                 if (called_internally) {
1080                         /* request from ctl or card initialization */
1081                         snd_printk(KERN_ERR "Hammerfall-DSP: device is not running as a clock master: cannot set sample rate.\n");
1082                         return -1;
1083                 } else {
1084                         /* hw_param request while in AutoSync mode */
1085                         int external_freq = hdsp_external_sample_rate(hdsp);
1086                         int spdif_freq = hdsp_spdif_sample_rate(hdsp);
1087 
1088                         if ((spdif_freq == external_freq*2) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1089                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in double speed mode\n");
1090                         else if (hdsp->io_type == H9632 && (spdif_freq == external_freq*4) && (hdsp_autosync_ref(hdsp) >= HDSP_AUTOSYNC_FROM_ADAT1))
1091                                 snd_printk(KERN_INFO "Hammerfall-DSP: Detected ADAT in quad speed mode\n");
1092                         else if (rate != external_freq) {
1093                                 snd_printk(KERN_INFO "Hammerfall-DSP: No AutoSync source for requested rate\n");
1094                                 return -1;
1095                         }
1096                 }
1097         }
1098 
1099         current_rate = hdsp->system_sample_rate;
1100 
1101         /* Changing from a "single speed" to a "double speed" rate is
1102            not allowed if any substreams are open. This is because
1103            such a change causes a shift in the location of
1104            the DMA buffers and a reduction in the number of available
1105            buffers.
1106 
1107            Note that a similar but essentially insoluble problem
1108            exists for externally-driven rate changes. All we can do
1109            is to flag rate changes in the read/write routines.  */
1110 
1111         if (rate > 96000 && hdsp->io_type != H9632)
1112                 return -EINVAL;
1113 
1114         switch (rate) {
1115         case 32000:
1116                 if (current_rate > 48000)
1117                         reject_if_open = 1;
1118                 rate_bits = HDSP_Frequency32KHz;
1119                 break;
1120         case 44100:
1121                 if (current_rate > 48000)
1122                         reject_if_open = 1;
1123                 rate_bits = HDSP_Frequency44_1KHz;
1124                 break;
1125         case 48000:
1126                 if (current_rate > 48000)
1127                         reject_if_open = 1;
1128                 rate_bits = HDSP_Frequency48KHz;
1129                 break;
1130         case 64000:
1131                 if (current_rate <= 48000 || current_rate > 96000)
1132                         reject_if_open = 1;
1133                 rate_bits = HDSP_Frequency64KHz;
1134                 break;
1135         case 88200:
1136                 if (current_rate <= 48000 || current_rate > 96000)
1137                         reject_if_open = 1;
1138                 rate_bits = HDSP_Frequency88_2KHz;
1139                 break;
1140         case 96000:
1141                 if (current_rate <= 48000 || current_rate > 96000)
1142                         reject_if_open = 1;
1143                 rate_bits = HDSP_Frequency96KHz;
1144                 break;
1145         case 128000:
1146                 if (current_rate < 128000)
1147                         reject_if_open = 1;
1148                 rate_bits = HDSP_Frequency128KHz;
1149                 break;
1150         case 176400:
1151                 if (current_rate < 128000)
1152                         reject_if_open = 1;
1153                 rate_bits = HDSP_Frequency176_4KHz;
1154                 break;
1155         case 192000:
1156                 if (current_rate < 128000)
1157                         reject_if_open = 1;
1158                 rate_bits = HDSP_Frequency192KHz;
1159                 break;
1160         default:
1161                 return -EINVAL;
1162         }
1163 
1164         if (reject_if_open && (hdsp->capture_pid >= 0 || hdsp->playback_pid >= 0)) {
1165                 snd_printk ("Hammerfall-DSP: cannot change speed mode (capture PID = %d, playback PID = %d)\n",
1166                             hdsp->capture_pid,
1167                             hdsp->playback_pid);
1168                 return -EBUSY;
1169         }
1170 
1171         hdsp->control_register &= ~HDSP_FrequencyMask;
1172         hdsp->control_register |= rate_bits;
1173         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1174 
1175         /* For HDSP9632 rev 152, need to set DDS value in FREQ register */
1176         if (hdsp->io_type == H9632 && hdsp->firmware_rev >= 152)
1177                 hdsp_set_dds_value(hdsp, rate);
1178 
1179         if (rate >= 128000) {
1180                 hdsp->channel_map = channel_map_H9632_qs;
1181         } else if (rate > 48000) {
1182                 if (hdsp->io_type == H9632)
1183                         hdsp->channel_map = channel_map_H9632_ds;
1184                 else
1185                         hdsp->channel_map = channel_map_ds;
1186         } else {
1187                 switch (hdsp->io_type) {
1188                 case Multiface:
1189                         hdsp->channel_map = channel_map_mf_ss;
1190                         break;
1191                 case Digiface:
1192                 case H9652:
1193                         hdsp->channel_map = channel_map_df_ss;
1194                         break;
1195                 case H9632:
1196                         hdsp->channel_map = channel_map_H9632_ss;
1197                         break;
1198                 default:
1199                         /* should never happen */
1200                         break;
1201                 }
1202         }
1203 
1204         hdsp->system_sample_rate = rate;
1205 
1206         return 0;
1207 }
1208 
1209 /*----------------------------------------------------------------------------
1210    MIDI
1211   ----------------------------------------------------------------------------*/
1212 
1213 static unsigned char snd_hdsp_midi_read_byte (struct hdsp *hdsp, int id)
1214 {
1215         /* the hardware already does the relevant bit-mask with 0xff */
1216         if (id)
1217                 return hdsp_read(hdsp, HDSP_midiDataIn1);
1218         else
1219                 return hdsp_read(hdsp, HDSP_midiDataIn0);
1220 }
1221 
1222 static void snd_hdsp_midi_write_byte (struct hdsp *hdsp, int id, int val)
1223 {
1224         /* the hardware already does the relevant bit-mask with 0xff */
1225         if (id)
1226                 hdsp_write(hdsp, HDSP_midiDataOut1, val);
1227         else
1228                 hdsp_write(hdsp, HDSP_midiDataOut0, val);
1229 }
1230 
1231 static int snd_hdsp_midi_input_available (struct hdsp *hdsp, int id)
1232 {
1233         if (id)
1234                 return (hdsp_read(hdsp, HDSP_midiStatusIn1) & 0xff);
1235         else
1236                 return (hdsp_read(hdsp, HDSP_midiStatusIn0) & 0xff);
1237 }
1238 
1239 static int snd_hdsp_midi_output_possible (struct hdsp *hdsp, int id)
1240 {
1241         int fifo_bytes_used;
1242 
1243         if (id)
1244                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut1) & 0xff;
1245         else
1246                 fifo_bytes_used = hdsp_read(hdsp, HDSP_midiStatusOut0) & 0xff;
1247 
1248         if (fifo_bytes_used < 128)
1249                 return  128 - fifo_bytes_used;
1250         else
1251                 return 0;
1252 }
1253 
1254 static void snd_hdsp_flush_midi_input (struct hdsp *hdsp, int id)
1255 {
1256         while (snd_hdsp_midi_input_available (hdsp, id))
1257                 snd_hdsp_midi_read_byte (hdsp, id);
1258 }
1259 
1260 static int snd_hdsp_midi_output_write (struct hdsp_midi *hmidi)
1261 {
1262         unsigned long flags;
1263         int n_pending;
1264         int to_write;
1265         int i;
1266         unsigned char buf[128];
1267 
1268         /* Output is not interrupt driven */
1269 
1270         spin_lock_irqsave (&hmidi->lock, flags);
1271         if (hmidi->output) {
1272                 if (!snd_rawmidi_transmit_empty (hmidi->output)) {
1273                         if ((n_pending = snd_hdsp_midi_output_possible (hmidi->hdsp, hmidi->id)) > 0) {
1274                                 if (n_pending > (int)sizeof (buf))
1275                                         n_pending = sizeof (buf);
1276 
1277                                 if ((to_write = snd_rawmidi_transmit (hmidi->output, buf, n_pending)) > 0) {
1278                                         for (i = 0; i < to_write; ++i)
1279                                                 snd_hdsp_midi_write_byte (hmidi->hdsp, hmidi->id, buf[i]);
1280                                 }
1281                         }
1282                 }
1283         }
1284         spin_unlock_irqrestore (&hmidi->lock, flags);
1285         return 0;
1286 }
1287 
1288 static int snd_hdsp_midi_input_read (struct hdsp_midi *hmidi)
1289 {
1290         unsigned char buf[128]; /* this buffer is designed to match the MIDI input FIFO size */
1291         unsigned long flags;
1292         int n_pending;
1293         int i;
1294 
1295         spin_lock_irqsave (&hmidi->lock, flags);
1296         if ((n_pending = snd_hdsp_midi_input_available (hmidi->hdsp, hmidi->id)) > 0) {
1297                 if (hmidi->input) {
1298                         if (n_pending > (int)sizeof (buf))
1299                                 n_pending = sizeof (buf);
1300                         for (i = 0; i < n_pending; ++i)
1301                                 buf[i] = snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1302                         if (n_pending)
1303                                 snd_rawmidi_receive (hmidi->input, buf, n_pending);
1304                 } else {
1305                         /* flush the MIDI input FIFO */
1306                         while (--n_pending)
1307                                 snd_hdsp_midi_read_byte (hmidi->hdsp, hmidi->id);
1308                 }
1309         }
1310         hmidi->pending = 0;
1311         if (hmidi->id)
1312                 hmidi->hdsp->control_register |= HDSP_Midi1InterruptEnable;
1313         else
1314                 hmidi->hdsp->control_register |= HDSP_Midi0InterruptEnable;
1315         hdsp_write(hmidi->hdsp, HDSP_controlRegister, hmidi->hdsp->control_register);
1316         spin_unlock_irqrestore (&hmidi->lock, flags);
1317         return snd_hdsp_midi_output_write (hmidi);
1318 }
1319 
1320 static void snd_hdsp_midi_input_trigger(struct snd_rawmidi_substream *substream, int up)
1321 {
1322         struct hdsp *hdsp;
1323         struct hdsp_midi *hmidi;
1324         unsigned long flags;
1325         u32 ie;
1326 
1327         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1328         hdsp = hmidi->hdsp;
1329         ie = hmidi->id ? HDSP_Midi1InterruptEnable : HDSP_Midi0InterruptEnable;
1330         spin_lock_irqsave (&hdsp->lock, flags);
1331         if (up) {
1332                 if (!(hdsp->control_register & ie)) {
1333                         snd_hdsp_flush_midi_input (hdsp, hmidi->id);
1334                         hdsp->control_register |= ie;
1335                 }
1336         } else {
1337                 hdsp->control_register &= ~ie;
1338                 tasklet_kill(&hdsp->midi_tasklet);
1339         }
1340 
1341         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1342         spin_unlock_irqrestore (&hdsp->lock, flags);
1343 }
1344 
1345 static void snd_hdsp_midi_output_timer(unsigned long data)
1346 {
1347         struct hdsp_midi *hmidi = (struct hdsp_midi *) data;
1348         unsigned long flags;
1349 
1350         snd_hdsp_midi_output_write(hmidi);
1351         spin_lock_irqsave (&hmidi->lock, flags);
1352 
1353         /* this does not bump hmidi->istimer, because the
1354            kernel automatically removed the timer when it
1355            expired, and we are now adding it back, thus
1356            leaving istimer wherever it was set before.
1357         */
1358 
1359         if (hmidi->istimer) {
1360                 hmidi->timer.expires = 1 + jiffies;
1361                 add_timer(&hmidi->timer);
1362         }
1363 
1364         spin_unlock_irqrestore (&hmidi->lock, flags);
1365 }
1366 
1367 static void snd_hdsp_midi_output_trigger(struct snd_rawmidi_substream *substream, int up)
1368 {
1369         struct hdsp_midi *hmidi;
1370         unsigned long flags;
1371 
1372         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1373         spin_lock_irqsave (&hmidi->lock, flags);
1374         if (up) {
1375                 if (!hmidi->istimer) {
1376                         init_timer(&hmidi->timer);
1377                         hmidi->timer.function = snd_hdsp_midi_output_timer;
1378                         hmidi->timer.data = (unsigned long) hmidi;
1379                         hmidi->timer.expires = 1 + jiffies;
1380                         add_timer(&hmidi->timer);
1381                         hmidi->istimer++;
1382                 }
1383         } else {
1384                 if (hmidi->istimer && --hmidi->istimer <= 0)
1385                         del_timer (&hmidi->timer);
1386         }
1387         spin_unlock_irqrestore (&hmidi->lock, flags);
1388         if (up)
1389                 snd_hdsp_midi_output_write(hmidi);
1390 }
1391 
1392 static int snd_hdsp_midi_input_open(struct snd_rawmidi_substream *substream)
1393 {
1394         struct hdsp_midi *hmidi;
1395 
1396         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1397         spin_lock_irq (&hmidi->lock);
1398         snd_hdsp_flush_midi_input (hmidi->hdsp, hmidi->id);
1399         hmidi->input = substream;
1400         spin_unlock_irq (&hmidi->lock);
1401 
1402         return 0;
1403 }
1404 
1405 static int snd_hdsp_midi_output_open(struct snd_rawmidi_substream *substream)
1406 {
1407         struct hdsp_midi *hmidi;
1408 
1409         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1410         spin_lock_irq (&hmidi->lock);
1411         hmidi->output = substream;
1412         spin_unlock_irq (&hmidi->lock);
1413 
1414         return 0;
1415 }
1416 
1417 static int snd_hdsp_midi_input_close(struct snd_rawmidi_substream *substream)
1418 {
1419         struct hdsp_midi *hmidi;
1420 
1421         snd_hdsp_midi_input_trigger (substream, 0);
1422 
1423         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1424         spin_lock_irq (&hmidi->lock);
1425         hmidi->input = NULL;
1426         spin_unlock_irq (&hmidi->lock);
1427 
1428         return 0;
1429 }
1430 
1431 static int snd_hdsp_midi_output_close(struct snd_rawmidi_substream *substream)
1432 {
1433         struct hdsp_midi *hmidi;
1434 
1435         snd_hdsp_midi_output_trigger (substream, 0);
1436 
1437         hmidi = (struct hdsp_midi *) substream->rmidi->private_data;
1438         spin_lock_irq (&hmidi->lock);
1439         hmidi->output = NULL;
1440         spin_unlock_irq (&hmidi->lock);
1441 
1442         return 0;
1443 }
1444 
1445 static struct snd_rawmidi_ops snd_hdsp_midi_output =
1446 {
1447         .open =         snd_hdsp_midi_output_open,
1448         .close =        snd_hdsp_midi_output_close,
1449         .trigger =      snd_hdsp_midi_output_trigger,
1450 };
1451 
1452 static struct snd_rawmidi_ops snd_hdsp_midi_input =
1453 {
1454         .open =         snd_hdsp_midi_input_open,
1455         .close =        snd_hdsp_midi_input_close,
1456         .trigger =      snd_hdsp_midi_input_trigger,
1457 };
1458 
1459 static int snd_hdsp_create_midi (struct snd_card *card, struct hdsp *hdsp, int id)
1460 {
1461         char buf[32];
1462 
1463         hdsp->midi[id].id = id;
1464         hdsp->midi[id].rmidi = NULL;
1465         hdsp->midi[id].input = NULL;
1466         hdsp->midi[id].output = NULL;
1467         hdsp->midi[id].hdsp = hdsp;
1468         hdsp->midi[id].istimer = 0;
1469         hdsp->midi[id].pending = 0;
1470         spin_lock_init (&hdsp->midi[id].lock);
1471 
1472         sprintf (buf, "%s MIDI %d", card->shortname, id+1);
1473         if (snd_rawmidi_new (card, buf, id, 1, 1, &hdsp->midi[id].rmidi) < 0)
1474                 return -1;
1475 
1476         sprintf(hdsp->midi[id].rmidi->name, "HDSP MIDI %d", id+1);
1477         hdsp->midi[id].rmidi->private_data = &hdsp->midi[id];
1478 
1479         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_OUTPUT, &snd_hdsp_midi_output);
1480         snd_rawmidi_set_ops (hdsp->midi[id].rmidi, SNDRV_RAWMIDI_STREAM_INPUT, &snd_hdsp_midi_input);
1481 
1482         hdsp->midi[id].rmidi->info_flags |= SNDRV_RAWMIDI_INFO_OUTPUT |
1483                 SNDRV_RAWMIDI_INFO_INPUT |
1484                 SNDRV_RAWMIDI_INFO_DUPLEX;
1485 
1486         return 0;
1487 }
1488 
1489 /*-----------------------------------------------------------------------------
1490   Control Interface
1491   ----------------------------------------------------------------------------*/
1492 
1493 static u32 snd_hdsp_convert_from_aes(struct snd_aes_iec958 *aes)
1494 {
1495         u32 val = 0;
1496         val |= (aes->status[0] & IEC958_AES0_PROFESSIONAL) ? HDSP_SPDIFProfessional : 0;
1497         val |= (aes->status[0] & IEC958_AES0_NONAUDIO) ? HDSP_SPDIFNonAudio : 0;
1498         if (val & HDSP_SPDIFProfessional)
1499                 val |= (aes->status[0] & IEC958_AES0_PRO_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1500         else
1501                 val |= (aes->status[0] & IEC958_AES0_CON_EMPHASIS_5015) ? HDSP_SPDIFEmphasis : 0;
1502         return val;
1503 }
1504 
1505 static void snd_hdsp_convert_to_aes(struct snd_aes_iec958 *aes, u32 val)
1506 {
1507         aes->status[0] = ((val & HDSP_SPDIFProfessional) ? IEC958_AES0_PROFESSIONAL : 0) |
1508                          ((val & HDSP_SPDIFNonAudio) ? IEC958_AES0_NONAUDIO : 0);
1509         if (val & HDSP_SPDIFProfessional)
1510                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_PRO_EMPHASIS_5015 : 0;
1511         else
1512                 aes->status[0] |= (val & HDSP_SPDIFEmphasis) ? IEC958_AES0_CON_EMPHASIS_5015 : 0;
1513 }
1514 
1515 static int snd_hdsp_control_spdif_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1516 {
1517         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1518         uinfo->count = 1;
1519         return 0;
1520 }
1521 
1522 static int snd_hdsp_control_spdif_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1523 {
1524         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1525 
1526         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif);
1527         return 0;
1528 }
1529 
1530 static int snd_hdsp_control_spdif_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1531 {
1532         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1533         int change;
1534         u32 val;
1535 
1536         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1537         spin_lock_irq(&hdsp->lock);
1538         change = val != hdsp->creg_spdif;
1539         hdsp->creg_spdif = val;
1540         spin_unlock_irq(&hdsp->lock);
1541         return change;
1542 }
1543 
1544 static int snd_hdsp_control_spdif_stream_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1545 {
1546         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1547         uinfo->count = 1;
1548         return 0;
1549 }
1550 
1551 static int snd_hdsp_control_spdif_stream_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1552 {
1553         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1554 
1555         snd_hdsp_convert_to_aes(&ucontrol->value.iec958, hdsp->creg_spdif_stream);
1556         return 0;
1557 }
1558 
1559 static int snd_hdsp_control_spdif_stream_put(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1560 {
1561         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1562         int change;
1563         u32 val;
1564 
1565         val = snd_hdsp_convert_from_aes(&ucontrol->value.iec958);
1566         spin_lock_irq(&hdsp->lock);
1567         change = val != hdsp->creg_spdif_stream;
1568         hdsp->creg_spdif_stream = val;
1569         hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
1570         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= val);
1571         spin_unlock_irq(&hdsp->lock);
1572         return change;
1573 }
1574 
1575 static int snd_hdsp_control_spdif_mask_info(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1576 {
1577         uinfo->type = SNDRV_CTL_ELEM_TYPE_IEC958;
1578         uinfo->count = 1;
1579         return 0;
1580 }
1581 
1582 static int snd_hdsp_control_spdif_mask_get(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1583 {
1584         ucontrol->value.iec958.status[0] = kcontrol->private_value;
1585         return 0;
1586 }
1587 
1588 #define HDSP_SPDIF_IN(xname, xindex) \
1589 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1590   .name = xname, \
1591   .index = xindex, \
1592   .info = snd_hdsp_info_spdif_in, \
1593   .get = snd_hdsp_get_spdif_in, \
1594   .put = snd_hdsp_put_spdif_in }
1595 
1596 static unsigned int hdsp_spdif_in(struct hdsp *hdsp)
1597 {
1598         return hdsp_decode_spdif_in(hdsp->control_register & HDSP_SPDIFInputMask);
1599 }
1600 
1601 static int hdsp_set_spdif_input(struct hdsp *hdsp, int in)
1602 {
1603         hdsp->control_register &= ~HDSP_SPDIFInputMask;
1604         hdsp->control_register |= hdsp_encode_spdif_in(in);
1605         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1606         return 0;
1607 }
1608 
1609 static int snd_hdsp_info_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1610 {
1611         static char *texts[4] = {"Optical", "Coaxial", "Internal", "AES"};
1612         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1613 
1614         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1615         uinfo->count = 1;
1616         uinfo->value.enumerated.items = ((hdsp->io_type == H9632) ? 4 : 3);
1617         if (uinfo->value.enumerated.item > ((hdsp->io_type == H9632) ? 3 : 2))
1618                 uinfo->value.enumerated.item = ((hdsp->io_type == H9632) ? 3 : 2);
1619         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1620         return 0;
1621 }
1622 
1623 static int snd_hdsp_get_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1624 {
1625         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1626 
1627         ucontrol->value.enumerated.item[0] = hdsp_spdif_in(hdsp);
1628         return 0;
1629 }
1630 
1631 static int snd_hdsp_put_spdif_in(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1632 {
1633         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1634         int change;
1635         unsigned int val;
1636 
1637         if (!snd_hdsp_use_is_exclusive(hdsp))
1638                 return -EBUSY;
1639         val = ucontrol->value.enumerated.item[0] % ((hdsp->io_type == H9632) ? 4 : 3);
1640         spin_lock_irq(&hdsp->lock);
1641         change = val != hdsp_spdif_in(hdsp);
1642         if (change)
1643                 hdsp_set_spdif_input(hdsp, val);
1644         spin_unlock_irq(&hdsp->lock);
1645         return change;
1646 }
1647 
1648 #define HDSP_SPDIF_OUT(xname, xindex) \
1649 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1650   .info = snd_hdsp_info_spdif_bits, \
1651   .get = snd_hdsp_get_spdif_out, .put = snd_hdsp_put_spdif_out }
1652 
1653 static int hdsp_spdif_out(struct hdsp *hdsp)
1654 {
1655         return (hdsp->control_register & HDSP_SPDIFOpticalOut) ? 1 : 0;
1656 }
1657 
1658 static int hdsp_set_spdif_output(struct hdsp *hdsp, int out)
1659 {
1660         if (out)
1661                 hdsp->control_register |= HDSP_SPDIFOpticalOut;
1662         else
1663                 hdsp->control_register &= ~HDSP_SPDIFOpticalOut;
1664         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1665         return 0;
1666 }
1667 
1668 #define snd_hdsp_info_spdif_bits        snd_ctl_boolean_mono_info
1669 
1670 static int snd_hdsp_get_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1671 {
1672         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1673 
1674         ucontrol->value.integer.value[0] = hdsp_spdif_out(hdsp);
1675         return 0;
1676 }
1677 
1678 static int snd_hdsp_put_spdif_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1679 {
1680         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1681         int change;
1682         unsigned int val;
1683 
1684         if (!snd_hdsp_use_is_exclusive(hdsp))
1685                 return -EBUSY;
1686         val = ucontrol->value.integer.value[0] & 1;
1687         spin_lock_irq(&hdsp->lock);
1688         change = (int)val != hdsp_spdif_out(hdsp);
1689         hdsp_set_spdif_output(hdsp, val);
1690         spin_unlock_irq(&hdsp->lock);
1691         return change;
1692 }
1693 
1694 #define HDSP_SPDIF_PROFESSIONAL(xname, xindex) \
1695 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1696   .info = snd_hdsp_info_spdif_bits, \
1697   .get = snd_hdsp_get_spdif_professional, .put = snd_hdsp_put_spdif_professional }
1698 
1699 static int hdsp_spdif_professional(struct hdsp *hdsp)
1700 {
1701         return (hdsp->control_register & HDSP_SPDIFProfessional) ? 1 : 0;
1702 }
1703 
1704 static int hdsp_set_spdif_professional(struct hdsp *hdsp, int val)
1705 {
1706         if (val)
1707                 hdsp->control_register |= HDSP_SPDIFProfessional;
1708         else
1709                 hdsp->control_register &= ~HDSP_SPDIFProfessional;
1710         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1711         return 0;
1712 }
1713 
1714 static int snd_hdsp_get_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1715 {
1716         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1717 
1718         ucontrol->value.integer.value[0] = hdsp_spdif_professional(hdsp);
1719         return 0;
1720 }
1721 
1722 static int snd_hdsp_put_spdif_professional(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1723 {
1724         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1725         int change;
1726         unsigned int val;
1727 
1728         if (!snd_hdsp_use_is_exclusive(hdsp))
1729                 return -EBUSY;
1730         val = ucontrol->value.integer.value[0] & 1;
1731         spin_lock_irq(&hdsp->lock);
1732         change = (int)val != hdsp_spdif_professional(hdsp);
1733         hdsp_set_spdif_professional(hdsp, val);
1734         spin_unlock_irq(&hdsp->lock);
1735         return change;
1736 }
1737 
1738 #define HDSP_SPDIF_EMPHASIS(xname, xindex) \
1739 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1740   .info = snd_hdsp_info_spdif_bits, \
1741   .get = snd_hdsp_get_spdif_emphasis, .put = snd_hdsp_put_spdif_emphasis }
1742 
1743 static int hdsp_spdif_emphasis(struct hdsp *hdsp)
1744 {
1745         return (hdsp->control_register & HDSP_SPDIFEmphasis) ? 1 : 0;
1746 }
1747 
1748 static int hdsp_set_spdif_emphasis(struct hdsp *hdsp, int val)
1749 {
1750         if (val)
1751                 hdsp->control_register |= HDSP_SPDIFEmphasis;
1752         else
1753                 hdsp->control_register &= ~HDSP_SPDIFEmphasis;
1754         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1755         return 0;
1756 }
1757 
1758 static int snd_hdsp_get_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1759 {
1760         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1761 
1762         ucontrol->value.integer.value[0] = hdsp_spdif_emphasis(hdsp);
1763         return 0;
1764 }
1765 
1766 static int snd_hdsp_put_spdif_emphasis(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1767 {
1768         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1769         int change;
1770         unsigned int val;
1771 
1772         if (!snd_hdsp_use_is_exclusive(hdsp))
1773                 return -EBUSY;
1774         val = ucontrol->value.integer.value[0] & 1;
1775         spin_lock_irq(&hdsp->lock);
1776         change = (int)val != hdsp_spdif_emphasis(hdsp);
1777         hdsp_set_spdif_emphasis(hdsp, val);
1778         spin_unlock_irq(&hdsp->lock);
1779         return change;
1780 }
1781 
1782 #define HDSP_SPDIF_NON_AUDIO(xname, xindex) \
1783 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1784   .info = snd_hdsp_info_spdif_bits, \
1785   .get = snd_hdsp_get_spdif_nonaudio, .put = snd_hdsp_put_spdif_nonaudio }
1786 
1787 static int hdsp_spdif_nonaudio(struct hdsp *hdsp)
1788 {
1789         return (hdsp->control_register & HDSP_SPDIFNonAudio) ? 1 : 0;
1790 }
1791 
1792 static int hdsp_set_spdif_nonaudio(struct hdsp *hdsp, int val)
1793 {
1794         if (val)
1795                 hdsp->control_register |= HDSP_SPDIFNonAudio;
1796         else
1797                 hdsp->control_register &= ~HDSP_SPDIFNonAudio;
1798         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
1799         return 0;
1800 }
1801 
1802 static int snd_hdsp_get_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1803 {
1804         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1805 
1806         ucontrol->value.integer.value[0] = hdsp_spdif_nonaudio(hdsp);
1807         return 0;
1808 }
1809 
1810 static int snd_hdsp_put_spdif_nonaudio(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1811 {
1812         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1813         int change;
1814         unsigned int val;
1815 
1816         if (!snd_hdsp_use_is_exclusive(hdsp))
1817                 return -EBUSY;
1818         val = ucontrol->value.integer.value[0] & 1;
1819         spin_lock_irq(&hdsp->lock);
1820         change = (int)val != hdsp_spdif_nonaudio(hdsp);
1821         hdsp_set_spdif_nonaudio(hdsp, val);
1822         spin_unlock_irq(&hdsp->lock);
1823         return change;
1824 }
1825 
1826 #define HDSP_SPDIF_SAMPLE_RATE(xname, xindex) \
1827 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1828   .name = xname, \
1829   .index = xindex, \
1830   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1831   .info = snd_hdsp_info_spdif_sample_rate, \
1832   .get = snd_hdsp_get_spdif_sample_rate \
1833 }
1834 
1835 static int snd_hdsp_info_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1836 {
1837         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1838         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1839 
1840         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1841         uinfo->count = 1;
1842         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7;
1843         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1844                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1845         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1846         return 0;
1847 }
1848 
1849 static int snd_hdsp_get_spdif_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1850 {
1851         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1852 
1853         switch (hdsp_spdif_sample_rate(hdsp)) {
1854         case 32000:
1855                 ucontrol->value.enumerated.item[0] = 0;
1856                 break;
1857         case 44100:
1858                 ucontrol->value.enumerated.item[0] = 1;
1859                 break;
1860         case 48000:
1861                 ucontrol->value.enumerated.item[0] = 2;
1862                 break;
1863         case 64000:
1864                 ucontrol->value.enumerated.item[0] = 3;
1865                 break;
1866         case 88200:
1867                 ucontrol->value.enumerated.item[0] = 4;
1868                 break;
1869         case 96000:
1870                 ucontrol->value.enumerated.item[0] = 5;
1871                 break;
1872         case 128000:
1873                 ucontrol->value.enumerated.item[0] = 7;
1874                 break;
1875         case 176400:
1876                 ucontrol->value.enumerated.item[0] = 8;
1877                 break;
1878         case 192000:
1879                 ucontrol->value.enumerated.item[0] = 9;
1880                 break;
1881         default:
1882                 ucontrol->value.enumerated.item[0] = 6;
1883         }
1884         return 0;
1885 }
1886 
1887 #define HDSP_SYSTEM_SAMPLE_RATE(xname, xindex) \
1888 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1889   .name = xname, \
1890   .index = xindex, \
1891   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1892   .info = snd_hdsp_info_system_sample_rate, \
1893   .get = snd_hdsp_get_system_sample_rate \
1894 }
1895 
1896 static int snd_hdsp_info_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1897 {
1898         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1899         uinfo->count = 1;
1900         return 0;
1901 }
1902 
1903 static int snd_hdsp_get_system_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1904 {
1905         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1906 
1907         ucontrol->value.enumerated.item[0] = hdsp->system_sample_rate;
1908         return 0;
1909 }
1910 
1911 #define HDSP_AUTOSYNC_SAMPLE_RATE(xname, xindex) \
1912 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1913   .name = xname, \
1914   .index = xindex, \
1915   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1916   .info = snd_hdsp_info_autosync_sample_rate, \
1917   .get = snd_hdsp_get_autosync_sample_rate \
1918 }
1919 
1920 static int snd_hdsp_info_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1921 {
1922         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1923         static char *texts[] = {"32000", "44100", "48000", "64000", "88200", "96000", "None", "128000", "176400", "192000"};
1924         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1925         uinfo->count = 1;
1926         uinfo->value.enumerated.items = (hdsp->io_type == H9632) ? 10 : 7 ;
1927         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1928                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1929         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1930         return 0;
1931 }
1932 
1933 static int snd_hdsp_get_autosync_sample_rate(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
1934 {
1935         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
1936 
1937         switch (hdsp_external_sample_rate(hdsp)) {
1938         case 32000:
1939                 ucontrol->value.enumerated.item[0] = 0;
1940                 break;
1941         case 44100:
1942                 ucontrol->value.enumerated.item[0] = 1;
1943                 break;
1944         case 48000:
1945                 ucontrol->value.enumerated.item[0] = 2;
1946                 break;
1947         case 64000:
1948                 ucontrol->value.enumerated.item[0] = 3;
1949                 break;
1950         case 88200:
1951                 ucontrol->value.enumerated.item[0] = 4;
1952                 break;
1953         case 96000:
1954                 ucontrol->value.enumerated.item[0] = 5;
1955                 break;
1956         case 128000:
1957                 ucontrol->value.enumerated.item[0] = 7;
1958                 break;
1959         case 176400:
1960                 ucontrol->value.enumerated.item[0] = 8;
1961                 break;
1962         case 192000:
1963                 ucontrol->value.enumerated.item[0] = 9;
1964                 break;
1965         default:
1966                 ucontrol->value.enumerated.item[0] = 6;
1967         }
1968         return 0;
1969 }
1970 
1971 #define HDSP_SYSTEM_CLOCK_MODE(xname, xindex) \
1972 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1973   .name = xname, \
1974   .index = xindex, \
1975   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
1976   .info = snd_hdsp_info_system_clock_mode, \
1977   .get = snd_hdsp_get_system_clock_mode \
1978 }
1979 
1980 static int hdsp_system_clock_mode(struct hdsp *hdsp)
1981 {
1982         if (hdsp->control_register & HDSP_ClockModeMaster)
1983                 return 0;
1984         else if (hdsp_external_sample_rate(hdsp) != hdsp->system_sample_rate)
1985                         return 0;
1986         return 1;
1987 }
1988 
1989 static int snd_hdsp_info_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
1990 {
1991         static char *texts[] = {"Master", "Slave" };
1992 
1993         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
1994         uinfo->count = 1;
1995         uinfo->value.enumerated.items = 2;
1996         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
1997                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
1998         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
1999         return 0;
2000 }
2001 
2002 static int snd_hdsp_get_system_clock_mode(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2003 {
2004         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2005 
2006         ucontrol->value.enumerated.item[0] = hdsp_system_clock_mode(hdsp);
2007         return 0;
2008 }
2009 
2010 #define HDSP_CLOCK_SOURCE(xname, xindex) \
2011 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2012   .name = xname, \
2013   .index = xindex, \
2014   .info = snd_hdsp_info_clock_source, \
2015   .get = snd_hdsp_get_clock_source, \
2016   .put = snd_hdsp_put_clock_source \
2017 }
2018 
2019 static int hdsp_clock_source(struct hdsp *hdsp)
2020 {
2021         if (hdsp->control_register & HDSP_ClockModeMaster) {
2022                 switch (hdsp->system_sample_rate) {
2023                 case 32000:
2024                         return 1;
2025                 case 44100:
2026                         return 2;
2027                 case 48000:
2028                         return 3;
2029                 case 64000:
2030                         return 4;
2031                 case 88200:
2032                         return 5;
2033                 case 96000:
2034                         return 6;
2035                 case 128000:
2036                         return 7;
2037                 case 176400:
2038                         return 8;
2039                 case 192000:
2040                         return 9;
2041                 default:
2042                         return 3;
2043                 }
2044         } else {
2045                 return 0;
2046         }
2047 }
2048 
2049 static int hdsp_set_clock_source(struct hdsp *hdsp, int mode)
2050 {
2051         int rate;
2052         switch (mode) {
2053         case HDSP_CLOCK_SOURCE_AUTOSYNC:
2054                 if (hdsp_external_sample_rate(hdsp) != 0) {
2055                     if (!hdsp_set_rate(hdsp, hdsp_external_sample_rate(hdsp), 1)) {
2056                         hdsp->control_register &= ~HDSP_ClockModeMaster;
2057                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2058                         return 0;
2059                     }
2060                 }
2061                 return -1;
2062         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
2063                 rate = 32000;
2064                 break;
2065         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
2066                 rate = 44100;
2067                 break;
2068         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
2069                 rate = 48000;
2070                 break;
2071         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
2072                 rate = 64000;
2073                 break;
2074         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
2075                 rate = 88200;
2076                 break;
2077         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
2078                 rate = 96000;
2079                 break;
2080         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
2081                 rate = 128000;
2082                 break;
2083         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
2084                 rate = 176400;
2085                 break;
2086         case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
2087                 rate = 192000;
2088                 break;
2089         default:
2090                 rate = 48000;
2091         }
2092         hdsp->control_register |= HDSP_ClockModeMaster;
2093         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2094         hdsp_set_rate(hdsp, rate, 1);
2095         return 0;
2096 }
2097 
2098 static int snd_hdsp_info_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2099 {
2100         static char *texts[] = {"AutoSync", "Internal 32.0 kHz", "Internal 44.1 kHz", "Internal 48.0 kHz", "Internal 64.0 kHz", "Internal 88.2 kHz", "Internal 96.0 kHz", "Internal 128 kHz", "Internal 176.4 kHz", "Internal 192.0 KHz" };
2101         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2102 
2103         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2104         uinfo->count = 1;
2105         if (hdsp->io_type == H9632)
2106             uinfo->value.enumerated.items = 10;
2107         else
2108             uinfo->value.enumerated.items = 7;
2109         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2110                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2111         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2112         return 0;
2113 }
2114 
2115 static int snd_hdsp_get_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2116 {
2117         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2118 
2119         ucontrol->value.enumerated.item[0] = hdsp_clock_source(hdsp);
2120         return 0;
2121 }
2122 
2123 static int snd_hdsp_put_clock_source(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2124 {
2125         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2126         int change;
2127         int val;
2128 
2129         if (!snd_hdsp_use_is_exclusive(hdsp))
2130                 return -EBUSY;
2131         val = ucontrol->value.enumerated.item[0];
2132         if (val < 0) val = 0;
2133         if (hdsp->io_type == H9632) {
2134                 if (val > 9)
2135                         val = 9;
2136         } else {
2137                 if (val > 6)
2138                         val = 6;
2139         }
2140         spin_lock_irq(&hdsp->lock);
2141         if (val != hdsp_clock_source(hdsp))
2142                 change = (hdsp_set_clock_source(hdsp, val) == 0) ? 1 : 0;
2143         else
2144                 change = 0;
2145         spin_unlock_irq(&hdsp->lock);
2146         return change;
2147 }
2148 
2149 #define snd_hdsp_info_clock_source_lock         snd_ctl_boolean_mono_info
2150 
2151 static int snd_hdsp_get_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2152 {
2153         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2154 
2155         ucontrol->value.integer.value[0] = hdsp->clock_source_locked;
2156         return 0;
2157 }
2158 
2159 static int snd_hdsp_put_clock_source_lock(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2160 {
2161         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2162         int change;
2163 
2164         change = (int)ucontrol->value.integer.value[0] != hdsp->clock_source_locked;
2165         if (change)
2166                 hdsp->clock_source_locked = !!ucontrol->value.integer.value[0];
2167         return change;
2168 }
2169 
2170 #define HDSP_DA_GAIN(xname, xindex) \
2171 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2172   .name = xname, \
2173   .index = xindex, \
2174   .info = snd_hdsp_info_da_gain, \
2175   .get = snd_hdsp_get_da_gain, \
2176   .put = snd_hdsp_put_da_gain \
2177 }
2178 
2179 static int hdsp_da_gain(struct hdsp *hdsp)
2180 {
2181         switch (hdsp->control_register & HDSP_DAGainMask) {
2182         case HDSP_DAGainHighGain:
2183                 return 0;
2184         case HDSP_DAGainPlus4dBu:
2185                 return 1;
2186         case HDSP_DAGainMinus10dBV:
2187                 return 2;
2188         default:
2189                 return 1;
2190         }
2191 }
2192 
2193 static int hdsp_set_da_gain(struct hdsp *hdsp, int mode)
2194 {
2195         hdsp->control_register &= ~HDSP_DAGainMask;
2196         switch (mode) {
2197         case 0:
2198                 hdsp->control_register |= HDSP_DAGainHighGain;
2199                 break;
2200         case 1:
2201                 hdsp->control_register |= HDSP_DAGainPlus4dBu;
2202                 break;
2203         case 2:
2204                 hdsp->control_register |= HDSP_DAGainMinus10dBV;
2205                 break;
2206         default:
2207                 return -1;
2208 
2209         }
2210         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2211         return 0;
2212 }
2213 
2214 static int snd_hdsp_info_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2215 {
2216         static char *texts[] = {"Hi Gain", "+4 dBu", "-10 dbV"};
2217 
2218         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2219         uinfo->count = 1;
2220         uinfo->value.enumerated.items = 3;
2221         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2222                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2223         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2224         return 0;
2225 }
2226 
2227 static int snd_hdsp_get_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2228 {
2229         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2230 
2231         ucontrol->value.enumerated.item[0] = hdsp_da_gain(hdsp);
2232         return 0;
2233 }
2234 
2235 static int snd_hdsp_put_da_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2236 {
2237         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2238         int change;
2239         int val;
2240 
2241         if (!snd_hdsp_use_is_exclusive(hdsp))
2242                 return -EBUSY;
2243         val = ucontrol->value.enumerated.item[0];
2244         if (val < 0) val = 0;
2245         if (val > 2) val = 2;
2246         spin_lock_irq(&hdsp->lock);
2247         if (val != hdsp_da_gain(hdsp))
2248                 change = (hdsp_set_da_gain(hdsp, val) == 0) ? 1 : 0;
2249         else
2250                 change = 0;
2251         spin_unlock_irq(&hdsp->lock);
2252         return change;
2253 }
2254 
2255 #define HDSP_AD_GAIN(xname, xindex) \
2256 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2257   .name = xname, \
2258   .index = xindex, \
2259   .info = snd_hdsp_info_ad_gain, \
2260   .get = snd_hdsp_get_ad_gain, \
2261   .put = snd_hdsp_put_ad_gain \
2262 }
2263 
2264 static int hdsp_ad_gain(struct hdsp *hdsp)
2265 {
2266         switch (hdsp->control_register & HDSP_ADGainMask) {
2267         case HDSP_ADGainMinus10dBV:
2268                 return 0;
2269         case HDSP_ADGainPlus4dBu:
2270                 return 1;
2271         case HDSP_ADGainLowGain:
2272                 return 2;
2273         default:
2274                 return 1;
2275         }
2276 }
2277 
2278 static int hdsp_set_ad_gain(struct hdsp *hdsp, int mode)
2279 {
2280         hdsp->control_register &= ~HDSP_ADGainMask;
2281         switch (mode) {
2282         case 0:
2283                 hdsp->control_register |= HDSP_ADGainMinus10dBV;
2284                 break;
2285         case 1:
2286                 hdsp->control_register |= HDSP_ADGainPlus4dBu;
2287                 break;
2288         case 2:
2289                 hdsp->control_register |= HDSP_ADGainLowGain;
2290                 break;
2291         default:
2292                 return -1;
2293 
2294         }
2295         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2296         return 0;
2297 }
2298 
2299 static int snd_hdsp_info_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2300 {
2301         static char *texts[] = {"-10 dBV", "+4 dBu", "Lo Gain"};
2302 
2303         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2304         uinfo->count = 1;
2305         uinfo->value.enumerated.items = 3;
2306         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2307                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2308         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2309         return 0;
2310 }
2311 
2312 static int snd_hdsp_get_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2313 {
2314         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2315 
2316         ucontrol->value.enumerated.item[0] = hdsp_ad_gain(hdsp);
2317         return 0;
2318 }
2319 
2320 static int snd_hdsp_put_ad_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2321 {
2322         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2323         int change;
2324         int val;
2325 
2326         if (!snd_hdsp_use_is_exclusive(hdsp))
2327                 return -EBUSY;
2328         val = ucontrol->value.enumerated.item[0];
2329         if (val < 0) val = 0;
2330         if (val > 2) val = 2;
2331         spin_lock_irq(&hdsp->lock);
2332         if (val != hdsp_ad_gain(hdsp))
2333                 change = (hdsp_set_ad_gain(hdsp, val) == 0) ? 1 : 0;
2334         else
2335                 change = 0;
2336         spin_unlock_irq(&hdsp->lock);
2337         return change;
2338 }
2339 
2340 #define HDSP_PHONE_GAIN(xname, xindex) \
2341 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2342   .name = xname, \
2343   .index = xindex, \
2344   .info = snd_hdsp_info_phone_gain, \
2345   .get = snd_hdsp_get_phone_gain, \
2346   .put = snd_hdsp_put_phone_gain \
2347 }
2348 
2349 static int hdsp_phone_gain(struct hdsp *hdsp)
2350 {
2351         switch (hdsp->control_register & HDSP_PhoneGainMask) {
2352         case HDSP_PhoneGain0dB:
2353                 return 0;
2354         case HDSP_PhoneGainMinus6dB:
2355                 return 1;
2356         case HDSP_PhoneGainMinus12dB:
2357                 return 2;
2358         default:
2359                 return 0;
2360         }
2361 }
2362 
2363 static int hdsp_set_phone_gain(struct hdsp *hdsp, int mode)
2364 {
2365         hdsp->control_register &= ~HDSP_PhoneGainMask;
2366         switch (mode) {
2367         case 0:
2368                 hdsp->control_register |= HDSP_PhoneGain0dB;
2369                 break;
2370         case 1:
2371                 hdsp->control_register |= HDSP_PhoneGainMinus6dB;
2372                 break;
2373         case 2:
2374                 hdsp->control_register |= HDSP_PhoneGainMinus12dB;
2375                 break;
2376         default:
2377                 return -1;
2378 
2379         }
2380         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2381         return 0;
2382 }
2383 
2384 static int snd_hdsp_info_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2385 {
2386         static char *texts[] = {"0 dB", "-6 dB", "-12 dB"};
2387 
2388         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2389         uinfo->count = 1;
2390         uinfo->value.enumerated.items = 3;
2391         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2392                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2393         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2394         return 0;
2395 }
2396 
2397 static int snd_hdsp_get_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2398 {
2399         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2400 
2401         ucontrol->value.enumerated.item[0] = hdsp_phone_gain(hdsp);
2402         return 0;
2403 }
2404 
2405 static int snd_hdsp_put_phone_gain(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2406 {
2407         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2408         int change;
2409         int val;
2410 
2411         if (!snd_hdsp_use_is_exclusive(hdsp))
2412                 return -EBUSY;
2413         val = ucontrol->value.enumerated.item[0];
2414         if (val < 0) val = 0;
2415         if (val > 2) val = 2;
2416         spin_lock_irq(&hdsp->lock);
2417         if (val != hdsp_phone_gain(hdsp))
2418                 change = (hdsp_set_phone_gain(hdsp, val) == 0) ? 1 : 0;
2419         else
2420                 change = 0;
2421         spin_unlock_irq(&hdsp->lock);
2422         return change;
2423 }
2424 
2425 #define HDSP_XLR_BREAKOUT_CABLE(xname, xindex) \
2426 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2427   .name = xname, \
2428   .index = xindex, \
2429   .info = snd_hdsp_info_xlr_breakout_cable, \
2430   .get = snd_hdsp_get_xlr_breakout_cable, \
2431   .put = snd_hdsp_put_xlr_breakout_cable \
2432 }
2433 
2434 static int hdsp_xlr_breakout_cable(struct hdsp *hdsp)
2435 {
2436         if (hdsp->control_register & HDSP_XLRBreakoutCable)
2437                 return 1;
2438         return 0;
2439 }
2440 
2441 static int hdsp_set_xlr_breakout_cable(struct hdsp *hdsp, int mode)
2442 {
2443         if (mode)
2444                 hdsp->control_register |= HDSP_XLRBreakoutCable;
2445         else
2446                 hdsp->control_register &= ~HDSP_XLRBreakoutCable;
2447         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2448         return 0;
2449 }
2450 
2451 #define snd_hdsp_info_xlr_breakout_cable        snd_ctl_boolean_mono_info
2452 
2453 static int snd_hdsp_get_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2454 {
2455         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2456 
2457         ucontrol->value.enumerated.item[0] = hdsp_xlr_breakout_cable(hdsp);
2458         return 0;
2459 }
2460 
2461 static int snd_hdsp_put_xlr_breakout_cable(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2462 {
2463         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2464         int change;
2465         int val;
2466 
2467         if (!snd_hdsp_use_is_exclusive(hdsp))
2468                 return -EBUSY;
2469         val = ucontrol->value.integer.value[0] & 1;
2470         spin_lock_irq(&hdsp->lock);
2471         change = (int)val != hdsp_xlr_breakout_cable(hdsp);
2472         hdsp_set_xlr_breakout_cable(hdsp, val);
2473         spin_unlock_irq(&hdsp->lock);
2474         return change;
2475 }
2476 
2477 /* (De)activates old RME Analog Extension Board
2478    These are connected to the internal ADAT connector
2479    Switching this on desactivates external ADAT
2480 */
2481 #define HDSP_AEB(xname, xindex) \
2482 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2483   .name = xname, \
2484   .index = xindex, \
2485   .info = snd_hdsp_info_aeb, \
2486   .get = snd_hdsp_get_aeb, \
2487   .put = snd_hdsp_put_aeb \
2488 }
2489 
2490 static int hdsp_aeb(struct hdsp *hdsp)
2491 {
2492         if (hdsp->control_register & HDSP_AnalogExtensionBoard)
2493                 return 1;
2494         return 0;
2495 }
2496 
2497 static int hdsp_set_aeb(struct hdsp *hdsp, int mode)
2498 {
2499         if (mode)
2500                 hdsp->control_register |= HDSP_AnalogExtensionBoard;
2501         else
2502                 hdsp->control_register &= ~HDSP_AnalogExtensionBoard;
2503         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2504         return 0;
2505 }
2506 
2507 #define snd_hdsp_info_aeb               snd_ctl_boolean_mono_info
2508 
2509 static int snd_hdsp_get_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2510 {
2511         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2512 
2513         ucontrol->value.enumerated.item[0] = hdsp_aeb(hdsp);
2514         return 0;
2515 }
2516 
2517 static int snd_hdsp_put_aeb(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2518 {
2519         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2520         int change;
2521         int val;
2522 
2523         if (!snd_hdsp_use_is_exclusive(hdsp))
2524                 return -EBUSY;
2525         val = ucontrol->value.integer.value[0] & 1;
2526         spin_lock_irq(&hdsp->lock);
2527         change = (int)val != hdsp_aeb(hdsp);
2528         hdsp_set_aeb(hdsp, val);
2529         spin_unlock_irq(&hdsp->lock);
2530         return change;
2531 }
2532 
2533 #define HDSP_PREF_SYNC_REF(xname, xindex) \
2534 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2535   .name = xname, \
2536   .index = xindex, \
2537   .info = snd_hdsp_info_pref_sync_ref, \
2538   .get = snd_hdsp_get_pref_sync_ref, \
2539   .put = snd_hdsp_put_pref_sync_ref \
2540 }
2541 
2542 static int hdsp_pref_sync_ref(struct hdsp *hdsp)
2543 {
2544         /* Notice that this looks at the requested sync source,
2545            not the one actually in use.
2546         */
2547 
2548         switch (hdsp->control_register & HDSP_SyncRefMask) {
2549         case HDSP_SyncRef_ADAT1:
2550                 return HDSP_SYNC_FROM_ADAT1;
2551         case HDSP_SyncRef_ADAT2:
2552                 return HDSP_SYNC_FROM_ADAT2;
2553         case HDSP_SyncRef_ADAT3:
2554                 return HDSP_SYNC_FROM_ADAT3;
2555         case HDSP_SyncRef_SPDIF:
2556                 return HDSP_SYNC_FROM_SPDIF;
2557         case HDSP_SyncRef_WORD:
2558                 return HDSP_SYNC_FROM_WORD;
2559         case HDSP_SyncRef_ADAT_SYNC:
2560                 return HDSP_SYNC_FROM_ADAT_SYNC;
2561         default:
2562                 return HDSP_SYNC_FROM_WORD;
2563         }
2564         return 0;
2565 }
2566 
2567 static int hdsp_set_pref_sync_ref(struct hdsp *hdsp, int pref)
2568 {
2569         hdsp->control_register &= ~HDSP_SyncRefMask;
2570         switch (pref) {
2571         case HDSP_SYNC_FROM_ADAT1:
2572                 hdsp->control_register &= ~HDSP_SyncRefMask; /* clear SyncRef bits */
2573                 break;
2574         case HDSP_SYNC_FROM_ADAT2:
2575                 hdsp->control_register |= HDSP_SyncRef_ADAT2;
2576                 break;
2577         case HDSP_SYNC_FROM_ADAT3:
2578                 hdsp->control_register |= HDSP_SyncRef_ADAT3;
2579                 break;
2580         case HDSP_SYNC_FROM_SPDIF:
2581                 hdsp->control_register |= HDSP_SyncRef_SPDIF;
2582                 break;
2583         case HDSP_SYNC_FROM_WORD:
2584                 hdsp->control_register |= HDSP_SyncRef_WORD;
2585                 break;
2586         case HDSP_SYNC_FROM_ADAT_SYNC:
2587                 hdsp->control_register |= HDSP_SyncRef_ADAT_SYNC;
2588                 break;
2589         default:
2590                 return -1;
2591         }
2592         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2593         return 0;
2594 }
2595 
2596 static int snd_hdsp_info_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2597 {
2598         static char *texts[] = {"Word", "IEC958", "ADAT1", "ADAT Sync", "ADAT2", "ADAT3" };
2599         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2600 
2601         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2602         uinfo->count = 1;
2603 
2604         switch (hdsp->io_type) {
2605         case Digiface:
2606         case H9652:
2607                 uinfo->value.enumerated.items = 6;
2608                 break;
2609         case Multiface:
2610                 uinfo->value.enumerated.items = 4;
2611                 break;
2612         case H9632:
2613                 uinfo->value.enumerated.items = 3;
2614                 break;
2615         default:
2616                 uinfo->value.enumerated.items = 0;
2617                 break;
2618         }
2619 
2620         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2621                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2622         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2623         return 0;
2624 }
2625 
2626 static int snd_hdsp_get_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2627 {
2628         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2629 
2630         ucontrol->value.enumerated.item[0] = hdsp_pref_sync_ref(hdsp);
2631         return 0;
2632 }
2633 
2634 static int snd_hdsp_put_pref_sync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2635 {
2636         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2637         int change, max;
2638         unsigned int val;
2639 
2640         if (!snd_hdsp_use_is_exclusive(hdsp))
2641                 return -EBUSY;
2642 
2643         switch (hdsp->io_type) {
2644         case Digiface:
2645         case H9652:
2646                 max = 6;
2647                 break;
2648         case Multiface:
2649                 max = 4;
2650                 break;
2651         case H9632:
2652                 max = 3;
2653                 break;
2654         default:
2655                 return -EIO;
2656         }
2657 
2658         val = ucontrol->value.enumerated.item[0] % max;
2659         spin_lock_irq(&hdsp->lock);
2660         change = (int)val != hdsp_pref_sync_ref(hdsp);
2661         hdsp_set_pref_sync_ref(hdsp, val);
2662         spin_unlock_irq(&hdsp->lock);
2663         return change;
2664 }
2665 
2666 #define HDSP_AUTOSYNC_REF(xname, xindex) \
2667 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2668   .name = xname, \
2669   .index = xindex, \
2670   .access = SNDRV_CTL_ELEM_ACCESS_READ, \
2671   .info = snd_hdsp_info_autosync_ref, \
2672   .get = snd_hdsp_get_autosync_ref, \
2673 }
2674 
2675 static int hdsp_autosync_ref(struct hdsp *hdsp)
2676 {
2677         /* This looks at the autosync selected sync reference */
2678         unsigned int status2 = hdsp_read(hdsp, HDSP_status2Register);
2679 
2680         switch (status2 & HDSP_SelSyncRefMask) {
2681         case HDSP_SelSyncRef_WORD:
2682                 return HDSP_AUTOSYNC_FROM_WORD;
2683         case HDSP_SelSyncRef_ADAT_SYNC:
2684                 return HDSP_AUTOSYNC_FROM_ADAT_SYNC;
2685         case HDSP_SelSyncRef_SPDIF:
2686                 return HDSP_AUTOSYNC_FROM_SPDIF;
2687         case HDSP_SelSyncRefMask:
2688                 return HDSP_AUTOSYNC_FROM_NONE;
2689         case HDSP_SelSyncRef_ADAT1:
2690                 return HDSP_AUTOSYNC_FROM_ADAT1;
2691         case HDSP_SelSyncRef_ADAT2:
2692                 return HDSP_AUTOSYNC_FROM_ADAT2;
2693         case HDSP_SelSyncRef_ADAT3:
2694                 return HDSP_AUTOSYNC_FROM_ADAT3;
2695         default:
2696                 return HDSP_AUTOSYNC_FROM_WORD;
2697         }
2698         return 0;
2699 }
2700 
2701 static int snd_hdsp_info_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2702 {
2703         static char *texts[] = {"Word", "ADAT Sync", "IEC958", "None", "ADAT1", "ADAT2", "ADAT3" };
2704 
2705         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2706         uinfo->count = 1;
2707         uinfo->value.enumerated.items = 7;
2708         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2709                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2710         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2711         return 0;
2712 }
2713 
2714 static int snd_hdsp_get_autosync_ref(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2715 {
2716         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2717 
2718         ucontrol->value.enumerated.item[0] = hdsp_autosync_ref(hdsp);
2719         return 0;
2720 }
2721 
2722 #define HDSP_LINE_OUT(xname, xindex) \
2723 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2724   .name = xname, \
2725   .index = xindex, \
2726   .info = snd_hdsp_info_line_out, \
2727   .get = snd_hdsp_get_line_out, \
2728   .put = snd_hdsp_put_line_out \
2729 }
2730 
2731 static int hdsp_line_out(struct hdsp *hdsp)
2732 {
2733         return (hdsp->control_register & HDSP_LineOut) ? 1 : 0;
2734 }
2735 
2736 static int hdsp_set_line_output(struct hdsp *hdsp, int out)
2737 {
2738         if (out)
2739                 hdsp->control_register |= HDSP_LineOut;
2740         else
2741                 hdsp->control_register &= ~HDSP_LineOut;
2742         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
2743         return 0;
2744 }
2745 
2746 #define snd_hdsp_info_line_out          snd_ctl_boolean_mono_info
2747 
2748 static int snd_hdsp_get_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2749 {
2750         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2751 
2752         spin_lock_irq(&hdsp->lock);
2753         ucontrol->value.integer.value[0] = hdsp_line_out(hdsp);
2754         spin_unlock_irq(&hdsp->lock);
2755         return 0;
2756 }
2757 
2758 static int snd_hdsp_put_line_out(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2759 {
2760         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2761         int change;
2762         unsigned int val;
2763 
2764         if (!snd_hdsp_use_is_exclusive(hdsp))
2765                 return -EBUSY;
2766         val = ucontrol->value.integer.value[0] & 1;
2767         spin_lock_irq(&hdsp->lock);
2768         change = (int)val != hdsp_line_out(hdsp);
2769         hdsp_set_line_output(hdsp, val);
2770         spin_unlock_irq(&hdsp->lock);
2771         return change;
2772 }
2773 
2774 #define HDSP_PRECISE_POINTER(xname, xindex) \
2775 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2776   .name = xname, \
2777   .index = xindex, \
2778   .info = snd_hdsp_info_precise_pointer, \
2779   .get = snd_hdsp_get_precise_pointer, \
2780   .put = snd_hdsp_put_precise_pointer \
2781 }
2782 
2783 static int hdsp_set_precise_pointer(struct hdsp *hdsp, int precise)
2784 {
2785         if (precise)
2786                 hdsp->precise_ptr = 1;
2787         else
2788                 hdsp->precise_ptr = 0;
2789         return 0;
2790 }
2791 
2792 #define snd_hdsp_info_precise_pointer           snd_ctl_boolean_mono_info
2793 
2794 static int snd_hdsp_get_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2795 {
2796         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2797 
2798         spin_lock_irq(&hdsp->lock);
2799         ucontrol->value.integer.value[0] = hdsp->precise_ptr;
2800         spin_unlock_irq(&hdsp->lock);
2801         return 0;
2802 }
2803 
2804 static int snd_hdsp_put_precise_pointer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2805 {
2806         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2807         int change;
2808         unsigned int val;
2809 
2810         if (!snd_hdsp_use_is_exclusive(hdsp))
2811                 return -EBUSY;
2812         val = ucontrol->value.integer.value[0] & 1;
2813         spin_lock_irq(&hdsp->lock);
2814         change = (int)val != hdsp->precise_ptr;
2815         hdsp_set_precise_pointer(hdsp, val);
2816         spin_unlock_irq(&hdsp->lock);
2817         return change;
2818 }
2819 
2820 #define HDSP_USE_MIDI_TASKLET(xname, xindex) \
2821 { .iface = SNDRV_CTL_ELEM_IFACE_CARD, \
2822   .name = xname, \
2823   .index = xindex, \
2824   .info = snd_hdsp_info_use_midi_tasklet, \
2825   .get = snd_hdsp_get_use_midi_tasklet, \
2826   .put = snd_hdsp_put_use_midi_tasklet \
2827 }
2828 
2829 static int hdsp_set_use_midi_tasklet(struct hdsp *hdsp, int use_tasklet)
2830 {
2831         if (use_tasklet)
2832                 hdsp->use_midi_tasklet = 1;
2833         else
2834                 hdsp->use_midi_tasklet = 0;
2835         return 0;
2836 }
2837 
2838 #define snd_hdsp_info_use_midi_tasklet          snd_ctl_boolean_mono_info
2839 
2840 static int snd_hdsp_get_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2841 {
2842         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2843 
2844         spin_lock_irq(&hdsp->lock);
2845         ucontrol->value.integer.value[0] = hdsp->use_midi_tasklet;
2846         spin_unlock_irq(&hdsp->lock);
2847         return 0;
2848 }
2849 
2850 static int snd_hdsp_put_use_midi_tasklet(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2851 {
2852         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2853         int change;
2854         unsigned int val;
2855 
2856         if (!snd_hdsp_use_is_exclusive(hdsp))
2857                 return -EBUSY;
2858         val = ucontrol->value.integer.value[0] & 1;
2859         spin_lock_irq(&hdsp->lock);
2860         change = (int)val != hdsp->use_midi_tasklet;
2861         hdsp_set_use_midi_tasklet(hdsp, val);
2862         spin_unlock_irq(&hdsp->lock);
2863         return change;
2864 }
2865 
2866 #define HDSP_MIXER(xname, xindex) \
2867 { .iface = SNDRV_CTL_ELEM_IFACE_HWDEP, \
2868   .name = xname, \
2869   .index = xindex, \
2870   .device = 0, \
2871   .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
2872                  SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2873   .info = snd_hdsp_info_mixer, \
2874   .get = snd_hdsp_get_mixer, \
2875   .put = snd_hdsp_put_mixer \
2876 }
2877 
2878 static int snd_hdsp_info_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2879 {
2880         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
2881         uinfo->count = 3;
2882         uinfo->value.integer.min = 0;
2883         uinfo->value.integer.max = 65536;
2884         uinfo->value.integer.step = 1;
2885         return 0;
2886 }
2887 
2888 static int snd_hdsp_get_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2889 {
2890         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2891         int source;
2892         int destination;
2893         int addr;
2894 
2895         source = ucontrol->value.integer.value[0];
2896         destination = ucontrol->value.integer.value[1];
2897 
2898         if (source >= hdsp->max_channels)
2899                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels,destination);
2900         else
2901                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2902 
2903         spin_lock_irq(&hdsp->lock);
2904         ucontrol->value.integer.value[2] = hdsp_read_gain (hdsp, addr);
2905         spin_unlock_irq(&hdsp->lock);
2906         return 0;
2907 }
2908 
2909 static int snd_hdsp_put_mixer(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2910 {
2911         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2912         int change;
2913         int source;
2914         int destination;
2915         int gain;
2916         int addr;
2917 
2918         if (!snd_hdsp_use_is_exclusive(hdsp))
2919                 return -EBUSY;
2920 
2921         source = ucontrol->value.integer.value[0];
2922         destination = ucontrol->value.integer.value[1];
2923 
2924         if (source >= hdsp->max_channels)
2925                 addr = hdsp_playback_to_output_key(hdsp,source-hdsp->max_channels, destination);
2926         else
2927                 addr = hdsp_input_to_output_key(hdsp,source, destination);
2928 
2929         gain = ucontrol->value.integer.value[2];
2930 
2931         spin_lock_irq(&hdsp->lock);
2932         change = gain != hdsp_read_gain(hdsp, addr);
2933         if (change)
2934                 hdsp_write_gain(hdsp, addr, gain);
2935         spin_unlock_irq(&hdsp->lock);
2936         return change;
2937 }
2938 
2939 #define HDSP_WC_SYNC_CHECK(xname, xindex) \
2940 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2941   .name = xname, \
2942   .index = xindex, \
2943   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2944   .info = snd_hdsp_info_sync_check, \
2945   .get = snd_hdsp_get_wc_sync_check \
2946 }
2947 
2948 static int snd_hdsp_info_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
2949 {
2950         static char *texts[] = {"No Lock", "Lock", "Sync" };
2951         uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
2952         uinfo->count = 1;
2953         uinfo->value.enumerated.items = 3;
2954         if (uinfo->value.enumerated.item >= uinfo->value.enumerated.items)
2955                 uinfo->value.enumerated.item = uinfo->value.enumerated.items - 1;
2956         strcpy(uinfo->value.enumerated.name, texts[uinfo->value.enumerated.item]);
2957         return 0;
2958 }
2959 
2960 static int hdsp_wc_sync_check(struct hdsp *hdsp)
2961 {
2962         int status2 = hdsp_read(hdsp, HDSP_status2Register);
2963         if (status2 & HDSP_wc_lock) {
2964                 if (status2 & HDSP_wc_sync)
2965                         return 2;
2966                 else
2967                          return 1;
2968         } else
2969                 return 0;
2970         return 0;
2971 }
2972 
2973 static int snd_hdsp_get_wc_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
2974 {
2975         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
2976 
2977         ucontrol->value.enumerated.item[0] = hdsp_wc_sync_check(hdsp);
2978         return 0;
2979 }
2980 
2981 #define HDSP_SPDIF_SYNC_CHECK(xname, xindex) \
2982 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
2983   .name = xname, \
2984   .index = xindex, \
2985   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
2986   .info = snd_hdsp_info_sync_check, \
2987   .get = snd_hdsp_get_spdif_sync_check \
2988 }
2989 
2990 static int hdsp_spdif_sync_check(struct hdsp *hdsp)
2991 {
2992         int status = hdsp_read(hdsp, HDSP_statusRegister);
2993         if (status & HDSP_SPDIFErrorFlag)
2994                 return 0;
2995         else {
2996                 if (status & HDSP_SPDIFSync)
2997                         return 2;
2998                 else
2999                         return 1;
3000         }
3001         return 0;
3002 }
3003 
3004 static int snd_hdsp_get_spdif_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3005 {
3006         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3007 
3008         ucontrol->value.enumerated.item[0] = hdsp_spdif_sync_check(hdsp);
3009         return 0;
3010 }
3011 
3012 #define HDSP_ADATSYNC_SYNC_CHECK(xname, xindex) \
3013 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3014   .name = xname, \
3015   .index = xindex, \
3016   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3017   .info = snd_hdsp_info_sync_check, \
3018   .get = snd_hdsp_get_adatsync_sync_check \
3019 }
3020 
3021 static int hdsp_adatsync_sync_check(struct hdsp *hdsp)
3022 {
3023         int status = hdsp_read(hdsp, HDSP_statusRegister);
3024         if (status & HDSP_TimecodeLock) {
3025                 if (status & HDSP_TimecodeSync)
3026                         return 2;
3027                 else
3028                         return 1;
3029         } else
3030                 return 0;
3031 }
3032 
3033 static int snd_hdsp_get_adatsync_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3034 {
3035         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3036 
3037         ucontrol->value.enumerated.item[0] = hdsp_adatsync_sync_check(hdsp);
3038         return 0;
3039 }
3040 
3041 #define HDSP_ADAT_SYNC_CHECK \
3042 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3043   .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE, \
3044   .info = snd_hdsp_info_sync_check, \
3045   .get = snd_hdsp_get_adat_sync_check \
3046 }
3047 
3048 static int hdsp_adat_sync_check(struct hdsp *hdsp, int idx)
3049 {
3050         int status = hdsp_read(hdsp, HDSP_statusRegister);
3051 
3052         if (status & (HDSP_Lock0>>idx)) {
3053                 if (status & (HDSP_Sync0>>idx))
3054                         return 2;
3055                 else
3056                         return 1;
3057         } else
3058                 return 0;
3059 }
3060 
3061 static int snd_hdsp_get_adat_sync_check(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3062 {
3063         int offset;
3064         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3065 
3066         offset = ucontrol->id.index - 1;
3067         snd_BUG_ON(offset < 0);
3068 
3069         switch (hdsp->io_type) {
3070         case Digiface:
3071         case H9652:
3072                 if (offset >= 3)
3073                         return -EINVAL;
3074                 break;
3075         case Multiface:
3076         case H9632:
3077                 if (offset >= 1)
3078                         return -EINVAL;
3079                 break;
3080         default:
3081                 return -EIO;
3082         }
3083 
3084         ucontrol->value.enumerated.item[0] = hdsp_adat_sync_check(hdsp, offset);
3085         return 0;
3086 }
3087 
3088 #define HDSP_DDS_OFFSET(xname, xindex) \
3089 { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
3090   .name = xname, \
3091   .index = xindex, \
3092   .info = snd_hdsp_info_dds_offset, \
3093   .get = snd_hdsp_get_dds_offset, \
3094   .put = snd_hdsp_put_dds_offset \
3095 }
3096 
3097 static int hdsp_dds_offset(struct hdsp *hdsp)
3098 {
3099         u64 n;
3100         unsigned int dds_value = hdsp->dds_value;
3101         int system_sample_rate = hdsp->system_sample_rate;
3102 
3103         if (!dds_value)
3104                 return 0;
3105 
3106         n = DDS_NUMERATOR;
3107         /*
3108          * dds_value = n / rate
3109          * rate = n / dds_value
3110          */
3111         n = div_u64(n, dds_value);
3112         if (system_sample_rate >= 112000)
3113                 n *= 4;
3114         else if (system_sample_rate >= 56000)
3115                 n *= 2;
3116         return ((int)n) - system_sample_rate;
3117 }
3118 
3119 static int hdsp_set_dds_offset(struct hdsp *hdsp, int offset_hz)
3120 {
3121         int rate = hdsp->system_sample_rate + offset_hz;
3122         hdsp_set_dds_value(hdsp, rate);
3123         return 0;
3124 }
3125 
3126 static int snd_hdsp_info_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_info *uinfo)
3127 {
3128         uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
3129         uinfo->count = 1;
3130         uinfo->value.integer.min = -5000;
3131         uinfo->value.integer.max = 5000;
3132         return 0;
3133 }
3134 
3135 static int snd_hdsp_get_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3136 {
3137         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3138 
3139         ucontrol->value.enumerated.item[0] = hdsp_dds_offset(hdsp);
3140         return 0;
3141 }
3142 
3143 static int snd_hdsp_put_dds_offset(struct snd_kcontrol *kcontrol, struct snd_ctl_elem_value *ucontrol)
3144 {
3145         struct hdsp *hdsp = snd_kcontrol_chip(kcontrol);
3146         int change;
3147         int val;
3148 
3149         if (!snd_hdsp_use_is_exclusive(hdsp))
3150                 return -EBUSY;
3151         val = ucontrol->value.enumerated.item[0];
3152         spin_lock_irq(&hdsp->lock);
3153         if (val != hdsp_dds_offset(hdsp))
3154                 change = (hdsp_set_dds_offset(hdsp, val) == 0) ? 1 : 0;
3155         else
3156                 change = 0;
3157         spin_unlock_irq(&hdsp->lock);
3158         return change;
3159 }
3160 
3161 static struct snd_kcontrol_new snd_hdsp_9632_controls[] = {
3162 HDSP_DA_GAIN("DA Gain", 0),
3163 HDSP_AD_GAIN("AD Gain", 0),
3164 HDSP_PHONE_GAIN("Phones Gain", 0),
3165 HDSP_XLR_BREAKOUT_CABLE("XLR Breakout Cable", 0),
3166 HDSP_DDS_OFFSET("DDS Sample Rate Offset", 0)
3167 };
3168 
3169 static struct snd_kcontrol_new snd_hdsp_controls[] = {
3170 {
3171         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3172         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,DEFAULT),
3173         .info =         snd_hdsp_control_spdif_info,
3174         .get =          snd_hdsp_control_spdif_get,
3175         .put =          snd_hdsp_control_spdif_put,
3176 },
3177 {
3178         .access =       SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_INACTIVE,
3179         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3180         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PCM_STREAM),
3181         .info =         snd_hdsp_control_spdif_stream_info,
3182         .get =          snd_hdsp_control_spdif_stream_get,
3183         .put =          snd_hdsp_control_spdif_stream_put,
3184 },
3185 {
3186         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3187         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3188         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,CON_MASK),
3189         .info =         snd_hdsp_control_spdif_mask_info,
3190         .get =          snd_hdsp_control_spdif_mask_get,
3191         .private_value = IEC958_AES0_NONAUDIO |
3192                          IEC958_AES0_PROFESSIONAL |
3193                          IEC958_AES0_CON_EMPHASIS,
3194 },
3195 {
3196         .access =       SNDRV_CTL_ELEM_ACCESS_READ,
3197         .iface =        SNDRV_CTL_ELEM_IFACE_PCM,
3198         .name =         SNDRV_CTL_NAME_IEC958("",PLAYBACK,PRO_MASK),
3199         .info =         snd_hdsp_control_spdif_mask_info,
3200         .get =          snd_hdsp_control_spdif_mask_get,
3201         .private_value = IEC958_AES0_NONAUDIO |
3202                          IEC958_AES0_PROFESSIONAL |
3203                          IEC958_AES0_PRO_EMPHASIS,
3204 },
3205 HDSP_MIXER("Mixer", 0),
3206 HDSP_SPDIF_IN("IEC958 Input Connector", 0),
3207 HDSP_SPDIF_OUT("IEC958 Output also on ADAT1", 0),
3208 HDSP_SPDIF_PROFESSIONAL("IEC958 Professional Bit", 0),
3209 HDSP_SPDIF_EMPHASIS("IEC958 Emphasis Bit", 0),
3210 HDSP_SPDIF_NON_AUDIO("IEC958 Non-audio Bit", 0),
3211 /* 'Sample Clock Source' complies with the alsa control naming scheme */
3212 HDSP_CLOCK_SOURCE("Sample Clock Source", 0),
3213 {
3214         .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
3215         .name = "Sample Clock Source Locking",
3216         .info = snd_hdsp_info_clock_source_lock,
3217         .get = snd_hdsp_get_clock_source_lock,
3218         .put = snd_hdsp_put_clock_source_lock,
3219 },
3220 HDSP_SYSTEM_CLOCK_MODE("System Clock Mode", 0),
3221 HDSP_PREF_SYNC_REF("Preferred Sync Reference", 0),
3222 HDSP_AUTOSYNC_REF("AutoSync Reference", 0),
3223 HDSP_SPDIF_SAMPLE_RATE("SPDIF Sample Rate", 0),
3224 HDSP_SYSTEM_SAMPLE_RATE("System Sample Rate", 0),
3225 /* 'External Rate' complies with the alsa control naming scheme */
3226 HDSP_AUTOSYNC_SAMPLE_RATE("External Rate", 0),
3227 HDSP_WC_SYNC_CHECK("Word Clock Lock Status", 0),
3228 HDSP_SPDIF_SYNC_CHECK("SPDIF Lock Status", 0),
3229 HDSP_ADATSYNC_SYNC_CHECK("ADAT Sync Lock Status", 0),
3230 HDSP_LINE_OUT("Line Out", 0),
3231 HDSP_PRECISE_POINTER("Precise Pointer", 0),
3232 HDSP_USE_MIDI_TASKLET("Use Midi Tasklet", 0),
3233 };
3234 
3235 static struct snd_kcontrol_new snd_hdsp_96xx_aeb = HDSP_AEB("Analog Extension Board", 0);
3236 static struct snd_kcontrol_new snd_hdsp_adat_sync_check = HDSP_ADAT_SYNC_CHECK;
3237 
3238 static int snd_hdsp_create_controls(struct snd_card *card, struct hdsp *hdsp)
3239 {
3240         unsigned int idx;
3241         int err;
3242         struct snd_kcontrol *kctl;
3243 
3244         for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_controls); idx++) {
3245                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_controls[idx], hdsp))) < 0)
3246                         return err;
3247                 if (idx == 1)   /* IEC958 (S/PDIF) Stream */
3248                         hdsp->spdif_ctl = kctl;
3249         }
3250 
3251         /* ADAT SyncCheck status */
3252         snd_hdsp_adat_sync_check.name = "ADAT Lock Status";
3253         snd_hdsp_adat_sync_check.index = 1;
3254         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3255                 return err;
3256         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
3257                 for (idx = 1; idx < 3; ++idx) {
3258                         snd_hdsp_adat_sync_check.index = idx+1;
3259                         if ((err = snd_ctl_add (card, kctl = snd_ctl_new1(&snd_hdsp_adat_sync_check, hdsp))))
3260                                 return err;
3261                 }
3262         }
3263 
3264         /* DA, AD and Phone gain and XLR breakout cable controls for H9632 cards */
3265         if (hdsp->io_type == H9632) {
3266                 for (idx = 0; idx < ARRAY_SIZE(snd_hdsp_9632_controls); idx++) {
3267                         if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_9632_controls[idx], hdsp))) < 0)
3268                                 return err;
3269                 }
3270         }
3271 
3272         /* AEB control for H96xx card */
3273         if (hdsp->io_type == H9632 || hdsp->io_type == H9652) {
3274                 if ((err = snd_ctl_add(card, kctl = snd_ctl_new1(&snd_hdsp_96xx_aeb, hdsp))) < 0)
3275                                 return err;
3276         }
3277 
3278         return 0;
3279 }
3280 
3281 /*------------------------------------------------------------
3282    /proc interface
3283  ------------------------------------------------------------*/
3284 
3285 static void
3286 snd_hdsp_proc_read(struct snd_info_entry *entry, struct snd_info_buffer *buffer)
3287 {
3288         struct hdsp *hdsp = (struct hdsp *) entry->private_data;
3289         unsigned int status;
3290         unsigned int status2;
3291         char *pref_sync_ref;
3292         char *autosync_ref;
3293         char *system_clock_mode;
3294         char *clock_source;
3295         int x;
3296 
3297         status = hdsp_read(hdsp, HDSP_statusRegister);
3298         status2 = hdsp_read(hdsp, HDSP_status2Register);
3299 
3300         snd_iprintf(buffer, "%s (Card #%d)\n", hdsp->card_name,
3301                     hdsp->card->number + 1);
3302         snd_iprintf(buffer, "Buffers: capture %p playback %p\n",
3303                     hdsp->capture_buffer, hdsp->playback_buffer);
3304         snd_iprintf(buffer, "IRQ: %d Registers bus: 0x%lx VM: 0x%lx\n",
3305                     hdsp->irq, hdsp->port, (unsigned long)hdsp->iobase);
3306         snd_iprintf(buffer, "Control register: 0x%x\n", hdsp->control_register);
3307         snd_iprintf(buffer, "Control2 register: 0x%x\n",
3308                     hdsp->control2_register);
3309         snd_iprintf(buffer, "Status register: 0x%x\n", status);
3310         snd_iprintf(buffer, "Status2 register: 0x%x\n", status2);
3311 
3312         if (hdsp_check_for_iobox(hdsp)) {
3313                 snd_iprintf(buffer, "No I/O box connected.\n"
3314                             "Please connect one and upload firmware.\n");
3315                 return;
3316         }
3317 
3318         if (hdsp_check_for_firmware(hdsp, 0)) {
3319                 if (hdsp->state & HDSP_FirmwareCached) {
3320                         if (snd_hdsp_load_firmware_from_cache(hdsp) != 0) {
3321                                 snd_iprintf(buffer, "Firmware loading from "
3322                                             "cache failed, "
3323                                             "please upload manually.\n");
3324                                 return;
3325                         }
3326                 } else {
3327                         int err = -EINVAL;
3328 #ifdef HDSP_FW_LOADER
3329                         err = hdsp_request_fw_loader(hdsp);
3330 #endif
3331                         if (err < 0) {
3332                                 snd_iprintf(buffer,
3333                                             "No firmware loaded nor cached, "
3334                                             "please upload firmware.\n");
3335                                 return;
3336                         }
3337                 }
3338         }
3339 
3340         snd_iprintf(buffer, "FIFO status: %d\n", hdsp_read(hdsp, HDSP_fifoStatus) & 0xff);
3341         snd_iprintf(buffer, "MIDI1 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut0));
3342         snd_iprintf(buffer, "MIDI1 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn0));
3343         snd_iprintf(buffer, "MIDI2 Output status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusOut1));
3344         snd_iprintf(buffer, "MIDI2 Input status: 0x%x\n", hdsp_read(hdsp, HDSP_midiStatusIn1));
3345         snd_iprintf(buffer, "Use Midi Tasklet: %s\n", hdsp->use_midi_tasklet ? "on" : "off");
3346 
3347         snd_iprintf(buffer, "\n");
3348 
3349         x = 1 << (6 + hdsp_decode_latency(hdsp->control_register & HDSP_LatencyMask));
3350 
3351         snd_iprintf(buffer, "Buffer Size (Latency): %d samples (2 periods of %lu bytes)\n", x, (unsigned long) hdsp->period_bytes);
3352         snd_iprintf(buffer, "Hardware pointer (frames): %ld\n", hdsp_hw_pointer(hdsp));
3353         snd_iprintf(buffer, "Precise pointer: %s\n", hdsp->precise_ptr ? "on" : "off");
3354         snd_iprintf(buffer, "Line out: %s\n", (hdsp->control_register & HDSP_LineOut) ? "on" : "off");
3355 
3356         snd_iprintf(buffer, "Firmware version: %d\n", (status2&HDSP_version0)|(status2&HDSP_version1)<<1|(status2&HDSP_version2)<<2);
3357 
3358         snd_iprintf(buffer, "\n");
3359 
3360         switch (hdsp_clock_source(hdsp)) {
3361         case HDSP_CLOCK_SOURCE_AUTOSYNC:
3362                 clock_source = "AutoSync";
3363                 break;
3364         case HDSP_CLOCK_SOURCE_INTERNAL_32KHZ:
3365                 clock_source = "Internal 32 kHz";
3366                 break;
3367         case HDSP_CLOCK_SOURCE_INTERNAL_44_1KHZ:
3368                 clock_source = "Internal 44.1 kHz";
3369                 break;
3370         case HDSP_CLOCK_SOURCE_INTERNAL_48KHZ:
3371                 clock_source = "Internal 48 kHz";
3372                 break;
3373         case HDSP_CLOCK_SOURCE_INTERNAL_64KHZ:
3374                 clock_source = "Internal 64 kHz";
3375                 break;
3376         case HDSP_CLOCK_SOURCE_INTERNAL_88_2KHZ:
3377                 clock_source = "Internal 88.2 kHz";
3378                 break;
3379         case HDSP_CLOCK_SOURCE_INTERNAL_96KHZ:
3380                 clock_source = "Internal 96 kHz";
3381                 break;
3382         case HDSP_CLOCK_SOURCE_INTERNAL_128KHZ:
3383                 clock_source = "Internal 128 kHz";
3384                 break;
3385         case HDSP_CLOCK_SOURCE_INTERNAL_176_4KHZ:
3386                 clock_source = "Internal 176.4 kHz";
3387                 break;
3388                 case HDSP_CLOCK_SOURCE_INTERNAL_192KHZ:
3389                 clock_source = "Internal 192 kHz";
3390                 break;
3391         default:
3392                 clock_source = "Error";
3393         }
3394         snd_iprintf (buffer, "Sample Clock Source: %s\n", clock_source);
3395 
3396         if (hdsp_system_clock_mode(hdsp))
3397                 system_clock_mode = "Slave";
3398         else
3399                 system_clock_mode = "Master";
3400 
3401         switch (hdsp_pref_sync_ref (hdsp)) {
3402         case HDSP_SYNC_FROM_WORD:
3403                 pref_sync_ref = "Word Clock";
3404                 break;
3405         case HDSP_SYNC_FROM_ADAT_SYNC:
3406                 pref_sync_ref = "ADAT Sync";
3407                 break;
3408         case HDSP_SYNC_FROM_SPDIF:
3409                 pref_sync_ref = "SPDIF";
3410                 break;
3411         case HDSP_SYNC_FROM_ADAT1:
3412                 pref_sync_ref = "ADAT1";
3413                 break;
3414         case HDSP_SYNC_FROM_ADAT2:
3415                 pref_sync_ref = "ADAT2";
3416                 break;
3417         case HDSP_SYNC_FROM_ADAT3:
3418                 pref_sync_ref = "ADAT3";
3419                 break;
3420         default:
3421                 pref_sync_ref = "Word Clock";
3422                 break;
3423         }
3424         snd_iprintf (buffer, "Preferred Sync Reference: %s\n", pref_sync_ref);
3425 
3426         switch (hdsp_autosync_ref (hdsp)) {
3427         case HDSP_AUTOSYNC_FROM_WORD:
3428                 autosync_ref = "Word Clock";
3429                 break;
3430         case HDSP_AUTOSYNC_FROM_ADAT_SYNC:
3431                 autosync_ref = "ADAT Sync";
3432                 break;
3433         case HDSP_AUTOSYNC_FROM_SPDIF:
3434                 autosync_ref = "SPDIF";
3435                 break;
3436         case HDSP_AUTOSYNC_FROM_NONE:
3437                 autosync_ref = "None";
3438                 break;
3439         case HDSP_AUTOSYNC_FROM_ADAT1:
3440                 autosync_ref = "ADAT1";
3441                 break;
3442         case HDSP_AUTOSYNC_FROM_ADAT2:
3443                 autosync_ref = "ADAT2";
3444                 break;
3445         case HDSP_AUTOSYNC_FROM_ADAT3:
3446                 autosync_ref = "ADAT3";
3447                 break;
3448         default:
3449                 autosync_ref = "---";
3450                 break;
3451         }
3452         snd_iprintf (buffer, "AutoSync Reference: %s\n", autosync_ref);
3453 
3454         snd_iprintf (buffer, "AutoSync Frequency: %d\n", hdsp_external_sample_rate(hdsp));
3455 
3456         snd_iprintf (buffer, "System Clock Mode: %s\n", system_clock_mode);
3457 
3458         snd_iprintf (buffer, "System Clock Frequency: %d\n", hdsp->system_sample_rate);
3459         snd_iprintf (buffer, "System Clock Locked: %s\n", hdsp->clock_source_locked ? "Yes" : "No");
3460 
3461         snd_iprintf(buffer, "\n");
3462 
3463         switch (hdsp_spdif_in(hdsp)) {
3464         case HDSP_SPDIFIN_OPTICAL:
3465                 snd_iprintf(buffer, "IEC958 input: Optical\n");
3466                 break;
3467         case HDSP_SPDIFIN_COAXIAL:
3468                 snd_iprintf(buffer, "IEC958 input: Coaxial\n");
3469                 break;
3470         case HDSP_SPDIFIN_INTERNAL:
3471                 snd_iprintf(buffer, "IEC958 input: Internal\n");
3472                 break;
3473         case HDSP_SPDIFIN_AES:
3474                 snd_iprintf(buffer, "IEC958 input: AES\n");
3475                 break;
3476         default:
3477                 snd_iprintf(buffer, "IEC958 input: ???\n");
3478                 break;
3479         }
3480 
3481         if (hdsp->control_register & HDSP_SPDIFOpticalOut)
3482                 snd_iprintf(buffer, "IEC958 output: Coaxial & ADAT1\n");
3483         else
3484                 snd_iprintf(buffer, "IEC958 output: Coaxial only\n");
3485 
3486         if (hdsp->control_register & HDSP_SPDIFProfessional)
3487                 snd_iprintf(buffer, "IEC958 quality: Professional\n");
3488         else
3489                 snd_iprintf(buffer, "IEC958 quality: Consumer\n");
3490 
3491         if (hdsp->control_register & HDSP_SPDIFEmphasis)
3492                 snd_iprintf(buffer, "IEC958 emphasis: on\n");
3493         else
3494                 snd_iprintf(buffer, "IEC958 emphasis: off\n");
3495 
3496         if (hdsp->control_register & HDSP_SPDIFNonAudio)
3497                 snd_iprintf(buffer, "IEC958 NonAudio: on\n");
3498         else
3499                 snd_iprintf(buffer, "IEC958 NonAudio: off\n");
3500         if ((x = hdsp_spdif_sample_rate (hdsp)) != 0)
3501                 snd_iprintf (buffer, "IEC958 sample rate: %d\n", x);
3502         else
3503                 snd_iprintf (buffer, "IEC958 sample rate: Error flag set\n");
3504 
3505         snd_iprintf(buffer, "\n");
3506 
3507         /* Sync Check */
3508         x = status & HDSP_Sync0;
3509         if (status & HDSP_Lock0)
3510                 snd_iprintf(buffer, "ADAT1: %s\n", x ? "Sync" : "Lock");
3511         else
3512                 snd_iprintf(buffer, "ADAT1: No Lock\n");
3513 
3514         switch (hdsp->io_type) {
3515         case Digiface:
3516         case H9652:
3517                 x = status & HDSP_Sync1;
3518                 if (status & HDSP_Lock1)
3519                         snd_iprintf(buffer, "ADAT2: %s\n", x ? "Sync" : "Lock");
3520                 else
3521                         snd_iprintf(buffer, "ADAT2: No Lock\n");
3522                 x = status & HDSP_Sync2;
3523                 if (status & HDSP_Lock2)
3524                         snd_iprintf(buffer, "ADAT3: %s\n", x ? "Sync" : "Lock");
3525                 else
3526                         snd_iprintf(buffer, "ADAT3: No Lock\n");
3527                 break;
3528         default:
3529                 /* relax */
3530                 break;
3531         }
3532 
3533         x = status & HDSP_SPDIFSync;
3534         if (status & HDSP_SPDIFErrorFlag)
3535                 snd_iprintf (buffer, "SPDIF: No Lock\n");
3536         else
3537                 snd_iprintf (buffer, "SPDIF: %s\n", x ? "Sync" : "Lock");
3538 
3539         x = status2 & HDSP_wc_sync;
3540         if (status2 & HDSP_wc_lock)
3541                 snd_iprintf (buffer, "Word Clock: %s\n", x ? "Sync" : "Lock");
3542         else
3543                 snd_iprintf (buffer, "Word Clock: No Lock\n");
3544 
3545         x = status & HDSP_TimecodeSync;
3546         if (status & HDSP_TimecodeLock)
3547                 snd_iprintf(buffer, "ADAT Sync: %s\n", x ? "Sync" : "Lock");
3548         else
3549                 snd_iprintf(buffer, "ADAT Sync: No Lock\n");
3550 
3551         snd_iprintf(buffer, "\n");
3552 
3553         /* Informations about H9632 specific controls */
3554         if (hdsp->io_type == H9632) {
3555                 char *tmp;
3556 
3557                 switch (hdsp_ad_gain(hdsp)) {
3558                 case 0:
3559                         tmp = "-10 dBV";
3560                         break;
3561                 case 1:
3562                         tmp = "+4 dBu";
3563                         break;
3564                 default:
3565                         tmp = "Lo Gain";
3566                         break;
3567                 }
3568                 snd_iprintf(buffer, "AD Gain : %s\n", tmp);
3569 
3570                 switch (hdsp_da_gain(hdsp)) {
3571                 case 0:
3572                         tmp = "Hi Gain";
3573                         break;
3574                 case 1:
3575                         tmp = "+4 dBu";
3576                         break;
3577                 default:
3578                         tmp = "-10 dBV";
3579                         break;
3580                 }
3581                 snd_iprintf(buffer, "DA Gain : %s\n", tmp);
3582 
3583                 switch (hdsp_phone_gain(hdsp)) {
3584                 case 0:
3585                         tmp = "0 dB";
3586                         break;
3587                 case 1:
3588                         tmp = "-6 dB";
3589                         break;
3590                 default:
3591                         tmp = "-12 dB";
3592                         break;
3593                 }
3594                 snd_iprintf(buffer, "Phones Gain : %s\n", tmp);
3595 
3596                 snd_iprintf(buffer, "XLR Breakout Cable : %s\n", hdsp_xlr_breakout_cable(hdsp) ? "yes" : "no");
3597 
3598                 if (hdsp->control_register & HDSP_AnalogExtensionBoard)
3599                         snd_iprintf(buffer, "AEB : on (ADAT1 internal)\n");
3600                 else
3601                         snd_iprintf(buffer, "AEB : off (ADAT1 external)\n");
3602                 snd_iprintf(buffer, "\n");
3603         }
3604 
3605 }
3606 
3607 static void snd_hdsp_proc_init(struct hdsp *hdsp)
3608 {
3609         struct snd_info_entry *entry;
3610 
3611         if (! snd_card_proc_new(hdsp->card, "hdsp", &entry))
3612                 snd_info_set_text_ops(entry, hdsp, snd_hdsp_proc_read);
3613 }
3614 
3615 static void snd_hdsp_free_buffers(struct hdsp *hdsp)
3616 {
3617         snd_hammerfall_free_buffer(&hdsp->capture_dma_buf, hdsp->pci);
3618         snd_hammerfall_free_buffer(&hdsp->playback_dma_buf, hdsp->pci);
3619 }
3620 
3621 static int __devinit snd_hdsp_initialize_memory(struct hdsp *hdsp)
3622 {
3623         unsigned long pb_bus, cb_bus;
3624 
3625         if (snd_hammerfall_get_buffer(hdsp->pci, &hdsp->capture_dma_buf, HDSP_DMA_AREA_BYTES) < 0 ||
3626             snd_hammerfall_get_buffer(hdsp->pci, &hdsp->playback_dma_buf, HDSP_DMA_AREA_BYTES) < 0) {
3627                 if (hdsp->capture_dma_buf.area)
3628                         snd_dma_free_pages(&hdsp->capture_dma_buf);
3629                 printk(KERN_ERR "%s: no buffers available\n", hdsp->card_name);
3630                 return -ENOMEM;
3631         }
3632 
3633         /* Align to bus-space 64K boundary */
3634 
3635         cb_bus = ALIGN(hdsp->capture_dma_buf.addr, 0x10000ul);
3636         pb_bus = ALIGN(hdsp->playback_dma_buf.addr, 0x10000ul);
3637 
3638         /* Tell the card where it is */
3639 
3640         hdsp_write(hdsp, HDSP_inputBufferAddress, cb_bus);
3641         hdsp_write(hdsp, HDSP_outputBufferAddress, pb_bus);
3642 
3643         hdsp->capture_buffer = hdsp->capture_dma_buf.area + (cb_bus - hdsp->capture_dma_buf.addr);
3644         hdsp->playback_buffer = hdsp->playback_dma_buf.area + (pb_bus - hdsp->playback_dma_buf.addr);
3645 
3646         return 0;
3647 }
3648 
3649 static int snd_hdsp_set_defaults(struct hdsp *hdsp)
3650 {
3651         unsigned int i;
3652 
3653         /* ASSUMPTION: hdsp->lock is either held, or
3654            there is no need to hold it (e.g. during module
3655            initialization).
3656          */
3657 
3658         /* set defaults:
3659 
3660            SPDIF Input via Coax
3661            Master clock mode
3662            maximum latency (7 => 2^7 = 8192 samples, 64Kbyte buffer,
3663                             which implies 2 4096 sample, 32Kbyte periods).
3664            Enable line out.
3665          */
3666 
3667         hdsp->control_register = HDSP_ClockModeMaster |
3668                                  HDSP_SPDIFInputCoaxial |
3669                                  hdsp_encode_latency(7) |
3670                                  HDSP_LineOut;
3671 
3672 
3673         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3674 
3675 #ifdef SNDRV_BIG_ENDIAN
3676         hdsp->control2_register = HDSP_BIGENDIAN_MODE;
3677 #else
3678         hdsp->control2_register = 0;
3679 #endif
3680         if (hdsp->io_type == H9652)
3681                 snd_hdsp_9652_enable_mixer (hdsp);
3682         else
3683                 hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
3684 
3685         hdsp_reset_hw_pointer(hdsp);
3686         hdsp_compute_period_size(hdsp);
3687 
3688         /* silence everything */
3689 
3690         for (i = 0; i < HDSP_MATRIX_MIXER_SIZE; ++i)
3691                 hdsp->mixer_matrix[i] = MINUS_INFINITY_GAIN;
3692 
3693         for (i = 0; i < ((hdsp->io_type == H9652 || hdsp->io_type == H9632) ? 1352 : HDSP_MATRIX_MIXER_SIZE); ++i) {
3694                 if (hdsp_write_gain (hdsp, i, MINUS_INFINITY_GAIN))
3695                         return -EIO;
3696         }
3697 
3698         /* H9632 specific defaults */
3699         if (hdsp->io_type == H9632) {
3700                 hdsp->control_register |= (HDSP_DAGainPlus4dBu | HDSP_ADGainPlus4dBu | HDSP_PhoneGain0dB);
3701                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3702         }
3703 
3704         /* set a default rate so that the channel map is set up.
3705          */
3706 
3707         hdsp_set_rate(hdsp, 48000, 1);
3708 
3709         return 0;
3710 }
3711 
3712 static void hdsp_midi_tasklet(unsigned long arg)
3713 {
3714         struct hdsp *hdsp = (struct hdsp *)arg;
3715 
3716         if (hdsp->midi[0].pending)
3717                 snd_hdsp_midi_input_read (&hdsp->midi[0]);
3718         if (hdsp->midi[1].pending)
3719                 snd_hdsp_midi_input_read (&hdsp->midi[1]);
3720 }
3721 
3722 static irqreturn_t snd_hdsp_interrupt(int irq, void *dev_id)
3723 {
3724         struct hdsp *hdsp = (struct hdsp *) dev_id;
3725         unsigned int status;
3726         int audio;
3727         int midi0;
3728         int midi1;
3729         unsigned int midi0status;
3730         unsigned int midi1status;
3731         int schedule = 0;
3732 
3733         status = hdsp_read(hdsp, HDSP_statusRegister);
3734 
3735         audio = status & HDSP_audioIRQPending;
3736         midi0 = status & HDSP_midi0IRQPending;
3737         midi1 = status & HDSP_midi1IRQPending;
3738 
3739         if (!audio && !midi0 && !midi1)
3740                 return IRQ_NONE;
3741 
3742         hdsp_write(hdsp, HDSP_interruptConfirmation, 0);
3743 
3744         midi0status = hdsp_read (hdsp, HDSP_midiStatusIn0) & 0xff;
3745         midi1status = hdsp_read (hdsp, HDSP_midiStatusIn1) & 0xff;
3746 
3747         if (!(hdsp->state & HDSP_InitializationComplete))
3748                 return IRQ_HANDLED;
3749 
3750         if (audio) {
3751                 if (hdsp->capture_substream)
3752                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream);
3753 
3754                 if (hdsp->playback_substream)
3755                         snd_pcm_period_elapsed(hdsp->pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream);
3756         }
3757 
3758         if (midi0 && midi0status) {
3759                 if (hdsp->use_midi_tasklet) {
3760                         /* we disable interrupts for this input until processing is done */
3761                         hdsp->control_register &= ~HDSP_Midi0InterruptEnable;
3762                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3763                         hdsp->midi[0].pending = 1;
3764                         schedule = 1;
3765                 } else {
3766                         snd_hdsp_midi_input_read (&hdsp->midi[0]);
3767                 }
3768         }
3769         if (hdsp->io_type != Multiface && hdsp->io_type != H9632 && midi1 && midi1status) {
3770                 if (hdsp->use_midi_tasklet) {
3771                         /* we disable interrupts for this input until processing is done */
3772                         hdsp->control_register &= ~HDSP_Midi1InterruptEnable;
3773                         hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register);
3774                         hdsp->midi[1].pending = 1;
3775                         schedule = 1;
3776                 } else {
3777                         snd_hdsp_midi_input_read (&hdsp->midi[1]);
3778                 }
3779         }
3780         if (hdsp->use_midi_tasklet && schedule)
3781                 tasklet_schedule(&hdsp->midi_tasklet);
3782         return IRQ_HANDLED;
3783 }
3784 
3785 static snd_pcm_uframes_t snd_hdsp_hw_pointer(struct snd_pcm_substream *substream)
3786 {
3787         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3788         return hdsp_hw_pointer(hdsp);
3789 }
3790 
3791 static char *hdsp_channel_buffer_location(struct hdsp *hdsp,
3792                                              int stream,
3793                                              int channel)
3794 
3795 {
3796         int mapped_channel;
3797 
3798         if (snd_BUG_ON(channel < 0 || channel >= hdsp->max_channels))
3799                 return NULL;
3800 
3801         if ((mapped_channel = hdsp->channel_map[channel]) < 0)
3802                 return NULL;
3803 
3804         if (stream == SNDRV_PCM_STREAM_CAPTURE)
3805                 return hdsp->capture_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3806         else
3807                 return hdsp->playback_buffer + (mapped_channel * HDSP_CHANNEL_BUFFER_BYTES);
3808 }
3809 
3810 static int snd_hdsp_playback_copy(struct snd_pcm_substream *substream, int channel,
3811                                   snd_pcm_uframes_t pos, void __user *src, snd_pcm_uframes_t count)
3812 {
3813         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3814         char *channel_buf;
3815 
3816         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
3817                 return -EINVAL;
3818 
3819         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3820         if (snd_BUG_ON(!channel_buf))
3821                 return -EIO;
3822         if (copy_from_user(channel_buf + pos * 4, src, count * 4))
3823                 return -EFAULT;
3824         return count;
3825 }
3826 
3827 static int snd_hdsp_capture_copy(struct snd_pcm_substream *substream, int channel,
3828                                  snd_pcm_uframes_t pos, void __user *dst, snd_pcm_uframes_t count)
3829 {
3830         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3831         char *channel_buf;
3832 
3833         if (snd_BUG_ON(pos + count > HDSP_CHANNEL_BUFFER_BYTES / 4))
3834                 return -EINVAL;
3835 
3836         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3837         if (snd_BUG_ON(!channel_buf))
3838                 return -EIO;
3839         if (copy_to_user(dst, channel_buf + pos * 4, count * 4))
3840                 return -EFAULT;
3841         return count;
3842 }
3843 
3844 static int snd_hdsp_hw_silence(struct snd_pcm_substream *substream, int channel,
3845                                   snd_pcm_uframes_t pos, snd_pcm_uframes_t count)
3846 {
3847         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3848         char *channel_buf;
3849 
3850         channel_buf = hdsp_channel_buffer_location (hdsp, substream->pstr->stream, channel);
3851         if (snd_BUG_ON(!channel_buf))
3852                 return -EIO;
3853         memset(channel_buf + pos * 4, 0, count * 4);
3854         return count;
3855 }
3856 
3857 static int snd_hdsp_reset(struct snd_pcm_substream *substream)
3858 {
3859         struct snd_pcm_runtime *runtime = substream->runtime;
3860         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3861         struct snd_pcm_substream *other;
3862         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
3863                 other = hdsp->capture_substream;
3864         else
3865                 other = hdsp->playback_substream;
3866         if (hdsp->running)
3867                 runtime->status->hw_ptr = hdsp_hw_pointer(hdsp);
3868         else
3869                 runtime->status->hw_ptr = 0;
3870         if (other) {
3871                 struct snd_pcm_substream *s;
3872                 struct snd_pcm_runtime *oruntime = other->runtime;
3873                 snd_pcm_group_for_each_entry(s, substream) {
3874                         if (s == other) {
3875                                 oruntime->status->hw_ptr = runtime->status->hw_ptr;
3876                                 break;
3877                         }
3878                 }
3879         }
3880         return 0;
3881 }
3882 
3883 static int snd_hdsp_hw_params(struct snd_pcm_substream *substream,
3884                                  struct snd_pcm_hw_params *params)
3885 {
3886         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3887         int err;
3888         pid_t this_pid;
3889         pid_t other_pid;
3890 
3891         if (hdsp_check_for_iobox (hdsp))
3892                 return -EIO;
3893 
3894         if (hdsp_check_for_firmware(hdsp, 1))
3895                 return -EIO;
3896 
3897         spin_lock_irq(&hdsp->lock);
3898 
3899         if (substream->pstr->stream == SNDRV_PCM_STREAM_PLAYBACK) {
3900                 hdsp->control_register &= ~(HDSP_SPDIFProfessional | HDSP_SPDIFNonAudio | HDSP_SPDIFEmphasis);
3901                 hdsp_write(hdsp, HDSP_controlRegister, hdsp->control_register |= hdsp->creg_spdif_stream);
3902                 this_pid = hdsp->playback_pid;
3903                 other_pid = hdsp->capture_pid;
3904         } else {
3905                 this_pid = hdsp->capture_pid;
3906                 other_pid = hdsp->playback_pid;
3907         }
3908 
3909         if ((other_pid > 0) && (this_pid != other_pid)) {
3910 
3911                 /* The other stream is open, and not by the same
3912                    task as this one. Make sure that the parameters
3913                    that matter are the same.
3914                  */
3915 
3916                 if (params_rate(params) != hdsp->system_sample_rate) {
3917                         spin_unlock_irq(&hdsp->lock);
3918                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3919                         return -EBUSY;
3920                 }
3921 
3922                 if (params_period_size(params) != hdsp->period_bytes / 4) {
3923                         spin_unlock_irq(&hdsp->lock);
3924                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3925                         return -EBUSY;
3926                 }
3927 
3928                 /* We're fine. */
3929 
3930                 spin_unlock_irq(&hdsp->lock);
3931                 return 0;
3932 
3933         } else {
3934                 spin_unlock_irq(&hdsp->lock);
3935         }
3936 
3937         /* how to make sure that the rate matches an externally-set one ?
3938          */
3939 
3940         spin_lock_irq(&hdsp->lock);
3941         if (! hdsp->clock_source_locked) {
3942                 if ((err = hdsp_set_rate(hdsp, params_rate(params), 0)) < 0) {
3943                         spin_unlock_irq(&hdsp->lock);
3944                         _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_RATE);
3945                         return err;
3946                 }
3947         }
3948         spin_unlock_irq(&hdsp->lock);
3949 
3950         if ((err = hdsp_set_interrupt_interval(hdsp, params_period_size(params))) < 0) {
3951                 _snd_pcm_hw_param_setempty(params, SNDRV_PCM_HW_PARAM_PERIOD_SIZE);
3952                 return err;
3953         }
3954 
3955         return 0;
3956 }
3957 
3958 static int snd_hdsp_channel_info(struct snd_pcm_substream *substream,
3959                                     struct snd_pcm_channel_info *info)
3960 {
3961         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3962         int mapped_channel;
3963 
3964         if (snd_BUG_ON(info->channel >= hdsp->max_channels))
3965                 return -EINVAL;
3966 
3967         if ((mapped_channel = hdsp->channel_map[info->channel]) < 0)
3968                 return -EINVAL;
3969 
3970         info->offset = mapped_channel * HDSP_CHANNEL_BUFFER_BYTES;
3971         info->first = 0;
3972         info->step = 32;
3973         return 0;
3974 }
3975 
3976 static int snd_hdsp_ioctl(struct snd_pcm_substream *substream,
3977                              unsigned int cmd, void *arg)
3978 {
3979         switch (cmd) {
3980         case SNDRV_PCM_IOCTL1_RESET:
3981                 return snd_hdsp_reset(substream);
3982         case SNDRV_PCM_IOCTL1_CHANNEL_INFO:
3983                 return snd_hdsp_channel_info(substream, arg);
3984         default:
3985                 break;
3986         }
3987 
3988         return snd_pcm_lib_ioctl(substream, cmd, arg);
3989 }
3990 
3991 static int snd_hdsp_trigger(struct snd_pcm_substream *substream, int cmd)
3992 {
3993         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
3994         struct snd_pcm_substream *other;
3995         int running;
3996 
3997         if (hdsp_check_for_iobox (hdsp))
3998                 return -EIO;
3999 
4000         if (hdsp_check_for_firmware(hdsp, 0)) /* no auto-loading in trigger */
4001                 return -EIO;
4002 
4003         spin_lock(&hdsp->lock);
4004         running = hdsp->running;
4005         switch (cmd) {
4006         case SNDRV_PCM_TRIGGER_START:
4007                 running |= 1 << substream->stream;
4008                 break;
4009         case SNDRV_PCM_TRIGGER_STOP:
4010                 running &= ~(1 << substream->stream);
4011                 break;
4012         default:
4013                 snd_BUG();
4014                 spin_unlock(&hdsp->lock);
4015                 return -EINVAL;
4016         }
4017         if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4018                 other = hdsp->capture_substream;
4019         else
4020                 other = hdsp->playback_substream;
4021 
4022         if (other) {
4023                 struct snd_pcm_substream *s;
4024                 snd_pcm_group_for_each_entry(s, substream) {
4025                         if (s == other) {
4026                                 snd_pcm_trigger_done(s, substream);
4027                                 if (cmd == SNDRV_PCM_TRIGGER_START)
4028                                         running |= 1 << s->stream;
4029                                 else
4030                                         running &= ~(1 << s->stream);
4031                                 goto _ok;
4032                         }
4033                 }
4034                 if (cmd == SNDRV_PCM_TRIGGER_START) {
4035                         if (!(running & (1 << SNDRV_PCM_STREAM_PLAYBACK)) &&
4036                             substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4037                                 hdsp_silence_playback(hdsp);
4038                 } else {
4039                         if (running &&
4040                             substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
4041                                 hdsp_silence_playback(hdsp);
4042                 }
4043         } else {
4044                 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
4045                                 hdsp_silence_playback(hdsp);
4046         }
4047  _ok:
4048         snd_pcm_trigger_done(substream, substream);
4049         if (!hdsp->running && running)
4050                 hdsp_start_audio(hdsp);
4051         else if (hdsp->running && !running)
4052                 hdsp_stop_audio(hdsp);
4053         hdsp->running = running;
4054         spin_unlock(&hdsp->lock);
4055 
4056         return 0;
4057 }
4058 
4059 static int snd_hdsp_prepare(struct snd_pcm_substream *substream)
4060 {
4061         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4062         int result = 0;
4063 
4064         if (hdsp_check_for_iobox (hdsp))
4065                 return -EIO;
4066 
4067         if (hdsp_check_for_firmware(hdsp, 1))
4068                 return -EIO;
4069 
4070         spin_lock_irq(&hdsp->lock);
4071         if (!hdsp->running)
4072                 hdsp_reset_hw_pointer(hdsp);
4073         spin_unlock_irq(&hdsp->lock);
4074         return result;
4075 }
4076 
4077 static struct snd_pcm_hardware snd_hdsp_playback_subinfo =
4078 {
4079         .info =                 (SNDRV_PCM_INFO_MMAP |
4080                                  SNDRV_PCM_INFO_MMAP_VALID |
4081                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4082                                  SNDRV_PCM_INFO_SYNC_START |
4083                                  SNDRV_PCM_INFO_DOUBLE),
4084 #ifdef SNDRV_BIG_ENDIAN
4085         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4086 #else
4087         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4088 #endif
4089         .rates =                (SNDRV_PCM_RATE_32000 |
4090                                  SNDRV_PCM_RATE_44100 |
4091                                  SNDRV_PCM_RATE_48000 |
4092                                  SNDRV_PCM_RATE_64000 |
4093                                  SNDRV_PCM_RATE_88200 |
4094                                  SNDRV_PCM_RATE_96000),
4095         .rate_min =             32000,
4096         .rate_max =             96000,
4097         .channels_min =         14,
4098         .channels_max =         HDSP_MAX_CHANNELS,
4099         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4100         .period_bytes_min =     (64 * 4) * 10,
4101         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4102         .periods_min =          2,
4103         .periods_max =          2,
4104         .fifo_size =            0
4105 };
4106 
4107 static struct snd_pcm_hardware snd_hdsp_capture_subinfo =
4108 {
4109         .info =                 (SNDRV_PCM_INFO_MMAP |
4110                                  SNDRV_PCM_INFO_MMAP_VALID |
4111                                  SNDRV_PCM_INFO_NONINTERLEAVED |
4112                                  SNDRV_PCM_INFO_SYNC_START),
4113 #ifdef SNDRV_BIG_ENDIAN
4114         .formats =              SNDRV_PCM_FMTBIT_S32_BE,
4115 #else
4116         .formats =              SNDRV_PCM_FMTBIT_S32_LE,
4117 #endif
4118         .rates =                (SNDRV_PCM_RATE_32000 |
4119                                  SNDRV_PCM_RATE_44100 |
4120                                  SNDRV_PCM_RATE_48000 |
4121                                  SNDRV_PCM_RATE_64000 |
4122                                  SNDRV_PCM_RATE_88200 |
4123                                  SNDRV_PCM_RATE_96000),
4124         .rate_min =             32000,
4125         .rate_max =             96000,
4126         .channels_min =         14,
4127         .channels_max =         HDSP_MAX_CHANNELS,
4128         .buffer_bytes_max =     HDSP_CHANNEL_BUFFER_BYTES * HDSP_MAX_CHANNELS,
4129         .period_bytes_min =     (64 * 4) * 10,
4130         .period_bytes_max =     (8192 * 4) * HDSP_MAX_CHANNELS,
4131         .periods_min =          2,
4132         .periods_max =          2,
4133         .fifo_size =            0
4134 };
4135 
4136 static unsigned int hdsp_period_sizes[] = { 64, 128, 256, 512, 1024, 2048, 4096, 8192 };
4137 
4138 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_period_sizes = {
4139         .count = ARRAY_SIZE(hdsp_period_sizes),
4140         .list = hdsp_period_sizes,
4141         .mask = 0
4142 };
4143 
4144 static unsigned int hdsp_9632_sample_rates[] = { 32000, 44100, 48000, 64000, 88200, 96000, 128000, 176400, 192000 };
4145 
4146 static struct snd_pcm_hw_constraint_list hdsp_hw_constraints_9632_sample_rates = {
4147         .count = ARRAY_SIZE(hdsp_9632_sample_rates),
4148         .list = hdsp_9632_sample_rates,
4149         .mask = 0
4150 };
4151 
4152 static int snd_hdsp_hw_rule_in_channels(struct snd_pcm_hw_params *params,
4153                                         struct snd_pcm_hw_rule *rule)
4154 {
4155         struct hdsp *hdsp = rule->private;
4156         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4157         if (hdsp->io_type == H9632) {
4158                 unsigned int list[3];
4159                 list[0] = hdsp->qs_in_channels;
4160                 list[1] = hdsp->ds_in_channels;
4161                 list[2] = hdsp->ss_in_channels;
4162                 return snd_interval_list(c, 3, list, 0);
4163         } else {
4164                 unsigned int list[2];
4165                 list[0] = hdsp->ds_in_channels;
4166                 list[1] = hdsp->ss_in_channels;
4167                 return snd_interval_list(c, 2, list, 0);
4168         }
4169 }
4170 
4171 static int snd_hdsp_hw_rule_out_channels(struct snd_pcm_hw_params *params,
4172                                         struct snd_pcm_hw_rule *rule)
4173 {
4174         unsigned int list[3];
4175         struct hdsp *hdsp = rule->private;
4176         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4177         if (hdsp->io_type == H9632) {
4178                 list[0] = hdsp->qs_out_channels;
4179                 list[1] = hdsp->ds_out_channels;
4180                 list[2] = hdsp->ss_out_channels;
4181                 return snd_interval_list(c, 3, list, 0);
4182         } else {
4183                 list[0] = hdsp->ds_out_channels;
4184                 list[1] = hdsp->ss_out_channels;
4185         }
4186         return snd_interval_list(c, 2, list, 0);
4187 }
4188 
4189 static int snd_hdsp_hw_rule_in_channels_rate(struct snd_pcm_hw_params *params,
4190                                              struct snd_pcm_hw_rule *rule)
4191 {
4192         struct hdsp *hdsp = rule->private;
4193         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4194         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4195         if (r->min > 96000 && hdsp->io_type == H9632) {
4196                 struct snd_interval t = {
4197                         .min = hdsp->qs_in_channels,
4198                         .max = hdsp->qs_in_channels,
4199                         .integer = 1,
4200                 };
4201                 return snd_interval_refine(c, &t);
4202         } else if (r->min > 48000 && r->max <= 96000) {
4203                 struct snd_interval t = {
4204                         .min = hdsp->ds_in_channels,
4205                         .max = hdsp->ds_in_channels,
4206                         .integer = 1,
4207                 };
4208                 return snd_interval_refine(c, &t);
4209         } else if (r->max < 64000) {
4210                 struct snd_interval t = {
4211                         .min = hdsp->ss_in_channels,
4212                         .max = hdsp->ss_in_channels,
4213                         .integer = 1,
4214                 };
4215                 return snd_interval_refine(c, &t);
4216         }
4217         return 0;
4218 }
4219 
4220 static int snd_hdsp_hw_rule_out_channels_rate(struct snd_pcm_hw_params *params,
4221                                              struct snd_pcm_hw_rule *rule)
4222 {
4223         struct hdsp *hdsp = rule->private;
4224         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4225         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4226         if (r->min > 96000 && hdsp->io_type == H9632) {
4227                 struct snd_interval t = {
4228                         .min = hdsp->qs_out_channels,
4229                         .max = hdsp->qs_out_channels,
4230                         .integer = 1,
4231                 };
4232                 return snd_interval_refine(c, &t);
4233         } else if (r->min > 48000 && r->max <= 96000) {
4234                 struct snd_interval t = {
4235                         .min = hdsp->ds_out_channels,
4236                         .max = hdsp->ds_out_channels,
4237                         .integer = 1,
4238                 };
4239                 return snd_interval_refine(c, &t);
4240         } else if (r->max < 64000) {
4241                 struct snd_interval t = {
4242                         .min = hdsp->ss_out_channels,
4243                         .max = hdsp->ss_out_channels,
4244                         .integer = 1,
4245                 };
4246                 return snd_interval_refine(c, &t);
4247         }
4248         return 0;
4249 }
4250 
4251 static int snd_hdsp_hw_rule_rate_out_channels(struct snd_pcm_hw_params *params,
4252                                              struct snd_pcm_hw_rule *rule)
4253 {
4254         struct hdsp *hdsp = rule->private;
4255         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4256         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4257         if (c->min >= hdsp->ss_out_channels) {
4258                 struct snd_interval t = {
4259                         .min = 32000,
4260                         .max = 48000,
4261                         .integer = 1,
4262                 };
4263                 return snd_interval_refine(r, &t);
4264         } else if (c->max <= hdsp->qs_out_channels && hdsp->io_type == H9632) {
4265                 struct snd_interval t = {
4266                         .min = 128000,
4267                         .max = 192000,
4268                         .integer = 1,
4269                 };
4270                 return snd_interval_refine(r, &t);
4271         } else if (c->max <= hdsp->ds_out_channels) {
4272                 struct snd_interval t = {
4273                         .min = 64000,
4274                         .max = 96000,
4275                         .integer = 1,
4276                 };
4277                 return snd_interval_refine(r, &t);
4278         }
4279         return 0;
4280 }
4281 
4282 static int snd_hdsp_hw_rule_rate_in_channels(struct snd_pcm_hw_params *params,
4283                                              struct snd_pcm_hw_rule *rule)
4284 {
4285         struct hdsp *hdsp = rule->private;
4286         struct snd_interval *c = hw_param_interval(params, SNDRV_PCM_HW_PARAM_CHANNELS);
4287         struct snd_interval *r = hw_param_interval(params, SNDRV_PCM_HW_PARAM_RATE);
4288         if (c->min >= hdsp->ss_in_channels) {
4289                 struct snd_interval t = {
4290                         .min = 32000,
4291                         .max = 48000,
4292                         .integer = 1,
4293                 };
4294                 return snd_interval_refine(r, &t);
4295         } else if (c->max <= hdsp->qs_in_channels && hdsp->io_type == H9632) {
4296                 struct snd_interval t = {
4297                         .min = 128000,
4298                         .max = 192000,
4299                         .integer = 1,
4300                 };
4301                 return snd_interval_refine(r, &t);
4302         } else if (c->max <= hdsp->ds_in_channels) {
4303                 struct snd_interval t = {
4304                         .min = 64000,
4305                         .max = 96000,
4306                         .integer = 1,
4307                 };
4308                 return snd_interval_refine(r, &t);
4309         }
4310         return 0;
4311 }
4312 
4313 static int snd_hdsp_playback_open(struct snd_pcm_substream *substream)
4314 {
4315         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4316         struct snd_pcm_runtime *runtime = substream->runtime;
4317 
4318         if (hdsp_check_for_iobox (hdsp))
4319                 return -EIO;
4320 
4321         if (hdsp_check_for_firmware(hdsp, 1))
4322                 return -EIO;
4323 
4324         spin_lock_irq(&hdsp->lock);
4325 
4326         snd_pcm_set_sync(substream);
4327 
4328         runtime->hw = snd_hdsp_playback_subinfo;
4329         runtime->dma_area = hdsp->playback_buffer;
4330         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4331 
4332         hdsp->playback_pid = current->pid;
4333         hdsp->playback_substream = substream;
4334 
4335         spin_unlock_irq(&hdsp->lock);
4336 
4337         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4338         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4339         if (hdsp->clock_source_locked) {
4340                 runtime->hw.rate_min = runtime->hw.rate_max = hdsp->system_sample_rate;
4341         } else if (hdsp->io_type == H9632) {
4342                 runtime->hw.rate_max = 192000;
4343                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4344                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4345         }
4346         if (hdsp->io_type == H9632) {
4347                 runtime->hw.channels_min = hdsp->qs_out_channels;
4348                 runtime->hw.channels_max = hdsp->ss_out_channels;
4349         }
4350 
4351         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4352                              snd_hdsp_hw_rule_out_channels, hdsp,
4353                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4354         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4355                              snd_hdsp_hw_rule_out_channels_rate, hdsp,
4356                              SNDRV_PCM_HW_PARAM_RATE, -1);
4357         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4358                              snd_hdsp_hw_rule_rate_out_channels, hdsp,
4359                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4360 
4361         hdsp->creg_spdif_stream = hdsp->creg_spdif;
4362         hdsp->spdif_ctl->vd[0].access &= ~SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4363         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4364                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4365         return 0;
4366 }
4367 
4368 static int snd_hdsp_playback_release(struct snd_pcm_substream *substream)
4369 {
4370         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4371 
4372         spin_lock_irq(&hdsp->lock);
4373 
4374         hdsp->playback_pid = -1;
4375         hdsp->playback_substream = NULL;
4376 
4377         spin_unlock_irq(&hdsp->lock);
4378 
4379         hdsp->spdif_ctl->vd[0].access |= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
4380         snd_ctl_notify(hdsp->card, SNDRV_CTL_EVENT_MASK_VALUE |
4381                        SNDRV_CTL_EVENT_MASK_INFO, &hdsp->spdif_ctl->id);
4382         return 0;
4383 }
4384 
4385 
4386 static int snd_hdsp_capture_open(struct snd_pcm_substream *substream)
4387 {
4388         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4389         struct snd_pcm_runtime *runtime = substream->runtime;
4390 
4391         if (hdsp_check_for_iobox (hdsp))
4392                 return -EIO;
4393 
4394         if (hdsp_check_for_firmware(hdsp, 1))
4395                 return -EIO;
4396 
4397         spin_lock_irq(&hdsp->lock);
4398 
4399         snd_pcm_set_sync(substream);
4400 
4401         runtime->hw = snd_hdsp_capture_subinfo;
4402         runtime->dma_area = hdsp->capture_buffer;
4403         runtime->dma_bytes = HDSP_DMA_AREA_BYTES;
4404 
4405         hdsp->capture_pid = current->pid;
4406         hdsp->capture_substream = substream;
4407 
4408         spin_unlock_irq(&hdsp->lock);
4409 
4410         snd_pcm_hw_constraint_msbits(runtime, 0, 32, 24);
4411         snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_PERIOD_SIZE, &hdsp_hw_constraints_period_sizes);
4412         if (hdsp->io_type == H9632) {
4413                 runtime->hw.channels_min = hdsp->qs_in_channels;
4414                 runtime->hw.channels_max = hdsp->ss_in_channels;
4415                 runtime->hw.rate_max = 192000;
4416                 runtime->hw.rates = SNDRV_PCM_RATE_KNOT;
4417                 snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &hdsp_hw_constraints_9632_sample_rates);
4418         }
4419         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4420                              snd_hdsp_hw_rule_in_channels, hdsp,
4421                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4422         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_CHANNELS,
4423                              snd_hdsp_hw_rule_in_channels_rate, hdsp,
4424                              SNDRV_PCM_HW_PARAM_RATE, -1);
4425         snd_pcm_hw_rule_add(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
4426                              snd_hdsp_hw_rule_rate_in_channels, hdsp,
4427                              SNDRV_PCM_HW_PARAM_CHANNELS, -1);
4428         return 0;
4429 }
4430 
4431 static int snd_hdsp_capture_release(struct snd_pcm_substream *substream)
4432 {
4433         struct hdsp *hdsp = snd_pcm_substream_chip(substream);
4434 
4435         spin_lock_irq(&hdsp->lock);
4436 
4437         hdsp->capture_pid = -1;
4438         hdsp->capture_substream = NULL;
4439 
4440         spin_unlock_irq(&hdsp->lock);
4441         return 0;
4442 }
4443 
4444 /* helper functions for copying meter values */
4445 static inline int copy_u32_le(void __user *dest, void __iomem *src)
4446 {
4447         u32 val = readl(src);
4448         return copy_to_user(dest, &val, 4);
4449 }
4450 
4451 static inline int copy_u64_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4452 {
4453         u32 rms_low, rms_high;
4454         u64 rms;
4455         rms_low = readl(src_low);
4456         rms_high = readl(src_high);
4457         rms = ((u64)rms_high << 32) | rms_low;
4458         return copy_to_user(dest, &rms, 8);
4459 }
4460 
4461 static inline int copy_u48_le(void __user *dest, void __iomem *src_low, void __iomem *src_high)
4462 {
4463         u32 rms_low, rms_high;
4464         u64 rms;
4465         rms_low = readl(src_low) & 0xffffff00;
4466         rms_high = readl(src_high) & 0xffffff00;
4467         rms = ((u64)rms_high << 32) | rms_low;
4468         return copy_to_user(dest, &rms, 8);
4469 }
4470 
4471 static int hdsp_9652_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4472 {
4473         int doublespeed = 0;
4474         int i, j, channels, ofs;
4475 
4476         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4477                 doublespeed = 1;
4478         channels = doublespeed ? 14 : 26;
4479         for (i = 0, j = 0; i < 26; ++i) {
4480                 if (doublespeed && (i & 4))
4481                         continue;
4482                 ofs = HDSP_9652_peakBase - j * 4;
4483                 if (copy_u32_le(&peak_rms->input_peaks[i], hdsp->iobase + ofs))
4484                         return -EFAULT;
4485                 ofs -= channels * 4;
4486                 if (copy_u32_le(&peak_rms->playback_peaks[i], hdsp->iobase + ofs))
4487                         return -EFAULT;
4488                 ofs -= channels * 4;
4489                 if (copy_u32_le(&peak_rms->output_peaks[i], hdsp->iobase + ofs))
4490                         return -EFAULT;
4491                 ofs = HDSP_9652_rmsBase + j * 8;
4492                 if (copy_u48_le(&peak_rms->input_rms[i], hdsp->iobase + ofs,
4493                                 hdsp->iobase + ofs + 4))
4494                         return -EFAULT;
4495                 ofs += channels * 8;
4496                 if (copy_u48_le(&peak_rms->playback_rms[i], hdsp->iobase + ofs,
4497                                 hdsp->iobase + ofs + 4))
4498                         return -EFAULT;
4499                 ofs += channels * 8;
4500                 if (copy_u48_le(&peak_rms->output_rms[i], hdsp->iobase + ofs,
4501                                 hdsp->iobase + ofs + 4))
4502                         return -EFAULT;
4503                 j++;
4504         }
4505         return 0;
4506 }
4507 
4508 static int hdsp_9632_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4509 {
4510         int i, j;
4511         struct hdsp_9632_meters __iomem *m;
4512         int doublespeed = 0;
4513 
4514         if (hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DoubleSpeedStatus)
4515                 doublespeed = 1;
4516         m = (struct hdsp_9632_meters __iomem *)(hdsp->iobase+HDSP_9632_metersBase);
4517         for (i = 0, j = 0; i < 16; ++i, ++j) {
4518                 if (copy_u32_le(&peak_rms->input_peaks[i], &m->input_peak[j]))
4519                         return -EFAULT;
4520                 if (copy_u32_le(&peak_rms->playback_peaks[i], &m->playback_peak[j]))
4521                         return -EFAULT;
4522                 if (copy_u32_le(&peak_rms->output_peaks[i], &m->output_peak[j]))
4523                         return -EFAULT;
4524                 if (copy_u64_le(&peak_rms->input_rms[i], &m->input_rms_low[j],
4525                                 &m->input_rms_high[j]))
4526                         return -EFAULT;
4527                 if (copy_u64_le(&peak_rms->playback_rms[i], &m->playback_rms_low[j],
4528                                 &m->playback_rms_high[j]))
4529                         return -EFAULT;
4530                 if (copy_u64_le(&peak_rms->output_rms[i], &m->output_rms_low[j],
4531                                 &m->output_rms_high[j]))
4532                         return -EFAULT;
4533                 if (doublespeed && i == 3) i += 4;
4534         }
4535         return 0;
4536 }
4537 
4538 static int hdsp_get_peak(struct hdsp *hdsp, struct hdsp_peak_rms __user *peak_rms)
4539 {
4540         int i;
4541 
4542         for (i = 0; i < 26; i++) {
4543                 if (copy_u32_le(&peak_rms->playback_peaks[i],
4544                                 hdsp->iobase + HDSP_playbackPeakLevel + i * 4))
4545                         return -EFAULT;
4546                 if (copy_u32_le(&peak_rms->input_peaks[i],
4547                                 hdsp->iobase + HDSP_inputPeakLevel + i * 4))
4548                         return -EFAULT;
4549         }
4550         for (i = 0; i < 28; i++) {
4551                 if (copy_u32_le(&peak_rms->output_peaks[i],
4552                                 hdsp->iobase + HDSP_outputPeakLevel + i * 4))
4553                         return -EFAULT;
4554         }
4555         for (i = 0; i < 26; ++i) {
4556                 if (copy_u64_le(&peak_rms->playback_rms[i],
4557                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8 + 4,
4558                                 hdsp->iobase + HDSP_playbackRmsLevel + i * 8))
4559                         return -EFAULT;
4560                 if (copy_u64_le(&peak_rms->input_rms[i],
4561                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8 + 4,
4562                                 hdsp->iobase + HDSP_inputRmsLevel + i * 8))
4563                         return -EFAULT;
4564         }
4565         return 0;
4566 }
4567 
4568 static int snd_hdsp_hwdep_ioctl(struct snd_hwdep *hw, struct file *file, unsigned int cmd, unsigned long arg)
4569 {
4570         struct hdsp *hdsp = (struct hdsp *)hw->private_data;
4571         void __user *argp = (void __user *)arg;
4572         int err;
4573 
4574         switch (cmd) {
4575         case SNDRV_HDSP_IOCTL_GET_PEAK_RMS: {
4576                 struct hdsp_peak_rms __user *peak_rms = (struct hdsp_peak_rms __user *)arg;
4577 
4578                 err = hdsp_check_for_iobox(hdsp);
4579                 if (err < 0)
4580                         return err;
4581 
4582                 err = hdsp_check_for_firmware(hdsp, 1);
4583                 if (err < 0)
4584                         return err;
4585 
4586                 if (!(hdsp->state & HDSP_FirmwareLoaded)) {
4587                         snd_printk(KERN_ERR "Hammerfall-DSP: firmware needs to be uploaded to the card.\n");
4588                         return -EINVAL;
4589                 }
4590 
4591                 switch (hdsp->io_type) {
4592                 case H9652:
4593                         return hdsp_9652_get_peak(hdsp, peak_rms);
4594                 case H9632:
4595                         return hdsp_9632_get_peak(hdsp, peak_rms);
4596                 default:
4597                         return hdsp_get_peak(hdsp, peak_rms);
4598                 }
4599         }
4600         case SNDRV_HDSP_IOCTL_GET_CONFIG_INFO: {
4601                 struct hdsp_config_info info;
4602                 unsigned long flags;
4603                 int i;
4604 
4605                 err = hdsp_check_for_iobox(hdsp);
4606                 if (err < 0)
4607                         return err;
4608 
4609                 err = hdsp_check_for_firmware(hdsp, 1);
4610                 if (err < 0)
4611                         return err;
4612 
4613                 spin_lock_irqsave(&hdsp->lock, flags);
4614                 info.pref_sync_ref = (unsigned char)hdsp_pref_sync_ref(hdsp);
4615                 info.wordclock_sync_check = (unsigned char)hdsp_wc_sync_check(hdsp);
4616                 if (hdsp->io_type != H9632)
4617                     info.adatsync_sync_check = (unsigned char)hdsp_adatsync_sync_check(hdsp);
4618                 info.spdif_sync_check = (unsigned char)hdsp_spdif_sync_check(hdsp);
4619                 for (i = 0; i < ((hdsp->io_type != Multiface && hdsp->io_type != H9632) ? 3 : 1); ++i)
4620                         info.adat_sync_check[i] = (unsigned char)hdsp_adat_sync_check(hdsp, i);
4621                 info.spdif_in = (unsigned char)hdsp_spdif_in(hdsp);
4622                 info.spdif_out = (unsigned char)hdsp_spdif_out(hdsp);
4623                 info.spdif_professional = (unsigned char)hdsp_spdif_professional(hdsp);
4624                 info.spdif_emphasis = (unsigned char)hdsp_spdif_emphasis(hdsp);
4625                 info.spdif_nonaudio = (unsigned char)hdsp_spdif_nonaudio(hdsp);
4626                 info.spdif_sample_rate = hdsp_spdif_sample_rate(hdsp);
4627                 info.system_sample_rate = hdsp->system_sample_rate;
4628                 info.autosync_sample_rate = hdsp_external_sample_rate(hdsp);
4629                 info.system_clock_mode = (unsigned char)hdsp_system_clock_mode(hdsp);
4630                 info.clock_source = (unsigned char)hdsp_clock_source(hdsp);
4631                 info.autosync_ref = (unsigned char)hdsp_autosync_ref(hdsp);
4632                 info.line_out = (unsigned char)hdsp_line_out(hdsp);
4633                 if (hdsp->io_type == H9632) {
4634                         info.da_gain = (unsigned char)hdsp_da_gain(hdsp);
4635                         info.ad_gain = (unsigned char)hdsp_ad_gain(hdsp);
4636                         info.phone_gain = (unsigned char)hdsp_phone_gain(hdsp);
4637                         info.xlr_breakout_cable = (unsigned char)hdsp_xlr_breakout_cable(hdsp);
4638 
4639                 }
4640                 if (hdsp->io_type == H9632 || hdsp->io_type == H9652)
4641                         info.analog_extension_board = (unsigned char)hdsp_aeb(hdsp);
4642                 spin_unlock_irqrestore(&hdsp->lock, flags);
4643                 if (copy_to_user(argp, &info, sizeof(info)))
4644                         return -EFAULT;
4645                 break;
4646         }
4647         case SNDRV_HDSP_IOCTL_GET_9632_AEB: {
4648                 struct hdsp_9632_aeb h9632_aeb;
4649 
4650                 if (hdsp->io_type != H9632) return -EINVAL;
4651                 h9632_aeb.aebi = hdsp->ss_in_channels - H9632_SS_CHANNELS;
4652                 h9632_aeb.aebo = hdsp->ss_out_channels - H9632_SS_CHANNELS;
4653                 if (copy_to_user(argp, &h9632_aeb, sizeof(h9632_aeb)))
4654                         return -EFAULT;
4655                 break;
4656         }
4657         case SNDRV_HDSP_IOCTL_GET_VERSION: {
4658                 struct hdsp_version hdsp_version;
4659                 int err;
4660 
4661                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4662                 if (hdsp->io_type == Undefined) {
4663                         if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4664                                 return err;
4665                 }
4666                 hdsp_version.io_type = hdsp->io_type;
4667                 hdsp_version.firmware_rev = hdsp->firmware_rev;
4668                 if ((err = copy_to_user(argp, &hdsp_version, sizeof(hdsp_version))))
4669                         return -EFAULT;
4670                 break;
4671         }
4672         case SNDRV_HDSP_IOCTL_UPLOAD_FIRMWARE: {
4673                 struct hdsp_firmware __user *firmware;
4674                 u32 __user *firmware_data;
4675                 int err;
4676 
4677                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632) return -EINVAL;
4678                 /* SNDRV_HDSP_IOCTL_GET_VERSION must have been called */
4679                 if (hdsp->io_type == Undefined) return -EINVAL;
4680 
4681                 if (hdsp->state & (HDSP_FirmwareCached | HDSP_FirmwareLoaded))
4682                         return -EBUSY;
4683 
4684                 snd_printk(KERN_INFO "Hammerfall-DSP: initializing firmware upload\n");
4685                 firmware = (struct hdsp_firmware __user *)argp;
4686 
4687                 if (get_user(firmware_data, &firmware->firmware_data))
4688                         return -EFAULT;
4689 
4690                 if (hdsp_check_for_iobox (hdsp))
4691                         return -EIO;
4692 
4693                 if (copy_from_user(hdsp->firmware_cache, firmware_data, sizeof(hdsp->firmware_cache)) != 0)
4694                         return -EFAULT;
4695 
4696                 hdsp->state |= HDSP_FirmwareCached;
4697 
4698                 if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4699                         return err;
4700 
4701                 if (!(hdsp->state & HDSP_InitializationComplete)) {
4702                         if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4703                                 return err;
4704 
4705                         snd_hdsp_initialize_channels(hdsp);
4706                         snd_hdsp_initialize_midi_flush(hdsp);
4707 
4708                         if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4709                                 snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4710                                 return err;
4711                         }
4712                 }
4713                 break;
4714         }
4715         case SNDRV_HDSP_IOCTL_GET_MIXER: {
4716                 struct hdsp_mixer __user *mixer = (struct hdsp_mixer __user *)argp;
4717                 if (copy_to_user(mixer->matrix, hdsp->mixer_matrix, sizeof(unsigned short)*HDSP_MATRIX_MIXER_SIZE))
4718                         return -EFAULT;
4719                 break;
4720         }
4721         default:
4722                 return -EINVAL;
4723         }
4724         return 0;
4725 }
4726 
4727 static struct snd_pcm_ops snd_hdsp_playback_ops = {
4728         .open =         snd_hdsp_playback_open,
4729         .close =        snd_hdsp_playback_release,
4730         .ioctl =        snd_hdsp_ioctl,
4731         .hw_params =    snd_hdsp_hw_params,
4732         .prepare =      snd_hdsp_prepare,
4733         .trigger =      snd_hdsp_trigger,
4734         .pointer =      snd_hdsp_hw_pointer,
4735         .copy =         snd_hdsp_playback_copy,
4736         .silence =      snd_hdsp_hw_silence,
4737 };
4738 
4739 static struct snd_pcm_ops snd_hdsp_capture_ops = {
4740         .open =         snd_hdsp_capture_open,
4741         .close =        snd_hdsp_capture_release,
4742         .ioctl =        snd_hdsp_ioctl,
4743         .hw_params =    snd_hdsp_hw_params,
4744         .prepare =      snd_hdsp_prepare,
4745         .trigger =      snd_hdsp_trigger,
4746         .pointer =      snd_hdsp_hw_pointer,
4747         .copy =         snd_hdsp_capture_copy,
4748 };
4749 
4750 static int snd_hdsp_create_hwdep(struct snd_card *card, struct hdsp *hdsp)
4751 {
4752         struct snd_hwdep *hw;
4753         int err;
4754 
4755         if ((err = snd_hwdep_new(card, "HDSP hwdep", 0, &hw)) < 0)
4756                 return err;
4757 
4758         hdsp->hwdep = hw;
4759         hw->private_data = hdsp;
4760         strcpy(hw->name, "HDSP hwdep interface");
4761 
4762         hw->ops.ioctl = snd_hdsp_hwdep_ioctl;
4763 
4764         return 0;
4765 }
4766 
4767 static int snd_hdsp_create_pcm(struct snd_card *card, struct hdsp *hdsp)
4768 {
4769         struct snd_pcm *pcm;
4770         int err;
4771 
4772         if ((err = snd_pcm_new(card, hdsp->card_name, 0, 1, 1, &pcm)) < 0)
4773                 return err;
4774 
4775         hdsp->pcm = pcm;
4776         pcm->private_data = hdsp;
4777         strcpy(pcm->name, hdsp->card_name);
4778 
4779         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_hdsp_playback_ops);
4780         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_hdsp_capture_ops);
4781 
4782         pcm->info_flags = SNDRV_PCM_INFO_JOINT_DUPLEX;
4783 
4784         return 0;
4785 }
4786 
4787 static void snd_hdsp_9652_enable_mixer (struct hdsp *hdsp)
4788 {
4789         hdsp->control2_register |= HDSP_9652_ENABLE_MIXER;
4790         hdsp_write (hdsp, HDSP_control2Reg, hdsp->control2_register);
4791 }
4792 
4793 static int snd_hdsp_enable_io (struct hdsp *hdsp)
4794 {
4795         int i;
4796 
4797         if (hdsp_fifo_wait (hdsp, 0, 100)) {
4798                 snd_printk(KERN_ERR "Hammerfall-DSP: enable_io fifo_wait failed\n");
4799                 return -EIO;
4800         }
4801 
4802         for (i = 0; i < hdsp->max_channels; ++i) {
4803                 hdsp_write (hdsp, HDSP_inputEnable + (4 * i), 1);
4804                 hdsp_write (hdsp, HDSP_outputEnable + (4 * i), 1);
4805         }
4806 
4807         return 0;
4808 }
4809 
4810 static void snd_hdsp_initialize_channels(struct hdsp *hdsp)
4811 {
4812         int status, aebi_channels, aebo_channels;
4813 
4814         switch (hdsp->io_type) {
4815         case Digiface:
4816                 hdsp->card_name = "RME Hammerfall DSP + Digiface";
4817                 hdsp->ss_in_channels = hdsp->ss_out_channels = DIGIFACE_SS_CHANNELS;
4818                 hdsp->ds_in_channels = hdsp->ds_out_channels = DIGIFACE_DS_CHANNELS;
4819                 break;
4820 
4821         case H9652:
4822                 hdsp->card_name = "RME Hammerfall HDSP 9652";
4823                 hdsp->ss_in_channels = hdsp->ss_out_channels = H9652_SS_CHANNELS;
4824                 hdsp->ds_in_channels = hdsp->ds_out_channels = H9652_DS_CHANNELS;
4825                 break;
4826 
4827         case H9632:
4828                 status = hdsp_read(hdsp, HDSP_statusRegister);
4829                 /* HDSP_AEBx bits are low when AEB are connected */
4830                 aebi_channels = (status & HDSP_AEBI) ? 0 : 4;
4831                 aebo_channels = (status & HDSP_AEBO) ? 0 : 4;
4832                 hdsp->card_name = "RME Hammerfall HDSP 9632";
4833                 hdsp->ss_in_channels = H9632_SS_CHANNELS+aebi_channels;
4834                 hdsp->ds_in_channels = H9632_DS_CHANNELS+aebi_channels;
4835                 hdsp->qs_in_channels = H9632_QS_CHANNELS+aebi_channels;
4836                 hdsp->ss_out_channels = H9632_SS_CHANNELS+aebo_channels;
4837                 hdsp->ds_out_channels = H9632_DS_CHANNELS+aebo_channels;
4838                 hdsp->qs_out_channels = H9632_QS_CHANNELS+aebo_channels;
4839                 break;
4840 
4841         case Multiface:
4842                 hdsp->card_name = "RME Hammerfall DSP + Multiface";
4843                 hdsp->ss_in_channels = hdsp->ss_out_channels = MULTIFACE_SS_CHANNELS;
4844                 hdsp->ds_in_channels = hdsp->ds_out_channels = MULTIFACE_DS_CHANNELS;
4845                 break;
4846 
4847         default:
4848                 /* should never get here */
4849                 break;
4850         }
4851 }
4852 
4853 static void snd_hdsp_initialize_midi_flush (struct hdsp *hdsp)
4854 {
4855         snd_hdsp_flush_midi_input (hdsp, 0);
4856         snd_hdsp_flush_midi_input (hdsp, 1);
4857 }
4858 
4859 static int snd_hdsp_create_alsa_devices(struct snd_card *card, struct hdsp *hdsp)
4860 {
4861         int err;
4862 
4863         if ((err = snd_hdsp_create_pcm(card, hdsp)) < 0) {
4864                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating pcm interface\n");
4865                 return err;
4866         }
4867 
4868 
4869         if ((err = snd_hdsp_create_midi(card, hdsp, 0)) < 0) {
4870                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating first midi interface\n");
4871                 return err;
4872         }
4873 
4874         if (hdsp->io_type == Digiface || hdsp->io_type == H9652) {
4875                 if ((err = snd_hdsp_create_midi(card, hdsp, 1)) < 0) {
4876                         snd_printk(KERN_ERR "Hammerfall-DSP: Error creating second midi interface\n");
4877                         return err;
4878                 }
4879         }
4880 
4881         if ((err = snd_hdsp_create_controls(card, hdsp)) < 0) {
4882                 snd_printk(KERN_ERR "Hammerfall-DSP: Error creating ctl interface\n");
4883                 return err;
4884         }
4885 
4886         snd_hdsp_proc_init(hdsp);
4887 
4888         hdsp->system_sample_rate = -1;
4889         hdsp->playback_pid = -1;
4890         hdsp->capture_pid = -1;
4891         hdsp->capture_substream = NULL;
4892         hdsp->playback_substream = NULL;
4893 
4894         if ((err = snd_hdsp_set_defaults(hdsp)) < 0) {
4895                 snd_printk(KERN_ERR "Hammerfall-DSP: Error setting default values\n");
4896                 return err;
4897         }
4898 
4899         if (!(hdsp->state & HDSP_InitializationComplete)) {
4900                 strcpy(card->shortname, "Hammerfall DSP");
4901                 sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
4902                         hdsp->port, hdsp->irq);
4903 
4904                 if ((err = snd_card_register(card)) < 0) {
4905                         snd_printk(KERN_ERR "Hammerfall-DSP: error registering card\n");
4906                         return err;
4907                 }
4908                 hdsp->state |= HDSP_InitializationComplete;
4909         }
4910 
4911         return 0;
4912 }
4913 
4914 #ifdef HDSP_FW_LOADER
4915 /* load firmware via hotplug fw loader */
4916 static int hdsp_request_fw_loader(struct hdsp *hdsp)
4917 {
4918         const char *fwfile;
4919         const struct firmware *fw;
4920         int err;
4921 
4922         if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4923                 return 0;
4924         if (hdsp->io_type == Undefined) {
4925                 if ((err = hdsp_get_iobox_version(hdsp)) < 0)
4926                         return err;
4927                 if (hdsp->io_type == H9652 || hdsp->io_type == H9632)
4928                         return 0;
4929         }
4930 
4931         /* caution: max length of firmware filename is 30! */
4932         switch (hdsp->io_type) {
4933         case Multiface:
4934                 if (hdsp->firmware_rev == 0xa)
4935                         fwfile = "multiface_firmware.bin";
4936                 else
4937                         fwfile = "multiface_firmware_rev11.bin";
4938                 break;
4939         case Digiface:
4940                 if (hdsp->firmware_rev == 0xa)
4941                         fwfile = "digiface_firmware.bin";
4942                 else
4943                         fwfile = "digiface_firmware_rev11.bin";
4944                 break;
4945         default:
4946                 snd_printk(KERN_ERR "Hammerfall-DSP: invalid io_type %d\n", hdsp->io_type);
4947                 return -EINVAL;
4948         }
4949 
4950         if (request_firmware(&fw, fwfile, &hdsp->pci->dev)) {
4951                 snd_printk(KERN_ERR "Hammerfall-DSP: cannot load firmware %s\n", fwfile);
4952                 return -ENOENT;
4953         }
4954         if (fw->size < sizeof(hdsp->firmware_cache)) {
4955                 snd_printk(KERN_ERR "Hammerfall-DSP: too short firmware size %d (expected %d)\n",
4956                            (int)fw->size, (int)sizeof(hdsp->firmware_cache));
4957                 release_firmware(fw);
4958                 return -EINVAL;
4959         }
4960 
4961         memcpy(hdsp->firmware_cache, fw->data, sizeof(hdsp->firmware_cache));
4962 
4963         release_firmware(fw);
4964 
4965         hdsp->state |= HDSP_FirmwareCached;
4966 
4967         if ((err = snd_hdsp_load_firmware_from_cache(hdsp)) < 0)
4968                 return err;
4969 
4970         if (!(hdsp->state & HDSP_InitializationComplete)) {
4971                 if ((err = snd_hdsp_enable_io(hdsp)) < 0)
4972                         return err;
4973 
4974                 if ((err = snd_hdsp_create_hwdep(hdsp->card, hdsp)) < 0) {
4975                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating hwdep device\n");
4976                         return err;
4977                 }
4978                 snd_hdsp_initialize_channels(hdsp);
4979                 snd_hdsp_initialize_midi_flush(hdsp);
4980                 if ((err = snd_hdsp_create_alsa_devices(hdsp->card, hdsp)) < 0) {
4981                         snd_printk(KERN_ERR "Hammerfall-DSP: error creating alsa devices\n");
4982                         return err;
4983                 }
4984         }
4985         return 0;
4986 }
4987 #endif
4988 
4989 static int __devinit snd_hdsp_create(struct snd_card *card,
4990                                      struct hdsp *hdsp)
4991 {
4992         struct pci_dev *pci = hdsp->pci;
4993         int err;
4994         int is_9652 = 0;
4995         int is_9632 = 0;
4996 
4997         hdsp->irq = -1;
4998         hdsp->state = 0;
4999         hdsp->midi[0].rmidi = NULL;
5000         hdsp->midi[1].rmidi = NULL;
5001         hdsp->midi[0].input = NULL;
5002         hdsp->midi[1].input = NULL;
5003         hdsp->midi[0].output = NULL;
5004         hdsp->midi[1].output = NULL;
5005         hdsp->midi[0].pending = 0;
5006         hdsp->midi[1].pending = 0;
5007         spin_lock_init(&hdsp->midi[0].lock);
5008         spin_lock_init(&hdsp->midi[1].lock);
5009         hdsp->iobase = NULL;
5010         hdsp->control_register = 0;
5011         hdsp->control2_register = 0;
5012         hdsp->io_type = Undefined;
5013         hdsp->max_channels = 26;
5014 
5015         hdsp->card = card;
5016 
5017         spin_lock_init(&hdsp->lock);
5018 
5019         tasklet_init(&hdsp->midi_tasklet, hdsp_midi_tasklet, (unsigned long)hdsp);
5020 
5021         pci_read_config_word(hdsp->pci, PCI_CLASS_REVISION, &hdsp->firmware_rev);
5022         hdsp->firmware_rev &= 0xff;
5023 
5024         /* From Martin Bjoernsen :
5025             "It is important that the card's latency timer register in
5026             the PCI configuration space is set to a value much larger
5027             than 0 by the computer's BIOS or the driver.
5028             The windows driver always sets this 8 bit register [...]
5029             to its maximum 255 to avoid problems with some computers."
5030         */
5031         pci_write_config_byte(hdsp->pci, PCI_LATENCY_TIMER, 0xFF);
5032 
5033         strcpy(card->driver, "H-DSP");
5034         strcpy(card->mixername, "Xilinx FPGA");
5035 
5036         if (hdsp->firmware_rev < 0xa)
5037                 return -ENODEV;
5038         else if (hdsp->firmware_rev < 0x64)
5039                 hdsp->card_name = "RME Hammerfall DSP";
5040         else if (hdsp->firmware_rev < 0x96) {
5041                 hdsp->card_name = "RME HDSP 9652";
5042                 is_9652 = 1;
5043         } else {
5044                 hdsp->card_name = "RME HDSP 9632";
5045                 hdsp->max_channels = 16;
5046                 is_9632 = 1;
5047         }
5048 
5049         if ((err = pci_enable_device(pci)) < 0)
5050                 return err;
5051 
5052         pci_set_master(hdsp->pci);
5053 
5054         if ((err = pci_request_regions(pci, "hdsp")) < 0)
5055                 return err;
5056         hdsp->port = pci_resource_start(pci, 0);
5057         if ((hdsp->iobase = ioremap_nocache(hdsp->port, HDSP_IO_EXTENT)) == NULL) {
5058                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to remap region 0x%lx-0x%lx\n", hdsp->port, hdsp->port + HDSP_IO_EXTENT - 1);
5059                 return -EBUSY;
5060         }
5061 
5062         if (request_irq(pci->irq, snd_hdsp_interrupt, IRQF_SHARED,
5063                         "hdsp", hdsp)) {
5064                 snd_printk(KERN_ERR "Hammerfall-DSP: unable to use IRQ %d\n", pci->irq);
5065                 return -EBUSY;
5066         }
5067 
5068         hdsp->irq = pci->irq;
5069         hdsp->precise_ptr = 0;
5070         hdsp->use_midi_tasklet = 1;
5071         hdsp->dds_value = 0;
5072 
5073         if ((err = snd_hdsp_initialize_memory(hdsp)) < 0)
5074                 return err;
5075 
5076         if (!is_9652 && !is_9632) {
5077                 /* we wait a maximum of 10 seconds to let freshly
5078                  * inserted cardbus cards do their hardware init */
5079                 err = hdsp_wait_for_iobox(hdsp, 1000, 10);
5080 
5081                 if (err < 0)
5082                         return err;
5083 
5084                 if ((hdsp_read (hdsp, HDSP_statusRegister) & HDSP_DllError) != 0) {
5085 #ifdef HDSP_FW_LOADER
5086                         if ((err = hdsp_request_fw_loader(hdsp)) < 0)
5087                                 /* we don't fail as this can happen
5088                                    if userspace is not ready for
5089                                    firmware upload
5090                                 */
5091                                 snd_printk(KERN_ERR "Hammerfall-DSP: couldn't get firmware from userspace. try using hdsploader\n");
5092                         else
5093                                 /* init is complete, we return */
5094                                 return 0;
5095 #endif
5096                         /* we defer initialization */
5097                         snd_printk(KERN_INFO "Hammerfall-DSP: card initialization pending : waiting for firmware\n");
5098                         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5099                                 return err;
5100                         return 0;
5101                 } else {
5102                         snd_printk(KERN_INFO "Hammerfall-DSP: Firmware already present, initializing card.\n");
5103                         if (hdsp_read(hdsp, HDSP_status2Register) & HDSP_version1)
5104                                 hdsp->io_type = Multiface;
5105                         else
5106                                 hdsp->io_type = Digiface;
5107                 }
5108         }
5109 
5110         if ((err = snd_hdsp_enable_io(hdsp)) != 0)
5111                 return err;
5112 
5113         if (is_9652)
5114                 hdsp->io_type = H9652;
5115 
5116         if (is_9632)
5117                 hdsp->io_type = H9632;
5118 
5119         if ((err = snd_hdsp_create_hwdep(card, hdsp)) < 0)
5120                 return err;
5121 
5122         snd_hdsp_initialize_channels(hdsp);
5123         snd_hdsp_initialize_midi_flush(hdsp);
5124 
5125         hdsp->state |= HDSP_FirmwareLoaded;
5126 
5127         if ((err = snd_hdsp_create_alsa_devices(card, hdsp)) < 0)
5128                 return err;
5129 
5130         return 0;
5131 }
5132 
5133 static int snd_hdsp_free(struct hdsp *hdsp)
5134 {
5135         if (hdsp->port) {
5136                 /* stop the audio, and cancel all interrupts */
5137                 tasklet_kill(&hdsp->midi_tasklet);
5138                 hdsp->control_register &= ~(HDSP_Start|HDSP_AudioInterruptEnable|HDSP_Midi0InterruptEnable|HDSP_Midi1InterruptEnable);
5139                 hdsp_write (hdsp, HDSP_controlRegister, hdsp->control_register);
5140         }
5141 
5142         if (hdsp->irq >= 0)
5143                 free_irq(hdsp->irq, (void *)hdsp);
5144 
5145         snd_hdsp_free_buffers(hdsp);
5146 
5147         if (hdsp->iobase)
5148                 iounmap(hdsp->iobase);
5149 
5150         if (hdsp->port)
5151                 pci_release_regions(hdsp->pci);
5152 
5153         pci_disable_device(hdsp->pci);
5154         return 0;
5155 }
5156 
5157 static void snd_hdsp_card_free(struct snd_card *card)
5158 {
5159         struct hdsp *hdsp = (struct hdsp *) card->private_data;
5160 
5161         if (hdsp)
5162                 snd_hdsp_free(hdsp);
5163 }
5164 
5165 static int __devinit snd_hdsp_probe(struct pci_dev *pci,
5166                                     const struct pci_device_id *pci_id)
5167 {
5168         static int dev;
5169         struct hdsp *hdsp;
5170         struct snd_card *card;
5171         int err;
5172 
5173         if (dev >= SNDRV_CARDS)
5174                 return -ENODEV;
5175         if (!enable[dev]) {
5176                 dev++;
5177                 return -ENOENT;
5178         }
5179 
5180         err = snd_card_create(index[dev], id[dev], THIS_MODULE,
5181                               sizeof(struct hdsp), &card);
5182         if (err < 0)
5183                 return err;
5184 
5185         hdsp = (struct hdsp *) card->private_data;
5186         card->private_free = snd_hdsp_card_free;
5187         hdsp->dev = dev;
5188         hdsp->pci = pci;
5189         snd_card_set_dev(card, &pci->dev);
5190 
5191         if ((err = snd_hdsp_create(card, hdsp)) < 0) {
5192                 snd_card_free(card);
5193                 return err;
5194         }
5195 
5196         strcpy(card->shortname, "Hammerfall DSP");
5197         sprintf(card->longname, "%s at 0x%lx, irq %d", hdsp->card_name,
5198                 hdsp->port, hdsp->irq);
5199 
5200         if ((err = snd_card_register(card)) < 0) {
5201                 snd_card_free(card);
5202                 return err;
5203         }
5204         pci_set_drvdata(pci, card);
5205         dev++;
5206         return 0;
5207 }
5208 
5209 static void __devexit snd_hdsp_remove(struct pci_dev *pci)
5210 {
5211         snd_card_free(pci_get_drvdata(pci));
5212         pci_set_drvdata(pci, NULL);
5213 }
5214 
5215 static struct pci_driver driver = {
5216         .name =     "RME Hammerfall DSP",
5217         .id_table = snd_hdsp_ids,
5218         .probe =    snd_hdsp_probe,
5219         .remove = __devexit_p(snd_hdsp_remove),
5220 };
5221 
5222 static int __init alsa_card_hdsp_init(void)
5223 {
5224         return pci_register_driver(&driver);
5225 }
5226 
5227 static void __exit alsa_card_hdsp_exit(void)
5228 {
5229         pci_unregister_driver(&driver);
5230 }
5231 
5232 module_init(alsa_card_hdsp_init)
5233 module_exit(alsa_card_hdsp_exit)
5234 

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