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Linux/sound/pci/hda/hda_intel.c

  1 /*
  2  *
  3  *  hda_intel.c - Implementation of primary alsa driver code base
  4  *                for Intel HD Audio.
  5  *
  6  *  Copyright(c) 2004 Intel Corporation. All rights reserved.
  7  *
  8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  9  *                     PeiSen Hou <pshou@realtek.com.tw>
 10  *
 11  *  This program is free software; you can redistribute it and/or modify it
 12  *  under the terms of the GNU General Public License as published by the Free
 13  *  Software Foundation; either version 2 of the License, or (at your option)
 14  *  any later version.
 15  *
 16  *  This program is distributed in the hope that it will be useful, but WITHOUT
 17  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 18  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 19  *  more details.
 20  *
 21  *  You should have received a copy of the GNU General Public License along with
 22  *  this program; if not, write to the Free Software Foundation, Inc., 59
 23  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 24  *
 25  *  CONTACTS:
 26  *
 27  *  Matt Jared          matt.jared@intel.com
 28  *  Andy Kopp           andy.kopp@intel.com
 29  *  Dan Kogan           dan.d.kogan@intel.com
 30  *
 31  *  CHANGES:
 32  *
 33  *  2004.12.01  Major rewrite by tiwai, merged the work of pshou
 34  * 
 35  */
 36 
 37 #include <linux/delay.h>
 38 #include <linux/interrupt.h>
 39 #include <linux/kernel.h>
 40 #include <linux/module.h>
 41 #include <linux/dma-mapping.h>
 42 #include <linux/moduleparam.h>
 43 #include <linux/init.h>
 44 #include <linux/slab.h>
 45 #include <linux/pci.h>
 46 #include <linux/mutex.h>
 47 #include <linux/io.h>
 48 #include <linux/pm_runtime.h>
 49 #include <linux/clocksource.h>
 50 #include <linux/time.h>
 51 #include <linux/completion.h>
 52 
 53 #ifdef CONFIG_X86
 54 /* for snoop control */
 55 #include <asm/pgtable.h>
 56 #include <asm/cacheflush.h>
 57 #endif
 58 #include <sound/core.h>
 59 #include <sound/initval.h>
 60 #include <linux/vgaarb.h>
 61 #include <linux/vga_switcheroo.h>
 62 #include <linux/firmware.h>
 63 #include "hda_codec.h"
 64 #include "hda_controller.h"
 65 #include "hda_priv.h"
 66 #include "hda_intel.h"
 67 
 68 /* position fix mode */
 69 enum {
 70         POS_FIX_AUTO,
 71         POS_FIX_LPIB,
 72         POS_FIX_POSBUF,
 73         POS_FIX_VIACOMBO,
 74         POS_FIX_COMBO,
 75 };
 76 
 77 /* Defines for ATI HD Audio support in SB450 south bridge */
 78 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
 79 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02
 80 
 81 /* Defines for Nvidia HDA support */
 82 #define NVIDIA_HDA_TRANSREG_ADDR      0x4e
 83 #define NVIDIA_HDA_ENABLE_COHBITS     0x0f
 84 #define NVIDIA_HDA_ISTRM_COH          0x4d
 85 #define NVIDIA_HDA_OSTRM_COH          0x4c
 86 #define NVIDIA_HDA_ENABLE_COHBIT      0x01
 87 
 88 /* Defines for Intel SCH HDA snoop control */
 89 #define INTEL_SCH_HDA_DEVC      0x78
 90 #define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)
 91 
 92 /* Define IN stream 0 FIFO size offset in VIA controller */
 93 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
 94 /* Define VIA HD Audio Device ID*/
 95 #define VIA_HDAC_DEVICE_ID              0x3288
 96 
 97 /* max number of SDs */
 98 /* ICH, ATI and VIA have 4 playback and 4 capture */
 99 #define ICH6_NUM_CAPTURE        4
100 #define ICH6_NUM_PLAYBACK       4
101 
102 /* ULI has 6 playback and 5 capture */
103 #define ULI_NUM_CAPTURE         5
104 #define ULI_NUM_PLAYBACK        6
105 
106 /* ATI HDMI may have up to 8 playbacks and 0 capture */
107 #define ATIHDMI_NUM_CAPTURE     0
108 #define ATIHDMI_NUM_PLAYBACK    8
109 
110 /* TERA has 4 playback and 3 capture */
111 #define TERA_NUM_CAPTURE        3
112 #define TERA_NUM_PLAYBACK       4
113 
114 
115 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
116 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
117 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
118 static char *model[SNDRV_CARDS];
119 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
120 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
121 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
122 static int probe_only[SNDRV_CARDS];
123 static int jackpoll_ms[SNDRV_CARDS];
124 static bool single_cmd;
125 static int enable_msi = -1;
126 #ifdef CONFIG_SND_HDA_PATCH_LOADER
127 static char *patch[SNDRV_CARDS];
128 #endif
129 #ifdef CONFIG_SND_HDA_INPUT_BEEP
130 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
131                                         CONFIG_SND_HDA_INPUT_BEEP_MODE};
132 #endif
133 
134 module_param_array(index, int, NULL, 0444);
135 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
136 module_param_array(id, charp, NULL, 0444);
137 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
138 module_param_array(enable, bool, NULL, 0444);
139 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
140 module_param_array(model, charp, NULL, 0444);
141 MODULE_PARM_DESC(model, "Use the given board model.");
142 module_param_array(position_fix, int, NULL, 0444);
143 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
144                  "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
145 module_param_array(bdl_pos_adj, int, NULL, 0644);
146 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
147 module_param_array(probe_mask, int, NULL, 0444);
148 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
149 module_param_array(probe_only, int, NULL, 0444);
150 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
151 module_param_array(jackpoll_ms, int, NULL, 0444);
152 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
153 module_param(single_cmd, bool, 0444);
154 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
155                  "(for debugging only).");
156 module_param(enable_msi, bint, 0444);
157 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
158 #ifdef CONFIG_SND_HDA_PATCH_LOADER
159 module_param_array(patch, charp, NULL, 0444);
160 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
161 #endif
162 #ifdef CONFIG_SND_HDA_INPUT_BEEP
163 module_param_array(beep_mode, bool, NULL, 0444);
164 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
165                             "(0=off, 1=on) (default=1).");
166 #endif
167 
168 #ifdef CONFIG_PM
169 static int param_set_xint(const char *val, const struct kernel_param *kp);
170 static struct kernel_param_ops param_ops_xint = {
171         .set = param_set_xint,
172         .get = param_get_int,
173 };
174 #define param_check_xint param_check_int
175 
176 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
177 static int *power_save_addr = &power_save;
178 module_param(power_save, xint, 0644);
179 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
180                  "(in second, 0 = disable).");
181 
182 /* reset the HD-audio controller in power save mode.
183  * this may give more power-saving, but will take longer time to
184  * wake up.
185  */
186 static bool power_save_controller = 1;
187 module_param(power_save_controller, bool, 0644);
188 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
189 #else
190 static int *power_save_addr;
191 #endif /* CONFIG_PM */
192 
193 static int align_buffer_size = -1;
194 module_param(align_buffer_size, bint, 0644);
195 MODULE_PARM_DESC(align_buffer_size,
196                 "Force buffer and period sizes to be multiple of 128 bytes.");
197 
198 #ifdef CONFIG_X86
199 static int hda_snoop = -1;
200 module_param_named(snoop, hda_snoop, bint, 0444);
201 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
202 #else
203 #define hda_snoop               true
204 #endif
205 
206 
207 MODULE_LICENSE("GPL");
208 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
209                          "{Intel, ICH6M},"
210                          "{Intel, ICH7},"
211                          "{Intel, ESB2},"
212                          "{Intel, ICH8},"
213                          "{Intel, ICH9},"
214                          "{Intel, ICH10},"
215                          "{Intel, PCH},"
216                          "{Intel, CPT},"
217                          "{Intel, PPT},"
218                          "{Intel, LPT},"
219                          "{Intel, LPT_LP},"
220                          "{Intel, WPT_LP},"
221                          "{Intel, SPT},"
222                          "{Intel, SPT_LP},"
223                          "{Intel, HPT},"
224                          "{Intel, PBG},"
225                          "{Intel, SCH},"
226                          "{ATI, SB450},"
227                          "{ATI, SB600},"
228                          "{ATI, RS600},"
229                          "{ATI, RS690},"
230                          "{ATI, RS780},"
231                          "{ATI, R600},"
232                          "{ATI, RV630},"
233                          "{ATI, RV610},"
234                          "{ATI, RV670},"
235                          "{ATI, RV635},"
236                          "{ATI, RV620},"
237                          "{ATI, RV770},"
238                          "{VIA, VT8251},"
239                          "{VIA, VT8237A},"
240                          "{SiS, SIS966},"
241                          "{ULI, M5461}}");
242 MODULE_DESCRIPTION("Intel HDA driver");
243 
244 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
245 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
246 #define SUPPORT_VGA_SWITCHEROO
247 #endif
248 #endif
249 
250 
251 /*
252  */
253 
254 /* driver types */
255 enum {
256         AZX_DRIVER_ICH,
257         AZX_DRIVER_PCH,
258         AZX_DRIVER_SCH,
259         AZX_DRIVER_HDMI,
260         AZX_DRIVER_ATI,
261         AZX_DRIVER_ATIHDMI,
262         AZX_DRIVER_ATIHDMI_NS,
263         AZX_DRIVER_VIA,
264         AZX_DRIVER_SIS,
265         AZX_DRIVER_ULI,
266         AZX_DRIVER_NVIDIA,
267         AZX_DRIVER_TERA,
268         AZX_DRIVER_CTX,
269         AZX_DRIVER_CTHDA,
270         AZX_DRIVER_CMEDIA,
271         AZX_DRIVER_GENERIC,
272         AZX_NUM_DRIVERS, /* keep this as last entry */
273 };
274 
275 #define azx_get_snoop_type(chip) \
276         (((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
277 #define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)
278 
279 /* quirks for old Intel chipsets */
280 #define AZX_DCAPS_INTEL_ICH \
281         (AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
282 
283 /* quirks for Intel PCH */
284 #define AZX_DCAPS_INTEL_PCH_NOPM \
285         (AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
286          AZX_DCAPS_REVERSE_ASSIGN | AZX_DCAPS_SNOOP_TYPE(SCH))
287 
288 #define AZX_DCAPS_INTEL_PCH \
289         (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_PM_RUNTIME)
290 
291 #define AZX_DCAPS_INTEL_HASWELL \
292         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
293          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
294          AZX_DCAPS_SNOOP_TYPE(SCH))
295 
296 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
297 #define AZX_DCAPS_INTEL_BROADWELL \
298         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
299          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
300          AZX_DCAPS_SNOOP_TYPE(SCH))
301 
302 #define AZX_DCAPS_INTEL_SKYLAKE \
303         (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG)
304 
305 /* quirks for ATI SB / AMD Hudson */
306 #define AZX_DCAPS_PRESET_ATI_SB \
307         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
308          AZX_DCAPS_SNOOP_TYPE(ATI))
309 
310 /* quirks for ATI/AMD HDMI */
311 #define AZX_DCAPS_PRESET_ATI_HDMI \
312         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
313          AZX_DCAPS_NO_MSI64)
314 
315 /* quirks for ATI HDMI with snoop off */
316 #define AZX_DCAPS_PRESET_ATI_HDMI_NS \
317         (AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)
318 
319 /* quirks for Nvidia */
320 #define AZX_DCAPS_PRESET_NVIDIA \
321         (AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
322          AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
323          AZX_DCAPS_SNOOP_TYPE(NVIDIA))
324 
325 #define AZX_DCAPS_PRESET_CTHDA \
326         (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
327          AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
328 
329 /*
330  * VGA-switcher support
331  */
332 #ifdef SUPPORT_VGA_SWITCHEROO
333 #define use_vga_switcheroo(chip)        ((chip)->use_vga_switcheroo)
334 #else
335 #define use_vga_switcheroo(chip)        0
336 #endif
337 
338 static char *driver_short_names[] = {
339         [AZX_DRIVER_ICH] = "HDA Intel",
340         [AZX_DRIVER_PCH] = "HDA Intel PCH",
341         [AZX_DRIVER_SCH] = "HDA Intel MID",
342         [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
343         [AZX_DRIVER_ATI] = "HDA ATI SB",
344         [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
345         [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
346         [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
347         [AZX_DRIVER_SIS] = "HDA SIS966",
348         [AZX_DRIVER_ULI] = "HDA ULI M5461",
349         [AZX_DRIVER_NVIDIA] = "HDA NVidia",
350         [AZX_DRIVER_TERA] = "HDA Teradici", 
351         [AZX_DRIVER_CTX] = "HDA Creative", 
352         [AZX_DRIVER_CTHDA] = "HDA Creative",
353         [AZX_DRIVER_CMEDIA] = "HDA C-Media",
354         [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
355 };
356 
357 #ifdef CONFIG_X86
358 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
359 {
360         int pages;
361 
362         if (azx_snoop(chip))
363                 return;
364         if (!dmab || !dmab->area || !dmab->bytes)
365                 return;
366 
367 #ifdef CONFIG_SND_DMA_SGBUF
368         if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
369                 struct snd_sg_buf *sgbuf = dmab->private_data;
370                 if (chip->driver_type == AZX_DRIVER_CMEDIA)
371                         return; /* deal with only CORB/RIRB buffers */
372                 if (on)
373                         set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
374                 else
375                         set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
376                 return;
377         }
378 #endif
379 
380         pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
381         if (on)
382                 set_memory_wc((unsigned long)dmab->area, pages);
383         else
384                 set_memory_wb((unsigned long)dmab->area, pages);
385 }
386 
387 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
388                                  bool on)
389 {
390         __mark_pages_wc(chip, buf, on);
391 }
392 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
393                                    struct snd_pcm_substream *substream, bool on)
394 {
395         if (azx_dev->wc_marked != on) {
396                 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
397                 azx_dev->wc_marked = on;
398         }
399 }
400 #else
401 /* NOP for other archs */
402 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
403                                  bool on)
404 {
405 }
406 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
407                                    struct snd_pcm_substream *substream, bool on)
408 {
409 }
410 #endif
411 
412 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
413 
414 /*
415  * initialize the PCI registers
416  */
417 /* update bits in a PCI register byte */
418 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
419                             unsigned char mask, unsigned char val)
420 {
421         unsigned char data;
422 
423         pci_read_config_byte(pci, reg, &data);
424         data &= ~mask;
425         data |= (val & mask);
426         pci_write_config_byte(pci, reg, data);
427 }
428 
429 static void azx_init_pci(struct azx *chip)
430 {
431         int snoop_type = azx_get_snoop_type(chip);
432 
433         /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
434          * TCSEL == Traffic Class Select Register, which sets PCI express QOS
435          * Ensuring these bits are 0 clears playback static on some HD Audio
436          * codecs.
437          * The PCI register TCSEL is defined in the Intel manuals.
438          */
439         if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
440                 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
441                 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
442         }
443 
444         /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
445          * we need to enable snoop.
446          */
447         if (snoop_type == AZX_SNOOP_TYPE_ATI) {
448                 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
449                         azx_snoop(chip));
450                 update_pci_byte(chip->pci,
451                                 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
452                                 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
453         }
454 
455         /* For NVIDIA HDA, enable snoop */
456         if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
457                 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
458                         azx_snoop(chip));
459                 update_pci_byte(chip->pci,
460                                 NVIDIA_HDA_TRANSREG_ADDR,
461                                 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
462                 update_pci_byte(chip->pci,
463                                 NVIDIA_HDA_ISTRM_COH,
464                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
465                 update_pci_byte(chip->pci,
466                                 NVIDIA_HDA_OSTRM_COH,
467                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
468         }
469 
470         /* Enable SCH/PCH snoop if needed */
471         if (snoop_type == AZX_SNOOP_TYPE_SCH) {
472                 unsigned short snoop;
473                 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
474                 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
475                     (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
476                         snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
477                         if (!azx_snoop(chip))
478                                 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
479                         pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
480                         pci_read_config_word(chip->pci,
481                                 INTEL_SCH_HDA_DEVC, &snoop);
482                 }
483                 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
484                         (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
485                         "Disabled" : "Enabled");
486         }
487 }
488 
489 /* calculate runtime delay from LPIB */
490 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
491                                    unsigned int pos)
492 {
493         struct snd_pcm_substream *substream = azx_dev->substream;
494         int stream = substream->stream;
495         unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
496         int delay;
497 
498         if (stream == SNDRV_PCM_STREAM_PLAYBACK)
499                 delay = pos - lpib_pos;
500         else
501                 delay = lpib_pos - pos;
502         if (delay < 0) {
503                 if (delay >= azx_dev->delay_negative_threshold)
504                         delay = 0;
505                 else
506                         delay += azx_dev->bufsize;
507         }
508 
509         if (delay >= azx_dev->period_bytes) {
510                 dev_info(chip->card->dev,
511                          "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
512                          delay, azx_dev->period_bytes);
513                 delay = 0;
514                 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
515                 chip->get_delay[stream] = NULL;
516         }
517 
518         return bytes_to_frames(substream->runtime, delay);
519 }
520 
521 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
522 
523 /* called from IRQ */
524 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
525 {
526         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
527         int ok;
528 
529         ok = azx_position_ok(chip, azx_dev);
530         if (ok == 1) {
531                 azx_dev->irq_pending = 0;
532                 return ok;
533         } else if (ok == 0 && chip->bus && chip->bus->workq) {
534                 /* bogus IRQ, process it later */
535                 azx_dev->irq_pending = 1;
536                 queue_work(chip->bus->workq, &hda->irq_pending_work);
537         }
538         return 0;
539 }
540 
541 /*
542  * Check whether the current DMA position is acceptable for updating
543  * periods.  Returns non-zero if it's OK.
544  *
545  * Many HD-audio controllers appear pretty inaccurate about
546  * the update-IRQ timing.  The IRQ is issued before actually the
547  * data is processed.  So, we need to process it afterwords in a
548  * workqueue.
549  */
550 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
551 {
552         struct snd_pcm_substream *substream = azx_dev->substream;
553         int stream = substream->stream;
554         u32 wallclk;
555         unsigned int pos;
556 
557         wallclk = azx_readl(chip, WALLCLK) - azx_dev->start_wallclk;
558         if (wallclk < (azx_dev->period_wallclk * 2) / 3)
559                 return -1;      /* bogus (too early) interrupt */
560 
561         if (chip->get_position[stream])
562                 pos = chip->get_position[stream](chip, azx_dev);
563         else { /* use the position buffer as default */
564                 pos = azx_get_pos_posbuf(chip, azx_dev);
565                 if (!pos || pos == (u32)-1) {
566                         dev_info(chip->card->dev,
567                                  "Invalid position buffer, using LPIB read method instead.\n");
568                         chip->get_position[stream] = azx_get_pos_lpib;
569                         pos = azx_get_pos_lpib(chip, azx_dev);
570                         chip->get_delay[stream] = NULL;
571                 } else {
572                         chip->get_position[stream] = azx_get_pos_posbuf;
573                         if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
574                                 chip->get_delay[stream] = azx_get_delay_from_lpib;
575                 }
576         }
577 
578         if (pos >= azx_dev->bufsize)
579                 pos = 0;
580 
581         if (WARN_ONCE(!azx_dev->period_bytes,
582                       "hda-intel: zero azx_dev->period_bytes"))
583                 return -1; /* this shouldn't happen! */
584         if (wallclk < (azx_dev->period_wallclk * 5) / 4 &&
585             pos % azx_dev->period_bytes > azx_dev->period_bytes / 2)
586                 /* NG - it's below the first next period boundary */
587                 return chip->bdl_pos_adj[chip->dev_index] ? 0 : -1;
588         azx_dev->start_wallclk += wallclk;
589         return 1; /* OK, it's fine */
590 }
591 
592 /*
593  * The work for pending PCM period updates.
594  */
595 static void azx_irq_pending_work(struct work_struct *work)
596 {
597         struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
598         struct azx *chip = &hda->chip;
599         int i, pending, ok;
600 
601         if (!hda->irq_pending_warned) {
602                 dev_info(chip->card->dev,
603                          "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
604                          chip->card->number);
605                 hda->irq_pending_warned = 1;
606         }
607 
608         for (;;) {
609                 pending = 0;
610                 spin_lock_irq(&chip->reg_lock);
611                 for (i = 0; i < chip->num_streams; i++) {
612                         struct azx_dev *azx_dev = &chip->azx_dev[i];
613                         if (!azx_dev->irq_pending ||
614                             !azx_dev->substream ||
615                             !azx_dev->running)
616                                 continue;
617                         ok = azx_position_ok(chip, azx_dev);
618                         if (ok > 0) {
619                                 azx_dev->irq_pending = 0;
620                                 spin_unlock(&chip->reg_lock);
621                                 snd_pcm_period_elapsed(azx_dev->substream);
622                                 spin_lock(&chip->reg_lock);
623                         } else if (ok < 0) {
624                                 pending = 0;    /* too early */
625                         } else
626                                 pending++;
627                 }
628                 spin_unlock_irq(&chip->reg_lock);
629                 if (!pending)
630                         return;
631                 msleep(1);
632         }
633 }
634 
635 /* clear irq_pending flags and assure no on-going workq */
636 static void azx_clear_irq_pending(struct azx *chip)
637 {
638         int i;
639 
640         spin_lock_irq(&chip->reg_lock);
641         for (i = 0; i < chip->num_streams; i++)
642                 chip->azx_dev[i].irq_pending = 0;
643         spin_unlock_irq(&chip->reg_lock);
644 }
645 
646 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
647 {
648         if (request_irq(chip->pci->irq, azx_interrupt,
649                         chip->msi ? 0 : IRQF_SHARED,
650                         KBUILD_MODNAME, chip)) {
651                 dev_err(chip->card->dev,
652                         "unable to grab IRQ %d, disabling device\n",
653                         chip->pci->irq);
654                 if (do_disconnect)
655                         snd_card_disconnect(chip->card);
656                 return -1;
657         }
658         chip->irq = chip->pci->irq;
659         pci_intx(chip->pci, !chip->msi);
660         return 0;
661 }
662 
663 /* get the current DMA position with correction on VIA chips */
664 static unsigned int azx_via_get_position(struct azx *chip,
665                                          struct azx_dev *azx_dev)
666 {
667         unsigned int link_pos, mini_pos, bound_pos;
668         unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
669         unsigned int fifo_size;
670 
671         link_pos = azx_sd_readl(chip, azx_dev, SD_LPIB);
672         if (azx_dev->substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
673                 /* Playback, no problem using link position */
674                 return link_pos;
675         }
676 
677         /* Capture */
678         /* For new chipset,
679          * use mod to get the DMA position just like old chipset
680          */
681         mod_dma_pos = le32_to_cpu(*azx_dev->posbuf);
682         mod_dma_pos %= azx_dev->period_bytes;
683 
684         /* azx_dev->fifo_size can't get FIFO size of in stream.
685          * Get from base address + offset.
686          */
687         fifo_size = readw(chip->remap_addr + VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
688 
689         if (azx_dev->insufficient) {
690                 /* Link position never gather than FIFO size */
691                 if (link_pos <= fifo_size)
692                         return 0;
693 
694                 azx_dev->insufficient = 0;
695         }
696 
697         if (link_pos <= fifo_size)
698                 mini_pos = azx_dev->bufsize + link_pos - fifo_size;
699         else
700                 mini_pos = link_pos - fifo_size;
701 
702         /* Find nearest previous boudary */
703         mod_mini_pos = mini_pos % azx_dev->period_bytes;
704         mod_link_pos = link_pos % azx_dev->period_bytes;
705         if (mod_link_pos >= fifo_size)
706                 bound_pos = link_pos - mod_link_pos;
707         else if (mod_dma_pos >= mod_mini_pos)
708                 bound_pos = mini_pos - mod_mini_pos;
709         else {
710                 bound_pos = mini_pos - mod_mini_pos + azx_dev->period_bytes;
711                 if (bound_pos >= azx_dev->bufsize)
712                         bound_pos = 0;
713         }
714 
715         /* Calculate real DMA position we want */
716         return bound_pos + mod_dma_pos;
717 }
718 
719 #ifdef CONFIG_PM
720 static DEFINE_MUTEX(card_list_lock);
721 static LIST_HEAD(card_list);
722 
723 static void azx_add_card_list(struct azx *chip)
724 {
725         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
726         mutex_lock(&card_list_lock);
727         list_add(&hda->list, &card_list);
728         mutex_unlock(&card_list_lock);
729 }
730 
731 static void azx_del_card_list(struct azx *chip)
732 {
733         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
734         mutex_lock(&card_list_lock);
735         list_del_init(&hda->list);
736         mutex_unlock(&card_list_lock);
737 }
738 
739 /* trigger power-save check at writing parameter */
740 static int param_set_xint(const char *val, const struct kernel_param *kp)
741 {
742         struct hda_intel *hda;
743         struct azx *chip;
744         struct hda_codec *c;
745         int prev = power_save;
746         int ret = param_set_int(val, kp);
747 
748         if (ret || prev == power_save)
749                 return ret;
750 
751         mutex_lock(&card_list_lock);
752         list_for_each_entry(hda, &card_list, list) {
753                 chip = &hda->chip;
754                 if (!chip->bus || chip->disabled)
755                         continue;
756                 list_for_each_entry(c, &chip->bus->codec_list, list)
757                         snd_hda_power_sync(c);
758         }
759         mutex_unlock(&card_list_lock);
760         return 0;
761 }
762 #else
763 #define azx_add_card_list(chip) /* NOP */
764 #define azx_del_card_list(chip) /* NOP */
765 #endif /* CONFIG_PM */
766 
767 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
768 /*
769  * power management
770  */
771 static int azx_suspend(struct device *dev)
772 {
773         struct snd_card *card = dev_get_drvdata(dev);
774         struct azx *chip;
775         struct hda_intel *hda;
776         struct azx_pcm *p;
777 
778         if (!card)
779                 return 0;
780 
781         chip = card->private_data;
782         hda = container_of(chip, struct hda_intel, chip);
783         if (chip->disabled || hda->init_failed)
784                 return 0;
785 
786         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
787         azx_clear_irq_pending(chip);
788         list_for_each_entry(p, &chip->pcm_list, list)
789                 snd_pcm_suspend_all(p->pcm);
790         if (chip->initialized)
791                 snd_hda_suspend(chip->bus);
792         azx_stop_chip(chip);
793         azx_enter_link_reset(chip);
794         if (chip->irq >= 0) {
795                 free_irq(chip->irq, chip);
796                 chip->irq = -1;
797         }
798 
799         if (chip->msi)
800                 pci_disable_msi(chip->pci);
801         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
802                 hda_display_power(hda, false);
803         return 0;
804 }
805 
806 static int azx_resume(struct device *dev)
807 {
808         struct pci_dev *pci = to_pci_dev(dev);
809         struct snd_card *card = dev_get_drvdata(dev);
810         struct azx *chip;
811         struct hda_intel *hda;
812 
813         if (!card)
814                 return 0;
815 
816         chip = card->private_data;
817         hda = container_of(chip, struct hda_intel, chip);
818         if (chip->disabled || hda->init_failed)
819                 return 0;
820 
821         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
822                 hda_display_power(hda, true);
823                 haswell_set_bclk(hda);
824         }
825         if (chip->msi)
826                 if (pci_enable_msi(pci) < 0)
827                         chip->msi = 0;
828         if (azx_acquire_irq(chip, 1) < 0)
829                 return -EIO;
830         azx_init_pci(chip);
831 
832         azx_init_chip(chip, true);
833 
834         snd_hda_resume(chip->bus);
835         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
836         return 0;
837 }
838 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
839 
840 #ifdef CONFIG_PM
841 static int azx_runtime_suspend(struct device *dev)
842 {
843         struct snd_card *card = dev_get_drvdata(dev);
844         struct azx *chip;
845         struct hda_intel *hda;
846 
847         if (!card)
848                 return 0;
849 
850         chip = card->private_data;
851         hda = container_of(chip, struct hda_intel, chip);
852         if (chip->disabled || hda->init_failed)
853                 return 0;
854 
855         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
856                 return 0;
857 
858         /* enable controller wake up event */
859         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
860                   STATESTS_INT_MASK);
861 
862         azx_stop_chip(chip);
863         azx_enter_link_reset(chip);
864         azx_clear_irq_pending(chip);
865         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
866                 hda_display_power(hda, false);
867 
868         return 0;
869 }
870 
871 static int azx_runtime_resume(struct device *dev)
872 {
873         struct snd_card *card = dev_get_drvdata(dev);
874         struct azx *chip;
875         struct hda_intel *hda;
876         struct hda_bus *bus;
877         struct hda_codec *codec;
878         int status;
879 
880         if (!card)
881                 return 0;
882 
883         chip = card->private_data;
884         hda = container_of(chip, struct hda_intel, chip);
885         if (chip->disabled || hda->init_failed)
886                 return 0;
887 
888         if (!(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
889                 return 0;
890 
891         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
892                 hda_display_power(hda, true);
893                 haswell_set_bclk(hda);
894         }
895 
896         /* Read STATESTS before controller reset */
897         status = azx_readw(chip, STATESTS);
898 
899         azx_init_pci(chip);
900         azx_init_chip(chip, true);
901 
902         bus = chip->bus;
903         if (status && bus) {
904                 list_for_each_entry(codec, &bus->codec_list, list)
905                         if (status & (1 << codec->addr))
906                                 queue_delayed_work(codec->bus->workq,
907                                                    &codec->jackpoll_work, codec->jackpoll_interval);
908         }
909 
910         /* disable controller Wake Up event*/
911         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
912                         ~STATESTS_INT_MASK);
913 
914         return 0;
915 }
916 
917 static int azx_runtime_idle(struct device *dev)
918 {
919         struct snd_card *card = dev_get_drvdata(dev);
920         struct azx *chip;
921         struct hda_intel *hda;
922 
923         if (!card)
924                 return 0;
925 
926         chip = card->private_data;
927         hda = container_of(chip, struct hda_intel, chip);
928         if (chip->disabled || hda->init_failed)
929                 return 0;
930 
931         if (!power_save_controller ||
932             !(chip->driver_caps & AZX_DCAPS_PM_RUNTIME))
933                 return -EBUSY;
934 
935         return 0;
936 }
937 
938 static const struct dev_pm_ops azx_pm = {
939         SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
940         SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
941 };
942 
943 #define AZX_PM_OPS      &azx_pm
944 #else
945 #define AZX_PM_OPS      NULL
946 #endif /* CONFIG_PM */
947 
948 
949 static int azx_probe_continue(struct azx *chip);
950 
951 #ifdef SUPPORT_VGA_SWITCHEROO
952 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
953 
954 static void azx_vs_set_state(struct pci_dev *pci,
955                              enum vga_switcheroo_state state)
956 {
957         struct snd_card *card = pci_get_drvdata(pci);
958         struct azx *chip = card->private_data;
959         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
960         bool disabled;
961 
962         wait_for_completion(&hda->probe_wait);
963         if (hda->init_failed)
964                 return;
965 
966         disabled = (state == VGA_SWITCHEROO_OFF);
967         if (chip->disabled == disabled)
968                 return;
969 
970         if (!chip->bus) {
971                 chip->disabled = disabled;
972                 if (!disabled) {
973                         dev_info(chip->card->dev,
974                                  "Start delayed initialization\n");
975                         if (azx_probe_continue(chip) < 0) {
976                                 dev_err(chip->card->dev, "initialization error\n");
977                                 hda->init_failed = true;
978                         }
979                 }
980         } else {
981                 dev_info(chip->card->dev, "%s via VGA-switcheroo\n",
982                          disabled ? "Disabling" : "Enabling");
983                 if (disabled) {
984                         pm_runtime_put_sync_suspend(card->dev);
985                         azx_suspend(card->dev);
986                         /* when we get suspended by vga switcheroo we end up in D3cold,
987                          * however we have no ACPI handle, so pci/acpi can't put us there,
988                          * put ourselves there */
989                         pci->current_state = PCI_D3cold;
990                         chip->disabled = true;
991                         if (snd_hda_lock_devices(chip->bus))
992                                 dev_warn(chip->card->dev,
993                                          "Cannot lock devices!\n");
994                 } else {
995                         snd_hda_unlock_devices(chip->bus);
996                         pm_runtime_get_noresume(card->dev);
997                         chip->disabled = false;
998                         azx_resume(card->dev);
999                 }
1000         }
1001 }
1002 
1003 static bool azx_vs_can_switch(struct pci_dev *pci)
1004 {
1005         struct snd_card *card = pci_get_drvdata(pci);
1006         struct azx *chip = card->private_data;
1007         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1008 
1009         wait_for_completion(&hda->probe_wait);
1010         if (hda->init_failed)
1011                 return false;
1012         if (chip->disabled || !chip->bus)
1013                 return true;
1014         if (snd_hda_lock_devices(chip->bus))
1015                 return false;
1016         snd_hda_unlock_devices(chip->bus);
1017         return true;
1018 }
1019 
1020 static void init_vga_switcheroo(struct azx *chip)
1021 {
1022         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1023         struct pci_dev *p = get_bound_vga(chip->pci);
1024         if (p) {
1025                 dev_info(chip->card->dev,
1026                          "Handle VGA-switcheroo audio client\n");
1027                 hda->use_vga_switcheroo = 1;
1028                 pci_dev_put(p);
1029         }
1030 }
1031 
1032 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1033         .set_gpu_state = azx_vs_set_state,
1034         .can_switch = azx_vs_can_switch,
1035 };
1036 
1037 static int register_vga_switcheroo(struct azx *chip)
1038 {
1039         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1040         int err;
1041 
1042         if (!hda->use_vga_switcheroo)
1043                 return 0;
1044         /* FIXME: currently only handling DIS controller
1045          * is there any machine with two switchable HDMI audio controllers?
1046          */
1047         err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1048                                                     VGA_SWITCHEROO_DIS,
1049                                                     chip->bus != NULL);
1050         if (err < 0)
1051                 return err;
1052         hda->vga_switcheroo_registered = 1;
1053 
1054         /* register as an optimus hdmi audio power domain */
1055         vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1056                                                          &hda->hdmi_pm_domain);
1057         return 0;
1058 }
1059 #else
1060 #define init_vga_switcheroo(chip)               /* NOP */
1061 #define register_vga_switcheroo(chip)           0
1062 #define check_hdmi_disabled(pci)        false
1063 #endif /* SUPPORT_VGA_SWITCHER */
1064 
1065 /*
1066  * destructor
1067  */
1068 static int azx_free(struct azx *chip)
1069 {
1070         struct pci_dev *pci = chip->pci;
1071         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1072         int i;
1073 
1074         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME)
1075                         && chip->running)
1076                 pm_runtime_get_noresume(&pci->dev);
1077 
1078         azx_del_card_list(chip);
1079 
1080         azx_notifier_unregister(chip);
1081 
1082         hda->init_failed = 1; /* to be sure */
1083         complete_all(&hda->probe_wait);
1084 
1085         if (use_vga_switcheroo(hda)) {
1086                 if (chip->disabled && chip->bus)
1087                         snd_hda_unlock_devices(chip->bus);
1088                 if (hda->vga_switcheroo_registered)
1089                         vga_switcheroo_unregister_client(chip->pci);
1090         }
1091 
1092         if (chip->initialized) {
1093                 azx_clear_irq_pending(chip);
1094                 for (i = 0; i < chip->num_streams; i++)
1095                         azx_stream_stop(chip, &chip->azx_dev[i]);
1096                 azx_stop_chip(chip);
1097         }
1098 
1099         if (chip->irq >= 0)
1100                 free_irq(chip->irq, (void*)chip);
1101         if (chip->msi)
1102                 pci_disable_msi(chip->pci);
1103         iounmap(chip->remap_addr);
1104 
1105         azx_free_stream_pages(chip);
1106         if (chip->region_requested)
1107                 pci_release_regions(chip->pci);
1108         pci_disable_device(chip->pci);
1109         kfree(chip->azx_dev);
1110 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1111         release_firmware(chip->fw);
1112 #endif
1113         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1114                 hda_display_power(hda, false);
1115                 hda_i915_exit(hda);
1116         }
1117         kfree(hda);
1118 
1119         return 0;
1120 }
1121 
1122 static int azx_dev_free(struct snd_device *device)
1123 {
1124         return azx_free(device->device_data);
1125 }
1126 
1127 #ifdef SUPPORT_VGA_SWITCHEROO
1128 /*
1129  * Check of disabled HDMI controller by vga-switcheroo
1130  */
1131 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1132 {
1133         struct pci_dev *p;
1134 
1135         /* check only discrete GPU */
1136         switch (pci->vendor) {
1137         case PCI_VENDOR_ID_ATI:
1138         case PCI_VENDOR_ID_AMD:
1139         case PCI_VENDOR_ID_NVIDIA:
1140                 if (pci->devfn == 1) {
1141                         p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1142                                                         pci->bus->number, 0);
1143                         if (p) {
1144                                 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1145                                         return p;
1146                                 pci_dev_put(p);
1147                         }
1148                 }
1149                 break;
1150         }
1151         return NULL;
1152 }
1153 
1154 static bool check_hdmi_disabled(struct pci_dev *pci)
1155 {
1156         bool vga_inactive = false;
1157         struct pci_dev *p = get_bound_vga(pci);
1158 
1159         if (p) {
1160                 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1161                         vga_inactive = true;
1162                 pci_dev_put(p);
1163         }
1164         return vga_inactive;
1165 }
1166 #endif /* SUPPORT_VGA_SWITCHEROO */
1167 
1168 /*
1169  * white/black-listing for position_fix
1170  */
1171 static struct snd_pci_quirk position_fix_list[] = {
1172         SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1173         SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1174         SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1175         SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1176         SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1177         SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1178         SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1179         SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1180         SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1181         SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1182         SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1183         SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1184         SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1185         SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1186         {}
1187 };
1188 
1189 static int check_position_fix(struct azx *chip, int fix)
1190 {
1191         const struct snd_pci_quirk *q;
1192 
1193         switch (fix) {
1194         case POS_FIX_AUTO:
1195         case POS_FIX_LPIB:
1196         case POS_FIX_POSBUF:
1197         case POS_FIX_VIACOMBO:
1198         case POS_FIX_COMBO:
1199                 return fix;
1200         }
1201 
1202         q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1203         if (q) {
1204                 dev_info(chip->card->dev,
1205                          "position_fix set to %d for device %04x:%04x\n",
1206                          q->value, q->subvendor, q->subdevice);
1207                 return q->value;
1208         }
1209 
1210         /* Check VIA/ATI HD Audio Controller exist */
1211         if (chip->driver_caps & AZX_DCAPS_POSFIX_VIA) {
1212                 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1213                 return POS_FIX_VIACOMBO;
1214         }
1215         if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1216                 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1217                 return POS_FIX_LPIB;
1218         }
1219         return POS_FIX_AUTO;
1220 }
1221 
1222 static void assign_position_fix(struct azx *chip, int fix)
1223 {
1224         static azx_get_pos_callback_t callbacks[] = {
1225                 [POS_FIX_AUTO] = NULL,
1226                 [POS_FIX_LPIB] = azx_get_pos_lpib,
1227                 [POS_FIX_POSBUF] = azx_get_pos_posbuf,
1228                 [POS_FIX_VIACOMBO] = azx_via_get_position,
1229                 [POS_FIX_COMBO] = azx_get_pos_lpib,
1230         };
1231 
1232         chip->get_position[0] = chip->get_position[1] = callbacks[fix];
1233 
1234         /* combo mode uses LPIB only for playback */
1235         if (fix == POS_FIX_COMBO)
1236                 chip->get_position[1] = NULL;
1237 
1238         if (fix == POS_FIX_POSBUF &&
1239             (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
1240                 chip->get_delay[0] = chip->get_delay[1] =
1241                         azx_get_delay_from_lpib;
1242         }
1243 
1244 }
1245 
1246 /*
1247  * black-lists for probe_mask
1248  */
1249 static struct snd_pci_quirk probe_mask_list[] = {
1250         /* Thinkpad often breaks the controller communication when accessing
1251          * to the non-working (or non-existing) modem codec slot.
1252          */
1253         SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1254         SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1255         SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1256         /* broken BIOS */
1257         SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1258         /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1259         SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1260         /* forced codec slots */
1261         SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1262         SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1263         /* WinFast VP200 H (Teradici) user reported broken communication */
1264         SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1265         {}
1266 };
1267 
1268 #define AZX_FORCE_CODEC_MASK    0x100
1269 
1270 static void check_probe_mask(struct azx *chip, int dev)
1271 {
1272         const struct snd_pci_quirk *q;
1273 
1274         chip->codec_probe_mask = probe_mask[dev];
1275         if (chip->codec_probe_mask == -1) {
1276                 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1277                 if (q) {
1278                         dev_info(chip->card->dev,
1279                                  "probe_mask set to 0x%x for device %04x:%04x\n",
1280                                  q->value, q->subvendor, q->subdevice);
1281                         chip->codec_probe_mask = q->value;
1282                 }
1283         }
1284 
1285         /* check forced option */
1286         if (chip->codec_probe_mask != -1 &&
1287             (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1288                 chip->codec_mask = chip->codec_probe_mask & 0xff;
1289                 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1290                          chip->codec_mask);
1291         }
1292 }
1293 
1294 /*
1295  * white/black-list for enable_msi
1296  */
1297 static struct snd_pci_quirk msi_black_list[] = {
1298         SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1299         SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1300         SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1301         SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1302         SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1303         SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1304         SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1305         SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1306         SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1307         SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1308         {}
1309 };
1310 
1311 static void check_msi(struct azx *chip)
1312 {
1313         const struct snd_pci_quirk *q;
1314 
1315         if (enable_msi >= 0) {
1316                 chip->msi = !!enable_msi;
1317                 return;
1318         }
1319         chip->msi = 1;  /* enable MSI as default */
1320         q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1321         if (q) {
1322                 dev_info(chip->card->dev,
1323                          "msi for device %04x:%04x set to %d\n",
1324                          q->subvendor, q->subdevice, q->value);
1325                 chip->msi = q->value;
1326                 return;
1327         }
1328 
1329         /* NVidia chipsets seem to cause troubles with MSI */
1330         if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1331                 dev_info(chip->card->dev, "Disabling MSI\n");
1332                 chip->msi = 0;
1333         }
1334 }
1335 
1336 /* check the snoop mode availability */
1337 static void azx_check_snoop_available(struct azx *chip)
1338 {
1339         int snoop = hda_snoop;
1340 
1341         if (snoop >= 0) {
1342                 dev_info(chip->card->dev, "Force to %s mode by module option\n",
1343                          snoop ? "snoop" : "non-snoop");
1344                 chip->snoop = snoop;
1345                 return;
1346         }
1347 
1348         snoop = true;
1349         if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
1350             chip->driver_type == AZX_DRIVER_VIA) {
1351                 /* force to non-snoop mode for a new VIA controller
1352                  * when BIOS is set
1353                  */
1354                 u8 val;
1355                 pci_read_config_byte(chip->pci, 0x42, &val);
1356                 if (!(val & 0x80) && chip->pci->revision == 0x30)
1357                         snoop = false;
1358         }
1359 
1360         if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
1361                 snoop = false;
1362 
1363         chip->snoop = snoop;
1364         if (!snoop)
1365                 dev_info(chip->card->dev, "Force to non-snoop mode\n");
1366 }
1367 
1368 static void azx_probe_work(struct work_struct *work)
1369 {
1370         struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1371         azx_probe_continue(&hda->chip);
1372 }
1373 
1374 /*
1375  * constructor
1376  */
1377 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1378                       int dev, unsigned int driver_caps,
1379                       const struct hda_controller_ops *hda_ops,
1380                       struct azx **rchip)
1381 {
1382         static struct snd_device_ops ops = {
1383                 .dev_free = azx_dev_free,
1384         };
1385         struct hda_intel *hda;
1386         struct azx *chip;
1387         int err;
1388 
1389         *rchip = NULL;
1390 
1391         err = pci_enable_device(pci);
1392         if (err < 0)
1393                 return err;
1394 
1395         hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1396         if (!hda) {
1397                 dev_err(card->dev, "Cannot allocate hda\n");
1398                 pci_disable_device(pci);
1399                 return -ENOMEM;
1400         }
1401 
1402         chip = &hda->chip;
1403         spin_lock_init(&chip->reg_lock);
1404         mutex_init(&chip->open_mutex);
1405         chip->card = card;
1406         chip->pci = pci;
1407         chip->ops = hda_ops;
1408         chip->irq = -1;
1409         chip->driver_caps = driver_caps;
1410         chip->driver_type = driver_caps & 0xff;
1411         check_msi(chip);
1412         chip->dev_index = dev;
1413         chip->jackpoll_ms = jackpoll_ms;
1414         INIT_LIST_HEAD(&chip->pcm_list);
1415         INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1416         INIT_LIST_HEAD(&hda->list);
1417         init_vga_switcheroo(chip);
1418         init_completion(&hda->probe_wait);
1419 
1420         assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1421 
1422         check_probe_mask(chip, dev);
1423 
1424         chip->single_cmd = single_cmd;
1425         azx_check_snoop_available(chip);
1426 
1427         if (bdl_pos_adj[dev] < 0) {
1428                 switch (chip->driver_type) {
1429                 case AZX_DRIVER_ICH:
1430                 case AZX_DRIVER_PCH:
1431                         bdl_pos_adj[dev] = 1;
1432                         break;
1433                 default:
1434                         bdl_pos_adj[dev] = 32;
1435                         break;
1436                 }
1437         }
1438         chip->bdl_pos_adj = bdl_pos_adj;
1439 
1440         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1441         if (err < 0) {
1442                 dev_err(card->dev, "Error creating device [card]!\n");
1443                 azx_free(chip);
1444                 return err;
1445         }
1446 
1447         /* continue probing in work context as may trigger request module */
1448         INIT_WORK(&hda->probe_work, azx_probe_work);
1449 
1450         *rchip = chip;
1451 
1452         return 0;
1453 }
1454 
1455 static int azx_first_init(struct azx *chip)
1456 {
1457         int dev = chip->dev_index;
1458         struct pci_dev *pci = chip->pci;
1459         struct snd_card *card = chip->card;
1460         int err;
1461         unsigned short gcap;
1462         unsigned int dma_bits = 64;
1463 
1464 #if BITS_PER_LONG != 64
1465         /* Fix up base address on ULI M5461 */
1466         if (chip->driver_type == AZX_DRIVER_ULI) {
1467                 u16 tmp3;
1468                 pci_read_config_word(pci, 0x40, &tmp3);
1469                 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1470                 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1471         }
1472 #endif
1473 
1474         err = pci_request_regions(pci, "ICH HD audio");
1475         if (err < 0)
1476                 return err;
1477         chip->region_requested = 1;
1478 
1479         chip->addr = pci_resource_start(pci, 0);
1480         chip->remap_addr = pci_ioremap_bar(pci, 0);
1481         if (chip->remap_addr == NULL) {
1482                 dev_err(card->dev, "ioremap error\n");
1483                 return -ENXIO;
1484         }
1485 
1486         if (chip->msi) {
1487                 if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
1488                         dev_dbg(card->dev, "Disabling 64bit MSI\n");
1489                         pci->no_64bit_msi = true;
1490                 }
1491                 if (pci_enable_msi(pci) < 0)
1492                         chip->msi = 0;
1493         }
1494 
1495         if (azx_acquire_irq(chip, 0) < 0)
1496                 return -EBUSY;
1497 
1498         pci_set_master(pci);
1499         synchronize_irq(chip->irq);
1500 
1501         gcap = azx_readw(chip, GCAP);
1502         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1503 
1504         /* AMD devices support 40 or 48bit DMA, take the safe one */
1505         if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
1506                 dma_bits = 40;
1507 
1508         /* disable SB600 64bit support for safety */
1509         if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1510                 struct pci_dev *p_smbus;
1511                 dma_bits = 40;
1512                 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1513                                          PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1514                                          NULL);
1515                 if (p_smbus) {
1516                         if (p_smbus->revision < 0x30)
1517                                 gcap &= ~AZX_GCAP_64OK;
1518                         pci_dev_put(p_smbus);
1519                 }
1520         }
1521 
1522         /* disable 64bit DMA address on some devices */
1523         if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1524                 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1525                 gcap &= ~AZX_GCAP_64OK;
1526         }
1527 
1528         /* disable buffer size rounding to 128-byte multiples if supported */
1529         if (align_buffer_size >= 0)
1530                 chip->align_buffer_size = !!align_buffer_size;
1531         else {
1532                 if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1533                         chip->align_buffer_size = 0;
1534                 else
1535                         chip->align_buffer_size = 1;
1536         }
1537 
1538         /* allow 64bit DMA address if supported by H/W */
1539         if (!(gcap & AZX_GCAP_64OK))
1540                 dma_bits = 32;
1541         if (!pci_set_dma_mask(pci, DMA_BIT_MASK(dma_bits))) {
1542                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(dma_bits));
1543         } else {
1544                 pci_set_dma_mask(pci, DMA_BIT_MASK(32));
1545                 pci_set_consistent_dma_mask(pci, DMA_BIT_MASK(32));
1546         }
1547 
1548         /* read number of streams from GCAP register instead of using
1549          * hardcoded value
1550          */
1551         chip->capture_streams = (gcap >> 8) & 0x0f;
1552         chip->playback_streams = (gcap >> 12) & 0x0f;
1553         if (!chip->playback_streams && !chip->capture_streams) {
1554                 /* gcap didn't give any info, switching to old method */
1555 
1556                 switch (chip->driver_type) {
1557                 case AZX_DRIVER_ULI:
1558                         chip->playback_streams = ULI_NUM_PLAYBACK;
1559                         chip->capture_streams = ULI_NUM_CAPTURE;
1560                         break;
1561                 case AZX_DRIVER_ATIHDMI:
1562                 case AZX_DRIVER_ATIHDMI_NS:
1563                         chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1564                         chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1565                         break;
1566                 case AZX_DRIVER_GENERIC:
1567                 default:
1568                         chip->playback_streams = ICH6_NUM_PLAYBACK;
1569                         chip->capture_streams = ICH6_NUM_CAPTURE;
1570                         break;
1571                 }
1572         }
1573         chip->capture_index_offset = 0;
1574         chip->playback_index_offset = chip->capture_streams;
1575         chip->num_streams = chip->playback_streams + chip->capture_streams;
1576         chip->azx_dev = kcalloc(chip->num_streams, sizeof(*chip->azx_dev),
1577                                 GFP_KERNEL);
1578         if (!chip->azx_dev) {
1579                 dev_err(card->dev, "cannot malloc azx_dev\n");
1580                 return -ENOMEM;
1581         }
1582 
1583         err = azx_alloc_stream_pages(chip);
1584         if (err < 0)
1585                 return err;
1586 
1587         /* initialize streams */
1588         azx_init_stream(chip);
1589 
1590         /* initialize chip */
1591         azx_init_pci(chip);
1592 
1593         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1594                 struct hda_intel *hda;
1595 
1596                 hda = container_of(chip, struct hda_intel, chip);
1597                 haswell_set_bclk(hda);
1598         }
1599 
1600         azx_init_chip(chip, (probe_only[dev] & 2) == 0);
1601 
1602         /* codec detection */
1603         if (!chip->codec_mask) {
1604                 dev_err(card->dev, "no codecs found!\n");
1605                 return -ENODEV;
1606         }
1607 
1608         strcpy(card->driver, "HDA-Intel");
1609         strlcpy(card->shortname, driver_short_names[chip->driver_type],
1610                 sizeof(card->shortname));
1611         snprintf(card->longname, sizeof(card->longname),
1612                  "%s at 0x%lx irq %i",
1613                  card->shortname, chip->addr, chip->irq);
1614 
1615         return 0;
1616 }
1617 
1618 static void power_down_all_codecs(struct azx *chip)
1619 {
1620 #ifdef CONFIG_PM
1621         /* The codecs were powered up in snd_hda_codec_new().
1622          * Now all initialization done, so turn them down if possible
1623          */
1624         struct hda_codec *codec;
1625         list_for_each_entry(codec, &chip->bus->codec_list, list) {
1626                 snd_hda_power_down(codec);
1627         }
1628 #endif
1629 }
1630 
1631 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1632 /* callback from request_firmware_nowait() */
1633 static void azx_firmware_cb(const struct firmware *fw, void *context)
1634 {
1635         struct snd_card *card = context;
1636         struct azx *chip = card->private_data;
1637         struct pci_dev *pci = chip->pci;
1638 
1639         if (!fw) {
1640                 dev_err(card->dev, "Cannot load firmware, aborting\n");
1641                 goto error;
1642         }
1643 
1644         chip->fw = fw;
1645         if (!chip->disabled) {
1646                 /* continue probing */
1647                 if (azx_probe_continue(chip))
1648                         goto error;
1649         }
1650         return; /* OK */
1651 
1652  error:
1653         snd_card_free(card);
1654         pci_set_drvdata(pci, NULL);
1655 }
1656 #endif
1657 
1658 /*
1659  * HDA controller ops.
1660  */
1661 
1662 /* PCI register access. */
1663 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1664 {
1665         writel(value, addr);
1666 }
1667 
1668 static u32 pci_azx_readl(u32 __iomem *addr)
1669 {
1670         return readl(addr);
1671 }
1672 
1673 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1674 {
1675         writew(value, addr);
1676 }
1677 
1678 static u16 pci_azx_readw(u16 __iomem *addr)
1679 {
1680         return readw(addr);
1681 }
1682 
1683 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1684 {
1685         writeb(value, addr);
1686 }
1687 
1688 static u8 pci_azx_readb(u8 __iomem *addr)
1689 {
1690         return readb(addr);
1691 }
1692 
1693 static int disable_msi_reset_irq(struct azx *chip)
1694 {
1695         int err;
1696 
1697         free_irq(chip->irq, chip);
1698         chip->irq = -1;
1699         pci_disable_msi(chip->pci);
1700         chip->msi = 0;
1701         err = azx_acquire_irq(chip, 1);
1702         if (err < 0)
1703                 return err;
1704 
1705         return 0;
1706 }
1707 
1708 /* DMA page allocation helpers.  */
1709 static int dma_alloc_pages(struct azx *chip,
1710                            int type,
1711                            size_t size,
1712                            struct snd_dma_buffer *buf)
1713 {
1714         int err;
1715 
1716         err = snd_dma_alloc_pages(type,
1717                                   chip->card->dev,
1718                                   size, buf);
1719         if (err < 0)
1720                 return err;
1721         mark_pages_wc(chip, buf, true);
1722         return 0;
1723 }
1724 
1725 static void dma_free_pages(struct azx *chip, struct snd_dma_buffer *buf)
1726 {
1727         mark_pages_wc(chip, buf, false);
1728         snd_dma_free_pages(buf);
1729 }
1730 
1731 static int substream_alloc_pages(struct azx *chip,
1732                                  struct snd_pcm_substream *substream,
1733                                  size_t size)
1734 {
1735         struct azx_dev *azx_dev = get_azx_dev(substream);
1736         int ret;
1737 
1738         mark_runtime_wc(chip, azx_dev, substream, false);
1739         azx_dev->bufsize = 0;
1740         azx_dev->period_bytes = 0;
1741         azx_dev->format_val = 0;
1742         ret = snd_pcm_lib_malloc_pages(substream, size);
1743         if (ret < 0)
1744                 return ret;
1745         mark_runtime_wc(chip, azx_dev, substream, true);
1746         return 0;
1747 }
1748 
1749 static int substream_free_pages(struct azx *chip,
1750                                 struct snd_pcm_substream *substream)
1751 {
1752         struct azx_dev *azx_dev = get_azx_dev(substream);
1753         mark_runtime_wc(chip, azx_dev, substream, false);
1754         return snd_pcm_lib_free_pages(substream);
1755 }
1756 
1757 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1758                              struct vm_area_struct *area)
1759 {
1760 #ifdef CONFIG_X86
1761         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1762         struct azx *chip = apcm->chip;
1763         if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1764                 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1765 #endif
1766 }
1767 
1768 static const struct hda_controller_ops pci_hda_ops = {
1769         .reg_writel = pci_azx_writel,
1770         .reg_readl = pci_azx_readl,
1771         .reg_writew = pci_azx_writew,
1772         .reg_readw = pci_azx_readw,
1773         .reg_writeb = pci_azx_writeb,
1774         .reg_readb = pci_azx_readb,
1775         .disable_msi_reset_irq = disable_msi_reset_irq,
1776         .dma_alloc_pages = dma_alloc_pages,
1777         .dma_free_pages = dma_free_pages,
1778         .substream_alloc_pages = substream_alloc_pages,
1779         .substream_free_pages = substream_free_pages,
1780         .pcm_mmap_prepare = pcm_mmap_prepare,
1781         .position_check = azx_position_check,
1782 };
1783 
1784 static int azx_probe(struct pci_dev *pci,
1785                      const struct pci_device_id *pci_id)
1786 {
1787         static int dev;
1788         struct snd_card *card;
1789         struct hda_intel *hda;
1790         struct azx *chip;
1791         bool schedule_probe;
1792         int err;
1793 
1794         if (dev >= SNDRV_CARDS)
1795                 return -ENODEV;
1796         if (!enable[dev]) {
1797                 dev++;
1798                 return -ENOENT;
1799         }
1800 
1801         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1802                            0, &card);
1803         if (err < 0) {
1804                 dev_err(&pci->dev, "Error creating card!\n");
1805                 return err;
1806         }
1807 
1808         err = azx_create(card, pci, dev, pci_id->driver_data,
1809                          &pci_hda_ops, &chip);
1810         if (err < 0)
1811                 goto out_free;
1812         card->private_data = chip;
1813         hda = container_of(chip, struct hda_intel, chip);
1814 
1815         pci_set_drvdata(pci, card);
1816 
1817         err = register_vga_switcheroo(chip);
1818         if (err < 0) {
1819                 dev_err(card->dev, "Error registering VGA-switcheroo client\n");
1820                 goto out_free;
1821         }
1822 
1823         if (check_hdmi_disabled(pci)) {
1824                 dev_info(card->dev, "VGA controller is disabled\n");
1825                 dev_info(card->dev, "Delaying initialization\n");
1826                 chip->disabled = true;
1827         }
1828 
1829         schedule_probe = !chip->disabled;
1830 
1831 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1832         if (patch[dev] && *patch[dev]) {
1833                 dev_info(card->dev, "Applying patch firmware '%s'\n",
1834                          patch[dev]);
1835                 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1836                                               &pci->dev, GFP_KERNEL, card,
1837                                               azx_firmware_cb);
1838                 if (err < 0)
1839                         goto out_free;
1840                 schedule_probe = false; /* continued in azx_firmware_cb() */
1841         }
1842 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
1843 
1844 #ifndef CONFIG_SND_HDA_I915
1845         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1846                 dev_err(card->dev, "Haswell must build in CONFIG_SND_HDA_I915\n");
1847 #endif
1848 
1849         if (schedule_probe)
1850                 schedule_work(&hda->probe_work);
1851 
1852         dev++;
1853         if (chip->disabled)
1854                 complete_all(&hda->probe_wait);
1855         return 0;
1856 
1857 out_free:
1858         snd_card_free(card);
1859         return err;
1860 }
1861 
1862 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
1863 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
1864         [AZX_DRIVER_NVIDIA] = 8,
1865         [AZX_DRIVER_TERA] = 1,
1866 };
1867 
1868 static int azx_probe_continue(struct azx *chip)
1869 {
1870         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1871         struct pci_dev *pci = chip->pci;
1872         int dev = chip->dev_index;
1873         int err;
1874 
1875         /* Request power well for Haswell HDA controller and codec */
1876         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1877 #ifdef CONFIG_SND_HDA_I915
1878                 err = hda_i915_init(hda);
1879                 if (err < 0)
1880                         goto out_free;
1881                 err = hda_display_power(hda, true);
1882                 if (err < 0) {
1883                         dev_err(chip->card->dev,
1884                                 "Cannot turn on display power on i915\n");
1885                         goto out_free;
1886                 }
1887 #endif
1888         }
1889 
1890         err = azx_first_init(chip);
1891         if (err < 0)
1892                 goto out_free;
1893 
1894 #ifdef CONFIG_SND_HDA_INPUT_BEEP
1895         chip->beep_mode = beep_mode[dev];
1896 #endif
1897 
1898         /* create codec instances */
1899         err = azx_codec_create(chip, model[dev],
1900                                azx_max_codecs[chip->driver_type],
1901                                power_save_addr);
1902 
1903         if (err < 0)
1904                 goto out_free;
1905 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1906         if (chip->fw) {
1907                 err = snd_hda_load_patch(chip->bus, chip->fw->size,
1908                                          chip->fw->data);
1909                 if (err < 0)
1910                         goto out_free;
1911 #ifndef CONFIG_PM
1912                 release_firmware(chip->fw); /* no longer needed */
1913                 chip->fw = NULL;
1914 #endif
1915         }
1916 #endif
1917         if ((probe_only[dev] & 1) == 0) {
1918                 err = azx_codec_configure(chip);
1919                 if (err < 0)
1920                         goto out_free;
1921         }
1922 
1923         /* create PCM streams */
1924         err = snd_hda_build_pcms(chip->bus);
1925         if (err < 0)
1926                 goto out_free;
1927 
1928         /* create mixer controls */
1929         err = azx_mixer_create(chip);
1930         if (err < 0)
1931                 goto out_free;
1932 
1933         err = snd_card_register(chip->card);
1934         if (err < 0)
1935                 goto out_free;
1936 
1937         chip->running = 1;
1938         power_down_all_codecs(chip);
1939         azx_notifier_register(chip);
1940         azx_add_card_list(chip);
1941         if ((chip->driver_caps & AZX_DCAPS_PM_RUNTIME) || hda->use_vga_switcheroo)
1942                 pm_runtime_put_noidle(&pci->dev);
1943 
1944 out_free:
1945         if (err < 0)
1946                 hda->init_failed = 1;
1947         complete_all(&hda->probe_wait);
1948         return err;
1949 }
1950 
1951 static void azx_remove(struct pci_dev *pci)
1952 {
1953         struct snd_card *card = pci_get_drvdata(pci);
1954 
1955         if (card)
1956                 snd_card_free(card);
1957 }
1958 
1959 /* PCI IDs */
1960 static const struct pci_device_id azx_ids[] = {
1961         /* CPT */
1962         { PCI_DEVICE(0x8086, 0x1c20),
1963           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1964         /* PBG */
1965         { PCI_DEVICE(0x8086, 0x1d20),
1966           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1967         /* Panther Point */
1968         { PCI_DEVICE(0x8086, 0x1e20),
1969           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1970         /* Lynx Point */
1971         { PCI_DEVICE(0x8086, 0x8c20),
1972           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1973         /* 9 Series */
1974         { PCI_DEVICE(0x8086, 0x8ca0),
1975           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1976         /* Wellsburg */
1977         { PCI_DEVICE(0x8086, 0x8d20),
1978           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1979         { PCI_DEVICE(0x8086, 0x8d21),
1980           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1981         /* Lynx Point-LP */
1982         { PCI_DEVICE(0x8086, 0x9c20),
1983           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1984         /* Lynx Point-LP */
1985         { PCI_DEVICE(0x8086, 0x9c21),
1986           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1987         /* Wildcat Point-LP */
1988         { PCI_DEVICE(0x8086, 0x9ca0),
1989           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
1990         /* Sunrise Point */
1991         { PCI_DEVICE(0x8086, 0xa170),
1992           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
1993         /* Sunrise Point-LP */
1994         { PCI_DEVICE(0x8086, 0x9d70),
1995           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
1996         /* Haswell */
1997         { PCI_DEVICE(0x8086, 0x0a0c),
1998           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
1999         { PCI_DEVICE(0x8086, 0x0c0c),
2000           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2001         { PCI_DEVICE(0x8086, 0x0d0c),
2002           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2003         /* Broadwell */
2004         { PCI_DEVICE(0x8086, 0x160c),
2005           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2006         /* 5 Series/3400 */
2007         { PCI_DEVICE(0x8086, 0x3b56),
2008           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2009         /* Poulsbo */
2010         { PCI_DEVICE(0x8086, 0x811b),
2011           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2012         /* Oaktrail */
2013         { PCI_DEVICE(0x8086, 0x080a),
2014           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2015         /* BayTrail */
2016         { PCI_DEVICE(0x8086, 0x0f04),
2017           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2018         /* Braswell */
2019         { PCI_DEVICE(0x8086, 0x2284),
2020           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2021         /* ICH6 */
2022         { PCI_DEVICE(0x8086, 0x2668),
2023           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2024         /* ICH7 */
2025         { PCI_DEVICE(0x8086, 0x27d8),
2026           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2027         /* ESB2 */
2028         { PCI_DEVICE(0x8086, 0x269a),
2029           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2030         /* ICH8 */
2031         { PCI_DEVICE(0x8086, 0x284b),
2032           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2033         /* ICH9 */
2034         { PCI_DEVICE(0x8086, 0x293e),
2035           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2036         /* ICH9 */
2037         { PCI_DEVICE(0x8086, 0x293f),
2038           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2039         /* ICH10 */
2040         { PCI_DEVICE(0x8086, 0x3a3e),
2041           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2042         /* ICH10 */
2043         { PCI_DEVICE(0x8086, 0x3a6e),
2044           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2045         /* Generic Intel */
2046         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2047           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2048           .class_mask = 0xffffff,
2049           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2050         /* ATI SB 450/600/700/800/900 */
2051         { PCI_DEVICE(0x1002, 0x437b),
2052           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2053         { PCI_DEVICE(0x1002, 0x4383),
2054           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2055         /* AMD Hudson */
2056         { PCI_DEVICE(0x1022, 0x780d),
2057           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2058         /* ATI HDMI */
2059         { PCI_DEVICE(0x1002, 0x793b),
2060           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2061         { PCI_DEVICE(0x1002, 0x7919),
2062           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2063         { PCI_DEVICE(0x1002, 0x960f),
2064           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2065         { PCI_DEVICE(0x1002, 0x970f),
2066           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2067         { PCI_DEVICE(0x1002, 0xaa00),
2068           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2069         { PCI_DEVICE(0x1002, 0xaa08),
2070           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2071         { PCI_DEVICE(0x1002, 0xaa10),
2072           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2073         { PCI_DEVICE(0x1002, 0xaa18),
2074           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2075         { PCI_DEVICE(0x1002, 0xaa20),
2076           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2077         { PCI_DEVICE(0x1002, 0xaa28),
2078           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2079         { PCI_DEVICE(0x1002, 0xaa30),
2080           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2081         { PCI_DEVICE(0x1002, 0xaa38),
2082           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2083         { PCI_DEVICE(0x1002, 0xaa40),
2084           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2085         { PCI_DEVICE(0x1002, 0xaa48),
2086           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2087         { PCI_DEVICE(0x1002, 0xaa50),
2088           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2089         { PCI_DEVICE(0x1002, 0xaa58),
2090           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2091         { PCI_DEVICE(0x1002, 0xaa60),
2092           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2093         { PCI_DEVICE(0x1002, 0xaa68),
2094           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2095         { PCI_DEVICE(0x1002, 0xaa80),
2096           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2097         { PCI_DEVICE(0x1002, 0xaa88),
2098           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2099         { PCI_DEVICE(0x1002, 0xaa90),
2100           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2101         { PCI_DEVICE(0x1002, 0xaa98),
2102           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2103         { PCI_DEVICE(0x1002, 0x9902),
2104           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2105         { PCI_DEVICE(0x1002, 0xaaa0),
2106           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2107         { PCI_DEVICE(0x1002, 0xaaa8),
2108           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2109         { PCI_DEVICE(0x1002, 0xaab0),
2110           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2111         /* VIA VT8251/VT8237A */
2112         { PCI_DEVICE(0x1106, 0x3288),
2113           .driver_data = AZX_DRIVER_VIA | AZX_DCAPS_POSFIX_VIA },
2114         /* VIA GFX VT7122/VX900 */
2115         { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2116         /* VIA GFX VT6122/VX11 */
2117         { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2118         /* SIS966 */
2119         { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2120         /* ULI M5461 */
2121         { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2122         /* NVIDIA MCP */
2123         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2124           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2125           .class_mask = 0xffffff,
2126           .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2127         /* Teradici */
2128         { PCI_DEVICE(0x6549, 0x1200),
2129           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2130         { PCI_DEVICE(0x6549, 0x2200),
2131           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2132         /* Creative X-Fi (CA0110-IBG) */
2133         /* CTHDA chips */
2134         { PCI_DEVICE(0x1102, 0x0010),
2135           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2136         { PCI_DEVICE(0x1102, 0x0012),
2137           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2138 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2139         /* the following entry conflicts with snd-ctxfi driver,
2140          * as ctxfi driver mutates from HD-audio to native mode with
2141          * a special command sequence.
2142          */
2143         { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2144           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2145           .class_mask = 0xffffff,
2146           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2147           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2148 #else
2149         /* this entry seems still valid -- i.e. without emu20kx chip */
2150         { PCI_DEVICE(0x1102, 0x0009),
2151           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2152           AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB },
2153 #endif
2154         /* CM8888 */
2155         { PCI_DEVICE(0x13f6, 0x5011),
2156           .driver_data = AZX_DRIVER_CMEDIA |
2157           AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2158         /* Vortex86MX */
2159         { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2160         /* VMware HDAudio */
2161         { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2162         /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2163         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2164           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2165           .class_mask = 0xffffff,
2166           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2167         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2168           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2169           .class_mask = 0xffffff,
2170           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2171         { 0, }
2172 };
2173 MODULE_DEVICE_TABLE(pci, azx_ids);
2174 
2175 /* pci_driver definition */
2176 static struct pci_driver azx_driver = {
2177         .name = KBUILD_MODNAME,
2178         .id_table = azx_ids,
2179         .probe = azx_probe,
2180         .remove = azx_remove,
2181         .driver = {
2182                 .pm = AZX_PM_OPS,
2183         },
2184 };
2185 
2186 module_pci_driver(azx_driver);
2187 

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