Version:  2.0.40 2.2.26 2.4.37 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8

Linux/sound/pci/hda/hda_intel.c

  1 /*
  2  *
  3  *  hda_intel.c - Implementation of primary alsa driver code base
  4  *                for Intel HD Audio.
  5  *
  6  *  Copyright(c) 2004 Intel Corporation. All rights reserved.
  7  *
  8  *  Copyright (c) 2004 Takashi Iwai <tiwai@suse.de>
  9  *                     PeiSen Hou <pshou@realtek.com.tw>
 10  *
 11  *  This program is free software; you can redistribute it and/or modify it
 12  *  under the terms of the GNU General Public License as published by the Free
 13  *  Software Foundation; either version 2 of the License, or (at your option)
 14  *  any later version.
 15  *
 16  *  This program is distributed in the hope that it will be useful, but WITHOUT
 17  *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 18  *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 19  *  more details.
 20  *
 21  *  You should have received a copy of the GNU General Public License along with
 22  *  this program; if not, write to the Free Software Foundation, Inc., 59
 23  *  Temple Place - Suite 330, Boston, MA  02111-1307, USA.
 24  *
 25  *  CONTACTS:
 26  *
 27  *  Matt Jared          matt.jared@intel.com
 28  *  Andy Kopp           andy.kopp@intel.com
 29  *  Dan Kogan           dan.d.kogan@intel.com
 30  *
 31  *  CHANGES:
 32  *
 33  *  2004.12.01  Major rewrite by tiwai, merged the work of pshou
 34  * 
 35  */
 36 
 37 #include <linux/delay.h>
 38 #include <linux/interrupt.h>
 39 #include <linux/kernel.h>
 40 #include <linux/module.h>
 41 #include <linux/dma-mapping.h>
 42 #include <linux/moduleparam.h>
 43 #include <linux/init.h>
 44 #include <linux/slab.h>
 45 #include <linux/pci.h>
 46 #include <linux/mutex.h>
 47 #include <linux/io.h>
 48 #include <linux/pm_runtime.h>
 49 #include <linux/clocksource.h>
 50 #include <linux/time.h>
 51 #include <linux/completion.h>
 52 
 53 #ifdef CONFIG_X86
 54 /* for snoop control */
 55 #include <asm/pgtable.h>
 56 #include <asm/cacheflush.h>
 57 #endif
 58 #include <sound/core.h>
 59 #include <sound/initval.h>
 60 #include <sound/hdaudio.h>
 61 #include <sound/hda_i915.h>
 62 #include <linux/vgaarb.h>
 63 #include <linux/vga_switcheroo.h>
 64 #include <linux/firmware.h>
 65 #include "hda_codec.h"
 66 #include "hda_controller.h"
 67 #include "hda_intel.h"
 68 
 69 #define CREATE_TRACE_POINTS
 70 #include "hda_intel_trace.h"
 71 
 72 /* position fix mode */
 73 enum {
 74         POS_FIX_AUTO,
 75         POS_FIX_LPIB,
 76         POS_FIX_POSBUF,
 77         POS_FIX_VIACOMBO,
 78         POS_FIX_COMBO,
 79 };
 80 
 81 /* Defines for ATI HD Audio support in SB450 south bridge */
 82 #define ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR   0x42
 83 #define ATI_SB450_HDAUDIO_ENABLE_SNOOP      0x02
 84 
 85 /* Defines for Nvidia HDA support */
 86 #define NVIDIA_HDA_TRANSREG_ADDR      0x4e
 87 #define NVIDIA_HDA_ENABLE_COHBITS     0x0f
 88 #define NVIDIA_HDA_ISTRM_COH          0x4d
 89 #define NVIDIA_HDA_OSTRM_COH          0x4c
 90 #define NVIDIA_HDA_ENABLE_COHBIT      0x01
 91 
 92 /* Defines for Intel SCH HDA snoop control */
 93 #define INTEL_HDA_CGCTL  0x48
 94 #define INTEL_HDA_CGCTL_MISCBDCGE        (0x1 << 6)
 95 #define INTEL_SCH_HDA_DEVC      0x78
 96 #define INTEL_SCH_HDA_DEVC_NOSNOOP       (0x1<<11)
 97 
 98 /* Define IN stream 0 FIFO size offset in VIA controller */
 99 #define VIA_IN_STREAM0_FIFO_SIZE_OFFSET 0x90
100 /* Define VIA HD Audio Device ID*/
101 #define VIA_HDAC_DEVICE_ID              0x3288
102 
103 /* max number of SDs */
104 /* ICH, ATI and VIA have 4 playback and 4 capture */
105 #define ICH6_NUM_CAPTURE        4
106 #define ICH6_NUM_PLAYBACK       4
107 
108 /* ULI has 6 playback and 5 capture */
109 #define ULI_NUM_CAPTURE         5
110 #define ULI_NUM_PLAYBACK        6
111 
112 /* ATI HDMI may have up to 8 playbacks and 0 capture */
113 #define ATIHDMI_NUM_CAPTURE     0
114 #define ATIHDMI_NUM_PLAYBACK    8
115 
116 /* TERA has 4 playback and 3 capture */
117 #define TERA_NUM_CAPTURE        3
118 #define TERA_NUM_PLAYBACK       4
119 
120 
121 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;
122 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;
123 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;
124 static char *model[SNDRV_CARDS];
125 static int position_fix[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
126 static int bdl_pos_adj[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
127 static int probe_mask[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] = -1};
128 static int probe_only[SNDRV_CARDS];
129 static int jackpoll_ms[SNDRV_CARDS];
130 static bool single_cmd;
131 static int enable_msi = -1;
132 #ifdef CONFIG_SND_HDA_PATCH_LOADER
133 static char *patch[SNDRV_CARDS];
134 #endif
135 #ifdef CONFIG_SND_HDA_INPUT_BEEP
136 static bool beep_mode[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS-1)] =
137                                         CONFIG_SND_HDA_INPUT_BEEP_MODE};
138 #endif
139 
140 module_param_array(index, int, NULL, 0444);
141 MODULE_PARM_DESC(index, "Index value for Intel HD audio interface.");
142 module_param_array(id, charp, NULL, 0444);
143 MODULE_PARM_DESC(id, "ID string for Intel HD audio interface.");
144 module_param_array(enable, bool, NULL, 0444);
145 MODULE_PARM_DESC(enable, "Enable Intel HD audio interface.");
146 module_param_array(model, charp, NULL, 0444);
147 MODULE_PARM_DESC(model, "Use the given board model.");
148 module_param_array(position_fix, int, NULL, 0444);
149 MODULE_PARM_DESC(position_fix, "DMA pointer read method."
150                  "(-1 = system default, 0 = auto, 1 = LPIB, 2 = POSBUF, 3 = VIACOMBO, 4 = COMBO).");
151 module_param_array(bdl_pos_adj, int, NULL, 0644);
152 MODULE_PARM_DESC(bdl_pos_adj, "BDL position adjustment offset.");
153 module_param_array(probe_mask, int, NULL, 0444);
154 MODULE_PARM_DESC(probe_mask, "Bitmask to probe codecs (default = -1).");
155 module_param_array(probe_only, int, NULL, 0444);
156 MODULE_PARM_DESC(probe_only, "Only probing and no codec initialization.");
157 module_param_array(jackpoll_ms, int, NULL, 0444);
158 MODULE_PARM_DESC(jackpoll_ms, "Ms between polling for jack events (default = 0, using unsol events only)");
159 module_param(single_cmd, bool, 0444);
160 MODULE_PARM_DESC(single_cmd, "Use single command to communicate with codecs "
161                  "(for debugging only).");
162 module_param(enable_msi, bint, 0444);
163 MODULE_PARM_DESC(enable_msi, "Enable Message Signaled Interrupt (MSI)");
164 #ifdef CONFIG_SND_HDA_PATCH_LOADER
165 module_param_array(patch, charp, NULL, 0444);
166 MODULE_PARM_DESC(patch, "Patch file for Intel HD audio interface.");
167 #endif
168 #ifdef CONFIG_SND_HDA_INPUT_BEEP
169 module_param_array(beep_mode, bool, NULL, 0444);
170 MODULE_PARM_DESC(beep_mode, "Select HDA Beep registration mode "
171                             "(0=off, 1=on) (default=1).");
172 #endif
173 
174 #ifdef CONFIG_PM
175 static int param_set_xint(const char *val, const struct kernel_param *kp);
176 static const struct kernel_param_ops param_ops_xint = {
177         .set = param_set_xint,
178         .get = param_get_int,
179 };
180 #define param_check_xint param_check_int
181 
182 static int power_save = CONFIG_SND_HDA_POWER_SAVE_DEFAULT;
183 module_param(power_save, xint, 0644);
184 MODULE_PARM_DESC(power_save, "Automatic power-saving timeout "
185                  "(in second, 0 = disable).");
186 
187 /* reset the HD-audio controller in power save mode.
188  * this may give more power-saving, but will take longer time to
189  * wake up.
190  */
191 static bool power_save_controller = 1;
192 module_param(power_save_controller, bool, 0644);
193 MODULE_PARM_DESC(power_save_controller, "Reset controller in power save mode.");
194 #else
195 #define power_save      0
196 #endif /* CONFIG_PM */
197 
198 static int align_buffer_size = -1;
199 module_param(align_buffer_size, bint, 0644);
200 MODULE_PARM_DESC(align_buffer_size,
201                 "Force buffer and period sizes to be multiple of 128 bytes.");
202 
203 #ifdef CONFIG_X86
204 static int hda_snoop = -1;
205 module_param_named(snoop, hda_snoop, bint, 0444);
206 MODULE_PARM_DESC(snoop, "Enable/disable snooping");
207 #else
208 #define hda_snoop               true
209 #endif
210 
211 
212 MODULE_LICENSE("GPL");
213 MODULE_SUPPORTED_DEVICE("{{Intel, ICH6},"
214                          "{Intel, ICH6M},"
215                          "{Intel, ICH7},"
216                          "{Intel, ESB2},"
217                          "{Intel, ICH8},"
218                          "{Intel, ICH9},"
219                          "{Intel, ICH10},"
220                          "{Intel, PCH},"
221                          "{Intel, CPT},"
222                          "{Intel, PPT},"
223                          "{Intel, LPT},"
224                          "{Intel, LPT_LP},"
225                          "{Intel, WPT_LP},"
226                          "{Intel, SPT},"
227                          "{Intel, SPT_LP},"
228                          "{Intel, HPT},"
229                          "{Intel, PBG},"
230                          "{Intel, SCH},"
231                          "{ATI, SB450},"
232                          "{ATI, SB600},"
233                          "{ATI, RS600},"
234                          "{ATI, RS690},"
235                          "{ATI, RS780},"
236                          "{ATI, R600},"
237                          "{ATI, RV630},"
238                          "{ATI, RV610},"
239                          "{ATI, RV670},"
240                          "{ATI, RV635},"
241                          "{ATI, RV620},"
242                          "{ATI, RV770},"
243                          "{VIA, VT8251},"
244                          "{VIA, VT8237A},"
245                          "{SiS, SIS966},"
246                          "{ULI, M5461}}");
247 MODULE_DESCRIPTION("Intel HDA driver");
248 
249 #if defined(CONFIG_PM) && defined(CONFIG_VGA_SWITCHEROO)
250 #if IS_ENABLED(CONFIG_SND_HDA_CODEC_HDMI)
251 #define SUPPORT_VGA_SWITCHEROO
252 #endif
253 #endif
254 
255 
256 /*
257  */
258 
259 /* driver types */
260 enum {
261         AZX_DRIVER_ICH,
262         AZX_DRIVER_PCH,
263         AZX_DRIVER_SCH,
264         AZX_DRIVER_HDMI,
265         AZX_DRIVER_ATI,
266         AZX_DRIVER_ATIHDMI,
267         AZX_DRIVER_ATIHDMI_NS,
268         AZX_DRIVER_VIA,
269         AZX_DRIVER_SIS,
270         AZX_DRIVER_ULI,
271         AZX_DRIVER_NVIDIA,
272         AZX_DRIVER_TERA,
273         AZX_DRIVER_CTX,
274         AZX_DRIVER_CTHDA,
275         AZX_DRIVER_CMEDIA,
276         AZX_DRIVER_GENERIC,
277         AZX_NUM_DRIVERS, /* keep this as last entry */
278 };
279 
280 #define azx_get_snoop_type(chip) \
281         (((chip)->driver_caps & AZX_DCAPS_SNOOP_MASK) >> 10)
282 #define AZX_DCAPS_SNOOP_TYPE(type) ((AZX_SNOOP_TYPE_ ## type) << 10)
283 
284 /* quirks for old Intel chipsets */
285 #define AZX_DCAPS_INTEL_ICH \
286         (AZX_DCAPS_OLD_SSYNC | AZX_DCAPS_NO_ALIGN_BUFSIZE)
287 
288 /* quirks for Intel PCH */
289 #define AZX_DCAPS_INTEL_PCH_BASE \
290         (AZX_DCAPS_NO_ALIGN_BUFSIZE | AZX_DCAPS_COUNT_LPIB_DELAY |\
291          AZX_DCAPS_SNOOP_TYPE(SCH))
292 
293 /* PCH up to IVB; no runtime PM */
294 #define AZX_DCAPS_INTEL_PCH_NOPM \
295         (AZX_DCAPS_INTEL_PCH_BASE)
296 
297 /* PCH for HSW/BDW; with runtime PM */
298 #define AZX_DCAPS_INTEL_PCH \
299         (AZX_DCAPS_INTEL_PCH_BASE | AZX_DCAPS_PM_RUNTIME)
300 
301 /* HSW HDMI */
302 #define AZX_DCAPS_INTEL_HASWELL \
303         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_COUNT_LPIB_DELAY |\
304          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
305          AZX_DCAPS_SNOOP_TYPE(SCH))
306 
307 /* Broadwell HDMI can't use position buffer reliably, force to use LPIB */
308 #define AZX_DCAPS_INTEL_BROADWELL \
309         (/*AZX_DCAPS_ALIGN_BUFSIZE |*/ AZX_DCAPS_POSFIX_LPIB |\
310          AZX_DCAPS_PM_RUNTIME | AZX_DCAPS_I915_POWERWELL |\
311          AZX_DCAPS_SNOOP_TYPE(SCH))
312 
313 #define AZX_DCAPS_INTEL_BAYTRAIL \
314         (AZX_DCAPS_INTEL_PCH_NOPM | AZX_DCAPS_I915_POWERWELL)
315 
316 #define AZX_DCAPS_INTEL_BRASWELL \
317         (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_I915_POWERWELL)
318 
319 #define AZX_DCAPS_INTEL_SKYLAKE \
320         (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
321          AZX_DCAPS_I915_POWERWELL)
322 
323 #define AZX_DCAPS_INTEL_BROXTON \
324         (AZX_DCAPS_INTEL_PCH | AZX_DCAPS_SEPARATE_STREAM_TAG |\
325          AZX_DCAPS_I915_POWERWELL)
326 
327 /* quirks for ATI SB / AMD Hudson */
328 #define AZX_DCAPS_PRESET_ATI_SB \
329         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB |\
330          AZX_DCAPS_SNOOP_TYPE(ATI))
331 
332 /* quirks for ATI/AMD HDMI */
333 #define AZX_DCAPS_PRESET_ATI_HDMI \
334         (AZX_DCAPS_NO_TCSEL | AZX_DCAPS_SYNC_WRITE | AZX_DCAPS_POSFIX_LPIB|\
335          AZX_DCAPS_NO_MSI64)
336 
337 /* quirks for ATI HDMI with snoop off */
338 #define AZX_DCAPS_PRESET_ATI_HDMI_NS \
339         (AZX_DCAPS_PRESET_ATI_HDMI | AZX_DCAPS_SNOOP_OFF)
340 
341 /* quirks for Nvidia */
342 #define AZX_DCAPS_PRESET_NVIDIA \
343         (AZX_DCAPS_NO_MSI | /*AZX_DCAPS_ALIGN_BUFSIZE |*/ \
344          AZX_DCAPS_NO_64BIT | AZX_DCAPS_CORBRP_SELF_CLEAR |\
345          AZX_DCAPS_SNOOP_TYPE(NVIDIA))
346 
347 #define AZX_DCAPS_PRESET_CTHDA \
348         (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB |\
349          AZX_DCAPS_NO_64BIT |\
350          AZX_DCAPS_4K_BDLE_BOUNDARY | AZX_DCAPS_SNOOP_OFF)
351 
352 /*
353  * vga_switcheroo support
354  */
355 #ifdef SUPPORT_VGA_SWITCHEROO
356 #define use_vga_switcheroo(chip)        ((chip)->use_vga_switcheroo)
357 #else
358 #define use_vga_switcheroo(chip)        0
359 #endif
360 
361 #define CONTROLLER_IN_GPU(pci) (((pci)->device == 0x0a0c) || \
362                                         ((pci)->device == 0x0c0c) || \
363                                         ((pci)->device == 0x0d0c) || \
364                                         ((pci)->device == 0x160c))
365 
366 #define IS_SKL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa170)
367 #define IS_SKL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d70)
368 #define IS_KBL(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa171)
369 #define IS_KBL_LP(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x9d71)
370 #define IS_KBL_H(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0xa2f0)
371 #define IS_BXT(pci) ((pci)->vendor == 0x8086 && (pci)->device == 0x5a98)
372 #define IS_SKL_PLUS(pci) (IS_SKL(pci) || IS_SKL_LP(pci) || IS_BXT(pci)) || \
373                         IS_KBL(pci) || IS_KBL_LP(pci) || IS_KBL_H(pci)
374 
375 static char *driver_short_names[] = {
376         [AZX_DRIVER_ICH] = "HDA Intel",
377         [AZX_DRIVER_PCH] = "HDA Intel PCH",
378         [AZX_DRIVER_SCH] = "HDA Intel MID",
379         [AZX_DRIVER_HDMI] = "HDA Intel HDMI",
380         [AZX_DRIVER_ATI] = "HDA ATI SB",
381         [AZX_DRIVER_ATIHDMI] = "HDA ATI HDMI",
382         [AZX_DRIVER_ATIHDMI_NS] = "HDA ATI HDMI",
383         [AZX_DRIVER_VIA] = "HDA VIA VT82xx",
384         [AZX_DRIVER_SIS] = "HDA SIS966",
385         [AZX_DRIVER_ULI] = "HDA ULI M5461",
386         [AZX_DRIVER_NVIDIA] = "HDA NVidia",
387         [AZX_DRIVER_TERA] = "HDA Teradici", 
388         [AZX_DRIVER_CTX] = "HDA Creative", 
389         [AZX_DRIVER_CTHDA] = "HDA Creative",
390         [AZX_DRIVER_CMEDIA] = "HDA C-Media",
391         [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
392 };
393 
394 #ifdef CONFIG_X86
395 static void __mark_pages_wc(struct azx *chip, struct snd_dma_buffer *dmab, bool on)
396 {
397         int pages;
398 
399         if (azx_snoop(chip))
400                 return;
401         if (!dmab || !dmab->area || !dmab->bytes)
402                 return;
403 
404 #ifdef CONFIG_SND_DMA_SGBUF
405         if (dmab->dev.type == SNDRV_DMA_TYPE_DEV_SG) {
406                 struct snd_sg_buf *sgbuf = dmab->private_data;
407                 if (chip->driver_type == AZX_DRIVER_CMEDIA)
408                         return; /* deal with only CORB/RIRB buffers */
409                 if (on)
410                         set_pages_array_wc(sgbuf->page_table, sgbuf->pages);
411                 else
412                         set_pages_array_wb(sgbuf->page_table, sgbuf->pages);
413                 return;
414         }
415 #endif
416 
417         pages = (dmab->bytes + PAGE_SIZE - 1) >> PAGE_SHIFT;
418         if (on)
419                 set_memory_wc((unsigned long)dmab->area, pages);
420         else
421                 set_memory_wb((unsigned long)dmab->area, pages);
422 }
423 
424 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
425                                  bool on)
426 {
427         __mark_pages_wc(chip, buf, on);
428 }
429 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
430                                    struct snd_pcm_substream *substream, bool on)
431 {
432         if (azx_dev->wc_marked != on) {
433                 __mark_pages_wc(chip, snd_pcm_get_dma_buf(substream), on);
434                 azx_dev->wc_marked = on;
435         }
436 }
437 #else
438 /* NOP for other archs */
439 static inline void mark_pages_wc(struct azx *chip, struct snd_dma_buffer *buf,
440                                  bool on)
441 {
442 }
443 static inline void mark_runtime_wc(struct azx *chip, struct azx_dev *azx_dev,
444                                    struct snd_pcm_substream *substream, bool on)
445 {
446 }
447 #endif
448 
449 static int azx_acquire_irq(struct azx *chip, int do_disconnect);
450 
451 /*
452  * initialize the PCI registers
453  */
454 /* update bits in a PCI register byte */
455 static void update_pci_byte(struct pci_dev *pci, unsigned int reg,
456                             unsigned char mask, unsigned char val)
457 {
458         unsigned char data;
459 
460         pci_read_config_byte(pci, reg, &data);
461         data &= ~mask;
462         data |= (val & mask);
463         pci_write_config_byte(pci, reg, data);
464 }
465 
466 static void azx_init_pci(struct azx *chip)
467 {
468         int snoop_type = azx_get_snoop_type(chip);
469 
470         /* Clear bits 0-2 of PCI register TCSEL (at offset 0x44)
471          * TCSEL == Traffic Class Select Register, which sets PCI express QOS
472          * Ensuring these bits are 0 clears playback static on some HD Audio
473          * codecs.
474          * The PCI register TCSEL is defined in the Intel manuals.
475          */
476         if (!(chip->driver_caps & AZX_DCAPS_NO_TCSEL)) {
477                 dev_dbg(chip->card->dev, "Clearing TCSEL\n");
478                 update_pci_byte(chip->pci, AZX_PCIREG_TCSEL, 0x07, 0);
479         }
480 
481         /* For ATI SB450/600/700/800/900 and AMD Hudson azalia HD audio,
482          * we need to enable snoop.
483          */
484         if (snoop_type == AZX_SNOOP_TYPE_ATI) {
485                 dev_dbg(chip->card->dev, "Setting ATI snoop: %d\n",
486                         azx_snoop(chip));
487                 update_pci_byte(chip->pci,
488                                 ATI_SB450_HDAUDIO_MISC_CNTR2_ADDR, 0x07,
489                                 azx_snoop(chip) ? ATI_SB450_HDAUDIO_ENABLE_SNOOP : 0);
490         }
491 
492         /* For NVIDIA HDA, enable snoop */
493         if (snoop_type == AZX_SNOOP_TYPE_NVIDIA) {
494                 dev_dbg(chip->card->dev, "Setting Nvidia snoop: %d\n",
495                         azx_snoop(chip));
496                 update_pci_byte(chip->pci,
497                                 NVIDIA_HDA_TRANSREG_ADDR,
498                                 0x0f, NVIDIA_HDA_ENABLE_COHBITS);
499                 update_pci_byte(chip->pci,
500                                 NVIDIA_HDA_ISTRM_COH,
501                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
502                 update_pci_byte(chip->pci,
503                                 NVIDIA_HDA_OSTRM_COH,
504                                 0x01, NVIDIA_HDA_ENABLE_COHBIT);
505         }
506 
507         /* Enable SCH/PCH snoop if needed */
508         if (snoop_type == AZX_SNOOP_TYPE_SCH) {
509                 unsigned short snoop;
510                 pci_read_config_word(chip->pci, INTEL_SCH_HDA_DEVC, &snoop);
511                 if ((!azx_snoop(chip) && !(snoop & INTEL_SCH_HDA_DEVC_NOSNOOP)) ||
512                     (azx_snoop(chip) && (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP))) {
513                         snoop &= ~INTEL_SCH_HDA_DEVC_NOSNOOP;
514                         if (!azx_snoop(chip))
515                                 snoop |= INTEL_SCH_HDA_DEVC_NOSNOOP;
516                         pci_write_config_word(chip->pci, INTEL_SCH_HDA_DEVC, snoop);
517                         pci_read_config_word(chip->pci,
518                                 INTEL_SCH_HDA_DEVC, &snoop);
519                 }
520                 dev_dbg(chip->card->dev, "SCH snoop: %s\n",
521                         (snoop & INTEL_SCH_HDA_DEVC_NOSNOOP) ?
522                         "Disabled" : "Enabled");
523         }
524 }
525 
526 /*
527  * In BXT-P A0, HD-Audio DMA requests is later than expected,
528  * and makes an audio stream sensitive to system latencies when
529  * 24/32 bits are playing.
530  * Adjusting threshold of DMA fifo to force the DMA request
531  * sooner to improve latency tolerance at the expense of power.
532  */
533 static void bxt_reduce_dma_latency(struct azx *chip)
534 {
535         u32 val;
536 
537         val = azx_readl(chip, SKL_EM4L);
538         val &= (0x3 << 20);
539         azx_writel(chip, SKL_EM4L, val);
540 }
541 
542 static void hda_intel_init_chip(struct azx *chip, bool full_reset)
543 {
544         struct hdac_bus *bus = azx_bus(chip);
545         struct pci_dev *pci = chip->pci;
546         u32 val;
547 
548         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
549                 snd_hdac_set_codec_wakeup(bus, true);
550         if (IS_SKL_PLUS(pci)) {
551                 pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
552                 val = val & ~INTEL_HDA_CGCTL_MISCBDCGE;
553                 pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
554         }
555         azx_init_chip(chip, full_reset);
556         if (IS_SKL_PLUS(pci)) {
557                 pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
558                 val = val | INTEL_HDA_CGCTL_MISCBDCGE;
559                 pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
560         }
561         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
562                 snd_hdac_set_codec_wakeup(bus, false);
563 
564         /* reduce dma latency to avoid noise */
565         if (IS_BXT(pci))
566                 bxt_reduce_dma_latency(chip);
567 }
568 
569 /* calculate runtime delay from LPIB */
570 static int azx_get_delay_from_lpib(struct azx *chip, struct azx_dev *azx_dev,
571                                    unsigned int pos)
572 {
573         struct snd_pcm_substream *substream = azx_dev->core.substream;
574         int stream = substream->stream;
575         unsigned int lpib_pos = azx_get_pos_lpib(chip, azx_dev);
576         int delay;
577 
578         if (stream == SNDRV_PCM_STREAM_PLAYBACK)
579                 delay = pos - lpib_pos;
580         else
581                 delay = lpib_pos - pos;
582         if (delay < 0) {
583                 if (delay >= azx_dev->core.delay_negative_threshold)
584                         delay = 0;
585                 else
586                         delay += azx_dev->core.bufsize;
587         }
588 
589         if (delay >= azx_dev->core.period_bytes) {
590                 dev_info(chip->card->dev,
591                          "Unstable LPIB (%d >= %d); disabling LPIB delay counting\n",
592                          delay, azx_dev->core.period_bytes);
593                 delay = 0;
594                 chip->driver_caps &= ~AZX_DCAPS_COUNT_LPIB_DELAY;
595                 chip->get_delay[stream] = NULL;
596         }
597 
598         return bytes_to_frames(substream->runtime, delay);
599 }
600 
601 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev);
602 
603 /* called from IRQ */
604 static int azx_position_check(struct azx *chip, struct azx_dev *azx_dev)
605 {
606         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
607         int ok;
608 
609         ok = azx_position_ok(chip, azx_dev);
610         if (ok == 1) {
611                 azx_dev->irq_pending = 0;
612                 return ok;
613         } else if (ok == 0) {
614                 /* bogus IRQ, process it later */
615                 azx_dev->irq_pending = 1;
616                 schedule_work(&hda->irq_pending_work);
617         }
618         return 0;
619 }
620 
621 /* Enable/disable i915 display power for the link */
622 static int azx_intel_link_power(struct azx *chip, bool enable)
623 {
624         struct hdac_bus *bus = azx_bus(chip);
625 
626         return snd_hdac_display_power(bus, enable);
627 }
628 
629 /*
630  * Check whether the current DMA position is acceptable for updating
631  * periods.  Returns non-zero if it's OK.
632  *
633  * Many HD-audio controllers appear pretty inaccurate about
634  * the update-IRQ timing.  The IRQ is issued before actually the
635  * data is processed.  So, we need to process it afterwords in a
636  * workqueue.
637  */
638 static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev)
639 {
640         struct snd_pcm_substream *substream = azx_dev->core.substream;
641         int stream = substream->stream;
642         u32 wallclk;
643         unsigned int pos;
644 
645         wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk;
646         if (wallclk < (azx_dev->core.period_wallclk * 2) / 3)
647                 return -1;      /* bogus (too early) interrupt */
648 
649         if (chip->get_position[stream])
650                 pos = chip->get_position[stream](chip, azx_dev);
651         else { /* use the position buffer as default */
652                 pos = azx_get_pos_posbuf(chip, azx_dev);
653                 if (!pos || pos == (u32)-1) {
654                         dev_info(chip->card->dev,
655                                  "Invalid position buffer, using LPIB read method instead.\n");
656                         chip->get_position[stream] = azx_get_pos_lpib;
657                         if (chip->get_position[0] == azx_get_pos_lpib &&
658                             chip->get_position[1] == azx_get_pos_lpib)
659                                 azx_bus(chip)->use_posbuf = false;
660                         pos = azx_get_pos_lpib(chip, azx_dev);
661                         chip->get_delay[stream] = NULL;
662                 } else {
663                         chip->get_position[stream] = azx_get_pos_posbuf;
664                         if (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)
665                                 chip->get_delay[stream] = azx_get_delay_from_lpib;
666                 }
667         }
668 
669         if (pos >= azx_dev->core.bufsize)
670                 pos = 0;
671 
672         if (WARN_ONCE(!azx_dev->core.period_bytes,
673                       "hda-intel: zero azx_dev->period_bytes"))
674                 return -1; /* this shouldn't happen! */
675         if (wallclk < (azx_dev->core.period_wallclk * 5) / 4 &&
676             pos % azx_dev->core.period_bytes > azx_dev->core.period_bytes / 2)
677                 /* NG - it's below the first next period boundary */
678                 return chip->bdl_pos_adj ? 0 : -1;
679         azx_dev->core.start_wallclk += wallclk;
680         return 1; /* OK, it's fine */
681 }
682 
683 /*
684  * The work for pending PCM period updates.
685  */
686 static void azx_irq_pending_work(struct work_struct *work)
687 {
688         struct hda_intel *hda = container_of(work, struct hda_intel, irq_pending_work);
689         struct azx *chip = &hda->chip;
690         struct hdac_bus *bus = azx_bus(chip);
691         struct hdac_stream *s;
692         int pending, ok;
693 
694         if (!hda->irq_pending_warned) {
695                 dev_info(chip->card->dev,
696                          "IRQ timing workaround is activated for card #%d. Suggest a bigger bdl_pos_adj.\n",
697                          chip->card->number);
698                 hda->irq_pending_warned = 1;
699         }
700 
701         for (;;) {
702                 pending = 0;
703                 spin_lock_irq(&bus->reg_lock);
704                 list_for_each_entry(s, &bus->stream_list, list) {
705                         struct azx_dev *azx_dev = stream_to_azx_dev(s);
706                         if (!azx_dev->irq_pending ||
707                             !s->substream ||
708                             !s->running)
709                                 continue;
710                         ok = azx_position_ok(chip, azx_dev);
711                         if (ok > 0) {
712                                 azx_dev->irq_pending = 0;
713                                 spin_unlock(&bus->reg_lock);
714                                 snd_pcm_period_elapsed(s->substream);
715                                 spin_lock(&bus->reg_lock);
716                         } else if (ok < 0) {
717                                 pending = 0;    /* too early */
718                         } else
719                                 pending++;
720                 }
721                 spin_unlock_irq(&bus->reg_lock);
722                 if (!pending)
723                         return;
724                 msleep(1);
725         }
726 }
727 
728 /* clear irq_pending flags and assure no on-going workq */
729 static void azx_clear_irq_pending(struct azx *chip)
730 {
731         struct hdac_bus *bus = azx_bus(chip);
732         struct hdac_stream *s;
733 
734         spin_lock_irq(&bus->reg_lock);
735         list_for_each_entry(s, &bus->stream_list, list) {
736                 struct azx_dev *azx_dev = stream_to_azx_dev(s);
737                 azx_dev->irq_pending = 0;
738         }
739         spin_unlock_irq(&bus->reg_lock);
740 }
741 
742 static int azx_acquire_irq(struct azx *chip, int do_disconnect)
743 {
744         struct hdac_bus *bus = azx_bus(chip);
745 
746         if (request_irq(chip->pci->irq, azx_interrupt,
747                         chip->msi ? 0 : IRQF_SHARED,
748                         chip->card->irq_descr, chip)) {
749                 dev_err(chip->card->dev,
750                         "unable to grab IRQ %d, disabling device\n",
751                         chip->pci->irq);
752                 if (do_disconnect)
753                         snd_card_disconnect(chip->card);
754                 return -1;
755         }
756         bus->irq = chip->pci->irq;
757         pci_intx(chip->pci, !chip->msi);
758         return 0;
759 }
760 
761 /* get the current DMA position with correction on VIA chips */
762 static unsigned int azx_via_get_position(struct azx *chip,
763                                          struct azx_dev *azx_dev)
764 {
765         unsigned int link_pos, mini_pos, bound_pos;
766         unsigned int mod_link_pos, mod_dma_pos, mod_mini_pos;
767         unsigned int fifo_size;
768 
769         link_pos = snd_hdac_stream_get_pos_lpib(azx_stream(azx_dev));
770         if (azx_dev->core.substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
771                 /* Playback, no problem using link position */
772                 return link_pos;
773         }
774 
775         /* Capture */
776         /* For new chipset,
777          * use mod to get the DMA position just like old chipset
778          */
779         mod_dma_pos = le32_to_cpu(*azx_dev->core.posbuf);
780         mod_dma_pos %= azx_dev->core.period_bytes;
781 
782         /* azx_dev->fifo_size can't get FIFO size of in stream.
783          * Get from base address + offset.
784          */
785         fifo_size = readw(azx_bus(chip)->remap_addr +
786                           VIA_IN_STREAM0_FIFO_SIZE_OFFSET);
787 
788         if (azx_dev->insufficient) {
789                 /* Link position never gather than FIFO size */
790                 if (link_pos <= fifo_size)
791                         return 0;
792 
793                 azx_dev->insufficient = 0;
794         }
795 
796         if (link_pos <= fifo_size)
797                 mini_pos = azx_dev->core.bufsize + link_pos - fifo_size;
798         else
799                 mini_pos = link_pos - fifo_size;
800 
801         /* Find nearest previous boudary */
802         mod_mini_pos = mini_pos % azx_dev->core.period_bytes;
803         mod_link_pos = link_pos % azx_dev->core.period_bytes;
804         if (mod_link_pos >= fifo_size)
805                 bound_pos = link_pos - mod_link_pos;
806         else if (mod_dma_pos >= mod_mini_pos)
807                 bound_pos = mini_pos - mod_mini_pos;
808         else {
809                 bound_pos = mini_pos - mod_mini_pos + azx_dev->core.period_bytes;
810                 if (bound_pos >= azx_dev->core.bufsize)
811                         bound_pos = 0;
812         }
813 
814         /* Calculate real DMA position we want */
815         return bound_pos + mod_dma_pos;
816 }
817 
818 #ifdef CONFIG_PM
819 static DEFINE_MUTEX(card_list_lock);
820 static LIST_HEAD(card_list);
821 
822 static void azx_add_card_list(struct azx *chip)
823 {
824         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
825         mutex_lock(&card_list_lock);
826         list_add(&hda->list, &card_list);
827         mutex_unlock(&card_list_lock);
828 }
829 
830 static void azx_del_card_list(struct azx *chip)
831 {
832         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
833         mutex_lock(&card_list_lock);
834         list_del_init(&hda->list);
835         mutex_unlock(&card_list_lock);
836 }
837 
838 /* trigger power-save check at writing parameter */
839 static int param_set_xint(const char *val, const struct kernel_param *kp)
840 {
841         struct hda_intel *hda;
842         struct azx *chip;
843         int prev = power_save;
844         int ret = param_set_int(val, kp);
845 
846         if (ret || prev == power_save)
847                 return ret;
848 
849         mutex_lock(&card_list_lock);
850         list_for_each_entry(hda, &card_list, list) {
851                 chip = &hda->chip;
852                 if (!hda->probe_continued || chip->disabled)
853                         continue;
854                 snd_hda_set_power_save(&chip->bus, power_save * 1000);
855         }
856         mutex_unlock(&card_list_lock);
857         return 0;
858 }
859 #else
860 #define azx_add_card_list(chip) /* NOP */
861 #define azx_del_card_list(chip) /* NOP */
862 #endif /* CONFIG_PM */
863 
864 #if defined(CONFIG_PM_SLEEP) || defined(SUPPORT_VGA_SWITCHEROO)
865 /*
866  * power management
867  */
868 static int azx_suspend(struct device *dev)
869 {
870         struct snd_card *card = dev_get_drvdata(dev);
871         struct azx *chip;
872         struct hda_intel *hda;
873         struct hdac_bus *bus;
874 
875         if (!card)
876                 return 0;
877 
878         chip = card->private_data;
879         hda = container_of(chip, struct hda_intel, chip);
880         if (chip->disabled || hda->init_failed || !chip->running)
881                 return 0;
882 
883         bus = azx_bus(chip);
884         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
885         azx_clear_irq_pending(chip);
886         azx_stop_chip(chip);
887         azx_enter_link_reset(chip);
888         if (bus->irq >= 0) {
889                 free_irq(bus->irq, chip);
890                 bus->irq = -1;
891         }
892 
893         if (chip->msi)
894                 pci_disable_msi(chip->pci);
895         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
896                 && hda->need_i915_power)
897                 snd_hdac_display_power(bus, false);
898 
899         trace_azx_suspend(chip);
900         return 0;
901 }
902 
903 static int azx_resume(struct device *dev)
904 {
905         struct pci_dev *pci = to_pci_dev(dev);
906         struct snd_card *card = dev_get_drvdata(dev);
907         struct azx *chip;
908         struct hda_intel *hda;
909         struct hdac_bus *bus;
910 
911         if (!card)
912                 return 0;
913 
914         chip = card->private_data;
915         hda = container_of(chip, struct hda_intel, chip);
916         bus = azx_bus(chip);
917         if (chip->disabled || hda->init_failed || !chip->running)
918                 return 0;
919 
920         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
921                 snd_hdac_display_power(bus, true);
922                 if (hda->need_i915_power)
923                         snd_hdac_i915_set_bclk(bus);
924         }
925 
926         if (chip->msi)
927                 if (pci_enable_msi(pci) < 0)
928                         chip->msi = 0;
929         if (azx_acquire_irq(chip, 1) < 0)
930                 return -EIO;
931         azx_init_pci(chip);
932 
933         hda_intel_init_chip(chip, true);
934 
935         /* power down again for link-controlled chips */
936         if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
937             !hda->need_i915_power)
938                 snd_hdac_display_power(bus, false);
939 
940         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
941 
942         trace_azx_resume(chip);
943         return 0;
944 }
945 #endif /* CONFIG_PM_SLEEP || SUPPORT_VGA_SWITCHEROO */
946 
947 #ifdef CONFIG_PM_SLEEP
948 /* put codec down to D3 at hibernation for Intel SKL+;
949  * otherwise BIOS may still access the codec and screw up the driver
950  */
951 static int azx_freeze_noirq(struct device *dev)
952 {
953         struct pci_dev *pci = to_pci_dev(dev);
954 
955         if (IS_SKL_PLUS(pci))
956                 pci_set_power_state(pci, PCI_D3hot);
957 
958         return 0;
959 }
960 
961 static int azx_thaw_noirq(struct device *dev)
962 {
963         struct pci_dev *pci = to_pci_dev(dev);
964 
965         if (IS_SKL_PLUS(pci))
966                 pci_set_power_state(pci, PCI_D0);
967 
968         return 0;
969 }
970 #endif /* CONFIG_PM_SLEEP */
971 
972 #ifdef CONFIG_PM
973 static int azx_runtime_suspend(struct device *dev)
974 {
975         struct snd_card *card = dev_get_drvdata(dev);
976         struct azx *chip;
977         struct hda_intel *hda;
978 
979         if (!card)
980                 return 0;
981 
982         chip = card->private_data;
983         hda = container_of(chip, struct hda_intel, chip);
984         if (chip->disabled || hda->init_failed)
985                 return 0;
986 
987         if (!azx_has_pm_runtime(chip))
988                 return 0;
989 
990         /* enable controller wake up event */
991         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) |
992                   STATESTS_INT_MASK);
993 
994         azx_stop_chip(chip);
995         azx_enter_link_reset(chip);
996         azx_clear_irq_pending(chip);
997         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
998                 && hda->need_i915_power)
999                 snd_hdac_display_power(azx_bus(chip), false);
1000 
1001         trace_azx_runtime_suspend(chip);
1002         return 0;
1003 }
1004 
1005 static int azx_runtime_resume(struct device *dev)
1006 {
1007         struct snd_card *card = dev_get_drvdata(dev);
1008         struct azx *chip;
1009         struct hda_intel *hda;
1010         struct hdac_bus *bus;
1011         struct hda_codec *codec;
1012         int status;
1013 
1014         if (!card)
1015                 return 0;
1016 
1017         chip = card->private_data;
1018         hda = container_of(chip, struct hda_intel, chip);
1019         bus = azx_bus(chip);
1020         if (chip->disabled || hda->init_failed)
1021                 return 0;
1022 
1023         if (!azx_has_pm_runtime(chip))
1024                 return 0;
1025 
1026         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1027                 snd_hdac_display_power(bus, true);
1028                 if (hda->need_i915_power)
1029                         snd_hdac_i915_set_bclk(bus);
1030         }
1031 
1032         /* Read STATESTS before controller reset */
1033         status = azx_readw(chip, STATESTS);
1034 
1035         azx_init_pci(chip);
1036         hda_intel_init_chip(chip, true);
1037 
1038         if (status) {
1039                 list_for_each_codec(codec, &chip->bus)
1040                         if (status & (1 << codec->addr))
1041                                 schedule_delayed_work(&codec->jackpoll_work,
1042                                                       codec->jackpoll_interval);
1043         }
1044 
1045         /* disable controller Wake Up event*/
1046         azx_writew(chip, WAKEEN, azx_readw(chip, WAKEEN) &
1047                         ~STATESTS_INT_MASK);
1048 
1049         /* power down again for link-controlled chips */
1050         if ((chip->driver_caps & AZX_DCAPS_I915_POWERWELL) &&
1051             !hda->need_i915_power)
1052                 snd_hdac_display_power(bus, false);
1053 
1054         trace_azx_runtime_resume(chip);
1055         return 0;
1056 }
1057 
1058 static int azx_runtime_idle(struct device *dev)
1059 {
1060         struct snd_card *card = dev_get_drvdata(dev);
1061         struct azx *chip;
1062         struct hda_intel *hda;
1063 
1064         if (!card)
1065                 return 0;
1066 
1067         chip = card->private_data;
1068         hda = container_of(chip, struct hda_intel, chip);
1069         if (chip->disabled || hda->init_failed)
1070                 return 0;
1071 
1072         if (!power_save_controller || !azx_has_pm_runtime(chip) ||
1073             azx_bus(chip)->codec_powered || !chip->running)
1074                 return -EBUSY;
1075 
1076         return 0;
1077 }
1078 
1079 static const struct dev_pm_ops azx_pm = {
1080         SET_SYSTEM_SLEEP_PM_OPS(azx_suspend, azx_resume)
1081 #ifdef CONFIG_PM_SLEEP
1082         .freeze_noirq = azx_freeze_noirq,
1083         .thaw_noirq = azx_thaw_noirq,
1084 #endif
1085         SET_RUNTIME_PM_OPS(azx_runtime_suspend, azx_runtime_resume, azx_runtime_idle)
1086 };
1087 
1088 #define AZX_PM_OPS      &azx_pm
1089 #else
1090 #define AZX_PM_OPS      NULL
1091 #endif /* CONFIG_PM */
1092 
1093 
1094 static int azx_probe_continue(struct azx *chip);
1095 
1096 #ifdef SUPPORT_VGA_SWITCHEROO
1097 static struct pci_dev *get_bound_vga(struct pci_dev *pci);
1098 
1099 static void azx_vs_set_state(struct pci_dev *pci,
1100                              enum vga_switcheroo_state state)
1101 {
1102         struct snd_card *card = pci_get_drvdata(pci);
1103         struct azx *chip = card->private_data;
1104         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1105         bool disabled;
1106 
1107         wait_for_completion(&hda->probe_wait);
1108         if (hda->init_failed)
1109                 return;
1110 
1111         disabled = (state == VGA_SWITCHEROO_OFF);
1112         if (chip->disabled == disabled)
1113                 return;
1114 
1115         if (!hda->probe_continued) {
1116                 chip->disabled = disabled;
1117                 if (!disabled) {
1118                         dev_info(chip->card->dev,
1119                                  "Start delayed initialization\n");
1120                         if (azx_probe_continue(chip) < 0) {
1121                                 dev_err(chip->card->dev, "initialization error\n");
1122                                 hda->init_failed = true;
1123                         }
1124                 }
1125         } else {
1126                 dev_info(chip->card->dev, "%s via vga_switcheroo\n",
1127                          disabled ? "Disabling" : "Enabling");
1128                 if (disabled) {
1129                         pm_runtime_put_sync_suspend(card->dev);
1130                         azx_suspend(card->dev);
1131                         /* when we get suspended by vga_switcheroo we end up in D3cold,
1132                          * however we have no ACPI handle, so pci/acpi can't put us there,
1133                          * put ourselves there */
1134                         pci->current_state = PCI_D3cold;
1135                         chip->disabled = true;
1136                         if (snd_hda_lock_devices(&chip->bus))
1137                                 dev_warn(chip->card->dev,
1138                                          "Cannot lock devices!\n");
1139                 } else {
1140                         snd_hda_unlock_devices(&chip->bus);
1141                         pm_runtime_get_noresume(card->dev);
1142                         chip->disabled = false;
1143                         azx_resume(card->dev);
1144                 }
1145         }
1146 }
1147 
1148 static bool azx_vs_can_switch(struct pci_dev *pci)
1149 {
1150         struct snd_card *card = pci_get_drvdata(pci);
1151         struct azx *chip = card->private_data;
1152         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1153 
1154         wait_for_completion(&hda->probe_wait);
1155         if (hda->init_failed)
1156                 return false;
1157         if (chip->disabled || !hda->probe_continued)
1158                 return true;
1159         if (snd_hda_lock_devices(&chip->bus))
1160                 return false;
1161         snd_hda_unlock_devices(&chip->bus);
1162         return true;
1163 }
1164 
1165 static void init_vga_switcheroo(struct azx *chip)
1166 {
1167         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1168         struct pci_dev *p = get_bound_vga(chip->pci);
1169         if (p) {
1170                 dev_info(chip->card->dev,
1171                          "Handle vga_switcheroo audio client\n");
1172                 hda->use_vga_switcheroo = 1;
1173                 pci_dev_put(p);
1174         }
1175 }
1176 
1177 static const struct vga_switcheroo_client_ops azx_vs_ops = {
1178         .set_gpu_state = azx_vs_set_state,
1179         .can_switch = azx_vs_can_switch,
1180 };
1181 
1182 static int register_vga_switcheroo(struct azx *chip)
1183 {
1184         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1185         int err;
1186 
1187         if (!hda->use_vga_switcheroo)
1188                 return 0;
1189         /* FIXME: currently only handling DIS controller
1190          * is there any machine with two switchable HDMI audio controllers?
1191          */
1192         err = vga_switcheroo_register_audio_client(chip->pci, &azx_vs_ops,
1193                                                    VGA_SWITCHEROO_DIS);
1194         if (err < 0)
1195                 return err;
1196         hda->vga_switcheroo_registered = 1;
1197 
1198         /* register as an optimus hdmi audio power domain */
1199         vga_switcheroo_init_domain_pm_optimus_hdmi_audio(chip->card->dev,
1200                                                          &hda->hdmi_pm_domain);
1201         return 0;
1202 }
1203 #else
1204 #define init_vga_switcheroo(chip)               /* NOP */
1205 #define register_vga_switcheroo(chip)           0
1206 #define check_hdmi_disabled(pci)        false
1207 #endif /* SUPPORT_VGA_SWITCHER */
1208 
1209 /*
1210  * destructor
1211  */
1212 static int azx_free(struct azx *chip)
1213 {
1214         struct pci_dev *pci = chip->pci;
1215         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
1216         struct hdac_bus *bus = azx_bus(chip);
1217 
1218         if (azx_has_pm_runtime(chip) && chip->running)
1219                 pm_runtime_get_noresume(&pci->dev);
1220 
1221         azx_del_card_list(chip);
1222 
1223         hda->init_failed = 1; /* to be sure */
1224         complete_all(&hda->probe_wait);
1225 
1226         if (use_vga_switcheroo(hda)) {
1227                 if (chip->disabled && hda->probe_continued)
1228                         snd_hda_unlock_devices(&chip->bus);
1229                 if (hda->vga_switcheroo_registered) {
1230                         vga_switcheroo_unregister_client(chip->pci);
1231                         vga_switcheroo_fini_domain_pm_ops(chip->card->dev);
1232                 }
1233         }
1234 
1235         if (bus->chip_init) {
1236                 azx_clear_irq_pending(chip);
1237                 azx_stop_all_streams(chip);
1238                 azx_stop_chip(chip);
1239         }
1240 
1241         if (bus->irq >= 0)
1242                 free_irq(bus->irq, (void*)chip);
1243         if (chip->msi)
1244                 pci_disable_msi(chip->pci);
1245         iounmap(bus->remap_addr);
1246 
1247         azx_free_stream_pages(chip);
1248         azx_free_streams(chip);
1249         snd_hdac_bus_exit(bus);
1250 
1251         if (chip->region_requested)
1252                 pci_release_regions(chip->pci);
1253 
1254         pci_disable_device(chip->pci);
1255 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1256         release_firmware(chip->fw);
1257 #endif
1258 
1259         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
1260                 if (hda->need_i915_power)
1261                         snd_hdac_display_power(bus, false);
1262                 snd_hdac_i915_exit(bus);
1263         }
1264         kfree(hda);
1265 
1266         return 0;
1267 }
1268 
1269 static int azx_dev_disconnect(struct snd_device *device)
1270 {
1271         struct azx *chip = device->device_data;
1272 
1273         chip->bus.shutdown = 1;
1274         return 0;
1275 }
1276 
1277 static int azx_dev_free(struct snd_device *device)
1278 {
1279         return azx_free(device->device_data);
1280 }
1281 
1282 #ifdef SUPPORT_VGA_SWITCHEROO
1283 /*
1284  * Check of disabled HDMI controller by vga_switcheroo
1285  */
1286 static struct pci_dev *get_bound_vga(struct pci_dev *pci)
1287 {
1288         struct pci_dev *p;
1289 
1290         /* check only discrete GPU */
1291         switch (pci->vendor) {
1292         case PCI_VENDOR_ID_ATI:
1293         case PCI_VENDOR_ID_AMD:
1294         case PCI_VENDOR_ID_NVIDIA:
1295                 if (pci->devfn == 1) {
1296                         p = pci_get_domain_bus_and_slot(pci_domain_nr(pci->bus),
1297                                                         pci->bus->number, 0);
1298                         if (p) {
1299                                 if ((p->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1300                                         return p;
1301                                 pci_dev_put(p);
1302                         }
1303                 }
1304                 break;
1305         }
1306         return NULL;
1307 }
1308 
1309 static bool check_hdmi_disabled(struct pci_dev *pci)
1310 {
1311         bool vga_inactive = false;
1312         struct pci_dev *p = get_bound_vga(pci);
1313 
1314         if (p) {
1315                 if (vga_switcheroo_get_client_state(p) == VGA_SWITCHEROO_OFF)
1316                         vga_inactive = true;
1317                 pci_dev_put(p);
1318         }
1319         return vga_inactive;
1320 }
1321 #endif /* SUPPORT_VGA_SWITCHEROO */
1322 
1323 /*
1324  * white/black-listing for position_fix
1325  */
1326 static struct snd_pci_quirk position_fix_list[] = {
1327         SND_PCI_QUIRK(0x1028, 0x01cc, "Dell D820", POS_FIX_LPIB),
1328         SND_PCI_QUIRK(0x1028, 0x01de, "Dell Precision 390", POS_FIX_LPIB),
1329         SND_PCI_QUIRK(0x103c, 0x306d, "HP dv3", POS_FIX_LPIB),
1330         SND_PCI_QUIRK(0x1043, 0x813d, "ASUS P5AD2", POS_FIX_LPIB),
1331         SND_PCI_QUIRK(0x1043, 0x81b3, "ASUS", POS_FIX_LPIB),
1332         SND_PCI_QUIRK(0x1043, 0x81e7, "ASUS M2V", POS_FIX_LPIB),
1333         SND_PCI_QUIRK(0x104d, 0x9069, "Sony VPCS11V9E", POS_FIX_LPIB),
1334         SND_PCI_QUIRK(0x10de, 0xcb89, "Macbook Pro 7,1", POS_FIX_LPIB),
1335         SND_PCI_QUIRK(0x1297, 0x3166, "Shuttle", POS_FIX_LPIB),
1336         SND_PCI_QUIRK(0x1458, 0xa022, "ga-ma770-ud3", POS_FIX_LPIB),
1337         SND_PCI_QUIRK(0x1462, 0x1002, "MSI Wind U115", POS_FIX_LPIB),
1338         SND_PCI_QUIRK(0x1565, 0x8218, "Biostar Microtech", POS_FIX_LPIB),
1339         SND_PCI_QUIRK(0x1849, 0x0888, "775Dual-VSTA", POS_FIX_LPIB),
1340         SND_PCI_QUIRK(0x8086, 0x2503, "DG965OT AAD63733-203", POS_FIX_LPIB),
1341         {}
1342 };
1343 
1344 static int check_position_fix(struct azx *chip, int fix)
1345 {
1346         const struct snd_pci_quirk *q;
1347 
1348         switch (fix) {
1349         case POS_FIX_AUTO:
1350         case POS_FIX_LPIB:
1351         case POS_FIX_POSBUF:
1352         case POS_FIX_VIACOMBO:
1353         case POS_FIX_COMBO:
1354                 return fix;
1355         }
1356 
1357         q = snd_pci_quirk_lookup(chip->pci, position_fix_list);
1358         if (q) {
1359                 dev_info(chip->card->dev,
1360                          "position_fix set to %d for device %04x:%04x\n",
1361                          q->value, q->subvendor, q->subdevice);
1362                 return q->value;
1363         }
1364 
1365         /* Check VIA/ATI HD Audio Controller exist */
1366         if (chip->driver_type == AZX_DRIVER_VIA) {
1367                 dev_dbg(chip->card->dev, "Using VIACOMBO position fix\n");
1368                 return POS_FIX_VIACOMBO;
1369         }
1370         if (chip->driver_caps & AZX_DCAPS_POSFIX_LPIB) {
1371                 dev_dbg(chip->card->dev, "Using LPIB position fix\n");
1372                 return POS_FIX_LPIB;
1373         }
1374         return POS_FIX_AUTO;
1375 }
1376 
1377 static void assign_position_fix(struct azx *chip, int fix)
1378 {
1379         static azx_get_pos_callback_t callbacks[] = {
1380                 [POS_FIX_AUTO] = NULL,
1381                 [POS_FIX_LPIB] = azx_get_pos_lpib,
1382                 [POS_FIX_POSBUF] = azx_get_pos_posbuf,
1383                 [POS_FIX_VIACOMBO] = azx_via_get_position,
1384                 [POS_FIX_COMBO] = azx_get_pos_lpib,
1385         };
1386 
1387         chip->get_position[0] = chip->get_position[1] = callbacks[fix];
1388 
1389         /* combo mode uses LPIB only for playback */
1390         if (fix == POS_FIX_COMBO)
1391                 chip->get_position[1] = NULL;
1392 
1393         if (fix == POS_FIX_POSBUF &&
1394             (chip->driver_caps & AZX_DCAPS_COUNT_LPIB_DELAY)) {
1395                 chip->get_delay[0] = chip->get_delay[1] =
1396                         azx_get_delay_from_lpib;
1397         }
1398 
1399 }
1400 
1401 /*
1402  * black-lists for probe_mask
1403  */
1404 static struct snd_pci_quirk probe_mask_list[] = {
1405         /* Thinkpad often breaks the controller communication when accessing
1406          * to the non-working (or non-existing) modem codec slot.
1407          */
1408         SND_PCI_QUIRK(0x1014, 0x05b7, "Thinkpad Z60", 0x01),
1409         SND_PCI_QUIRK(0x17aa, 0x2010, "Thinkpad X/T/R60", 0x01),
1410         SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X/T/R61", 0x01),
1411         /* broken BIOS */
1412         SND_PCI_QUIRK(0x1028, 0x20ac, "Dell Studio Desktop", 0x01),
1413         /* including bogus ALC268 in slot#2 that conflicts with ALC888 */
1414         SND_PCI_QUIRK(0x17c0, 0x4085, "Medion MD96630", 0x01),
1415         /* forced codec slots */
1416         SND_PCI_QUIRK(0x1043, 0x1262, "ASUS W5Fm", 0x103),
1417         SND_PCI_QUIRK(0x1046, 0x1262, "ASUS W5F", 0x103),
1418         /* WinFast VP200 H (Teradici) user reported broken communication */
1419         SND_PCI_QUIRK(0x3a21, 0x040d, "WinFast VP200 H", 0x101),
1420         {}
1421 };
1422 
1423 #define AZX_FORCE_CODEC_MASK    0x100
1424 
1425 static void check_probe_mask(struct azx *chip, int dev)
1426 {
1427         const struct snd_pci_quirk *q;
1428 
1429         chip->codec_probe_mask = probe_mask[dev];
1430         if (chip->codec_probe_mask == -1) {
1431                 q = snd_pci_quirk_lookup(chip->pci, probe_mask_list);
1432                 if (q) {
1433                         dev_info(chip->card->dev,
1434                                  "probe_mask set to 0x%x for device %04x:%04x\n",
1435                                  q->value, q->subvendor, q->subdevice);
1436                         chip->codec_probe_mask = q->value;
1437                 }
1438         }
1439 
1440         /* check forced option */
1441         if (chip->codec_probe_mask != -1 &&
1442             (chip->codec_probe_mask & AZX_FORCE_CODEC_MASK)) {
1443                 azx_bus(chip)->codec_mask = chip->codec_probe_mask & 0xff;
1444                 dev_info(chip->card->dev, "codec_mask forced to 0x%x\n",
1445                          (int)azx_bus(chip)->codec_mask);
1446         }
1447 }
1448 
1449 /*
1450  * white/black-list for enable_msi
1451  */
1452 static struct snd_pci_quirk msi_black_list[] = {
1453         SND_PCI_QUIRK(0x103c, 0x2191, "HP", 0), /* AMD Hudson */
1454         SND_PCI_QUIRK(0x103c, 0x2192, "HP", 0), /* AMD Hudson */
1455         SND_PCI_QUIRK(0x103c, 0x21f7, "HP", 0), /* AMD Hudson */
1456         SND_PCI_QUIRK(0x103c, 0x21fa, "HP", 0), /* AMD Hudson */
1457         SND_PCI_QUIRK(0x1043, 0x81f2, "ASUS", 0), /* Athlon64 X2 + nvidia */
1458         SND_PCI_QUIRK(0x1043, 0x81f6, "ASUS", 0), /* nvidia */
1459         SND_PCI_QUIRK(0x1043, 0x822d, "ASUS", 0), /* Athlon64 X2 + nvidia MCP55 */
1460         SND_PCI_QUIRK(0x1179, 0xfb44, "Toshiba Satellite C870", 0), /* AMD Hudson */
1461         SND_PCI_QUIRK(0x1849, 0x0888, "ASRock", 0), /* Athlon64 X2 + nvidia */
1462         SND_PCI_QUIRK(0xa0a0, 0x0575, "Aopen MZ915-M", 0), /* ICH6 */
1463         {}
1464 };
1465 
1466 static void check_msi(struct azx *chip)
1467 {
1468         const struct snd_pci_quirk *q;
1469 
1470         if (enable_msi >= 0) {
1471                 chip->msi = !!enable_msi;
1472                 return;
1473         }
1474         chip->msi = 1;  /* enable MSI as default */
1475         q = snd_pci_quirk_lookup(chip->pci, msi_black_list);
1476         if (q) {
1477                 dev_info(chip->card->dev,
1478                          "msi for device %04x:%04x set to %d\n",
1479                          q->subvendor, q->subdevice, q->value);
1480                 chip->msi = q->value;
1481                 return;
1482         }
1483 
1484         /* NVidia chipsets seem to cause troubles with MSI */
1485         if (chip->driver_caps & AZX_DCAPS_NO_MSI) {
1486                 dev_info(chip->card->dev, "Disabling MSI\n");
1487                 chip->msi = 0;
1488         }
1489 }
1490 
1491 /* check the snoop mode availability */
1492 static void azx_check_snoop_available(struct azx *chip)
1493 {
1494         int snoop = hda_snoop;
1495 
1496         if (snoop >= 0) {
1497                 dev_info(chip->card->dev, "Force to %s mode by module option\n",
1498                          snoop ? "snoop" : "non-snoop");
1499                 chip->snoop = snoop;
1500                 return;
1501         }
1502 
1503         snoop = true;
1504         if (azx_get_snoop_type(chip) == AZX_SNOOP_TYPE_NONE &&
1505             chip->driver_type == AZX_DRIVER_VIA) {
1506                 /* force to non-snoop mode for a new VIA controller
1507                  * when BIOS is set
1508                  */
1509                 u8 val;
1510                 pci_read_config_byte(chip->pci, 0x42, &val);
1511                 if (!(val & 0x80) && chip->pci->revision == 0x30)
1512                         snoop = false;
1513         }
1514 
1515         if (chip->driver_caps & AZX_DCAPS_SNOOP_OFF)
1516                 snoop = false;
1517 
1518         chip->snoop = snoop;
1519         if (!snoop)
1520                 dev_info(chip->card->dev, "Force to non-snoop mode\n");
1521 }
1522 
1523 static void azx_probe_work(struct work_struct *work)
1524 {
1525         struct hda_intel *hda = container_of(work, struct hda_intel, probe_work);
1526         azx_probe_continue(&hda->chip);
1527 }
1528 
1529 static int default_bdl_pos_adj(struct azx *chip)
1530 {
1531         /* some exceptions: Atoms seem problematic with value 1 */
1532         if (chip->pci->vendor == PCI_VENDOR_ID_INTEL) {
1533                 switch (chip->pci->device) {
1534                 case 0x0f04: /* Baytrail */
1535                 case 0x2284: /* Braswell */
1536                         return 32;
1537                 }
1538         }
1539 
1540         switch (chip->driver_type) {
1541         case AZX_DRIVER_ICH:
1542         case AZX_DRIVER_PCH:
1543                 return 1;
1544         default:
1545                 return 32;
1546         }
1547 }
1548 
1549 /*
1550  * constructor
1551  */
1552 static const struct hdac_io_ops pci_hda_io_ops;
1553 static const struct hda_controller_ops pci_hda_ops;
1554 
1555 static int azx_create(struct snd_card *card, struct pci_dev *pci,
1556                       int dev, unsigned int driver_caps,
1557                       struct azx **rchip)
1558 {
1559         static struct snd_device_ops ops = {
1560                 .dev_disconnect = azx_dev_disconnect,
1561                 .dev_free = azx_dev_free,
1562         };
1563         struct hda_intel *hda;
1564         struct azx *chip;
1565         int err;
1566 
1567         *rchip = NULL;
1568 
1569         err = pci_enable_device(pci);
1570         if (err < 0)
1571                 return err;
1572 
1573         hda = kzalloc(sizeof(*hda), GFP_KERNEL);
1574         if (!hda) {
1575                 pci_disable_device(pci);
1576                 return -ENOMEM;
1577         }
1578 
1579         chip = &hda->chip;
1580         mutex_init(&chip->open_mutex);
1581         chip->card = card;
1582         chip->pci = pci;
1583         chip->ops = &pci_hda_ops;
1584         chip->driver_caps = driver_caps;
1585         chip->driver_type = driver_caps & 0xff;
1586         check_msi(chip);
1587         chip->dev_index = dev;
1588         chip->jackpoll_ms = jackpoll_ms;
1589         INIT_LIST_HEAD(&chip->pcm_list);
1590         INIT_WORK(&hda->irq_pending_work, azx_irq_pending_work);
1591         INIT_LIST_HEAD(&hda->list);
1592         init_vga_switcheroo(chip);
1593         init_completion(&hda->probe_wait);
1594 
1595         assign_position_fix(chip, check_position_fix(chip, position_fix[dev]));
1596 
1597         check_probe_mask(chip, dev);
1598 
1599         chip->single_cmd = single_cmd;
1600         azx_check_snoop_available(chip);
1601 
1602         if (bdl_pos_adj[dev] < 0)
1603                 chip->bdl_pos_adj = default_bdl_pos_adj(chip);
1604         else
1605                 chip->bdl_pos_adj = bdl_pos_adj[dev];
1606 
1607         err = azx_bus_init(chip, model[dev], &pci_hda_io_ops);
1608         if (err < 0) {
1609                 kfree(hda);
1610                 pci_disable_device(pci);
1611                 return err;
1612         }
1613 
1614         if (chip->driver_type == AZX_DRIVER_NVIDIA) {
1615                 dev_dbg(chip->card->dev, "Enable delay in RIRB handling\n");
1616                 chip->bus.needs_damn_long_delay = 1;
1617         }
1618 
1619         err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops);
1620         if (err < 0) {
1621                 dev_err(card->dev, "Error creating device [card]!\n");
1622                 azx_free(chip);
1623                 return err;
1624         }
1625 
1626         /* continue probing in work context as may trigger request module */
1627         INIT_WORK(&hda->probe_work, azx_probe_work);
1628 
1629         *rchip = chip;
1630 
1631         return 0;
1632 }
1633 
1634 static int azx_first_init(struct azx *chip)
1635 {
1636         int dev = chip->dev_index;
1637         struct pci_dev *pci = chip->pci;
1638         struct snd_card *card = chip->card;
1639         struct hdac_bus *bus = azx_bus(chip);
1640         int err;
1641         unsigned short gcap;
1642         unsigned int dma_bits = 64;
1643 
1644 #if BITS_PER_LONG != 64
1645         /* Fix up base address on ULI M5461 */
1646         if (chip->driver_type == AZX_DRIVER_ULI) {
1647                 u16 tmp3;
1648                 pci_read_config_word(pci, 0x40, &tmp3);
1649                 pci_write_config_word(pci, 0x40, tmp3 | 0x10);
1650                 pci_write_config_dword(pci, PCI_BASE_ADDRESS_1, 0);
1651         }
1652 #endif
1653 
1654         err = pci_request_regions(pci, "ICH HD audio");
1655         if (err < 0)
1656                 return err;
1657         chip->region_requested = 1;
1658 
1659         bus->addr = pci_resource_start(pci, 0);
1660         bus->remap_addr = pci_ioremap_bar(pci, 0);
1661         if (bus->remap_addr == NULL) {
1662                 dev_err(card->dev, "ioremap error\n");
1663                 return -ENXIO;
1664         }
1665 
1666         if (chip->msi) {
1667                 if (chip->driver_caps & AZX_DCAPS_NO_MSI64) {
1668                         dev_dbg(card->dev, "Disabling 64bit MSI\n");
1669                         pci->no_64bit_msi = true;
1670                 }
1671                 if (pci_enable_msi(pci) < 0)
1672                         chip->msi = 0;
1673         }
1674 
1675         if (azx_acquire_irq(chip, 0) < 0)
1676                 return -EBUSY;
1677 
1678         pci_set_master(pci);
1679         synchronize_irq(bus->irq);
1680 
1681         gcap = azx_readw(chip, GCAP);
1682         dev_dbg(card->dev, "chipset global capabilities = 0x%x\n", gcap);
1683 
1684         /* AMD devices support 40 or 48bit DMA, take the safe one */
1685         if (chip->pci->vendor == PCI_VENDOR_ID_AMD)
1686                 dma_bits = 40;
1687 
1688         /* disable SB600 64bit support for safety */
1689         if (chip->pci->vendor == PCI_VENDOR_ID_ATI) {
1690                 struct pci_dev *p_smbus;
1691                 dma_bits = 40;
1692                 p_smbus = pci_get_device(PCI_VENDOR_ID_ATI,
1693                                          PCI_DEVICE_ID_ATI_SBX00_SMBUS,
1694                                          NULL);
1695                 if (p_smbus) {
1696                         if (p_smbus->revision < 0x30)
1697                                 gcap &= ~AZX_GCAP_64OK;
1698                         pci_dev_put(p_smbus);
1699                 }
1700         }
1701 
1702         /* disable 64bit DMA address on some devices */
1703         if (chip->driver_caps & AZX_DCAPS_NO_64BIT) {
1704                 dev_dbg(card->dev, "Disabling 64bit DMA\n");
1705                 gcap &= ~AZX_GCAP_64OK;
1706         }
1707 
1708         /* disable buffer size rounding to 128-byte multiples if supported */
1709         if (align_buffer_size >= 0)
1710                 chip->align_buffer_size = !!align_buffer_size;
1711         else {
1712                 if (chip->driver_caps & AZX_DCAPS_NO_ALIGN_BUFSIZE)
1713                         chip->align_buffer_size = 0;
1714                 else
1715                         chip->align_buffer_size = 1;
1716         }
1717 
1718         /* allow 64bit DMA address if supported by H/W */
1719         if (!(gcap & AZX_GCAP_64OK))
1720                 dma_bits = 32;
1721         if (!dma_set_mask(&pci->dev, DMA_BIT_MASK(dma_bits))) {
1722                 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(dma_bits));
1723         } else {
1724                 dma_set_mask(&pci->dev, DMA_BIT_MASK(32));
1725                 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(32));
1726         }
1727 
1728         /* read number of streams from GCAP register instead of using
1729          * hardcoded value
1730          */
1731         chip->capture_streams = (gcap >> 8) & 0x0f;
1732         chip->playback_streams = (gcap >> 12) & 0x0f;
1733         if (!chip->playback_streams && !chip->capture_streams) {
1734                 /* gcap didn't give any info, switching to old method */
1735 
1736                 switch (chip->driver_type) {
1737                 case AZX_DRIVER_ULI:
1738                         chip->playback_streams = ULI_NUM_PLAYBACK;
1739                         chip->capture_streams = ULI_NUM_CAPTURE;
1740                         break;
1741                 case AZX_DRIVER_ATIHDMI:
1742                 case AZX_DRIVER_ATIHDMI_NS:
1743                         chip->playback_streams = ATIHDMI_NUM_PLAYBACK;
1744                         chip->capture_streams = ATIHDMI_NUM_CAPTURE;
1745                         break;
1746                 case AZX_DRIVER_GENERIC:
1747                 default:
1748                         chip->playback_streams = ICH6_NUM_PLAYBACK;
1749                         chip->capture_streams = ICH6_NUM_CAPTURE;
1750                         break;
1751                 }
1752         }
1753         chip->capture_index_offset = 0;
1754         chip->playback_index_offset = chip->capture_streams;
1755         chip->num_streams = chip->playback_streams + chip->capture_streams;
1756 
1757         /* initialize streams */
1758         err = azx_init_streams(chip);
1759         if (err < 0)
1760                 return err;
1761 
1762         err = azx_alloc_stream_pages(chip);
1763         if (err < 0)
1764                 return err;
1765 
1766         /* initialize chip */
1767         azx_init_pci(chip);
1768 
1769         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL)
1770                 snd_hdac_i915_set_bclk(bus);
1771 
1772         hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
1773 
1774         /* codec detection */
1775         if (!azx_bus(chip)->codec_mask) {
1776                 dev_err(card->dev, "no codecs found!\n");
1777                 return -ENODEV;
1778         }
1779 
1780         strcpy(card->driver, "HDA-Intel");
1781         strlcpy(card->shortname, driver_short_names[chip->driver_type],
1782                 sizeof(card->shortname));
1783         snprintf(card->longname, sizeof(card->longname),
1784                  "%s at 0x%lx irq %i",
1785                  card->shortname, bus->addr, bus->irq);
1786 
1787         return 0;
1788 }
1789 
1790 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1791 /* callback from request_firmware_nowait() */
1792 static void azx_firmware_cb(const struct firmware *fw, void *context)
1793 {
1794         struct snd_card *card = context;
1795         struct azx *chip = card->private_data;
1796         struct pci_dev *pci = chip->pci;
1797 
1798         if (!fw) {
1799                 dev_err(card->dev, "Cannot load firmware, aborting\n");
1800                 goto error;
1801         }
1802 
1803         chip->fw = fw;
1804         if (!chip->disabled) {
1805                 /* continue probing */
1806                 if (azx_probe_continue(chip))
1807                         goto error;
1808         }
1809         return; /* OK */
1810 
1811  error:
1812         snd_card_free(card);
1813         pci_set_drvdata(pci, NULL);
1814 }
1815 #endif
1816 
1817 /*
1818  * HDA controller ops.
1819  */
1820 
1821 /* PCI register access. */
1822 static void pci_azx_writel(u32 value, u32 __iomem *addr)
1823 {
1824         writel(value, addr);
1825 }
1826 
1827 static u32 pci_azx_readl(u32 __iomem *addr)
1828 {
1829         return readl(addr);
1830 }
1831 
1832 static void pci_azx_writew(u16 value, u16 __iomem *addr)
1833 {
1834         writew(value, addr);
1835 }
1836 
1837 static u16 pci_azx_readw(u16 __iomem *addr)
1838 {
1839         return readw(addr);
1840 }
1841 
1842 static void pci_azx_writeb(u8 value, u8 __iomem *addr)
1843 {
1844         writeb(value, addr);
1845 }
1846 
1847 static u8 pci_azx_readb(u8 __iomem *addr)
1848 {
1849         return readb(addr);
1850 }
1851 
1852 static int disable_msi_reset_irq(struct azx *chip)
1853 {
1854         struct hdac_bus *bus = azx_bus(chip);
1855         int err;
1856 
1857         free_irq(bus->irq, chip);
1858         bus->irq = -1;
1859         pci_disable_msi(chip->pci);
1860         chip->msi = 0;
1861         err = azx_acquire_irq(chip, 1);
1862         if (err < 0)
1863                 return err;
1864 
1865         return 0;
1866 }
1867 
1868 /* DMA page allocation helpers.  */
1869 static int dma_alloc_pages(struct hdac_bus *bus,
1870                            int type,
1871                            size_t size,
1872                            struct snd_dma_buffer *buf)
1873 {
1874         struct azx *chip = bus_to_azx(bus);
1875         int err;
1876 
1877         err = snd_dma_alloc_pages(type,
1878                                   bus->dev,
1879                                   size, buf);
1880         if (err < 0)
1881                 return err;
1882         mark_pages_wc(chip, buf, true);
1883         return 0;
1884 }
1885 
1886 static void dma_free_pages(struct hdac_bus *bus, struct snd_dma_buffer *buf)
1887 {
1888         struct azx *chip = bus_to_azx(bus);
1889 
1890         mark_pages_wc(chip, buf, false);
1891         snd_dma_free_pages(buf);
1892 }
1893 
1894 static int substream_alloc_pages(struct azx *chip,
1895                                  struct snd_pcm_substream *substream,
1896                                  size_t size)
1897 {
1898         struct azx_dev *azx_dev = get_azx_dev(substream);
1899         int ret;
1900 
1901         mark_runtime_wc(chip, azx_dev, substream, false);
1902         ret = snd_pcm_lib_malloc_pages(substream, size);
1903         if (ret < 0)
1904                 return ret;
1905         mark_runtime_wc(chip, azx_dev, substream, true);
1906         return 0;
1907 }
1908 
1909 static int substream_free_pages(struct azx *chip,
1910                                 struct snd_pcm_substream *substream)
1911 {
1912         struct azx_dev *azx_dev = get_azx_dev(substream);
1913         mark_runtime_wc(chip, azx_dev, substream, false);
1914         return snd_pcm_lib_free_pages(substream);
1915 }
1916 
1917 static void pcm_mmap_prepare(struct snd_pcm_substream *substream,
1918                              struct vm_area_struct *area)
1919 {
1920 #ifdef CONFIG_X86
1921         struct azx_pcm *apcm = snd_pcm_substream_chip(substream);
1922         struct azx *chip = apcm->chip;
1923         if (!azx_snoop(chip) && chip->driver_type != AZX_DRIVER_CMEDIA)
1924                 area->vm_page_prot = pgprot_writecombine(area->vm_page_prot);
1925 #endif
1926 }
1927 
1928 static const struct hdac_io_ops pci_hda_io_ops = {
1929         .reg_writel = pci_azx_writel,
1930         .reg_readl = pci_azx_readl,
1931         .reg_writew = pci_azx_writew,
1932         .reg_readw = pci_azx_readw,
1933         .reg_writeb = pci_azx_writeb,
1934         .reg_readb = pci_azx_readb,
1935         .dma_alloc_pages = dma_alloc_pages,
1936         .dma_free_pages = dma_free_pages,
1937 };
1938 
1939 static const struct hda_controller_ops pci_hda_ops = {
1940         .disable_msi_reset_irq = disable_msi_reset_irq,
1941         .substream_alloc_pages = substream_alloc_pages,
1942         .substream_free_pages = substream_free_pages,
1943         .pcm_mmap_prepare = pcm_mmap_prepare,
1944         .position_check = azx_position_check,
1945         .link_power = azx_intel_link_power,
1946 };
1947 
1948 static int azx_probe(struct pci_dev *pci,
1949                      const struct pci_device_id *pci_id)
1950 {
1951         static int dev;
1952         struct snd_card *card;
1953         struct hda_intel *hda;
1954         struct azx *chip;
1955         bool schedule_probe;
1956         int err;
1957 
1958         if (dev >= SNDRV_CARDS)
1959                 return -ENODEV;
1960         if (!enable[dev]) {
1961                 dev++;
1962                 return -ENOENT;
1963         }
1964 
1965         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1966                            0, &card);
1967         if (err < 0) {
1968                 dev_err(&pci->dev, "Error creating card!\n");
1969                 return err;
1970         }
1971 
1972         err = azx_create(card, pci, dev, pci_id->driver_data, &chip);
1973         if (err < 0)
1974                 goto out_free;
1975         card->private_data = chip;
1976         hda = container_of(chip, struct hda_intel, chip);
1977 
1978         pci_set_drvdata(pci, card);
1979 
1980         err = register_vga_switcheroo(chip);
1981         if (err < 0) {
1982                 dev_err(card->dev, "Error registering vga_switcheroo client\n");
1983                 goto out_free;
1984         }
1985 
1986         if (check_hdmi_disabled(pci)) {
1987                 dev_info(card->dev, "VGA controller is disabled\n");
1988                 dev_info(card->dev, "Delaying initialization\n");
1989                 chip->disabled = true;
1990         }
1991 
1992         schedule_probe = !chip->disabled;
1993 
1994 #ifdef CONFIG_SND_HDA_PATCH_LOADER
1995         if (patch[dev] && *patch[dev]) {
1996                 dev_info(card->dev, "Applying patch firmware '%s'\n",
1997                          patch[dev]);
1998                 err = request_firmware_nowait(THIS_MODULE, true, patch[dev],
1999                                               &pci->dev, GFP_KERNEL, card,
2000                                               azx_firmware_cb);
2001                 if (err < 0)
2002                         goto out_free;
2003                 schedule_probe = false; /* continued in azx_firmware_cb() */
2004         }
2005 #endif /* CONFIG_SND_HDA_PATCH_LOADER */
2006 
2007 #ifndef CONFIG_SND_HDA_I915
2008         if (CONTROLLER_IN_GPU(pci))
2009                 dev_err(card->dev, "Haswell/Broadwell HDMI/DP must build in CONFIG_SND_HDA_I915\n");
2010 #endif
2011 
2012         if (schedule_probe)
2013                 schedule_work(&hda->probe_work);
2014 
2015         dev++;
2016         if (chip->disabled)
2017                 complete_all(&hda->probe_wait);
2018         return 0;
2019 
2020 out_free:
2021         snd_card_free(card);
2022         return err;
2023 }
2024 
2025 /* number of codec slots for each chipset: 0 = default slots (i.e. 4) */
2026 static unsigned int azx_max_codecs[AZX_NUM_DRIVERS] = {
2027         [AZX_DRIVER_NVIDIA] = 8,
2028         [AZX_DRIVER_TERA] = 1,
2029 };
2030 
2031 static int azx_probe_continue(struct azx *chip)
2032 {
2033         struct hda_intel *hda = container_of(chip, struct hda_intel, chip);
2034         struct hdac_bus *bus = azx_bus(chip);
2035         struct pci_dev *pci = chip->pci;
2036         int dev = chip->dev_index;
2037         int err;
2038 
2039         hda->probe_continued = 1;
2040 
2041         /* Request display power well for the HDA controller or codec. For
2042          * Haswell/Broadwell, both the display HDA controller and codec need
2043          * this power. For other platforms, like Baytrail/Braswell, only the
2044          * display codec needs the power and it can be released after probe.
2045          */
2046         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL) {
2047                 /* HSW/BDW controllers need this power */
2048                 if (CONTROLLER_IN_GPU(pci))
2049                         hda->need_i915_power = 1;
2050 
2051                 err = snd_hdac_i915_init(bus);
2052                 if (err < 0) {
2053                         /* if the controller is bound only with HDMI/DP
2054                          * (for HSW and BDW), we need to abort the probe;
2055                          * for other chips, still continue probing as other
2056                          * codecs can be on the same link.
2057                          */
2058                         if (CONTROLLER_IN_GPU(pci)) {
2059                                 dev_err(chip->card->dev,
2060                                         "HSW/BDW HD-audio HDMI/DP requires binding with gfx driver\n");
2061                                 goto out_free;
2062                         } else
2063                                 goto skip_i915;
2064                 }
2065 
2066                 err = snd_hdac_display_power(bus, true);
2067                 if (err < 0) {
2068                         dev_err(chip->card->dev,
2069                                 "Cannot turn on display power on i915\n");
2070                         goto i915_power_fail;
2071                 }
2072         }
2073 
2074  skip_i915:
2075         err = azx_first_init(chip);
2076         if (err < 0)
2077                 goto out_free;
2078 
2079 #ifdef CONFIG_SND_HDA_INPUT_BEEP
2080         chip->beep_mode = beep_mode[dev];
2081 #endif
2082 
2083         /* create codec instances */
2084         err = azx_probe_codecs(chip, azx_max_codecs[chip->driver_type]);
2085         if (err < 0)
2086                 goto out_free;
2087 
2088 #ifdef CONFIG_SND_HDA_PATCH_LOADER
2089         if (chip->fw) {
2090                 err = snd_hda_load_patch(&chip->bus, chip->fw->size,
2091                                          chip->fw->data);
2092                 if (err < 0)
2093                         goto out_free;
2094 #ifndef CONFIG_PM
2095                 release_firmware(chip->fw); /* no longer needed */
2096                 chip->fw = NULL;
2097 #endif
2098         }
2099 #endif
2100         if ((probe_only[dev] & 1) == 0) {
2101                 err = azx_codec_configure(chip);
2102                 if (err < 0)
2103                         goto out_free;
2104         }
2105 
2106         err = snd_card_register(chip->card);
2107         if (err < 0)
2108                 goto out_free;
2109 
2110         chip->running = 1;
2111         azx_add_card_list(chip);
2112         snd_hda_set_power_save(&chip->bus, power_save * 1000);
2113         if (azx_has_pm_runtime(chip) || hda->use_vga_switcheroo)
2114                 pm_runtime_put_autosuspend(&pci->dev);
2115 
2116 out_free:
2117         if (chip->driver_caps & AZX_DCAPS_I915_POWERWELL
2118                 && !hda->need_i915_power)
2119                 snd_hdac_display_power(bus, false);
2120 
2121 i915_power_fail:
2122         if (err < 0)
2123                 hda->init_failed = 1;
2124         complete_all(&hda->probe_wait);
2125         return err;
2126 }
2127 
2128 static void azx_remove(struct pci_dev *pci)
2129 {
2130         struct snd_card *card = pci_get_drvdata(pci);
2131         struct azx *chip;
2132         struct hda_intel *hda;
2133 
2134         if (card) {
2135                 /* cancel the pending probing work */
2136                 chip = card->private_data;
2137                 hda = container_of(chip, struct hda_intel, chip);
2138                 cancel_work_sync(&hda->probe_work);
2139 
2140                 snd_card_free(card);
2141         }
2142 }
2143 
2144 static void azx_shutdown(struct pci_dev *pci)
2145 {
2146         struct snd_card *card = pci_get_drvdata(pci);
2147         struct azx *chip;
2148 
2149         if (!card)
2150                 return;
2151         chip = card->private_data;
2152         if (chip && chip->running)
2153                 azx_stop_chip(chip);
2154 }
2155 
2156 /* PCI IDs */
2157 static const struct pci_device_id azx_ids[] = {
2158         /* CPT */
2159         { PCI_DEVICE(0x8086, 0x1c20),
2160           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2161         /* PBG */
2162         { PCI_DEVICE(0x8086, 0x1d20),
2163           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2164         /* Panther Point */
2165         { PCI_DEVICE(0x8086, 0x1e20),
2166           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
2167         /* Lynx Point */
2168         { PCI_DEVICE(0x8086, 0x8c20),
2169           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2170         /* 9 Series */
2171         { PCI_DEVICE(0x8086, 0x8ca0),
2172           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2173         /* Wellsburg */
2174         { PCI_DEVICE(0x8086, 0x8d20),
2175           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2176         { PCI_DEVICE(0x8086, 0x8d21),
2177           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2178         /* Lewisburg */
2179         { PCI_DEVICE(0x8086, 0xa1f0),
2180           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2181         { PCI_DEVICE(0x8086, 0xa270),
2182           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2183         /* Lynx Point-LP */
2184         { PCI_DEVICE(0x8086, 0x9c20),
2185           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2186         /* Lynx Point-LP */
2187         { PCI_DEVICE(0x8086, 0x9c21),
2188           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2189         /* Wildcat Point-LP */
2190         { PCI_DEVICE(0x8086, 0x9ca0),
2191           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
2192         /* Sunrise Point */
2193         { PCI_DEVICE(0x8086, 0xa170),
2194           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2195         /* Sunrise Point-LP */
2196         { PCI_DEVICE(0x8086, 0x9d70),
2197           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2198         /* Kabylake */
2199         { PCI_DEVICE(0x8086, 0xa171),
2200           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2201         /* Kabylake-LP */
2202         { PCI_DEVICE(0x8086, 0x9d71),
2203           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2204         /* Kabylake-H */
2205         { PCI_DEVICE(0x8086, 0xa2f0),
2206           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_SKYLAKE },
2207         /* Broxton-P(Apollolake) */
2208         { PCI_DEVICE(0x8086, 0x5a98),
2209           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BROXTON },
2210         /* Broxton-T */
2211         { PCI_DEVICE(0x8086, 0x1a98),
2212           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BROXTON },
2213         /* Haswell */
2214         { PCI_DEVICE(0x8086, 0x0a0c),
2215           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2216         { PCI_DEVICE(0x8086, 0x0c0c),
2217           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2218         { PCI_DEVICE(0x8086, 0x0d0c),
2219           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_HASWELL },
2220         /* Broadwell */
2221         { PCI_DEVICE(0x8086, 0x160c),
2222           .driver_data = AZX_DRIVER_HDMI | AZX_DCAPS_INTEL_BROADWELL },
2223         /* 5 Series/3400 */
2224         { PCI_DEVICE(0x8086, 0x3b56),
2225           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_NOPM },
2226         /* Poulsbo */
2227         { PCI_DEVICE(0x8086, 0x811b),
2228           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2229         /* Oaktrail */
2230         { PCI_DEVICE(0x8086, 0x080a),
2231           .driver_data = AZX_DRIVER_SCH | AZX_DCAPS_INTEL_PCH_BASE },
2232         /* BayTrail */
2233         { PCI_DEVICE(0x8086, 0x0f04),
2234           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BAYTRAIL },
2235         /* Braswell */
2236         { PCI_DEVICE(0x8086, 0x2284),
2237           .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_BRASWELL },
2238         /* ICH6 */
2239         { PCI_DEVICE(0x8086, 0x2668),
2240           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2241         /* ICH7 */
2242         { PCI_DEVICE(0x8086, 0x27d8),
2243           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2244         /* ESB2 */
2245         { PCI_DEVICE(0x8086, 0x269a),
2246           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2247         /* ICH8 */
2248         { PCI_DEVICE(0x8086, 0x284b),
2249           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2250         /* ICH9 */
2251         { PCI_DEVICE(0x8086, 0x293e),
2252           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2253         /* ICH9 */
2254         { PCI_DEVICE(0x8086, 0x293f),
2255           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2256         /* ICH10 */
2257         { PCI_DEVICE(0x8086, 0x3a3e),
2258           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2259         /* ICH10 */
2260         { PCI_DEVICE(0x8086, 0x3a6e),
2261           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_INTEL_ICH },
2262         /* Generic Intel */
2263         { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_ANY_ID),
2264           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2265           .class_mask = 0xffffff,
2266           .driver_data = AZX_DRIVER_ICH | AZX_DCAPS_NO_ALIGN_BUFSIZE },
2267         /* ATI SB 450/600/700/800/900 */
2268         { PCI_DEVICE(0x1002, 0x437b),
2269           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2270         { PCI_DEVICE(0x1002, 0x4383),
2271           .driver_data = AZX_DRIVER_ATI | AZX_DCAPS_PRESET_ATI_SB },
2272         /* AMD Hudson */
2273         { PCI_DEVICE(0x1022, 0x780d),
2274           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_SB },
2275         /* ATI HDMI */
2276         { PCI_DEVICE(0x1002, 0x0002),
2277           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2278         { PCI_DEVICE(0x1002, 0x1308),
2279           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2280         { PCI_DEVICE(0x1002, 0x157a),
2281           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2282         { PCI_DEVICE(0x1002, 0x15b3),
2283           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2284         { PCI_DEVICE(0x1002, 0x793b),
2285           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2286         { PCI_DEVICE(0x1002, 0x7919),
2287           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2288         { PCI_DEVICE(0x1002, 0x960f),
2289           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2290         { PCI_DEVICE(0x1002, 0x970f),
2291           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2292         { PCI_DEVICE(0x1002, 0x9840),
2293           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2294         { PCI_DEVICE(0x1002, 0xaa00),
2295           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2296         { PCI_DEVICE(0x1002, 0xaa08),
2297           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2298         { PCI_DEVICE(0x1002, 0xaa10),
2299           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2300         { PCI_DEVICE(0x1002, 0xaa18),
2301           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2302         { PCI_DEVICE(0x1002, 0xaa20),
2303           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2304         { PCI_DEVICE(0x1002, 0xaa28),
2305           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2306         { PCI_DEVICE(0x1002, 0xaa30),
2307           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2308         { PCI_DEVICE(0x1002, 0xaa38),
2309           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2310         { PCI_DEVICE(0x1002, 0xaa40),
2311           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2312         { PCI_DEVICE(0x1002, 0xaa48),
2313           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2314         { PCI_DEVICE(0x1002, 0xaa50),
2315           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2316         { PCI_DEVICE(0x1002, 0xaa58),
2317           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2318         { PCI_DEVICE(0x1002, 0xaa60),
2319           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2320         { PCI_DEVICE(0x1002, 0xaa68),
2321           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2322         { PCI_DEVICE(0x1002, 0xaa80),
2323           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2324         { PCI_DEVICE(0x1002, 0xaa88),
2325           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2326         { PCI_DEVICE(0x1002, 0xaa90),
2327           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2328         { PCI_DEVICE(0x1002, 0xaa98),
2329           .driver_data = AZX_DRIVER_ATIHDMI | AZX_DCAPS_PRESET_ATI_HDMI },
2330         { PCI_DEVICE(0x1002, 0x9902),
2331           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2332         { PCI_DEVICE(0x1002, 0xaaa0),
2333           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2334         { PCI_DEVICE(0x1002, 0xaaa8),
2335           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2336         { PCI_DEVICE(0x1002, 0xaab0),
2337           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2338         { PCI_DEVICE(0x1002, 0xaac0),
2339           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2340         { PCI_DEVICE(0x1002, 0xaac8),
2341           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2342         { PCI_DEVICE(0x1002, 0xaad8),
2343           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2344         { PCI_DEVICE(0x1002, 0xaae8),
2345           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2346         { PCI_DEVICE(0x1002, 0xaae0),
2347           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2348         { PCI_DEVICE(0x1002, 0xaaf0),
2349           .driver_data = AZX_DRIVER_ATIHDMI_NS | AZX_DCAPS_PRESET_ATI_HDMI_NS },
2350         /* VIA VT8251/VT8237A */
2351         { PCI_DEVICE(0x1106, 0x3288), .driver_data = AZX_DRIVER_VIA },
2352         /* VIA GFX VT7122/VX900 */
2353         { PCI_DEVICE(0x1106, 0x9170), .driver_data = AZX_DRIVER_GENERIC },
2354         /* VIA GFX VT6122/VX11 */
2355         { PCI_DEVICE(0x1106, 0x9140), .driver_data = AZX_DRIVER_GENERIC },
2356         /* SIS966 */
2357         { PCI_DEVICE(0x1039, 0x7502), .driver_data = AZX_DRIVER_SIS },
2358         /* ULI M5461 */
2359         { PCI_DEVICE(0x10b9, 0x5461), .driver_data = AZX_DRIVER_ULI },
2360         /* NVIDIA MCP */
2361         { PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
2362           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2363           .class_mask = 0xffffff,
2364           .driver_data = AZX_DRIVER_NVIDIA | AZX_DCAPS_PRESET_NVIDIA },
2365         /* Teradici */
2366         { PCI_DEVICE(0x6549, 0x1200),
2367           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2368         { PCI_DEVICE(0x6549, 0x2200),
2369           .driver_data = AZX_DRIVER_TERA | AZX_DCAPS_NO_64BIT },
2370         /* Creative X-Fi (CA0110-IBG) */
2371         /* CTHDA chips */
2372         { PCI_DEVICE(0x1102, 0x0010),
2373           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2374         { PCI_DEVICE(0x1102, 0x0012),
2375           .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
2376 #if !IS_ENABLED(CONFIG_SND_CTXFI)
2377         /* the following entry conflicts with snd-ctxfi driver,
2378          * as ctxfi driver mutates from HD-audio to native mode with
2379          * a special command sequence.
2380          */
2381         { PCI_DEVICE(PCI_VENDOR_ID_CREATIVE, PCI_ANY_ID),
2382           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2383           .class_mask = 0xffffff,
2384           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2385           AZX_DCAPS_NO_64BIT | AZX_DCAPS_POSFIX_LPIB },
2386 #else
2387         /* this entry seems still valid -- i.e. without emu20kx chip */
2388         { PCI_DEVICE(0x1102, 0x0009),
2389           .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND |
2390           AZX_DCAPS_NO_64BIT | AZX_DCAPS_POSFIX_LPIB },
2391 #endif
2392         /* CM8888 */
2393         { PCI_DEVICE(0x13f6, 0x5011),
2394           .driver_data = AZX_DRIVER_CMEDIA |
2395           AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_SNOOP_OFF },
2396         /* Vortex86MX */
2397         { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC },
2398         /* VMware HDAudio */
2399         { PCI_DEVICE(0x15ad, 0x1977), .driver_data = AZX_DRIVER_GENERIC },
2400         /* AMD/ATI Generic, PCI class code and Vendor ID for HD Audio */
2401         { PCI_DEVICE(PCI_VENDOR_ID_ATI, PCI_ANY_ID),
2402           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2403           .class_mask = 0xffffff,
2404           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2405         { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_ANY_ID),
2406           .class = PCI_CLASS_MULTIMEDIA_HD_AUDIO << 8,
2407           .class_mask = 0xffffff,
2408           .driver_data = AZX_DRIVER_GENERIC | AZX_DCAPS_PRESET_ATI_HDMI },
2409         { 0, }
2410 };
2411 MODULE_DEVICE_TABLE(pci, azx_ids);
2412 
2413 /* pci_driver definition */
2414 static struct pci_driver azx_driver = {
2415         .name = KBUILD_MODNAME,
2416         .id_table = azx_ids,
2417         .probe = azx_probe,
2418         .remove = azx_remove,
2419         .shutdown = azx_shutdown,
2420         .driver = {
2421                 .pm = AZX_PM_OPS,
2422         },
2423 };
2424 
2425 module_pci_driver(azx_driver);
2426 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us