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Linux/sound/pci/es1968.c

  1 /*
  2  *  Driver for ESS Maestro 1/2/2E Sound Card (started 21.8.99)
  3  *  Copyright (c) by Matze Braun <MatzeBraun@gmx.de>.
  4  *                   Takashi Iwai <tiwai@suse.de>
  5  *                  
  6  *  Most of the driver code comes from Zach Brown(zab@redhat.com)
  7  *      Alan Cox OSS Driver
  8  *  Rewritted from card-es1938.c source.
  9  *
 10  *  TODO:
 11  *   Perhaps Synth
 12  *
 13  *   This program is free software; you can redistribute it and/or modify
 14  *   it under the terms of the GNU General Public License as published by
 15  *   the Free Software Foundation; either version 2 of the License, or
 16  *   (at your option) any later version.
 17  *
 18  *   This program is distributed in the hope that it will be useful,
 19  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
 20  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 21  *   GNU General Public License for more details.
 22  *
 23  *   You should have received a copy of the GNU General Public License
 24  *   along with this program; if not, write to the Free Software
 25  *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 26  *
 27  *
 28  *  Notes from Zach Brown about the driver code
 29  *
 30  *  Hardware Description
 31  *
 32  *      A working Maestro setup contains the Maestro chip wired to a 
 33  *      codec or 2.  In the Maestro we have the APUs, the ASSP, and the
 34  *      Wavecache.  The APUs can be though of as virtual audio routing
 35  *      channels.  They can take data from a number of sources and perform
 36  *      basic encodings of the data.  The wavecache is a storehouse for
 37  *      PCM data.  Typically it deals with PCI and interracts with the
 38  *      APUs.  The ASSP is a wacky DSP like device that ESS is loth
 39  *      to release docs on.  Thankfully it isn't required on the Maestro
 40  *      until you start doing insane things like FM emulation and surround
 41  *      encoding.  The codecs are almost always AC-97 compliant codecs, 
 42  *      but it appears that early Maestros may have had PT101 (an ESS
 43  *      part?) wired to them.  The only real difference in the Maestro
 44  *      families is external goop like docking capability, memory for
 45  *      the ASSP, and initialization differences.
 46  *
 47  *  Driver Operation
 48  *
 49  *      We only drive the APU/Wavecache as typical DACs and drive the
 50  *      mixers in the codecs.  There are 64 APUs.  We assign 6 to each
 51  *      /dev/dsp? device.  2 channels for output, and 4 channels for
 52  *      input.
 53  *
 54  *      Each APU can do a number of things, but we only really use
 55  *      3 basic functions.  For playback we use them to convert PCM
 56  *      data fetched over PCI by the wavecahche into analog data that
 57  *      is handed to the codec.  One APU for mono, and a pair for stereo.
 58  *      When in stereo, the combination of smarts in the APU and Wavecache
 59  *      decide which wavecache gets the left or right channel.
 60  *
 61  *      For record we still use the old overly mono system.  For each in
 62  *      coming channel the data comes in from the codec, through a 'input'
 63  *      APU, through another rate converter APU, and then into memory via
 64  *      the wavecache and PCI.  If its stereo, we mash it back into LRLR in
 65  *      software.  The pass between the 2 APUs is supposedly what requires us
 66  *      to have a 512 byte buffer sitting around in wavecache/memory.
 67  *
 68  *      The wavecache makes our life even more fun.  First off, it can
 69  *      only address the first 28 bits of PCI address space, making it
 70  *      useless on quite a few architectures.  Secondly, its insane.
 71  *      It claims to fetch from 4 regions of PCI space, each 4 meg in length.
 72  *      But that doesn't really work.  You can only use 1 region.  So all our
 73  *      allocations have to be in 4meg of each other.  Booo.  Hiss.
 74  *      So we have a module parameter, dsps_order, that is the order of
 75  *      the number of dsps to provide.  All their buffer space is allocated
 76  *      on open time.  The sonicvibes OSS routines we inherited really want
 77  *      power of 2 buffers, so we have all those next to each other, then
 78  *      512 byte regions for the recording wavecaches.  This ends up
 79  *      wasting quite a bit of memory.  The only fixes I can see would be 
 80  *      getting a kernel allocator that could work in zones, or figuring out
 81  *      just how to coerce the WP into doing what we want.
 82  *
 83  *      The indirection of the various registers means we have to spinlock
 84  *      nearly all register accesses.  We have the main register indirection
 85  *      like the wave cache, maestro registers, etc.  Then we have beasts
 86  *      like the APU interface that is indirect registers gotten at through
 87  *      the main maestro indirection.  Ouch.  We spinlock around the actual
 88  *      ports on a per card basis.  This means spinlock activity at each IO
 89  *      operation, but the only IO operation clusters are in non critical 
 90  *      paths and it makes the code far easier to follow.  Interrupts are
 91  *      blocked while holding the locks because the int handler has to
 92  *      get at some of them :(.  The mixer interface doesn't, however.
 93  *      We also have an OSS state lock that is thrown around in a few
 94  *      places.
 95  */
 96 
 97 #include <linux/io.h>
 98 #include <linux/delay.h>
 99 #include <linux/interrupt.h>
100 #include <linux/init.h>
101 #include <linux/pci.h>
102 #include <linux/dma-mapping.h>
103 #include <linux/slab.h>
104 #include <linux/gameport.h>
105 #include <linux/module.h>
106 #include <linux/mutex.h>
107 #include <linux/input.h>
108 
109 #include <sound/core.h>
110 #include <sound/pcm.h>
111 #include <sound/mpu401.h>
112 #include <sound/ac97_codec.h>
113 #include <sound/initval.h>
114 
115 #ifdef CONFIG_SND_ES1968_RADIO
116 #include <media/tea575x.h>
117 #endif
118 
119 #define CARD_NAME "ESS Maestro1/2"
120 #define DRIVER_NAME "ES1968"
121 
122 MODULE_DESCRIPTION("ESS Maestro");
123 MODULE_LICENSE("GPL");
124 MODULE_SUPPORTED_DEVICE("{{ESS,Maestro 2e},"
125                 "{ESS,Maestro 2},"
126                 "{ESS,Maestro 1},"
127                 "{TerraTec,DMX}}");
128 
129 #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE))
130 #define SUPPORT_JOYSTICK 1
131 #endif
132 
133 static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX;      /* Index 1-MAX */
134 static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR;       /* ID for this card */
135 static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP;     /* Enable this card */
136 static int total_bufsize[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1024 };
137 static int pcm_substreams_p[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 4 };
138 static int pcm_substreams_c[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 1 };
139 static int clock[SNDRV_CARDS];
140 static int use_pm[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
141 static int enable_mpu[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = 2};
142 #ifdef SUPPORT_JOYSTICK
143 static bool joystick[SNDRV_CARDS];
144 #endif
145 static int radio_nr[SNDRV_CARDS] = {[0 ... (SNDRV_CARDS - 1)] = -1};
146 
147 module_param_array(index, int, NULL, 0444);
148 MODULE_PARM_DESC(index, "Index value for " CARD_NAME " soundcard.");
149 module_param_array(id, charp, NULL, 0444);
150 MODULE_PARM_DESC(id, "ID string for " CARD_NAME " soundcard.");
151 module_param_array(enable, bool, NULL, 0444);
152 MODULE_PARM_DESC(enable, "Enable " CARD_NAME " soundcard.");
153 module_param_array(total_bufsize, int, NULL, 0444);
154 MODULE_PARM_DESC(total_bufsize, "Total buffer size in kB.");
155 module_param_array(pcm_substreams_p, int, NULL, 0444);
156 MODULE_PARM_DESC(pcm_substreams_p, "PCM Playback substreams for " CARD_NAME " soundcard.");
157 module_param_array(pcm_substreams_c, int, NULL, 0444);
158 MODULE_PARM_DESC(pcm_substreams_c, "PCM Capture substreams for " CARD_NAME " soundcard.");
159 module_param_array(clock, int, NULL, 0444);
160 MODULE_PARM_DESC(clock, "Clock on " CARD_NAME " soundcard.  (0 = auto-detect)");
161 module_param_array(use_pm, int, NULL, 0444);
162 MODULE_PARM_DESC(use_pm, "Toggle power-management.  (0 = off, 1 = on, 2 = auto)");
163 module_param_array(enable_mpu, int, NULL, 0444);
164 MODULE_PARM_DESC(enable_mpu, "Enable MPU401.  (0 = off, 1 = on, 2 = auto)");
165 #ifdef SUPPORT_JOYSTICK
166 module_param_array(joystick, bool, NULL, 0444);
167 MODULE_PARM_DESC(joystick, "Enable joystick.");
168 #endif
169 module_param_array(radio_nr, int, NULL, 0444);
170 MODULE_PARM_DESC(radio_nr, "Radio device numbers");
171 
172 
173 
174 #define NR_APUS                 64
175 #define NR_APU_REGS             16
176 
177 /* NEC Versas ? */
178 #define NEC_VERSA_SUBID1        0x80581033
179 #define NEC_VERSA_SUBID2        0x803c1033
180 
181 /* Mode Flags */
182 #define ESS_FMT_STEREO          0x01
183 #define ESS_FMT_16BIT           0x02
184 
185 #define DAC_RUNNING             1
186 #define ADC_RUNNING             2
187 
188 /* Values for the ESM_LEGACY_AUDIO_CONTROL */
189 
190 #define ESS_DISABLE_AUDIO       0x8000
191 #define ESS_ENABLE_SERIAL_IRQ   0x4000
192 #define IO_ADRESS_ALIAS         0x0020
193 #define MPU401_IRQ_ENABLE       0x0010
194 #define MPU401_IO_ENABLE        0x0008
195 #define GAME_IO_ENABLE          0x0004
196 #define FM_IO_ENABLE            0x0002
197 #define SB_IO_ENABLE            0x0001
198 
199 /* Values for the ESM_CONFIG_A */
200 
201 #define PIC_SNOOP1              0x4000
202 #define PIC_SNOOP2              0x2000
203 #define SAFEGUARD               0x0800
204 #define DMA_CLEAR               0x0700
205 #define DMA_DDMA                0x0000
206 #define DMA_TDMA                0x0100
207 #define DMA_PCPCI               0x0200
208 #define POST_WRITE              0x0080
209 #define PCI_TIMING              0x0040
210 #define SWAP_LR                 0x0020
211 #define SUBTR_DECODE            0x0002
212 
213 /* Values for the ESM_CONFIG_B */
214 
215 #define SPDIF_CONFB             0x0100
216 #define HWV_CONFB               0x0080
217 #define DEBOUNCE                0x0040
218 #define GPIO_CONFB              0x0020
219 #define CHI_CONFB               0x0010
220 #define IDMA_CONFB              0x0008  /*undoc */
221 #define MIDI_FIX                0x0004  /*undoc */
222 #define IRQ_TO_ISA              0x0001  /*undoc */
223 
224 /* Values for Ring Bus Control B */
225 #define RINGB_2CODEC_ID_MASK    0x0003
226 #define RINGB_DIS_VALIDATION    0x0008
227 #define RINGB_EN_SPDIF          0x0010
228 #define RINGB_EN_2CODEC         0x0020
229 #define RINGB_SING_BIT_DUAL     0x0040
230 
231 /* ****Port Addresses**** */
232 
233 /*   Write & Read */
234 #define ESM_INDEX               0x02
235 #define ESM_DATA                0x00
236 
237 /*   AC97 + RingBus */
238 #define ESM_AC97_INDEX          0x30
239 #define ESM_AC97_DATA           0x32
240 #define ESM_RING_BUS_DEST       0x34
241 #define ESM_RING_BUS_CONTR_A    0x36
242 #define ESM_RING_BUS_CONTR_B    0x38
243 #define ESM_RING_BUS_SDO        0x3A
244 
245 /*   WaveCache*/
246 #define WC_INDEX                0x10
247 #define WC_DATA                 0x12
248 #define WC_CONTROL              0x14
249 
250 /*   ASSP*/
251 #define ASSP_INDEX              0x80
252 #define ASSP_MEMORY             0x82
253 #define ASSP_DATA               0x84
254 #define ASSP_CONTROL_A          0xA2
255 #define ASSP_CONTROL_B          0xA4
256 #define ASSP_CONTROL_C          0xA6
257 #define ASSP_HOSTW_INDEX        0xA8
258 #define ASSP_HOSTW_DATA         0xAA
259 #define ASSP_HOSTW_IRQ          0xAC
260 /* Midi */
261 #define ESM_MPU401_PORT         0x98
262 /* Others */
263 #define ESM_PORT_HOST_IRQ       0x18
264 
265 #define IDR0_DATA_PORT          0x00
266 #define IDR1_CRAM_POINTER       0x01
267 #define IDR2_CRAM_DATA          0x02
268 #define IDR3_WAVE_DATA          0x03
269 #define IDR4_WAVE_PTR_LOW       0x04
270 #define IDR5_WAVE_PTR_HI        0x05
271 #define IDR6_TIMER_CTRL         0x06
272 #define IDR7_WAVE_ROMRAM        0x07
273 
274 #define WRITEABLE_MAP           0xEFFFFF
275 #define READABLE_MAP            0x64003F
276 
277 /* PCI Register */
278 
279 #define ESM_LEGACY_AUDIO_CONTROL 0x40
280 #define ESM_ACPI_COMMAND        0x54
281 #define ESM_CONFIG_A            0x50
282 #define ESM_CONFIG_B            0x52
283 #define ESM_DDMA                0x60
284 
285 /* Bob Bits */
286 #define ESM_BOB_ENABLE          0x0001
287 #define ESM_BOB_START           0x0001
288 
289 /* Host IRQ Control Bits */
290 #define ESM_RESET_MAESTRO       0x8000
291 #define ESM_RESET_DIRECTSOUND   0x4000
292 #define ESM_HIRQ_ClkRun         0x0100
293 #define ESM_HIRQ_HW_VOLUME      0x0040
294 #define ESM_HIRQ_HARPO          0x0030  /* What's that? */
295 #define ESM_HIRQ_ASSP           0x0010
296 #define ESM_HIRQ_DSIE           0x0004
297 #define ESM_HIRQ_MPU401         0x0002
298 #define ESM_HIRQ_SB             0x0001
299 
300 /* Host IRQ Status Bits */
301 #define ESM_MPU401_IRQ          0x02
302 #define ESM_SB_IRQ              0x01
303 #define ESM_SOUND_IRQ           0x04
304 #define ESM_ASSP_IRQ            0x10
305 #define ESM_HWVOL_IRQ           0x40
306 
307 #define ESS_SYSCLK              50000000
308 #define ESM_BOB_FREQ            200
309 #define ESM_BOB_FREQ_MAX        800
310 
311 #define ESM_FREQ_ESM1           (49152000L / 1024L)     /* default rate 48000 */
312 #define ESM_FREQ_ESM2           (50000000L / 1024L)
313 
314 /* APU Modes: reg 0x00, bit 4-7 */
315 #define ESM_APU_MODE_SHIFT      4
316 #define ESM_APU_MODE_MASK       (0xf << 4)
317 #define ESM_APU_OFF             0x00
318 #define ESM_APU_16BITLINEAR     0x01    /* 16-Bit Linear Sample Player */
319 #define ESM_APU_16BITSTEREO     0x02    /* 16-Bit Stereo Sample Player */
320 #define ESM_APU_8BITLINEAR      0x03    /* 8-Bit Linear Sample Player */
321 #define ESM_APU_8BITSTEREO      0x04    /* 8-Bit Stereo Sample Player */
322 #define ESM_APU_8BITDIFF        0x05    /* 8-Bit Differential Sample Playrer */
323 #define ESM_APU_DIGITALDELAY    0x06    /* Digital Delay Line */
324 #define ESM_APU_DUALTAP         0x07    /* Dual Tap Reader */
325 #define ESM_APU_CORRELATOR      0x08    /* Correlator */
326 #define ESM_APU_INPUTMIXER      0x09    /* Input Mixer */
327 #define ESM_APU_WAVETABLE       0x0A    /* Wave Table Mode */
328 #define ESM_APU_SRCONVERTOR     0x0B    /* Sample Rate Convertor */
329 #define ESM_APU_16BITPINGPONG   0x0C    /* 16-Bit Ping-Pong Sample Player */
330 #define ESM_APU_RESERVED1       0x0D    /* Reserved 1 */
331 #define ESM_APU_RESERVED2       0x0E    /* Reserved 2 */
332 #define ESM_APU_RESERVED3       0x0F    /* Reserved 3 */
333 
334 /* reg 0x00 */
335 #define ESM_APU_FILTER_Q_SHIFT          0
336 #define ESM_APU_FILTER_Q_MASK           (3 << 0)
337 /* APU Filtey Q Control */
338 #define ESM_APU_FILTER_LESSQ    0x00
339 #define ESM_APU_FILTER_MOREQ    0x03
340 
341 #define ESM_APU_FILTER_TYPE_SHIFT       2
342 #define ESM_APU_FILTER_TYPE_MASK        (3 << 2)
343 #define ESM_APU_ENV_TYPE_SHIFT          8
344 #define ESM_APU_ENV_TYPE_MASK           (3 << 8)
345 #define ESM_APU_ENV_STATE_SHIFT         10
346 #define ESM_APU_ENV_STATE_MASK          (3 << 10)
347 #define ESM_APU_END_CURVE               (1 << 12)
348 #define ESM_APU_INT_ON_LOOP             (1 << 13)
349 #define ESM_APU_DMA_ENABLE              (1 << 14)
350 
351 /* reg 0x02 */
352 #define ESM_APU_SUBMIX_GROUP_SHIRT      0
353 #define ESM_APU_SUBMIX_GROUP_MASK       (7 << 0)
354 #define ESM_APU_SUBMIX_MODE             (1 << 3)
355 #define ESM_APU_6dB                     (1 << 4)
356 #define ESM_APU_DUAL_EFFECT             (1 << 5)
357 #define ESM_APU_EFFECT_CHANNELS_SHIFT   6
358 #define ESM_APU_EFFECT_CHANNELS_MASK    (3 << 6)
359 
360 /* reg 0x03 */
361 #define ESM_APU_STEP_SIZE_MASK          0x0fff
362 
363 /* reg 0x04 */
364 #define ESM_APU_PHASE_SHIFT             0
365 #define ESM_APU_PHASE_MASK              (0xff << 0)
366 #define ESM_APU_WAVE64K_PAGE_SHIFT      8       /* most 8bit of wave start offset */
367 #define ESM_APU_WAVE64K_PAGE_MASK       (0xff << 8)
368 
369 /* reg 0x05 - wave start offset */
370 /* reg 0x06 - wave end offset */
371 /* reg 0x07 - wave loop length */
372 
373 /* reg 0x08 */
374 #define ESM_APU_EFFECT_GAIN_SHIFT       0
375 #define ESM_APU_EFFECT_GAIN_MASK        (0xff << 0)
376 #define ESM_APU_TREMOLO_DEPTH_SHIFT     8
377 #define ESM_APU_TREMOLO_DEPTH_MASK      (0xf << 8)
378 #define ESM_APU_TREMOLO_RATE_SHIFT      12
379 #define ESM_APU_TREMOLO_RATE_MASK       (0xf << 12)
380 
381 /* reg 0x09 */
382 /* bit 0-7 amplitude dest? */
383 #define ESM_APU_AMPLITUDE_NOW_SHIFT     8
384 #define ESM_APU_AMPLITUDE_NOW_MASK      (0xff << 8)
385 
386 /* reg 0x0a */
387 #define ESM_APU_POLAR_PAN_SHIFT         0
388 #define ESM_APU_POLAR_PAN_MASK          (0x3f << 0)
389 /* Polar Pan Control */
390 #define ESM_APU_PAN_CENTER_CIRCLE               0x00
391 #define ESM_APU_PAN_MIDDLE_RADIUS               0x01
392 #define ESM_APU_PAN_OUTSIDE_RADIUS              0x02
393 
394 #define ESM_APU_FILTER_TUNING_SHIFT     8
395 #define ESM_APU_FILTER_TUNING_MASK      (0xff << 8)
396 
397 /* reg 0x0b */
398 #define ESM_APU_DATA_SRC_A_SHIFT        0
399 #define ESM_APU_DATA_SRC_A_MASK         (0x7f << 0)
400 #define ESM_APU_INV_POL_A               (1 << 7)
401 #define ESM_APU_DATA_SRC_B_SHIFT        8
402 #define ESM_APU_DATA_SRC_B_MASK         (0x7f << 8)
403 #define ESM_APU_INV_POL_B               (1 << 15)
404 
405 #define ESM_APU_VIBRATO_RATE_SHIFT      0
406 #define ESM_APU_VIBRATO_RATE_MASK       (0xf << 0)
407 #define ESM_APU_VIBRATO_DEPTH_SHIFT     4
408 #define ESM_APU_VIBRATO_DEPTH_MASK      (0xf << 4)
409 #define ESM_APU_VIBRATO_PHASE_SHIFT     8
410 #define ESM_APU_VIBRATO_PHASE_MASK      (0xff << 8)
411 
412 /* reg 0x0c */
413 #define ESM_APU_RADIUS_SELECT           (1 << 6)
414 
415 /* APU Filter Control */
416 #define ESM_APU_FILTER_2POLE_LOPASS     0x00
417 #define ESM_APU_FILTER_2POLE_BANDPASS   0x01
418 #define ESM_APU_FILTER_2POLE_HIPASS     0x02
419 #define ESM_APU_FILTER_1POLE_LOPASS     0x03
420 #define ESM_APU_FILTER_1POLE_HIPASS     0x04
421 #define ESM_APU_FILTER_OFF              0x05
422 
423 /* APU ATFP Type */
424 #define ESM_APU_ATFP_AMPLITUDE                  0x00
425 #define ESM_APU_ATFP_TREMELO                    0x01
426 #define ESM_APU_ATFP_FILTER                     0x02
427 #define ESM_APU_ATFP_PAN                        0x03
428 
429 /* APU ATFP Flags */
430 #define ESM_APU_ATFP_FLG_OFF                    0x00
431 #define ESM_APU_ATFP_FLG_WAIT                   0x01
432 #define ESM_APU_ATFP_FLG_DONE                   0x02
433 #define ESM_APU_ATFP_FLG_INPROCESS              0x03
434 
435 
436 /* capture mixing buffer size */
437 #define ESM_MEM_ALIGN           0x1000
438 #define ESM_MIXBUF_SIZE         0x400
439 
440 #define ESM_MODE_PLAY           0
441 #define ESM_MODE_CAPTURE        1
442 
443 
444 /* APU use in the driver */
445 enum snd_enum_apu_type {
446         ESM_APU_PCM_PLAY,
447         ESM_APU_PCM_CAPTURE,
448         ESM_APU_PCM_RATECONV,
449         ESM_APU_FREE
450 };
451 
452 /* chip type */
453 enum {
454         TYPE_MAESTRO, TYPE_MAESTRO2, TYPE_MAESTRO2E
455 };
456 
457 /* DMA Hack! */
458 struct esm_memory {
459         struct snd_dma_buffer buf;
460         int empty;      /* status */
461         struct list_head list;
462 };
463 
464 /* Playback Channel */
465 struct esschan {
466         int running;
467 
468         u8 apu[4];
469         u8 apu_mode[4];
470 
471         /* playback/capture pcm buffer */
472         struct esm_memory *memory;
473         /* capture mixer buffer */
474         struct esm_memory *mixbuf;
475 
476         unsigned int hwptr;     /* current hw pointer in bytes */
477         unsigned int count;     /* sample counter in bytes */
478         unsigned int dma_size;  /* total buffer size in bytes */
479         unsigned int frag_size; /* period size in bytes */
480         unsigned int wav_shift;
481         u16 base[4];            /* offset for ptr */
482 
483         /* stereo/16bit flag */
484         unsigned char fmt;
485         int mode;       /* playback / capture */
486 
487         int bob_freq;   /* required timer frequency */
488 
489         struct snd_pcm_substream *substream;
490 
491         /* linked list */
492         struct list_head list;
493 
494 #ifdef CONFIG_PM_SLEEP
495         u16 wc_map[4];
496 #endif
497 };
498 
499 struct es1968 {
500         /* Module Config */
501         int total_bufsize;                      /* in bytes */
502 
503         int playback_streams, capture_streams;
504 
505         unsigned int clock;             /* clock */
506         /* for clock measurement */
507         unsigned int in_measurement: 1;
508         unsigned int measure_apu;
509         unsigned int measure_lastpos;
510         unsigned int measure_count;
511 
512         /* buffer */
513         struct snd_dma_buffer dma;
514 
515         /* Resources... */
516         int irq;
517         unsigned long io_port;
518         int type;
519         struct pci_dev *pci;
520         struct snd_card *card;
521         struct snd_pcm *pcm;
522         int do_pm;              /* power-management enabled */
523 
524         /* DMA memory block */
525         struct list_head buf_list;
526 
527         /* ALSA Stuff */
528         struct snd_ac97 *ac97;
529         struct snd_rawmidi *rmidi;
530 
531         spinlock_t reg_lock;
532         unsigned int in_suspend;
533 
534         /* Maestro Stuff */
535         u16 maestro_map[32];
536         int bobclient;          /* active timer instancs */
537         int bob_freq;           /* timer frequency */
538         struct mutex memory_mutex;      /* memory lock */
539 
540         /* APU states */
541         unsigned char apu[NR_APUS];
542 
543         /* active substreams */
544         struct list_head substream_list;
545         spinlock_t substream_lock;
546 
547 #ifdef CONFIG_PM_SLEEP
548         u16 apu_map[NR_APUS][NR_APU_REGS];
549 #endif
550 
551 #ifdef SUPPORT_JOYSTICK
552         struct gameport *gameport;
553 #endif
554 
555 #ifdef CONFIG_SND_ES1968_INPUT
556         struct input_dev *input_dev;
557         char phys[64];                  /* physical device path */
558 #else
559         struct snd_kcontrol *master_switch; /* for h/w volume control */
560         struct snd_kcontrol *master_volume;
561 #endif
562         struct work_struct hwvol_work;
563 
564 #ifdef CONFIG_SND_ES1968_RADIO
565         struct v4l2_device v4l2_dev;
566         struct snd_tea575x tea;
567         unsigned int tea575x_tuner;
568 #endif
569 };
570 
571 static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id);
572 
573 static const struct pci_device_id snd_es1968_ids[] = {
574         /* Maestro 1 */
575         { 0x1285, 0x0100, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO },
576         /* Maestro 2 */
577         { 0x125d, 0x1968, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2 },
578         /* Maestro 2E */
579         { 0x125d, 0x1978, PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_MULTIMEDIA_AUDIO << 8, 0xffff00, TYPE_MAESTRO2E },
580         { 0, }
581 };
582 
583 MODULE_DEVICE_TABLE(pci, snd_es1968_ids);
584 
585 /* *********************
586    * Low Level Funcs!  *
587    *********************/
588 
589 /* no spinlock */
590 static void __maestro_write(struct es1968 *chip, u16 reg, u16 data)
591 {
592         outw(reg, chip->io_port + ESM_INDEX);
593         outw(data, chip->io_port + ESM_DATA);
594         chip->maestro_map[reg] = data;
595 }
596 
597 static inline void maestro_write(struct es1968 *chip, u16 reg, u16 data)
598 {
599         unsigned long flags;
600         spin_lock_irqsave(&chip->reg_lock, flags);
601         __maestro_write(chip, reg, data);
602         spin_unlock_irqrestore(&chip->reg_lock, flags);
603 }
604 
605 /* no spinlock */
606 static u16 __maestro_read(struct es1968 *chip, u16 reg)
607 {
608         if (READABLE_MAP & (1 << reg)) {
609                 outw(reg, chip->io_port + ESM_INDEX);
610                 chip->maestro_map[reg] = inw(chip->io_port + ESM_DATA);
611         }
612         return chip->maestro_map[reg];
613 }
614 
615 static inline u16 maestro_read(struct es1968 *chip, u16 reg)
616 {
617         unsigned long flags;
618         u16 result;
619         spin_lock_irqsave(&chip->reg_lock, flags);
620         result = __maestro_read(chip, reg);
621         spin_unlock_irqrestore(&chip->reg_lock, flags);
622         return result;
623 }
624 
625 /* Wait for the codec bus to be free */
626 static int snd_es1968_ac97_wait(struct es1968 *chip)
627 {
628         int timeout = 100000;
629 
630         while (timeout-- > 0) {
631                 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
632                         return 0;
633                 cond_resched();
634         }
635         dev_dbg(chip->card->dev, "ac97 timeout\n");
636         return 1; /* timeout */
637 }
638 
639 static int snd_es1968_ac97_wait_poll(struct es1968 *chip)
640 {
641         int timeout = 100000;
642 
643         while (timeout-- > 0) {
644                 if (!(inb(chip->io_port + ESM_AC97_INDEX) & 1))
645                         return 0;
646         }
647         dev_dbg(chip->card->dev, "ac97 timeout\n");
648         return 1; /* timeout */
649 }
650 
651 static void snd_es1968_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short val)
652 {
653         struct es1968 *chip = ac97->private_data;
654 
655         snd_es1968_ac97_wait(chip);
656 
657         /* Write the bus */
658         outw(val, chip->io_port + ESM_AC97_DATA);
659         /*msleep(1);*/
660         outb(reg, chip->io_port + ESM_AC97_INDEX);
661         /*msleep(1);*/
662 }
663 
664 static unsigned short snd_es1968_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
665 {
666         u16 data = 0;
667         struct es1968 *chip = ac97->private_data;
668 
669         snd_es1968_ac97_wait(chip);
670 
671         outb(reg | 0x80, chip->io_port + ESM_AC97_INDEX);
672         /*msleep(1);*/
673 
674         if (!snd_es1968_ac97_wait_poll(chip)) {
675                 data = inw(chip->io_port + ESM_AC97_DATA);
676                 /*msleep(1);*/
677         }
678 
679         return data;
680 }
681 
682 /* no spinlock */
683 static void apu_index_set(struct es1968 *chip, u16 index)
684 {
685         int i;
686         __maestro_write(chip, IDR1_CRAM_POINTER, index);
687         for (i = 0; i < 1000; i++)
688                 if (__maestro_read(chip, IDR1_CRAM_POINTER) == index)
689                         return;
690         dev_dbg(chip->card->dev, "APU register select failed. (Timeout)\n");
691 }
692 
693 /* no spinlock */
694 static void apu_data_set(struct es1968 *chip, u16 data)
695 {
696         int i;
697         for (i = 0; i < 1000; i++) {
698                 if (__maestro_read(chip, IDR0_DATA_PORT) == data)
699                         return;
700                 __maestro_write(chip, IDR0_DATA_PORT, data);
701         }
702         dev_dbg(chip->card->dev, "APU register set probably failed (Timeout)!\n");
703 }
704 
705 /* no spinlock */
706 static void __apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
707 {
708         if (snd_BUG_ON(channel >= NR_APUS))
709                 return;
710 #ifdef CONFIG_PM_SLEEP
711         chip->apu_map[channel][reg] = data;
712 #endif
713         reg |= (channel << 4);
714         apu_index_set(chip, reg);
715         apu_data_set(chip, data);
716 }
717 
718 static void apu_set_register(struct es1968 *chip, u16 channel, u8 reg, u16 data)
719 {
720         unsigned long flags;
721         spin_lock_irqsave(&chip->reg_lock, flags);
722         __apu_set_register(chip, channel, reg, data);
723         spin_unlock_irqrestore(&chip->reg_lock, flags);
724 }
725 
726 static u16 __apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
727 {
728         if (snd_BUG_ON(channel >= NR_APUS))
729                 return 0;
730         reg |= (channel << 4);
731         apu_index_set(chip, reg);
732         return __maestro_read(chip, IDR0_DATA_PORT);
733 }
734 
735 static u16 apu_get_register(struct es1968 *chip, u16 channel, u8 reg)
736 {
737         unsigned long flags;
738         u16 v;
739         spin_lock_irqsave(&chip->reg_lock, flags);
740         v = __apu_get_register(chip, channel, reg);
741         spin_unlock_irqrestore(&chip->reg_lock, flags);
742         return v;
743 }
744 
745 #if 0 /* ASSP is not supported */
746 
747 static void assp_set_register(struct es1968 *chip, u32 reg, u32 value)
748 {
749         unsigned long flags;
750 
751         spin_lock_irqsave(&chip->reg_lock, flags);
752         outl(reg, chip->io_port + ASSP_INDEX);
753         outl(value, chip->io_port + ASSP_DATA);
754         spin_unlock_irqrestore(&chip->reg_lock, flags);
755 }
756 
757 static u32 assp_get_register(struct es1968 *chip, u32 reg)
758 {
759         unsigned long flags;
760         u32 value;
761 
762         spin_lock_irqsave(&chip->reg_lock, flags);
763         outl(reg, chip->io_port + ASSP_INDEX);
764         value = inl(chip->io_port + ASSP_DATA);
765         spin_unlock_irqrestore(&chip->reg_lock, flags);
766 
767         return value;
768 }
769 
770 #endif
771 
772 static void wave_set_register(struct es1968 *chip, u16 reg, u16 value)
773 {
774         unsigned long flags;
775 
776         spin_lock_irqsave(&chip->reg_lock, flags);
777         outw(reg, chip->io_port + WC_INDEX);
778         outw(value, chip->io_port + WC_DATA);
779         spin_unlock_irqrestore(&chip->reg_lock, flags);
780 }
781 
782 static u16 wave_get_register(struct es1968 *chip, u16 reg)
783 {
784         unsigned long flags;
785         u16 value;
786 
787         spin_lock_irqsave(&chip->reg_lock, flags);
788         outw(reg, chip->io_port + WC_INDEX);
789         value = inw(chip->io_port + WC_DATA);
790         spin_unlock_irqrestore(&chip->reg_lock, flags);
791 
792         return value;
793 }
794 
795 /* *******************
796    * Bob the Timer!  *
797    *******************/
798 
799 static void snd_es1968_bob_stop(struct es1968 *chip)
800 {
801         u16 reg;
802 
803         reg = __maestro_read(chip, 0x11);
804         reg &= ~ESM_BOB_ENABLE;
805         __maestro_write(chip, 0x11, reg);
806         reg = __maestro_read(chip, 0x17);
807         reg &= ~ESM_BOB_START;
808         __maestro_write(chip, 0x17, reg);
809 }
810 
811 static void snd_es1968_bob_start(struct es1968 *chip)
812 {
813         int prescale;
814         int divide;
815 
816         /* compute ideal interrupt frequency for buffer size & play rate */
817         /* first, find best prescaler value to match freq */
818         for (prescale = 5; prescale < 12; prescale++)
819                 if (chip->bob_freq > (ESS_SYSCLK >> (prescale + 9)))
820                         break;
821 
822         /* next, back off prescaler whilst getting divider into optimum range */
823         divide = 1;
824         while ((prescale > 5) && (divide < 32)) {
825                 prescale--;
826                 divide <<= 1;
827         }
828         divide >>= 1;
829 
830         /* now fine-tune the divider for best match */
831         for (; divide < 31; divide++)
832                 if (chip->bob_freq >
833                     ((ESS_SYSCLK >> (prescale + 9)) / (divide + 1))) break;
834 
835         /* divide = 0 is illegal, but don't let prescale = 4! */
836         if (divide == 0) {
837                 divide++;
838                 if (prescale > 5)
839                         prescale--;
840         } else if (divide > 1)
841                 divide--;
842 
843         __maestro_write(chip, 6, 0x9000 | (prescale << 5) | divide);    /* set reg */
844 
845         /* Now set IDR 11/17 */
846         __maestro_write(chip, 0x11, __maestro_read(chip, 0x11) | 1);
847         __maestro_write(chip, 0x17, __maestro_read(chip, 0x17) | 1);
848 }
849 
850 /* call with substream spinlock */
851 static void snd_es1968_bob_inc(struct es1968 *chip, int freq)
852 {
853         chip->bobclient++;
854         if (chip->bobclient == 1) {
855                 chip->bob_freq = freq;
856                 snd_es1968_bob_start(chip);
857         } else if (chip->bob_freq < freq) {
858                 snd_es1968_bob_stop(chip);
859                 chip->bob_freq = freq;
860                 snd_es1968_bob_start(chip);
861         }
862 }
863 
864 /* call with substream spinlock */
865 static void snd_es1968_bob_dec(struct es1968 *chip)
866 {
867         chip->bobclient--;
868         if (chip->bobclient <= 0)
869                 snd_es1968_bob_stop(chip);
870         else if (chip->bob_freq > ESM_BOB_FREQ) {
871                 /* check reduction of timer frequency */
872                 int max_freq = ESM_BOB_FREQ;
873                 struct esschan *es;
874                 list_for_each_entry(es, &chip->substream_list, list) {
875                         if (max_freq < es->bob_freq)
876                                 max_freq = es->bob_freq;
877                 }
878                 if (max_freq != chip->bob_freq) {
879                         snd_es1968_bob_stop(chip);
880                         chip->bob_freq = max_freq;
881                         snd_es1968_bob_start(chip);
882                 }
883         }
884 }
885 
886 static int
887 snd_es1968_calc_bob_rate(struct es1968 *chip, struct esschan *es,
888                          struct snd_pcm_runtime *runtime)
889 {
890         /* we acquire 4 interrupts per period for precise control.. */
891         int freq = runtime->rate * 4;
892         if (es->fmt & ESS_FMT_STEREO)
893                 freq <<= 1;
894         if (es->fmt & ESS_FMT_16BIT)
895                 freq <<= 1;
896         freq /= es->frag_size;
897         if (freq < ESM_BOB_FREQ)
898                 freq = ESM_BOB_FREQ;
899         else if (freq > ESM_BOB_FREQ_MAX)
900                 freq = ESM_BOB_FREQ_MAX;
901         return freq;
902 }
903 
904 
905 /*************
906  *  PCM Part *
907  *************/
908 
909 static u32 snd_es1968_compute_rate(struct es1968 *chip, u32 freq)
910 {
911         u32 rate = (freq << 16) / chip->clock;
912 #if 0 /* XXX: do we need this? */ 
913         if (rate > 0x10000)
914                 rate = 0x10000;
915 #endif
916         return rate;
917 }
918 
919 /* get current pointer */
920 static inline unsigned int
921 snd_es1968_get_dma_ptr(struct es1968 *chip, struct esschan *es)
922 {
923         unsigned int offset;
924 
925         offset = apu_get_register(chip, es->apu[0], 5);
926 
927         offset -= es->base[0];
928 
929         return (offset & 0xFFFE);       /* hardware is in words */
930 }
931 
932 static void snd_es1968_apu_set_freq(struct es1968 *chip, int apu, int freq)
933 {
934         apu_set_register(chip, apu, 2,
935                            (apu_get_register(chip, apu, 2) & 0x00FF) |
936                            ((freq & 0xff) << 8) | 0x10);
937         apu_set_register(chip, apu, 3, freq >> 8);
938 }
939 
940 /* spin lock held */
941 static inline void snd_es1968_trigger_apu(struct es1968 *esm, int apu, int mode)
942 {
943         /* set the APU mode */
944         __apu_set_register(esm, apu, 0,
945                            (__apu_get_register(esm, apu, 0) & 0xff0f) |
946                            (mode << 4));
947 }
948 
949 static void snd_es1968_pcm_start(struct es1968 *chip, struct esschan *es)
950 {
951         spin_lock(&chip->reg_lock);
952         __apu_set_register(chip, es->apu[0], 5, es->base[0]);
953         snd_es1968_trigger_apu(chip, es->apu[0], es->apu_mode[0]);
954         if (es->mode == ESM_MODE_CAPTURE) {
955                 __apu_set_register(chip, es->apu[2], 5, es->base[2]);
956                 snd_es1968_trigger_apu(chip, es->apu[2], es->apu_mode[2]);
957         }
958         if (es->fmt & ESS_FMT_STEREO) {
959                 __apu_set_register(chip, es->apu[1], 5, es->base[1]);
960                 snd_es1968_trigger_apu(chip, es->apu[1], es->apu_mode[1]);
961                 if (es->mode == ESM_MODE_CAPTURE) {
962                         __apu_set_register(chip, es->apu[3], 5, es->base[3]);
963                         snd_es1968_trigger_apu(chip, es->apu[3], es->apu_mode[3]);
964                 }
965         }
966         spin_unlock(&chip->reg_lock);
967 }
968 
969 static void snd_es1968_pcm_stop(struct es1968 *chip, struct esschan *es)
970 {
971         spin_lock(&chip->reg_lock);
972         snd_es1968_trigger_apu(chip, es->apu[0], 0);
973         snd_es1968_trigger_apu(chip, es->apu[1], 0);
974         if (es->mode == ESM_MODE_CAPTURE) {
975                 snd_es1968_trigger_apu(chip, es->apu[2], 0);
976                 snd_es1968_trigger_apu(chip, es->apu[3], 0);
977         }
978         spin_unlock(&chip->reg_lock);
979 }
980 
981 /* set the wavecache control reg */
982 static void snd_es1968_program_wavecache(struct es1968 *chip, struct esschan *es,
983                                          int channel, u32 addr, int capture)
984 {
985         u32 tmpval = (addr - 0x10) & 0xFFF8;
986 
987         if (! capture) {
988                 if (!(es->fmt & ESS_FMT_16BIT))
989                         tmpval |= 4;    /* 8bit */
990                 if (es->fmt & ESS_FMT_STEREO)
991                         tmpval |= 2;    /* stereo */
992         }
993 
994         /* set the wavecache control reg */
995         wave_set_register(chip, es->apu[channel] << 3, tmpval);
996 
997 #ifdef CONFIG_PM_SLEEP
998         es->wc_map[channel] = tmpval;
999 #endif
1000 }
1001 
1002 
1003 static void snd_es1968_playback_setup(struct es1968 *chip, struct esschan *es,
1004                                       struct snd_pcm_runtime *runtime)
1005 {
1006         u32 pa;
1007         int high_apu = 0;
1008         int channel, apu;
1009         int i, size;
1010         unsigned long flags;
1011         u32 freq;
1012 
1013         size = es->dma_size >> es->wav_shift;
1014 
1015         if (es->fmt & ESS_FMT_STEREO)
1016                 high_apu++;
1017 
1018         for (channel = 0; channel <= high_apu; channel++) {
1019                 apu = es->apu[channel];
1020 
1021                 snd_es1968_program_wavecache(chip, es, channel, es->memory->buf.addr, 0);
1022 
1023                 /* Offset to PCMBAR */
1024                 pa = es->memory->buf.addr;
1025                 pa -= chip->dma.addr;
1026                 pa >>= 1;       /* words */
1027 
1028                 pa |= 0x00400000;       /* System RAM (Bit 22) */
1029 
1030                 if (es->fmt & ESS_FMT_STEREO) {
1031                         /* Enable stereo */
1032                         if (channel)
1033                                 pa |= 0x00800000;       /* (Bit 23) */
1034                         if (es->fmt & ESS_FMT_16BIT)
1035                                 pa >>= 1;
1036                 }
1037 
1038                 /* base offset of dma calcs when reading the pointer
1039                    on this left one */
1040                 es->base[channel] = pa & 0xFFFF;
1041 
1042                 for (i = 0; i < 16; i++)
1043                         apu_set_register(chip, apu, i, 0x0000);
1044 
1045                 /* Load the buffer into the wave engine */
1046                 apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1047                 apu_set_register(chip, apu, 5, pa & 0xFFFF);
1048                 apu_set_register(chip, apu, 6, (pa + size) & 0xFFFF);
1049                 /* setting loop == sample len */
1050                 apu_set_register(chip, apu, 7, size);
1051 
1052                 /* clear effects/env.. */
1053                 apu_set_register(chip, apu, 8, 0x0000);
1054                 /* set amp now to 0xd0 (?), low byte is 'amplitude dest'? */
1055                 apu_set_register(chip, apu, 9, 0xD000);
1056 
1057                 /* clear routing stuff */
1058                 apu_set_register(chip, apu, 11, 0x0000);
1059                 /* dma on, no envelopes, filter to all 1s) */
1060                 apu_set_register(chip, apu, 0, 0x400F);
1061 
1062                 if (es->fmt & ESS_FMT_16BIT)
1063                         es->apu_mode[channel] = ESM_APU_16BITLINEAR;
1064                 else
1065                         es->apu_mode[channel] = ESM_APU_8BITLINEAR;
1066 
1067                 if (es->fmt & ESS_FMT_STEREO) {
1068                         /* set panning: left or right */
1069                         /* Check: different panning. On my Canyon 3D Chipset the
1070                            Channels are swapped. I don't know, about the output
1071                            to the SPDif Link. Perhaps you have to change this
1072                            and not the APU Regs 4-5. */
1073                         apu_set_register(chip, apu, 10,
1074                                          0x8F00 | (channel ? 0 : 0x10));
1075                         es->apu_mode[channel] += 1;     /* stereo */
1076                 } else
1077                         apu_set_register(chip, apu, 10, 0x8F08);
1078         }
1079 
1080         spin_lock_irqsave(&chip->reg_lock, flags);
1081         /* clear WP interrupts */
1082         outw(1, chip->io_port + 0x04);
1083         /* enable WP ints */
1084         outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1085         spin_unlock_irqrestore(&chip->reg_lock, flags);
1086 
1087         freq = runtime->rate;
1088         /* set frequency */
1089         if (freq > 48000)
1090                 freq = 48000;
1091         if (freq < 4000)
1092                 freq = 4000;
1093 
1094         /* hmmm.. */
1095         if (!(es->fmt & ESS_FMT_16BIT) && !(es->fmt & ESS_FMT_STEREO))
1096                 freq >>= 1;
1097 
1098         freq = snd_es1968_compute_rate(chip, freq);
1099 
1100         /* Load the frequency, turn on 6dB */
1101         snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1102         snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1103 }
1104 
1105 
1106 static void init_capture_apu(struct es1968 *chip, struct esschan *es, int channel,
1107                              unsigned int pa, unsigned int bsize,
1108                              int mode, int route)
1109 {
1110         int i, apu = es->apu[channel];
1111 
1112         es->apu_mode[channel] = mode;
1113 
1114         /* set the wavecache control reg */
1115         snd_es1968_program_wavecache(chip, es, channel, pa, 1);
1116 
1117         /* Offset to PCMBAR */
1118         pa -= chip->dma.addr;
1119         pa >>= 1;       /* words */
1120 
1121         /* base offset of dma calcs when reading the pointer
1122            on this left one */
1123         es->base[channel] = pa & 0xFFFF;
1124         pa |= 0x00400000;       /* bit 22 -> System RAM */
1125 
1126         /* Begin loading the APU */
1127         for (i = 0; i < 16; i++)
1128                 apu_set_register(chip, apu, i, 0x0000);
1129 
1130         /* need to enable subgroups.. and we should probably
1131            have different groups for different /dev/dsps..  */
1132         apu_set_register(chip, apu, 2, 0x8);
1133 
1134         /* Load the buffer into the wave engine */
1135         apu_set_register(chip, apu, 4, ((pa >> 16) & 0xFF) << 8);
1136         apu_set_register(chip, apu, 5, pa & 0xFFFF);
1137         apu_set_register(chip, apu, 6, (pa + bsize) & 0xFFFF);
1138         apu_set_register(chip, apu, 7, bsize);
1139         /* clear effects/env.. */
1140         apu_set_register(chip, apu, 8, 0x00F0);
1141         /* amplitude now?  sure.  why not.  */
1142         apu_set_register(chip, apu, 9, 0x0000);
1143         /* set filter tune, radius, polar pan */
1144         apu_set_register(chip, apu, 10, 0x8F08);
1145         /* route input */
1146         apu_set_register(chip, apu, 11, route);
1147         /* dma on, no envelopes, filter to all 1s) */
1148         apu_set_register(chip, apu, 0, 0x400F);
1149 }
1150 
1151 static void snd_es1968_capture_setup(struct es1968 *chip, struct esschan *es,
1152                                      struct snd_pcm_runtime *runtime)
1153 {
1154         int size;
1155         u32 freq;
1156         unsigned long flags;
1157 
1158         size = es->dma_size >> es->wav_shift;
1159 
1160         /* APU assignments:
1161            0 = mono/left SRC
1162            1 = right SRC
1163            2 = mono/left Input Mixer
1164            3 = right Input Mixer
1165         */
1166         /* data seems to flow from the codec, through an apu into
1167            the 'mixbuf' bit of page, then through the SRC apu
1168            and out to the real 'buffer'.  ok.  sure.  */
1169 
1170         /* input mixer (left/mono) */
1171         /* parallel in crap, see maestro reg 0xC [8-11] */
1172         init_capture_apu(chip, es, 2,
1173                          es->mixbuf->buf.addr, ESM_MIXBUF_SIZE/4, /* in words */
1174                          ESM_APU_INPUTMIXER, 0x14);
1175         /* SRC (left/mono); get input from inputing apu */
1176         init_capture_apu(chip, es, 0, es->memory->buf.addr, size,
1177                          ESM_APU_SRCONVERTOR, es->apu[2]);
1178         if (es->fmt & ESS_FMT_STEREO) {
1179                 /* input mixer (right) */
1180                 init_capture_apu(chip, es, 3,
1181                                  es->mixbuf->buf.addr + ESM_MIXBUF_SIZE/2,
1182                                  ESM_MIXBUF_SIZE/4, /* in words */
1183                                  ESM_APU_INPUTMIXER, 0x15);
1184                 /* SRC (right) */
1185                 init_capture_apu(chip, es, 1,
1186                                  es->memory->buf.addr + size*2, size,
1187                                  ESM_APU_SRCONVERTOR, es->apu[3]);
1188         }
1189 
1190         freq = runtime->rate;
1191         /* Sample Rate conversion APUs don't like 0x10000 for their rate */
1192         if (freq > 47999)
1193                 freq = 47999;
1194         if (freq < 4000)
1195                 freq = 4000;
1196 
1197         freq = snd_es1968_compute_rate(chip, freq);
1198 
1199         /* Load the frequency, turn on 6dB */
1200         snd_es1968_apu_set_freq(chip, es->apu[0], freq);
1201         snd_es1968_apu_set_freq(chip, es->apu[1], freq);
1202 
1203         /* fix mixer rate at 48khz.  and its _must_ be 0x10000. */
1204         freq = 0x10000;
1205         snd_es1968_apu_set_freq(chip, es->apu[2], freq);
1206         snd_es1968_apu_set_freq(chip, es->apu[3], freq);
1207 
1208         spin_lock_irqsave(&chip->reg_lock, flags);
1209         /* clear WP interrupts */
1210         outw(1, chip->io_port + 0x04);
1211         /* enable WP ints */
1212         outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ);
1213         spin_unlock_irqrestore(&chip->reg_lock, flags);
1214 }
1215 
1216 /*******************
1217  *  ALSA Interface *
1218  *******************/
1219 
1220 static int snd_es1968_pcm_prepare(struct snd_pcm_substream *substream)
1221 {
1222         struct es1968 *chip = snd_pcm_substream_chip(substream);
1223         struct snd_pcm_runtime *runtime = substream->runtime;
1224         struct esschan *es = runtime->private_data;
1225 
1226         es->dma_size = snd_pcm_lib_buffer_bytes(substream);
1227         es->frag_size = snd_pcm_lib_period_bytes(substream);
1228 
1229         es->wav_shift = 1; /* maestro handles always 16bit */
1230         es->fmt = 0;
1231         if (snd_pcm_format_width(runtime->format) == 16)
1232                 es->fmt |= ESS_FMT_16BIT;
1233         if (runtime->channels > 1) {
1234                 es->fmt |= ESS_FMT_STEREO;
1235                 if (es->fmt & ESS_FMT_16BIT) /* 8bit is already word shifted */
1236                         es->wav_shift++;
1237         }
1238         es->bob_freq = snd_es1968_calc_bob_rate(chip, es, runtime);
1239 
1240         switch (es->mode) {
1241         case ESM_MODE_PLAY:
1242                 snd_es1968_playback_setup(chip, es, runtime);
1243                 break;
1244         case ESM_MODE_CAPTURE:
1245                 snd_es1968_capture_setup(chip, es, runtime);
1246                 break;
1247         }
1248 
1249         return 0;
1250 }
1251 
1252 static int snd_es1968_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
1253 {
1254         struct es1968 *chip = snd_pcm_substream_chip(substream);
1255         struct esschan *es = substream->runtime->private_data;
1256 
1257         spin_lock(&chip->substream_lock);
1258         switch (cmd) {
1259         case SNDRV_PCM_TRIGGER_START:
1260         case SNDRV_PCM_TRIGGER_RESUME:
1261                 if (es->running)
1262                         break;
1263                 snd_es1968_bob_inc(chip, es->bob_freq);
1264                 es->count = 0;
1265                 es->hwptr = 0;
1266                 snd_es1968_pcm_start(chip, es);
1267                 es->running = 1;
1268                 break;
1269         case SNDRV_PCM_TRIGGER_STOP:
1270         case SNDRV_PCM_TRIGGER_SUSPEND:
1271                 if (! es->running)
1272                         break;
1273                 snd_es1968_pcm_stop(chip, es);
1274                 es->running = 0;
1275                 snd_es1968_bob_dec(chip);
1276                 break;
1277         }
1278         spin_unlock(&chip->substream_lock);
1279         return 0;
1280 }
1281 
1282 static snd_pcm_uframes_t snd_es1968_pcm_pointer(struct snd_pcm_substream *substream)
1283 {
1284         struct es1968 *chip = snd_pcm_substream_chip(substream);
1285         struct esschan *es = substream->runtime->private_data;
1286         unsigned int ptr;
1287 
1288         ptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1289         
1290         return bytes_to_frames(substream->runtime, ptr % es->dma_size);
1291 }
1292 
1293 static struct snd_pcm_hardware snd_es1968_playback = {
1294         .info =                 (SNDRV_PCM_INFO_MMAP |
1295                                  SNDRV_PCM_INFO_MMAP_VALID |
1296                                  SNDRV_PCM_INFO_INTERLEAVED |
1297                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
1298                                  /*SNDRV_PCM_INFO_PAUSE |*/
1299                                  SNDRV_PCM_INFO_RESUME),
1300         .formats =              SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE,
1301         .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1302         .rate_min =             4000,
1303         .rate_max =             48000,
1304         .channels_min =         1,
1305         .channels_max =         2,
1306         .buffer_bytes_max =     65536,
1307         .period_bytes_min =     256,
1308         .period_bytes_max =     65536,
1309         .periods_min =          1,
1310         .periods_max =          1024,
1311         .fifo_size =            0,
1312 };
1313 
1314 static struct snd_pcm_hardware snd_es1968_capture = {
1315         .info =                 (SNDRV_PCM_INFO_NONINTERLEAVED |
1316                                  SNDRV_PCM_INFO_MMAP |
1317                                  SNDRV_PCM_INFO_MMAP_VALID |
1318                                  SNDRV_PCM_INFO_BLOCK_TRANSFER |
1319                                  /*SNDRV_PCM_INFO_PAUSE |*/
1320                                  SNDRV_PCM_INFO_RESUME),
1321         .formats =              /*SNDRV_PCM_FMTBIT_U8 |*/ SNDRV_PCM_FMTBIT_S16_LE,
1322         .rates =                SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
1323         .rate_min =             4000,
1324         .rate_max =             48000,
1325         .channels_min =         1,
1326         .channels_max =         2,
1327         .buffer_bytes_max =     65536,
1328         .period_bytes_min =     256,
1329         .period_bytes_max =     65536,
1330         .periods_min =          1,
1331         .periods_max =          1024,
1332         .fifo_size =            0,
1333 };
1334 
1335 /* *************************
1336    * DMA memory management *
1337    *************************/
1338 
1339 /* Because the Maestro can only take addresses relative to the PCM base address
1340    register :( */
1341 
1342 static int calc_available_memory_size(struct es1968 *chip)
1343 {
1344         int max_size = 0;
1345         struct esm_memory *buf;
1346 
1347         mutex_lock(&chip->memory_mutex);
1348         list_for_each_entry(buf, &chip->buf_list, list) {
1349                 if (buf->empty && buf->buf.bytes > max_size)
1350                         max_size = buf->buf.bytes;
1351         }
1352         mutex_unlock(&chip->memory_mutex);
1353         if (max_size >= 128*1024)
1354                 max_size = 127*1024;
1355         return max_size;
1356 }
1357 
1358 /* allocate a new memory chunk with the specified size */
1359 static struct esm_memory *snd_es1968_new_memory(struct es1968 *chip, int size)
1360 {
1361         struct esm_memory *buf;
1362 
1363         size = ALIGN(size, ESM_MEM_ALIGN);
1364         mutex_lock(&chip->memory_mutex);
1365         list_for_each_entry(buf, &chip->buf_list, list) {
1366                 if (buf->empty && buf->buf.bytes >= size)
1367                         goto __found;
1368         }
1369         mutex_unlock(&chip->memory_mutex);
1370         return NULL;
1371 
1372 __found:
1373         if (buf->buf.bytes > size) {
1374                 struct esm_memory *chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1375                 if (chunk == NULL) {
1376                         mutex_unlock(&chip->memory_mutex);
1377                         return NULL;
1378                 }
1379                 chunk->buf = buf->buf;
1380                 chunk->buf.bytes -= size;
1381                 chunk->buf.area += size;
1382                 chunk->buf.addr += size;
1383                 chunk->empty = 1;
1384                 buf->buf.bytes = size;
1385                 list_add(&chunk->list, &buf->list);
1386         }
1387         buf->empty = 0;
1388         mutex_unlock(&chip->memory_mutex);
1389         return buf;
1390 }
1391 
1392 /* free a memory chunk */
1393 static void snd_es1968_free_memory(struct es1968 *chip, struct esm_memory *buf)
1394 {
1395         struct esm_memory *chunk;
1396 
1397         mutex_lock(&chip->memory_mutex);
1398         buf->empty = 1;
1399         if (buf->list.prev != &chip->buf_list) {
1400                 chunk = list_entry(buf->list.prev, struct esm_memory, list);
1401                 if (chunk->empty) {
1402                         chunk->buf.bytes += buf->buf.bytes;
1403                         list_del(&buf->list);
1404                         kfree(buf);
1405                         buf = chunk;
1406                 }
1407         }
1408         if (buf->list.next != &chip->buf_list) {
1409                 chunk = list_entry(buf->list.next, struct esm_memory, list);
1410                 if (chunk->empty) {
1411                         buf->buf.bytes += chunk->buf.bytes;
1412                         list_del(&chunk->list);
1413                         kfree(chunk);
1414                 }
1415         }
1416         mutex_unlock(&chip->memory_mutex);
1417 }
1418 
1419 static void snd_es1968_free_dmabuf(struct es1968 *chip)
1420 {
1421         struct list_head *p;
1422 
1423         if (! chip->dma.area)
1424                 return;
1425         snd_dma_free_pages(&chip->dma);
1426         while ((p = chip->buf_list.next) != &chip->buf_list) {
1427                 struct esm_memory *chunk = list_entry(p, struct esm_memory, list);
1428                 list_del(p);
1429                 kfree(chunk);
1430         }
1431 }
1432 
1433 static int
1434 snd_es1968_init_dmabuf(struct es1968 *chip)
1435 {
1436         int err;
1437         struct esm_memory *chunk;
1438 
1439         chip->dma.dev.type = SNDRV_DMA_TYPE_DEV;
1440         chip->dma.dev.dev = snd_dma_pci_data(chip->pci);
1441         err = snd_dma_alloc_pages_fallback(SNDRV_DMA_TYPE_DEV,
1442                                            snd_dma_pci_data(chip->pci),
1443                                            chip->total_bufsize, &chip->dma);
1444         if (err < 0 || ! chip->dma.area) {
1445                 dev_err(chip->card->dev,
1446                         "can't allocate dma pages for size %d\n",
1447                            chip->total_bufsize);
1448                 return -ENOMEM;
1449         }
1450         if ((chip->dma.addr + chip->dma.bytes - 1) & ~((1 << 28) - 1)) {
1451                 snd_dma_free_pages(&chip->dma);
1452                 dev_err(chip->card->dev, "DMA buffer beyond 256MB.\n");
1453                 return -ENOMEM;
1454         }
1455 
1456         INIT_LIST_HEAD(&chip->buf_list);
1457         /* allocate an empty chunk */
1458         chunk = kmalloc(sizeof(*chunk), GFP_KERNEL);
1459         if (chunk == NULL) {
1460                 snd_es1968_free_dmabuf(chip);
1461                 return -ENOMEM;
1462         }
1463         memset(chip->dma.area, 0, ESM_MEM_ALIGN);
1464         chunk->buf = chip->dma;
1465         chunk->buf.area += ESM_MEM_ALIGN;
1466         chunk->buf.addr += ESM_MEM_ALIGN;
1467         chunk->buf.bytes -= ESM_MEM_ALIGN;
1468         chunk->empty = 1;
1469         list_add(&chunk->list, &chip->buf_list);
1470 
1471         return 0;
1472 }
1473 
1474 /* setup the dma_areas */
1475 /* buffer is extracted from the pre-allocated memory chunk */
1476 static int snd_es1968_hw_params(struct snd_pcm_substream *substream,
1477                                 struct snd_pcm_hw_params *hw_params)
1478 {
1479         struct es1968 *chip = snd_pcm_substream_chip(substream);
1480         struct snd_pcm_runtime *runtime = substream->runtime;
1481         struct esschan *chan = runtime->private_data;
1482         int size = params_buffer_bytes(hw_params);
1483 
1484         if (chan->memory) {
1485                 if (chan->memory->buf.bytes >= size) {
1486                         runtime->dma_bytes = size;
1487                         return 0;
1488                 }
1489                 snd_es1968_free_memory(chip, chan->memory);
1490         }
1491         chan->memory = snd_es1968_new_memory(chip, size);
1492         if (chan->memory == NULL) {
1493                 dev_dbg(chip->card->dev,
1494                         "cannot allocate dma buffer: size = %d\n", size);
1495                 return -ENOMEM;
1496         }
1497         snd_pcm_set_runtime_buffer(substream, &chan->memory->buf);
1498         return 1; /* area was changed */
1499 }
1500 
1501 /* remove dma areas if allocated */
1502 static int snd_es1968_hw_free(struct snd_pcm_substream *substream)
1503 {
1504         struct es1968 *chip = snd_pcm_substream_chip(substream);
1505         struct snd_pcm_runtime *runtime = substream->runtime;
1506         struct esschan *chan;
1507         
1508         if (runtime->private_data == NULL)
1509                 return 0;
1510         chan = runtime->private_data;
1511         if (chan->memory) {
1512                 snd_es1968_free_memory(chip, chan->memory);
1513                 chan->memory = NULL;
1514         }
1515         return 0;
1516 }
1517 
1518 
1519 /*
1520  * allocate APU pair
1521  */
1522 static int snd_es1968_alloc_apu_pair(struct es1968 *chip, int type)
1523 {
1524         int apu;
1525 
1526         for (apu = 0; apu < NR_APUS; apu += 2) {
1527                 if (chip->apu[apu] == ESM_APU_FREE &&
1528                     chip->apu[apu + 1] == ESM_APU_FREE) {
1529                         chip->apu[apu] = chip->apu[apu + 1] = type;
1530                         return apu;
1531                 }
1532         }
1533         return -EBUSY;
1534 }
1535 
1536 /*
1537  * release APU pair
1538  */
1539 static void snd_es1968_free_apu_pair(struct es1968 *chip, int apu)
1540 {
1541         chip->apu[apu] = chip->apu[apu + 1] = ESM_APU_FREE;
1542 }
1543 
1544 
1545 /******************
1546  * PCM open/close *
1547  ******************/
1548 
1549 static int snd_es1968_playback_open(struct snd_pcm_substream *substream)
1550 {
1551         struct es1968 *chip = snd_pcm_substream_chip(substream);
1552         struct snd_pcm_runtime *runtime = substream->runtime;
1553         struct esschan *es;
1554         int apu1;
1555 
1556         /* search 2 APUs */
1557         apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY);
1558         if (apu1 < 0)
1559                 return apu1;
1560 
1561         es = kzalloc(sizeof(*es), GFP_KERNEL);
1562         if (!es) {
1563                 snd_es1968_free_apu_pair(chip, apu1);
1564                 return -ENOMEM;
1565         }
1566 
1567         es->apu[0] = apu1;
1568         es->apu[1] = apu1 + 1;
1569         es->apu_mode[0] = 0;
1570         es->apu_mode[1] = 0;
1571         es->running = 0;
1572         es->substream = substream;
1573         es->mode = ESM_MODE_PLAY;
1574 
1575         runtime->private_data = es;
1576         runtime->hw = snd_es1968_playback;
1577         runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1578                 calc_available_memory_size(chip);
1579 
1580         spin_lock_irq(&chip->substream_lock);
1581         list_add(&es->list, &chip->substream_list);
1582         spin_unlock_irq(&chip->substream_lock);
1583 
1584         return 0;
1585 }
1586 
1587 static int snd_es1968_capture_open(struct snd_pcm_substream *substream)
1588 {
1589         struct snd_pcm_runtime *runtime = substream->runtime;
1590         struct es1968 *chip = snd_pcm_substream_chip(substream);
1591         struct esschan *es;
1592         int apu1, apu2;
1593 
1594         apu1 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_CAPTURE);
1595         if (apu1 < 0)
1596                 return apu1;
1597         apu2 = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_RATECONV);
1598         if (apu2 < 0) {
1599                 snd_es1968_free_apu_pair(chip, apu1);
1600                 return apu2;
1601         }
1602         
1603         es = kzalloc(sizeof(*es), GFP_KERNEL);
1604         if (!es) {
1605                 snd_es1968_free_apu_pair(chip, apu1);
1606                 snd_es1968_free_apu_pair(chip, apu2);
1607                 return -ENOMEM;
1608         }
1609 
1610         es->apu[0] = apu1;
1611         es->apu[1] = apu1 + 1;
1612         es->apu[2] = apu2;
1613         es->apu[3] = apu2 + 1;
1614         es->apu_mode[0] = 0;
1615         es->apu_mode[1] = 0;
1616         es->apu_mode[2] = 0;
1617         es->apu_mode[3] = 0;
1618         es->running = 0;
1619         es->substream = substream;
1620         es->mode = ESM_MODE_CAPTURE;
1621 
1622         /* get mixbuffer */
1623         if ((es->mixbuf = snd_es1968_new_memory(chip, ESM_MIXBUF_SIZE)) == NULL) {
1624                 snd_es1968_free_apu_pair(chip, apu1);
1625                 snd_es1968_free_apu_pair(chip, apu2);
1626                 kfree(es);
1627                 return -ENOMEM;
1628         }
1629         memset(es->mixbuf->buf.area, 0, ESM_MIXBUF_SIZE);
1630 
1631         runtime->private_data = es;
1632         runtime->hw = snd_es1968_capture;
1633         runtime->hw.buffer_bytes_max = runtime->hw.period_bytes_max =
1634                 calc_available_memory_size(chip) - 1024; /* keep MIXBUF size */
1635         snd_pcm_hw_constraint_pow2(runtime, 0, SNDRV_PCM_HW_PARAM_BUFFER_BYTES);
1636 
1637         spin_lock_irq(&chip->substream_lock);
1638         list_add(&es->list, &chip->substream_list);
1639         spin_unlock_irq(&chip->substream_lock);
1640 
1641         return 0;
1642 }
1643 
1644 static int snd_es1968_playback_close(struct snd_pcm_substream *substream)
1645 {
1646         struct es1968 *chip = snd_pcm_substream_chip(substream);
1647         struct esschan *es;
1648 
1649         if (substream->runtime->private_data == NULL)
1650                 return 0;
1651         es = substream->runtime->private_data;
1652         spin_lock_irq(&chip->substream_lock);
1653         list_del(&es->list);
1654         spin_unlock_irq(&chip->substream_lock);
1655         snd_es1968_free_apu_pair(chip, es->apu[0]);
1656         kfree(es);
1657 
1658         return 0;
1659 }
1660 
1661 static int snd_es1968_capture_close(struct snd_pcm_substream *substream)
1662 {
1663         struct es1968 *chip = snd_pcm_substream_chip(substream);
1664         struct esschan *es;
1665 
1666         if (substream->runtime->private_data == NULL)
1667                 return 0;
1668         es = substream->runtime->private_data;
1669         spin_lock_irq(&chip->substream_lock);
1670         list_del(&es->list);
1671         spin_unlock_irq(&chip->substream_lock);
1672         snd_es1968_free_memory(chip, es->mixbuf);
1673         snd_es1968_free_apu_pair(chip, es->apu[0]);
1674         snd_es1968_free_apu_pair(chip, es->apu[2]);
1675         kfree(es);
1676 
1677         return 0;
1678 }
1679 
1680 static struct snd_pcm_ops snd_es1968_playback_ops = {
1681         .open =         snd_es1968_playback_open,
1682         .close =        snd_es1968_playback_close,
1683         .ioctl =        snd_pcm_lib_ioctl,
1684         .hw_params =    snd_es1968_hw_params,
1685         .hw_free =      snd_es1968_hw_free,
1686         .prepare =      snd_es1968_pcm_prepare,
1687         .trigger =      snd_es1968_pcm_trigger,
1688         .pointer =      snd_es1968_pcm_pointer,
1689 };
1690 
1691 static struct snd_pcm_ops snd_es1968_capture_ops = {
1692         .open =         snd_es1968_capture_open,
1693         .close =        snd_es1968_capture_close,
1694         .ioctl =        snd_pcm_lib_ioctl,
1695         .hw_params =    snd_es1968_hw_params,
1696         .hw_free =      snd_es1968_hw_free,
1697         .prepare =      snd_es1968_pcm_prepare,
1698         .trigger =      snd_es1968_pcm_trigger,
1699         .pointer =      snd_es1968_pcm_pointer,
1700 };
1701 
1702 
1703 /*
1704  * measure clock
1705  */
1706 #define CLOCK_MEASURE_BUFSIZE   16768   /* enough large for a single shot */
1707 
1708 static void es1968_measure_clock(struct es1968 *chip)
1709 {
1710         int i, apu;
1711         unsigned int pa, offset, t;
1712         struct esm_memory *memory;
1713         ktime_t start_time, stop_time;
1714         ktime_t diff;
1715 
1716         if (chip->clock == 0)
1717                 chip->clock = 48000; /* default clock value */
1718 
1719         /* search 2 APUs (although one apu is enough) */
1720         if ((apu = snd_es1968_alloc_apu_pair(chip, ESM_APU_PCM_PLAY)) < 0) {
1721                 dev_err(chip->card->dev, "Hmm, cannot find empty APU pair!?\n");
1722                 return;
1723         }
1724         if ((memory = snd_es1968_new_memory(chip, CLOCK_MEASURE_BUFSIZE)) == NULL) {
1725                 dev_warn(chip->card->dev,
1726                          "cannot allocate dma buffer - using default clock %d\n",
1727                          chip->clock);
1728                 snd_es1968_free_apu_pair(chip, apu);
1729                 return;
1730         }
1731 
1732         memset(memory->buf.area, 0, CLOCK_MEASURE_BUFSIZE);
1733 
1734         wave_set_register(chip, apu << 3, (memory->buf.addr - 0x10) & 0xfff8);
1735 
1736         pa = (unsigned int)((memory->buf.addr - chip->dma.addr) >> 1);
1737         pa |= 0x00400000;       /* System RAM (Bit 22) */
1738 
1739         /* initialize apu */
1740         for (i = 0; i < 16; i++)
1741                 apu_set_register(chip, apu, i, 0x0000);
1742 
1743         apu_set_register(chip, apu, 0, 0x400f);
1744         apu_set_register(chip, apu, 4, ((pa >> 16) & 0xff) << 8);
1745         apu_set_register(chip, apu, 5, pa & 0xffff);
1746         apu_set_register(chip, apu, 6, (pa + CLOCK_MEASURE_BUFSIZE/2) & 0xffff);
1747         apu_set_register(chip, apu, 7, CLOCK_MEASURE_BUFSIZE/2);
1748         apu_set_register(chip, apu, 8, 0x0000);
1749         apu_set_register(chip, apu, 9, 0xD000);
1750         apu_set_register(chip, apu, 10, 0x8F08);
1751         apu_set_register(chip, apu, 11, 0x0000);
1752         spin_lock_irq(&chip->reg_lock);
1753         outw(1, chip->io_port + 0x04); /* clear WP interrupts */
1754         outw(inw(chip->io_port + ESM_PORT_HOST_IRQ) | ESM_HIRQ_DSIE, chip->io_port + ESM_PORT_HOST_IRQ); /* enable WP ints */
1755         spin_unlock_irq(&chip->reg_lock);
1756 
1757         snd_es1968_apu_set_freq(chip, apu, ((unsigned int)48000 << 16) / chip->clock); /* 48000 Hz */
1758 
1759         chip->in_measurement = 1;
1760         chip->measure_apu = apu;
1761         spin_lock_irq(&chip->reg_lock);
1762         snd_es1968_bob_inc(chip, ESM_BOB_FREQ);
1763         __apu_set_register(chip, apu, 5, pa & 0xffff);
1764         snd_es1968_trigger_apu(chip, apu, ESM_APU_16BITLINEAR);
1765         start_time = ktime_get();
1766         spin_unlock_irq(&chip->reg_lock);
1767         msleep(50);
1768         spin_lock_irq(&chip->reg_lock);
1769         offset = __apu_get_register(chip, apu, 5);
1770         stop_time = ktime_get();
1771         snd_es1968_trigger_apu(chip, apu, 0); /* stop */
1772         snd_es1968_bob_dec(chip);
1773         chip->in_measurement = 0;
1774         spin_unlock_irq(&chip->reg_lock);
1775 
1776         /* check the current position */
1777         offset -= (pa & 0xffff);
1778         offset &= 0xfffe;
1779         offset += chip->measure_count * (CLOCK_MEASURE_BUFSIZE/2);
1780 
1781         diff = ktime_sub(stop_time, start_time);
1782         t = ktime_to_us(diff);
1783         if (t == 0) {
1784                 dev_err(chip->card->dev, "?? calculation error..\n");
1785         } else {
1786                 offset *= 1000;
1787                 offset = (offset / t) * 1000 + ((offset % t) * 1000) / t;
1788                 if (offset < 47500 || offset > 48500) {
1789                         if (offset >= 40000 && offset <= 50000)
1790                                 chip->clock = (chip->clock * offset) / 48000;
1791                 }
1792                 dev_info(chip->card->dev, "clocking to %d\n", chip->clock);
1793         }
1794         snd_es1968_free_memory(chip, memory);
1795         snd_es1968_free_apu_pair(chip, apu);
1796 }
1797 
1798 
1799 /*
1800  */
1801 
1802 static void snd_es1968_pcm_free(struct snd_pcm *pcm)
1803 {
1804         struct es1968 *esm = pcm->private_data;
1805         snd_es1968_free_dmabuf(esm);
1806         esm->pcm = NULL;
1807 }
1808 
1809 static int
1810 snd_es1968_pcm(struct es1968 *chip, int device)
1811 {
1812         struct snd_pcm *pcm;
1813         int err;
1814 
1815         /* get DMA buffer */
1816         if ((err = snd_es1968_init_dmabuf(chip)) < 0)
1817                 return err;
1818 
1819         /* set PCMBAR */
1820         wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
1821         wave_set_register(chip, 0x01FD, chip->dma.addr >> 12);
1822         wave_set_register(chip, 0x01FE, chip->dma.addr >> 12);
1823         wave_set_register(chip, 0x01FF, chip->dma.addr >> 12);
1824 
1825         if ((err = snd_pcm_new(chip->card, "ESS Maestro", device,
1826                                chip->playback_streams,
1827                                chip->capture_streams, &pcm)) < 0)
1828                 return err;
1829 
1830         pcm->private_data = chip;
1831         pcm->private_free = snd_es1968_pcm_free;
1832 
1833         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1968_playback_ops);
1834         snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1968_capture_ops);
1835 
1836         pcm->info_flags = 0;
1837 
1838         strcpy(pcm->name, "ESS Maestro");
1839 
1840         chip->pcm = pcm;
1841 
1842         return 0;
1843 }
1844 /*
1845  * suppress jitter on some maestros when playing stereo
1846  */
1847 static void snd_es1968_suppress_jitter(struct es1968 *chip, struct esschan *es)
1848 {
1849         unsigned int cp1;
1850         unsigned int cp2;
1851         unsigned int diff;
1852 
1853         cp1 = __apu_get_register(chip, 0, 5);
1854         cp2 = __apu_get_register(chip, 1, 5);
1855         diff = (cp1 > cp2 ? cp1 - cp2 : cp2 - cp1);
1856 
1857         if (diff > 1)
1858                 __maestro_write(chip, IDR0_DATA_PORT, cp1);
1859 }
1860 
1861 /*
1862  * update pointer
1863  */
1864 static void snd_es1968_update_pcm(struct es1968 *chip, struct esschan *es)
1865 {
1866         unsigned int hwptr;
1867         unsigned int diff;
1868         struct snd_pcm_substream *subs = es->substream;
1869         
1870         if (subs == NULL || !es->running)
1871                 return;
1872 
1873         hwptr = snd_es1968_get_dma_ptr(chip, es) << es->wav_shift;
1874         hwptr %= es->dma_size;
1875 
1876         diff = (es->dma_size + hwptr - es->hwptr) % es->dma_size;
1877 
1878         es->hwptr = hwptr;
1879         es->count += diff;
1880 
1881         if (es->count > es->frag_size) {
1882                 spin_unlock(&chip->substream_lock);
1883                 snd_pcm_period_elapsed(subs);
1884                 spin_lock(&chip->substream_lock);
1885                 es->count %= es->frag_size;
1886         }
1887 }
1888 
1889 /* The hardware volume works by incrementing / decrementing 2 counters
1890    (without wrap around) in response to volume button presses and then
1891    generating an interrupt. The pair of counters is stored in bits 1-3 and 5-7
1892    of a byte wide register. The meaning of bits 0 and 4 is unknown. */
1893 static void es1968_update_hw_volume(struct work_struct *work)
1894 {
1895         struct es1968 *chip = container_of(work, struct es1968, hwvol_work);
1896         int x, val;
1897 
1898         /* Figure out which volume control button was pushed,
1899            based on differences from the default register
1900            values. */
1901         x = inb(chip->io_port + 0x1c) & 0xee;
1902         /* Reset the volume control registers. */
1903         outb(0x88, chip->io_port + 0x1c);
1904         outb(0x88, chip->io_port + 0x1d);
1905         outb(0x88, chip->io_port + 0x1e);
1906         outb(0x88, chip->io_port + 0x1f);
1907 
1908         if (chip->in_suspend)
1909                 return;
1910 
1911 #ifndef CONFIG_SND_ES1968_INPUT
1912         if (! chip->master_switch || ! chip->master_volume)
1913                 return;
1914 
1915         val = snd_ac97_read(chip->ac97, AC97_MASTER);
1916         switch (x) {
1917         case 0x88:
1918                 /* mute */
1919                 val ^= 0x8000;
1920                 break;
1921         case 0xaa:
1922                 /* volume up */
1923                 if ((val & 0x7f) > 0)
1924                         val--;
1925                 if ((val & 0x7f00) > 0)
1926                         val -= 0x0100;
1927                 break;
1928         case 0x66:
1929                 /* volume down */
1930                 if ((val & 0x7f) < 0x1f)
1931                         val++;
1932                 if ((val & 0x7f00) < 0x1f00)
1933                         val += 0x0100;
1934                 break;
1935         }
1936         if (snd_ac97_update(chip->ac97, AC97_MASTER, val))
1937                 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1938                                &chip->master_volume->id);
1939 #else
1940         if (!chip->input_dev)
1941                 return;
1942 
1943         val = 0;
1944         switch (x) {
1945         case 0x88:
1946                 /* The counters have not changed, yet we've received a HV
1947                    interrupt. According to tests run by various people this
1948                    happens when pressing the mute button. */
1949                 val = KEY_MUTE;
1950                 break;
1951         case 0xaa:
1952                 /* counters increased by 1 -> volume up */
1953                 val = KEY_VOLUMEUP;
1954                 break;
1955         case 0x66:
1956                 /* counters decreased by 1 -> volume down */
1957                 val = KEY_VOLUMEDOWN;
1958                 break;
1959         }
1960 
1961         if (val) {
1962                 input_report_key(chip->input_dev, val, 1);
1963                 input_sync(chip->input_dev);
1964                 input_report_key(chip->input_dev, val, 0);
1965                 input_sync(chip->input_dev);
1966         }
1967 #endif
1968 }
1969 
1970 /*
1971  * interrupt handler
1972  */
1973 static irqreturn_t snd_es1968_interrupt(int irq, void *dev_id)
1974 {
1975         struct es1968 *chip = dev_id;
1976         u32 event;
1977 
1978         if (!(event = inb(chip->io_port + 0x1A)))
1979                 return IRQ_NONE;
1980 
1981         outw(inw(chip->io_port + 4) & 1, chip->io_port + 4);
1982 
1983         if (event & ESM_HWVOL_IRQ)
1984                 schedule_work(&chip->hwvol_work);
1985 
1986         /* else ack 'em all, i imagine */
1987         outb(0xFF, chip->io_port + 0x1A);
1988 
1989         if ((event & ESM_MPU401_IRQ) && chip->rmidi) {
1990                 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1991         }
1992 
1993         if (event & ESM_SOUND_IRQ) {
1994                 struct esschan *es;
1995                 spin_lock(&chip->substream_lock);
1996                 list_for_each_entry(es, &chip->substream_list, list) {
1997                         if (es->running) {
1998                                 snd_es1968_update_pcm(chip, es);
1999                                 if (es->fmt & ESS_FMT_STEREO)
2000                                         snd_es1968_suppress_jitter(chip, es);
2001                         }
2002                 }
2003                 spin_unlock(&chip->substream_lock);
2004                 if (chip->in_measurement) {
2005                         unsigned int curp = __apu_get_register(chip, chip->measure_apu, 5);
2006                         if (curp < chip->measure_lastpos)
2007                                 chip->measure_count++;
2008                         chip->measure_lastpos = curp;
2009                 }
2010         }
2011 
2012         return IRQ_HANDLED;
2013 }
2014 
2015 /*
2016  *  Mixer stuff
2017  */
2018 
2019 static int
2020 snd_es1968_mixer(struct es1968 *chip)
2021 {
2022         struct snd_ac97_bus *pbus;
2023         struct snd_ac97_template ac97;
2024 #ifndef CONFIG_SND_ES1968_INPUT
2025         struct snd_ctl_elem_id elem_id;
2026 #endif
2027         int err;
2028         static struct snd_ac97_bus_ops ops = {
2029                 .write = snd_es1968_ac97_write,
2030                 .read = snd_es1968_ac97_read,
2031         };
2032 
2033         if ((err = snd_ac97_bus(chip->card, 0, &ops, NULL, &pbus)) < 0)
2034                 return err;
2035         pbus->no_vra = 1; /* ES1968 doesn't need VRA */
2036 
2037         memset(&ac97, 0, sizeof(ac97));
2038         ac97.private_data = chip;
2039         if ((err = snd_ac97_mixer(pbus, &ac97, &chip->ac97)) < 0)
2040                 return err;
2041 
2042 #ifndef CONFIG_SND_ES1968_INPUT
2043         /* attach master switch / volumes for h/w volume control */
2044         memset(&elem_id, 0, sizeof(elem_id));
2045         elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2046         strcpy(elem_id.name, "Master Playback Switch");
2047         chip->master_switch = snd_ctl_find_id(chip->card, &elem_id);
2048         memset(&elem_id, 0, sizeof(elem_id));
2049         elem_id.iface = SNDRV_CTL_ELEM_IFACE_MIXER;
2050         strcpy(elem_id.name, "Master Playback Volume");
2051         chip->master_volume = snd_ctl_find_id(chip->card, &elem_id);
2052 #endif
2053 
2054         return 0;
2055 }
2056 
2057 /*
2058  * reset ac97 codec
2059  */
2060 
2061 static void snd_es1968_ac97_reset(struct es1968 *chip)
2062 {
2063         unsigned long ioaddr = chip->io_port;
2064 
2065         unsigned short save_ringbus_a;
2066         unsigned short save_68;
2067         unsigned short w;
2068         unsigned int vend;
2069 
2070         /* save configuration */
2071         save_ringbus_a = inw(ioaddr + 0x36);
2072 
2073         //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38); /* clear second codec id? */
2074         /* set command/status address i/o to 1st codec */
2075         outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2076         outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2077 
2078         /* disable ac link */
2079         outw(0x0000, ioaddr + 0x36);
2080         save_68 = inw(ioaddr + 0x68);
2081         pci_read_config_word(chip->pci, 0x58, &w);      /* something magical with gpio and bus arb. */
2082         pci_read_config_dword(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2083         if (w & 1)
2084                 save_68 |= 0x10;
2085         outw(0xfffe, ioaddr + 0x64);    /* unmask gpio 0 */
2086         outw(0x0001, ioaddr + 0x68);    /* gpio write */
2087         outw(0x0000, ioaddr + 0x60);    /* write 0 to gpio 0 */
2088         udelay(20);
2089         outw(0x0001, ioaddr + 0x60);    /* write 1 to gpio 1 */
2090         msleep(20);
2091 
2092         outw(save_68 | 0x1, ioaddr + 0x68);     /* now restore .. */
2093         outw((inw(ioaddr + 0x38) & 0xfffc) | 0x1, ioaddr + 0x38);
2094         outw((inw(ioaddr + 0x3a) & 0xfffc) | 0x1, ioaddr + 0x3a);
2095         outw((inw(ioaddr + 0x3c) & 0xfffc) | 0x1, ioaddr + 0x3c);
2096 
2097         /* now the second codec */
2098         /* disable ac link */
2099         outw(0x0000, ioaddr + 0x36);
2100         outw(0xfff7, ioaddr + 0x64);    /* unmask gpio 3 */
2101         save_68 = inw(ioaddr + 0x68);
2102         outw(0x0009, ioaddr + 0x68);    /* gpio write 0 & 3 ?? */
2103         outw(0x0001, ioaddr + 0x60);    /* write 1 to gpio */
2104         udelay(20);
2105         outw(0x0009, ioaddr + 0x60);    /* write 9 to gpio */
2106         msleep(500);
2107         //outw(inw(ioaddr + 0x38) & 0xfffc, ioaddr + 0x38);
2108         outw(inw(ioaddr + 0x3a) & 0xfffc, ioaddr + 0x3a);
2109         outw(inw(ioaddr + 0x3c) & 0xfffc, ioaddr + 0x3c);
2110 
2111 #if 0                           /* the loop here needs to be much better if we want it.. */
2112         dev_info(chip->card->dev, "trying software reset\n");
2113         /* try and do a software reset */
2114         outb(0x80 | 0x7c, ioaddr + 0x30);
2115         for (w = 0;; w++) {
2116                 if ((inw(ioaddr + 0x30) & 1) == 0) {
2117                         if (inb(ioaddr + 0x32) != 0)
2118                                 break;
2119 
2120                         outb(0x80 | 0x7d, ioaddr + 0x30);
2121                         if (((inw(ioaddr + 0x30) & 1) == 0)
2122                             && (inb(ioaddr + 0x32) != 0))
2123                                 break;
2124                         outb(0x80 | 0x7f, ioaddr + 0x30);
2125                         if (((inw(ioaddr + 0x30) & 1) == 0)
2126                             && (inb(ioaddr + 0x32) != 0))
2127                                 break;
2128                 }
2129 
2130                 if (w > 10000) {
2131                         outb(inb(ioaddr + 0x37) | 0x08, ioaddr + 0x37); /* do a software reset */
2132                         msleep(500);    /* oh my.. */
2133                         outb(inb(ioaddr + 0x37) & ~0x08,
2134                                 ioaddr + 0x37);
2135                         udelay(1);
2136                         outw(0x80, ioaddr + 0x30);
2137                         for (w = 0; w < 10000; w++) {
2138                                 if ((inw(ioaddr + 0x30) & 1) == 0)
2139                                         break;
2140                         }
2141                 }
2142         }
2143 #endif
2144         if (vend == NEC_VERSA_SUBID1 || vend == NEC_VERSA_SUBID2) {
2145                 /* turn on external amp? */
2146                 outw(0xf9ff, ioaddr + 0x64);
2147                 outw(inw(ioaddr + 0x68) | 0x600, ioaddr + 0x68);
2148                 outw(0x0209, ioaddr + 0x60);
2149         }
2150 
2151         /* restore.. */
2152         outw(save_ringbus_a, ioaddr + 0x36);
2153 
2154         /* Turn on the 978 docking chip.
2155            First frob the "master output enable" bit,
2156            then set most of the playback volume control registers to max. */
2157         outb(inb(ioaddr+0xc0)|(1<<5), ioaddr+0xc0);
2158         outb(0xff, ioaddr+0xc3);
2159         outb(0xff, ioaddr+0xc4);
2160         outb(0xff, ioaddr+0xc6);
2161         outb(0xff, ioaddr+0xc8);
2162         outb(0x3f, ioaddr+0xcf);
2163         outb(0x3f, ioaddr+0xd0);
2164 }
2165 
2166 static void snd_es1968_reset(struct es1968 *chip)
2167 {
2168         /* Reset */
2169         outw(ESM_RESET_MAESTRO | ESM_RESET_DIRECTSOUND,
2170              chip->io_port + ESM_PORT_HOST_IRQ);
2171         udelay(10);
2172         outw(0x0000, chip->io_port + ESM_PORT_HOST_IRQ);
2173         udelay(10);
2174 }
2175 
2176 /*
2177  * initialize maestro chip
2178  */
2179 static void snd_es1968_chip_init(struct es1968 *chip)
2180 {
2181         struct pci_dev *pci = chip->pci;
2182         int i;
2183         unsigned long iobase  = chip->io_port;
2184         u16 w;
2185         u32 n;
2186 
2187         /* We used to muck around with pci config space that
2188          * we had no business messing with.  We don't know enough
2189          * about the machine to know which DMA mode is appropriate, 
2190          * etc.  We were guessing wrong on some machines and making
2191          * them unhappy.  We now trust in the BIOS to do things right,
2192          * which almost certainly means a new host of problems will
2193          * arise with broken BIOS implementations.  screw 'em. 
2194          * We're already intolerant of machines that don't assign
2195          * IRQs.
2196          */
2197         
2198         /* Config Reg A */
2199         pci_read_config_word(pci, ESM_CONFIG_A, &w);
2200 
2201         w &= ~DMA_CLEAR;        /* Clear DMA bits */
2202         w &= ~(PIC_SNOOP1 | PIC_SNOOP2);        /* Clear Pic Snoop Mode Bits */
2203         w &= ~SAFEGUARD;        /* Safeguard off */
2204         w |= POST_WRITE;        /* Posted write */
2205         w |= PCI_TIMING;        /* PCI timing on */
2206         /* XXX huh?  claims to be reserved.. */
2207         w &= ~SWAP_LR;          /* swap left/right 
2208                                    seems to only have effect on SB
2209                                    Emulation */
2210         w &= ~SUBTR_DECODE;     /* Subtractive decode off */
2211 
2212         pci_write_config_word(pci, ESM_CONFIG_A, w);
2213 
2214         /* Config Reg B */
2215 
2216         pci_read_config_word(pci, ESM_CONFIG_B, &w);
2217 
2218         w &= ~(1 << 15);        /* Turn off internal clock multiplier */
2219         /* XXX how do we know which to use? */
2220         w &= ~(1 << 14);        /* External clock */
2221 
2222         w &= ~SPDIF_CONFB;      /* disable S/PDIF output */
2223         w |= HWV_CONFB;         /* HWV on */
2224         w |= DEBOUNCE;          /* Debounce off: easier to push the HW buttons */
2225         w &= ~GPIO_CONFB;       /* GPIO 4:5 */
2226         w |= CHI_CONFB;         /* Disconnect from the CHI.  Enabling this made a dell 7500 work. */
2227         w &= ~IDMA_CONFB;       /* IDMA off (undocumented) */
2228         w &= ~MIDI_FIX;         /* MIDI fix off (undoc) */
2229         w &= ~(1 << 1);         /* reserved, always write 0 */
2230         w &= ~IRQ_TO_ISA;       /* IRQ to ISA off (undoc) */
2231 
2232         pci_write_config_word(pci, ESM_CONFIG_B, w);
2233 
2234         /* DDMA off */
2235 
2236         pci_read_config_word(pci, ESM_DDMA, &w);
2237         w &= ~(1 << 0);
2238         pci_write_config_word(pci, ESM_DDMA, w);
2239 
2240         /*
2241          *      Legacy mode
2242          */
2243 
2244         pci_read_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, &w);
2245 
2246         w |= ESS_DISABLE_AUDIO; /* Disable Legacy Audio */
2247         w &= ~ESS_ENABLE_SERIAL_IRQ;    /* Disable SIRQ */
2248         w &= ~(0x1f);           /* disable mpu irq/io, game port, fm, SB */
2249 
2250         pci_write_config_word(pci, ESM_LEGACY_AUDIO_CONTROL, w);
2251 
2252         /* Set up 978 docking control chip. */
2253         pci_read_config_word(pci, 0x58, &w);
2254         w|=1<<2;        /* Enable 978. */
2255         w|=1<<3;        /* Turn on 978 hardware volume control. */
2256         w&=~(1<<11);    /* Turn on 978 mixer volume control. */
2257         pci_write_config_word(pci, 0x58, w);
2258         
2259         /* Sound Reset */
2260 
2261         snd_es1968_reset(chip);
2262 
2263         /*
2264          *      Ring Bus Setup
2265          */
2266 
2267         /* setup usual 0x34 stuff.. 0x36 may be chip specific */
2268         outw(0xC090, iobase + ESM_RING_BUS_DEST); /* direct sound, stereo */
2269         udelay(20);
2270         outw(0x3000, iobase + ESM_RING_BUS_CONTR_A); /* enable ringbus/serial */
2271         udelay(20);
2272 
2273         /*
2274          *      Reset the CODEC
2275          */
2276          
2277         snd_es1968_ac97_reset(chip);
2278 
2279         /* Ring Bus Control B */
2280 
2281         n = inl(iobase + ESM_RING_BUS_CONTR_B);
2282         n &= ~RINGB_EN_SPDIF;   /* SPDIF off */
2283         //w |= RINGB_EN_2CODEC; /* enable 2nd codec */
2284         outl(n, iobase + ESM_RING_BUS_CONTR_B);
2285 
2286         /* Set hardware volume control registers to midpoints.
2287            We can tell which button was pushed based on how they change. */
2288         outb(0x88, iobase+0x1c);
2289         outb(0x88, iobase+0x1d);
2290         outb(0x88, iobase+0x1e);
2291         outb(0x88, iobase+0x1f);
2292 
2293         /* it appears some maestros (dell 7500) only work if these are set,
2294            regardless of whether we use the assp or not. */
2295 
2296         outb(0, iobase + ASSP_CONTROL_B);
2297         outb(3, iobase + ASSP_CONTROL_A);       /* M: Reserved bits... */
2298         outb(0, iobase + ASSP_CONTROL_C);       /* M: Disable ASSP, ASSP IRQ's and FM Port */
2299 
2300         /*
2301          * set up wavecache
2302          */
2303         for (i = 0; i < 16; i++) {
2304                 /* Write 0 into the buffer area 0x1E0->1EF */
2305                 outw(0x01E0 + i, iobase + WC_INDEX);
2306                 outw(0x0000, iobase + WC_DATA);
2307 
2308                 /* The 1.10 test program seem to write 0 into the buffer area
2309                  * 0x1D0-0x1DF too.*/
2310                 outw(0x01D0 + i, iobase + WC_INDEX);
2311                 outw(0x0000, iobase + WC_DATA);
2312         }
2313         wave_set_register(chip, IDR7_WAVE_ROMRAM,
2314                           (wave_get_register(chip, IDR7_WAVE_ROMRAM) & 0xFF00));
2315         wave_set_register(chip, IDR7_WAVE_ROMRAM,
2316                           wave_get_register(chip, IDR7_WAVE_ROMRAM) | 0x100);
2317         wave_set_register(chip, IDR7_WAVE_ROMRAM,
2318                           wave_get_register(chip, IDR7_WAVE_ROMRAM) & ~0x200);
2319         wave_set_register(chip, IDR7_WAVE_ROMRAM,
2320                           wave_get_register(chip, IDR7_WAVE_ROMRAM) | ~0x400);
2321 
2322 
2323         maestro_write(chip, IDR2_CRAM_DATA, 0x0000);
2324         /* Now back to the DirectSound stuff */
2325         /* audio serial configuration.. ? */
2326         maestro_write(chip, 0x08, 0xB004);
2327         maestro_write(chip, 0x09, 0x001B);
2328         maestro_write(chip, 0x0A, 0x8000);
2329         maestro_write(chip, 0x0B, 0x3F37);
2330         maestro_write(chip, 0x0C, 0x0098);
2331 
2332         /* parallel in, has something to do with recording :) */
2333         maestro_write(chip, 0x0C,
2334                       (maestro_read(chip, 0x0C) & ~0xF000) | 0x8000);
2335         /* parallel out */
2336         maestro_write(chip, 0x0C,
2337                       (maestro_read(chip, 0x0C) & ~0x0F00) | 0x0500);
2338 
2339         maestro_write(chip, 0x0D, 0x7632);
2340 
2341         /* Wave cache control on - test off, sg off, 
2342            enable, enable extra chans 1Mb */
2343 
2344         w = inw(iobase + WC_CONTROL);
2345 
2346         w &= ~0xFA00;           /* Seems to be reserved? I don't know */
2347         w |= 0xA000;            /* reserved... I don't know */
2348         w &= ~0x0200;           /* Channels 56,57,58,59 as Extra Play,Rec Channel enable
2349                                    Seems to crash the Computer if enabled... */
2350         w |= 0x0100;            /* Wave Cache Operation Enabled */
2351         w |= 0x0080;            /* Channels 60/61 as Placback/Record enabled */
2352         w &= ~0x0060;           /* Clear Wavtable Size */
2353         w |= 0x0020;            /* Wavetable Size : 1MB */
2354         /* Bit 4 is reserved */
2355         w &= ~0x000C;           /* DMA Stuff? I don't understand what the datasheet means */
2356         /* Bit 1 is reserved */
2357         w &= ~0x0001;           /* Test Mode off */
2358 
2359         outw(w, iobase + WC_CONTROL);
2360 
2361         /* Now clear the APU control ram */
2362         for (i = 0; i < NR_APUS; i++) {
2363                 for (w = 0; w < NR_APU_REGS; w++)
2364                         apu_set_register(chip, i, w, 0);
2365 
2366         }
2367 }
2368 
2369 /* Enable IRQ's */
2370 static void snd_es1968_start_irq(struct es1968 *chip)
2371 {
2372         unsigned short w;
2373         w = ESM_HIRQ_DSIE | ESM_HIRQ_HW_VOLUME;
2374         if (chip->rmidi)
2375                 w |= ESM_HIRQ_MPU401;
2376         outb(w, chip->io_port + 0x1A);
2377         outw(w, chip->io_port + ESM_PORT_HOST_IRQ);
2378 }
2379 
2380 #ifdef CONFIG_PM_SLEEP
2381 /*
2382  * PM support
2383  */
2384 static int es1968_suspend(struct device *dev)
2385 {
2386         struct snd_card *card = dev_get_drvdata(dev);
2387         struct es1968 *chip = card->private_data;
2388 
2389         if (! chip->do_pm)
2390                 return 0;
2391 
2392         chip->in_suspend = 1;
2393         cancel_work_sync(&chip->hwvol_work);
2394         snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
2395         snd_pcm_suspend_all(chip->pcm);
2396         snd_ac97_suspend(chip->ac97);
2397         snd_es1968_bob_stop(chip);
2398         return 0;
2399 }
2400 
2401 static int es1968_resume(struct device *dev)
2402 {
2403         struct snd_card *card = dev_get_drvdata(dev);
2404         struct es1968 *chip = card->private_data;
2405         struct esschan *es;
2406 
2407         if (! chip->do_pm)
2408                 return 0;
2409 
2410         snd_es1968_chip_init(chip);
2411 
2412         /* need to restore the base pointers.. */ 
2413         if (chip->dma.addr) {
2414                 /* set PCMBAR */
2415                 wave_set_register(chip, 0x01FC, chip->dma.addr >> 12);
2416         }
2417 
2418         snd_es1968_start_irq(chip);
2419 
2420         /* restore ac97 state */
2421         snd_ac97_resume(chip->ac97);
2422 
2423         list_for_each_entry(es, &chip->substream_list, list) {
2424                 switch (es->mode) {
2425                 case ESM_MODE_PLAY:
2426                         snd_es1968_playback_setup(chip, es, es->substream->runtime);
2427                         break;
2428                 case ESM_MODE_CAPTURE:
2429                         snd_es1968_capture_setup(chip, es, es->substream->runtime);
2430                         break;
2431                 }
2432         }
2433 
2434         /* start timer again */
2435         if (chip->bobclient)
2436                 snd_es1968_bob_start(chip);
2437 
2438         snd_power_change_state(card, SNDRV_CTL_POWER_D0);
2439         chip->in_suspend = 0;
2440         return 0;
2441 }
2442 
2443 static SIMPLE_DEV_PM_OPS(es1968_pm, es1968_suspend, es1968_resume);
2444 #define ES1968_PM_OPS   &es1968_pm
2445 #else
2446 #define ES1968_PM_OPS   NULL
2447 #endif /* CONFIG_PM_SLEEP */
2448 
2449 #ifdef SUPPORT_JOYSTICK
2450 #define JOYSTICK_ADDR   0x200
2451 static int snd_es1968_create_gameport(struct es1968 *chip, int dev)
2452 {
2453         struct gameport *gp;
2454         struct resource *r;
2455         u16 val;
2456 
2457         if (!joystick[dev])
2458                 return -ENODEV;
2459 
2460         r = request_region(JOYSTICK_ADDR, 8, "ES1968 gameport");
2461         if (!r)
2462                 return -EBUSY;
2463 
2464         chip->gameport = gp = gameport_allocate_port();
2465         if (!gp) {
2466                 dev_err(chip->card->dev,
2467                         "cannot allocate memory for gameport\n");
2468                 release_and_free_resource(r);
2469                 return -ENOMEM;
2470         }
2471 
2472         pci_read_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, &val);
2473         pci_write_config_word(chip->pci, ESM_LEGACY_AUDIO_CONTROL, val | 0x04);
2474 
2475         gameport_set_name(gp, "ES1968 Gameport");
2476         gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
2477         gameport_set_dev_parent(gp, &chip->pci->dev);
2478         gp->io = JOYSTICK_ADDR;
2479         gameport_set_port_data(gp, r);
2480 
2481         gameport_register_port(gp);
2482 
2483         return 0;
2484 }
2485 
2486 static void snd_es1968_free_gameport(struct es1968 *chip)
2487 {
2488         if (chip->gameport) {
2489                 struct resource *r = gameport_get_port_data(chip->gameport);
2490 
2491                 gameport_unregister_port(chip->gameport);
2492                 chip->gameport = NULL;
2493 
2494                 release_and_free_resource(r);
2495         }
2496 }
2497 #else
2498 static inline int snd_es1968_create_gameport(struct es1968 *chip, int dev) { return -ENOSYS; }
2499 static inline void snd_es1968_free_gameport(struct es1968 *chip) { }
2500 #endif
2501 
2502 #ifdef CONFIG_SND_ES1968_INPUT
2503 static int snd_es1968_input_register(struct es1968 *chip)
2504 {
2505         struct input_dev *input_dev;
2506         int err;
2507 
2508         input_dev = input_allocate_device();
2509         if (!input_dev)
2510                 return -ENOMEM;
2511 
2512         snprintf(chip->phys, sizeof(chip->phys), "pci-%s/input0",
2513                  pci_name(chip->pci));
2514 
2515         input_dev->name = chip->card->driver;
2516         input_dev->phys = chip->phys;
2517         input_dev->id.bustype = BUS_PCI;
2518         input_dev->id.vendor  = chip->pci->vendor;
2519         input_dev->id.product = chip->pci->device;
2520         input_dev->dev.parent = &chip->pci->dev;
2521 
2522         __set_bit(EV_KEY, input_dev->evbit);
2523         __set_bit(KEY_MUTE, input_dev->keybit);
2524         __set_bit(KEY_VOLUMEDOWN, input_dev->keybit);
2525         __set_bit(KEY_VOLUMEUP, input_dev->keybit);
2526 
2527         err = input_register_device(input_dev);
2528         if (err) {
2529                 input_free_device(input_dev);
2530                 return err;
2531         }
2532 
2533         chip->input_dev = input_dev;
2534         return 0;
2535 }
2536 #endif /* CONFIG_SND_ES1968_INPUT */
2537 
2538 #ifdef CONFIG_SND_ES1968_RADIO
2539 #define GPIO_DATA       0x60
2540 #define IO_MASK         4      /* mask      register offset from GPIO_DATA
2541                                 bits 1=unmask write to given bit */
2542 #define IO_DIR          8      /* direction register offset from GPIO_DATA
2543                                 bits 0/1=read/write direction */
2544 
2545 /* GPIO to TEA575x maps */
2546 struct snd_es1968_tea575x_gpio {
2547         u8 data, clk, wren, most;
2548         char *name;
2549 };
2550 
2551 static struct snd_es1968_tea575x_gpio snd_es1968_tea575x_gpios[] = {
2552         { .data = 6, .clk = 7, .wren = 8, .most = 9, .name = "SF64-PCE2" },
2553         { .data = 7, .clk = 8, .wren = 6, .most = 10, .name = "M56VAP" },
2554 };
2555 
2556 #define get_tea575x_gpio(chip) \
2557         (&snd_es1968_tea575x_gpios[(chip)->tea575x_tuner])
2558 
2559 
2560 static void snd_es1968_tea575x_set_pins(struct snd_tea575x *tea, u8 pins)
2561 {
2562         struct es1968 *chip = tea->private_data;
2563         struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip);
2564         u16 val = 0;
2565 
2566         val |= (pins & TEA575X_DATA) ? (1 << gpio.data) : 0;
2567         val |= (pins & TEA575X_CLK)  ? (1 << gpio.clk)  : 0;
2568         val |= (pins & TEA575X_WREN) ? (1 << gpio.wren) : 0;
2569 
2570         outw(val, chip->io_port + GPIO_DATA);
2571 }
2572 
2573 static u8 snd_es1968_tea575x_get_pins(struct snd_tea575x *tea)
2574 {
2575         struct es1968 *chip = tea->private_data;
2576         struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip);
2577         u16 val = inw(chip->io_port + GPIO_DATA);
2578         u8 ret = 0;
2579 
2580         if (val & (1 << gpio.data))
2581                 ret |= TEA575X_DATA;
2582         if (val & (1 << gpio.most))
2583                 ret |= TEA575X_MOST;
2584 
2585         return ret;
2586 }
2587 
2588 static void snd_es1968_tea575x_set_direction(struct snd_tea575x *tea, bool output)
2589 {
2590         struct es1968 *chip = tea->private_data;
2591         unsigned long io = chip->io_port + GPIO_DATA;
2592         u16 odir = inw(io + IO_DIR);
2593         struct snd_es1968_tea575x_gpio gpio = *get_tea575x_gpio(chip);
2594 
2595         if (output) {
2596                 outw(~((1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren)),
2597                         io + IO_MASK);
2598                 outw(odir | (1 << gpio.data) | (1 << gpio.clk) | (1 << gpio.wren),
2599                         io + IO_DIR);
2600         } else {
2601                 outw(~((1 << gpio.clk) | (1 << gpio.wren) | (1 << gpio.data) | (1 << gpio.most)),
2602                         io + IO_MASK);
2603                 outw((odir & ~((1 << gpio.data) | (1 << gpio.most)))
2604                         | (1 << gpio.clk) | (1 << gpio.wren), io + IO_DIR);
2605         }
2606 }
2607 
2608 static struct snd_tea575x_ops snd_es1968_tea_ops = {
2609         .set_pins = snd_es1968_tea575x_set_pins,
2610         .get_pins = snd_es1968_tea575x_get_pins,
2611         .set_direction = snd_es1968_tea575x_set_direction,
2612 };
2613 #endif
2614 
2615 static int snd_es1968_free(struct es1968 *chip)
2616 {
2617         cancel_work_sync(&chip->hwvol_work);
2618 #ifdef CONFIG_SND_ES1968_INPUT
2619         if (chip->input_dev)
2620                 input_unregister_device(chip->input_dev);
2621 #endif
2622 
2623         if (chip->io_port) {
2624                 if (chip->irq >= 0)
2625                         synchronize_irq(chip->irq);
2626                 outw(1, chip->io_port + 0x04); /* clear WP interrupts */
2627                 outw(0, chip->io_port + ESM_PORT_HOST_IRQ); /* disable IRQ */
2628         }
2629 
2630 #ifdef CONFIG_SND_ES1968_RADIO
2631         snd_tea575x_exit(&chip->tea);
2632         v4l2_device_unregister(&chip->v4l2_dev);
2633 #endif
2634 
2635         if (chip->irq >= 0)
2636                 free_irq(chip->irq, chip);
2637         snd_es1968_free_gameport(chip);
2638         pci_release_regions(chip->pci);
2639         pci_disable_device(chip->pci);
2640         kfree(chip);
2641         return 0;
2642 }
2643 
2644 static int snd_es1968_dev_free(struct snd_device *device)
2645 {
2646         struct es1968 *chip = device->device_data;
2647         return snd_es1968_free(chip);
2648 }
2649 
2650 struct ess_device_list {
2651         unsigned short type;    /* chip type */
2652         unsigned short vendor;  /* subsystem vendor id */
2653 };
2654 
2655 static struct ess_device_list pm_whitelist[] = {
2656         { TYPE_MAESTRO2E, 0x0e11 },     /* Compaq Armada */
2657         { TYPE_MAESTRO2E, 0x1028 },
2658         { TYPE_MAESTRO2E, 0x103c },
2659         { TYPE_MAESTRO2E, 0x1179 },
2660         { TYPE_MAESTRO2E, 0x14c0 },     /* HP omnibook 4150 */
2661         { TYPE_MAESTRO2E, 0x1558 },
2662         { TYPE_MAESTRO2E, 0x125d },     /* a PCI card, e.g. Terratec DMX */
2663         { TYPE_MAESTRO2, 0x125d },      /* a PCI card, e.g. SF64-PCE2 */
2664 };
2665 
2666 static struct ess_device_list mpu_blacklist[] = {
2667         { TYPE_MAESTRO2, 0x125d },
2668 };
2669 
2670 static int snd_es1968_create(struct snd_card *card,
2671                              struct pci_dev *pci,
2672                              int total_bufsize,
2673                              int play_streams,
2674                              int capt_streams,
2675                              int chip_type,
2676                              int do_pm,
2677                              int radio_nr,
2678                              struct es1968 **chip_ret)
2679 {
2680         static struct snd_device_ops ops = {
2681                 .dev_free =     snd_es1968_dev_free,
2682         };
2683         struct es1968 *chip;
2684         int i, err;
2685 
2686         *chip_ret = NULL;
2687 
2688         /* enable PCI device */
2689         if ((err = pci_enable_device(pci)) < 0)
2690                 return err;
2691         /* check, if we can restrict PCI DMA transfers to 28 bits */
2692         if (dma_set_mask(&pci->dev, DMA_BIT_MASK(28)) < 0 ||
2693             dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(28)) < 0) {
2694                 dev_err(card->dev,
2695                         "architecture does not support 28bit PCI busmaster DMA\n");
2696                 pci_disable_device(pci);
2697                 return -ENXIO;
2698         }
2699 
2700         chip = kzalloc(sizeof(*chip), GFP_KERNEL);
2701         if (! chip) {
2702                 pci_disable_device(pci);
2703                 return -ENOMEM;
2704         }
2705 
2706         /* Set Vars */
2707         chip->type = chip_type;
2708         spin_lock_init(&chip->reg_lock);
2709         spin_lock_init(&chip->substream_lock);
2710         INIT_LIST_HEAD(&chip->buf_list);
2711         INIT_LIST_HEAD(&chip->substream_list);
2712         mutex_init(&chip->memory_mutex);
2713         INIT_WORK(&chip->hwvol_work, es1968_update_hw_volume);
2714         chip->card = card;
2715         chip->pci = pci;
2716         chip->irq = -1;
2717         chip->total_bufsize = total_bufsize;    /* in bytes */
2718         chip->playback_streams = play_streams;
2719         chip->capture_streams = capt_streams;
2720 
2721         if ((err = pci_request_regions(pci, "ESS Maestro")) < 0) {
2722                 kfree(chip);
2723                 pci_disable_device(pci);
2724                 return err;
2725         }
2726         chip->io_port = pci_resource_start(pci, 0);
2727         if (request_irq(pci->irq, snd_es1968_interrupt, IRQF_SHARED,
2728                         KBUILD_MODNAME, chip)) {
2729                 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
2730                 snd_es1968_free(chip);
2731                 return -EBUSY;
2732         }
2733         chip->irq = pci->irq;
2734                 
2735         /* Clear Maestro_map */
2736         for (i = 0; i < 32; i++)
2737                 chip->maestro_map[i] = 0;
2738 
2739         /* Clear Apu Map */
2740         for (i = 0; i < NR_APUS; i++)
2741                 chip->apu[i] = ESM_APU_FREE;
2742 
2743         /* just to be sure */
2744         pci_set_master(pci);
2745 
2746         if (do_pm > 1) {
2747                 /* disable power-management if not on the whitelist */
2748                 unsigned short vend;
2749                 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2750                 for (i = 0; i < (int)ARRAY_SIZE(pm_whitelist); i++) {
2751                         if (chip->type == pm_whitelist[i].type &&
2752                             vend == pm_whitelist[i].vendor) {
2753                                 do_pm = 1;
2754                                 break;
2755                         }
2756                 }
2757                 if (do_pm > 1) {
2758                         /* not matched; disabling pm */
2759                         dev_info(card->dev, "not attempting power management.\n");
2760                         do_pm = 0;
2761                 }
2762         }
2763         chip->do_pm = do_pm;
2764 
2765         snd_es1968_chip_init(chip);
2766 
2767         if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
2768                 snd_es1968_free(chip);
2769                 return err;
2770         }
2771 
2772 #ifdef CONFIG_SND_ES1968_RADIO
2773         /* don't play with GPIOs on laptops */
2774         if (chip->pci->subsystem_vendor != 0x125d)
2775                 goto no_radio;
2776         err = v4l2_device_register(&pci->dev, &chip->v4l2_dev);
2777         if (err < 0) {
2778                 snd_es1968_free(chip);
2779                 return err;
2780         }
2781         chip->tea.v4l2_dev = &chip->v4l2_dev;
2782         chip->tea.private_data = chip;
2783         chip->tea.radio_nr = radio_nr;
2784         chip->tea.ops = &snd_es1968_tea_ops;
2785         sprintf(chip->tea.bus_info, "PCI:%s", pci_name(pci));
2786         for (i = 0; i < ARRAY_SIZE(snd_es1968_tea575x_gpios); i++) {
2787                 chip->tea575x_tuner = i;
2788                 if (!snd_tea575x_init(&chip->tea, THIS_MODULE)) {
2789                         dev_info(card->dev, "detected TEA575x radio type %s\n",
2790                                    get_tea575x_gpio(chip)->name);
2791                         strlcpy(chip->tea.card, get_tea575x_gpio(chip)->name,
2792                                 sizeof(chip->tea.card));
2793                         break;
2794                 }
2795         }
2796 no_radio:
2797 #endif
2798 
2799         *chip_ret = chip;
2800 
2801         return 0;
2802 }
2803 
2804 
2805 /*
2806  */
2807 static int snd_es1968_probe(struct pci_dev *pci,
2808                             const struct pci_device_id *pci_id)
2809 {
2810         static int dev;
2811         struct snd_card *card;
2812         struct es1968 *chip;
2813         unsigned int i;
2814         int err;
2815 
2816         if (dev >= SNDRV_CARDS)
2817                 return -ENODEV;
2818         if (!enable[dev]) {
2819                 dev++;
2820                 return -ENOENT;
2821         }
2822 
2823         err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
2824                            0, &card);
2825         if (err < 0)
2826                 return err;
2827                 
2828         if (total_bufsize[dev] < 128)
2829                 total_bufsize[dev] = 128;
2830         if (total_bufsize[dev] > 4096)
2831                 total_bufsize[dev] = 4096;
2832         if ((err = snd_es1968_create(card, pci,
2833                                      total_bufsize[dev] * 1024, /* in bytes */
2834                                      pcm_substreams_p[dev], 
2835                                      pcm_substreams_c[dev],
2836                                      pci_id->driver_data,
2837                                      use_pm[dev],
2838                                      radio_nr[dev],
2839                                      &chip)) < 0) {
2840                 snd_card_free(card);
2841                 return err;
2842         }
2843         card->private_data = chip;
2844 
2845         switch (chip->type) {
2846         case TYPE_MAESTRO2E:
2847                 strcpy(card->driver, "ES1978");
2848                 strcpy(card->shortname, "ESS ES1978 (Maestro 2E)");
2849                 break;
2850         case TYPE_MAESTRO2:
2851                 strcpy(card->driver, "ES1968");
2852                 strcpy(card->shortname, "ESS ES1968 (Maestro 2)");
2853                 break;
2854         case TYPE_MAESTRO:
2855                 strcpy(card->driver, "ESM1");
2856                 strcpy(card->shortname, "ESS Maestro 1");
2857                 break;
2858         }
2859 
2860         if ((err = snd_es1968_pcm(chip, 0)) < 0) {
2861                 snd_card_free(card);
2862                 return err;
2863         }
2864 
2865         if ((err = snd_es1968_mixer(chip)) < 0) {
2866                 snd_card_free(card);
2867                 return err;
2868         }
2869 
2870         if (enable_mpu[dev] == 2) {
2871                 /* check the black list */
2872                 unsigned short vend;
2873                 pci_read_config_word(chip->pci, PCI_SUBSYSTEM_VENDOR_ID, &vend);
2874                 for (i = 0; i < ARRAY_SIZE(mpu_blacklist); i++) {
2875                         if (chip->type == mpu_blacklist[i].type &&
2876                             vend == mpu_blacklist[i].vendor) {
2877                                 enable_mpu[dev] = 0;
2878                                 break;
2879                         }
2880                 }
2881         }
2882         if (enable_mpu[dev]) {
2883                 if ((err = snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
2884                                                chip->io_port + ESM_MPU401_PORT,
2885                                                MPU401_INFO_INTEGRATED |
2886                                                MPU401_INFO_IRQ_HOOK,
2887                                                -1, &chip->rmidi)) < 0) {
2888                         dev_warn(card->dev, "skipping MPU-401 MIDI support..\n");
2889                 }
2890         }
2891 
2892         snd_es1968_create_gameport(chip, dev);
2893 
2894 #ifdef CONFIG_SND_ES1968_INPUT
2895         err = snd_es1968_input_register(chip);
2896         if (err)
2897                 dev_warn(card->dev,
2898                          "Input device registration failed with error %i", err);
2899 #endif
2900 
2901         snd_es1968_start_irq(chip);
2902 
2903         chip->clock = clock[dev];
2904         if (! chip->clock)
2905                 es1968_measure_clock(chip);
2906 
2907         sprintf(card->longname, "%s at 0x%lx, irq %i",
2908                 card->shortname, chip->io_port, chip->irq);
2909 
2910         if ((err = snd_card_register(card)) < 0) {
2911                 snd_card_free(card);
2912                 return err;
2913         }
2914         pci_set_drvdata(pci, card);
2915         dev++;
2916         return 0;
2917 }
2918 
2919 static void snd_es1968_remove(struct pci_dev *pci)
2920 {
2921         snd_card_free(pci_get_drvdata(pci));
2922 }
2923 
2924 static struct pci_driver es1968_driver = {
2925         .name = KBUILD_MODNAME,
2926         .id_table = snd_es1968_ids,
2927         .probe = snd_es1968_probe,
2928         .remove = snd_es1968_remove,
2929         .driver = {
2930                 .pm = ES1968_PM_OPS,
2931         },
2932 };
2933 
2934 module_pci_driver(es1968_driver);
2935 

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