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Linux/drivers/watchdog/sp5100_tco.c

  1 /*
  2  *      sp5100_tco :    TCO timer driver for sp5100 chipsets
  3  *
  4  *      (c) Copyright 2009 Google Inc., All Rights Reserved.
  5  *
  6  *      Based on i8xx_tco.c:
  7  *      (c) Copyright 2000 kernel concepts <nils@kernelconcepts.de>, All Rights
  8  *      Reserved.
  9  *                              http://www.kernelconcepts.de
 10  *
 11  *      This program is free software; you can redistribute it and/or
 12  *      modify it under the terms of the GNU General Public License
 13  *      as published by the Free Software Foundation; either version
 14  *      2 of the License, or (at your option) any later version.
 15  *
 16  *      See AMD Publication 43009 "AMD SB700/710/750 Register Reference Guide",
 17  *          AMD Publication 45482 "AMD SB800-Series Southbridges Register
 18  *                                                            Reference Guide"
 19  */
 20 
 21 /*
 22  *      Includes, defines, variables, module parameters, ...
 23  */
 24 
 25 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 26 
 27 #include <linux/module.h>
 28 #include <linux/moduleparam.h>
 29 #include <linux/types.h>
 30 #include <linux/miscdevice.h>
 31 #include <linux/watchdog.h>
 32 #include <linux/init.h>
 33 #include <linux/fs.h>
 34 #include <linux/pci.h>
 35 #include <linux/ioport.h>
 36 #include <linux/platform_device.h>
 37 #include <linux/uaccess.h>
 38 #include <linux/io.h>
 39 
 40 #include "sp5100_tco.h"
 41 
 42 /* Module and version information */
 43 #define TCO_VERSION "0.05"
 44 #define TCO_MODULE_NAME "SP5100 TCO timer"
 45 #define TCO_DRIVER_NAME   TCO_MODULE_NAME ", v" TCO_VERSION
 46 
 47 /* internal variables */
 48 static u32 tcobase_phys;
 49 static u32 tco_wdt_fired;
 50 static void __iomem *tcobase;
 51 static unsigned int pm_iobase;
 52 static DEFINE_SPINLOCK(tco_lock);       /* Guards the hardware */
 53 static unsigned long timer_alive;
 54 static char tco_expect_close;
 55 static struct pci_dev *sp5100_tco_pci;
 56 
 57 /* the watchdog platform device */
 58 static struct platform_device *sp5100_tco_platform_device;
 59 
 60 /* module parameters */
 61 
 62 #define WATCHDOG_HEARTBEAT 60   /* 60 sec default heartbeat. */
 63 static int heartbeat = WATCHDOG_HEARTBEAT;  /* in seconds */
 64 module_param(heartbeat, int, 0);
 65 MODULE_PARM_DESC(heartbeat, "Watchdog heartbeat in seconds. (default="
 66                  __MODULE_STRING(WATCHDOG_HEARTBEAT) ")");
 67 
 68 static bool nowayout = WATCHDOG_NOWAYOUT;
 69 module_param(nowayout, bool, 0);
 70 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started."
 71                 " (default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 72 
 73 /*
 74  * Some TCO specific functions
 75  */
 76 static void tco_timer_start(void)
 77 {
 78         u32 val;
 79         unsigned long flags;
 80 
 81         spin_lock_irqsave(&tco_lock, flags);
 82         val = readl(SP5100_WDT_CONTROL(tcobase));
 83         val |= SP5100_WDT_START_STOP_BIT;
 84         writel(val, SP5100_WDT_CONTROL(tcobase));
 85         spin_unlock_irqrestore(&tco_lock, flags);
 86 }
 87 
 88 static void tco_timer_stop(void)
 89 {
 90         u32 val;
 91         unsigned long flags;
 92 
 93         spin_lock_irqsave(&tco_lock, flags);
 94         val = readl(SP5100_WDT_CONTROL(tcobase));
 95         val &= ~SP5100_WDT_START_STOP_BIT;
 96         writel(val, SP5100_WDT_CONTROL(tcobase));
 97         spin_unlock_irqrestore(&tco_lock, flags);
 98 }
 99 
100 static void tco_timer_keepalive(void)
101 {
102         u32 val;
103         unsigned long flags;
104 
105         spin_lock_irqsave(&tco_lock, flags);
106         val = readl(SP5100_WDT_CONTROL(tcobase));
107         val |= SP5100_WDT_TRIGGER_BIT;
108         writel(val, SP5100_WDT_CONTROL(tcobase));
109         spin_unlock_irqrestore(&tco_lock, flags);
110 }
111 
112 static int tco_timer_set_heartbeat(int t)
113 {
114         unsigned long flags;
115 
116         if (t < 0 || t > 0xffff)
117                 return -EINVAL;
118 
119         /* Write new heartbeat to watchdog */
120         spin_lock_irqsave(&tco_lock, flags);
121         writel(t, SP5100_WDT_COUNT(tcobase));
122         spin_unlock_irqrestore(&tco_lock, flags);
123 
124         heartbeat = t;
125         return 0;
126 }
127 
128 static void tco_timer_enable(void)
129 {
130         int val;
131 
132         if (sp5100_tco_pci->revision >= 0x40) {
133                 /* For SB800 or later */
134                 /* Set the Watchdog timer resolution to 1 sec */
135                 outb(SB800_PM_WATCHDOG_CONFIG, SB800_IO_PM_INDEX_REG);
136                 val = inb(SB800_IO_PM_DATA_REG);
137                 val |= SB800_PM_WATCHDOG_SECOND_RES;
138                 outb(val, SB800_IO_PM_DATA_REG);
139 
140                 /* Enable watchdog decode bit and watchdog timer */
141                 outb(SB800_PM_WATCHDOG_CONTROL, SB800_IO_PM_INDEX_REG);
142                 val = inb(SB800_IO_PM_DATA_REG);
143                 val |= SB800_PCI_WATCHDOG_DECODE_EN;
144                 val &= ~SB800_PM_WATCHDOG_DISABLE;
145                 outb(val, SB800_IO_PM_DATA_REG);
146         } else {
147                 /* For SP5100 or SB7x0 */
148                 /* Enable watchdog decode bit */
149                 pci_read_config_dword(sp5100_tco_pci,
150                                       SP5100_PCI_WATCHDOG_MISC_REG,
151                                       &val);
152 
153                 val |= SP5100_PCI_WATCHDOG_DECODE_EN;
154 
155                 pci_write_config_dword(sp5100_tco_pci,
156                                        SP5100_PCI_WATCHDOG_MISC_REG,
157                                        val);
158 
159                 /* Enable Watchdog timer and set the resolution to 1 sec */
160                 outb(SP5100_PM_WATCHDOG_CONTROL, SP5100_IO_PM_INDEX_REG);
161                 val = inb(SP5100_IO_PM_DATA_REG);
162                 val |= SP5100_PM_WATCHDOG_SECOND_RES;
163                 val &= ~SP5100_PM_WATCHDOG_DISABLE;
164                 outb(val, SP5100_IO_PM_DATA_REG);
165         }
166 }
167 
168 /*
169  *      /dev/watchdog handling
170  */
171 
172 static int sp5100_tco_open(struct inode *inode, struct file *file)
173 {
174         /* /dev/watchdog can only be opened once */
175         if (test_and_set_bit(0, &timer_alive))
176                 return -EBUSY;
177 
178         /* Reload and activate timer */
179         tco_timer_start();
180         tco_timer_keepalive();
181         return nonseekable_open(inode, file);
182 }
183 
184 static int sp5100_tco_release(struct inode *inode, struct file *file)
185 {
186         /* Shut off the timer. */
187         if (tco_expect_close == 42) {
188                 tco_timer_stop();
189         } else {
190                 pr_crit("Unexpected close, not stopping watchdog!\n");
191                 tco_timer_keepalive();
192         }
193         clear_bit(0, &timer_alive);
194         tco_expect_close = 0;
195         return 0;
196 }
197 
198 static ssize_t sp5100_tco_write(struct file *file, const char __user *data,
199                                 size_t len, loff_t *ppos)
200 {
201         /* See if we got the magic character 'V' and reload the timer */
202         if (len) {
203                 if (!nowayout) {
204                         size_t i;
205 
206                         /* note: just in case someone wrote the magic character
207                          * five months ago... */
208                         tco_expect_close = 0;
209 
210                         /* scan to see whether or not we got the magic character
211                          */
212                         for (i = 0; i != len; i++) {
213                                 char c;
214                                 if (get_user(c, data + i))
215                                         return -EFAULT;
216                                 if (c == 'V')
217                                         tco_expect_close = 42;
218                         }
219                 }
220 
221                 /* someone wrote to us, we should reload the timer */
222                 tco_timer_keepalive();
223         }
224         return len;
225 }
226 
227 static long sp5100_tco_ioctl(struct file *file, unsigned int cmd,
228                              unsigned long arg)
229 {
230         int new_options, retval = -EINVAL;
231         int new_heartbeat;
232         void __user *argp = (void __user *)arg;
233         int __user *p = argp;
234         static const struct watchdog_info ident = {
235                 .options =              WDIOF_SETTIMEOUT |
236                                         WDIOF_KEEPALIVEPING |
237                                         WDIOF_MAGICCLOSE,
238                 .firmware_version =     0,
239                 .identity =             TCO_MODULE_NAME,
240         };
241 
242         switch (cmd) {
243         case WDIOC_GETSUPPORT:
244                 return copy_to_user(argp, &ident,
245                         sizeof(ident)) ? -EFAULT : 0;
246         case WDIOC_GETSTATUS:
247         case WDIOC_GETBOOTSTATUS:
248                 return put_user(0, p);
249         case WDIOC_SETOPTIONS:
250                 if (get_user(new_options, p))
251                         return -EFAULT;
252                 if (new_options & WDIOS_DISABLECARD) {
253                         tco_timer_stop();
254                         retval = 0;
255                 }
256                 if (new_options & WDIOS_ENABLECARD) {
257                         tco_timer_start();
258                         tco_timer_keepalive();
259                         retval = 0;
260                 }
261                 return retval;
262         case WDIOC_KEEPALIVE:
263                 tco_timer_keepalive();
264                 return 0;
265         case WDIOC_SETTIMEOUT:
266                 if (get_user(new_heartbeat, p))
267                         return -EFAULT;
268                 if (tco_timer_set_heartbeat(new_heartbeat))
269                         return -EINVAL;
270                 tco_timer_keepalive();
271                 /* Fall through */
272         case WDIOC_GETTIMEOUT:
273                 return put_user(heartbeat, p);
274         default:
275                 return -ENOTTY;
276         }
277 }
278 
279 /*
280  * Kernel Interfaces
281  */
282 
283 static const struct file_operations sp5100_tco_fops = {
284         .owner =                THIS_MODULE,
285         .llseek =               no_llseek,
286         .write =                sp5100_tco_write,
287         .unlocked_ioctl =       sp5100_tco_ioctl,
288         .open =                 sp5100_tco_open,
289         .release =              sp5100_tco_release,
290 };
291 
292 static struct miscdevice sp5100_tco_miscdev = {
293         .minor =        WATCHDOG_MINOR,
294         .name =         "watchdog",
295         .fops =         &sp5100_tco_fops,
296 };
297 
298 /*
299  * Data for PCI driver interface
300  *
301  * This data only exists for exporting the supported
302  * PCI ids via MODULE_DEVICE_TABLE.  We do not actually
303  * register a pci_driver, because someone else might
304  * want to register another driver on the same PCI id.
305  */
306 static const struct pci_device_id sp5100_tco_pci_tbl[] = {
307         { PCI_VENDOR_ID_ATI, PCI_DEVICE_ID_ATI_SBX00_SMBUS, PCI_ANY_ID,
308           PCI_ANY_ID, },
309         { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_HUDSON2_SMBUS, PCI_ANY_ID,
310           PCI_ANY_ID, },
311         { PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_KERNCZ_SMBUS, PCI_ANY_ID,
312           PCI_ANY_ID, },
313         { 0, },                 /* End of list */
314 };
315 MODULE_DEVICE_TABLE(pci, sp5100_tco_pci_tbl);
316 
317 /*
318  * Init & exit routines
319  */
320 static unsigned char sp5100_tco_setupdevice(void)
321 {
322         struct pci_dev *dev = NULL;
323         const char *dev_name = NULL;
324         u32 val;
325         u32 index_reg, data_reg, base_addr;
326 
327         /* Match the PCI device */
328         for_each_pci_dev(dev) {
329                 if (pci_match_id(sp5100_tco_pci_tbl, dev) != NULL) {
330                         sp5100_tco_pci = dev;
331                         break;
332                 }
333         }
334 
335         if (!sp5100_tco_pci)
336                 return 0;
337 
338         pr_info("PCI Vendor ID: 0x%x, Device ID: 0x%x, Revision ID: 0x%x\n",
339                 sp5100_tco_pci->vendor, sp5100_tco_pci->device,
340                 sp5100_tco_pci->revision);
341 
342         /*
343          * Determine type of southbridge chipset.
344          */
345         if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
346             sp5100_tco_pci->revision < 0x40) {
347                 dev_name = SP5100_DEVNAME;
348                 index_reg = SP5100_IO_PM_INDEX_REG;
349                 data_reg = SP5100_IO_PM_DATA_REG;
350                 base_addr = SP5100_PM_WATCHDOG_BASE;
351         } else {
352                 dev_name = SB800_DEVNAME;
353                 index_reg = SB800_IO_PM_INDEX_REG;
354                 data_reg = SB800_IO_PM_DATA_REG;
355                 base_addr = SB800_PM_WATCHDOG_BASE;
356         }
357 
358         /* Request the IO ports used by this driver */
359         pm_iobase = SP5100_IO_PM_INDEX_REG;
360         if (!request_region(pm_iobase, SP5100_PM_IOPORTS_SIZE, dev_name)) {
361                 pr_err("I/O address 0x%04x already in use\n", pm_iobase);
362                 goto exit;
363         }
364 
365         /*
366          * First, Find the watchdog timer MMIO address from indirect I/O.
367          */
368         outb(base_addr+3, index_reg);
369         val = inb(data_reg);
370         outb(base_addr+2, index_reg);
371         val = val << 8 | inb(data_reg);
372         outb(base_addr+1, index_reg);
373         val = val << 8 | inb(data_reg);
374         outb(base_addr+0, index_reg);
375         /* Low three bits of BASE are reserved */
376         val = val << 8 | (inb(data_reg) & 0xf8);
377 
378         pr_debug("Got 0x%04x from indirect I/O\n", val);
379 
380         /* Check MMIO address conflict */
381         if (request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE,
382                                                                 dev_name))
383                 goto setup_wdt;
384         else
385                 pr_debug("MMIO address 0x%04x already in use\n", val);
386 
387         /*
388          * Secondly, Find the watchdog timer MMIO address
389          * from SBResource_MMIO register.
390          */
391         if (sp5100_tco_pci->device == PCI_DEVICE_ID_ATI_SBX00_SMBUS &&
392             sp5100_tco_pci->revision < 0x40) {
393                 /* Read SBResource_MMIO from PCI config(PCI_Reg: 9Ch) */
394                 pci_read_config_dword(sp5100_tco_pci,
395                                       SP5100_SB_RESOURCE_MMIO_BASE, &val);
396         } else {
397                 /* Read SBResource_MMIO from AcpiMmioEn(PM_Reg: 24h) */
398                 outb(SB800_PM_ACPI_MMIO_EN+3, SB800_IO_PM_INDEX_REG);
399                 val = inb(SB800_IO_PM_DATA_REG);
400                 outb(SB800_PM_ACPI_MMIO_EN+2, SB800_IO_PM_INDEX_REG);
401                 val = val << 8 | inb(SB800_IO_PM_DATA_REG);
402                 outb(SB800_PM_ACPI_MMIO_EN+1, SB800_IO_PM_INDEX_REG);
403                 val = val << 8 | inb(SB800_IO_PM_DATA_REG);
404                 outb(SB800_PM_ACPI_MMIO_EN+0, SB800_IO_PM_INDEX_REG);
405                 val = val << 8 | inb(SB800_IO_PM_DATA_REG);
406         }
407 
408         /* The SBResource_MMIO is enabled and mapped memory space? */
409         if ((val & (SB800_ACPI_MMIO_DECODE_EN | SB800_ACPI_MMIO_SEL)) ==
410                                                   SB800_ACPI_MMIO_DECODE_EN) {
411                 /* Clear unnecessary the low twelve bits */
412                 val &= ~0xFFF;
413                 /* Add the Watchdog Timer offset to base address. */
414                 val += SB800_PM_WDT_MMIO_OFFSET;
415                 /* Check MMIO address conflict */
416                 if (request_mem_region_exclusive(val, SP5100_WDT_MEM_MAP_SIZE,
417                                                                    dev_name)) {
418                         pr_debug("Got 0x%04x from SBResource_MMIO register\n",
419                                 val);
420                         goto setup_wdt;
421                 } else
422                         pr_debug("MMIO address 0x%04x already in use\n", val);
423         } else
424                 pr_debug("SBResource_MMIO is disabled(0x%04x)\n", val);
425 
426         pr_notice("failed to find MMIO address, giving up.\n");
427         goto  unreg_region;
428 
429 setup_wdt:
430         tcobase_phys = val;
431 
432         tcobase = ioremap(val, SP5100_WDT_MEM_MAP_SIZE);
433         if (!tcobase) {
434                 pr_err("failed to get tcobase address\n");
435                 goto unreg_mem_region;
436         }
437 
438         pr_info("Using 0x%04x for watchdog MMIO address\n", val);
439 
440         /* Setup the watchdog timer */
441         tco_timer_enable();
442 
443         /* Check that the watchdog action is set to reset the system */
444         val = readl(SP5100_WDT_CONTROL(tcobase));
445         /*
446          * Save WatchDogFired status, because WatchDogFired flag is
447          * cleared here.
448          */
449         tco_wdt_fired = val & SP5100_PM_WATCHDOG_FIRED;
450         val &= ~SP5100_PM_WATCHDOG_ACTION_RESET;
451         writel(val, SP5100_WDT_CONTROL(tcobase));
452 
453         /* Set a reasonable heartbeat before we stop the timer */
454         tco_timer_set_heartbeat(heartbeat);
455 
456         /*
457          * Stop the TCO before we change anything so we don't race with
458          * a zeroed timer.
459          */
460         tco_timer_stop();
461 
462         /* Done */
463         return 1;
464 
465 unreg_mem_region:
466         release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
467 unreg_region:
468         release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
469 exit:
470         return 0;
471 }
472 
473 static int sp5100_tco_init(struct platform_device *dev)
474 {
475         int ret;
476 
477         /*
478          * Check whether or not the hardware watchdog is there. If found, then
479          * set it up.
480          */
481         if (!sp5100_tco_setupdevice())
482                 return -ENODEV;
483 
484         /* Check to see if last reboot was due to watchdog timeout */
485         pr_info("Last reboot was %striggered by watchdog.\n",
486                 tco_wdt_fired ? "" : "not ");
487 
488         /*
489          * Check that the heartbeat value is within it's range.
490          * If not, reset to the default.
491          */
492         if (tco_timer_set_heartbeat(heartbeat)) {
493                 heartbeat = WATCHDOG_HEARTBEAT;
494                 tco_timer_set_heartbeat(heartbeat);
495         }
496 
497         ret = misc_register(&sp5100_tco_miscdev);
498         if (ret != 0) {
499                 pr_err("cannot register miscdev on minor=%d (err=%d)\n",
500                        WATCHDOG_MINOR, ret);
501                 goto exit;
502         }
503 
504         clear_bit(0, &timer_alive);
505 
506         /* Show module parameters */
507         pr_info("initialized (0x%p). heartbeat=%d sec (nowayout=%d)\n",
508                 tcobase, heartbeat, nowayout);
509 
510         return 0;
511 
512 exit:
513         iounmap(tcobase);
514         release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
515         release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
516         return ret;
517 }
518 
519 static void sp5100_tco_cleanup(void)
520 {
521         /* Stop the timer before we leave */
522         if (!nowayout)
523                 tco_timer_stop();
524 
525         /* Deregister */
526         misc_deregister(&sp5100_tco_miscdev);
527         iounmap(tcobase);
528         release_mem_region(tcobase_phys, SP5100_WDT_MEM_MAP_SIZE);
529         release_region(pm_iobase, SP5100_PM_IOPORTS_SIZE);
530 }
531 
532 static int sp5100_tco_remove(struct platform_device *dev)
533 {
534         if (tcobase)
535                 sp5100_tco_cleanup();
536         return 0;
537 }
538 
539 static void sp5100_tco_shutdown(struct platform_device *dev)
540 {
541         tco_timer_stop();
542 }
543 
544 static struct platform_driver sp5100_tco_driver = {
545         .probe          = sp5100_tco_init,
546         .remove         = sp5100_tco_remove,
547         .shutdown       = sp5100_tco_shutdown,
548         .driver         = {
549                 .name   = TCO_MODULE_NAME,
550         },
551 };
552 
553 static int __init sp5100_tco_init_module(void)
554 {
555         int err;
556 
557         pr_info("SP5100/SB800 TCO WatchDog Timer Driver v%s\n", TCO_VERSION);
558 
559         err = platform_driver_register(&sp5100_tco_driver);
560         if (err)
561                 return err;
562 
563         sp5100_tco_platform_device = platform_device_register_simple(
564                                         TCO_MODULE_NAME, -1, NULL, 0);
565         if (IS_ERR(sp5100_tco_platform_device)) {
566                 err = PTR_ERR(sp5100_tco_platform_device);
567                 goto unreg_platform_driver;
568         }
569 
570         return 0;
571 
572 unreg_platform_driver:
573         platform_driver_unregister(&sp5100_tco_driver);
574         return err;
575 }
576 
577 static void __exit sp5100_tco_cleanup_module(void)
578 {
579         platform_device_unregister(sp5100_tco_platform_device);
580         platform_driver_unregister(&sp5100_tco_driver);
581         pr_info("SP5100/SB800 TCO Watchdog Module Unloaded\n");
582 }
583 
584 module_init(sp5100_tco_init_module);
585 module_exit(sp5100_tco_cleanup_module);
586 
587 MODULE_AUTHOR("Priyanka Gupta");
588 MODULE_DESCRIPTION("TCO timer driver for SP5100/SB800 chipset");
589 MODULE_LICENSE("GPL");
590 

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