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Linux/drivers/watchdog/ath79_wdt.c

  1 /*
  2  * Atheros AR71XX/AR724X/AR913X built-in hardware watchdog timer.
  3  *
  4  * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
  5  * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  6  *
  7  * This driver was based on: drivers/watchdog/ixp4xx_wdt.c
  8  *      Author: Deepak Saxena <dsaxena@plexity.net>
  9  *      Copyright 2004 (c) MontaVista, Software, Inc.
 10  *
 11  * which again was based on sa1100 driver,
 12  *      Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
 13  *
 14  * This program is free software; you can redistribute it and/or modify it
 15  * under the terms of the GNU General Public License version 2 as published
 16  * by the Free Software Foundation.
 17  *
 18  */
 19 
 20 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 21 
 22 #include <linux/bitops.h>
 23 #include <linux/delay.h>
 24 #include <linux/errno.h>
 25 #include <linux/fs.h>
 26 #include <linux/io.h>
 27 #include <linux/kernel.h>
 28 #include <linux/miscdevice.h>
 29 #include <linux/module.h>
 30 #include <linux/moduleparam.h>
 31 #include <linux/platform_device.h>
 32 #include <linux/types.h>
 33 #include <linux/watchdog.h>
 34 #include <linux/clk.h>
 35 #include <linux/err.h>
 36 #include <linux/of.h>
 37 #include <linux/of_platform.h>
 38 
 39 #define DRIVER_NAME     "ath79-wdt"
 40 
 41 #define WDT_TIMEOUT     15      /* seconds */
 42 
 43 #define WDOG_REG_CTRL           0x00
 44 #define WDOG_REG_TIMER          0x04
 45 
 46 #define WDOG_CTRL_LAST_RESET    BIT(31)
 47 #define WDOG_CTRL_ACTION_MASK   3
 48 #define WDOG_CTRL_ACTION_NONE   0       /* no action */
 49 #define WDOG_CTRL_ACTION_GPI    1       /* general purpose interrupt */
 50 #define WDOG_CTRL_ACTION_NMI    2       /* NMI */
 51 #define WDOG_CTRL_ACTION_FCR    3       /* full chip reset */
 52 
 53 static bool nowayout = WATCHDOG_NOWAYOUT;
 54 module_param(nowayout, bool, 0);
 55 MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
 56                            "(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
 57 
 58 static int timeout = WDT_TIMEOUT;
 59 module_param(timeout, int, 0);
 60 MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds "
 61                           "(default=" __MODULE_STRING(WDT_TIMEOUT) "s)");
 62 
 63 static unsigned long wdt_flags;
 64 
 65 #define WDT_FLAGS_BUSY          0
 66 #define WDT_FLAGS_EXPECT_CLOSE  1
 67 
 68 static struct clk *wdt_clk;
 69 static unsigned long wdt_freq;
 70 static int boot_status;
 71 static int max_timeout;
 72 static void __iomem *wdt_base;
 73 
 74 static inline void ath79_wdt_wr(unsigned reg, u32 val)
 75 {
 76         iowrite32(val, wdt_base + reg);
 77 }
 78 
 79 static inline u32 ath79_wdt_rr(unsigned reg)
 80 {
 81         return ioread32(wdt_base + reg);
 82 }
 83 
 84 static inline void ath79_wdt_keepalive(void)
 85 {
 86         ath79_wdt_wr(WDOG_REG_TIMER, wdt_freq * timeout);
 87         /* flush write */
 88         ath79_wdt_rr(WDOG_REG_TIMER);
 89 }
 90 
 91 static inline void ath79_wdt_enable(void)
 92 {
 93         ath79_wdt_keepalive();
 94 
 95         /*
 96          * Updating the TIMER register requires a few microseconds
 97          * on the AR934x SoCs at least. Use a small delay to ensure
 98          * that the TIMER register is updated within the hardware
 99          * before enabling the watchdog.
100          */
101         udelay(2);
102 
103         ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_FCR);
104         /* flush write */
105         ath79_wdt_rr(WDOG_REG_CTRL);
106 }
107 
108 static inline void ath79_wdt_disable(void)
109 {
110         ath79_wdt_wr(WDOG_REG_CTRL, WDOG_CTRL_ACTION_NONE);
111         /* flush write */
112         ath79_wdt_rr(WDOG_REG_CTRL);
113 }
114 
115 static int ath79_wdt_set_timeout(int val)
116 {
117         if (val < 1 || val > max_timeout)
118                 return -EINVAL;
119 
120         timeout = val;
121         ath79_wdt_keepalive();
122 
123         return 0;
124 }
125 
126 static int ath79_wdt_open(struct inode *inode, struct file *file)
127 {
128         if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags))
129                 return -EBUSY;
130 
131         clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
132         ath79_wdt_enable();
133 
134         return nonseekable_open(inode, file);
135 }
136 
137 static int ath79_wdt_release(struct inode *inode, struct file *file)
138 {
139         if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags))
140                 ath79_wdt_disable();
141         else {
142                 pr_crit("device closed unexpectedly, watchdog timer will not stop!\n");
143                 ath79_wdt_keepalive();
144         }
145 
146         clear_bit(WDT_FLAGS_BUSY, &wdt_flags);
147         clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
148 
149         return 0;
150 }
151 
152 static ssize_t ath79_wdt_write(struct file *file, const char *data,
153                                 size_t len, loff_t *ppos)
154 {
155         if (len) {
156                 if (!nowayout) {
157                         size_t i;
158 
159                         clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
160 
161                         for (i = 0; i != len; i++) {
162                                 char c;
163 
164                                 if (get_user(c, data + i))
165                                         return -EFAULT;
166 
167                                 if (c == 'V')
168                                         set_bit(WDT_FLAGS_EXPECT_CLOSE,
169                                                 &wdt_flags);
170                         }
171                 }
172 
173                 ath79_wdt_keepalive();
174         }
175 
176         return len;
177 }
178 
179 static const struct watchdog_info ath79_wdt_info = {
180         .options                = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
181                                   WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
182         .firmware_version       = 0,
183         .identity               = "ATH79 watchdog",
184 };
185 
186 static long ath79_wdt_ioctl(struct file *file, unsigned int cmd,
187                             unsigned long arg)
188 {
189         void __user *argp = (void __user *)arg;
190         int __user *p = argp;
191         int err;
192         int t;
193 
194         switch (cmd) {
195         case WDIOC_GETSUPPORT:
196                 err = copy_to_user(argp, &ath79_wdt_info,
197                                    sizeof(ath79_wdt_info)) ? -EFAULT : 0;
198                 break;
199 
200         case WDIOC_GETSTATUS:
201                 err = put_user(0, p);
202                 break;
203 
204         case WDIOC_GETBOOTSTATUS:
205                 err = put_user(boot_status, p);
206                 break;
207 
208         case WDIOC_KEEPALIVE:
209                 ath79_wdt_keepalive();
210                 err = 0;
211                 break;
212 
213         case WDIOC_SETTIMEOUT:
214                 err = get_user(t, p);
215                 if (err)
216                         break;
217 
218                 err = ath79_wdt_set_timeout(t);
219                 if (err)
220                         break;
221 
222                 /* fallthrough */
223         case WDIOC_GETTIMEOUT:
224                 err = put_user(timeout, p);
225                 break;
226 
227         default:
228                 err = -ENOTTY;
229                 break;
230         }
231 
232         return err;
233 }
234 
235 static const struct file_operations ath79_wdt_fops = {
236         .owner          = THIS_MODULE,
237         .llseek         = no_llseek,
238         .write          = ath79_wdt_write,
239         .unlocked_ioctl = ath79_wdt_ioctl,
240         .open           = ath79_wdt_open,
241         .release        = ath79_wdt_release,
242 };
243 
244 static struct miscdevice ath79_wdt_miscdev = {
245         .minor = WATCHDOG_MINOR,
246         .name = "watchdog",
247         .fops = &ath79_wdt_fops,
248 };
249 
250 static int ath79_wdt_probe(struct platform_device *pdev)
251 {
252         struct resource *res;
253         u32 ctrl;
254         int err;
255 
256         if (wdt_base)
257                 return -EBUSY;
258 
259         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
260         wdt_base = devm_ioremap_resource(&pdev->dev, res);
261         if (IS_ERR(wdt_base))
262                 return PTR_ERR(wdt_base);
263 
264         wdt_clk = devm_clk_get(&pdev->dev, "wdt");
265         if (IS_ERR(wdt_clk))
266                 return PTR_ERR(wdt_clk);
267 
268         err = clk_prepare_enable(wdt_clk);
269         if (err)
270                 return err;
271 
272         wdt_freq = clk_get_rate(wdt_clk);
273         if (!wdt_freq) {
274                 err = -EINVAL;
275                 goto err_clk_disable;
276         }
277 
278         max_timeout = (0xfffffffful / wdt_freq);
279         if (timeout < 1 || timeout > max_timeout) {
280                 timeout = max_timeout;
281                 dev_info(&pdev->dev,
282                         "timeout value must be 0 < timeout < %d, using %d\n",
283                         max_timeout, timeout);
284         }
285 
286         ctrl = ath79_wdt_rr(WDOG_REG_CTRL);
287         boot_status = (ctrl & WDOG_CTRL_LAST_RESET) ? WDIOF_CARDRESET : 0;
288 
289         err = misc_register(&ath79_wdt_miscdev);
290         if (err) {
291                 dev_err(&pdev->dev,
292                         "unable to register misc device, err=%d\n", err);
293                 goto err_clk_disable;
294         }
295 
296         return 0;
297 
298 err_clk_disable:
299         clk_disable_unprepare(wdt_clk);
300         return err;
301 }
302 
303 static int ath79_wdt_remove(struct platform_device *pdev)
304 {
305         misc_deregister(&ath79_wdt_miscdev);
306         clk_disable_unprepare(wdt_clk);
307         return 0;
308 }
309 
310 static void ath97_wdt_shutdown(struct platform_device *pdev)
311 {
312         ath79_wdt_disable();
313 }
314 
315 #ifdef CONFIG_OF
316 static const struct of_device_id ath79_wdt_match[] = {
317         { .compatible = "qca,ar7130-wdt" },
318         {},
319 };
320 MODULE_DEVICE_TABLE(of, ath79_wdt_match);
321 #endif
322 
323 static struct platform_driver ath79_wdt_driver = {
324         .probe          = ath79_wdt_probe,
325         .remove         = ath79_wdt_remove,
326         .shutdown       = ath97_wdt_shutdown,
327         .driver         = {
328                 .name   = DRIVER_NAME,
329                 .owner  = THIS_MODULE,
330                 .of_match_table = of_match_ptr(ath79_wdt_match),
331         },
332 };
333 
334 module_platform_driver(ath79_wdt_driver);
335 
336 MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X hardware watchdog driver");
337 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
338 MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org");
339 MODULE_LICENSE("GPL v2");
340 MODULE_ALIAS("platform:" DRIVER_NAME);
341 

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