Version:  2.0.40 2.2.26 2.4.37 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6

Linux/drivers/usb/musb/musb_dsps.c

  1 /*
  2  * Texas Instruments DSPS platforms "glue layer"
  3  *
  4  * Copyright (C) 2012, by Texas Instruments
  5  *
  6  * Based on the am35x "glue layer" code.
  7  *
  8  * This file is part of the Inventra Controller Driver for Linux.
  9  *
 10  * The Inventra Controller Driver for Linux is free software; you
 11  * can redistribute it and/or modify it under the terms of the GNU
 12  * General Public License version 2 as published by the Free Software
 13  * Foundation.
 14  *
 15  * The Inventra Controller Driver for Linux is distributed in
 16  * the hope that it will be useful, but WITHOUT ANY WARRANTY;
 17  * without even the implied warranty of MERCHANTABILITY or
 18  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
 19  * License for more details.
 20  *
 21  * You should have received a copy of the GNU General Public License
 22  * along with The Inventra Controller Driver for Linux ; if not,
 23  * write to the Free Software Foundation, Inc., 59 Temple Place,
 24  * Suite 330, Boston, MA  02111-1307  USA
 25  *
 26  * musb_dsps.c will be a common file for all the TI DSPS platforms
 27  * such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
 28  * For now only ti81x is using this and in future davinci.c, am35x.c
 29  * da8xx.c would be merged to this file after testing.
 30  */
 31 
 32 #include <linux/io.h>
 33 #include <linux/err.h>
 34 #include <linux/platform_device.h>
 35 #include <linux/dma-mapping.h>
 36 #include <linux/pm_runtime.h>
 37 #include <linux/module.h>
 38 #include <linux/usb/usb_phy_generic.h>
 39 #include <linux/platform_data/usb-omap.h>
 40 #include <linux/sizes.h>
 41 
 42 #include <linux/of.h>
 43 #include <linux/of_device.h>
 44 #include <linux/of_address.h>
 45 #include <linux/of_irq.h>
 46 #include <linux/usb/of.h>
 47 
 48 #include <linux/debugfs.h>
 49 
 50 #include "musb_core.h"
 51 
 52 static const struct of_device_id musb_dsps_of_match[];
 53 
 54 /**
 55  * avoid using musb_readx()/musb_writex() as glue layer should not be
 56  * dependent on musb core layer symbols.
 57  */
 58 static inline u8 dsps_readb(const void __iomem *addr, unsigned offset)
 59 {
 60         return __raw_readb(addr + offset);
 61 }
 62 
 63 static inline u32 dsps_readl(const void __iomem *addr, unsigned offset)
 64 {
 65         return __raw_readl(addr + offset);
 66 }
 67 
 68 static inline void dsps_writeb(void __iomem *addr, unsigned offset, u8 data)
 69 {
 70         __raw_writeb(data, addr + offset);
 71 }
 72 
 73 static inline void dsps_writel(void __iomem *addr, unsigned offset, u32 data)
 74 {
 75         __raw_writel(data, addr + offset);
 76 }
 77 
 78 /**
 79  * DSPS musb wrapper register offset.
 80  * FIXME: This should be expanded to have all the wrapper registers from TI DSPS
 81  * musb ips.
 82  */
 83 struct dsps_musb_wrapper {
 84         u16     revision;
 85         u16     control;
 86         u16     status;
 87         u16     epintr_set;
 88         u16     epintr_clear;
 89         u16     epintr_status;
 90         u16     coreintr_set;
 91         u16     coreintr_clear;
 92         u16     coreintr_status;
 93         u16     phy_utmi;
 94         u16     mode;
 95         u16     tx_mode;
 96         u16     rx_mode;
 97 
 98         /* bit positions for control */
 99         unsigned        reset:5;
100 
101         /* bit positions for interrupt */
102         unsigned        usb_shift:5;
103         u32             usb_mask;
104         u32             usb_bitmap;
105         unsigned        drvvbus:5;
106 
107         unsigned        txep_shift:5;
108         u32             txep_mask;
109         u32             txep_bitmap;
110 
111         unsigned        rxep_shift:5;
112         u32             rxep_mask;
113         u32             rxep_bitmap;
114 
115         /* bit positions for phy_utmi */
116         unsigned        otg_disable:5;
117 
118         /* bit positions for mode */
119         unsigned        iddig:5;
120         unsigned        iddig_mux:5;
121         /* miscellaneous stuff */
122         unsigned        poll_timeout;
123 };
124 
125 /*
126  * register shadow for suspend
127  */
128 struct dsps_context {
129         u32 control;
130         u32 epintr;
131         u32 coreintr;
132         u32 phy_utmi;
133         u32 mode;
134         u32 tx_mode;
135         u32 rx_mode;
136 };
137 
138 /**
139  * DSPS glue structure.
140  */
141 struct dsps_glue {
142         struct device *dev;
143         struct platform_device *musb;   /* child musb pdev */
144         const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
145         struct timer_list timer;        /* otg_workaround timer */
146         unsigned long last_timer;    /* last timer data for each instance */
147         bool sw_babble_enabled;
148 
149         struct dsps_context context;
150         struct debugfs_regset32 regset;
151         struct dentry *dbgfs_root;
152 };
153 
154 static const struct debugfs_reg32 dsps_musb_regs[] = {
155         { "revision",           0x00 },
156         { "control",            0x14 },
157         { "status",             0x18 },
158         { "eoi",                0x24 },
159         { "intr0_stat",         0x30 },
160         { "intr1_stat",         0x34 },
161         { "intr0_set",          0x38 },
162         { "intr1_set",          0x3c },
163         { "txmode",             0x70 },
164         { "rxmode",             0x74 },
165         { "autoreq",            0xd0 },
166         { "srpfixtime",         0xd4 },
167         { "tdown",              0xd8 },
168         { "phy_utmi",           0xe0 },
169         { "mode",               0xe8 },
170 };
171 
172 static void dsps_musb_try_idle(struct musb *musb, unsigned long timeout)
173 {
174         struct device *dev = musb->controller;
175         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
176 
177         if (timeout == 0)
178                 timeout = jiffies + msecs_to_jiffies(3);
179 
180         /* Never idle if active, or when VBUS timeout is not set as host */
181         if (musb->is_active || (musb->a_wait_bcon == 0 &&
182                         musb->xceiv->otg->state == OTG_STATE_A_WAIT_BCON)) {
183                 dev_dbg(musb->controller, "%s active, deleting timer\n",
184                                 usb_otg_state_string(musb->xceiv->otg->state));
185                 del_timer(&glue->timer);
186                 glue->last_timer = jiffies;
187                 return;
188         }
189         if (musb->port_mode != MUSB_PORT_MODE_DUAL_ROLE)
190                 return;
191 
192         if (!musb->g.dev.driver)
193                 return;
194 
195         if (time_after(glue->last_timer, timeout) &&
196                                 timer_pending(&glue->timer)) {
197                 dev_dbg(musb->controller,
198                         "Longer idle timer already pending, ignoring...\n");
199                 return;
200         }
201         glue->last_timer = timeout;
202 
203         dev_dbg(musb->controller, "%s inactive, starting idle timer for %u ms\n",
204                 usb_otg_state_string(musb->xceiv->otg->state),
205                         jiffies_to_msecs(timeout - jiffies));
206         mod_timer(&glue->timer, timeout);
207 }
208 
209 /**
210  * dsps_musb_enable - enable interrupts
211  */
212 static void dsps_musb_enable(struct musb *musb)
213 {
214         struct device *dev = musb->controller;
215         struct platform_device *pdev = to_platform_device(dev->parent);
216         struct dsps_glue *glue = platform_get_drvdata(pdev);
217         const struct dsps_musb_wrapper *wrp = glue->wrp;
218         void __iomem *reg_base = musb->ctrl_base;
219         u32 epmask, coremask;
220 
221         /* Workaround: setup IRQs through both register sets. */
222         epmask = ((musb->epmask & wrp->txep_mask) << wrp->txep_shift) |
223                ((musb->epmask & wrp->rxep_mask) << wrp->rxep_shift);
224         coremask = (wrp->usb_bitmap & ~MUSB_INTR_SOF);
225 
226         dsps_writel(reg_base, wrp->epintr_set, epmask);
227         dsps_writel(reg_base, wrp->coreintr_set, coremask);
228         /* start polling for ID change in dual-role idle mode */
229         if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
230                         musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
231                 mod_timer(&glue->timer, jiffies +
232                                 msecs_to_jiffies(wrp->poll_timeout));
233         dsps_musb_try_idle(musb, 0);
234 }
235 
236 /**
237  * dsps_musb_disable - disable HDRC and flush interrupts
238  */
239 static void dsps_musb_disable(struct musb *musb)
240 {
241         struct device *dev = musb->controller;
242         struct platform_device *pdev = to_platform_device(dev->parent);
243         struct dsps_glue *glue = platform_get_drvdata(pdev);
244         const struct dsps_musb_wrapper *wrp = glue->wrp;
245         void __iomem *reg_base = musb->ctrl_base;
246 
247         dsps_writel(reg_base, wrp->coreintr_clear, wrp->usb_bitmap);
248         dsps_writel(reg_base, wrp->epintr_clear,
249                          wrp->txep_bitmap | wrp->rxep_bitmap);
250         dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
251 }
252 
253 static void otg_timer(unsigned long _musb)
254 {
255         struct musb *musb = (void *)_musb;
256         void __iomem *mregs = musb->mregs;
257         struct device *dev = musb->controller;
258         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
259         const struct dsps_musb_wrapper *wrp = glue->wrp;
260         u8 devctl;
261         unsigned long flags;
262         int skip_session = 0;
263 
264         /*
265          * We poll because DSPS IP's won't expose several OTG-critical
266          * status change events (from the transceiver) otherwise.
267          */
268         devctl = dsps_readb(mregs, MUSB_DEVCTL);
269         dev_dbg(musb->controller, "Poll devctl %02x (%s)\n", devctl,
270                                 usb_otg_state_string(musb->xceiv->otg->state));
271 
272         spin_lock_irqsave(&musb->lock, flags);
273         switch (musb->xceiv->otg->state) {
274         case OTG_STATE_A_WAIT_BCON:
275                 dsps_writeb(musb->mregs, MUSB_DEVCTL, 0);
276                 skip_session = 1;
277                 /* fall */
278 
279         case OTG_STATE_A_IDLE:
280         case OTG_STATE_B_IDLE:
281                 if (devctl & MUSB_DEVCTL_BDEVICE) {
282                         musb->xceiv->otg->state = OTG_STATE_B_IDLE;
283                         MUSB_DEV_MODE(musb);
284                 } else {
285                         musb->xceiv->otg->state = OTG_STATE_A_IDLE;
286                         MUSB_HST_MODE(musb);
287                 }
288                 if (!(devctl & MUSB_DEVCTL_SESSION) && !skip_session)
289                         dsps_writeb(mregs, MUSB_DEVCTL, MUSB_DEVCTL_SESSION);
290                 mod_timer(&glue->timer, jiffies +
291                                 msecs_to_jiffies(wrp->poll_timeout));
292                 break;
293         case OTG_STATE_A_WAIT_VFALL:
294                 musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
295                 dsps_writel(musb->ctrl_base, wrp->coreintr_set,
296                             MUSB_INTR_VBUSERROR << wrp->usb_shift);
297                 break;
298         default:
299                 break;
300         }
301         spin_unlock_irqrestore(&musb->lock, flags);
302 }
303 
304 static irqreturn_t dsps_interrupt(int irq, void *hci)
305 {
306         struct musb  *musb = hci;
307         void __iomem *reg_base = musb->ctrl_base;
308         struct device *dev = musb->controller;
309         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
310         const struct dsps_musb_wrapper *wrp = glue->wrp;
311         unsigned long flags;
312         irqreturn_t ret = IRQ_NONE;
313         u32 epintr, usbintr;
314 
315         spin_lock_irqsave(&musb->lock, flags);
316 
317         /* Get endpoint interrupts */
318         epintr = dsps_readl(reg_base, wrp->epintr_status);
319         musb->int_rx = (epintr & wrp->rxep_bitmap) >> wrp->rxep_shift;
320         musb->int_tx = (epintr & wrp->txep_bitmap) >> wrp->txep_shift;
321 
322         if (epintr)
323                 dsps_writel(reg_base, wrp->epintr_status, epintr);
324 
325         /* Get usb core interrupts */
326         usbintr = dsps_readl(reg_base, wrp->coreintr_status);
327         if (!usbintr && !epintr)
328                 goto out;
329 
330         musb->int_usb = (usbintr & wrp->usb_bitmap) >> wrp->usb_shift;
331         if (usbintr)
332                 dsps_writel(reg_base, wrp->coreintr_status, usbintr);
333 
334         dev_dbg(musb->controller, "usbintr (%x) epintr(%x)\n",
335                         usbintr, epintr);
336 
337         if (usbintr & ((1 << wrp->drvvbus) << wrp->usb_shift)) {
338                 int drvvbus = dsps_readl(reg_base, wrp->status);
339                 void __iomem *mregs = musb->mregs;
340                 u8 devctl = dsps_readb(mregs, MUSB_DEVCTL);
341                 int err;
342 
343                 err = musb->int_usb & MUSB_INTR_VBUSERROR;
344                 if (err) {
345                         /*
346                          * The Mentor core doesn't debounce VBUS as needed
347                          * to cope with device connect current spikes. This
348                          * means it's not uncommon for bus-powered devices
349                          * to get VBUS errors during enumeration.
350                          *
351                          * This is a workaround, but newer RTL from Mentor
352                          * seems to allow a better one: "re"-starting sessions
353                          * without waiting for VBUS to stop registering in
354                          * devctl.
355                          */
356                         musb->int_usb &= ~MUSB_INTR_VBUSERROR;
357                         musb->xceiv->otg->state = OTG_STATE_A_WAIT_VFALL;
358                         mod_timer(&glue->timer, jiffies +
359                                         msecs_to_jiffies(wrp->poll_timeout));
360                         WARNING("VBUS error workaround (delay coming)\n");
361                 } else if (drvvbus) {
362                         MUSB_HST_MODE(musb);
363                         musb->xceiv->otg->default_a = 1;
364                         musb->xceiv->otg->state = OTG_STATE_A_WAIT_VRISE;
365                         del_timer(&glue->timer);
366                 } else {
367                         musb->is_active = 0;
368                         MUSB_DEV_MODE(musb);
369                         musb->xceiv->otg->default_a = 0;
370                         musb->xceiv->otg->state = OTG_STATE_B_IDLE;
371                 }
372 
373                 /* NOTE: this must complete power-on within 100 ms. */
374                 dev_dbg(musb->controller, "VBUS %s (%s)%s, devctl %02x\n",
375                                 drvvbus ? "on" : "off",
376                                 usb_otg_state_string(musb->xceiv->otg->state),
377                                 err ? " ERROR" : "",
378                                 devctl);
379                 ret = IRQ_HANDLED;
380         }
381 
382         if (musb->int_tx || musb->int_rx || musb->int_usb)
383                 ret |= musb_interrupt(musb);
384 
385         /* Poll for ID change in OTG port mode */
386         if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
387                         musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
388                 mod_timer(&glue->timer, jiffies +
389                                 msecs_to_jiffies(wrp->poll_timeout));
390 out:
391         spin_unlock_irqrestore(&musb->lock, flags);
392 
393         return ret;
394 }
395 
396 static int dsps_musb_dbg_init(struct musb *musb, struct dsps_glue *glue)
397 {
398         struct dentry *root;
399         struct dentry *file;
400         char buf[128];
401 
402         sprintf(buf, "%s.dsps", dev_name(musb->controller));
403         root = debugfs_create_dir(buf, NULL);
404         if (!root)
405                 return -ENOMEM;
406         glue->dbgfs_root = root;
407 
408         glue->regset.regs = dsps_musb_regs;
409         glue->regset.nregs = ARRAY_SIZE(dsps_musb_regs);
410         glue->regset.base = musb->ctrl_base;
411 
412         file = debugfs_create_regset32("regdump", S_IRUGO, root, &glue->regset);
413         if (!file) {
414                 debugfs_remove_recursive(root);
415                 return -ENOMEM;
416         }
417         return 0;
418 }
419 
420 static int dsps_musb_init(struct musb *musb)
421 {
422         struct device *dev = musb->controller;
423         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
424         struct platform_device *parent = to_platform_device(dev->parent);
425         const struct dsps_musb_wrapper *wrp = glue->wrp;
426         void __iomem *reg_base;
427         struct resource *r;
428         u32 rev, val;
429         int ret;
430 
431         r = platform_get_resource_byname(parent, IORESOURCE_MEM, "control");
432         reg_base = devm_ioremap_resource(dev, r);
433         if (IS_ERR(reg_base))
434                 return PTR_ERR(reg_base);
435         musb->ctrl_base = reg_base;
436 
437         /* NOP driver needs change if supporting dual instance */
438         musb->xceiv = devm_usb_get_phy_by_phandle(dev->parent, "phys", 0);
439         if (IS_ERR(musb->xceiv))
440                 return PTR_ERR(musb->xceiv);
441 
442         musb->phy = devm_phy_get(dev->parent, "usb2-phy");
443 
444         /* Returns zero if e.g. not clocked */
445         rev = dsps_readl(reg_base, wrp->revision);
446         if (!rev)
447                 return -ENODEV;
448 
449         usb_phy_init(musb->xceiv);
450         if (IS_ERR(musb->phy))  {
451                 musb->phy = NULL;
452         } else {
453                 ret = phy_init(musb->phy);
454                 if (ret < 0)
455                         return ret;
456                 ret = phy_power_on(musb->phy);
457                 if (ret) {
458                         phy_exit(musb->phy);
459                         return ret;
460                 }
461         }
462 
463         setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
464 
465         /* Reset the musb */
466         dsps_writel(reg_base, wrp->control, (1 << wrp->reset));
467 
468         musb->isr = dsps_interrupt;
469 
470         /* reset the otgdisable bit, needed for host mode to work */
471         val = dsps_readl(reg_base, wrp->phy_utmi);
472         val &= ~(1 << wrp->otg_disable);
473         dsps_writel(musb->ctrl_base, wrp->phy_utmi, val);
474 
475         /*
476          *  Check whether the dsps version has babble control enabled.
477          * In latest silicon revision the babble control logic is enabled.
478          * If MUSB_BABBLE_CTL returns 0x4 then we have the babble control
479          * logic enabled.
480          */
481         val = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
482         if (val & MUSB_BABBLE_RCV_DISABLE) {
483                 glue->sw_babble_enabled = true;
484                 val |= MUSB_BABBLE_SW_SESSION_CTRL;
485                 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, val);
486         }
487 
488         return dsps_musb_dbg_init(musb, glue);
489 }
490 
491 static int dsps_musb_exit(struct musb *musb)
492 {
493         struct device *dev = musb->controller;
494         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
495 
496         del_timer_sync(&glue->timer);
497         usb_phy_shutdown(musb->xceiv);
498         phy_power_off(musb->phy);
499         phy_exit(musb->phy);
500         debugfs_remove_recursive(glue->dbgfs_root);
501 
502         return 0;
503 }
504 
505 static int dsps_musb_set_mode(struct musb *musb, u8 mode)
506 {
507         struct device *dev = musb->controller;
508         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
509         const struct dsps_musb_wrapper *wrp = glue->wrp;
510         void __iomem *ctrl_base = musb->ctrl_base;
511         u32 reg;
512 
513         reg = dsps_readl(ctrl_base, wrp->mode);
514 
515         switch (mode) {
516         case MUSB_HOST:
517                 reg &= ~(1 << wrp->iddig);
518 
519                 /*
520                  * if we're setting mode to host-only or device-only, we're
521                  * going to ignore whatever the PHY sends us and just force
522                  * ID pin status by SW
523                  */
524                 reg |= (1 << wrp->iddig_mux);
525 
526                 dsps_writel(ctrl_base, wrp->mode, reg);
527                 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
528                 break;
529         case MUSB_PERIPHERAL:
530                 reg |= (1 << wrp->iddig);
531 
532                 /*
533                  * if we're setting mode to host-only or device-only, we're
534                  * going to ignore whatever the PHY sends us and just force
535                  * ID pin status by SW
536                  */
537                 reg |= (1 << wrp->iddig_mux);
538 
539                 dsps_writel(ctrl_base, wrp->mode, reg);
540                 break;
541         case MUSB_OTG:
542                 dsps_writel(ctrl_base, wrp->phy_utmi, 0x02);
543                 break;
544         default:
545                 dev_err(glue->dev, "unsupported mode %d\n", mode);
546                 return -EINVAL;
547         }
548 
549         return 0;
550 }
551 
552 static bool dsps_sw_babble_control(struct musb *musb)
553 {
554         u8 babble_ctl;
555         bool session_restart =  false;
556 
557         babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
558         dev_dbg(musb->controller, "babble: MUSB_BABBLE_CTL value %x\n",
559                 babble_ctl);
560         /*
561          * check line monitor flag to check whether babble is
562          * due to noise
563          */
564         dev_dbg(musb->controller, "STUCK_J is %s\n",
565                 babble_ctl & MUSB_BABBLE_STUCK_J ? "set" : "reset");
566 
567         if (babble_ctl & MUSB_BABBLE_STUCK_J) {
568                 int timeout = 10;
569 
570                 /*
571                  * babble is due to noise, then set transmit idle (d7 bit)
572                  * to resume normal operation
573                  */
574                 babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
575                 babble_ctl |= MUSB_BABBLE_FORCE_TXIDLE;
576                 dsps_writeb(musb->mregs, MUSB_BABBLE_CTL, babble_ctl);
577 
578                 /* wait till line monitor flag cleared */
579                 dev_dbg(musb->controller, "Set TXIDLE, wait J to clear\n");
580                 do {
581                         babble_ctl = dsps_readb(musb->mregs, MUSB_BABBLE_CTL);
582                         udelay(1);
583                 } while ((babble_ctl & MUSB_BABBLE_STUCK_J) && timeout--);
584 
585                 /* check whether stuck_at_j bit cleared */
586                 if (babble_ctl & MUSB_BABBLE_STUCK_J) {
587                         /*
588                          * real babble condition has occurred
589                          * restart the controller to start the
590                          * session again
591                          */
592                         dev_dbg(musb->controller, "J not cleared, misc (%x)\n",
593                                 babble_ctl);
594                         session_restart = true;
595                 }
596         } else {
597                 session_restart = true;
598         }
599 
600         return session_restart;
601 }
602 
603 static int dsps_musb_recover(struct musb *musb)
604 {
605         struct device *dev = musb->controller;
606         struct dsps_glue *glue = dev_get_drvdata(dev->parent);
607         int session_restart = 0;
608 
609         if (glue->sw_babble_enabled)
610                 session_restart = dsps_sw_babble_control(musb);
611         else
612                 session_restart = 1;
613 
614         return session_restart ? 0 : -EPIPE;
615 }
616 
617 /* Similar to am35x, dm81xx support only 32-bit read operation */
618 static void dsps_read_fifo32(struct musb_hw_ep *hw_ep, u16 len, u8 *dst)
619 {
620         void __iomem *fifo = hw_ep->fifo;
621 
622         if (len >= 4) {
623                 ioread32_rep(fifo, dst, len >> 2);
624                 dst += len & ~0x03;
625                 len &= 0x03;
626         }
627 
628         /* Read any remaining 1 to 3 bytes */
629         if (len > 0) {
630                 u32 val = musb_readl(fifo, 0);
631                 memcpy(dst, &val, len);
632         }
633 }
634 
635 static struct musb_platform_ops dsps_ops = {
636         .quirks         = MUSB_DMA_CPPI41 | MUSB_INDEXED_EP,
637         .init           = dsps_musb_init,
638         .exit           = dsps_musb_exit,
639 
640 #ifdef CONFIG_USB_TI_CPPI41_DMA
641         .dma_init       = cppi41_dma_controller_create,
642         .dma_exit       = cppi41_dma_controller_destroy,
643 #endif
644         .enable         = dsps_musb_enable,
645         .disable        = dsps_musb_disable,
646 
647         .try_idle       = dsps_musb_try_idle,
648         .set_mode       = dsps_musb_set_mode,
649         .recover        = dsps_musb_recover,
650 };
651 
652 static u64 musb_dmamask = DMA_BIT_MASK(32);
653 
654 static int get_int_prop(struct device_node *dn, const char *s)
655 {
656         int ret;
657         u32 val;
658 
659         ret = of_property_read_u32(dn, s, &val);
660         if (ret)
661                 return 0;
662         return val;
663 }
664 
665 static int get_musb_port_mode(struct device *dev)
666 {
667         enum usb_dr_mode mode;
668 
669         mode = usb_get_dr_mode(dev);
670         switch (mode) {
671         case USB_DR_MODE_HOST:
672                 return MUSB_PORT_MODE_HOST;
673 
674         case USB_DR_MODE_PERIPHERAL:
675                 return MUSB_PORT_MODE_GADGET;
676 
677         case USB_DR_MODE_UNKNOWN:
678         case USB_DR_MODE_OTG:
679         default:
680                 return MUSB_PORT_MODE_DUAL_ROLE;
681         }
682 }
683 
684 static int dsps_create_musb_pdev(struct dsps_glue *glue,
685                 struct platform_device *parent)
686 {
687         struct musb_hdrc_platform_data pdata;
688         struct resource resources[2];
689         struct resource *res;
690         struct device *dev = &parent->dev;
691         struct musb_hdrc_config *config;
692         struct platform_device *musb;
693         struct device_node *dn = parent->dev.of_node;
694         int ret, val;
695 
696         memset(resources, 0, sizeof(resources));
697         res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
698         if (!res) {
699                 dev_err(dev, "failed to get memory.\n");
700                 return -EINVAL;
701         }
702         resources[0] = *res;
703 
704         res = platform_get_resource_byname(parent, IORESOURCE_IRQ, "mc");
705         if (!res) {
706                 dev_err(dev, "failed to get irq.\n");
707                 return -EINVAL;
708         }
709         resources[1] = *res;
710 
711         /* allocate the child platform device */
712         musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
713         if (!musb) {
714                 dev_err(dev, "failed to allocate musb device\n");
715                 return -ENOMEM;
716         }
717 
718         musb->dev.parent                = dev;
719         musb->dev.dma_mask              = &musb_dmamask;
720         musb->dev.coherent_dma_mask     = musb_dmamask;
721 
722         glue->musb = musb;
723 
724         ret = platform_device_add_resources(musb, resources,
725                         ARRAY_SIZE(resources));
726         if (ret) {
727                 dev_err(dev, "failed to add resources\n");
728                 goto err;
729         }
730 
731         config = devm_kzalloc(&parent->dev, sizeof(*config), GFP_KERNEL);
732         if (!config) {
733                 ret = -ENOMEM;
734                 goto err;
735         }
736         pdata.config = config;
737         pdata.platform_ops = &dsps_ops;
738 
739         config->num_eps = get_int_prop(dn, "mentor,num-eps");
740         config->ram_bits = get_int_prop(dn, "mentor,ram-bits");
741         config->host_port_deassert_reset_at_resume = 1;
742         pdata.mode = get_musb_port_mode(dev);
743         /* DT keeps this entry in mA, musb expects it as per USB spec */
744         pdata.power = get_int_prop(dn, "mentor,power") / 2;
745 
746         ret = of_property_read_u32(dn, "mentor,multipoint", &val);
747         if (!ret && val)
748                 config->multipoint = true;
749 
750         config->maximum_speed = usb_get_maximum_speed(&parent->dev);
751         switch (config->maximum_speed) {
752         case USB_SPEED_LOW:
753         case USB_SPEED_FULL:
754                 break;
755         case USB_SPEED_SUPER:
756                 dev_warn(dev, "ignore incorrect maximum_speed "
757                                 "(super-speed) setting in dts");
758                 /* fall through */
759         default:
760                 config->maximum_speed = USB_SPEED_HIGH;
761         }
762 
763         ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
764         if (ret) {
765                 dev_err(dev, "failed to add platform_data\n");
766                 goto err;
767         }
768 
769         ret = platform_device_add(musb);
770         if (ret) {
771                 dev_err(dev, "failed to register musb device\n");
772                 goto err;
773         }
774         return 0;
775 
776 err:
777         platform_device_put(musb);
778         return ret;
779 }
780 
781 static int dsps_probe(struct platform_device *pdev)
782 {
783         const struct of_device_id *match;
784         const struct dsps_musb_wrapper *wrp;
785         struct dsps_glue *glue;
786         int ret;
787 
788         if (!strcmp(pdev->name, "musb-hdrc"))
789                 return -ENODEV;
790 
791         match = of_match_node(musb_dsps_of_match, pdev->dev.of_node);
792         if (!match) {
793                 dev_err(&pdev->dev, "fail to get matching of_match struct\n");
794                 return -EINVAL;
795         }
796         wrp = match->data;
797 
798         if (of_device_is_compatible(pdev->dev.of_node, "ti,musb-dm816"))
799                 dsps_ops.read_fifo = dsps_read_fifo32;
800 
801         /* allocate glue */
802         glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
803         if (!glue)
804                 return -ENOMEM;
805 
806         glue->dev = &pdev->dev;
807         glue->wrp = wrp;
808 
809         platform_set_drvdata(pdev, glue);
810         pm_runtime_enable(&pdev->dev);
811 
812         ret = pm_runtime_get_sync(&pdev->dev);
813         if (ret < 0) {
814                 dev_err(&pdev->dev, "pm_runtime_get_sync FAILED");
815                 goto err2;
816         }
817 
818         ret = dsps_create_musb_pdev(glue, pdev);
819         if (ret)
820                 goto err3;
821 
822         return 0;
823 
824 err3:
825         pm_runtime_put(&pdev->dev);
826 err2:
827         pm_runtime_disable(&pdev->dev);
828         return ret;
829 }
830 
831 static int dsps_remove(struct platform_device *pdev)
832 {
833         struct dsps_glue *glue = platform_get_drvdata(pdev);
834 
835         platform_device_unregister(glue->musb);
836 
837         /* disable usbss clocks */
838         pm_runtime_put(&pdev->dev);
839         pm_runtime_disable(&pdev->dev);
840 
841         return 0;
842 }
843 
844 static const struct dsps_musb_wrapper am33xx_driver_data = {
845         .revision               = 0x00,
846         .control                = 0x14,
847         .status                 = 0x18,
848         .epintr_set             = 0x38,
849         .epintr_clear           = 0x40,
850         .epintr_status          = 0x30,
851         .coreintr_set           = 0x3c,
852         .coreintr_clear         = 0x44,
853         .coreintr_status        = 0x34,
854         .phy_utmi               = 0xe0,
855         .mode                   = 0xe8,
856         .tx_mode                = 0x70,
857         .rx_mode                = 0x74,
858         .reset                  = 0,
859         .otg_disable            = 21,
860         .iddig                  = 8,
861         .iddig_mux              = 7,
862         .usb_shift              = 0,
863         .usb_mask               = 0x1ff,
864         .usb_bitmap             = (0x1ff << 0),
865         .drvvbus                = 8,
866         .txep_shift             = 0,
867         .txep_mask              = 0xffff,
868         .txep_bitmap            = (0xffff << 0),
869         .rxep_shift             = 16,
870         .rxep_mask              = 0xfffe,
871         .rxep_bitmap            = (0xfffe << 16),
872         .poll_timeout           = 2000, /* ms */
873 };
874 
875 static const struct of_device_id musb_dsps_of_match[] = {
876         { .compatible = "ti,musb-am33xx",
877                 .data = &am33xx_driver_data, },
878         { .compatible = "ti,musb-dm816",
879                 .data = &am33xx_driver_data, },
880         {  },
881 };
882 MODULE_DEVICE_TABLE(of, musb_dsps_of_match);
883 
884 #ifdef CONFIG_PM_SLEEP
885 static int dsps_suspend(struct device *dev)
886 {
887         struct dsps_glue *glue = dev_get_drvdata(dev);
888         const struct dsps_musb_wrapper *wrp = glue->wrp;
889         struct musb *musb = platform_get_drvdata(glue->musb);
890         void __iomem *mbase;
891 
892         del_timer_sync(&glue->timer);
893 
894         if (!musb)
895                 /* This can happen if the musb device is in -EPROBE_DEFER */
896                 return 0;
897 
898         mbase = musb->ctrl_base;
899         glue->context.control = dsps_readl(mbase, wrp->control);
900         glue->context.epintr = dsps_readl(mbase, wrp->epintr_set);
901         glue->context.coreintr = dsps_readl(mbase, wrp->coreintr_set);
902         glue->context.phy_utmi = dsps_readl(mbase, wrp->phy_utmi);
903         glue->context.mode = dsps_readl(mbase, wrp->mode);
904         glue->context.tx_mode = dsps_readl(mbase, wrp->tx_mode);
905         glue->context.rx_mode = dsps_readl(mbase, wrp->rx_mode);
906 
907         return 0;
908 }
909 
910 static int dsps_resume(struct device *dev)
911 {
912         struct dsps_glue *glue = dev_get_drvdata(dev);
913         const struct dsps_musb_wrapper *wrp = glue->wrp;
914         struct musb *musb = platform_get_drvdata(glue->musb);
915         void __iomem *mbase;
916 
917         if (!musb)
918                 return 0;
919 
920         mbase = musb->ctrl_base;
921         dsps_writel(mbase, wrp->control, glue->context.control);
922         dsps_writel(mbase, wrp->epintr_set, glue->context.epintr);
923         dsps_writel(mbase, wrp->coreintr_set, glue->context.coreintr);
924         dsps_writel(mbase, wrp->phy_utmi, glue->context.phy_utmi);
925         dsps_writel(mbase, wrp->mode, glue->context.mode);
926         dsps_writel(mbase, wrp->tx_mode, glue->context.tx_mode);
927         dsps_writel(mbase, wrp->rx_mode, glue->context.rx_mode);
928         if (musb->xceiv->otg->state == OTG_STATE_B_IDLE &&
929             musb->port_mode == MUSB_PORT_MODE_DUAL_ROLE)
930                 mod_timer(&glue->timer, jiffies +
931                                 msecs_to_jiffies(wrp->poll_timeout));
932 
933         return 0;
934 }
935 #endif
936 
937 static SIMPLE_DEV_PM_OPS(dsps_pm_ops, dsps_suspend, dsps_resume);
938 
939 static struct platform_driver dsps_usbss_driver = {
940         .probe          = dsps_probe,
941         .remove         = dsps_remove,
942         .driver         = {
943                 .name   = "musb-dsps",
944                 .pm     = &dsps_pm_ops,
945                 .of_match_table = musb_dsps_of_match,
946         },
947 };
948 
949 MODULE_DESCRIPTION("TI DSPS MUSB Glue Layer");
950 MODULE_AUTHOR("Ravi B <ravibabu@ti.com>");
951 MODULE_AUTHOR("Ajay Kumar Gupta <ajay.gupta@ti.com>");
952 MODULE_LICENSE("GPL v2");
953 
954 module_platform_driver(dsps_usbss_driver);
955 

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