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Linux/drivers/usb/host/xhci-pci.c

  1 /*
  2  * xHCI host controller driver PCI Bus Glue.
  3  *
  4  * Copyright (C) 2008 Intel Corp.
  5  *
  6  * Author: Sarah Sharp
  7  * Some code borrowed from the Linux EHCI driver.
  8  *
  9  * This program is free software; you can redistribute it and/or modify
 10  * it under the terms of the GNU General Public License version 2 as
 11  * published by the Free Software Foundation.
 12  *
 13  * This program is distributed in the hope that it will be useful, but
 14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
 15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 16  * for more details.
 17  *
 18  * You should have received a copy of the GNU General Public License
 19  * along with this program; if not, write to the Free Software Foundation,
 20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 21  */
 22 
 23 #include <linux/pci.h>
 24 #include <linux/slab.h>
 25 #include <linux/module.h>
 26 
 27 #include "xhci.h"
 28 #include "xhci-trace.h"
 29 
 30 /* Device for a quirk */
 31 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
 32 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
 33 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
 34 
 35 #define PCI_VENDOR_ID_ETRON             0x1b6f
 36 #define PCI_DEVICE_ID_EJ168             0x7023
 37 
 38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI      0x8c31
 39 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI   0x9c31
 40 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI             0x22b5
 41 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI         0xa12f
 42 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI        0x9d2f
 43 
 44 static const char hcd_name[] = "xhci_hcd";
 45 
 46 static struct hc_driver __read_mostly xhci_pci_hc_driver;
 47 
 48 /* called after powerup, by probe or system-pm "wakeup" */
 49 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
 50 {
 51         /*
 52          * TODO: Implement finding debug ports later.
 53          * TODO: see if there are any quirks that need to be added to handle
 54          * new extended capabilities.
 55          */
 56 
 57         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
 58         if (!pci_set_mwi(pdev))
 59                 xhci_dbg(xhci, "MWI active\n");
 60 
 61         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
 62         return 0;
 63 }
 64 
 65 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
 66 {
 67         struct pci_dev          *pdev = to_pci_dev(dev);
 68 
 69         /* Look for vendor-specific quirks */
 70         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
 71                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
 72                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
 73                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
 74                                 pdev->revision == 0x0) {
 75                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
 76                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 77                                 "QUIRK: Fresco Logic xHC needs configure"
 78                                 " endpoint cmd after reset endpoint");
 79                 }
 80                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
 81                                 pdev->revision == 0x4) {
 82                         xhci->quirks |= XHCI_SLOW_SUSPEND;
 83                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 84                                 "QUIRK: Fresco Logic xHC revision %u"
 85                                 "must be suspended extra slowly",
 86                                 pdev->revision);
 87                 }
 88                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK)
 89                         xhci->quirks |= XHCI_BROKEN_STREAMS;
 90                 /* Fresco Logic confirms: all revisions of this chip do not
 91                  * support MSI, even though some of them claim to in their PCI
 92                  * capabilities.
 93                  */
 94                 xhci->quirks |= XHCI_BROKEN_MSI;
 95                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 96                                 "QUIRK: Fresco Logic revision %u "
 97                                 "has broken MSI implementation",
 98                                 pdev->revision);
 99                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
100         }
101 
102         if (pdev->vendor == PCI_VENDOR_ID_NEC)
103                 xhci->quirks |= XHCI_NEC_HOST;
104 
105         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
106                 xhci->quirks |= XHCI_AMD_0x96_HOST;
107 
108         /* AMD PLL quirk */
109         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
110                 xhci->quirks |= XHCI_AMD_PLL_FIX;
111 
112         if (pdev->vendor == PCI_VENDOR_ID_AMD)
113                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
114 
115         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
116                 xhci->quirks |= XHCI_LPM_SUPPORT;
117                 xhci->quirks |= XHCI_INTEL_HOST;
118                 xhci->quirks |= XHCI_AVOID_BEI;
119         }
120         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
121                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
122                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
123                 xhci->limit_active_eps = 64;
124                 xhci->quirks |= XHCI_SW_BW_CHECKING;
125                 /*
126                  * PPT desktop boards DH77EB and DH77DF will power back on after
127                  * a few seconds of being shutdown.  The fix for this is to
128                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
129                  * DMI information to find those particular boards (since each
130                  * vendor will change the board name), so we have to key off all
131                  * PPT chipsets.
132                  */
133                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
134         }
135         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
136                 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) {
137                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
138         }
139         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
140                 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
141                  pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
142                  pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {
143                 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
144         }
145         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
146                         pdev->device == PCI_DEVICE_ID_EJ168) {
147                 xhci->quirks |= XHCI_RESET_ON_RESUME;
148                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
149                 xhci->quirks |= XHCI_BROKEN_STREAMS;
150         }
151         if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
152                         pdev->device == 0x0015)
153                 xhci->quirks |= XHCI_RESET_ON_RESUME;
154         if (pdev->vendor == PCI_VENDOR_ID_VIA)
155                 xhci->quirks |= XHCI_RESET_ON_RESUME;
156 
157         /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */
158         if (pdev->vendor == PCI_VENDOR_ID_VIA &&
159                         pdev->device == 0x3432)
160                 xhci->quirks |= XHCI_BROKEN_STREAMS;
161 
162         if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
163                         pdev->device == 0x1042)
164                 xhci->quirks |= XHCI_BROKEN_STREAMS;
165 
166         if (xhci->quirks & XHCI_RESET_ON_RESUME)
167                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
168                                 "QUIRK: Resetting on resume");
169 }
170 
171 /*
172  * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
173  * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
174  */
175 static void xhci_pme_quirk(struct xhci_hcd *xhci)
176 {
177         u32 val;
178         void __iomem *reg;
179 
180         reg = (void __iomem *) xhci->cap_regs + 0x80a4;
181         val = readl(reg);
182         writel(val | BIT(28), reg);
183         readl(reg);
184 }
185 
186 /* called during probe() after chip reset completes */
187 static int xhci_pci_setup(struct usb_hcd *hcd)
188 {
189         struct xhci_hcd         *xhci;
190         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
191         int                     retval;
192 
193         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
194         if (retval)
195                 return retval;
196 
197         xhci = hcd_to_xhci(hcd);
198         if (!usb_hcd_is_primary_hcd(hcd))
199                 return 0;
200 
201         pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
202         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
203 
204         /* Find any debug ports */
205         retval = xhci_pci_reinit(xhci, pdev);
206         if (!retval)
207                 return retval;
208 
209         kfree(xhci);
210         return retval;
211 }
212 
213 /*
214  * We need to register our own PCI probe function (instead of the USB core's
215  * function) in order to create a second roothub under xHCI.
216  */
217 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
218 {
219         int retval;
220         struct xhci_hcd *xhci;
221         struct hc_driver *driver;
222         struct usb_hcd *hcd;
223 
224         driver = (struct hc_driver *)id->driver_data;
225 
226         /* Prevent runtime suspending between USB-2 and USB-3 initialization */
227         pm_runtime_get_noresume(&dev->dev);
228 
229         /* Register the USB 2.0 roothub.
230          * FIXME: USB core must know to register the USB 2.0 roothub first.
231          * This is sort of silly, because we could just set the HCD driver flags
232          * to say USB 2.0, but I'm not sure what the implications would be in
233          * the other parts of the HCD code.
234          */
235         retval = usb_hcd_pci_probe(dev, id);
236 
237         if (retval)
238                 goto put_runtime_pm;
239 
240         /* USB 2.0 roothub is stored in the PCI device now. */
241         hcd = dev_get_drvdata(&dev->dev);
242         xhci = hcd_to_xhci(hcd);
243         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
244                                 pci_name(dev), hcd);
245         if (!xhci->shared_hcd) {
246                 retval = -ENOMEM;
247                 goto dealloc_usb2_hcd;
248         }
249 
250         /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
251          * is called by usb_add_hcd().
252          */
253         *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
254 
255         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
256                         IRQF_SHARED);
257         if (retval)
258                 goto put_usb3_hcd;
259         /* Roothub already marked as USB 3.0 speed */
260 
261         if (!(xhci->quirks & XHCI_BROKEN_STREAMS) &&
262                         HCC_MAX_PSA(xhci->hcc_params) >= 4)
263                 xhci->shared_hcd->can_do_streams = 1;
264 
265         /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
266         pm_runtime_put_noidle(&dev->dev);
267 
268         return 0;
269 
270 put_usb3_hcd:
271         usb_put_hcd(xhci->shared_hcd);
272 dealloc_usb2_hcd:
273         usb_hcd_pci_remove(dev);
274 put_runtime_pm:
275         pm_runtime_put_noidle(&dev->dev);
276         return retval;
277 }
278 
279 static void xhci_pci_remove(struct pci_dev *dev)
280 {
281         struct xhci_hcd *xhci;
282 
283         xhci = hcd_to_xhci(pci_get_drvdata(dev));
284         if (xhci->shared_hcd) {
285                 usb_remove_hcd(xhci->shared_hcd);
286                 usb_put_hcd(xhci->shared_hcd);
287         }
288         usb_hcd_pci_remove(dev);
289 
290         /* Workaround for spurious wakeups at shutdown with HSW */
291         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
292                 pci_set_power_state(dev, PCI_D3hot);
293 
294         kfree(xhci);
295 }
296 
297 #ifdef CONFIG_PM
298 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
299 {
300         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
301         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
302 
303         /*
304          * Systems with the TI redriver that loses port status change events
305          * need to have the registers polled during D3, so avoid D3cold.
306          */
307         if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
308                 pdev->no_d3cold = true;
309 
310         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
311                 xhci_pme_quirk(xhci);
312 
313         return xhci_suspend(xhci, do_wakeup);
314 }
315 
316 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
317 {
318         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
319         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
320         int                     retval = 0;
321 
322         /* The BIOS on systems with the Intel Panther Point chipset may or may
323          * not support xHCI natively.  That means that during system resume, it
324          * may switch the ports back to EHCI so that users can use their
325          * keyboard to select a kernel from GRUB after resume from hibernate.
326          *
327          * The BIOS is supposed to remember whether the OS had xHCI ports
328          * enabled before resume, and switch the ports back to xHCI when the
329          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
330          * writers.
331          *
332          * Unconditionally switch the ports back to xHCI after a system resume.
333          * It should not matter whether the EHCI or xHCI controller is
334          * resumed first. It's enough to do the switchover in xHCI because
335          * USB core won't notice anything as the hub driver doesn't start
336          * running again until after all the devices (including both EHCI and
337          * xHCI host controllers) have been resumed.
338          */
339 
340         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
341                 usb_enable_intel_xhci_ports(pdev);
342 
343         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
344                 xhci_pme_quirk(xhci);
345 
346         retval = xhci_resume(xhci, hibernated);
347         return retval;
348 }
349 #endif /* CONFIG_PM */
350 
351 /*-------------------------------------------------------------------------*/
352 
353 /* PCI driver selection metadata; PCI hotplugging uses this */
354 static const struct pci_device_id pci_ids[] = { {
355         /* handle any USB 3.0 xHCI controller */
356         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
357         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
358         },
359         { /* end: all zeroes */ }
360 };
361 MODULE_DEVICE_TABLE(pci, pci_ids);
362 
363 /* pci driver glue; this is a "new style" PCI driver module */
364 static struct pci_driver xhci_pci_driver = {
365         .name =         (char *) hcd_name,
366         .id_table =     pci_ids,
367 
368         .probe =        xhci_pci_probe,
369         .remove =       xhci_pci_remove,
370         /* suspend and resume implemented later */
371 
372         .shutdown =     usb_hcd_pci_shutdown,
373 #ifdef CONFIG_PM
374         .driver = {
375                 .pm = &usb_hcd_pci_pm_ops
376         },
377 #endif
378 };
379 
380 static int __init xhci_pci_init(void)
381 {
382         xhci_init_driver(&xhci_pci_hc_driver, xhci_pci_setup);
383 #ifdef CONFIG_PM
384         xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend;
385         xhci_pci_hc_driver.pci_resume = xhci_pci_resume;
386 #endif
387         return pci_register_driver(&xhci_pci_driver);
388 }
389 module_init(xhci_pci_init);
390 
391 static void __exit xhci_pci_exit(void)
392 {
393         pci_unregister_driver(&xhci_pci_driver);
394 }
395 module_exit(xhci_pci_exit);
396 
397 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver");
398 MODULE_LICENSE("GPL");
399 

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