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Linux/drivers/usb/host/xhci-pci.c

  1 /*
  2  * xHCI host controller driver PCI Bus Glue.
  3  *
  4  * Copyright (C) 2008 Intel Corp.
  5  *
  6  * Author: Sarah Sharp
  7  * Some code borrowed from the Linux EHCI driver.
  8  *
  9  * This program is free software; you can redistribute it and/or modify
 10  * it under the terms of the GNU General Public License version 2 as
 11  * published by the Free Software Foundation.
 12  *
 13  * This program is distributed in the hope that it will be useful, but
 14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
 15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 16  * for more details.
 17  *
 18  * You should have received a copy of the GNU General Public License
 19  * along with this program; if not, write to the Free Software Foundation,
 20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 21  */
 22 
 23 #include <linux/pci.h>
 24 #include <linux/slab.h>
 25 #include <linux/module.h>
 26 
 27 #include "xhci.h"
 28 #include "xhci-trace.h"
 29 
 30 /* Device for a quirk */
 31 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
 32 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
 33 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
 34 
 35 #define PCI_VENDOR_ID_ETRON             0x1b6f
 36 #define PCI_DEVICE_ID_ASROCK_P67        0x7023
 37 
 38 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI      0x8c31
 39 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI   0x9c31
 40 
 41 static const char hcd_name[] = "xhci_hcd";
 42 
 43 /* called after powerup, by probe or system-pm "wakeup" */
 44 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
 45 {
 46         /*
 47          * TODO: Implement finding debug ports later.
 48          * TODO: see if there are any quirks that need to be added to handle
 49          * new extended capabilities.
 50          */
 51 
 52         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
 53         if (!pci_set_mwi(pdev))
 54                 xhci_dbg(xhci, "MWI active\n");
 55 
 56         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
 57         return 0;
 58 }
 59 
 60 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
 61 {
 62         struct pci_dev          *pdev = to_pci_dev(dev);
 63 
 64         /* Look for vendor-specific quirks */
 65         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
 66                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
 67                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
 68                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
 69                                 pdev->revision == 0x0) {
 70                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
 71                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 72                                 "QUIRK: Fresco Logic xHC needs configure"
 73                                 " endpoint cmd after reset endpoint");
 74                 }
 75                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
 76                                 pdev->revision == 0x4) {
 77                         xhci->quirks |= XHCI_SLOW_SUSPEND;
 78                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 79                                 "QUIRK: Fresco Logic xHC revision %u"
 80                                 "must be suspended extra slowly",
 81                                 pdev->revision);
 82                 }
 83                 /* Fresco Logic confirms: all revisions of this chip do not
 84                  * support MSI, even though some of them claim to in their PCI
 85                  * capabilities.
 86                  */
 87                 xhci->quirks |= XHCI_BROKEN_MSI;
 88                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 89                                 "QUIRK: Fresco Logic revision %u "
 90                                 "has broken MSI implementation",
 91                                 pdev->revision);
 92                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
 93         }
 94 
 95         if (pdev->vendor == PCI_VENDOR_ID_NEC)
 96                 xhci->quirks |= XHCI_NEC_HOST;
 97 
 98         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
 99                 xhci->quirks |= XHCI_AMD_0x96_HOST;
100 
101         /* AMD PLL quirk */
102         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
103                 xhci->quirks |= XHCI_AMD_PLL_FIX;
104         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
105                 xhci->quirks |= XHCI_LPM_SUPPORT;
106                 xhci->quirks |= XHCI_INTEL_HOST;
107         }
108         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
109                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
110                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
111                 xhci->limit_active_eps = 64;
112                 xhci->quirks |= XHCI_SW_BW_CHECKING;
113                 /*
114                  * PPT desktop boards DH77EB and DH77DF will power back on after
115                  * a few seconds of being shutdown.  The fix for this is to
116                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
117                  * DMI information to find those particular boards (since each
118                  * vendor will change the board name), so we have to key off all
119                  * PPT chipsets.
120                  */
121                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
122                 xhci->quirks |= XHCI_AVOID_BEI;
123         }
124         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
125             (pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI ||
126              pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI)) {
127                 /* Workaround for occasional spurious wakeups from S5 (or
128                  * any other sleep) on Haswell machines with LPT and LPT-LP
129                  * with the new Intel BIOS
130                  */
131                 /* Limit the quirk to only known vendors, as this triggers
132                  * yet another BIOS bug on some other machines
133                  * https://bugzilla.kernel.org/show_bug.cgi?id=66171
134                  */
135                 if (pdev->subsystem_vendor == PCI_VENDOR_ID_HP)
136                         xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
137         }
138         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
139                         pdev->device == PCI_DEVICE_ID_ASROCK_P67) {
140                 xhci->quirks |= XHCI_RESET_ON_RESUME;
141                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
142                                 "QUIRK: Resetting on resume");
143                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
144         }
145         if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
146                         pdev->device == 0x0015 &&
147                         pdev->subsystem_vendor == PCI_VENDOR_ID_SAMSUNG &&
148                         pdev->subsystem_device == 0xc0cd)
149                 xhci->quirks |= XHCI_RESET_ON_RESUME;
150         if (pdev->vendor == PCI_VENDOR_ID_VIA)
151                 xhci->quirks |= XHCI_RESET_ON_RESUME;
152 }
153 
154 /* called during probe() after chip reset completes */
155 static int xhci_pci_setup(struct usb_hcd *hcd)
156 {
157         struct xhci_hcd         *xhci;
158         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
159         int                     retval;
160 
161         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
162         if (retval)
163                 return retval;
164 
165         xhci = hcd_to_xhci(hcd);
166         if (!usb_hcd_is_primary_hcd(hcd))
167                 return 0;
168 
169         pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
170         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
171 
172         /* Find any debug ports */
173         retval = xhci_pci_reinit(xhci, pdev);
174         if (!retval)
175                 return retval;
176 
177         kfree(xhci);
178         return retval;
179 }
180 
181 /*
182  * We need to register our own PCI probe function (instead of the USB core's
183  * function) in order to create a second roothub under xHCI.
184  */
185 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
186 {
187         int retval;
188         struct xhci_hcd *xhci;
189         struct hc_driver *driver;
190         struct usb_hcd *hcd;
191 
192         driver = (struct hc_driver *)id->driver_data;
193         /* Register the USB 2.0 roothub.
194          * FIXME: USB core must know to register the USB 2.0 roothub first.
195          * This is sort of silly, because we could just set the HCD driver flags
196          * to say USB 2.0, but I'm not sure what the implications would be in
197          * the other parts of the HCD code.
198          */
199         retval = usb_hcd_pci_probe(dev, id);
200 
201         if (retval)
202                 return retval;
203 
204         /* USB 2.0 roothub is stored in the PCI device now. */
205         hcd = dev_get_drvdata(&dev->dev);
206         xhci = hcd_to_xhci(hcd);
207         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
208                                 pci_name(dev), hcd);
209         if (!xhci->shared_hcd) {
210                 retval = -ENOMEM;
211                 goto dealloc_usb2_hcd;
212         }
213 
214         /* Set the xHCI pointer before xhci_pci_setup() (aka hcd_driver.reset)
215          * is called by usb_add_hcd().
216          */
217         *((struct xhci_hcd **) xhci->shared_hcd->hcd_priv) = xhci;
218 
219         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
220                         IRQF_SHARED);
221         if (retval)
222                 goto put_usb3_hcd;
223         /* Roothub already marked as USB 3.0 speed */
224 
225         /* We know the LPM timeout algorithms for this host, let the USB core
226          * enable and disable LPM for devices under the USB 3.0 roothub.
227          */
228         if (xhci->quirks & XHCI_LPM_SUPPORT)
229                 hcd_to_bus(xhci->shared_hcd)->root_hub->lpm_capable = 1;
230 
231         return 0;
232 
233 put_usb3_hcd:
234         usb_put_hcd(xhci->shared_hcd);
235 dealloc_usb2_hcd:
236         usb_hcd_pci_remove(dev);
237         return retval;
238 }
239 
240 static void xhci_pci_remove(struct pci_dev *dev)
241 {
242         struct xhci_hcd *xhci;
243 
244         xhci = hcd_to_xhci(pci_get_drvdata(dev));
245         if (xhci->shared_hcd) {
246                 usb_remove_hcd(xhci->shared_hcd);
247                 usb_put_hcd(xhci->shared_hcd);
248         }
249         usb_hcd_pci_remove(dev);
250 
251         /* Workaround for spurious wakeups at shutdown with HSW */
252         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
253                 pci_set_power_state(dev, PCI_D3hot);
254 
255         kfree(xhci);
256 }
257 
258 #ifdef CONFIG_PM
259 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
260 {
261         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
262         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
263 
264         /*
265          * Systems with the TI redriver that loses port status change events
266          * need to have the registers polled during D3, so avoid D3cold.
267          */
268         if (xhci_compliance_mode_recovery_timer_quirk_check())
269                 pdev->no_d3cold = true;
270 
271         return xhci_suspend(xhci);
272 }
273 
274 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
275 {
276         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
277         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
278         int                     retval = 0;
279 
280         /* The BIOS on systems with the Intel Panther Point chipset may or may
281          * not support xHCI natively.  That means that during system resume, it
282          * may switch the ports back to EHCI so that users can use their
283          * keyboard to select a kernel from GRUB after resume from hibernate.
284          *
285          * The BIOS is supposed to remember whether the OS had xHCI ports
286          * enabled before resume, and switch the ports back to xHCI when the
287          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
288          * writers.
289          *
290          * Unconditionally switch the ports back to xHCI after a system resume.
291          * It should not matter whether the EHCI or xHCI controller is
292          * resumed first. It's enough to do the switchover in xHCI because
293          * USB core won't notice anything as the hub driver doesn't start
294          * running again until after all the devices (including both EHCI and
295          * xHCI host controllers) have been resumed.
296          */
297 
298         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
299                 usb_enable_intel_xhci_ports(pdev);
300 
301         retval = xhci_resume(xhci, hibernated);
302         return retval;
303 }
304 #endif /* CONFIG_PM */
305 
306 static const struct hc_driver xhci_pci_hc_driver = {
307         .description =          hcd_name,
308         .product_desc =         "xHCI Host Controller",
309         .hcd_priv_size =        sizeof(struct xhci_hcd *),
310 
311         /*
312          * generic hardware linkage
313          */
314         .irq =                  xhci_irq,
315         .flags =                HCD_MEMORY | HCD_USB3 | HCD_SHARED,
316 
317         /*
318          * basic lifecycle operations
319          */
320         .reset =                xhci_pci_setup,
321         .start =                xhci_run,
322 #ifdef CONFIG_PM
323         .pci_suspend =          xhci_pci_suspend,
324         .pci_resume =           xhci_pci_resume,
325 #endif
326         .stop =                 xhci_stop,
327         .shutdown =             xhci_shutdown,
328 
329         /*
330          * managing i/o requests and associated device resources
331          */
332         .urb_enqueue =          xhci_urb_enqueue,
333         .urb_dequeue =          xhci_urb_dequeue,
334         .alloc_dev =            xhci_alloc_dev,
335         .free_dev =             xhci_free_dev,
336         .alloc_streams =        xhci_alloc_streams,
337         .free_streams =         xhci_free_streams,
338         .add_endpoint =         xhci_add_endpoint,
339         .drop_endpoint =        xhci_drop_endpoint,
340         .endpoint_reset =       xhci_endpoint_reset,
341         .check_bandwidth =      xhci_check_bandwidth,
342         .reset_bandwidth =      xhci_reset_bandwidth,
343         .address_device =       xhci_address_device,
344         .enable_device =        xhci_enable_device,
345         .update_hub_device =    xhci_update_hub_device,
346         .reset_device =         xhci_discover_or_reset_device,
347 
348         /*
349          * scheduling support
350          */
351         .get_frame_number =     xhci_get_frame,
352 
353         /* Root hub support */
354         .hub_control =          xhci_hub_control,
355         .hub_status_data =      xhci_hub_status_data,
356         .bus_suspend =          xhci_bus_suspend,
357         .bus_resume =           xhci_bus_resume,
358         /*
359          * call back when device connected and addressed
360          */
361         .update_device =        xhci_update_device,
362         .set_usb2_hw_lpm =      xhci_set_usb2_hardware_lpm,
363         .enable_usb3_lpm_timeout =      xhci_enable_usb3_lpm_timeout,
364         .disable_usb3_lpm_timeout =     xhci_disable_usb3_lpm_timeout,
365         .find_raw_port_number = xhci_find_raw_port_number,
366 };
367 
368 /*-------------------------------------------------------------------------*/
369 
370 /* PCI driver selection metadata; PCI hotplugging uses this */
371 static const struct pci_device_id pci_ids[] = { {
372         /* handle any USB 3.0 xHCI controller */
373         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
374         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
375         },
376         { /* end: all zeroes */ }
377 };
378 MODULE_DEVICE_TABLE(pci, pci_ids);
379 
380 /* pci driver glue; this is a "new style" PCI driver module */
381 static struct pci_driver xhci_pci_driver = {
382         .name =         (char *) hcd_name,
383         .id_table =     pci_ids,
384 
385         .probe =        xhci_pci_probe,
386         .remove =       xhci_pci_remove,
387         /* suspend and resume implemented later */
388 
389         .shutdown =     usb_hcd_pci_shutdown,
390 #ifdef CONFIG_PM
391         .driver = {
392                 .pm = &usb_hcd_pci_pm_ops
393         },
394 #endif
395 };
396 
397 int __init xhci_register_pci(void)
398 {
399         return pci_register_driver(&xhci_pci_driver);
400 }
401 
402 void xhci_unregister_pci(void)
403 {
404         pci_unregister_driver(&xhci_pci_driver);
405 }
406 

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