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Linux/drivers/usb/host/xhci-pci.c

  1 /*
  2  * xHCI host controller driver PCI Bus Glue.
  3  *
  4  * Copyright (C) 2008 Intel Corp.
  5  *
  6  * Author: Sarah Sharp
  7  * Some code borrowed from the Linux EHCI driver.
  8  *
  9  * This program is free software; you can redistribute it and/or modify
 10  * it under the terms of the GNU General Public License version 2 as
 11  * published by the Free Software Foundation.
 12  *
 13  * This program is distributed in the hope that it will be useful, but
 14  * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
 15  * or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 16  * for more details.
 17  *
 18  * You should have received a copy of the GNU General Public License
 19  * along with this program; if not, write to the Free Software Foundation,
 20  * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 21  */
 22 
 23 #include <linux/pci.h>
 24 #include <linux/slab.h>
 25 #include <linux/module.h>
 26 #include <linux/acpi.h>
 27 
 28 #include "xhci.h"
 29 #include "xhci-trace.h"
 30 
 31 #define PORT2_SSIC_CONFIG_REG2  0x883c
 32 #define PROG_DONE               (1 << 30)
 33 #define SSIC_PORT_UNUSED        (1 << 31)
 34 
 35 /* Device for a quirk */
 36 #define PCI_VENDOR_ID_FRESCO_LOGIC      0x1b73
 37 #define PCI_DEVICE_ID_FRESCO_LOGIC_PDK  0x1000
 38 #define PCI_DEVICE_ID_FRESCO_LOGIC_FL1400       0x1400
 39 
 40 #define PCI_VENDOR_ID_ETRON             0x1b6f
 41 #define PCI_DEVICE_ID_EJ168             0x7023
 42 
 43 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI      0x8c31
 44 #define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI   0x9c31
 45 #define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI             0x22b5
 46 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI         0xa12f
 47 #define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI        0x9d2f
 48 
 49 static const char hcd_name[] = "xhci_hcd";
 50 
 51 static struct hc_driver __read_mostly xhci_pci_hc_driver;
 52 
 53 static int xhci_pci_setup(struct usb_hcd *hcd);
 54 
 55 static const struct xhci_driver_overrides xhci_pci_overrides __initconst = {
 56         .extra_priv_size = sizeof(struct xhci_hcd),
 57         .reset = xhci_pci_setup,
 58 };
 59 
 60 /* called after powerup, by probe or system-pm "wakeup" */
 61 static int xhci_pci_reinit(struct xhci_hcd *xhci, struct pci_dev *pdev)
 62 {
 63         /*
 64          * TODO: Implement finding debug ports later.
 65          * TODO: see if there are any quirks that need to be added to handle
 66          * new extended capabilities.
 67          */
 68 
 69         /* PCI Memory-Write-Invalidate cycle support is optional (uncommon) */
 70         if (!pci_set_mwi(pdev))
 71                 xhci_dbg(xhci, "MWI active\n");
 72 
 73         xhci_dbg(xhci, "Finished xhci_pci_reinit\n");
 74         return 0;
 75 }
 76 
 77 static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
 78 {
 79         struct pci_dev          *pdev = to_pci_dev(dev);
 80 
 81         /* Look for vendor-specific quirks */
 82         if (pdev->vendor == PCI_VENDOR_ID_FRESCO_LOGIC &&
 83                         (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK ||
 84                          pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_FL1400)) {
 85                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
 86                                 pdev->revision == 0x0) {
 87                         xhci->quirks |= XHCI_RESET_EP_QUIRK;
 88                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 89                                 "QUIRK: Fresco Logic xHC needs configure"
 90                                 " endpoint cmd after reset endpoint");
 91                 }
 92                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK &&
 93                                 pdev->revision == 0x4) {
 94                         xhci->quirks |= XHCI_SLOW_SUSPEND;
 95                         xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
 96                                 "QUIRK: Fresco Logic xHC revision %u"
 97                                 "must be suspended extra slowly",
 98                                 pdev->revision);
 99                 }
100                 if (pdev->device == PCI_DEVICE_ID_FRESCO_LOGIC_PDK)
101                         xhci->quirks |= XHCI_BROKEN_STREAMS;
102                 /* Fresco Logic confirms: all revisions of this chip do not
103                  * support MSI, even though some of them claim to in their PCI
104                  * capabilities.
105                  */
106                 xhci->quirks |= XHCI_BROKEN_MSI;
107                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
108                                 "QUIRK: Fresco Logic revision %u "
109                                 "has broken MSI implementation",
110                                 pdev->revision);
111                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
112         }
113 
114         if (pdev->vendor == PCI_VENDOR_ID_NEC)
115                 xhci->quirks |= XHCI_NEC_HOST;
116 
117         if (pdev->vendor == PCI_VENDOR_ID_AMD && xhci->hci_version == 0x96)
118                 xhci->quirks |= XHCI_AMD_0x96_HOST;
119 
120         /* AMD PLL quirk */
121         if (pdev->vendor == PCI_VENDOR_ID_AMD && usb_amd_find_chipset_info())
122                 xhci->quirks |= XHCI_AMD_PLL_FIX;
123 
124         if (pdev->vendor == PCI_VENDOR_ID_AMD)
125                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
126 
127         if (pdev->vendor == PCI_VENDOR_ID_INTEL) {
128                 xhci->quirks |= XHCI_LPM_SUPPORT;
129                 xhci->quirks |= XHCI_INTEL_HOST;
130                 xhci->quirks |= XHCI_AVOID_BEI;
131         }
132         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
133                         pdev->device == PCI_DEVICE_ID_INTEL_PANTHERPOINT_XHCI) {
134                 xhci->quirks |= XHCI_EP_LIMIT_QUIRK;
135                 xhci->limit_active_eps = 64;
136                 xhci->quirks |= XHCI_SW_BW_CHECKING;
137                 /*
138                  * PPT desktop boards DH77EB and DH77DF will power back on after
139                  * a few seconds of being shutdown.  The fix for this is to
140                  * switch the ports from xHCI to EHCI on shutdown.  We can't use
141                  * DMI information to find those particular boards (since each
142                  * vendor will change the board name), so we have to key off all
143                  * PPT chipsets.
144                  */
145                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
146         }
147         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
148                 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) {
149                 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
150                 xhci->quirks |= XHCI_SPURIOUS_WAKEUP;
151         }
152         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
153                 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
154                  pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
155                  pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {
156                 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
157         }
158         if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
159                         pdev->device == PCI_DEVICE_ID_EJ168) {
160                 xhci->quirks |= XHCI_RESET_ON_RESUME;
161                 xhci->quirks |= XHCI_TRUST_TX_LENGTH;
162                 xhci->quirks |= XHCI_BROKEN_STREAMS;
163         }
164         if (pdev->vendor == PCI_VENDOR_ID_RENESAS &&
165                         pdev->device == 0x0015)
166                 xhci->quirks |= XHCI_RESET_ON_RESUME;
167         if (pdev->vendor == PCI_VENDOR_ID_VIA)
168                 xhci->quirks |= XHCI_RESET_ON_RESUME;
169 
170         /* See https://bugzilla.kernel.org/show_bug.cgi?id=79511 */
171         if (pdev->vendor == PCI_VENDOR_ID_VIA &&
172                         pdev->device == 0x3432)
173                 xhci->quirks |= XHCI_BROKEN_STREAMS;
174 
175         if (pdev->vendor == PCI_VENDOR_ID_ASMEDIA &&
176                         pdev->device == 0x1042)
177                 xhci->quirks |= XHCI_BROKEN_STREAMS;
178 
179         if (xhci->quirks & XHCI_RESET_ON_RESUME)
180                 xhci_dbg_trace(xhci, trace_xhci_dbg_quirks,
181                                 "QUIRK: Resetting on resume");
182 }
183 
184 #ifdef CONFIG_ACPI
185 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev)
186 {
187         static const u8 intel_dsm_uuid[] = {
188                 0xb7, 0x0c, 0x34, 0xac, 0x01, 0xe9, 0xbf, 0x45,
189                 0xb7, 0xe6, 0x2b, 0x34, 0xec, 0x93, 0x1e, 0x23,
190         };
191         union acpi_object *obj;
192 
193         obj = acpi_evaluate_dsm(ACPI_HANDLE(&dev->dev), intel_dsm_uuid, 3, 1,
194                                 NULL);
195         ACPI_FREE(obj);
196 }
197 #else
198 static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
199 #endif /* CONFIG_ACPI */
200 
201 /* called during probe() after chip reset completes */
202 static int xhci_pci_setup(struct usb_hcd *hcd)
203 {
204         struct xhci_hcd         *xhci;
205         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
206         int                     retval;
207 
208         xhci = hcd_to_xhci(hcd);
209         if (!xhci->sbrn)
210                 pci_read_config_byte(pdev, XHCI_SBRN_OFFSET, &xhci->sbrn);
211 
212         retval = xhci_gen_setup(hcd, xhci_pci_quirks);
213         if (retval)
214                 return retval;
215 
216         if (!usb_hcd_is_primary_hcd(hcd))
217                 return 0;
218 
219         xhci_dbg(xhci, "Got SBRN %u\n", (unsigned int) xhci->sbrn);
220 
221         /* Find any debug ports */
222         retval = xhci_pci_reinit(xhci, pdev);
223         if (!retval)
224                 return retval;
225 
226         return retval;
227 }
228 
229 /*
230  * We need to register our own PCI probe function (instead of the USB core's
231  * function) in order to create a second roothub under xHCI.
232  */
233 static int xhci_pci_probe(struct pci_dev *dev, const struct pci_device_id *id)
234 {
235         int retval;
236         struct xhci_hcd *xhci;
237         struct hc_driver *driver;
238         struct usb_hcd *hcd;
239 
240         driver = (struct hc_driver *)id->driver_data;
241 
242         /* Prevent runtime suspending between USB-2 and USB-3 initialization */
243         pm_runtime_get_noresume(&dev->dev);
244 
245         /* Register the USB 2.0 roothub.
246          * FIXME: USB core must know to register the USB 2.0 roothub first.
247          * This is sort of silly, because we could just set the HCD driver flags
248          * to say USB 2.0, but I'm not sure what the implications would be in
249          * the other parts of the HCD code.
250          */
251         retval = usb_hcd_pci_probe(dev, id);
252 
253         if (retval)
254                 goto put_runtime_pm;
255 
256         /* USB 2.0 roothub is stored in the PCI device now. */
257         hcd = dev_get_drvdata(&dev->dev);
258         xhci = hcd_to_xhci(hcd);
259         xhci->shared_hcd = usb_create_shared_hcd(driver, &dev->dev,
260                                 pci_name(dev), hcd);
261         if (!xhci->shared_hcd) {
262                 retval = -ENOMEM;
263                 goto dealloc_usb2_hcd;
264         }
265 
266         retval = usb_add_hcd(xhci->shared_hcd, dev->irq,
267                         IRQF_SHARED);
268         if (retval)
269                 goto put_usb3_hcd;
270         /* Roothub already marked as USB 3.0 speed */
271 
272         if (!(xhci->quirks & XHCI_BROKEN_STREAMS) &&
273                         HCC_MAX_PSA(xhci->hcc_params) >= 4)
274                 xhci->shared_hcd->can_do_streams = 1;
275 
276         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
277                 xhci_pme_acpi_rtd3_enable(dev);
278 
279         /* USB-2 and USB-3 roothubs initialized, allow runtime pm suspend */
280         pm_runtime_put_noidle(&dev->dev);
281 
282         return 0;
283 
284 put_usb3_hcd:
285         usb_put_hcd(xhci->shared_hcd);
286 dealloc_usb2_hcd:
287         usb_hcd_pci_remove(dev);
288 put_runtime_pm:
289         pm_runtime_put_noidle(&dev->dev);
290         return retval;
291 }
292 
293 static void xhci_pci_remove(struct pci_dev *dev)
294 {
295         struct xhci_hcd *xhci;
296 
297         xhci = hcd_to_xhci(pci_get_drvdata(dev));
298         if (xhci->shared_hcd) {
299                 usb_remove_hcd(xhci->shared_hcd);
300                 usb_put_hcd(xhci->shared_hcd);
301         }
302         usb_hcd_pci_remove(dev);
303 
304         /* Workaround for spurious wakeups at shutdown with HSW */
305         if (xhci->quirks & XHCI_SPURIOUS_WAKEUP)
306                 pci_set_power_state(dev, PCI_D3hot);
307 }
308 
309 #ifdef CONFIG_PM
310 /*
311  * In some Intel xHCI controllers, in order to get D3 working,
312  * through a vendor specific SSIC CONFIG register at offset 0x883c,
313  * SSIC PORT need to be marked as "unused" before putting xHCI
314  * into D3. After D3 exit, the SSIC port need to be marked as "used".
315  * Without this change, xHCI might not enter D3 state.
316  * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
317  * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
318  */
319 static void xhci_pme_quirk(struct usb_hcd *hcd, bool suspend)
320 {
321         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
322         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
323         u32 val;
324         void __iomem *reg;
325 
326         if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
327                  pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI) {
328 
329                 reg = (void __iomem *) xhci->cap_regs + PORT2_SSIC_CONFIG_REG2;
330 
331                 /* Notify SSIC that SSIC profile programming is not done */
332                 val = readl(reg) & ~PROG_DONE;
333                 writel(val, reg);
334 
335                 /* Mark SSIC port as unused(suspend) or used(resume) */
336                 val = readl(reg);
337                 if (suspend)
338                         val |= SSIC_PORT_UNUSED;
339                 else
340                         val &= ~SSIC_PORT_UNUSED;
341                 writel(val, reg);
342 
343                 /* Notify SSIC that SSIC profile programming is done */
344                 val = readl(reg) | PROG_DONE;
345                 writel(val, reg);
346                 readl(reg);
347         }
348 
349         reg = (void __iomem *) xhci->cap_regs + 0x80a4;
350         val = readl(reg);
351         writel(val | BIT(28), reg);
352         readl(reg);
353 }
354 
355 static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
356 {
357         struct xhci_hcd *xhci = hcd_to_xhci(hcd);
358         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
359 
360         /*
361          * Systems with the TI redriver that loses port status change events
362          * need to have the registers polled during D3, so avoid D3cold.
363          */
364         if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
365                 pdev->no_d3cold = true;
366 
367         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
368                 xhci_pme_quirk(hcd, true);
369 
370         return xhci_suspend(xhci, do_wakeup);
371 }
372 
373 static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
374 {
375         struct xhci_hcd         *xhci = hcd_to_xhci(hcd);
376         struct pci_dev          *pdev = to_pci_dev(hcd->self.controller);
377         int                     retval = 0;
378 
379         /* The BIOS on systems with the Intel Panther Point chipset may or may
380          * not support xHCI natively.  That means that during system resume, it
381          * may switch the ports back to EHCI so that users can use their
382          * keyboard to select a kernel from GRUB after resume from hibernate.
383          *
384          * The BIOS is supposed to remember whether the OS had xHCI ports
385          * enabled before resume, and switch the ports back to xHCI when the
386          * BIOS/OS semaphore is written, but we all know we can't trust BIOS
387          * writers.
388          *
389          * Unconditionally switch the ports back to xHCI after a system resume.
390          * It should not matter whether the EHCI or xHCI controller is
391          * resumed first. It's enough to do the switchover in xHCI because
392          * USB core won't notice anything as the hub driver doesn't start
393          * running again until after all the devices (including both EHCI and
394          * xHCI host controllers) have been resumed.
395          */
396 
397         if (pdev->vendor == PCI_VENDOR_ID_INTEL)
398                 usb_enable_intel_xhci_ports(pdev);
399 
400         if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
401                 xhci_pme_quirk(hcd, false);
402 
403         retval = xhci_resume(xhci, hibernated);
404         return retval;
405 }
406 #endif /* CONFIG_PM */
407 
408 /*-------------------------------------------------------------------------*/
409 
410 /* PCI driver selection metadata; PCI hotplugging uses this */
411 static const struct pci_device_id pci_ids[] = { {
412         /* handle any USB 3.0 xHCI controller */
413         PCI_DEVICE_CLASS(PCI_CLASS_SERIAL_USB_XHCI, ~0),
414         .driver_data =  (unsigned long) &xhci_pci_hc_driver,
415         },
416         { /* end: all zeroes */ }
417 };
418 MODULE_DEVICE_TABLE(pci, pci_ids);
419 
420 /* pci driver glue; this is a "new style" PCI driver module */
421 static struct pci_driver xhci_pci_driver = {
422         .name =         (char *) hcd_name,
423         .id_table =     pci_ids,
424 
425         .probe =        xhci_pci_probe,
426         .remove =       xhci_pci_remove,
427         /* suspend and resume implemented later */
428 
429         .shutdown =     usb_hcd_pci_shutdown,
430 #ifdef CONFIG_PM
431         .driver = {
432                 .pm = &usb_hcd_pci_pm_ops
433         },
434 #endif
435 };
436 
437 static int __init xhci_pci_init(void)
438 {
439         xhci_init_driver(&xhci_pci_hc_driver, &xhci_pci_overrides);
440 #ifdef CONFIG_PM
441         xhci_pci_hc_driver.pci_suspend = xhci_pci_suspend;
442         xhci_pci_hc_driver.pci_resume = xhci_pci_resume;
443 #endif
444         return pci_register_driver(&xhci_pci_driver);
445 }
446 module_init(xhci_pci_init);
447 
448 static void __exit xhci_pci_exit(void)
449 {
450         pci_unregister_driver(&xhci_pci_driver);
451 }
452 module_exit(xhci_pci_exit);
453 
454 MODULE_DESCRIPTION("xHCI PCI Host Controller Driver");
455 MODULE_LICENSE("GPL");
456 

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