Version:  2.6.34 2.6.35 2.6.36 2.6.37 2.6.38 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14

Linux/drivers/usb/host/ehci-tegra.c

  1 /*
  2  * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
  3  *
  4  * Copyright (C) 2010 Google, Inc.
  5  * Copyright (C) 2009 - 2013 NVIDIA Corporation
  6  *
  7  * This program is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License as published by the
  9  * Free Software Foundation; either version 2 of the License, or (at your
 10  * option) any later version.
 11  *
 12  * This program is distributed in the hope that it will be useful, but WITHOUT
 13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 15  * more details.
 16  *
 17  */
 18 
 19 #include <linux/clk.h>
 20 #include <linux/dma-mapping.h>
 21 #include <linux/err.h>
 22 #include <linux/gpio.h>
 23 #include <linux/io.h>
 24 #include <linux/irq.h>
 25 #include <linux/module.h>
 26 #include <linux/of.h>
 27 #include <linux/of_device.h>
 28 #include <linux/of_gpio.h>
 29 #include <linux/platform_device.h>
 30 #include <linux/pm_runtime.h>
 31 #include <linux/reset.h>
 32 #include <linux/slab.h>
 33 #include <linux/usb/ehci_def.h>
 34 #include <linux/usb/tegra_usb_phy.h>
 35 #include <linux/usb.h>
 36 #include <linux/usb/hcd.h>
 37 #include <linux/usb/otg.h>
 38 
 39 #include "ehci.h"
 40 
 41 #define TEGRA_USB_BASE                  0xC5000000
 42 #define TEGRA_USB2_BASE                 0xC5004000
 43 #define TEGRA_USB3_BASE                 0xC5008000
 44 
 45 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
 46 
 47 #define TEGRA_USB_DMA_ALIGN 32
 48 
 49 #define DRIVER_DESC "Tegra EHCI driver"
 50 #define DRV_NAME "tegra-ehci"
 51 
 52 static struct hc_driver __read_mostly tegra_ehci_hc_driver;
 53 
 54 struct tegra_ehci_soc_config {
 55         bool has_hostpc;
 56 };
 57 
 58 static int (*orig_hub_control)(struct usb_hcd *hcd,
 59                                 u16 typeReq, u16 wValue, u16 wIndex,
 60                                 char *buf, u16 wLength);
 61 
 62 struct tegra_ehci_hcd {
 63         struct tegra_usb_phy *phy;
 64         struct clk *clk;
 65         struct reset_control *rst;
 66         int port_resuming;
 67         bool needs_double_reset;
 68         enum tegra_usb_phy_port_speed port_speed;
 69 };
 70 
 71 static int tegra_ehci_internal_port_reset(
 72         struct ehci_hcd *ehci,
 73         u32 __iomem     *portsc_reg
 74 )
 75 {
 76         u32             temp;
 77         unsigned long   flags;
 78         int             retval = 0;
 79         int             i, tries;
 80         u32             saved_usbintr;
 81 
 82         spin_lock_irqsave(&ehci->lock, flags);
 83         saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
 84         /* disable USB interrupt */
 85         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 86         spin_unlock_irqrestore(&ehci->lock, flags);
 87 
 88         /*
 89          * Here we have to do Port Reset at most twice for
 90          * Port Enable bit to be set.
 91          */
 92         for (i = 0; i < 2; i++) {
 93                 temp = ehci_readl(ehci, portsc_reg);
 94                 temp |= PORT_RESET;
 95                 ehci_writel(ehci, temp, portsc_reg);
 96                 mdelay(10);
 97                 temp &= ~PORT_RESET;
 98                 ehci_writel(ehci, temp, portsc_reg);
 99                 mdelay(1);
100                 tries = 100;
101                 do {
102                         mdelay(1);
103                         /*
104                          * Up to this point, Port Enable bit is
105                          * expected to be set after 2 ms waiting.
106                          * USB1 usually takes extra 45 ms, for safety,
107                          * we take 100 ms as timeout.
108                          */
109                         temp = ehci_readl(ehci, portsc_reg);
110                 } while (!(temp & PORT_PE) && tries--);
111                 if (temp & PORT_PE)
112                         break;
113         }
114         if (i == 2)
115                 retval = -ETIMEDOUT;
116 
117         /*
118          * Clear Connect Status Change bit if it's set.
119          * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared.
120          */
121         if (temp & PORT_CSC)
122                 ehci_writel(ehci, PORT_CSC, portsc_reg);
123 
124         /*
125          * Write to clear any interrupt status bits that might be set
126          * during port reset.
127          */
128         temp = ehci_readl(ehci, &ehci->regs->status);
129         ehci_writel(ehci, temp, &ehci->regs->status);
130 
131         /* restore original interrupt enable bits */
132         ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
133         return retval;
134 }
135 
136 static int tegra_ehci_hub_control(
137         struct usb_hcd  *hcd,
138         u16             typeReq,
139         u16             wValue,
140         u16             wIndex,
141         char            *buf,
142         u16             wLength
143 )
144 {
145         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
146         struct tegra_ehci_hcd *tegra = (struct tegra_ehci_hcd *)ehci->priv;
147         u32 __iomem     *status_reg;
148         u32             temp;
149         unsigned long   flags;
150         int             retval = 0;
151 
152         status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
153 
154         spin_lock_irqsave(&ehci->lock, flags);
155 
156         if (typeReq == GetPortStatus) {
157                 temp = ehci_readl(ehci, status_reg);
158                 if (tegra->port_resuming && !(temp & PORT_SUSPEND)) {
159                         /* Resume completed, re-enable disconnect detection */
160                         tegra->port_resuming = 0;
161                         tegra_usb_phy_postresume(hcd->phy);
162                 }
163         }
164 
165         else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
166                 temp = ehci_readl(ehci, status_reg);
167                 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
168                         retval = -EPIPE;
169                         goto done;
170                 }
171 
172                 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
173                 temp |= PORT_WKDISC_E | PORT_WKOC_E;
174                 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
175 
176                 /*
177                  * If a transaction is in progress, there may be a delay in
178                  * suspending the port. Poll until the port is suspended.
179                  */
180                 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
181                                                 PORT_SUSPEND, 5000))
182                         pr_err("%s: timeout waiting for SUSPEND\n", __func__);
183 
184                 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
185                 goto done;
186         }
187 
188         /* For USB1 port we need to issue Port Reset twice internally */
189         if (tegra->needs_double_reset &&
190            (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) {
191                 spin_unlock_irqrestore(&ehci->lock, flags);
192                 return tegra_ehci_internal_port_reset(ehci, status_reg);
193         }
194 
195         /*
196          * Tegra host controller will time the resume operation to clear the bit
197          * when the port control state switches to HS or FS Idle. This behavior
198          * is different from EHCI where the host controller driver is required
199          * to set this bit to a zero after the resume duration is timed in the
200          * driver.
201          */
202         else if (typeReq == ClearPortFeature &&
203                                         wValue == USB_PORT_FEAT_SUSPEND) {
204                 temp = ehci_readl(ehci, status_reg);
205                 if ((temp & PORT_RESET) || !(temp & PORT_PE)) {
206                         retval = -EPIPE;
207                         goto done;
208                 }
209 
210                 if (!(temp & PORT_SUSPEND))
211                         goto done;
212 
213                 /* Disable disconnect detection during port resume */
214                 tegra_usb_phy_preresume(hcd->phy);
215 
216                 ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
217 
218                 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
219                 /* start resume signalling */
220                 ehci_writel(ehci, temp | PORT_RESUME, status_reg);
221                 set_bit(wIndex-1, &ehci->resuming_ports);
222 
223                 spin_unlock_irqrestore(&ehci->lock, flags);
224                 msleep(20);
225                 spin_lock_irqsave(&ehci->lock, flags);
226 
227                 /* Poll until the controller clears RESUME and SUSPEND */
228                 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 2000))
229                         pr_err("%s: timeout waiting for RESUME\n", __func__);
230                 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000))
231                         pr_err("%s: timeout waiting for SUSPEND\n", __func__);
232 
233                 ehci->reset_done[wIndex-1] = 0;
234                 clear_bit(wIndex-1, &ehci->resuming_ports);
235 
236                 tegra->port_resuming = 1;
237                 goto done;
238         }
239 
240         spin_unlock_irqrestore(&ehci->lock, flags);
241 
242         /* Handle the hub control events here */
243         return orig_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
244 
245 done:
246         spin_unlock_irqrestore(&ehci->lock, flags);
247         return retval;
248 }
249 
250 struct dma_aligned_buffer {
251         void *kmalloc_ptr;
252         void *old_xfer_buffer;
253         u8 data[0];
254 };
255 
256 static void free_dma_aligned_buffer(struct urb *urb)
257 {
258         struct dma_aligned_buffer *temp;
259 
260         if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
261                 return;
262 
263         temp = container_of(urb->transfer_buffer,
264                 struct dma_aligned_buffer, data);
265 
266         if (usb_urb_dir_in(urb))
267                 memcpy(temp->old_xfer_buffer, temp->data,
268                        urb->transfer_buffer_length);
269         urb->transfer_buffer = temp->old_xfer_buffer;
270         kfree(temp->kmalloc_ptr);
271 
272         urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
273 }
274 
275 static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
276 {
277         struct dma_aligned_buffer *temp, *kmalloc_ptr;
278         size_t kmalloc_size;
279 
280         if (urb->num_sgs || urb->sg ||
281             urb->transfer_buffer_length == 0 ||
282             !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1)))
283                 return 0;
284 
285         /* Allocate a buffer with enough padding for alignment */
286         kmalloc_size = urb->transfer_buffer_length +
287                 sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1;
288 
289         kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
290         if (!kmalloc_ptr)
291                 return -ENOMEM;
292 
293         /* Position our struct dma_aligned_buffer such that data is aligned */
294         temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1;
295         temp->kmalloc_ptr = kmalloc_ptr;
296         temp->old_xfer_buffer = urb->transfer_buffer;
297         if (usb_urb_dir_out(urb))
298                 memcpy(temp->data, urb->transfer_buffer,
299                        urb->transfer_buffer_length);
300         urb->transfer_buffer = temp->data;
301 
302         urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
303 
304         return 0;
305 }
306 
307 static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
308                                       gfp_t mem_flags)
309 {
310         int ret;
311 
312         ret = alloc_dma_aligned_buffer(urb, mem_flags);
313         if (ret)
314                 return ret;
315 
316         ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
317         if (ret)
318                 free_dma_aligned_buffer(urb);
319 
320         return ret;
321 }
322 
323 static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
324 {
325         usb_hcd_unmap_urb_for_dma(hcd, urb);
326         free_dma_aligned_buffer(urb);
327 }
328 
329 static const struct tegra_ehci_soc_config tegra30_soc_config = {
330         .has_hostpc = true,
331 };
332 
333 static const struct tegra_ehci_soc_config tegra20_soc_config = {
334         .has_hostpc = false,
335 };
336 
337 static struct of_device_id tegra_ehci_of_match[] = {
338         { .compatible = "nvidia,tegra30-ehci", .data = &tegra30_soc_config },
339         { .compatible = "nvidia,tegra20-ehci", .data = &tegra20_soc_config },
340         { },
341 };
342 
343 static int tegra_ehci_probe(struct platform_device *pdev)
344 {
345         const struct of_device_id *match;
346         const struct tegra_ehci_soc_config *soc_config;
347         struct resource *res;
348         struct usb_hcd *hcd;
349         struct ehci_hcd *ehci;
350         struct tegra_ehci_hcd *tegra;
351         int err = 0;
352         int irq;
353         struct usb_phy *u_phy;
354 
355         match = of_match_device(tegra_ehci_of_match, &pdev->dev);
356         if (!match) {
357                 dev_err(&pdev->dev, "Error: No device match found\n");
358                 return -ENODEV;
359         }
360         soc_config = match->data;
361 
362         /* Right now device-tree probed devices don't get dma_mask set.
363          * Since shared usb code relies on it, set it here for now.
364          * Once we have dma capability bindings this can go away.
365          */
366         err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
367         if (err)
368                 return err;
369 
370         hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev,
371                                         dev_name(&pdev->dev));
372         if (!hcd) {
373                 dev_err(&pdev->dev, "Unable to create HCD\n");
374                 return -ENOMEM;
375         }
376         platform_set_drvdata(pdev, hcd);
377         ehci = hcd_to_ehci(hcd);
378         tegra = (struct tegra_ehci_hcd *)ehci->priv;
379 
380         hcd->has_tt = 1;
381 
382         tegra->clk = devm_clk_get(&pdev->dev, NULL);
383         if (IS_ERR(tegra->clk)) {
384                 dev_err(&pdev->dev, "Can't get ehci clock\n");
385                 err = PTR_ERR(tegra->clk);
386                 goto cleanup_hcd_create;
387         }
388 
389         tegra->rst = devm_reset_control_get(&pdev->dev, "usb");
390         if (IS_ERR(tegra->rst)) {
391                 dev_err(&pdev->dev, "Can't get ehci reset\n");
392                 err = PTR_ERR(tegra->rst);
393                 goto cleanup_hcd_create;
394         }
395 
396         err = clk_prepare_enable(tegra->clk);
397         if (err)
398                 goto cleanup_hcd_create;
399 
400         reset_control_assert(tegra->rst);
401         udelay(1);
402         reset_control_deassert(tegra->rst);
403 
404         u_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0);
405         if (IS_ERR(u_phy)) {
406                 err = PTR_ERR(u_phy);
407                 goto cleanup_clk_en;
408         }
409         hcd->phy = u_phy;
410 
411         tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
412                 "nvidia,needs-double-reset");
413 
414         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
415         if (!res) {
416                 dev_err(&pdev->dev, "Failed to get I/O memory\n");
417                 err = -ENXIO;
418                 goto cleanup_clk_en;
419         }
420         hcd->rsrc_start = res->start;
421         hcd->rsrc_len = resource_size(res);
422         hcd->regs = devm_ioremap(&pdev->dev, res->start, resource_size(res));
423         if (!hcd->regs) {
424                 dev_err(&pdev->dev, "Failed to remap I/O memory\n");
425                 err = -ENOMEM;
426                 goto cleanup_clk_en;
427         }
428         ehci->caps = hcd->regs + 0x100;
429         ehci->has_hostpc = soc_config->has_hostpc;
430 
431         err = usb_phy_init(hcd->phy);
432         if (err) {
433                 dev_err(&pdev->dev, "Failed to initialize phy\n");
434                 goto cleanup_clk_en;
435         }
436 
437         u_phy->otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
438                              GFP_KERNEL);
439         if (!u_phy->otg) {
440                 dev_err(&pdev->dev, "Failed to alloc memory for otg\n");
441                 err = -ENOMEM;
442                 goto cleanup_phy;
443         }
444         u_phy->otg->host = hcd_to_bus(hcd);
445 
446         err = usb_phy_set_suspend(hcd->phy, 0);
447         if (err) {
448                 dev_err(&pdev->dev, "Failed to power on the phy\n");
449                 goto cleanup_phy;
450         }
451 
452         irq = platform_get_irq(pdev, 0);
453         if (!irq) {
454                 dev_err(&pdev->dev, "Failed to get IRQ\n");
455                 err = -ENODEV;
456                 goto cleanup_phy;
457         }
458 
459         otg_set_host(u_phy->otg, &hcd->self);
460 
461         err = usb_add_hcd(hcd, irq, IRQF_SHARED);
462         if (err) {
463                 dev_err(&pdev->dev, "Failed to add USB HCD\n");
464                 goto cleanup_otg_set_host;
465         }
466         device_wakeup_enable(hcd->self.controller);
467 
468         return err;
469 
470 cleanup_otg_set_host:
471         otg_set_host(u_phy->otg, NULL);
472 cleanup_phy:
473         usb_phy_shutdown(hcd->phy);
474 cleanup_clk_en:
475         clk_disable_unprepare(tegra->clk);
476 cleanup_hcd_create:
477         usb_put_hcd(hcd);
478         return err;
479 }
480 
481 static int tegra_ehci_remove(struct platform_device *pdev)
482 {
483         struct usb_hcd *hcd = platform_get_drvdata(pdev);
484         struct tegra_ehci_hcd *tegra =
485                 (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv;
486 
487         otg_set_host(hcd->phy->otg, NULL);
488 
489         usb_phy_shutdown(hcd->phy);
490         usb_remove_hcd(hcd);
491         usb_put_hcd(hcd);
492 
493         clk_disable_unprepare(tegra->clk);
494 
495         return 0;
496 }
497 
498 static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
499 {
500         struct usb_hcd *hcd = platform_get_drvdata(pdev);
501 
502         if (hcd->driver->shutdown)
503                 hcd->driver->shutdown(hcd);
504 }
505 
506 static struct platform_driver tegra_ehci_driver = {
507         .probe          = tegra_ehci_probe,
508         .remove         = tegra_ehci_remove,
509         .shutdown       = tegra_ehci_hcd_shutdown,
510         .driver         = {
511                 .name   = DRV_NAME,
512                 .of_match_table = tegra_ehci_of_match,
513         }
514 };
515 
516 static const struct ehci_driver_overrides tegra_overrides __initconst = {
517         .extra_priv_size        = sizeof(struct tegra_ehci_hcd),
518 };
519 
520 static int __init ehci_tegra_init(void)
521 {
522         if (usb_disabled())
523                 return -ENODEV;
524 
525         pr_info(DRV_NAME ": " DRIVER_DESC "\n");
526 
527         ehci_init_driver(&tegra_ehci_hc_driver, &tegra_overrides);
528 
529         /*
530          * The Tegra HW has some unusual quirks, which require Tegra-specific
531          * workarounds. We override certain hc_driver functions here to
532          * achieve that. We explicitly do not enhance ehci_driver_overrides to
533          * allow this more easily, since this is an unusual case, and we don't
534          * want to encourage others to override these functions by making it
535          * too easy.
536          */
537 
538         orig_hub_control = tegra_ehci_hc_driver.hub_control;
539 
540         tegra_ehci_hc_driver.map_urb_for_dma = tegra_ehci_map_urb_for_dma;
541         tegra_ehci_hc_driver.unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma;
542         tegra_ehci_hc_driver.hub_control = tegra_ehci_hub_control;
543 
544         return platform_driver_register(&tegra_ehci_driver);
545 }
546 module_init(ehci_tegra_init);
547 
548 static void __exit ehci_tegra_cleanup(void)
549 {
550         platform_driver_unregister(&tegra_ehci_driver);
551 }
552 module_exit(ehci_tegra_cleanup);
553 
554 MODULE_DESCRIPTION(DRIVER_DESC);
555 MODULE_LICENSE("GPL");
556 MODULE_ALIAS("platform:" DRV_NAME);
557 MODULE_DEVICE_TABLE(of, tegra_ehci_of_match);
558 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us