Version:  2.0.40 2.2.26 2.4.37 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16

Linux/drivers/usb/host/ehci-tegra.c

  1 /*
  2  * EHCI-compliant USB host controller driver for NVIDIA Tegra SoCs
  3  *
  4  * Copyright (C) 2010 Google, Inc.
  5  * Copyright (C) 2009 - 2013 NVIDIA Corporation
  6  *
  7  * This program is free software; you can redistribute it and/or modify it
  8  * under the terms of the GNU General Public License as published by the
  9  * Free Software Foundation; either version 2 of the License, or (at your
 10  * option) any later version.
 11  *
 12  * This program is distributed in the hope that it will be useful, but WITHOUT
 13  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 14  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 15  * more details.
 16  *
 17  */
 18 
 19 #include <linux/clk.h>
 20 #include <linux/dma-mapping.h>
 21 #include <linux/err.h>
 22 #include <linux/gpio.h>
 23 #include <linux/io.h>
 24 #include <linux/irq.h>
 25 #include <linux/module.h>
 26 #include <linux/of.h>
 27 #include <linux/of_device.h>
 28 #include <linux/of_gpio.h>
 29 #include <linux/platform_device.h>
 30 #include <linux/pm_runtime.h>
 31 #include <linux/reset.h>
 32 #include <linux/slab.h>
 33 #include <linux/usb/ehci_def.h>
 34 #include <linux/usb/tegra_usb_phy.h>
 35 #include <linux/usb.h>
 36 #include <linux/usb/hcd.h>
 37 #include <linux/usb/otg.h>
 38 
 39 #include "ehci.h"
 40 
 41 #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
 42 
 43 #define TEGRA_USB_DMA_ALIGN 32
 44 
 45 #define DRIVER_DESC "Tegra EHCI driver"
 46 #define DRV_NAME "tegra-ehci"
 47 
 48 static struct hc_driver __read_mostly tegra_ehci_hc_driver;
 49 
 50 struct tegra_ehci_soc_config {
 51         bool has_hostpc;
 52 };
 53 
 54 struct tegra_ehci_hcd {
 55         struct tegra_usb_phy *phy;
 56         struct clk *clk;
 57         struct reset_control *rst;
 58         int port_resuming;
 59         bool needs_double_reset;
 60         enum tegra_usb_phy_port_speed port_speed;
 61 };
 62 
 63 static int tegra_ehci_internal_port_reset(
 64         struct ehci_hcd *ehci,
 65         u32 __iomem     *portsc_reg
 66 )
 67 {
 68         u32             temp;
 69         unsigned long   flags;
 70         int             retval = 0;
 71         int             i, tries;
 72         u32             saved_usbintr;
 73 
 74         spin_lock_irqsave(&ehci->lock, flags);
 75         saved_usbintr = ehci_readl(ehci, &ehci->regs->intr_enable);
 76         /* disable USB interrupt */
 77         ehci_writel(ehci, 0, &ehci->regs->intr_enable);
 78         spin_unlock_irqrestore(&ehci->lock, flags);
 79 
 80         /*
 81          * Here we have to do Port Reset at most twice for
 82          * Port Enable bit to be set.
 83          */
 84         for (i = 0; i < 2; i++) {
 85                 temp = ehci_readl(ehci, portsc_reg);
 86                 temp |= PORT_RESET;
 87                 ehci_writel(ehci, temp, portsc_reg);
 88                 mdelay(10);
 89                 temp &= ~PORT_RESET;
 90                 ehci_writel(ehci, temp, portsc_reg);
 91                 mdelay(1);
 92                 tries = 100;
 93                 do {
 94                         mdelay(1);
 95                         /*
 96                          * Up to this point, Port Enable bit is
 97                          * expected to be set after 2 ms waiting.
 98                          * USB1 usually takes extra 45 ms, for safety,
 99                          * we take 100 ms as timeout.
100                          */
101                         temp = ehci_readl(ehci, portsc_reg);
102                 } while (!(temp & PORT_PE) && tries--);
103                 if (temp & PORT_PE)
104                         break;
105         }
106         if (i == 2)
107                 retval = -ETIMEDOUT;
108 
109         /*
110          * Clear Connect Status Change bit if it's set.
111          * We can't clear PORT_PEC. It will also cause PORT_PE to be cleared.
112          */
113         if (temp & PORT_CSC)
114                 ehci_writel(ehci, PORT_CSC, portsc_reg);
115 
116         /*
117          * Write to clear any interrupt status bits that might be set
118          * during port reset.
119          */
120         temp = ehci_readl(ehci, &ehci->regs->status);
121         ehci_writel(ehci, temp, &ehci->regs->status);
122 
123         /* restore original interrupt enable bits */
124         ehci_writel(ehci, saved_usbintr, &ehci->regs->intr_enable);
125         return retval;
126 }
127 
128 static int tegra_ehci_hub_control(
129         struct usb_hcd  *hcd,
130         u16             typeReq,
131         u16             wValue,
132         u16             wIndex,
133         char            *buf,
134         u16             wLength
135 )
136 {
137         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
138         struct tegra_ehci_hcd *tegra = (struct tegra_ehci_hcd *)ehci->priv;
139         u32 __iomem     *status_reg;
140         u32             temp;
141         unsigned long   flags;
142         int             retval = 0;
143 
144         status_reg = &ehci->regs->port_status[(wIndex & 0xff) - 1];
145 
146         spin_lock_irqsave(&ehci->lock, flags);
147 
148         if (typeReq == GetPortStatus) {
149                 temp = ehci_readl(ehci, status_reg);
150                 if (tegra->port_resuming && !(temp & PORT_SUSPEND)) {
151                         /* Resume completed, re-enable disconnect detection */
152                         tegra->port_resuming = 0;
153                         tegra_usb_phy_postresume(hcd->phy);
154                 }
155         }
156 
157         else if (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_SUSPEND) {
158                 temp = ehci_readl(ehci, status_reg);
159                 if ((temp & PORT_PE) == 0 || (temp & PORT_RESET) != 0) {
160                         retval = -EPIPE;
161                         goto done;
162                 }
163 
164                 temp &= ~(PORT_RWC_BITS | PORT_WKCONN_E);
165                 temp |= PORT_WKDISC_E | PORT_WKOC_E;
166                 ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
167 
168                 /*
169                  * If a transaction is in progress, there may be a delay in
170                  * suspending the port. Poll until the port is suspended.
171                  */
172                 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND,
173                                                 PORT_SUSPEND, 5000))
174                         pr_err("%s: timeout waiting for SUSPEND\n", __func__);
175 
176                 set_bit((wIndex & 0xff) - 1, &ehci->suspended_ports);
177                 goto done;
178         }
179 
180         /* For USB1 port we need to issue Port Reset twice internally */
181         if (tegra->needs_double_reset &&
182            (typeReq == SetPortFeature && wValue == USB_PORT_FEAT_RESET)) {
183                 spin_unlock_irqrestore(&ehci->lock, flags);
184                 return tegra_ehci_internal_port_reset(ehci, status_reg);
185         }
186 
187         /*
188          * Tegra host controller will time the resume operation to clear the bit
189          * when the port control state switches to HS or FS Idle. This behavior
190          * is different from EHCI where the host controller driver is required
191          * to set this bit to a zero after the resume duration is timed in the
192          * driver.
193          */
194         else if (typeReq == ClearPortFeature &&
195                                         wValue == USB_PORT_FEAT_SUSPEND) {
196                 temp = ehci_readl(ehci, status_reg);
197                 if ((temp & PORT_RESET) || !(temp & PORT_PE)) {
198                         retval = -EPIPE;
199                         goto done;
200                 }
201 
202                 if (!(temp & PORT_SUSPEND))
203                         goto done;
204 
205                 /* Disable disconnect detection during port resume */
206                 tegra_usb_phy_preresume(hcd->phy);
207 
208                 ehci->reset_done[wIndex-1] = jiffies + msecs_to_jiffies(25);
209 
210                 temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
211                 /* start resume signalling */
212                 ehci_writel(ehci, temp | PORT_RESUME, status_reg);
213                 set_bit(wIndex-1, &ehci->resuming_ports);
214 
215                 spin_unlock_irqrestore(&ehci->lock, flags);
216                 msleep(20);
217                 spin_lock_irqsave(&ehci->lock, flags);
218 
219                 /* Poll until the controller clears RESUME and SUSPEND */
220                 if (ehci_handshake(ehci, status_reg, PORT_RESUME, 0, 2000))
221                         pr_err("%s: timeout waiting for RESUME\n", __func__);
222                 if (ehci_handshake(ehci, status_reg, PORT_SUSPEND, 0, 2000))
223                         pr_err("%s: timeout waiting for SUSPEND\n", __func__);
224 
225                 ehci->reset_done[wIndex-1] = 0;
226                 clear_bit(wIndex-1, &ehci->resuming_ports);
227 
228                 tegra->port_resuming = 1;
229                 goto done;
230         }
231 
232         spin_unlock_irqrestore(&ehci->lock, flags);
233 
234         /* Handle the hub control events here */
235         return ehci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength);
236 
237 done:
238         spin_unlock_irqrestore(&ehci->lock, flags);
239         return retval;
240 }
241 
242 struct dma_aligned_buffer {
243         void *kmalloc_ptr;
244         void *old_xfer_buffer;
245         u8 data[0];
246 };
247 
248 static void free_dma_aligned_buffer(struct urb *urb)
249 {
250         struct dma_aligned_buffer *temp;
251 
252         if (!(urb->transfer_flags & URB_ALIGNED_TEMP_BUFFER))
253                 return;
254 
255         temp = container_of(urb->transfer_buffer,
256                 struct dma_aligned_buffer, data);
257 
258         if (usb_urb_dir_in(urb))
259                 memcpy(temp->old_xfer_buffer, temp->data,
260                        urb->transfer_buffer_length);
261         urb->transfer_buffer = temp->old_xfer_buffer;
262         kfree(temp->kmalloc_ptr);
263 
264         urb->transfer_flags &= ~URB_ALIGNED_TEMP_BUFFER;
265 }
266 
267 static int alloc_dma_aligned_buffer(struct urb *urb, gfp_t mem_flags)
268 {
269         struct dma_aligned_buffer *temp, *kmalloc_ptr;
270         size_t kmalloc_size;
271 
272         if (urb->num_sgs || urb->sg ||
273             urb->transfer_buffer_length == 0 ||
274             !((uintptr_t)urb->transfer_buffer & (TEGRA_USB_DMA_ALIGN - 1)))
275                 return 0;
276 
277         /* Allocate a buffer with enough padding for alignment */
278         kmalloc_size = urb->transfer_buffer_length +
279                 sizeof(struct dma_aligned_buffer) + TEGRA_USB_DMA_ALIGN - 1;
280 
281         kmalloc_ptr = kmalloc(kmalloc_size, mem_flags);
282         if (!kmalloc_ptr)
283                 return -ENOMEM;
284 
285         /* Position our struct dma_aligned_buffer such that data is aligned */
286         temp = PTR_ALIGN(kmalloc_ptr + 1, TEGRA_USB_DMA_ALIGN) - 1;
287         temp->kmalloc_ptr = kmalloc_ptr;
288         temp->old_xfer_buffer = urb->transfer_buffer;
289         if (usb_urb_dir_out(urb))
290                 memcpy(temp->data, urb->transfer_buffer,
291                        urb->transfer_buffer_length);
292         urb->transfer_buffer = temp->data;
293 
294         urb->transfer_flags |= URB_ALIGNED_TEMP_BUFFER;
295 
296         return 0;
297 }
298 
299 static int tegra_ehci_map_urb_for_dma(struct usb_hcd *hcd, struct urb *urb,
300                                       gfp_t mem_flags)
301 {
302         int ret;
303 
304         ret = alloc_dma_aligned_buffer(urb, mem_flags);
305         if (ret)
306                 return ret;
307 
308         ret = usb_hcd_map_urb_for_dma(hcd, urb, mem_flags);
309         if (ret)
310                 free_dma_aligned_buffer(urb);
311 
312         return ret;
313 }
314 
315 static void tegra_ehci_unmap_urb_for_dma(struct usb_hcd *hcd, struct urb *urb)
316 {
317         usb_hcd_unmap_urb_for_dma(hcd, urb);
318         free_dma_aligned_buffer(urb);
319 }
320 
321 static const struct tegra_ehci_soc_config tegra30_soc_config = {
322         .has_hostpc = true,
323 };
324 
325 static const struct tegra_ehci_soc_config tegra20_soc_config = {
326         .has_hostpc = false,
327 };
328 
329 static struct of_device_id tegra_ehci_of_match[] = {
330         { .compatible = "nvidia,tegra30-ehci", .data = &tegra30_soc_config },
331         { .compatible = "nvidia,tegra20-ehci", .data = &tegra20_soc_config },
332         { },
333 };
334 
335 static int tegra_ehci_probe(struct platform_device *pdev)
336 {
337         const struct of_device_id *match;
338         const struct tegra_ehci_soc_config *soc_config;
339         struct resource *res;
340         struct usb_hcd *hcd;
341         struct ehci_hcd *ehci;
342         struct tegra_ehci_hcd *tegra;
343         int err = 0;
344         int irq;
345         struct usb_phy *u_phy;
346 
347         match = of_match_device(tegra_ehci_of_match, &pdev->dev);
348         if (!match) {
349                 dev_err(&pdev->dev, "Error: No device match found\n");
350                 return -ENODEV;
351         }
352         soc_config = match->data;
353 
354         /* Right now device-tree probed devices don't get dma_mask set.
355          * Since shared usb code relies on it, set it here for now.
356          * Once we have dma capability bindings this can go away.
357          */
358         err = dma_coerce_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
359         if (err)
360                 return err;
361 
362         hcd = usb_create_hcd(&tegra_ehci_hc_driver, &pdev->dev,
363                                         dev_name(&pdev->dev));
364         if (!hcd) {
365                 dev_err(&pdev->dev, "Unable to create HCD\n");
366                 return -ENOMEM;
367         }
368         platform_set_drvdata(pdev, hcd);
369         ehci = hcd_to_ehci(hcd);
370         tegra = (struct tegra_ehci_hcd *)ehci->priv;
371 
372         hcd->has_tt = 1;
373 
374         tegra->clk = devm_clk_get(&pdev->dev, NULL);
375         if (IS_ERR(tegra->clk)) {
376                 dev_err(&pdev->dev, "Can't get ehci clock\n");
377                 err = PTR_ERR(tegra->clk);
378                 goto cleanup_hcd_create;
379         }
380 
381         tegra->rst = devm_reset_control_get(&pdev->dev, "usb");
382         if (IS_ERR(tegra->rst)) {
383                 dev_err(&pdev->dev, "Can't get ehci reset\n");
384                 err = PTR_ERR(tegra->rst);
385                 goto cleanup_hcd_create;
386         }
387 
388         err = clk_prepare_enable(tegra->clk);
389         if (err)
390                 goto cleanup_hcd_create;
391 
392         reset_control_assert(tegra->rst);
393         udelay(1);
394         reset_control_deassert(tegra->rst);
395 
396         u_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "nvidia,phy", 0);
397         if (IS_ERR(u_phy)) {
398                 err = PTR_ERR(u_phy);
399                 goto cleanup_clk_en;
400         }
401         hcd->phy = u_phy;
402 
403         tegra->needs_double_reset = of_property_read_bool(pdev->dev.of_node,
404                 "nvidia,needs-double-reset");
405 
406         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
407         if (!res) {
408                 dev_err(&pdev->dev, "Failed to get I/O memory\n");
409                 err = -ENXIO;
410                 goto cleanup_clk_en;
411         }
412         hcd->rsrc_start = res->start;
413         hcd->rsrc_len = resource_size(res);
414         hcd->regs = devm_ioremap_resource(&pdev->dev, res);
415         if (IS_ERR(hcd->regs)) {
416                 err = PTR_ERR(hcd->regs);
417                 goto cleanup_clk_en;
418         }
419         ehci->caps = hcd->regs + 0x100;
420         ehci->has_hostpc = soc_config->has_hostpc;
421 
422         err = usb_phy_init(hcd->phy);
423         if (err) {
424                 dev_err(&pdev->dev, "Failed to initialize phy\n");
425                 goto cleanup_clk_en;
426         }
427 
428         u_phy->otg = devm_kzalloc(&pdev->dev, sizeof(struct usb_otg),
429                              GFP_KERNEL);
430         if (!u_phy->otg) {
431                 dev_err(&pdev->dev, "Failed to alloc memory for otg\n");
432                 err = -ENOMEM;
433                 goto cleanup_phy;
434         }
435         u_phy->otg->host = hcd_to_bus(hcd);
436 
437         err = usb_phy_set_suspend(hcd->phy, 0);
438         if (err) {
439                 dev_err(&pdev->dev, "Failed to power on the phy\n");
440                 goto cleanup_phy;
441         }
442 
443         irq = platform_get_irq(pdev, 0);
444         if (!irq) {
445                 dev_err(&pdev->dev, "Failed to get IRQ\n");
446                 err = -ENODEV;
447                 goto cleanup_phy;
448         }
449 
450         otg_set_host(u_phy->otg, &hcd->self);
451 
452         err = usb_add_hcd(hcd, irq, IRQF_SHARED);
453         if (err) {
454                 dev_err(&pdev->dev, "Failed to add USB HCD\n");
455                 goto cleanup_otg_set_host;
456         }
457         device_wakeup_enable(hcd->self.controller);
458 
459         return err;
460 
461 cleanup_otg_set_host:
462         otg_set_host(u_phy->otg, NULL);
463 cleanup_phy:
464         usb_phy_shutdown(hcd->phy);
465 cleanup_clk_en:
466         clk_disable_unprepare(tegra->clk);
467 cleanup_hcd_create:
468         usb_put_hcd(hcd);
469         return err;
470 }
471 
472 static int tegra_ehci_remove(struct platform_device *pdev)
473 {
474         struct usb_hcd *hcd = platform_get_drvdata(pdev);
475         struct tegra_ehci_hcd *tegra =
476                 (struct tegra_ehci_hcd *)hcd_to_ehci(hcd)->priv;
477 
478         otg_set_host(hcd->phy->otg, NULL);
479 
480         usb_phy_shutdown(hcd->phy);
481         usb_remove_hcd(hcd);
482         usb_put_hcd(hcd);
483 
484         clk_disable_unprepare(tegra->clk);
485 
486         return 0;
487 }
488 
489 static void tegra_ehci_hcd_shutdown(struct platform_device *pdev)
490 {
491         struct usb_hcd *hcd = platform_get_drvdata(pdev);
492 
493         if (hcd->driver->shutdown)
494                 hcd->driver->shutdown(hcd);
495 }
496 
497 static struct platform_driver tegra_ehci_driver = {
498         .probe          = tegra_ehci_probe,
499         .remove         = tegra_ehci_remove,
500         .shutdown       = tegra_ehci_hcd_shutdown,
501         .driver         = {
502                 .name   = DRV_NAME,
503                 .of_match_table = tegra_ehci_of_match,
504         }
505 };
506 
507 static int tegra_ehci_reset(struct usb_hcd *hcd)
508 {
509         struct ehci_hcd *ehci = hcd_to_ehci(hcd);
510         int retval;
511         int txfifothresh;
512 
513         retval = ehci_setup(hcd);
514         if (retval)
515                 return retval;
516 
517         /*
518          * We should really pull this value out of tegra_ehci_soc_config, but
519          * to avoid needing access to it, make use of the fact that Tegra20 is
520          * the only one so far that needs a value of 10, and Tegra20 is the
521          * only one which doesn't set has_hostpc.
522          */
523         txfifothresh = ehci->has_hostpc ? 0x10 : 10;
524         ehci_writel(ehci, txfifothresh << 16, &ehci->regs->txfill_tuning);
525 
526         return 0;
527 }
528 
529 static const struct ehci_driver_overrides tegra_overrides __initconst = {
530         .extra_priv_size        = sizeof(struct tegra_ehci_hcd),
531         .reset                  = tegra_ehci_reset,
532 };
533 
534 static int __init ehci_tegra_init(void)
535 {
536         if (usb_disabled())
537                 return -ENODEV;
538 
539         pr_info(DRV_NAME ": " DRIVER_DESC "\n");
540 
541         ehci_init_driver(&tegra_ehci_hc_driver, &tegra_overrides);
542 
543         /*
544          * The Tegra HW has some unusual quirks, which require Tegra-specific
545          * workarounds. We override certain hc_driver functions here to
546          * achieve that. We explicitly do not enhance ehci_driver_overrides to
547          * allow this more easily, since this is an unusual case, and we don't
548          * want to encourage others to override these functions by making it
549          * too easy.
550          */
551 
552         tegra_ehci_hc_driver.map_urb_for_dma = tegra_ehci_map_urb_for_dma;
553         tegra_ehci_hc_driver.unmap_urb_for_dma = tegra_ehci_unmap_urb_for_dma;
554         tegra_ehci_hc_driver.hub_control = tegra_ehci_hub_control;
555 
556         return platform_driver_register(&tegra_ehci_driver);
557 }
558 module_init(ehci_tegra_init);
559 
560 static void __exit ehci_tegra_cleanup(void)
561 {
562         platform_driver_unregister(&tegra_ehci_driver);
563 }
564 module_exit(ehci_tegra_cleanup);
565 
566 MODULE_DESCRIPTION(DRIVER_DESC);
567 MODULE_LICENSE("GPL");
568 MODULE_ALIAS("platform:" DRV_NAME);
569 MODULE_DEVICE_TABLE(of, tegra_ehci_of_match);
570 

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