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Linux/drivers/usb/dwc2/platform.c

  1 /*
  2  * platform.c - DesignWare HS OTG Controller platform driver
  3  *
  4  * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
  5  *
  6  * Redistribution and use in source and binary forms, with or without
  7  * modification, are permitted provided that the following conditions
  8  * are met:
  9  * 1. Redistributions of source code must retain the above copyright
 10  *    notice, this list of conditions, and the following disclaimer,
 11  *    without modification.
 12  * 2. Redistributions in binary form must reproduce the above copyright
 13  *    notice, this list of conditions and the following disclaimer in the
 14  *    documentation and/or other materials provided with the distribution.
 15  * 3. The names of the above-listed copyright holders may not be used
 16  *    to endorse or promote products derived from this software without
 17  *    specific prior written permission.
 18  *
 19  * ALTERNATIVELY, this software may be distributed under the terms of the
 20  * GNU General Public License ("GPL") as published by the Free Software
 21  * Foundation; either version 2 of the License, or (at your option) any
 22  * later version.
 23  *
 24  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
 25  * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
 26  * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
 27  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
 28  * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
 29  * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
 30  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
 31  * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
 32  * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
 33  * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 34  * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 35  */
 36 
 37 #include <linux/kernel.h>
 38 #include <linux/module.h>
 39 #include <linux/slab.h>
 40 #include <linux/device.h>
 41 #include <linux/dma-mapping.h>
 42 #include <linux/of_device.h>
 43 #include <linux/mutex.h>
 44 #include <linux/platform_device.h>
 45 
 46 #include <linux/usb/of.h>
 47 
 48 #include "core.h"
 49 #include "hcd.h"
 50 
 51 static const char dwc2_driver_name[] = "dwc2";
 52 
 53 static const struct dwc2_core_params params_bcm2835 = {
 54         .otg_cap                        = 0,    /* HNP/SRP capable */
 55         .otg_ver                        = 0,    /* 1.3 */
 56         .dma_enable                     = 1,
 57         .dma_desc_enable                = 0,
 58         .speed                          = 0,    /* High Speed */
 59         .enable_dynamic_fifo            = 1,
 60         .en_multiple_tx_fifo            = 1,
 61         .host_rx_fifo_size              = 774,  /* 774 DWORDs */
 62         .host_nperio_tx_fifo_size       = 256,  /* 256 DWORDs */
 63         .host_perio_tx_fifo_size        = 512,  /* 512 DWORDs */
 64         .max_transfer_size              = 65535,
 65         .max_packet_count               = 511,
 66         .host_channels                  = 8,
 67         .phy_type                       = 1,    /* UTMI */
 68         .phy_utmi_width                 = 8,    /* 8 bits */
 69         .phy_ulpi_ddr                   = 0,    /* Single */
 70         .phy_ulpi_ext_vbus              = 0,
 71         .i2c_enable                     = 0,
 72         .ulpi_fs_ls                     = 0,
 73         .host_support_fs_ls_low_power   = 0,
 74         .host_ls_low_power_phy_clk      = 0,    /* 48 MHz */
 75         .ts_dline                       = 0,
 76         .reload_ctl                     = 0,
 77         .ahbcfg                         = 0x10,
 78         .uframe_sched                   = 0,
 79 };
 80 
 81 static const struct dwc2_core_params params_rk3066 = {
 82         .otg_cap                        = 2,    /* non-HNP/non-SRP */
 83         .otg_ver                        = -1,
 84         .dma_enable                     = -1,
 85         .dma_desc_enable                = 0,
 86         .speed                          = -1,
 87         .enable_dynamic_fifo            = 1,
 88         .en_multiple_tx_fifo            = -1,
 89         .host_rx_fifo_size              = 520,  /* 520 DWORDs */
 90         .host_nperio_tx_fifo_size       = 128,  /* 128 DWORDs */
 91         .host_perio_tx_fifo_size        = 256,  /* 256 DWORDs */
 92         .max_transfer_size              = 65535,
 93         .max_packet_count               = -1,
 94         .host_channels                  = -1,
 95         .phy_type                       = -1,
 96         .phy_utmi_width                 = -1,
 97         .phy_ulpi_ddr                   = -1,
 98         .phy_ulpi_ext_vbus              = -1,
 99         .i2c_enable                     = -1,
100         .ulpi_fs_ls                     = -1,
101         .host_support_fs_ls_low_power   = -1,
102         .host_ls_low_power_phy_clk      = -1,
103         .ts_dline                       = -1,
104         .reload_ctl                     = -1,
105         .ahbcfg                         = 0x7, /* INCR16 */
106         .uframe_sched                   = -1,
107 };
108 
109 /**
110  * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
111  * DWC_otg driver
112  *
113  * @dev: Platform device
114  *
115  * This routine is called, for example, when the rmmod command is executed. The
116  * device may or may not be electrically present. If it is present, the driver
117  * stops device processing. Any resources used on behalf of this device are
118  * freed.
119  */
120 static int dwc2_driver_remove(struct platform_device *dev)
121 {
122         struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
123 
124         dwc2_hcd_remove(hsotg);
125         s3c_hsotg_remove(hsotg);
126 
127         return 0;
128 }
129 
130 static const struct of_device_id dwc2_of_match_table[] = {
131         { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
132         { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
133         { .compatible = "snps,dwc2", .data = NULL },
134         { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
135         {},
136 };
137 MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
138 
139 /**
140  * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
141  * driver
142  *
143  * @dev: Platform device
144  *
145  * This routine creates the driver components required to control the device
146  * (core, HCD, and PCD) and initializes the device. The driver components are
147  * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
148  * in the device private data. This allows the driver to access the dwc2_hsotg
149  * structure on subsequent calls to driver methods for this device.
150  */
151 static int dwc2_driver_probe(struct platform_device *dev)
152 {
153         const struct of_device_id *match;
154         const struct dwc2_core_params *params;
155         struct dwc2_core_params defparams;
156         struct dwc2_hsotg *hsotg;
157         struct resource *res;
158         int retval;
159         int irq;
160 
161         match = of_match_device(dwc2_of_match_table, &dev->dev);
162         if (match && match->data) {
163                 params = match->data;
164         } else {
165                 /* Default all params to autodetect */
166                 dwc2_set_all_params(&defparams, -1);
167                 params = &defparams;
168 
169                 /*
170                  * Disable descriptor dma mode by default as the HW can support
171                  * it, but does not support it for SPLIT transactions.
172                  */
173                 defparams.dma_desc_enable = 0;
174         }
175 
176         hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
177         if (!hsotg)
178                 return -ENOMEM;
179 
180         hsotg->dev = &dev->dev;
181 
182         /*
183          * Use reasonable defaults so platforms don't have to provide these.
184          */
185         if (!dev->dev.dma_mask)
186                 dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
187         retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
188         if (retval)
189                 return retval;
190 
191         irq = platform_get_irq(dev, 0);
192         if (irq < 0) {
193                 dev_err(&dev->dev, "missing IRQ resource\n");
194                 return irq;
195         }
196 
197         dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
198                 irq);
199         retval = devm_request_irq(hsotg->dev, irq,
200                                   dwc2_handle_common_intr, IRQF_SHARED,
201                                   dev_name(hsotg->dev), hsotg);
202         if (retval)
203                 return retval;
204 
205         res = platform_get_resource(dev, IORESOURCE_MEM, 0);
206         hsotg->regs = devm_ioremap_resource(&dev->dev, res);
207         if (IS_ERR(hsotg->regs))
208                 return PTR_ERR(hsotg->regs);
209 
210         dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
211                 (unsigned long)res->start, hsotg->regs);
212 
213         hsotg->dr_mode = of_usb_get_dr_mode(dev->dev.of_node);
214 
215         spin_lock_init(&hsotg->lock);
216         mutex_init(&hsotg->init_mutex);
217         retval = dwc2_gadget_init(hsotg, irq);
218         if (retval)
219                 return retval;
220         retval = dwc2_hcd_init(hsotg, irq, params);
221         if (retval)
222                 return retval;
223 
224         platform_set_drvdata(dev, hsotg);
225 
226         return retval;
227 }
228 
229 static int __maybe_unused dwc2_suspend(struct device *dev)
230 {
231         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
232         int ret = 0;
233 
234         if (dwc2_is_device_mode(dwc2))
235                 ret = s3c_hsotg_suspend(dwc2);
236         return ret;
237 }
238 
239 static int __maybe_unused dwc2_resume(struct device *dev)
240 {
241         struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
242         int ret = 0;
243 
244         if (dwc2_is_device_mode(dwc2))
245                 ret = s3c_hsotg_resume(dwc2);
246         return ret;
247 }
248 
249 static const struct dev_pm_ops dwc2_dev_pm_ops = {
250         SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
251 };
252 
253 static struct platform_driver dwc2_platform_driver = {
254         .driver = {
255                 .name = dwc2_driver_name,
256                 .of_match_table = dwc2_of_match_table,
257                 .pm = &dwc2_dev_pm_ops,
258         },
259         .probe = dwc2_driver_probe,
260         .remove = dwc2_driver_remove,
261 };
262 
263 module_platform_driver(dwc2_platform_driver);
264 
265 MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
266 MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
267 MODULE_LICENSE("Dual BSD/GPL");
268 

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