Version:  2.0.40 2.2.26 2.4.37 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18

Linux/drivers/tty/serial/vt8500_serial.c

  1 /*
  2  * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com>
  3  *
  4  * Based on msm_serial.c, which is:
  5  * Copyright (C) 2007 Google, Inc.
  6  * Author: Robert Love <rlove@google.com>
  7  *
  8  * This software is licensed under the terms of the GNU General Public
  9  * License version 2, as published by the Free Software Foundation, and
 10  * may be copied, distributed, and modified under those terms.
 11  *
 12  * This program is distributed in the hope that it will be useful,
 13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15  * GNU General Public License for more details.
 16  */
 17 
 18 #if defined(CONFIG_SERIAL_VT8500_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 19 # define SUPPORT_SYSRQ
 20 #endif
 21 
 22 #include <linux/hrtimer.h>
 23 #include <linux/delay.h>
 24 #include <linux/module.h>
 25 #include <linux/io.h>
 26 #include <linux/ioport.h>
 27 #include <linux/irq.h>
 28 #include <linux/init.h>
 29 #include <linux/console.h>
 30 #include <linux/tty.h>
 31 #include <linux/tty_flip.h>
 32 #include <linux/serial_core.h>
 33 #include <linux/serial.h>
 34 #include <linux/slab.h>
 35 #include <linux/clk.h>
 36 #include <linux/of.h>
 37 #include <linux/of_device.h>
 38 #include <linux/err.h>
 39 
 40 /*
 41  * UART Register offsets
 42  */
 43 
 44 #define VT8500_URTDR            0x0000  /* Transmit data */
 45 #define VT8500_URRDR            0x0004  /* Receive data */
 46 #define VT8500_URDIV            0x0008  /* Clock/Baud rate divisor */
 47 #define VT8500_URLCR            0x000C  /* Line control */
 48 #define VT8500_URICR            0x0010  /* IrDA control */
 49 #define VT8500_URIER            0x0014  /* Interrupt enable */
 50 #define VT8500_URISR            0x0018  /* Interrupt status */
 51 #define VT8500_URUSR            0x001c  /* UART status */
 52 #define VT8500_URFCR            0x0020  /* FIFO control */
 53 #define VT8500_URFIDX           0x0024  /* FIFO index */
 54 #define VT8500_URBKR            0x0028  /* Break signal count */
 55 #define VT8500_URTOD            0x002c  /* Time out divisor */
 56 #define VT8500_TXFIFO           0x1000  /* Transmit FIFO (16x8) */
 57 #define VT8500_RXFIFO           0x1020  /* Receive FIFO (16x10) */
 58 
 59 /*
 60  * Interrupt enable and status bits
 61  */
 62 
 63 #define TXDE    (1 << 0)        /* Tx Data empty */
 64 #define RXDF    (1 << 1)        /* Rx Data full */
 65 #define TXFAE   (1 << 2)        /* Tx FIFO almost empty */
 66 #define TXFE    (1 << 3)        /* Tx FIFO empty */
 67 #define RXFAF   (1 << 4)        /* Rx FIFO almost full */
 68 #define RXFF    (1 << 5)        /* Rx FIFO full */
 69 #define TXUDR   (1 << 6)        /* Tx underrun */
 70 #define RXOVER  (1 << 7)        /* Rx overrun */
 71 #define PER     (1 << 8)        /* Parity error */
 72 #define FER     (1 << 9)        /* Frame error */
 73 #define TCTS    (1 << 10)       /* Toggle of CTS */
 74 #define RXTOUT  (1 << 11)       /* Rx timeout */
 75 #define BKDONE  (1 << 12)       /* Break signal done */
 76 #define ERR     (1 << 13)       /* AHB error response */
 77 
 78 #define RX_FIFO_INTS    (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT)
 79 #define TX_FIFO_INTS    (TXFAE | TXFE | TXUDR)
 80 
 81 /*
 82  * Line control bits
 83  */
 84 
 85 #define VT8500_TXEN     (1 << 0)        /* Enable transmit logic */
 86 #define VT8500_RXEN     (1 << 1)        /* Enable receive logic */
 87 #define VT8500_CS8      (1 << 2)        /* 8-bit data length (vs. 7-bit) */
 88 #define VT8500_CSTOPB   (1 << 3)        /* 2 stop bits (vs. 1) */
 89 #define VT8500_PARENB   (1 << 4)        /* Enable parity */
 90 #define VT8500_PARODD   (1 << 5)        /* Odd parity (vs. even) */
 91 #define VT8500_RTS      (1 << 6)        /* Ready to send */
 92 #define VT8500_LOOPBK   (1 << 7)        /* Enable internal loopback */
 93 #define VT8500_DMA      (1 << 8)        /* Enable DMA mode (needs FIFO) */
 94 #define VT8500_BREAK    (1 << 9)        /* Initiate break signal */
 95 #define VT8500_PSLVERR  (1 << 10)       /* APB error upon empty RX FIFO read */
 96 #define VT8500_SWRTSCTS (1 << 11)       /* Software-controlled RTS/CTS */
 97 
 98 /*
 99  * Capability flags (driver-internal)
100  */
101 
102 #define VT8500_HAS_SWRTSCTS_SWITCH      (1 << 1)
103 
104 #define VT8500_RECOMMENDED_CLK          12000000
105 #define VT8500_OVERSAMPLING_DIVISOR     13
106 #define VT8500_MAX_PORTS        6
107 
108 struct vt8500_port {
109         struct uart_port        uart;
110         char                    name[16];
111         struct clk              *clk;
112         unsigned int            clk_predivisor;
113         unsigned int            ier;
114         unsigned int            vt8500_uart_flags;
115 };
116 
117 /*
118  * we use this variable to keep track of which ports
119  * have been allocated as we can't use pdev->id in
120  * devicetree
121  */
122 static unsigned long vt8500_ports_in_use;
123 
124 static inline void vt8500_write(struct uart_port *port, unsigned int val,
125                              unsigned int off)
126 {
127         writel(val, port->membase + off);
128 }
129 
130 static inline unsigned int vt8500_read(struct uart_port *port, unsigned int off)
131 {
132         return readl(port->membase + off);
133 }
134 
135 static void vt8500_stop_tx(struct uart_port *port)
136 {
137         struct vt8500_port *vt8500_port = container_of(port,
138                                                        struct vt8500_port,
139                                                        uart);
140 
141         vt8500_port->ier &= ~TX_FIFO_INTS;
142         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
143 }
144 
145 static void vt8500_stop_rx(struct uart_port *port)
146 {
147         struct vt8500_port *vt8500_port = container_of(port,
148                                                        struct vt8500_port,
149                                                        uart);
150 
151         vt8500_port->ier &= ~RX_FIFO_INTS;
152         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
153 }
154 
155 static void vt8500_enable_ms(struct uart_port *port)
156 {
157         struct vt8500_port *vt8500_port = container_of(port,
158                                                        struct vt8500_port,
159                                                        uart);
160 
161         vt8500_port->ier |= TCTS;
162         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
163 }
164 
165 static void handle_rx(struct uart_port *port)
166 {
167         struct tty_port *tport = &port->state->port;
168 
169         /*
170          * Handle overrun
171          */
172         if ((vt8500_read(port, VT8500_URISR) & RXOVER)) {
173                 port->icount.overrun++;
174                 tty_insert_flip_char(tport, 0, TTY_OVERRUN);
175         }
176 
177         /* and now the main RX loop */
178         while (vt8500_read(port, VT8500_URFIDX) & 0x1f00) {
179                 unsigned int c;
180                 char flag = TTY_NORMAL;
181 
182                 c = readw(port->membase + VT8500_RXFIFO) & 0x3ff;
183 
184                 /* Mask conditions we're ignorning. */
185                 c &= ~port->read_status_mask;
186 
187                 if (c & FER) {
188                         port->icount.frame++;
189                         flag = TTY_FRAME;
190                 } else if (c & PER) {
191                         port->icount.parity++;
192                         flag = TTY_PARITY;
193                 }
194                 port->icount.rx++;
195 
196                 if (!uart_handle_sysrq_char(port, c))
197                         tty_insert_flip_char(tport, c, flag);
198         }
199 
200         spin_unlock(&port->lock);
201         tty_flip_buffer_push(tport);
202         spin_lock(&port->lock);
203 }
204 
205 static void handle_tx(struct uart_port *port)
206 {
207         struct circ_buf *xmit = &port->state->xmit;
208 
209         if (port->x_char) {
210                 writeb(port->x_char, port->membase + VT8500_TXFIFO);
211                 port->icount.tx++;
212                 port->x_char = 0;
213         }
214         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
215                 vt8500_stop_tx(port);
216                 return;
217         }
218 
219         while ((vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16) {
220                 if (uart_circ_empty(xmit))
221                         break;
222 
223                 writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO);
224 
225                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
226                 port->icount.tx++;
227         }
228 
229         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
230                 uart_write_wakeup(port);
231 
232         if (uart_circ_empty(xmit))
233                 vt8500_stop_tx(port);
234 }
235 
236 static void vt8500_start_tx(struct uart_port *port)
237 {
238         struct vt8500_port *vt8500_port = container_of(port,
239                                                        struct vt8500_port,
240                                                        uart);
241 
242         vt8500_port->ier &= ~TX_FIFO_INTS;
243         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
244         handle_tx(port);
245         vt8500_port->ier |= TX_FIFO_INTS;
246         vt8500_write(port, vt8500_port->ier, VT8500_URIER);
247 }
248 
249 static void handle_delta_cts(struct uart_port *port)
250 {
251         port->icount.cts++;
252         wake_up_interruptible(&port->state->port.delta_msr_wait);
253 }
254 
255 static irqreturn_t vt8500_irq(int irq, void *dev_id)
256 {
257         struct uart_port *port = dev_id;
258         unsigned long isr;
259 
260         spin_lock(&port->lock);
261         isr = vt8500_read(port, VT8500_URISR);
262 
263         /* Acknowledge active status bits */
264         vt8500_write(port, isr, VT8500_URISR);
265 
266         if (isr & RX_FIFO_INTS)
267                 handle_rx(port);
268         if (isr & TX_FIFO_INTS)
269                 handle_tx(port);
270         if (isr & TCTS)
271                 handle_delta_cts(port);
272 
273         spin_unlock(&port->lock);
274 
275         return IRQ_HANDLED;
276 }
277 
278 static unsigned int vt8500_tx_empty(struct uart_port *port)
279 {
280         return (vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16 ?
281                                                 TIOCSER_TEMT : 0;
282 }
283 
284 static unsigned int vt8500_get_mctrl(struct uart_port *port)
285 {
286         unsigned int usr;
287 
288         usr = vt8500_read(port, VT8500_URUSR);
289         if (usr & (1 << 4))
290                 return TIOCM_CTS;
291         else
292                 return 0;
293 }
294 
295 static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl)
296 {
297         unsigned int lcr = vt8500_read(port, VT8500_URLCR);
298 
299         if (mctrl & TIOCM_RTS)
300                 lcr |= VT8500_RTS;
301         else
302                 lcr &= ~VT8500_RTS;
303 
304         vt8500_write(port, lcr, VT8500_URLCR);
305 }
306 
307 static void vt8500_break_ctl(struct uart_port *port, int break_ctl)
308 {
309         if (break_ctl)
310                 vt8500_write(port,
311                              vt8500_read(port, VT8500_URLCR) | VT8500_BREAK,
312                              VT8500_URLCR);
313 }
314 
315 static int vt8500_set_baud_rate(struct uart_port *port, unsigned int baud)
316 {
317         struct vt8500_port *vt8500_port =
318                         container_of(port, struct vt8500_port, uart);
319         unsigned long div;
320         unsigned int loops = 1000;
321 
322         div = ((vt8500_port->clk_predivisor - 1) & 0xf) << 16;
323         div |= (uart_get_divisor(port, baud) - 1) & 0x3ff;
324 
325         /* Effective baud rate */
326         baud = port->uartclk / 16 / ((div & 0x3ff) + 1);
327 
328         while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops)
329                 cpu_relax();
330 
331         vt8500_write(port, div, VT8500_URDIV);
332 
333         /* Break signal timing depends on baud rate, update accordingly */
334         vt8500_write(port, mult_frac(baud, 4096, 1000000), VT8500_URBKR);
335 
336         return baud;
337 }
338 
339 static int vt8500_startup(struct uart_port *port)
340 {
341         struct vt8500_port *vt8500_port =
342                         container_of(port, struct vt8500_port, uart);
343         int ret;
344 
345         snprintf(vt8500_port->name, sizeof(vt8500_port->name),
346                  "vt8500_serial%d", port->line);
347 
348         ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH,
349                           vt8500_port->name, port);
350         if (unlikely(ret))
351                 return ret;
352 
353         vt8500_write(port, 0x03, VT8500_URLCR); /* enable TX & RX */
354 
355         return 0;
356 }
357 
358 static void vt8500_shutdown(struct uart_port *port)
359 {
360         struct vt8500_port *vt8500_port =
361                         container_of(port, struct vt8500_port, uart);
362 
363         vt8500_port->ier = 0;
364 
365         /* disable interrupts and FIFOs */
366         vt8500_write(&vt8500_port->uart, 0, VT8500_URIER);
367         vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR);
368         free_irq(port->irq, port);
369 }
370 
371 static void vt8500_set_termios(struct uart_port *port,
372                                struct ktermios *termios,
373                                struct ktermios *old)
374 {
375         struct vt8500_port *vt8500_port =
376                         container_of(port, struct vt8500_port, uart);
377         unsigned long flags;
378         unsigned int baud, lcr;
379         unsigned int loops = 1000;
380 
381         spin_lock_irqsave(&port->lock, flags);
382 
383         /* calculate and set baud rate */
384         baud = uart_get_baud_rate(port, termios, old, 900, 921600);
385         baud = vt8500_set_baud_rate(port, baud);
386         if (tty_termios_baud_rate(termios))
387                 tty_termios_encode_baud_rate(termios, baud, baud);
388 
389         /* calculate parity */
390         lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR);
391         lcr &= ~(VT8500_PARENB | VT8500_PARODD);
392         if (termios->c_cflag & PARENB) {
393                 lcr |= VT8500_PARENB;
394                 termios->c_cflag &= ~CMSPAR;
395                 if (termios->c_cflag & PARODD)
396                         lcr |= VT8500_PARODD;
397         }
398 
399         /* calculate bits per char */
400         lcr &= ~VT8500_CS8;
401         switch (termios->c_cflag & CSIZE) {
402         case CS7:
403                 break;
404         case CS8:
405         default:
406                 lcr |= VT8500_CS8;
407                 termios->c_cflag &= ~CSIZE;
408                 termios->c_cflag |= CS8;
409                 break;
410         }
411 
412         /* calculate stop bits */
413         lcr &= ~VT8500_CSTOPB;
414         if (termios->c_cflag & CSTOPB)
415                 lcr |= VT8500_CSTOPB;
416 
417         lcr &= ~VT8500_SWRTSCTS;
418         if (vt8500_port->vt8500_uart_flags & VT8500_HAS_SWRTSCTS_SWITCH)
419                 lcr |= VT8500_SWRTSCTS;
420 
421         /* set parity, bits per char, and stop bit */
422         vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR);
423 
424         /* Configure status bits to ignore based on termio flags. */
425         port->read_status_mask = 0;
426         if (termios->c_iflag & IGNPAR)
427                 port->read_status_mask = FER | PER;
428 
429         uart_update_timeout(port, termios->c_cflag, baud);
430 
431         /* Reset FIFOs */
432         vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR);
433         while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc)
434                                                         && --loops)
435                 cpu_relax();
436 
437         /* Every possible FIFO-related interrupt */
438         vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS;
439 
440         /*
441          * CTS flow control
442          */
443         if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag))
444                 vt8500_port->ier |= TCTS;
445 
446         vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR);
447         vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER);
448 
449         spin_unlock_irqrestore(&port->lock, flags);
450 }
451 
452 static const char *vt8500_type(struct uart_port *port)
453 {
454         struct vt8500_port *vt8500_port =
455                         container_of(port, struct vt8500_port, uart);
456         return vt8500_port->name;
457 }
458 
459 static void vt8500_release_port(struct uart_port *port)
460 {
461 }
462 
463 static int vt8500_request_port(struct uart_port *port)
464 {
465         return 0;
466 }
467 
468 static void vt8500_config_port(struct uart_port *port, int flags)
469 {
470         port->type = PORT_VT8500;
471 }
472 
473 static int vt8500_verify_port(struct uart_port *port,
474                               struct serial_struct *ser)
475 {
476         if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500))
477                 return -EINVAL;
478         if (unlikely(port->irq != ser->irq))
479                 return -EINVAL;
480         return 0;
481 }
482 
483 static struct vt8500_port *vt8500_uart_ports[VT8500_MAX_PORTS];
484 static struct uart_driver vt8500_uart_driver;
485 
486 #ifdef CONFIG_SERIAL_VT8500_CONSOLE
487 
488 static inline void wait_for_xmitr(struct uart_port *port)
489 {
490         unsigned int status, tmout = 10000;
491 
492         /* Wait up to 10ms for the character(s) to be sent. */
493         do {
494                 status = vt8500_read(port, VT8500_URFIDX);
495 
496                 if (--tmout == 0)
497                         break;
498                 udelay(1);
499         } while (status & 0x10);
500 }
501 
502 static void vt8500_console_putchar(struct uart_port *port, int c)
503 {
504         wait_for_xmitr(port);
505         writeb(c, port->membase + VT8500_TXFIFO);
506 }
507 
508 static void vt8500_console_write(struct console *co, const char *s,
509                               unsigned int count)
510 {
511         struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index];
512         unsigned long ier;
513 
514         BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr);
515 
516         ier = vt8500_read(&vt8500_port->uart, VT8500_URIER);
517         vt8500_write(&vt8500_port->uart, VT8500_URIER, 0);
518 
519         uart_console_write(&vt8500_port->uart, s, count,
520                            vt8500_console_putchar);
521 
522         /*
523          *      Finally, wait for transmitter to become empty
524          *      and switch back to FIFO
525          */
526         wait_for_xmitr(&vt8500_port->uart);
527         vt8500_write(&vt8500_port->uart, VT8500_URIER, ier);
528 }
529 
530 static int __init vt8500_console_setup(struct console *co, char *options)
531 {
532         struct vt8500_port *vt8500_port;
533         int baud = 9600;
534         int bits = 8;
535         int parity = 'n';
536         int flow = 'n';
537 
538         if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0))
539                 return -ENXIO;
540 
541         vt8500_port = vt8500_uart_ports[co->index];
542 
543         if (!vt8500_port)
544                 return -ENODEV;
545 
546         if (options)
547                 uart_parse_options(options, &baud, &parity, &bits, &flow);
548 
549         return uart_set_options(&vt8500_port->uart,
550                                  co, baud, parity, bits, flow);
551 }
552 
553 static struct console vt8500_console = {
554         .name = "ttyWMT",
555         .write = vt8500_console_write,
556         .device = uart_console_device,
557         .setup = vt8500_console_setup,
558         .flags = CON_PRINTBUFFER,
559         .index = -1,
560         .data = &vt8500_uart_driver,
561 };
562 
563 #define VT8500_CONSOLE  (&vt8500_console)
564 
565 #else
566 #define VT8500_CONSOLE  NULL
567 #endif
568 
569 #ifdef CONFIG_CONSOLE_POLL
570 static int vt8500_get_poll_char(struct uart_port *port)
571 {
572         unsigned int status = vt8500_read(port, VT8500_URFIDX);
573 
574         if (!(status & 0x1f00))
575                 return NO_POLL_CHAR;
576 
577         return vt8500_read(port, VT8500_RXFIFO) & 0xff;
578 }
579 
580 static void vt8500_put_poll_char(struct uart_port *port, unsigned char c)
581 {
582         unsigned int status, tmout = 10000;
583 
584         do {
585                 status = vt8500_read(port, VT8500_URFIDX);
586 
587                 if (--tmout == 0)
588                         break;
589                 udelay(1);
590         } while (status & 0x10);
591 
592         vt8500_write(port, c, VT8500_TXFIFO);
593 }
594 #endif
595 
596 static struct uart_ops vt8500_uart_pops = {
597         .tx_empty       = vt8500_tx_empty,
598         .set_mctrl      = vt8500_set_mctrl,
599         .get_mctrl      = vt8500_get_mctrl,
600         .stop_tx        = vt8500_stop_tx,
601         .start_tx       = vt8500_start_tx,
602         .stop_rx        = vt8500_stop_rx,
603         .enable_ms      = vt8500_enable_ms,
604         .break_ctl      = vt8500_break_ctl,
605         .startup        = vt8500_startup,
606         .shutdown       = vt8500_shutdown,
607         .set_termios    = vt8500_set_termios,
608         .type           = vt8500_type,
609         .release_port   = vt8500_release_port,
610         .request_port   = vt8500_request_port,
611         .config_port    = vt8500_config_port,
612         .verify_port    = vt8500_verify_port,
613 #ifdef CONFIG_CONSOLE_POLL
614         .poll_get_char  = vt8500_get_poll_char,
615         .poll_put_char  = vt8500_put_poll_char,
616 #endif
617 };
618 
619 static struct uart_driver vt8500_uart_driver = {
620         .owner          = THIS_MODULE,
621         .driver_name    = "vt8500_serial",
622         .dev_name       = "ttyWMT",
623         .nr             = 6,
624         .cons           = VT8500_CONSOLE,
625 };
626 
627 static unsigned int vt8500_flags; /* none required so far */
628 static unsigned int wm8880_flags = VT8500_HAS_SWRTSCTS_SWITCH;
629 
630 static const struct of_device_id wmt_dt_ids[] = {
631         { .compatible = "via,vt8500-uart", .data = &vt8500_flags},
632         { .compatible = "wm,wm8880-uart", .data = &wm8880_flags},
633         {}
634 };
635 
636 static int vt8500_serial_probe(struct platform_device *pdev)
637 {
638         struct vt8500_port *vt8500_port;
639         struct resource *mmres, *irqres;
640         struct device_node *np = pdev->dev.of_node;
641         const struct of_device_id *match;
642         const unsigned int *flags;
643         int ret;
644         int port;
645 
646         match = of_match_device(wmt_dt_ids, &pdev->dev);
647         if (!match)
648                 return -EINVAL;
649 
650         flags = match->data;
651 
652         mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0);
653         irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
654         if (!mmres || !irqres)
655                 return -ENODEV;
656 
657         if (np) {
658                 port = of_alias_get_id(np, "serial");
659                 if (port >= VT8500_MAX_PORTS)
660                         port = -1;
661         } else {
662                 port = -1;
663         }
664 
665         if (port < 0) {
666                 /* calculate the port id */
667                 port = find_first_zero_bit(&vt8500_ports_in_use,
668                                         sizeof(vt8500_ports_in_use));
669         }
670 
671         if (port >= VT8500_MAX_PORTS)
672                 return -ENODEV;
673 
674         /* reserve the port id */
675         if (test_and_set_bit(port, &vt8500_ports_in_use)) {
676                 /* port already in use - shouldn't really happen */
677                 return -EBUSY;
678         }
679 
680         vt8500_port = devm_kzalloc(&pdev->dev, sizeof(struct vt8500_port),
681                                    GFP_KERNEL);
682         if (!vt8500_port)
683                 return -ENOMEM;
684 
685         vt8500_port->uart.membase = devm_ioremap_resource(&pdev->dev, mmres);
686         if (IS_ERR(vt8500_port->uart.membase))
687                 return PTR_ERR(vt8500_port->uart.membase);
688 
689         vt8500_port->clk = of_clk_get(pdev->dev.of_node, 0);
690         if (IS_ERR(vt8500_port->clk)) {
691                 dev_err(&pdev->dev, "failed to get clock\n");
692                 return  -EINVAL;
693         }
694 
695         ret = clk_prepare_enable(vt8500_port->clk);
696         if (ret) {
697                 dev_err(&pdev->dev, "failed to enable clock\n");
698                 return ret;
699         }
700 
701         vt8500_port->vt8500_uart_flags = *flags;
702         vt8500_port->clk_predivisor = DIV_ROUND_CLOSEST(
703                                         clk_get_rate(vt8500_port->clk),
704                                         VT8500_RECOMMENDED_CLK
705                                       );
706         vt8500_port->uart.type = PORT_VT8500;
707         vt8500_port->uart.iotype = UPIO_MEM;
708         vt8500_port->uart.mapbase = mmres->start;
709         vt8500_port->uart.irq = irqres->start;
710         vt8500_port->uart.fifosize = 16;
711         vt8500_port->uart.ops = &vt8500_uart_pops;
712         vt8500_port->uart.line = port;
713         vt8500_port->uart.dev = &pdev->dev;
714         vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
715 
716         /* Serial core uses the magic "16" everywhere - adjust for it */
717         vt8500_port->uart.uartclk = 16 * clk_get_rate(vt8500_port->clk) /
718                                         vt8500_port->clk_predivisor /
719                                         VT8500_OVERSAMPLING_DIVISOR;
720 
721         snprintf(vt8500_port->name, sizeof(vt8500_port->name),
722                  "VT8500 UART%d", pdev->id);
723 
724         vt8500_uart_ports[port] = vt8500_port;
725 
726         uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart);
727 
728         platform_set_drvdata(pdev, vt8500_port);
729 
730         return 0;
731 }
732 
733 static int vt8500_serial_remove(struct platform_device *pdev)
734 {
735         struct vt8500_port *vt8500_port = platform_get_drvdata(pdev);
736 
737         clk_disable_unprepare(vt8500_port->clk);
738         uart_remove_one_port(&vt8500_uart_driver, &vt8500_port->uart);
739 
740         return 0;
741 }
742 
743 static struct platform_driver vt8500_platform_driver = {
744         .probe  = vt8500_serial_probe,
745         .remove = vt8500_serial_remove,
746         .driver = {
747                 .name = "vt8500_serial",
748                 .owner = THIS_MODULE,
749                 .of_match_table = wmt_dt_ids,
750         },
751 };
752 
753 static int __init vt8500_serial_init(void)
754 {
755         int ret;
756 
757         ret = uart_register_driver(&vt8500_uart_driver);
758         if (unlikely(ret))
759                 return ret;
760 
761         ret = platform_driver_register(&vt8500_platform_driver);
762 
763         if (unlikely(ret))
764                 uart_unregister_driver(&vt8500_uart_driver);
765 
766         return ret;
767 }
768 
769 static void __exit vt8500_serial_exit(void)
770 {
771 #ifdef CONFIG_SERIAL_VT8500_CONSOLE
772         unregister_console(&vt8500_console);
773 #endif
774         platform_driver_unregister(&vt8500_platform_driver);
775         uart_unregister_driver(&vt8500_uart_driver);
776 }
777 
778 module_init(vt8500_serial_init);
779 module_exit(vt8500_serial_exit);
780 
781 MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>");
782 MODULE_DESCRIPTION("Driver for vt8500 serial device");
783 MODULE_LICENSE("GPL v2");
784 

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