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Linux/drivers/tty/serial/pmac_zilog.c

  1 /*
  2  * Driver for PowerMac Z85c30 based ESCC cell found in the
  3  * "macio" ASICs of various PowerMac models
  4  * 
  5  * Copyright (C) 2003 Ben. Herrenschmidt (benh@kernel.crashing.org)
  6  *
  7  * Derived from drivers/macintosh/macserial.c by Paul Mackerras
  8  * and drivers/serial/sunzilog.c by David S. Miller
  9  *
 10  * Hrm... actually, I ripped most of sunzilog (Thanks David !) and
 11  * adapted special tweaks needed for us. I don't think it's worth
 12  * merging back those though. The DMA code still has to get in
 13  * and once done, I expect that driver to remain fairly stable in
 14  * the long term, unless we change the driver model again...
 15  *
 16  * This program is free software; you can redistribute it and/or modify
 17  * it under the terms of the GNU General Public License as published by
 18  * the Free Software Foundation; either version 2 of the License, or
 19  * (at your option) any later version.
 20  *
 21  * This program is distributed in the hope that it will be useful,
 22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 24  * GNU General Public License for more details.
 25  *
 26  * You should have received a copy of the GNU General Public License
 27  * along with this program; if not, write to the Free Software
 28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 29  *
 30  * 2004-08-06 Harald Welte <laforge@gnumonks.org>
 31  *      - Enable BREAK interrupt
 32  *      - Add support for sysreq
 33  *
 34  * TODO:   - Add DMA support
 35  *         - Defer port shutdown to a few seconds after close
 36  *         - maybe put something right into uap->clk_divisor
 37  */
 38 
 39 #undef DEBUG
 40 #undef DEBUG_HARD
 41 #undef USE_CTRL_O_SYSRQ
 42 
 43 #include <linux/module.h>
 44 #include <linux/tty.h>
 45 
 46 #include <linux/tty_flip.h>
 47 #include <linux/major.h>
 48 #include <linux/string.h>
 49 #include <linux/fcntl.h>
 50 #include <linux/mm.h>
 51 #include <linux/kernel.h>
 52 #include <linux/delay.h>
 53 #include <linux/init.h>
 54 #include <linux/console.h>
 55 #include <linux/adb.h>
 56 #include <linux/pmu.h>
 57 #include <linux/bitops.h>
 58 #include <linux/sysrq.h>
 59 #include <linux/mutex.h>
 60 #include <linux/of_address.h>
 61 #include <linux/of_irq.h>
 62 #include <asm/sections.h>
 63 #include <asm/io.h>
 64 #include <asm/irq.h>
 65 
 66 #ifdef CONFIG_PPC_PMAC
 67 #include <asm/prom.h>
 68 #include <asm/machdep.h>
 69 #include <asm/pmac_feature.h>
 70 #include <asm/dbdma.h>
 71 #include <asm/macio.h>
 72 #else
 73 #include <linux/platform_device.h>
 74 #define of_machine_is_compatible(x) (0)
 75 #endif
 76 
 77 #if defined (CONFIG_SERIAL_PMACZILOG_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 78 #define SUPPORT_SYSRQ
 79 #endif
 80 
 81 #include <linux/serial.h>
 82 #include <linux/serial_core.h>
 83 
 84 #include "pmac_zilog.h"
 85 
 86 /* Not yet implemented */
 87 #undef HAS_DBDMA
 88 
 89 static char version[] __initdata = "pmac_zilog: 0.6 (Benjamin Herrenschmidt <benh@kernel.crashing.org>)";
 90 MODULE_AUTHOR("Benjamin Herrenschmidt <benh@kernel.crashing.org>");
 91 MODULE_DESCRIPTION("Driver for the Mac and PowerMac serial ports.");
 92 MODULE_LICENSE("GPL");
 93 
 94 #ifdef CONFIG_SERIAL_PMACZILOG_TTYS
 95 #define PMACZILOG_MAJOR         TTY_MAJOR
 96 #define PMACZILOG_MINOR         64
 97 #define PMACZILOG_NAME          "ttyS"
 98 #else
 99 #define PMACZILOG_MAJOR         204
100 #define PMACZILOG_MINOR         192
101 #define PMACZILOG_NAME          "ttyPZ"
102 #endif
103 
104 #define pmz_debug(fmt, arg...)  pr_debug("ttyPZ%d: " fmt, uap->port.line, ## arg)
105 #define pmz_error(fmt, arg...)  pr_err("ttyPZ%d: " fmt, uap->port.line, ## arg)
106 #define pmz_info(fmt, arg...)   pr_info("ttyPZ%d: " fmt, uap->port.line, ## arg)
107 
108 /*
109  * For the sake of early serial console, we can do a pre-probe
110  * (optional) of the ports at rather early boot time.
111  */
112 static struct uart_pmac_port    pmz_ports[MAX_ZS_PORTS];
113 static int                      pmz_ports_count;
114 
115 static struct uart_driver pmz_uart_reg = {
116         .owner          =       THIS_MODULE,
117         .driver_name    =       PMACZILOG_NAME,
118         .dev_name       =       PMACZILOG_NAME,
119         .major          =       PMACZILOG_MAJOR,
120         .minor          =       PMACZILOG_MINOR,
121 };
122 
123 
124 /* 
125  * Load all registers to reprogram the port
126  * This function must only be called when the TX is not busy.  The UART
127  * port lock must be held and local interrupts disabled.
128  */
129 static void pmz_load_zsregs(struct uart_pmac_port *uap, u8 *regs)
130 {
131         int i;
132 
133         /* Let pending transmits finish.  */
134         for (i = 0; i < 1000; i++) {
135                 unsigned char stat = read_zsreg(uap, R1);
136                 if (stat & ALL_SNT)
137                         break;
138                 udelay(100);
139         }
140 
141         ZS_CLEARERR(uap);
142         zssync(uap);
143         ZS_CLEARFIFO(uap);
144         zssync(uap);
145         ZS_CLEARERR(uap);
146 
147         /* Disable all interrupts.  */
148         write_zsreg(uap, R1,
149                     regs[R1] & ~(RxINT_MASK | TxINT_ENAB | EXT_INT_ENAB));
150 
151         /* Set parity, sync config, stop bits, and clock divisor.  */
152         write_zsreg(uap, R4, regs[R4]);
153 
154         /* Set misc. TX/RX control bits.  */
155         write_zsreg(uap, R10, regs[R10]);
156 
157         /* Set TX/RX controls sans the enable bits.  */
158         write_zsreg(uap, R3, regs[R3] & ~RxENABLE);
159         write_zsreg(uap, R5, regs[R5] & ~TxENABLE);
160 
161         /* now set R7 "prime" on ESCC */
162         write_zsreg(uap, R15, regs[R15] | EN85C30);
163         write_zsreg(uap, R7, regs[R7P]);
164 
165         /* make sure we use R7 "non-prime" on ESCC */
166         write_zsreg(uap, R15, regs[R15] & ~EN85C30);
167 
168         /* Synchronous mode config.  */
169         write_zsreg(uap, R6, regs[R6]);
170         write_zsreg(uap, R7, regs[R7]);
171 
172         /* Disable baud generator.  */
173         write_zsreg(uap, R14, regs[R14] & ~BRENAB);
174 
175         /* Clock mode control.  */
176         write_zsreg(uap, R11, regs[R11]);
177 
178         /* Lower and upper byte of baud rate generator divisor.  */
179         write_zsreg(uap, R12, regs[R12]);
180         write_zsreg(uap, R13, regs[R13]);
181         
182         /* Now rewrite R14, with BRENAB (if set).  */
183         write_zsreg(uap, R14, regs[R14]);
184 
185         /* Reset external status interrupts.  */
186         write_zsreg(uap, R0, RES_EXT_INT);
187         write_zsreg(uap, R0, RES_EXT_INT);
188 
189         /* Rewrite R3/R5, this time without enables masked.  */
190         write_zsreg(uap, R3, regs[R3]);
191         write_zsreg(uap, R5, regs[R5]);
192 
193         /* Rewrite R1, this time without IRQ enabled masked.  */
194         write_zsreg(uap, R1, regs[R1]);
195 
196         /* Enable interrupts */
197         write_zsreg(uap, R9, regs[R9]);
198 }
199 
200 /* 
201  * We do like sunzilog to avoid disrupting pending Tx
202  * Reprogram the Zilog channel HW registers with the copies found in the
203  * software state struct.  If the transmitter is busy, we defer this update
204  * until the next TX complete interrupt.  Else, we do it right now.
205  *
206  * The UART port lock must be held and local interrupts disabled.
207  */
208 static void pmz_maybe_update_regs(struct uart_pmac_port *uap)
209 {
210         if (!ZS_REGS_HELD(uap)) {
211                 if (ZS_TX_ACTIVE(uap)) {
212                         uap->flags |= PMACZILOG_FLAG_REGS_HELD;
213                 } else {
214                         pmz_debug("pmz: maybe_update_regs: updating\n");
215                         pmz_load_zsregs(uap, uap->curregs);
216                 }
217         }
218 }
219 
220 static void pmz_interrupt_control(struct uart_pmac_port *uap, int enable)
221 {
222         if (enable) {
223                 uap->curregs[1] |= INT_ALL_Rx | TxINT_ENAB;
224                 if (!ZS_IS_EXTCLK(uap))
225                         uap->curregs[1] |= EXT_INT_ENAB;
226         } else {
227                 uap->curregs[1] &= ~(EXT_INT_ENAB | TxINT_ENAB | RxINT_MASK);
228         }
229         write_zsreg(uap, R1, uap->curregs[1]);
230 }
231 
232 static bool pmz_receive_chars(struct uart_pmac_port *uap)
233 {
234         struct tty_port *port;
235         unsigned char ch, r1, drop, error, flag;
236         int loops = 0;
237 
238         /* Sanity check, make sure the old bug is no longer happening */
239         if (uap->port.state == NULL) {
240                 WARN_ON(1);
241                 (void)read_zsdata(uap);
242                 return false;
243         }
244         port = &uap->port.state->port;
245 
246         while (1) {
247                 error = 0;
248                 drop = 0;
249 
250                 r1 = read_zsreg(uap, R1);
251                 ch = read_zsdata(uap);
252 
253                 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR)) {
254                         write_zsreg(uap, R0, ERR_RES);
255                         zssync(uap);
256                 }
257 
258                 ch &= uap->parity_mask;
259                 if (ch == 0 && uap->flags & PMACZILOG_FLAG_BREAK) {
260                         uap->flags &= ~PMACZILOG_FLAG_BREAK;
261                 }
262 
263 #if defined(CONFIG_MAGIC_SYSRQ) && defined(CONFIG_SERIAL_CORE_CONSOLE)
264 #ifdef USE_CTRL_O_SYSRQ
265                 /* Handle the SysRq ^O Hack */
266                 if (ch == '\x0f') {
267                         uap->port.sysrq = jiffies + HZ*5;
268                         goto next_char;
269                 }
270 #endif /* USE_CTRL_O_SYSRQ */
271                 if (uap->port.sysrq) {
272                         int swallow;
273                         spin_unlock(&uap->port.lock);
274                         swallow = uart_handle_sysrq_char(&uap->port, ch);
275                         spin_lock(&uap->port.lock);
276                         if (swallow)
277                                 goto next_char;
278                 }
279 #endif /* CONFIG_MAGIC_SYSRQ && CONFIG_SERIAL_CORE_CONSOLE */
280 
281                 /* A real serial line, record the character and status.  */
282                 if (drop)
283                         goto next_char;
284 
285                 flag = TTY_NORMAL;
286                 uap->port.icount.rx++;
287 
288                 if (r1 & (PAR_ERR | Rx_OVR | CRC_ERR | BRK_ABRT)) {
289                         error = 1;
290                         if (r1 & BRK_ABRT) {
291                                 pmz_debug("pmz: got break !\n");
292                                 r1 &= ~(PAR_ERR | CRC_ERR);
293                                 uap->port.icount.brk++;
294                                 if (uart_handle_break(&uap->port))
295                                         goto next_char;
296                         }
297                         else if (r1 & PAR_ERR)
298                                 uap->port.icount.parity++;
299                         else if (r1 & CRC_ERR)
300                                 uap->port.icount.frame++;
301                         if (r1 & Rx_OVR)
302                                 uap->port.icount.overrun++;
303                         r1 &= uap->port.read_status_mask;
304                         if (r1 & BRK_ABRT)
305                                 flag = TTY_BREAK;
306                         else if (r1 & PAR_ERR)
307                                 flag = TTY_PARITY;
308                         else if (r1 & CRC_ERR)
309                                 flag = TTY_FRAME;
310                 }
311 
312                 if (uap->port.ignore_status_mask == 0xff ||
313                     (r1 & uap->port.ignore_status_mask) == 0) {
314                         tty_insert_flip_char(port, ch, flag);
315                 }
316                 if (r1 & Rx_OVR)
317                         tty_insert_flip_char(port, 0, TTY_OVERRUN);
318         next_char:
319                 /* We can get stuck in an infinite loop getting char 0 when the
320                  * line is in a wrong HW state, we break that here.
321                  * When that happens, I disable the receive side of the driver.
322                  * Note that what I've been experiencing is a real irq loop where
323                  * I'm getting flooded regardless of the actual port speed.
324                  * Something strange is going on with the HW
325                  */
326                 if ((++loops) > 1000)
327                         goto flood;
328                 ch = read_zsreg(uap, R0);
329                 if (!(ch & Rx_CH_AV))
330                         break;
331         }
332 
333         return true;
334  flood:
335         pmz_interrupt_control(uap, 0);
336         pmz_error("pmz: rx irq flood !\n");
337         return true;
338 }
339 
340 static void pmz_status_handle(struct uart_pmac_port *uap)
341 {
342         unsigned char status;
343 
344         status = read_zsreg(uap, R0);
345         write_zsreg(uap, R0, RES_EXT_INT);
346         zssync(uap);
347 
348         if (ZS_IS_OPEN(uap) && ZS_WANTS_MODEM_STATUS(uap)) {
349                 if (status & SYNC_HUNT)
350                         uap->port.icount.dsr++;
351 
352                 /* The Zilog just gives us an interrupt when DCD/CTS/etc. change.
353                  * But it does not tell us which bit has changed, we have to keep
354                  * track of this ourselves.
355                  * The CTS input is inverted for some reason.  -- paulus
356                  */
357                 if ((status ^ uap->prev_status) & DCD)
358                         uart_handle_dcd_change(&uap->port,
359                                                (status & DCD));
360                 if ((status ^ uap->prev_status) & CTS)
361                         uart_handle_cts_change(&uap->port,
362                                                !(status & CTS));
363 
364                 wake_up_interruptible(&uap->port.state->port.delta_msr_wait);
365         }
366 
367         if (status & BRK_ABRT)
368                 uap->flags |= PMACZILOG_FLAG_BREAK;
369 
370         uap->prev_status = status;
371 }
372 
373 static void pmz_transmit_chars(struct uart_pmac_port *uap)
374 {
375         struct circ_buf *xmit;
376 
377         if (ZS_IS_CONS(uap)) {
378                 unsigned char status = read_zsreg(uap, R0);
379 
380                 /* TX still busy?  Just wait for the next TX done interrupt.
381                  *
382                  * It can occur because of how we do serial console writes.  It would
383                  * be nice to transmit console writes just like we normally would for
384                  * a TTY line. (ie. buffered and TX interrupt driven).  That is not
385                  * easy because console writes cannot sleep.  One solution might be
386                  * to poll on enough port->xmit space becoming free.  -DaveM
387                  */
388                 if (!(status & Tx_BUF_EMP))
389                         return;
390         }
391 
392         uap->flags &= ~PMACZILOG_FLAG_TX_ACTIVE;
393 
394         if (ZS_REGS_HELD(uap)) {
395                 pmz_load_zsregs(uap, uap->curregs);
396                 uap->flags &= ~PMACZILOG_FLAG_REGS_HELD;
397         }
398 
399         if (ZS_TX_STOPPED(uap)) {
400                 uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
401                 goto ack_tx_int;
402         }
403 
404         /* Under some circumstances, we see interrupts reported for
405          * a closed channel. The interrupt mask in R1 is clear, but
406          * R3 still signals the interrupts and we see them when taking
407          * an interrupt for the other channel (this could be a qemu
408          * bug but since the ESCC doc doesn't specify precsiely whether
409          * R3 interrup status bits are masked by R1 interrupt enable
410          * bits, better safe than sorry). --BenH.
411          */
412         if (!ZS_IS_OPEN(uap))
413                 goto ack_tx_int;
414 
415         if (uap->port.x_char) {
416                 uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
417                 write_zsdata(uap, uap->port.x_char);
418                 zssync(uap);
419                 uap->port.icount.tx++;
420                 uap->port.x_char = 0;
421                 return;
422         }
423 
424         if (uap->port.state == NULL)
425                 goto ack_tx_int;
426         xmit = &uap->port.state->xmit;
427         if (uart_circ_empty(xmit)) {
428                 uart_write_wakeup(&uap->port);
429                 goto ack_tx_int;
430         }
431         if (uart_tx_stopped(&uap->port))
432                 goto ack_tx_int;
433 
434         uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
435         write_zsdata(uap, xmit->buf[xmit->tail]);
436         zssync(uap);
437 
438         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
439         uap->port.icount.tx++;
440 
441         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
442                 uart_write_wakeup(&uap->port);
443 
444         return;
445 
446 ack_tx_int:
447         write_zsreg(uap, R0, RES_Tx_P);
448         zssync(uap);
449 }
450 
451 /* Hrm... we register that twice, fixme later.... */
452 static irqreturn_t pmz_interrupt(int irq, void *dev_id)
453 {
454         struct uart_pmac_port *uap = dev_id;
455         struct uart_pmac_port *uap_a;
456         struct uart_pmac_port *uap_b;
457         int rc = IRQ_NONE;
458         bool push;
459         u8 r3;
460 
461         uap_a = pmz_get_port_A(uap);
462         uap_b = uap_a->mate;
463 
464         spin_lock(&uap_a->port.lock);
465         r3 = read_zsreg(uap_a, R3);
466 
467 #ifdef DEBUG_HARD
468         pmz_debug("irq, r3: %x\n", r3);
469 #endif
470         /* Channel A */
471         push = false;
472         if (r3 & (CHAEXT | CHATxIP | CHARxIP)) {
473                 if (!ZS_IS_OPEN(uap_a)) {
474                         pmz_debug("ChanA interrupt while not open !\n");
475                         goto skip_a;
476                 }
477                 write_zsreg(uap_a, R0, RES_H_IUS);
478                 zssync(uap_a);          
479                 if (r3 & CHAEXT)
480                         pmz_status_handle(uap_a);
481                 if (r3 & CHARxIP)
482                         push = pmz_receive_chars(uap_a);
483                 if (r3 & CHATxIP)
484                         pmz_transmit_chars(uap_a);
485                 rc = IRQ_HANDLED;
486         }
487  skip_a:
488         spin_unlock(&uap_a->port.lock);
489         if (push)
490                 tty_flip_buffer_push(&uap->port.state->port);
491 
492         if (!uap_b)
493                 goto out;
494 
495         spin_lock(&uap_b->port.lock);
496         push = false;
497         if (r3 & (CHBEXT | CHBTxIP | CHBRxIP)) {
498                 if (!ZS_IS_OPEN(uap_b)) {
499                         pmz_debug("ChanB interrupt while not open !\n");
500                         goto skip_b;
501                 }
502                 write_zsreg(uap_b, R0, RES_H_IUS);
503                 zssync(uap_b);
504                 if (r3 & CHBEXT)
505                         pmz_status_handle(uap_b);
506                 if (r3 & CHBRxIP)
507                         push = pmz_receive_chars(uap_b);
508                 if (r3 & CHBTxIP)
509                         pmz_transmit_chars(uap_b);
510                 rc = IRQ_HANDLED;
511         }
512  skip_b:
513         spin_unlock(&uap_b->port.lock);
514         if (push)
515                 tty_flip_buffer_push(&uap->port.state->port);
516 
517  out:
518         return rc;
519 }
520 
521 /*
522  * Peek the status register, lock not held by caller
523  */
524 static inline u8 pmz_peek_status(struct uart_pmac_port *uap)
525 {
526         unsigned long flags;
527         u8 status;
528         
529         spin_lock_irqsave(&uap->port.lock, flags);
530         status = read_zsreg(uap, R0);
531         spin_unlock_irqrestore(&uap->port.lock, flags);
532 
533         return status;
534 }
535 
536 /* 
537  * Check if transmitter is empty
538  * The port lock is not held.
539  */
540 static unsigned int pmz_tx_empty(struct uart_port *port)
541 {
542         unsigned char status;
543 
544         status = pmz_peek_status(to_pmz(port));
545         if (status & Tx_BUF_EMP)
546                 return TIOCSER_TEMT;
547         return 0;
548 }
549 
550 /* 
551  * Set Modem Control (RTS & DTR) bits
552  * The port lock is held and interrupts are disabled.
553  * Note: Shall we really filter out RTS on external ports or
554  * should that be dealt at higher level only ?
555  */
556 static void pmz_set_mctrl(struct uart_port *port, unsigned int mctrl)
557 {
558         struct uart_pmac_port *uap = to_pmz(port);
559         unsigned char set_bits, clear_bits;
560 
561         /* Do nothing for irda for now... */
562         if (ZS_IS_IRDA(uap))
563                 return;
564         /* We get called during boot with a port not up yet */
565         if (!(ZS_IS_OPEN(uap) || ZS_IS_CONS(uap)))
566                 return;
567 
568         set_bits = clear_bits = 0;
569 
570         if (ZS_IS_INTMODEM(uap)) {
571                 if (mctrl & TIOCM_RTS)
572                         set_bits |= RTS;
573                 else
574                         clear_bits |= RTS;
575         }
576         if (mctrl & TIOCM_DTR)
577                 set_bits |= DTR;
578         else
579                 clear_bits |= DTR;
580 
581         /* NOTE: Not subject to 'transmitter active' rule.  */ 
582         uap->curregs[R5] |= set_bits;
583         uap->curregs[R5] &= ~clear_bits;
584 
585         write_zsreg(uap, R5, uap->curregs[R5]);
586         pmz_debug("pmz_set_mctrl: set bits: %x, clear bits: %x -> %x\n",
587                   set_bits, clear_bits, uap->curregs[R5]);
588         zssync(uap);
589 }
590 
591 /* 
592  * Get Modem Control bits (only the input ones, the core will
593  * or that with a cached value of the control ones)
594  * The port lock is held and interrupts are disabled.
595  */
596 static unsigned int pmz_get_mctrl(struct uart_port *port)
597 {
598         struct uart_pmac_port *uap = to_pmz(port);
599         unsigned char status;
600         unsigned int ret;
601 
602         status = read_zsreg(uap, R0);
603 
604         ret = 0;
605         if (status & DCD)
606                 ret |= TIOCM_CAR;
607         if (status & SYNC_HUNT)
608                 ret |= TIOCM_DSR;
609         if (!(status & CTS))
610                 ret |= TIOCM_CTS;
611 
612         return ret;
613 }
614 
615 /* 
616  * Stop TX side. Dealt like sunzilog at next Tx interrupt,
617  * though for DMA, we will have to do a bit more.
618  * The port lock is held and interrupts are disabled.
619  */
620 static void pmz_stop_tx(struct uart_port *port)
621 {
622         to_pmz(port)->flags |= PMACZILOG_FLAG_TX_STOPPED;
623 }
624 
625 /* 
626  * Kick the Tx side.
627  * The port lock is held and interrupts are disabled.
628  */
629 static void pmz_start_tx(struct uart_port *port)
630 {
631         struct uart_pmac_port *uap = to_pmz(port);
632         unsigned char status;
633 
634         pmz_debug("pmz: start_tx()\n");
635 
636         uap->flags |= PMACZILOG_FLAG_TX_ACTIVE;
637         uap->flags &= ~PMACZILOG_FLAG_TX_STOPPED;
638 
639         status = read_zsreg(uap, R0);
640 
641         /* TX busy?  Just wait for the TX done interrupt.  */
642         if (!(status & Tx_BUF_EMP))
643                 return;
644 
645         /* Send the first character to jump-start the TX done
646          * IRQ sending engine.
647          */
648         if (port->x_char) {
649                 write_zsdata(uap, port->x_char);
650                 zssync(uap);
651                 port->icount.tx++;
652                 port->x_char = 0;
653         } else {
654                 struct circ_buf *xmit = &port->state->xmit;
655 
656                 write_zsdata(uap, xmit->buf[xmit->tail]);
657                 zssync(uap);
658                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
659                 port->icount.tx++;
660 
661                 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
662                         uart_write_wakeup(&uap->port);
663         }
664         pmz_debug("pmz: start_tx() done.\n");
665 }
666 
667 /* 
668  * Stop Rx side, basically disable emitting of
669  * Rx interrupts on the port. We don't disable the rx
670  * side of the chip proper though
671  * The port lock is held.
672  */
673 static void pmz_stop_rx(struct uart_port *port)
674 {
675         struct uart_pmac_port *uap = to_pmz(port);
676 
677         pmz_debug("pmz: stop_rx()()\n");
678 
679         /* Disable all RX interrupts.  */
680         uap->curregs[R1] &= ~RxINT_MASK;
681         pmz_maybe_update_regs(uap);
682 
683         pmz_debug("pmz: stop_rx() done.\n");
684 }
685 
686 /* 
687  * Enable modem status change interrupts
688  * The port lock is held.
689  */
690 static void pmz_enable_ms(struct uart_port *port)
691 {
692         struct uart_pmac_port *uap = to_pmz(port);
693         unsigned char new_reg;
694 
695         if (ZS_IS_IRDA(uap))
696                 return;
697         new_reg = uap->curregs[R15] | (DCDIE | SYNCIE | CTSIE);
698         if (new_reg != uap->curregs[R15]) {
699                 uap->curregs[R15] = new_reg;
700 
701                 /* NOTE: Not subject to 'transmitter active' rule. */
702                 write_zsreg(uap, R15, uap->curregs[R15]);
703         }
704 }
705 
706 /* 
707  * Control break state emission
708  * The port lock is not held.
709  */
710 static void pmz_break_ctl(struct uart_port *port, int break_state)
711 {
712         struct uart_pmac_port *uap = to_pmz(port);
713         unsigned char set_bits, clear_bits, new_reg;
714         unsigned long flags;
715 
716         set_bits = clear_bits = 0;
717 
718         if (break_state)
719                 set_bits |= SND_BRK;
720         else
721                 clear_bits |= SND_BRK;
722 
723         spin_lock_irqsave(&port->lock, flags);
724 
725         new_reg = (uap->curregs[R5] | set_bits) & ~clear_bits;
726         if (new_reg != uap->curregs[R5]) {
727                 uap->curregs[R5] = new_reg;
728                 write_zsreg(uap, R5, uap->curregs[R5]);
729         }
730 
731         spin_unlock_irqrestore(&port->lock, flags);
732 }
733 
734 #ifdef CONFIG_PPC_PMAC
735 
736 /*
737  * Turn power on or off to the SCC and associated stuff
738  * (port drivers, modem, IR port, etc.)
739  * Returns the number of milliseconds we should wait before
740  * trying to use the port.
741  */
742 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
743 {
744         int delay = 0;
745         int rc;
746 
747         if (state) {
748                 rc = pmac_call_feature(
749                         PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 1);
750                 pmz_debug("port power on result: %d\n", rc);
751                 if (ZS_IS_INTMODEM(uap)) {
752                         rc = pmac_call_feature(
753                                 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 1);
754                         delay = 2500;   /* wait for 2.5s before using */
755                         pmz_debug("modem power result: %d\n", rc);
756                 }
757         } else {
758                 /* TODO: Make that depend on a timer, don't power down
759                  * immediately
760                  */
761                 if (ZS_IS_INTMODEM(uap)) {
762                         rc = pmac_call_feature(
763                                 PMAC_FTR_MODEM_ENABLE, uap->node, 0, 0);
764                         pmz_debug("port power off result: %d\n", rc);
765                 }
766                 pmac_call_feature(PMAC_FTR_SCC_ENABLE, uap->node, uap->port_type, 0);
767         }
768         return delay;
769 }
770 
771 #else
772 
773 static int pmz_set_scc_power(struct uart_pmac_port *uap, int state)
774 {
775         return 0;
776 }
777 
778 #endif /* !CONFIG_PPC_PMAC */
779 
780 /*
781  * FixZeroBug....Works around a bug in the SCC receiving channel.
782  * Inspired from Darwin code, 15 Sept. 2000  -DanM
783  *
784  * The following sequence prevents a problem that is seen with O'Hare ASICs
785  * (most versions -- also with some Heathrow and Hydra ASICs) where a zero
786  * at the input to the receiver becomes 'stuck' and locks up the receiver.
787  * This problem can occur as a result of a zero bit at the receiver input
788  * coincident with any of the following events:
789  *
790  *      The SCC is initialized (hardware or software).
791  *      A framing error is detected.
792  *      The clocking option changes from synchronous or X1 asynchronous
793  *              clocking to X16, X32, or X64 asynchronous clocking.
794  *      The decoding mode is changed among NRZ, NRZI, FM0, or FM1.
795  *
796  * This workaround attempts to recover from the lockup condition by placing
797  * the SCC in synchronous loopback mode with a fast clock before programming
798  * any of the asynchronous modes.
799  */
800 static void pmz_fix_zero_bug_scc(struct uart_pmac_port *uap)
801 {
802         write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
803         zssync(uap);
804         udelay(10);
805         write_zsreg(uap, 9, (ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB) | NV);
806         zssync(uap);
807 
808         write_zsreg(uap, 4, X1CLK | MONSYNC);
809         write_zsreg(uap, 3, Rx8);
810         write_zsreg(uap, 5, Tx8 | RTS);
811         write_zsreg(uap, 9, NV);        /* Didn't we already do this? */
812         write_zsreg(uap, 11, RCBR | TCBR);
813         write_zsreg(uap, 12, 0);
814         write_zsreg(uap, 13, 0);
815         write_zsreg(uap, 14, (LOOPBAK | BRSRC));
816         write_zsreg(uap, 14, (LOOPBAK | BRSRC | BRENAB));
817         write_zsreg(uap, 3, Rx8 | RxENABLE);
818         write_zsreg(uap, 0, RES_EXT_INT);
819         write_zsreg(uap, 0, RES_EXT_INT);
820         write_zsreg(uap, 0, RES_EXT_INT);       /* to kill some time */
821 
822         /* The channel should be OK now, but it is probably receiving
823          * loopback garbage.
824          * Switch to asynchronous mode, disable the receiver,
825          * and discard everything in the receive buffer.
826          */
827         write_zsreg(uap, 9, NV);
828         write_zsreg(uap, 4, X16CLK | SB_MASK);
829         write_zsreg(uap, 3, Rx8);
830 
831         while (read_zsreg(uap, 0) & Rx_CH_AV) {
832                 (void)read_zsreg(uap, 8);
833                 write_zsreg(uap, 0, RES_EXT_INT);
834                 write_zsreg(uap, 0, ERR_RES);
835         }
836 }
837 
838 /*
839  * Real startup routine, powers up the hardware and sets up
840  * the SCC. Returns a delay in ms where you need to wait before
841  * actually using the port, this is typically the internal modem
842  * powerup delay. This routine expect the lock to be taken.
843  */
844 static int __pmz_startup(struct uart_pmac_port *uap)
845 {
846         int pwr_delay = 0;
847 
848         memset(&uap->curregs, 0, sizeof(uap->curregs));
849 
850         /* Power up the SCC & underlying hardware (modem/irda) */
851         pwr_delay = pmz_set_scc_power(uap, 1);
852 
853         /* Nice buggy HW ... */
854         pmz_fix_zero_bug_scc(uap);
855 
856         /* Reset the channel */
857         uap->curregs[R9] = 0;
858         write_zsreg(uap, 9, ZS_IS_CHANNEL_A(uap) ? CHRA : CHRB);
859         zssync(uap);
860         udelay(10);
861         write_zsreg(uap, 9, 0);
862         zssync(uap);
863 
864         /* Clear the interrupt registers */
865         write_zsreg(uap, R1, 0);
866         write_zsreg(uap, R0, ERR_RES);
867         write_zsreg(uap, R0, ERR_RES);
868         write_zsreg(uap, R0, RES_H_IUS);
869         write_zsreg(uap, R0, RES_H_IUS);
870 
871         /* Setup some valid baud rate */
872         uap->curregs[R4] = X16CLK | SB1;
873         uap->curregs[R3] = Rx8;
874         uap->curregs[R5] = Tx8 | RTS;
875         if (!ZS_IS_IRDA(uap))
876                 uap->curregs[R5] |= DTR;
877         uap->curregs[R12] = 0;
878         uap->curregs[R13] = 0;
879         uap->curregs[R14] = BRENAB;
880 
881         /* Clear handshaking, enable BREAK interrupts */
882         uap->curregs[R15] = BRKIE;
883 
884         /* Master interrupt enable */
885         uap->curregs[R9] |= NV | MIE;
886 
887         pmz_load_zsregs(uap, uap->curregs);
888 
889         /* Enable receiver and transmitter.  */
890         write_zsreg(uap, R3, uap->curregs[R3] |= RxENABLE);
891         write_zsreg(uap, R5, uap->curregs[R5] |= TxENABLE);
892 
893         /* Remember status for DCD/CTS changes */
894         uap->prev_status = read_zsreg(uap, R0);
895 
896         return pwr_delay;
897 }
898 
899 static void pmz_irda_reset(struct uart_pmac_port *uap)
900 {
901         unsigned long flags;
902 
903         spin_lock_irqsave(&uap->port.lock, flags);
904         uap->curregs[R5] |= DTR;
905         write_zsreg(uap, R5, uap->curregs[R5]);
906         zssync(uap);
907         spin_unlock_irqrestore(&uap->port.lock, flags);
908         msleep(110);
909 
910         spin_lock_irqsave(&uap->port.lock, flags);
911         uap->curregs[R5] &= ~DTR;
912         write_zsreg(uap, R5, uap->curregs[R5]);
913         zssync(uap);
914         spin_unlock_irqrestore(&uap->port.lock, flags);
915         msleep(10);
916 }
917 
918 /*
919  * This is the "normal" startup routine, using the above one
920  * wrapped with the lock and doing a schedule delay
921  */
922 static int pmz_startup(struct uart_port *port)
923 {
924         struct uart_pmac_port *uap = to_pmz(port);
925         unsigned long flags;
926         int pwr_delay = 0;
927 
928         pmz_debug("pmz: startup()\n");
929 
930         uap->flags |= PMACZILOG_FLAG_IS_OPEN;
931 
932         /* A console is never powered down. Else, power up and
933          * initialize the chip
934          */
935         if (!ZS_IS_CONS(uap)) {
936                 spin_lock_irqsave(&port->lock, flags);
937                 pwr_delay = __pmz_startup(uap);
938                 spin_unlock_irqrestore(&port->lock, flags);
939         }       
940         sprintf(uap->irq_name, PMACZILOG_NAME"%d", uap->port.line);
941         if (request_irq(uap->port.irq, pmz_interrupt, IRQF_SHARED,
942                         uap->irq_name, uap)) {
943                 pmz_error("Unable to register zs interrupt handler.\n");
944                 pmz_set_scc_power(uap, 0);
945                 return -ENXIO;
946         }
947 
948         /* Right now, we deal with delay by blocking here, I'll be
949          * smarter later on
950          */
951         if (pwr_delay != 0) {
952                 pmz_debug("pmz: delaying %d ms\n", pwr_delay);
953                 msleep(pwr_delay);
954         }
955 
956         /* IrDA reset is done now */
957         if (ZS_IS_IRDA(uap))
958                 pmz_irda_reset(uap);
959 
960         /* Enable interrupt requests for the channel */
961         spin_lock_irqsave(&port->lock, flags);
962         pmz_interrupt_control(uap, 1);
963         spin_unlock_irqrestore(&port->lock, flags);
964 
965         pmz_debug("pmz: startup() done.\n");
966 
967         return 0;
968 }
969 
970 static void pmz_shutdown(struct uart_port *port)
971 {
972         struct uart_pmac_port *uap = to_pmz(port);
973         unsigned long flags;
974 
975         pmz_debug("pmz: shutdown()\n");
976 
977         spin_lock_irqsave(&port->lock, flags);
978 
979         /* Disable interrupt requests for the channel */
980         pmz_interrupt_control(uap, 0);
981 
982         if (!ZS_IS_CONS(uap)) {
983                 /* Disable receiver and transmitter */
984                 uap->curregs[R3] &= ~RxENABLE;
985                 uap->curregs[R5] &= ~TxENABLE;
986 
987                 /* Disable break assertion */
988                 uap->curregs[R5] &= ~SND_BRK;
989                 pmz_maybe_update_regs(uap);
990         }
991 
992         spin_unlock_irqrestore(&port->lock, flags);
993 
994         /* Release interrupt handler */
995         free_irq(uap->port.irq, uap);
996 
997         spin_lock_irqsave(&port->lock, flags);
998 
999         uap->flags &= ~PMACZILOG_FLAG_IS_OPEN;
1000 
1001         if (!ZS_IS_CONS(uap))
1002                 pmz_set_scc_power(uap, 0);      /* Shut the chip down */
1003 
1004         spin_unlock_irqrestore(&port->lock, flags);
1005 
1006         pmz_debug("pmz: shutdown() done.\n");
1007 }
1008 
1009 /* Shared by TTY driver and serial console setup.  The port lock is held
1010  * and local interrupts are disabled.
1011  */
1012 static void pmz_convert_to_zs(struct uart_pmac_port *uap, unsigned int cflag,
1013                               unsigned int iflag, unsigned long baud)
1014 {
1015         int brg;
1016 
1017         /* Switch to external clocking for IrDA high clock rates. That
1018          * code could be re-used for Midi interfaces with different
1019          * multipliers
1020          */
1021         if (baud >= 115200 && ZS_IS_IRDA(uap)) {
1022                 uap->curregs[R4] = X1CLK;
1023                 uap->curregs[R11] = RCTRxCP | TCTRxCP;
1024                 uap->curregs[R14] = 0; /* BRG off */
1025                 uap->curregs[R12] = 0;
1026                 uap->curregs[R13] = 0;
1027                 uap->flags |= PMACZILOG_FLAG_IS_EXTCLK;
1028         } else {
1029                 switch (baud) {
1030                 case ZS_CLOCK/16:       /* 230400 */
1031                         uap->curregs[R4] = X16CLK;
1032                         uap->curregs[R11] = 0;
1033                         uap->curregs[R14] = 0;
1034                         break;
1035                 case ZS_CLOCK/32:       /* 115200 */
1036                         uap->curregs[R4] = X32CLK;
1037                         uap->curregs[R11] = 0;
1038                         uap->curregs[R14] = 0;
1039                         break;
1040                 default:
1041                         uap->curregs[R4] = X16CLK;
1042                         uap->curregs[R11] = TCBR | RCBR;
1043                         brg = BPS_TO_BRG(baud, ZS_CLOCK / 16);
1044                         uap->curregs[R12] = (brg & 255);
1045                         uap->curregs[R13] = ((brg >> 8) & 255);
1046                         uap->curregs[R14] = BRENAB;
1047                 }
1048                 uap->flags &= ~PMACZILOG_FLAG_IS_EXTCLK;
1049         }
1050 
1051         /* Character size, stop bits, and parity. */
1052         uap->curregs[3] &= ~RxN_MASK;
1053         uap->curregs[5] &= ~TxN_MASK;
1054 
1055         switch (cflag & CSIZE) {
1056         case CS5:
1057                 uap->curregs[3] |= Rx5;
1058                 uap->curregs[5] |= Tx5;
1059                 uap->parity_mask = 0x1f;
1060                 break;
1061         case CS6:
1062                 uap->curregs[3] |= Rx6;
1063                 uap->curregs[5] |= Tx6;
1064                 uap->parity_mask = 0x3f;
1065                 break;
1066         case CS7:
1067                 uap->curregs[3] |= Rx7;
1068                 uap->curregs[5] |= Tx7;
1069                 uap->parity_mask = 0x7f;
1070                 break;
1071         case CS8:
1072         default:
1073                 uap->curregs[3] |= Rx8;
1074                 uap->curregs[5] |= Tx8;
1075                 uap->parity_mask = 0xff;
1076                 break;
1077         }
1078         uap->curregs[4] &= ~(SB_MASK);
1079         if (cflag & CSTOPB)
1080                 uap->curregs[4] |= SB2;
1081         else
1082                 uap->curregs[4] |= SB1;
1083         if (cflag & PARENB)
1084                 uap->curregs[4] |= PAR_ENAB;
1085         else
1086                 uap->curregs[4] &= ~PAR_ENAB;
1087         if (!(cflag & PARODD))
1088                 uap->curregs[4] |= PAR_EVEN;
1089         else
1090                 uap->curregs[4] &= ~PAR_EVEN;
1091 
1092         uap->port.read_status_mask = Rx_OVR;
1093         if (iflag & INPCK)
1094                 uap->port.read_status_mask |= CRC_ERR | PAR_ERR;
1095         if (iflag & (BRKINT | PARMRK))
1096                 uap->port.read_status_mask |= BRK_ABRT;
1097 
1098         uap->port.ignore_status_mask = 0;
1099         if (iflag & IGNPAR)
1100                 uap->port.ignore_status_mask |= CRC_ERR | PAR_ERR;
1101         if (iflag & IGNBRK) {
1102                 uap->port.ignore_status_mask |= BRK_ABRT;
1103                 if (iflag & IGNPAR)
1104                         uap->port.ignore_status_mask |= Rx_OVR;
1105         }
1106 
1107         if ((cflag & CREAD) == 0)
1108                 uap->port.ignore_status_mask = 0xff;
1109 }
1110 
1111 
1112 /*
1113  * Set the irda codec on the imac to the specified baud rate.
1114  */
1115 static void pmz_irda_setup(struct uart_pmac_port *uap, unsigned long *baud)
1116 {
1117         u8 cmdbyte;
1118         int t, version;
1119 
1120         switch (*baud) {
1121         /* SIR modes */
1122         case 2400:
1123                 cmdbyte = 0x53;
1124                 break;
1125         case 4800:
1126                 cmdbyte = 0x52;
1127                 break;
1128         case 9600:
1129                 cmdbyte = 0x51;
1130                 break;
1131         case 19200:
1132                 cmdbyte = 0x50;
1133                 break;
1134         case 38400:
1135                 cmdbyte = 0x4f;
1136                 break;
1137         case 57600:
1138                 cmdbyte = 0x4e;
1139                 break;
1140         case 115200:
1141                 cmdbyte = 0x4d;
1142                 break;
1143         /* The FIR modes aren't really supported at this point, how
1144          * do we select the speed ? via the FCR on KeyLargo ?
1145          */
1146         case 1152000:
1147                 cmdbyte = 0;
1148                 break;
1149         case 4000000:
1150                 cmdbyte = 0;
1151                 break;
1152         default: /* 9600 */
1153                 cmdbyte = 0x51;
1154                 *baud = 9600;
1155                 break;
1156         }
1157 
1158         /* Wait for transmitter to drain */
1159         t = 10000;
1160         while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0
1161                || (read_zsreg(uap, R1) & ALL_SNT) == 0) {
1162                 if (--t <= 0) {
1163                         pmz_error("transmitter didn't drain\n");
1164                         return;
1165                 }
1166                 udelay(10);
1167         }
1168 
1169         /* Drain the receiver too */
1170         t = 100;
1171         (void)read_zsdata(uap);
1172         (void)read_zsdata(uap);
1173         (void)read_zsdata(uap);
1174         mdelay(10);
1175         while (read_zsreg(uap, R0) & Rx_CH_AV) {
1176                 read_zsdata(uap);
1177                 mdelay(10);
1178                 if (--t <= 0) {
1179                         pmz_error("receiver didn't drain\n");
1180                         return;
1181                 }
1182         }
1183 
1184         /* Switch to command mode */
1185         uap->curregs[R5] |= DTR;
1186         write_zsreg(uap, R5, uap->curregs[R5]);
1187         zssync(uap);
1188         mdelay(1);
1189 
1190         /* Switch SCC to 19200 */
1191         pmz_convert_to_zs(uap, CS8, 0, 19200);          
1192         pmz_load_zsregs(uap, uap->curregs);
1193         mdelay(1);
1194 
1195         /* Write get_version command byte */
1196         write_zsdata(uap, 1);
1197         t = 5000;
1198         while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1199                 if (--t <= 0) {
1200                         pmz_error("irda_setup timed out on get_version byte\n");
1201                         goto out;
1202                 }
1203                 udelay(10);
1204         }
1205         version = read_zsdata(uap);
1206 
1207         if (version < 4) {
1208                 pmz_info("IrDA: dongle version %d not supported\n", version);
1209                 goto out;
1210         }
1211 
1212         /* Send speed mode */
1213         write_zsdata(uap, cmdbyte);
1214         t = 5000;
1215         while ((read_zsreg(uap, R0) & Rx_CH_AV) == 0) {
1216                 if (--t <= 0) {
1217                         pmz_error("irda_setup timed out on speed mode byte\n");
1218                         goto out;
1219                 }
1220                 udelay(10);
1221         }
1222         t = read_zsdata(uap);
1223         if (t != cmdbyte)
1224                 pmz_error("irda_setup speed mode byte = %x (%x)\n", t, cmdbyte);
1225 
1226         pmz_info("IrDA setup for %ld bps, dongle version: %d\n",
1227                  *baud, version);
1228 
1229         (void)read_zsdata(uap);
1230         (void)read_zsdata(uap);
1231         (void)read_zsdata(uap);
1232 
1233  out:
1234         /* Switch back to data mode */
1235         uap->curregs[R5] &= ~DTR;
1236         write_zsreg(uap, R5, uap->curregs[R5]);
1237         zssync(uap);
1238 
1239         (void)read_zsdata(uap);
1240         (void)read_zsdata(uap);
1241         (void)read_zsdata(uap);
1242 }
1243 
1244 
1245 static void __pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1246                               struct ktermios *old)
1247 {
1248         struct uart_pmac_port *uap = to_pmz(port);
1249         unsigned long baud;
1250 
1251         pmz_debug("pmz: set_termios()\n");
1252 
1253         memcpy(&uap->termios_cache, termios, sizeof(struct ktermios));
1254 
1255         /* XXX Check which revs of machines actually allow 1 and 4Mb speeds
1256          * on the IR dongle. Note that the IRTTY driver currently doesn't know
1257          * about the FIR mode and high speed modes. So these are unused. For
1258          * implementing proper support for these, we should probably add some
1259          * DMA as well, at least on the Rx side, which isn't a simple thing
1260          * at this point.
1261          */
1262         if (ZS_IS_IRDA(uap)) {
1263                 /* Calc baud rate */
1264                 baud = uart_get_baud_rate(port, termios, old, 1200, 4000000);
1265                 pmz_debug("pmz: switch IRDA to %ld bauds\n", baud);
1266                 /* Cet the irda codec to the right rate */
1267                 pmz_irda_setup(uap, &baud);
1268                 /* Set final baud rate */
1269                 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1270                 pmz_load_zsregs(uap, uap->curregs);
1271                 zssync(uap);
1272         } else {
1273                 baud = uart_get_baud_rate(port, termios, old, 1200, 230400);
1274                 pmz_convert_to_zs(uap, termios->c_cflag, termios->c_iflag, baud);
1275                 /* Make sure modem status interrupts are correctly configured */
1276                 if (UART_ENABLE_MS(&uap->port, termios->c_cflag)) {
1277                         uap->curregs[R15] |= DCDIE | SYNCIE | CTSIE;
1278                         uap->flags |= PMACZILOG_FLAG_MODEM_STATUS;
1279                 } else {
1280                         uap->curregs[R15] &= ~(DCDIE | SYNCIE | CTSIE);
1281                         uap->flags &= ~PMACZILOG_FLAG_MODEM_STATUS;
1282                 }
1283 
1284                 /* Load registers to the chip */
1285                 pmz_maybe_update_regs(uap);
1286         }
1287         uart_update_timeout(port, termios->c_cflag, baud);
1288 
1289         pmz_debug("pmz: set_termios() done.\n");
1290 }
1291 
1292 /* The port lock is not held.  */
1293 static void pmz_set_termios(struct uart_port *port, struct ktermios *termios,
1294                             struct ktermios *old)
1295 {
1296         struct uart_pmac_port *uap = to_pmz(port);
1297         unsigned long flags;
1298 
1299         spin_lock_irqsave(&port->lock, flags);  
1300 
1301         /* Disable IRQs on the port */
1302         pmz_interrupt_control(uap, 0);
1303 
1304         /* Setup new port configuration */
1305         __pmz_set_termios(port, termios, old);
1306 
1307         /* Re-enable IRQs on the port */
1308         if (ZS_IS_OPEN(uap))
1309                 pmz_interrupt_control(uap, 1);
1310 
1311         spin_unlock_irqrestore(&port->lock, flags);
1312 }
1313 
1314 static const char *pmz_type(struct uart_port *port)
1315 {
1316         struct uart_pmac_port *uap = to_pmz(port);
1317 
1318         if (ZS_IS_IRDA(uap))
1319                 return "Z85c30 ESCC - Infrared port";
1320         else if (ZS_IS_INTMODEM(uap))
1321                 return "Z85c30 ESCC - Internal modem";
1322         return "Z85c30 ESCC - Serial port";
1323 }
1324 
1325 /* We do not request/release mappings of the registers here, this
1326  * happens at early serial probe time.
1327  */
1328 static void pmz_release_port(struct uart_port *port)
1329 {
1330 }
1331 
1332 static int pmz_request_port(struct uart_port *port)
1333 {
1334         return 0;
1335 }
1336 
1337 /* These do not need to do anything interesting either.  */
1338 static void pmz_config_port(struct uart_port *port, int flags)
1339 {
1340 }
1341 
1342 /* We do not support letting the user mess with the divisor, IRQ, etc. */
1343 static int pmz_verify_port(struct uart_port *port, struct serial_struct *ser)
1344 {
1345         return -EINVAL;
1346 }
1347 
1348 #ifdef CONFIG_CONSOLE_POLL
1349 
1350 static int pmz_poll_get_char(struct uart_port *port)
1351 {
1352         struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
1353         int tries = 2;
1354 
1355         while (tries) {
1356                 if ((read_zsreg(uap, R0) & Rx_CH_AV) != 0)
1357                         return read_zsdata(uap);
1358                 if (tries--)
1359                         udelay(5);
1360         }
1361 
1362         return NO_POLL_CHAR;
1363 }
1364 
1365 static void pmz_poll_put_char(struct uart_port *port, unsigned char c)
1366 {
1367         struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
1368 
1369         /* Wait for the transmit buffer to empty. */
1370         while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1371                 udelay(5);
1372         write_zsdata(uap, c);
1373 }
1374 
1375 #endif /* CONFIG_CONSOLE_POLL */
1376 
1377 static struct uart_ops pmz_pops = {
1378         .tx_empty       =       pmz_tx_empty,
1379         .set_mctrl      =       pmz_set_mctrl,
1380         .get_mctrl      =       pmz_get_mctrl,
1381         .stop_tx        =       pmz_stop_tx,
1382         .start_tx       =       pmz_start_tx,
1383         .stop_rx        =       pmz_stop_rx,
1384         .enable_ms      =       pmz_enable_ms,
1385         .break_ctl      =       pmz_break_ctl,
1386         .startup        =       pmz_startup,
1387         .shutdown       =       pmz_shutdown,
1388         .set_termios    =       pmz_set_termios,
1389         .type           =       pmz_type,
1390         .release_port   =       pmz_release_port,
1391         .request_port   =       pmz_request_port,
1392         .config_port    =       pmz_config_port,
1393         .verify_port    =       pmz_verify_port,
1394 #ifdef CONFIG_CONSOLE_POLL
1395         .poll_get_char  =       pmz_poll_get_char,
1396         .poll_put_char  =       pmz_poll_put_char,
1397 #endif
1398 };
1399 
1400 #ifdef CONFIG_PPC_PMAC
1401 
1402 /*
1403  * Setup one port structure after probing, HW is down at this point,
1404  * Unlike sunzilog, we don't need to pre-init the spinlock as we don't
1405  * register our console before uart_add_one_port() is called
1406  */
1407 static int __init pmz_init_port(struct uart_pmac_port *uap)
1408 {
1409         struct device_node *np = uap->node;
1410         const char *conn;
1411         const struct slot_names_prop {
1412                 int     count;
1413                 char    name[1];
1414         } *slots;
1415         int len;
1416         struct resource r_ports, r_rxdma, r_txdma;
1417 
1418         /*
1419          * Request & map chip registers
1420          */
1421         if (of_address_to_resource(np, 0, &r_ports))
1422                 return -ENODEV;
1423         uap->port.mapbase = r_ports.start;
1424         uap->port.membase = ioremap(uap->port.mapbase, 0x1000);
1425 
1426         uap->control_reg = uap->port.membase;
1427         uap->data_reg = uap->control_reg + 0x10;
1428         
1429         /*
1430          * Request & map DBDMA registers
1431          */
1432 #ifdef HAS_DBDMA
1433         if (of_address_to_resource(np, 1, &r_txdma) == 0 &&
1434             of_address_to_resource(np, 2, &r_rxdma) == 0)
1435                 uap->flags |= PMACZILOG_FLAG_HAS_DMA;
1436 #else
1437         memset(&r_txdma, 0, sizeof(struct resource));
1438         memset(&r_rxdma, 0, sizeof(struct resource));
1439 #endif  
1440         if (ZS_HAS_DMA(uap)) {
1441                 uap->tx_dma_regs = ioremap(r_txdma.start, 0x100);
1442                 if (uap->tx_dma_regs == NULL) { 
1443                         uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1444                         goto no_dma;
1445                 }
1446                 uap->rx_dma_regs = ioremap(r_rxdma.start, 0x100);
1447                 if (uap->rx_dma_regs == NULL) { 
1448                         iounmap(uap->tx_dma_regs);
1449                         uap->tx_dma_regs = NULL;
1450                         uap->flags &= ~PMACZILOG_FLAG_HAS_DMA;
1451                         goto no_dma;
1452                 }
1453                 uap->tx_dma_irq = irq_of_parse_and_map(np, 1);
1454                 uap->rx_dma_irq = irq_of_parse_and_map(np, 2);
1455         }
1456 no_dma:
1457 
1458         /*
1459          * Detect port type
1460          */
1461         if (of_device_is_compatible(np, "cobalt"))
1462                 uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1463         conn = of_get_property(np, "AAPL,connector", &len);
1464         if (conn && (strcmp(conn, "infrared") == 0))
1465                 uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1466         uap->port_type = PMAC_SCC_ASYNC;
1467         /* 1999 Powerbook G3 has slot-names property instead */
1468         slots = of_get_property(np, "slot-names", &len);
1469         if (slots && slots->count > 0) {
1470                 if (strcmp(slots->name, "IrDA") == 0)
1471                         uap->flags |= PMACZILOG_FLAG_IS_IRDA;
1472                 else if (strcmp(slots->name, "Modem") == 0)
1473                         uap->flags |= PMACZILOG_FLAG_IS_INTMODEM;
1474         }
1475         if (ZS_IS_IRDA(uap))
1476                 uap->port_type = PMAC_SCC_IRDA;
1477         if (ZS_IS_INTMODEM(uap)) {
1478                 struct device_node* i2c_modem =
1479                         of_find_node_by_name(NULL, "i2c-modem");
1480                 if (i2c_modem) {
1481                         const char* mid =
1482                                 of_get_property(i2c_modem, "modem-id", NULL);
1483                         if (mid) switch(*mid) {
1484                         case 0x04 :
1485                         case 0x05 :
1486                         case 0x07 :
1487                         case 0x08 :
1488                         case 0x0b :
1489                         case 0x0c :
1490                                 uap->port_type = PMAC_SCC_I2S1;
1491                         }
1492                         printk(KERN_INFO "pmac_zilog: i2c-modem detected, id: %d\n",
1493                                 mid ? (*mid) : 0);
1494                         of_node_put(i2c_modem);
1495                 } else {
1496                         printk(KERN_INFO "pmac_zilog: serial modem detected\n");
1497                 }
1498         }
1499 
1500         /*
1501          * Init remaining bits of "port" structure
1502          */
1503         uap->port.iotype = UPIO_MEM;
1504         uap->port.irq = irq_of_parse_and_map(np, 0);
1505         uap->port.uartclk = ZS_CLOCK;
1506         uap->port.fifosize = 1;
1507         uap->port.ops = &pmz_pops;
1508         uap->port.type = PORT_PMAC_ZILOG;
1509         uap->port.flags = 0;
1510 
1511         /*
1512          * Fixup for the port on Gatwick for which the device-tree has
1513          * missing interrupts. Normally, the macio_dev would contain
1514          * fixed up interrupt info, but we use the device-tree directly
1515          * here due to early probing so we need the fixup too.
1516          */
1517         if (uap->port.irq == 0 &&
1518             np->parent && np->parent->parent &&
1519             of_device_is_compatible(np->parent->parent, "gatwick")) {
1520                 /* IRQs on gatwick are offset by 64 */
1521                 uap->port.irq = irq_create_mapping(NULL, 64 + 15);
1522                 uap->tx_dma_irq = irq_create_mapping(NULL, 64 + 4);
1523                 uap->rx_dma_irq = irq_create_mapping(NULL, 64 + 5);
1524         }
1525 
1526         /* Setup some valid baud rate information in the register
1527          * shadows so we don't write crap there before baud rate is
1528          * first initialized.
1529          */
1530         pmz_convert_to_zs(uap, CS8, 0, 9600);
1531 
1532         return 0;
1533 }
1534 
1535 /*
1536  * Get rid of a port on module removal
1537  */
1538 static void pmz_dispose_port(struct uart_pmac_port *uap)
1539 {
1540         struct device_node *np;
1541 
1542         np = uap->node;
1543         iounmap(uap->rx_dma_regs);
1544         iounmap(uap->tx_dma_regs);
1545         iounmap(uap->control_reg);
1546         uap->node = NULL;
1547         of_node_put(np);
1548         memset(uap, 0, sizeof(struct uart_pmac_port));
1549 }
1550 
1551 /*
1552  * Called upon match with an escc node in the device-tree.
1553  */
1554 static int pmz_attach(struct macio_dev *mdev, const struct of_device_id *match)
1555 {
1556         struct uart_pmac_port *uap;
1557         int i;
1558         
1559         /* Iterate the pmz_ports array to find a matching entry
1560          */
1561         for (i = 0; i < MAX_ZS_PORTS; i++)
1562                 if (pmz_ports[i].node == mdev->ofdev.dev.of_node)
1563                         break;
1564         if (i >= MAX_ZS_PORTS)
1565                 return -ENODEV;
1566 
1567 
1568         uap = &pmz_ports[i];
1569         uap->dev = mdev;
1570         uap->port.dev = &mdev->ofdev.dev;
1571         dev_set_drvdata(&mdev->ofdev.dev, uap);
1572 
1573         /* We still activate the port even when failing to request resources
1574          * to work around bugs in ancient Apple device-trees
1575          */
1576         if (macio_request_resources(uap->dev, "pmac_zilog"))
1577                 printk(KERN_WARNING "%s: Failed to request resource"
1578                        ", port still active\n",
1579                        uap->node->name);
1580         else
1581                 uap->flags |= PMACZILOG_FLAG_RSRC_REQUESTED;
1582 
1583         return uart_add_one_port(&pmz_uart_reg, &uap->port);
1584 }
1585 
1586 /*
1587  * That one should not be called, macio isn't really a hotswap device,
1588  * we don't expect one of those serial ports to go away...
1589  */
1590 static int pmz_detach(struct macio_dev *mdev)
1591 {
1592         struct uart_pmac_port   *uap = dev_get_drvdata(&mdev->ofdev.dev);
1593         
1594         if (!uap)
1595                 return -ENODEV;
1596 
1597         uart_remove_one_port(&pmz_uart_reg, &uap->port);
1598 
1599         if (uap->flags & PMACZILOG_FLAG_RSRC_REQUESTED) {
1600                 macio_release_resources(uap->dev);
1601                 uap->flags &= ~PMACZILOG_FLAG_RSRC_REQUESTED;
1602         }
1603         dev_set_drvdata(&mdev->ofdev.dev, NULL);
1604         uap->dev = NULL;
1605         uap->port.dev = NULL;
1606         
1607         return 0;
1608 }
1609 
1610 
1611 static int pmz_suspend(struct macio_dev *mdev, pm_message_t pm_state)
1612 {
1613         struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1614 
1615         if (uap == NULL) {
1616                 printk("HRM... pmz_suspend with NULL uap\n");
1617                 return 0;
1618         }
1619 
1620         uart_suspend_port(&pmz_uart_reg, &uap->port);
1621 
1622         return 0;
1623 }
1624 
1625 
1626 static int pmz_resume(struct macio_dev *mdev)
1627 {
1628         struct uart_pmac_port *uap = dev_get_drvdata(&mdev->ofdev.dev);
1629 
1630         if (uap == NULL)
1631                 return 0;
1632 
1633         uart_resume_port(&pmz_uart_reg, &uap->port);
1634 
1635         return 0;
1636 }
1637 
1638 /*
1639  * Probe all ports in the system and build the ports array, we register
1640  * with the serial layer later, so we get a proper struct device which
1641  * allows the tty to attach properly. This is later than it used to be
1642  * but the tty layer really wants it that way.
1643  */
1644 static int __init pmz_probe(void)
1645 {
1646         struct device_node      *node_p, *node_a, *node_b, *np;
1647         int                     count = 0;
1648         int                     rc;
1649 
1650         /*
1651          * Find all escc chips in the system
1652          */
1653         node_p = of_find_node_by_name(NULL, "escc");
1654         while (node_p) {
1655                 /*
1656                  * First get channel A/B node pointers
1657                  * 
1658                  * TODO: Add routines with proper locking to do that...
1659                  */
1660                 node_a = node_b = NULL;
1661                 for (np = NULL; (np = of_get_next_child(node_p, np)) != NULL;) {
1662                         if (strncmp(np->name, "ch-a", 4) == 0)
1663                                 node_a = of_node_get(np);
1664                         else if (strncmp(np->name, "ch-b", 4) == 0)
1665                                 node_b = of_node_get(np);
1666                 }
1667                 if (!node_a && !node_b) {
1668                         of_node_put(node_a);
1669                         of_node_put(node_b);
1670                         printk(KERN_ERR "pmac_zilog: missing node %c for escc %s\n",
1671                                 (!node_a) ? 'a' : 'b', node_p->full_name);
1672                         goto next;
1673                 }
1674 
1675                 /*
1676                  * Fill basic fields in the port structures
1677                  */
1678                 if (node_b != NULL) {
1679                         pmz_ports[count].mate           = &pmz_ports[count+1];
1680                         pmz_ports[count+1].mate         = &pmz_ports[count];
1681                 }
1682                 pmz_ports[count].flags          = PMACZILOG_FLAG_IS_CHANNEL_A;
1683                 pmz_ports[count].node           = node_a;
1684                 pmz_ports[count+1].node         = node_b;
1685                 pmz_ports[count].port.line      = count;
1686                 pmz_ports[count+1].port.line    = count+1;
1687 
1688                 /*
1689                  * Setup the ports for real
1690                  */
1691                 rc = pmz_init_port(&pmz_ports[count]);
1692                 if (rc == 0 && node_b != NULL)
1693                         rc = pmz_init_port(&pmz_ports[count+1]);
1694                 if (rc != 0) {
1695                         of_node_put(node_a);
1696                         of_node_put(node_b);
1697                         memset(&pmz_ports[count], 0, sizeof(struct uart_pmac_port));
1698                         memset(&pmz_ports[count+1], 0, sizeof(struct uart_pmac_port));
1699                         goto next;
1700                 }
1701                 count += 2;
1702 next:
1703                 node_p = of_find_node_by_name(node_p, "escc");
1704         }
1705         pmz_ports_count = count;
1706 
1707         return 0;
1708 }
1709 
1710 #else
1711 
1712 extern struct platform_device scc_a_pdev, scc_b_pdev;
1713 
1714 static int __init pmz_init_port(struct uart_pmac_port *uap)
1715 {
1716         struct resource *r_ports;
1717         int irq;
1718 
1719         r_ports = platform_get_resource(uap->pdev, IORESOURCE_MEM, 0);
1720         irq = platform_get_irq(uap->pdev, 0);
1721         if (!r_ports || !irq)
1722                 return -ENODEV;
1723 
1724         uap->port.mapbase  = r_ports->start;
1725         uap->port.membase  = (unsigned char __iomem *) r_ports->start;
1726         uap->port.iotype   = UPIO_MEM;
1727         uap->port.irq      = irq;
1728         uap->port.uartclk  = ZS_CLOCK;
1729         uap->port.fifosize = 1;
1730         uap->port.ops      = &pmz_pops;
1731         uap->port.type     = PORT_PMAC_ZILOG;
1732         uap->port.flags    = 0;
1733 
1734         uap->control_reg   = uap->port.membase;
1735         uap->data_reg      = uap->control_reg + 4;
1736         uap->port_type     = 0;
1737 
1738         pmz_convert_to_zs(uap, CS8, 0, 9600);
1739 
1740         return 0;
1741 }
1742 
1743 static int __init pmz_probe(void)
1744 {
1745         int err;
1746 
1747         pmz_ports_count = 0;
1748 
1749         pmz_ports[0].port.line = 0;
1750         pmz_ports[0].flags     = PMACZILOG_FLAG_IS_CHANNEL_A;
1751         pmz_ports[0].pdev      = &scc_a_pdev;
1752         err = pmz_init_port(&pmz_ports[0]);
1753         if (err)
1754                 return err;
1755         pmz_ports_count++;
1756 
1757         pmz_ports[0].mate      = &pmz_ports[1];
1758         pmz_ports[1].mate      = &pmz_ports[0];
1759         pmz_ports[1].port.line = 1;
1760         pmz_ports[1].flags     = 0;
1761         pmz_ports[1].pdev      = &scc_b_pdev;
1762         err = pmz_init_port(&pmz_ports[1]);
1763         if (err)
1764                 return err;
1765         pmz_ports_count++;
1766 
1767         return 0;
1768 }
1769 
1770 static void pmz_dispose_port(struct uart_pmac_port *uap)
1771 {
1772         memset(uap, 0, sizeof(struct uart_pmac_port));
1773 }
1774 
1775 static int __init pmz_attach(struct platform_device *pdev)
1776 {
1777         struct uart_pmac_port *uap;
1778         int i;
1779 
1780         /* Iterate the pmz_ports array to find a matching entry */
1781         for (i = 0; i < pmz_ports_count; i++)
1782                 if (pmz_ports[i].pdev == pdev)
1783                         break;
1784         if (i >= pmz_ports_count)
1785                 return -ENODEV;
1786 
1787         uap = &pmz_ports[i];
1788         uap->port.dev = &pdev->dev;
1789         platform_set_drvdata(pdev, uap);
1790 
1791         return uart_add_one_port(&pmz_uart_reg, &uap->port);
1792 }
1793 
1794 static int __exit pmz_detach(struct platform_device *pdev)
1795 {
1796         struct uart_pmac_port *uap = platform_get_drvdata(pdev);
1797 
1798         if (!uap)
1799                 return -ENODEV;
1800 
1801         uart_remove_one_port(&pmz_uart_reg, &uap->port);
1802 
1803         uap->port.dev = NULL;
1804 
1805         return 0;
1806 }
1807 
1808 #endif /* !CONFIG_PPC_PMAC */
1809 
1810 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1811 
1812 static void pmz_console_write(struct console *con, const char *s, unsigned int count);
1813 static int __init pmz_console_setup(struct console *co, char *options);
1814 
1815 static struct console pmz_console = {
1816         .name   =       PMACZILOG_NAME,
1817         .write  =       pmz_console_write,
1818         .device =       uart_console_device,
1819         .setup  =       pmz_console_setup,
1820         .flags  =       CON_PRINTBUFFER,
1821         .index  =       -1,
1822         .data   =       &pmz_uart_reg,
1823 };
1824 
1825 #define PMACZILOG_CONSOLE       &pmz_console
1826 #else /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1827 #define PMACZILOG_CONSOLE       (NULL)
1828 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
1829 
1830 /*
1831  * Register the driver, console driver and ports with the serial
1832  * core
1833  */
1834 static int __init pmz_register(void)
1835 {
1836         pmz_uart_reg.nr = pmz_ports_count;
1837         pmz_uart_reg.cons = PMACZILOG_CONSOLE;
1838 
1839         /*
1840          * Register this driver with the serial core
1841          */
1842         return uart_register_driver(&pmz_uart_reg);
1843 }
1844 
1845 #ifdef CONFIG_PPC_PMAC
1846 
1847 static struct of_device_id pmz_match[] = 
1848 {
1849         {
1850         .name           = "ch-a",
1851         },
1852         {
1853         .name           = "ch-b",
1854         },
1855         {},
1856 };
1857 MODULE_DEVICE_TABLE (of, pmz_match);
1858 
1859 static struct macio_driver pmz_driver = {
1860         .driver = {
1861                 .name           = "pmac_zilog",
1862                 .owner          = THIS_MODULE,
1863                 .of_match_table = pmz_match,
1864         },
1865         .probe          = pmz_attach,
1866         .remove         = pmz_detach,
1867         .suspend        = pmz_suspend,
1868         .resume         = pmz_resume,
1869 };
1870 
1871 #else
1872 
1873 static struct platform_driver pmz_driver = {
1874         .remove         = __exit_p(pmz_detach),
1875         .driver         = {
1876                 .name           = "scc",
1877                 .owner          = THIS_MODULE,
1878         },
1879 };
1880 
1881 #endif /* !CONFIG_PPC_PMAC */
1882 
1883 static int __init init_pmz(void)
1884 {
1885         int rc, i;
1886         printk(KERN_INFO "%s\n", version);
1887 
1888         /* 
1889          * First, we need to do a direct OF-based probe pass. We
1890          * do that because we want serial console up before the
1891          * macio stuffs calls us back, and since that makes it
1892          * easier to pass the proper number of channels to
1893          * uart_register_driver()
1894          */
1895         if (pmz_ports_count == 0)
1896                 pmz_probe();
1897 
1898         /*
1899          * Bail early if no port found
1900          */
1901         if (pmz_ports_count == 0)
1902                 return -ENODEV;
1903 
1904         /*
1905          * Now we register with the serial layer
1906          */
1907         rc = pmz_register();
1908         if (rc) {
1909                 printk(KERN_ERR 
1910                         "pmac_zilog: Error registering serial device, disabling pmac_zilog.\n"
1911                         "pmac_zilog: Did another serial driver already claim the minors?\n"); 
1912                 /* effectively "pmz_unprobe()" */
1913                 for (i=0; i < pmz_ports_count; i++)
1914                         pmz_dispose_port(&pmz_ports[i]);
1915                 return rc;
1916         }
1917 
1918         /*
1919          * Then we register the macio driver itself
1920          */
1921 #ifdef CONFIG_PPC_PMAC
1922         return macio_register_driver(&pmz_driver);
1923 #else
1924         return platform_driver_probe(&pmz_driver, pmz_attach);
1925 #endif
1926 }
1927 
1928 static void __exit exit_pmz(void)
1929 {
1930         int i;
1931 
1932 #ifdef CONFIG_PPC_PMAC
1933         /* Get rid of macio-driver (detach from macio) */
1934         macio_unregister_driver(&pmz_driver);
1935 #else
1936         platform_driver_unregister(&pmz_driver);
1937 #endif
1938 
1939         for (i = 0; i < pmz_ports_count; i++) {
1940                 struct uart_pmac_port *uport = &pmz_ports[i];
1941 #ifdef CONFIG_PPC_PMAC
1942                 if (uport->node != NULL)
1943                         pmz_dispose_port(uport);
1944 #else
1945                 if (uport->pdev != NULL)
1946                         pmz_dispose_port(uport);
1947 #endif
1948         }
1949         /* Unregister UART driver */
1950         uart_unregister_driver(&pmz_uart_reg);
1951 }
1952 
1953 #ifdef CONFIG_SERIAL_PMACZILOG_CONSOLE
1954 
1955 static void pmz_console_putchar(struct uart_port *port, int ch)
1956 {
1957         struct uart_pmac_port *uap = (struct uart_pmac_port *)port;
1958 
1959         /* Wait for the transmit buffer to empty. */
1960         while ((read_zsreg(uap, R0) & Tx_BUF_EMP) == 0)
1961                 udelay(5);
1962         write_zsdata(uap, ch);
1963 }
1964 
1965 /*
1966  * Print a string to the serial port trying not to disturb
1967  * any possible real use of the port...
1968  */
1969 static void pmz_console_write(struct console *con, const char *s, unsigned int count)
1970 {
1971         struct uart_pmac_port *uap = &pmz_ports[con->index];
1972         unsigned long flags;
1973 
1974         spin_lock_irqsave(&uap->port.lock, flags);
1975 
1976         /* Turn of interrupts and enable the transmitter. */
1977         write_zsreg(uap, R1, uap->curregs[1] & ~TxINT_ENAB);
1978         write_zsreg(uap, R5, uap->curregs[5] | TxENABLE | RTS | DTR);
1979 
1980         uart_console_write(&uap->port, s, count, pmz_console_putchar);
1981 
1982         /* Restore the values in the registers. */
1983         write_zsreg(uap, R1, uap->curregs[1]);
1984         /* Don't disable the transmitter. */
1985 
1986         spin_unlock_irqrestore(&uap->port.lock, flags);
1987 }
1988 
1989 /*
1990  * Setup the serial console
1991  */
1992 static int __init pmz_console_setup(struct console *co, char *options)
1993 {
1994         struct uart_pmac_port *uap;
1995         struct uart_port *port;
1996         int baud = 38400;
1997         int bits = 8;
1998         int parity = 'n';
1999         int flow = 'n';
2000         unsigned long pwr_delay;
2001 
2002         /*
2003          * XServe's default to 57600 bps
2004          */
2005         if (of_machine_is_compatible("RackMac1,1")
2006             || of_machine_is_compatible("RackMac1,2")
2007             || of_machine_is_compatible("MacRISC4"))
2008                 baud = 57600;
2009 
2010         /*
2011          * Check whether an invalid uart number has been specified, and
2012          * if so, search for the first available port that does have
2013          * console support.
2014          */
2015         if (co->index >= pmz_ports_count)
2016                 co->index = 0;
2017         uap = &pmz_ports[co->index];
2018 #ifdef CONFIG_PPC_PMAC
2019         if (uap->node == NULL)
2020                 return -ENODEV;
2021 #else
2022         if (uap->pdev == NULL)
2023                 return -ENODEV;
2024 #endif
2025         port = &uap->port;
2026 
2027         /*
2028          * Mark port as beeing a console
2029          */
2030         uap->flags |= PMACZILOG_FLAG_IS_CONS;
2031 
2032         /*
2033          * Temporary fix for uart layer who didn't setup the spinlock yet
2034          */
2035         spin_lock_init(&port->lock);
2036 
2037         /*
2038          * Enable the hardware
2039          */
2040         pwr_delay = __pmz_startup(uap);
2041         if (pwr_delay)
2042                 mdelay(pwr_delay);
2043         
2044         if (options)
2045                 uart_parse_options(options, &baud, &parity, &bits, &flow);
2046 
2047         return uart_set_options(port, co, baud, parity, bits, flow);
2048 }
2049 
2050 static int __init pmz_console_init(void)
2051 {
2052         /* Probe ports */
2053         pmz_probe();
2054 
2055         if (pmz_ports_count == 0)
2056                 return -ENODEV;
2057 
2058         /* TODO: Autoprobe console based on OF */
2059         /* pmz_console.index = i; */
2060         register_console(&pmz_console);
2061 
2062         return 0;
2063 
2064 }
2065 console_initcall(pmz_console_init);
2066 #endif /* CONFIG_SERIAL_PMACZILOG_CONSOLE */
2067 
2068 module_init(init_pmz);
2069 module_exit(exit_pmz);
2070 

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