Version:  2.0.40 2.2.26 2.4.37 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18

Linux/drivers/tty/serial/cpm_uart/cpm_uart_core.c

  1 /*
  2  *  Driver for CPM (SCC/SMC) serial ports; core driver
  3  *
  4  *  Based on arch/ppc/cpm2_io/uart.c by Dan Malek
  5  *  Based on ppc8xx.c by Thomas Gleixner
  6  *  Based on drivers/serial/amba.c by Russell King
  7  *
  8  *  Maintainer: Kumar Gala (galak@kernel.crashing.org) (CPM2)
  9  *              Pantelis Antoniou (panto@intracom.gr) (CPM1)
 10  *
 11  *  Copyright (C) 2004, 2007 Freescale Semiconductor, Inc.
 12  *            (C) 2004 Intracom, S.A.
 13  *            (C) 2005-2006 MontaVista Software, Inc.
 14  *              Vitaly Bordug <vbordug@ru.mvista.com>
 15  *
 16  * This program is free software; you can redistribute it and/or modify
 17  * it under the terms of the GNU General Public License as published by
 18  * the Free Software Foundation; either version 2 of the License, or
 19  * (at your option) any later version.
 20  *
 21  * This program is distributed in the hope that it will be useful,
 22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 24  * GNU General Public License for more details.
 25  *
 26  * You should have received a copy of the GNU General Public License
 27  * along with this program; if not, write to the Free Software
 28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 29  *
 30  */
 31 
 32 #include <linux/module.h>
 33 #include <linux/tty.h>
 34 #include <linux/tty_flip.h>
 35 #include <linux/ioport.h>
 36 #include <linux/init.h>
 37 #include <linux/serial.h>
 38 #include <linux/console.h>
 39 #include <linux/sysrq.h>
 40 #include <linux/device.h>
 41 #include <linux/bootmem.h>
 42 #include <linux/dma-mapping.h>
 43 #include <linux/fs_uart_pd.h>
 44 #include <linux/of_address.h>
 45 #include <linux/of_irq.h>
 46 #include <linux/of_platform.h>
 47 #include <linux/gpio.h>
 48 #include <linux/of_gpio.h>
 49 #include <linux/clk.h>
 50 
 51 #include <asm/io.h>
 52 #include <asm/irq.h>
 53 #include <asm/delay.h>
 54 #include <asm/fs_pd.h>
 55 #include <asm/udbg.h>
 56 
 57 #if defined(CONFIG_SERIAL_CPM_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 58 #define SUPPORT_SYSRQ
 59 #endif
 60 
 61 #include <linux/serial_core.h>
 62 #include <linux/kernel.h>
 63 
 64 #include "cpm_uart.h"
 65 
 66 
 67 /**************************************************************/
 68 
 69 static int  cpm_uart_tx_pump(struct uart_port *port);
 70 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo);
 71 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo);
 72 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
 73 
 74 /**************************************************************/
 75 
 76 #define HW_BUF_SPD_THRESHOLD    2400
 77 
 78 /*
 79  * Check, if transmit buffers are processed
 80 */
 81 static unsigned int cpm_uart_tx_empty(struct uart_port *port)
 82 {
 83         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
 84         cbd_t __iomem *bdp = pinfo->tx_bd_base;
 85         int ret = 0;
 86 
 87         while (1) {
 88                 if (in_be16(&bdp->cbd_sc) & BD_SC_READY)
 89                         break;
 90 
 91                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP) {
 92                         ret = TIOCSER_TEMT;
 93                         break;
 94                 }
 95                 bdp++;
 96         }
 97 
 98         pr_debug("CPM uart[%d]:tx_empty: %d\n", port->line, ret);
 99 
100         return ret;
101 }
102 
103 static void cpm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
104 {
105         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
106 
107         if (pinfo->gpios[GPIO_RTS] >= 0)
108                 gpio_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
109 
110         if (pinfo->gpios[GPIO_DTR] >= 0)
111                 gpio_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
112 }
113 
114 static unsigned int cpm_uart_get_mctrl(struct uart_port *port)
115 {
116         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
117         unsigned int mctrl = TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
118 
119         if (pinfo->gpios[GPIO_CTS] >= 0) {
120                 if (gpio_get_value(pinfo->gpios[GPIO_CTS]))
121                         mctrl &= ~TIOCM_CTS;
122         }
123 
124         if (pinfo->gpios[GPIO_DSR] >= 0) {
125                 if (gpio_get_value(pinfo->gpios[GPIO_DSR]))
126                         mctrl &= ~TIOCM_DSR;
127         }
128 
129         if (pinfo->gpios[GPIO_DCD] >= 0) {
130                 if (gpio_get_value(pinfo->gpios[GPIO_DCD]))
131                         mctrl &= ~TIOCM_CAR;
132         }
133 
134         if (pinfo->gpios[GPIO_RI] >= 0) {
135                 if (!gpio_get_value(pinfo->gpios[GPIO_RI]))
136                         mctrl |= TIOCM_RNG;
137         }
138 
139         return mctrl;
140 }
141 
142 /*
143  * Stop transmitter
144  */
145 static void cpm_uart_stop_tx(struct uart_port *port)
146 {
147         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
148         smc_t __iomem *smcp = pinfo->smcp;
149         scc_t __iomem *sccp = pinfo->sccp;
150 
151         pr_debug("CPM uart[%d]:stop tx\n", port->line);
152 
153         if (IS_SMC(pinfo))
154                 clrbits8(&smcp->smc_smcm, SMCM_TX);
155         else
156                 clrbits16(&sccp->scc_sccm, UART_SCCM_TX);
157 }
158 
159 /*
160  * Start transmitter
161  */
162 static void cpm_uart_start_tx(struct uart_port *port)
163 {
164         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
165         smc_t __iomem *smcp = pinfo->smcp;
166         scc_t __iomem *sccp = pinfo->sccp;
167 
168         pr_debug("CPM uart[%d]:start tx\n", port->line);
169 
170         if (IS_SMC(pinfo)) {
171                 if (in_8(&smcp->smc_smcm) & SMCM_TX)
172                         return;
173         } else {
174                 if (in_be16(&sccp->scc_sccm) & UART_SCCM_TX)
175                         return;
176         }
177 
178         if (cpm_uart_tx_pump(port) != 0) {
179                 if (IS_SMC(pinfo)) {
180                         setbits8(&smcp->smc_smcm, SMCM_TX);
181                 } else {
182                         setbits16(&sccp->scc_sccm, UART_SCCM_TX);
183                 }
184         }
185 }
186 
187 /*
188  * Stop receiver
189  */
190 static void cpm_uart_stop_rx(struct uart_port *port)
191 {
192         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
193         smc_t __iomem *smcp = pinfo->smcp;
194         scc_t __iomem *sccp = pinfo->sccp;
195 
196         pr_debug("CPM uart[%d]:stop rx\n", port->line);
197 
198         if (IS_SMC(pinfo))
199                 clrbits8(&smcp->smc_smcm, SMCM_RX);
200         else
201                 clrbits16(&sccp->scc_sccm, UART_SCCM_RX);
202 }
203 
204 /*
205  * Generate a break.
206  */
207 static void cpm_uart_break_ctl(struct uart_port *port, int break_state)
208 {
209         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
210 
211         pr_debug("CPM uart[%d]:break ctrl, break_state: %d\n", port->line,
212                 break_state);
213 
214         if (break_state)
215                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
216         else
217                 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
218 }
219 
220 /*
221  * Transmit characters, refill buffer descriptor, if possible
222  */
223 static void cpm_uart_int_tx(struct uart_port *port)
224 {
225         pr_debug("CPM uart[%d]:TX INT\n", port->line);
226 
227         cpm_uart_tx_pump(port);
228 }
229 
230 #ifdef CONFIG_CONSOLE_POLL
231 static int serial_polled;
232 #endif
233 
234 /*
235  * Receive characters
236  */
237 static void cpm_uart_int_rx(struct uart_port *port)
238 {
239         int i;
240         unsigned char ch;
241         u8 *cp;
242         struct tty_port *tport = &port->state->port;
243         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
244         cbd_t __iomem *bdp;
245         u16 status;
246         unsigned int flg;
247 
248         pr_debug("CPM uart[%d]:RX INT\n", port->line);
249 
250         /* Just loop through the closed BDs and copy the characters into
251          * the buffer.
252          */
253         bdp = pinfo->rx_cur;
254         for (;;) {
255 #ifdef CONFIG_CONSOLE_POLL
256                 if (unlikely(serial_polled)) {
257                         serial_polled = 0;
258                         return;
259                 }
260 #endif
261                 /* get status */
262                 status = in_be16(&bdp->cbd_sc);
263                 /* If this one is empty, return happy */
264                 if (status & BD_SC_EMPTY)
265                         break;
266 
267                 /* get number of characters, and check spce in flip-buffer */
268                 i = in_be16(&bdp->cbd_datlen);
269 
270                 /* If we have not enough room in tty flip buffer, then we try
271                  * later, which will be the next rx-interrupt or a timeout
272                  */
273                 if (tty_buffer_request_room(tport, i) < i) {
274                         printk(KERN_WARNING "No room in flip buffer\n");
275                         return;
276                 }
277 
278                 /* get pointer */
279                 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
280 
281                 /* loop through the buffer */
282                 while (i-- > 0) {
283                         ch = *cp++;
284                         port->icount.rx++;
285                         flg = TTY_NORMAL;
286 
287                         if (status &
288                             (BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV))
289                                 goto handle_error;
290                         if (uart_handle_sysrq_char(port, ch))
291                                 continue;
292 #ifdef CONFIG_CONSOLE_POLL
293                         if (unlikely(serial_polled)) {
294                                 serial_polled = 0;
295                                 return;
296                         }
297 #endif
298                       error_return:
299                         tty_insert_flip_char(tport, ch, flg);
300 
301                 }               /* End while (i--) */
302 
303                 /* This BD is ready to be used again. Clear status. get next */
304                 clrbits16(&bdp->cbd_sc, BD_SC_BR | BD_SC_FR | BD_SC_PR |
305                                         BD_SC_OV | BD_SC_ID);
306                 setbits16(&bdp->cbd_sc, BD_SC_EMPTY);
307 
308                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
309                         bdp = pinfo->rx_bd_base;
310                 else
311                         bdp++;
312 
313         } /* End for (;;) */
314 
315         /* Write back buffer pointer */
316         pinfo->rx_cur = bdp;
317 
318         /* activate BH processing */
319         tty_flip_buffer_push(tport);
320 
321         return;
322 
323         /* Error processing */
324 
325       handle_error:
326         /* Statistics */
327         if (status & BD_SC_BR)
328                 port->icount.brk++;
329         if (status & BD_SC_PR)
330                 port->icount.parity++;
331         if (status & BD_SC_FR)
332                 port->icount.frame++;
333         if (status & BD_SC_OV)
334                 port->icount.overrun++;
335 
336         /* Mask out ignored conditions */
337         status &= port->read_status_mask;
338 
339         /* Handle the remaining ones */
340         if (status & BD_SC_BR)
341                 flg = TTY_BREAK;
342         else if (status & BD_SC_PR)
343                 flg = TTY_PARITY;
344         else if (status & BD_SC_FR)
345                 flg = TTY_FRAME;
346 
347         /* overrun does not affect the current character ! */
348         if (status & BD_SC_OV) {
349                 ch = 0;
350                 flg = TTY_OVERRUN;
351                 /* We skip this buffer */
352                 /* CHECK: Is really nothing senseful there */
353                 /* ASSUMPTION: it contains nothing valid */
354                 i = 0;
355         }
356 #ifdef SUPPORT_SYSRQ
357         port->sysrq = 0;
358 #endif
359         goto error_return;
360 }
361 
362 /*
363  * Asynchron mode interrupt handler
364  */
365 static irqreturn_t cpm_uart_int(int irq, void *data)
366 {
367         u8 events;
368         struct uart_port *port = data;
369         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
370         smc_t __iomem *smcp = pinfo->smcp;
371         scc_t __iomem *sccp = pinfo->sccp;
372 
373         pr_debug("CPM uart[%d]:IRQ\n", port->line);
374 
375         if (IS_SMC(pinfo)) {
376                 events = in_8(&smcp->smc_smce);
377                 out_8(&smcp->smc_smce, events);
378                 if (events & SMCM_BRKE)
379                         uart_handle_break(port);
380                 if (events & SMCM_RX)
381                         cpm_uart_int_rx(port);
382                 if (events & SMCM_TX)
383                         cpm_uart_int_tx(port);
384         } else {
385                 events = in_be16(&sccp->scc_scce);
386                 out_be16(&sccp->scc_scce, events);
387                 if (events & UART_SCCM_BRKE)
388                         uart_handle_break(port);
389                 if (events & UART_SCCM_RX)
390                         cpm_uart_int_rx(port);
391                 if (events & UART_SCCM_TX)
392                         cpm_uart_int_tx(port);
393         }
394         return (events) ? IRQ_HANDLED : IRQ_NONE;
395 }
396 
397 static int cpm_uart_startup(struct uart_port *port)
398 {
399         int retval;
400         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
401 
402         pr_debug("CPM uart[%d]:startup\n", port->line);
403 
404         /* If the port is not the console, make sure rx is disabled. */
405         if (!(pinfo->flags & FLAG_CONSOLE)) {
406                 /* Disable UART rx */
407                 if (IS_SMC(pinfo)) {
408                         clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
409                         clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
410                 } else {
411                         clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
412                         clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
413                 }
414                 cpm_uart_initbd(pinfo);
415                 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
416         }
417         /* Install interrupt handler. */
418         retval = request_irq(port->irq, cpm_uart_int, 0, "cpm_uart", port);
419         if (retval)
420                 return retval;
421 
422         /* Startup rx-int */
423         if (IS_SMC(pinfo)) {
424                 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
425                 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
426         } else {
427                 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
428                 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
429         }
430 
431         return 0;
432 }
433 
434 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
435 {
436         set_current_state(TASK_UNINTERRUPTIBLE);
437         schedule_timeout(pinfo->wait_closing);
438 }
439 
440 /*
441  * Shutdown the uart
442  */
443 static void cpm_uart_shutdown(struct uart_port *port)
444 {
445         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
446 
447         pr_debug("CPM uart[%d]:shutdown\n", port->line);
448 
449         /* free interrupt handler */
450         free_irq(port->irq, port);
451 
452         /* If the port is not the console, disable Rx and Tx. */
453         if (!(pinfo->flags & FLAG_CONSOLE)) {
454                 /* Wait for all the BDs marked sent */
455                 while(!cpm_uart_tx_empty(port)) {
456                         set_current_state(TASK_UNINTERRUPTIBLE);
457                         schedule_timeout(2);
458                 }
459 
460                 if (pinfo->wait_closing)
461                         cpm_uart_wait_until_send(pinfo);
462 
463                 /* Stop uarts */
464                 if (IS_SMC(pinfo)) {
465                         smc_t __iomem *smcp = pinfo->smcp;
466                         clrbits16(&smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
467                         clrbits8(&smcp->smc_smcm, SMCM_RX | SMCM_TX);
468                 } else {
469                         scc_t __iomem *sccp = pinfo->sccp;
470                         clrbits32(&sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
471                         clrbits16(&sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
472                 }
473 
474                 /* Shut them really down and reinit buffer descriptors */
475                 if (IS_SMC(pinfo)) {
476                         out_be16(&pinfo->smcup->smc_brkcr, 0);
477                         cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
478                 } else {
479                         out_be16(&pinfo->sccup->scc_brkcr, 0);
480                         cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
481                 }
482 
483                 cpm_uart_initbd(pinfo);
484         }
485 }
486 
487 static void cpm_uart_set_termios(struct uart_port *port,
488                                  struct ktermios *termios,
489                                  struct ktermios *old)
490 {
491         int baud;
492         unsigned long flags;
493         u16 cval, scval, prev_mode;
494         int bits, sbits;
495         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
496         smc_t __iomem *smcp = pinfo->smcp;
497         scc_t __iomem *sccp = pinfo->sccp;
498         int maxidl;
499 
500         pr_debug("CPM uart[%d]:set_termios\n", port->line);
501 
502         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
503         if (baud < HW_BUF_SPD_THRESHOLD ||
504             (pinfo->port.state && pinfo->port.state->port.low_latency))
505                 pinfo->rx_fifosize = 1;
506         else
507                 pinfo->rx_fifosize = RX_BUF_SIZE;
508 
509         /* MAXIDL is the timeout after which a receive buffer is closed
510          * when not full if no more characters are received.
511          * We calculate it from the baudrate so that the duration is
512          * always the same at standard rates: about 4ms.
513          */
514         maxidl = baud / 2400;
515         if (maxidl < 1)
516                 maxidl = 1;
517         if (maxidl > 0x10)
518                 maxidl = 0x10;
519 
520         /* Character length programmed into the mode register is the
521          * sum of: 1 start bit, number of data bits, 0 or 1 parity bit,
522          * 1 or 2 stop bits, minus 1.
523          * The value 'bits' counts this for us.
524          */
525         cval = 0;
526         scval = 0;
527 
528         /* byte size */
529         switch (termios->c_cflag & CSIZE) {
530         case CS5:
531                 bits = 5;
532                 break;
533         case CS6:
534                 bits = 6;
535                 break;
536         case CS7:
537                 bits = 7;
538                 break;
539         case CS8:
540                 bits = 8;
541                 break;
542                 /* Never happens, but GCC is too dumb to figure it out */
543         default:
544                 bits = 8;
545                 break;
546         }
547         sbits = bits - 5;
548 
549         if (termios->c_cflag & CSTOPB) {
550                 cval |= SMCMR_SL;       /* Two stops */
551                 scval |= SCU_PSMR_SL;
552                 bits++;
553         }
554 
555         if (termios->c_cflag & PARENB) {
556                 cval |= SMCMR_PEN;
557                 scval |= SCU_PSMR_PEN;
558                 bits++;
559                 if (!(termios->c_cflag & PARODD)) {
560                         cval |= SMCMR_PM_EVEN;
561                         scval |= (SCU_PSMR_REVP | SCU_PSMR_TEVP);
562                 }
563         }
564 
565         /*
566          * Update the timeout
567          */
568         uart_update_timeout(port, termios->c_cflag, baud);
569 
570         /*
571          * Set up parity check flag
572          */
573 #define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
574 
575         port->read_status_mask = (BD_SC_EMPTY | BD_SC_OV);
576         if (termios->c_iflag & INPCK)
577                 port->read_status_mask |= BD_SC_FR | BD_SC_PR;
578         if ((termios->c_iflag & BRKINT) || (termios->c_iflag & PARMRK))
579                 port->read_status_mask |= BD_SC_BR;
580 
581         /*
582          * Characters to ignore
583          */
584         port->ignore_status_mask = 0;
585         if (termios->c_iflag & IGNPAR)
586                 port->ignore_status_mask |= BD_SC_PR | BD_SC_FR;
587         if (termios->c_iflag & IGNBRK) {
588                 port->ignore_status_mask |= BD_SC_BR;
589                 /*
590                  * If we're ignore parity and break indicators, ignore
591                  * overruns too.  (For real raw support).
592                  */
593                 if (termios->c_iflag & IGNPAR)
594                         port->ignore_status_mask |= BD_SC_OV;
595         }
596         /*
597          * !!! ignore all characters if CREAD is not set
598          */
599         if ((termios->c_cflag & CREAD) == 0)
600                 port->read_status_mask &= ~BD_SC_EMPTY;
601 
602         spin_lock_irqsave(&port->lock, flags);
603 
604         /* Start bit has not been added (so don't, because we would just
605          * subtract it later), and we need to add one for the number of
606          * stops bits (there is always at least one).
607          */
608         bits++;
609         if (IS_SMC(pinfo)) {
610                 /*
611                  * MRBLR can be changed while an SMC/SCC is operating only
612                  * if it is done in a single bus cycle with one 16-bit move
613                  * (not two 8-bit bus cycles back-to-back). This occurs when
614                  * the cp shifts control to the next RxBD, so the change does
615                  * not take effect immediately. To guarantee the exact RxBD
616                  * on which the change occurs, change MRBLR only while the
617                  * SMC/SCC receiver is disabled.
618                  */
619                 out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
620                 out_be16(&pinfo->smcup->smc_maxidl, maxidl);
621 
622                 /* Set the mode register.  We want to keep a copy of the
623                  * enables, because we want to put them back if they were
624                  * present.
625                  */
626                 prev_mode = in_be16(&smcp->smc_smcmr) & (SMCMR_REN | SMCMR_TEN);
627                 /* Output in *one* operation, so we don't interrupt RX/TX if they
628                  * were already enabled. */
629                 out_be16(&smcp->smc_smcmr, smcr_mk_clen(bits) | cval |
630                     SMCMR_SM_UART | prev_mode);
631         } else {
632                 out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
633                 out_be16(&pinfo->sccup->scc_maxidl, maxidl);
634                 out_be16(&sccp->scc_psmr, (sbits << 12) | scval);
635         }
636 
637         if (pinfo->clk)
638                 clk_set_rate(pinfo->clk, baud);
639         else
640                 cpm_set_brg(pinfo->brg - 1, baud);
641         spin_unlock_irqrestore(&port->lock, flags);
642 }
643 
644 static const char *cpm_uart_type(struct uart_port *port)
645 {
646         pr_debug("CPM uart[%d]:uart_type\n", port->line);
647 
648         return port->type == PORT_CPM ? "CPM UART" : NULL;
649 }
650 
651 /*
652  * verify the new serial_struct (for TIOCSSERIAL).
653  */
654 static int cpm_uart_verify_port(struct uart_port *port,
655                                 struct serial_struct *ser)
656 {
657         int ret = 0;
658 
659         pr_debug("CPM uart[%d]:verify_port\n", port->line);
660 
661         if (ser->type != PORT_UNKNOWN && ser->type != PORT_CPM)
662                 ret = -EINVAL;
663         if (ser->irq < 0 || ser->irq >= nr_irqs)
664                 ret = -EINVAL;
665         if (ser->baud_base < 9600)
666                 ret = -EINVAL;
667         return ret;
668 }
669 
670 /*
671  * Transmit characters, refill buffer descriptor, if possible
672  */
673 static int cpm_uart_tx_pump(struct uart_port *port)
674 {
675         cbd_t __iomem *bdp;
676         u8 *p;
677         int count;
678         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
679         struct circ_buf *xmit = &port->state->xmit;
680 
681         /* Handle xon/xoff */
682         if (port->x_char) {
683                 /* Pick next descriptor and fill from buffer */
684                 bdp = pinfo->tx_cur;
685 
686                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
687 
688                 *p++ = port->x_char;
689 
690                 out_be16(&bdp->cbd_datlen, 1);
691                 setbits16(&bdp->cbd_sc, BD_SC_READY);
692                 /* Get next BD. */
693                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
694                         bdp = pinfo->tx_bd_base;
695                 else
696                         bdp++;
697                 pinfo->tx_cur = bdp;
698 
699                 port->icount.tx++;
700                 port->x_char = 0;
701                 return 1;
702         }
703 
704         if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
705                 cpm_uart_stop_tx(port);
706                 return 0;
707         }
708 
709         /* Pick next descriptor and fill from buffer */
710         bdp = pinfo->tx_cur;
711 
712         while (!(in_be16(&bdp->cbd_sc) & BD_SC_READY) &&
713                xmit->tail != xmit->head) {
714                 count = 0;
715                 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
716                 while (count < pinfo->tx_fifosize) {
717                         *p++ = xmit->buf[xmit->tail];
718                         xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
719                         port->icount.tx++;
720                         count++;
721                         if (xmit->head == xmit->tail)
722                                 break;
723                 }
724                 out_be16(&bdp->cbd_datlen, count);
725                 setbits16(&bdp->cbd_sc, BD_SC_READY);
726                 /* Get next BD. */
727                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
728                         bdp = pinfo->tx_bd_base;
729                 else
730                         bdp++;
731         }
732         pinfo->tx_cur = bdp;
733 
734         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
735                 uart_write_wakeup(port);
736 
737         if (uart_circ_empty(xmit)) {
738                 cpm_uart_stop_tx(port);
739                 return 0;
740         }
741 
742         return 1;
743 }
744 
745 /*
746  * init buffer descriptors
747  */
748 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
749 {
750         int i;
751         u8 *mem_addr;
752         cbd_t __iomem *bdp;
753 
754         pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
755 
756         /* Set the physical address of the host memory
757          * buffers in the buffer descriptors, and the
758          * virtual address for us to work with.
759          */
760         mem_addr = pinfo->mem_addr;
761         bdp = pinfo->rx_cur = pinfo->rx_bd_base;
762         for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
763                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
764                 out_be16(&bdp->cbd_sc, BD_SC_EMPTY | BD_SC_INTRPT);
765                 mem_addr += pinfo->rx_fifosize;
766         }
767 
768         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
769         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_EMPTY | BD_SC_INTRPT);
770 
771         /* Set the physical address of the host memory
772          * buffers in the buffer descriptors, and the
773          * virtual address for us to work with.
774          */
775         mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
776         bdp = pinfo->tx_cur = pinfo->tx_bd_base;
777         for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
778                 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
779                 out_be16(&bdp->cbd_sc, BD_SC_INTRPT);
780                 mem_addr += pinfo->tx_fifosize;
781         }
782 
783         out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
784         out_be16(&bdp->cbd_sc, BD_SC_WRAP | BD_SC_INTRPT);
785 }
786 
787 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
788 {
789         scc_t __iomem *scp;
790         scc_uart_t __iomem *sup;
791 
792         pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
793 
794         scp = pinfo->sccp;
795         sup = pinfo->sccup;
796 
797         /* Store address */
798         out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
799                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
800         out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
801                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
802 
803         /* Set up the uart parameters in the
804          * parameter ram.
805          */
806 
807         cpm_set_scc_fcr(sup);
808 
809         out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
810         out_be16(&sup->scc_maxidl, 0x10);
811         out_be16(&sup->scc_brkcr, 1);
812         out_be16(&sup->scc_parec, 0);
813         out_be16(&sup->scc_frmec, 0);
814         out_be16(&sup->scc_nosec, 0);
815         out_be16(&sup->scc_brkec, 0);
816         out_be16(&sup->scc_uaddr1, 0);
817         out_be16(&sup->scc_uaddr2, 0);
818         out_be16(&sup->scc_toseq, 0);
819         out_be16(&sup->scc_char1, 0x8000);
820         out_be16(&sup->scc_char2, 0x8000);
821         out_be16(&sup->scc_char3, 0x8000);
822         out_be16(&sup->scc_char4, 0x8000);
823         out_be16(&sup->scc_char5, 0x8000);
824         out_be16(&sup->scc_char6, 0x8000);
825         out_be16(&sup->scc_char7, 0x8000);
826         out_be16(&sup->scc_char8, 0x8000);
827         out_be16(&sup->scc_rccm, 0xc0ff);
828 
829         /* Send the CPM an initialize command.
830          */
831         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
832 
833         /* Set UART mode, 8 bit, no parity, one stop.
834          * Enable receive and transmit.
835          */
836         out_be32(&scp->scc_gsmrh, 0);
837         out_be32(&scp->scc_gsmrl,
838                  SCC_GSMRL_MODE_UART | SCC_GSMRL_TDCR_16 | SCC_GSMRL_RDCR_16);
839 
840         /* Enable rx interrupts  and clear all pending events.  */
841         out_be16(&scp->scc_sccm, 0);
842         out_be16(&scp->scc_scce, 0xffff);
843         out_be16(&scp->scc_dsr, 0x7e7e);
844         out_be16(&scp->scc_psmr, 0x3000);
845 
846         setbits32(&scp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
847 }
848 
849 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
850 {
851         smc_t __iomem *sp;
852         smc_uart_t __iomem *up;
853 
854         pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
855 
856         sp = pinfo->smcp;
857         up = pinfo->smcup;
858 
859         /* Store address */
860         out_be16(&pinfo->smcup->smc_rbase,
861                  (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
862         out_be16(&pinfo->smcup->smc_tbase,
863                  (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
864 
865 /*
866  *  In case SMC1 is being relocated...
867  */
868 #if defined (CONFIG_I2C_SPI_SMC1_UCODE_PATCH)
869         out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
870         out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
871         out_be32(&up->smc_rstate, 0);
872         out_be32(&up->smc_tstate, 0);
873         out_be16(&up->smc_brkcr, 1);              /* number of break chars */
874         out_be16(&up->smc_brkec, 0);
875 #endif
876 
877         /* Set up the uart parameters in the
878          * parameter ram.
879          */
880         cpm_set_smc_fcr(up);
881 
882         /* Using idle character time requires some additional tuning.  */
883         out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
884         out_be16(&up->smc_maxidl, 0x10);
885         out_be16(&up->smc_brklen, 0);
886         out_be16(&up->smc_brkec, 0);
887         out_be16(&up->smc_brkcr, 1);
888 
889         cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
890 
891         /* Set UART mode, 8 bit, no parity, one stop.
892          * Enable receive and transmit.
893          */
894         out_be16(&sp->smc_smcmr, smcr_mk_clen(9) | SMCMR_SM_UART);
895 
896         /* Enable only rx interrupts clear all pending events. */
897         out_8(&sp->smc_smcm, 0);
898         out_8(&sp->smc_smce, 0xff);
899 
900         setbits16(&sp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
901 }
902 
903 /*
904  * Initialize port. This is called from early_console stuff
905  * so we have to be careful here !
906  */
907 static int cpm_uart_request_port(struct uart_port *port)
908 {
909         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
910         int ret;
911 
912         pr_debug("CPM uart[%d]:request port\n", port->line);
913 
914         if (pinfo->flags & FLAG_CONSOLE)
915                 return 0;
916 
917         if (IS_SMC(pinfo)) {
918                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
919                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
920         } else {
921                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
922                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
923         }
924 
925         ret = cpm_uart_allocbuf(pinfo, 0);
926 
927         if (ret)
928                 return ret;
929 
930         cpm_uart_initbd(pinfo);
931         if (IS_SMC(pinfo))
932                 cpm_uart_init_smc(pinfo);
933         else
934                 cpm_uart_init_scc(pinfo);
935 
936         return 0;
937 }
938 
939 static void cpm_uart_release_port(struct uart_port *port)
940 {
941         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
942 
943         if (!(pinfo->flags & FLAG_CONSOLE))
944                 cpm_uart_freebuf(pinfo);
945 }
946 
947 /*
948  * Configure/autoconfigure the port.
949  */
950 static void cpm_uart_config_port(struct uart_port *port, int flags)
951 {
952         pr_debug("CPM uart[%d]:config_port\n", port->line);
953 
954         if (flags & UART_CONFIG_TYPE) {
955                 port->type = PORT_CPM;
956                 cpm_uart_request_port(port);
957         }
958 }
959 
960 #if defined(CONFIG_CONSOLE_POLL) || defined(CONFIG_SERIAL_CPM_CONSOLE)
961 /*
962  * Write a string to the serial port
963  * Note that this is called with interrupts already disabled
964  */
965 static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
966                 const char *string, u_int count, bool handle_linefeed)
967 {
968         unsigned int i;
969         cbd_t __iomem *bdp, *bdbase;
970         unsigned char *cpm_outp_addr;
971 
972         /* Get the address of the host memory buffer.
973          */
974         bdp = pinfo->tx_cur;
975         bdbase = pinfo->tx_bd_base;
976 
977         /*
978          * Now, do each character.  This is not as bad as it looks
979          * since this is a holding FIFO and not a transmitting FIFO.
980          * We could add the complexity of filling the entire transmit
981          * buffer, but we would just wait longer between accesses......
982          */
983         for (i = 0; i < count; i++, string++) {
984                 /* Wait for transmitter fifo to empty.
985                  * Ready indicates output is ready, and xmt is doing
986                  * that, not that it is ready for us to send.
987                  */
988                 while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
989                         ;
990 
991                 /* Send the character out.
992                  * If the buffer address is in the CPM DPRAM, don't
993                  * convert it.
994                  */
995                 cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
996                                         pinfo);
997                 *cpm_outp_addr = *string;
998 
999                 out_be16(&bdp->cbd_datlen, 1);
1000                 setbits16(&bdp->cbd_sc, BD_SC_READY);
1001 
1002                 if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1003                         bdp = bdbase;
1004                 else
1005                         bdp++;
1006 
1007                 /* if a LF, also do CR... */
1008                 if (handle_linefeed && *string == 10) {
1009                         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1010                                 ;
1011 
1012                         cpm_outp_addr = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr),
1013                                                 pinfo);
1014                         *cpm_outp_addr = 13;
1015 
1016                         out_be16(&bdp->cbd_datlen, 1);
1017                         setbits16(&bdp->cbd_sc, BD_SC_READY);
1018 
1019                         if (in_be16(&bdp->cbd_sc) & BD_SC_WRAP)
1020                                 bdp = bdbase;
1021                         else
1022                                 bdp++;
1023                 }
1024         }
1025 
1026         /*
1027          * Finally, Wait for transmitter & holding register to empty
1028          *  and restore the IER
1029          */
1030         while ((in_be16(&bdp->cbd_sc) & BD_SC_READY) != 0)
1031                 ;
1032 
1033         pinfo->tx_cur = bdp;
1034 }
1035 #endif
1036 
1037 #ifdef CONFIG_CONSOLE_POLL
1038 /* Serial polling routines for writing and reading from the uart while
1039  * in an interrupt or debug context.
1040  */
1041 
1042 #define GDB_BUF_SIZE    512     /* power of 2, please */
1043 
1044 static char poll_buf[GDB_BUF_SIZE];
1045 static char *pollp;
1046 static int poll_chars;
1047 
1048 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
1049 {
1050         u_char          c, *cp;
1051         volatile cbd_t  *bdp;
1052         int             i;
1053 
1054         /* Get the address of the host memory buffer.
1055          */
1056         bdp = pinfo->rx_cur;
1057         while (bdp->cbd_sc & BD_SC_EMPTY)
1058                 ;
1059 
1060         /* If the buffer address is in the CPM DPRAM, don't
1061          * convert it.
1062          */
1063         cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1064 
1065         if (obuf) {
1066                 i = c = bdp->cbd_datlen;
1067                 while (i-- > 0)
1068                         *obuf++ = *cp++;
1069         } else
1070                 c = *cp;
1071         bdp->cbd_sc &= ~(BD_SC_BR | BD_SC_FR | BD_SC_PR | BD_SC_OV | BD_SC_ID);
1072         bdp->cbd_sc |= BD_SC_EMPTY;
1073 
1074         if (bdp->cbd_sc & BD_SC_WRAP)
1075                 bdp = pinfo->rx_bd_base;
1076         else
1077                 bdp++;
1078         pinfo->rx_cur = (cbd_t *)bdp;
1079 
1080         return (int)c;
1081 }
1082 
1083 static int cpm_get_poll_char(struct uart_port *port)
1084 {
1085         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
1086 
1087         if (!serial_polled) {
1088                 serial_polled = 1;
1089                 poll_chars = 0;
1090         }
1091         if (poll_chars <= 0) {
1092                 poll_chars = poll_wait_key(poll_buf, pinfo);
1093                 pollp = poll_buf;
1094         }
1095         poll_chars--;
1096         return *pollp++;
1097 }
1098 
1099 static void cpm_put_poll_char(struct uart_port *port,
1100                          unsigned char c)
1101 {
1102         struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
1103         static char ch[2];
1104 
1105         ch[0] = (char)c;
1106         cpm_uart_early_write(pinfo, ch, 1, false);
1107 }
1108 #endif /* CONFIG_CONSOLE_POLL */
1109 
1110 static struct uart_ops cpm_uart_pops = {
1111         .tx_empty       = cpm_uart_tx_empty,
1112         .set_mctrl      = cpm_uart_set_mctrl,
1113         .get_mctrl      = cpm_uart_get_mctrl,
1114         .stop_tx        = cpm_uart_stop_tx,
1115         .start_tx       = cpm_uart_start_tx,
1116         .stop_rx        = cpm_uart_stop_rx,
1117         .break_ctl      = cpm_uart_break_ctl,
1118         .startup        = cpm_uart_startup,
1119         .shutdown       = cpm_uart_shutdown,
1120         .set_termios    = cpm_uart_set_termios,
1121         .type           = cpm_uart_type,
1122         .release_port   = cpm_uart_release_port,
1123         .request_port   = cpm_uart_request_port,
1124         .config_port    = cpm_uart_config_port,
1125         .verify_port    = cpm_uart_verify_port,
1126 #ifdef CONFIG_CONSOLE_POLL
1127         .poll_get_char = cpm_get_poll_char,
1128         .poll_put_char = cpm_put_poll_char,
1129 #endif
1130 };
1131 
1132 struct uart_cpm_port cpm_uart_ports[UART_NR];
1133 
1134 static int cpm_uart_init_port(struct device_node *np,
1135                               struct uart_cpm_port *pinfo)
1136 {
1137         const u32 *data;
1138         void __iomem *mem, *pram;
1139         int len;
1140         int ret;
1141         int i;
1142 
1143         data = of_get_property(np, "clock", NULL);
1144         if (data) {
1145                 struct clk *clk = clk_get(NULL, (const char*)data);
1146                 if (!IS_ERR(clk))
1147                         pinfo->clk = clk;
1148         }
1149         if (!pinfo->clk) {
1150                 data = of_get_property(np, "fsl,cpm-brg", &len);
1151                 if (!data || len != 4) {
1152                         printk(KERN_ERR "CPM UART %s has no/invalid "
1153                                         "fsl,cpm-brg property.\n", np->name);
1154                         return -EINVAL;
1155                 }
1156                 pinfo->brg = *data;
1157         }
1158 
1159         data = of_get_property(np, "fsl,cpm-command", &len);
1160         if (!data || len != 4) {
1161                 printk(KERN_ERR "CPM UART %s has no/invalid "
1162                                 "fsl,cpm-command property.\n", np->name);
1163                 return -EINVAL;
1164         }
1165         pinfo->command = *data;
1166 
1167         mem = of_iomap(np, 0);
1168         if (!mem)
1169                 return -ENOMEM;
1170 
1171         if (of_device_is_compatible(np, "fsl,cpm1-scc-uart") ||
1172             of_device_is_compatible(np, "fsl,cpm2-scc-uart")) {
1173                 pinfo->sccp = mem;
1174                 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1175         } else if (of_device_is_compatible(np, "fsl,cpm1-smc-uart") ||
1176                    of_device_is_compatible(np, "fsl,cpm2-smc-uart")) {
1177                 pinfo->flags |= FLAG_SMC;
1178                 pinfo->smcp = mem;
1179                 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1180         } else {
1181                 ret = -ENODEV;
1182                 goto out_mem;
1183         }
1184 
1185         if (!pram) {
1186                 ret = -ENOMEM;
1187                 goto out_mem;
1188         }
1189 
1190         pinfo->tx_nrfifos = TX_NUM_FIFO;
1191         pinfo->tx_fifosize = TX_BUF_SIZE;
1192         pinfo->rx_nrfifos = RX_NUM_FIFO;
1193         pinfo->rx_fifosize = RX_BUF_SIZE;
1194 
1195         pinfo->port.uartclk = ppc_proc_freq;
1196         pinfo->port.mapbase = (unsigned long)mem;
1197         pinfo->port.type = PORT_CPM;
1198         pinfo->port.ops = &cpm_uart_pops,
1199         pinfo->port.iotype = UPIO_MEM;
1200         pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1201         spin_lock_init(&pinfo->port.lock);
1202 
1203         pinfo->port.irq = irq_of_parse_and_map(np, 0);
1204         if (pinfo->port.irq == NO_IRQ) {
1205                 ret = -EINVAL;
1206                 goto out_pram;
1207         }
1208 
1209         for (i = 0; i < NUM_GPIOS; i++) {
1210                 int gpio;
1211 
1212                 pinfo->gpios[i] = -1;
1213 
1214                 gpio = of_get_gpio(np, i);
1215 
1216                 if (gpio_is_valid(gpio)) {
1217                         ret = gpio_request(gpio, "cpm_uart");
1218                         if (ret) {
1219                                 pr_err("can't request gpio #%d: %d\n", i, ret);
1220                                 continue;
1221                         }
1222                         if (i == GPIO_RTS || i == GPIO_DTR)
1223                                 ret = gpio_direction_output(gpio, 0);
1224                         else
1225                                 ret = gpio_direction_input(gpio);
1226                         if (ret) {
1227                                 pr_err("can't set direction for gpio #%d: %d\n",
1228                                         i, ret);
1229                                 gpio_free(gpio);
1230                                 continue;
1231                         }
1232                         pinfo->gpios[i] = gpio;
1233                 }
1234         }
1235 
1236 #ifdef CONFIG_PPC_EARLY_DEBUG_CPM
1237         udbg_putc = NULL;
1238 #endif
1239 
1240         return cpm_uart_request_port(&pinfo->port);
1241 
1242 out_pram:
1243         cpm_uart_unmap_pram(pinfo, pram);
1244 out_mem:
1245         iounmap(mem);
1246         return ret;
1247 }
1248 
1249 #ifdef CONFIG_SERIAL_CPM_CONSOLE
1250 /*
1251  *      Print a string to the serial port trying not to disturb
1252  *      any possible real use of the port...
1253  *
1254  *      Note that this is called with interrupts already disabled
1255  */
1256 static void cpm_uart_console_write(struct console *co, const char *s,
1257                                    u_int count)
1258 {
1259         struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1260         unsigned long flags;
1261         int nolock = oops_in_progress;
1262 
1263         if (unlikely(nolock)) {
1264                 local_irq_save(flags);
1265         } else {
1266                 spin_lock_irqsave(&pinfo->port.lock, flags);
1267         }
1268 
1269         cpm_uart_early_write(pinfo, s, count, true);
1270 
1271         if (unlikely(nolock)) {
1272                 local_irq_restore(flags);
1273         } else {
1274                 spin_unlock_irqrestore(&pinfo->port.lock, flags);
1275         }
1276 }
1277 
1278 
1279 static int __init cpm_uart_console_setup(struct console *co, char *options)
1280 {
1281         int baud = 38400;
1282         int bits = 8;
1283         int parity = 'n';
1284         int flow = 'n';
1285         int ret;
1286         struct uart_cpm_port *pinfo;
1287         struct uart_port *port;
1288 
1289         struct device_node *np = NULL;
1290         int i = 0;
1291 
1292         if (co->index >= UART_NR) {
1293                 printk(KERN_ERR "cpm_uart: console index %d too high\n",
1294                        co->index);
1295                 return -ENODEV;
1296         }
1297 
1298         do {
1299                 np = of_find_node_by_type(np, "serial");
1300                 if (!np)
1301                         return -ENODEV;
1302 
1303                 if (!of_device_is_compatible(np, "fsl,cpm1-smc-uart") &&
1304                     !of_device_is_compatible(np, "fsl,cpm1-scc-uart") &&
1305                     !of_device_is_compatible(np, "fsl,cpm2-smc-uart") &&
1306                     !of_device_is_compatible(np, "fsl,cpm2-scc-uart"))
1307                         i--;
1308         } while (i++ != co->index);
1309 
1310         pinfo = &cpm_uart_ports[co->index];
1311 
1312         pinfo->flags |= FLAG_CONSOLE;
1313         port = &pinfo->port;
1314 
1315         ret = cpm_uart_init_port(np, pinfo);
1316         of_node_put(np);
1317         if (ret)
1318                 return ret;
1319 
1320         if (options) {
1321                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1322         } else {
1323                 if ((baud = uart_baudrate()) == -1)
1324                         baud = 9600;
1325         }
1326 
1327         if (IS_SMC(pinfo)) {
1328                 out_be16(&pinfo->smcup->smc_brkcr, 0);
1329                 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1330                 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1331                 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1332         } else {
1333                 out_be16(&pinfo->sccup->scc_brkcr, 0);
1334                 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1335                 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1336                 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1337         }
1338 
1339         ret = cpm_uart_allocbuf(pinfo, 1);
1340 
1341         if (ret)
1342                 return ret;
1343 
1344         cpm_uart_initbd(pinfo);
1345 
1346         if (IS_SMC(pinfo))
1347                 cpm_uart_init_smc(pinfo);
1348         else
1349                 cpm_uart_init_scc(pinfo);
1350 
1351         uart_set_options(port, co, baud, parity, bits, flow);
1352         cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1353 
1354         return 0;
1355 }
1356 
1357 static struct uart_driver cpm_reg;
1358 static struct console cpm_scc_uart_console = {
1359         .name           = "ttyCPM",
1360         .write          = cpm_uart_console_write,
1361         .device         = uart_console_device,
1362         .setup          = cpm_uart_console_setup,
1363         .flags          = CON_PRINTBUFFER,
1364         .index          = -1,
1365         .data           = &cpm_reg,
1366 };
1367 
1368 static int __init cpm_uart_console_init(void)
1369 {
1370         register_console(&cpm_scc_uart_console);
1371         return 0;
1372 }
1373 
1374 console_initcall(cpm_uart_console_init);
1375 
1376 #define CPM_UART_CONSOLE        &cpm_scc_uart_console
1377 #else
1378 #define CPM_UART_CONSOLE        NULL
1379 #endif
1380 
1381 static struct uart_driver cpm_reg = {
1382         .owner          = THIS_MODULE,
1383         .driver_name    = "ttyCPM",
1384         .dev_name       = "ttyCPM",
1385         .major          = SERIAL_CPM_MAJOR,
1386         .minor          = SERIAL_CPM_MINOR,
1387         .cons           = CPM_UART_CONSOLE,
1388         .nr             = UART_NR,
1389 };
1390 
1391 static int probe_index;
1392 
1393 static int cpm_uart_probe(struct platform_device *ofdev)
1394 {
1395         int index = probe_index++;
1396         struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1397         int ret;
1398 
1399         pinfo->port.line = index;
1400 
1401         if (index >= UART_NR)
1402                 return -ENODEV;
1403 
1404         platform_set_drvdata(ofdev, pinfo);
1405 
1406         /* initialize the device pointer for the port */
1407         pinfo->port.dev = &ofdev->dev;
1408 
1409         ret = cpm_uart_init_port(ofdev->dev.of_node, pinfo);
1410         if (ret)
1411                 return ret;
1412 
1413         return uart_add_one_port(&cpm_reg, &pinfo->port);
1414 }
1415 
1416 static int cpm_uart_remove(struct platform_device *ofdev)
1417 {
1418         struct uart_cpm_port *pinfo = platform_get_drvdata(ofdev);
1419         return uart_remove_one_port(&cpm_reg, &pinfo->port);
1420 }
1421 
1422 static struct of_device_id cpm_uart_match[] = {
1423         {
1424                 .compatible = "fsl,cpm1-smc-uart",
1425         },
1426         {
1427                 .compatible = "fsl,cpm1-scc-uart",
1428         },
1429         {
1430                 .compatible = "fsl,cpm2-smc-uart",
1431         },
1432         {
1433                 .compatible = "fsl,cpm2-scc-uart",
1434         },
1435         {}
1436 };
1437 
1438 static struct platform_driver cpm_uart_driver = {
1439         .driver = {
1440                 .name = "cpm_uart",
1441                 .owner = THIS_MODULE,
1442                 .of_match_table = cpm_uart_match,
1443         },
1444         .probe = cpm_uart_probe,
1445         .remove = cpm_uart_remove,
1446  };
1447 
1448 static int __init cpm_uart_init(void)
1449 {
1450         int ret = uart_register_driver(&cpm_reg);
1451         if (ret)
1452                 return ret;
1453 
1454         ret = platform_driver_register(&cpm_uart_driver);
1455         if (ret)
1456                 uart_unregister_driver(&cpm_reg);
1457 
1458         return ret;
1459 }
1460 
1461 static void __exit cpm_uart_exit(void)
1462 {
1463         platform_driver_unregister(&cpm_uart_driver);
1464         uart_unregister_driver(&cpm_reg);
1465 }
1466 
1467 module_init(cpm_uart_init);
1468 module_exit(cpm_uart_exit);
1469 
1470 MODULE_AUTHOR("Kumar Gala/Antoniou Pantelis");
1471 MODULE_DESCRIPTION("CPM SCC/SMC port driver $Revision: 0.01 $");
1472 MODULE_LICENSE("GPL");
1473 MODULE_ALIAS_CHARDEV(SERIAL_CPM_MAJOR, SERIAL_CPM_MINOR);
1474 

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