Version:  2.0.40 2.2.26 2.4.37 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16

Linux/drivers/tty/serial/bfin_uart.c

  1 /*
  2  * Blackfin On-Chip Serial Driver
  3  *
  4  * Copyright 2006-2011 Analog Devices Inc.
  5  *
  6  * Enter bugs at http://blackfin.uclinux.org/
  7  *
  8  * Licensed under the GPL-2 or later.
  9  */
 10 
 11 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 12 #define SUPPORT_SYSRQ
 13 #endif
 14 
 15 #define DRIVER_NAME "bfin-uart"
 16 #define pr_fmt(fmt) DRIVER_NAME ": " fmt
 17 
 18 #include <linux/module.h>
 19 #include <linux/ioport.h>
 20 #include <linux/gfp.h>
 21 #include <linux/io.h>
 22 #include <linux/init.h>
 23 #include <linux/console.h>
 24 #include <linux/sysrq.h>
 25 #include <linux/platform_device.h>
 26 #include <linux/tty.h>
 27 #include <linux/tty_flip.h>
 28 #include <linux/serial_core.h>
 29 #include <linux/gpio.h>
 30 #include <linux/irq.h>
 31 #include <linux/kgdb.h>
 32 #include <linux/slab.h>
 33 #include <linux/dma-mapping.h>
 34 
 35 #include <asm/portmux.h>
 36 #include <asm/cacheflush.h>
 37 #include <asm/dma.h>
 38 #include <asm/bfin_serial.h>
 39 
 40 #ifdef CONFIG_SERIAL_BFIN_MODULE
 41 # undef CONFIG_EARLY_PRINTK
 42 #endif
 43 
 44 /* UART name and device definitions */
 45 #define BFIN_SERIAL_DEV_NAME    "ttyBF"
 46 #define BFIN_SERIAL_MAJOR       204
 47 #define BFIN_SERIAL_MINOR       64
 48 
 49 static struct bfin_serial_port *bfin_serial_ports[BFIN_UART_NR_PORTS];
 50 
 51 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
 52         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
 53 
 54 # ifndef CONFIG_SERIAL_BFIN_PIO
 55 #  error KGDB only support UART in PIO mode.
 56 # endif
 57 
 58 static int kgdboc_port_line;
 59 static int kgdboc_break_enabled;
 60 #endif
 61 /*
 62  * Setup for console. Argument comes from the menuconfig
 63  */
 64 #define DMA_RX_XCOUNT           512
 65 #define DMA_RX_YCOUNT           (PAGE_SIZE / DMA_RX_XCOUNT)
 66 
 67 #define DMA_RX_FLUSH_JIFFIES    (HZ / 50)
 68 
 69 #ifdef CONFIG_SERIAL_BFIN_DMA
 70 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart);
 71 #else
 72 static void bfin_serial_tx_chars(struct bfin_serial_port *uart);
 73 #endif
 74 
 75 static void bfin_serial_reset_irda(struct uart_port *port);
 76 
 77 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
 78         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
 79 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
 80 {
 81         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 82         if (uart->cts_pin < 0)
 83                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 84 
 85         /* CTS PIN is negative assertive. */
 86         if (UART_GET_CTS(uart))
 87                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
 88         else
 89                 return TIOCM_DSR | TIOCM_CAR;
 90 }
 91 
 92 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
 93 {
 94         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
 95         if (uart->rts_pin < 0)
 96                 return;
 97 
 98         /* RTS PIN is negative assertive. */
 99         if (mctrl & TIOCM_RTS)
100                 UART_ENABLE_RTS(uart);
101         else
102                 UART_DISABLE_RTS(uart);
103 }
104 
105 /*
106  * Handle any change of modem status signal.
107  */
108 static irqreturn_t bfin_serial_mctrl_cts_int(int irq, void *dev_id)
109 {
110         struct bfin_serial_port *uart = dev_id;
111         unsigned int status = bfin_serial_get_mctrl(&uart->port);
112 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
113         struct tty_struct *tty = uart->port.state->port.tty;
114 
115         UART_CLEAR_SCTS(uart);
116         if (tty->hw_stopped) {
117                 if (status) {
118                         tty->hw_stopped = 0;
119                         uart_write_wakeup(&uart->port);
120                 }
121         } else {
122                 if (!status)
123                         tty->hw_stopped = 1;
124         }
125 #endif
126         uart_handle_cts_change(&uart->port, status & TIOCM_CTS);
127 
128         return IRQ_HANDLED;
129 }
130 #else
131 static unsigned int bfin_serial_get_mctrl(struct uart_port *port)
132 {
133         return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
134 }
135 
136 static void bfin_serial_set_mctrl(struct uart_port *port, unsigned int mctrl)
137 {
138 }
139 #endif
140 
141 /*
142  * interrupts are disabled on entry
143  */
144 static void bfin_serial_stop_tx(struct uart_port *port)
145 {
146         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
147 #ifdef CONFIG_SERIAL_BFIN_DMA
148         struct circ_buf *xmit = &uart->port.state->xmit;
149 #endif
150 
151         while (!(UART_GET_LSR(uart) & TEMT))
152                 cpu_relax();
153 
154 #ifdef CONFIG_SERIAL_BFIN_DMA
155         disable_dma(uart->tx_dma_channel);
156         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
157         uart->port.icount.tx += uart->tx_count;
158         uart->tx_count = 0;
159         uart->tx_done = 1;
160 #else
161 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
162         /* Clear TFI bit */
163         UART_PUT_LSR(uart, TFI);
164 #endif
165         UART_CLEAR_IER(uart, ETBEI);
166 #endif
167 }
168 
169 /*
170  * port is locked and interrupts are disabled
171  */
172 static void bfin_serial_start_tx(struct uart_port *port)
173 {
174         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
175         struct tty_struct *tty = uart->port.state->port.tty;
176 
177         /*
178          * To avoid losting RX interrupt, we reset IR function
179          * before sending data.
180          */
181         if (tty->termios.c_line == N_IRDA)
182                 bfin_serial_reset_irda(port);
183 
184 #ifdef CONFIG_SERIAL_BFIN_DMA
185         if (uart->tx_done)
186                 bfin_serial_dma_tx_chars(uart);
187 #else
188         UART_SET_IER(uart, ETBEI);
189         bfin_serial_tx_chars(uart);
190 #endif
191 }
192 
193 /*
194  * Interrupts are enabled
195  */
196 static void bfin_serial_stop_rx(struct uart_port *port)
197 {
198         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
199 
200         UART_CLEAR_IER(uart, ERBFI);
201 }
202 
203 /*
204  * Set the modem control timer to fire immediately.
205  */
206 static void bfin_serial_enable_ms(struct uart_port *port)
207 {
208 }
209 
210 
211 #if ANOMALY_05000363 && defined(CONFIG_SERIAL_BFIN_PIO)
212 # define UART_GET_ANOMALY_THRESHOLD(uart)    ((uart)->anomaly_threshold)
213 # define UART_SET_ANOMALY_THRESHOLD(uart, v) ((uart)->anomaly_threshold = (v))
214 #else
215 # define UART_GET_ANOMALY_THRESHOLD(uart)    0
216 # define UART_SET_ANOMALY_THRESHOLD(uart, v)
217 #endif
218 
219 #ifdef CONFIG_SERIAL_BFIN_PIO
220 static void bfin_serial_rx_chars(struct bfin_serial_port *uart)
221 {
222         unsigned int status, ch, flg;
223         static struct timeval anomaly_start = { .tv_sec = 0 };
224 
225         status = UART_GET_LSR(uart);
226         UART_CLEAR_LSR(uart);
227 
228         ch = UART_GET_CHAR(uart);
229         uart->port.icount.rx++;
230 
231 #if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
232         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
233         if (kgdb_connected && kgdboc_port_line == uart->port.line
234                 && kgdboc_break_enabled)
235                 if (ch == 0x3) {/* Ctrl + C */
236                         kgdb_breakpoint();
237                         return;
238                 }
239 
240         if (!uart->port.state)
241                 return;
242 #endif
243         if (ANOMALY_05000363) {
244                 /* The BF533 (and BF561) family of processors have a nice anomaly
245                  * where they continuously generate characters for a "single" break.
246                  * We have to basically ignore this flood until the "next" valid
247                  * character comes across.  Due to the nature of the flood, it is
248                  * not possible to reliably catch bytes that are sent too quickly
249                  * after this break.  So application code talking to the Blackfin
250                  * which sends a break signal must allow at least 1.5 character
251                  * times after the end of the break for things to stabilize.  This
252                  * timeout was picked as it must absolutely be larger than 1
253                  * character time +/- some percent.  So 1.5 sounds good.  All other
254                  * Blackfin families operate properly.  Woo.
255                  */
256                 if (anomaly_start.tv_sec) {
257                         struct timeval curr;
258                         suseconds_t usecs;
259 
260                         if ((~ch & (~ch + 1)) & 0xff)
261                                 goto known_good_char;
262 
263                         do_gettimeofday(&curr);
264                         if (curr.tv_sec - anomaly_start.tv_sec > 1)
265                                 goto known_good_char;
266 
267                         usecs = 0;
268                         if (curr.tv_sec != anomaly_start.tv_sec)
269                                 usecs += USEC_PER_SEC;
270                         usecs += curr.tv_usec - anomaly_start.tv_usec;
271 
272                         if (usecs > UART_GET_ANOMALY_THRESHOLD(uart))
273                                 goto known_good_char;
274 
275                         if (ch)
276                                 anomaly_start.tv_sec = 0;
277                         else
278                                 anomaly_start = curr;
279 
280                         return;
281 
282  known_good_char:
283                         status &= ~BI;
284                         anomaly_start.tv_sec = 0;
285                 }
286         }
287 
288         if (status & BI) {
289                 if (ANOMALY_05000363)
290                         if (bfin_revid() < 5)
291                                 do_gettimeofday(&anomaly_start);
292                 uart->port.icount.brk++;
293                 if (uart_handle_break(&uart->port))
294                         goto ignore_char;
295                 status &= ~(PE | FE);
296         }
297         if (status & PE)
298                 uart->port.icount.parity++;
299         if (status & OE)
300                 uart->port.icount.overrun++;
301         if (status & FE)
302                 uart->port.icount.frame++;
303 
304         status &= uart->port.read_status_mask;
305 
306         if (status & BI)
307                 flg = TTY_BREAK;
308         else if (status & PE)
309                 flg = TTY_PARITY;
310         else if (status & FE)
311                 flg = TTY_FRAME;
312         else
313                 flg = TTY_NORMAL;
314 
315         if (uart_handle_sysrq_char(&uart->port, ch))
316                 goto ignore_char;
317 
318         uart_insert_char(&uart->port, status, OE, ch, flg);
319 
320  ignore_char:
321         tty_flip_buffer_push(&uart->port.state->port);
322 }
323 
324 static void bfin_serial_tx_chars(struct bfin_serial_port *uart)
325 {
326         struct circ_buf *xmit = &uart->port.state->xmit;
327 
328         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
329 #if defined(CONFIG_BF54x) || defined(CONFIG_BF60x)
330                 /* Clear TFI bit */
331                 UART_PUT_LSR(uart, TFI);
332 #endif
333                 /* Anomaly notes:
334                  *  05000215 -  we always clear ETBEI within last UART TX
335                  *              interrupt to end a string. It is always set
336                  *              when start a new tx.
337                  */
338                 UART_CLEAR_IER(uart, ETBEI);
339                 return;
340         }
341 
342         if (uart->port.x_char) {
343                 UART_PUT_CHAR(uart, uart->port.x_char);
344                 uart->port.icount.tx++;
345                 uart->port.x_char = 0;
346         }
347 
348         while ((UART_GET_LSR(uart) & THRE) && xmit->tail != xmit->head) {
349                 UART_PUT_CHAR(uart, xmit->buf[xmit->tail]);
350                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
351                 uart->port.icount.tx++;
352         }
353 
354         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
355                 uart_write_wakeup(&uart->port);
356 }
357 
358 static irqreturn_t bfin_serial_rx_int(int irq, void *dev_id)
359 {
360         struct bfin_serial_port *uart = dev_id;
361 
362         while (UART_GET_LSR(uart) & DR)
363                 bfin_serial_rx_chars(uart);
364 
365         return IRQ_HANDLED;
366 }
367 
368 static irqreturn_t bfin_serial_tx_int(int irq, void *dev_id)
369 {
370         struct bfin_serial_port *uart = dev_id;
371 
372         spin_lock(&uart->port.lock);
373         if (UART_GET_LSR(uart) & THRE)
374                 bfin_serial_tx_chars(uart);
375         spin_unlock(&uart->port.lock);
376 
377         return IRQ_HANDLED;
378 }
379 #endif
380 
381 #ifdef CONFIG_SERIAL_BFIN_DMA
382 static void bfin_serial_dma_tx_chars(struct bfin_serial_port *uart)
383 {
384         struct circ_buf *xmit = &uart->port.state->xmit;
385 
386         uart->tx_done = 0;
387 
388         if (uart_circ_empty(xmit) || uart_tx_stopped(&uart->port)) {
389                 uart->tx_count = 0;
390                 uart->tx_done = 1;
391                 return;
392         }
393 
394         if (uart->port.x_char) {
395                 UART_PUT_CHAR(uart, uart->port.x_char);
396                 uart->port.icount.tx++;
397                 uart->port.x_char = 0;
398         }
399 
400         uart->tx_count = CIRC_CNT(xmit->head, xmit->tail, UART_XMIT_SIZE);
401         if (uart->tx_count > (UART_XMIT_SIZE - xmit->tail))
402                 uart->tx_count = UART_XMIT_SIZE - xmit->tail;
403         blackfin_dcache_flush_range((unsigned long)(xmit->buf+xmit->tail),
404                                         (unsigned long)(xmit->buf+xmit->tail+uart->tx_count));
405         set_dma_config(uart->tx_dma_channel,
406                 set_bfin_dma_config(DIR_READ, DMA_FLOW_STOP,
407                         INTR_ON_BUF,
408                         DIMENSION_LINEAR,
409                         DATA_SIZE_8,
410                         DMA_SYNC_RESTART));
411         set_dma_start_addr(uart->tx_dma_channel, (unsigned long)(xmit->buf+xmit->tail));
412         set_dma_x_count(uart->tx_dma_channel, uart->tx_count);
413         set_dma_x_modify(uart->tx_dma_channel, 1);
414         SSYNC();
415         enable_dma(uart->tx_dma_channel);
416 
417         UART_SET_IER(uart, ETBEI);
418 }
419 
420 static void bfin_serial_dma_rx_chars(struct bfin_serial_port *uart)
421 {
422         int i, flg, status;
423 
424         status = UART_GET_LSR(uart);
425         UART_CLEAR_LSR(uart);
426 
427         uart->port.icount.rx +=
428                 CIRC_CNT(uart->rx_dma_buf.head, uart->rx_dma_buf.tail,
429                 UART_XMIT_SIZE);
430 
431         if (status & BI) {
432                 uart->port.icount.brk++;
433                 if (uart_handle_break(&uart->port))
434                         goto dma_ignore_char;
435                 status &= ~(PE | FE);
436         }
437         if (status & PE)
438                 uart->port.icount.parity++;
439         if (status & OE)
440                 uart->port.icount.overrun++;
441         if (status & FE)
442                 uart->port.icount.frame++;
443 
444         status &= uart->port.read_status_mask;
445 
446         if (status & BI)
447                 flg = TTY_BREAK;
448         else if (status & PE)
449                 flg = TTY_PARITY;
450         else if (status & FE)
451                 flg = TTY_FRAME;
452         else
453                 flg = TTY_NORMAL;
454 
455         for (i = uart->rx_dma_buf.tail; ; i++) {
456                 if (i >= UART_XMIT_SIZE)
457                         i = 0;
458                 if (i == uart->rx_dma_buf.head)
459                         break;
460                 if (!uart_handle_sysrq_char(&uart->port, uart->rx_dma_buf.buf[i]))
461                         uart_insert_char(&uart->port, status, OE,
462                                 uart->rx_dma_buf.buf[i], flg);
463         }
464 
465  dma_ignore_char:
466         tty_flip_buffer_push(&uart->port.state->port);
467 }
468 
469 void bfin_serial_rx_dma_timeout(struct bfin_serial_port *uart)
470 {
471         int x_pos, pos;
472         unsigned long flags;
473 
474         spin_lock_irqsave(&uart->rx_lock, flags);
475 
476         /* 2D DMA RX buffer ring is used. Because curr_y_count and
477          * curr_x_count can't be read as an atomic operation,
478          * curr_y_count should be read before curr_x_count. When
479          * curr_x_count is read, curr_y_count may already indicate
480          * next buffer line. But, the position calculated here is
481          * still indicate the old line. The wrong position data may
482          * be smaller than current buffer tail, which cause garbages
483          * are received if it is not prohibit.
484          */
485         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
486         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
487         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
488         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
489                 uart->rx_dma_nrows = 0;
490         x_pos = DMA_RX_XCOUNT - x_pos;
491         if (x_pos == DMA_RX_XCOUNT)
492                 x_pos = 0;
493 
494         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT + x_pos;
495         /* Ignore receiving data if new position is in the same line of
496          * current buffer tail and small.
497          */
498         if (pos > uart->rx_dma_buf.tail ||
499                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
500                 uart->rx_dma_buf.head = pos;
501                 bfin_serial_dma_rx_chars(uart);
502                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
503         }
504 
505         spin_unlock_irqrestore(&uart->rx_lock, flags);
506 
507         mod_timer(&(uart->rx_dma_timer), jiffies + DMA_RX_FLUSH_JIFFIES);
508 }
509 
510 static irqreturn_t bfin_serial_dma_tx_int(int irq, void *dev_id)
511 {
512         struct bfin_serial_port *uart = dev_id;
513         struct circ_buf *xmit = &uart->port.state->xmit;
514 
515         spin_lock(&uart->port.lock);
516         if (!(get_dma_curr_irqstat(uart->tx_dma_channel)&DMA_RUN)) {
517                 disable_dma(uart->tx_dma_channel);
518                 clear_dma_irqstat(uart->tx_dma_channel);
519                 /* Anomaly notes:
520                  *  05000215 -  we always clear ETBEI within last UART TX
521                  *              interrupt to end a string. It is always set
522                  *              when start a new tx.
523                  */
524                 UART_CLEAR_IER(uart, ETBEI);
525                 uart->port.icount.tx += uart->tx_count;
526                 if (!(xmit->tail == 0 && xmit->head == 0)) {
527                         xmit->tail = (xmit->tail + uart->tx_count) & (UART_XMIT_SIZE - 1);
528 
529                         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
530                                 uart_write_wakeup(&uart->port);
531                 }
532 
533                 bfin_serial_dma_tx_chars(uart);
534         }
535 
536         spin_unlock(&uart->port.lock);
537         return IRQ_HANDLED;
538 }
539 
540 static irqreturn_t bfin_serial_dma_rx_int(int irq, void *dev_id)
541 {
542         struct bfin_serial_port *uart = dev_id;
543         unsigned int irqstat;
544         int x_pos, pos;
545 
546         spin_lock(&uart->rx_lock);
547         irqstat = get_dma_curr_irqstat(uart->rx_dma_channel);
548         clear_dma_irqstat(uart->rx_dma_channel);
549 
550         uart->rx_dma_nrows = get_dma_curr_ycount(uart->rx_dma_channel);
551         x_pos = get_dma_curr_xcount(uart->rx_dma_channel);
552         uart->rx_dma_nrows = DMA_RX_YCOUNT - uart->rx_dma_nrows;
553         if (uart->rx_dma_nrows == DMA_RX_YCOUNT || x_pos == 0)
554                 uart->rx_dma_nrows = 0;
555 
556         pos = uart->rx_dma_nrows * DMA_RX_XCOUNT;
557         if (pos > uart->rx_dma_buf.tail ||
558                 uart->rx_dma_nrows < (uart->rx_dma_buf.tail/DMA_RX_XCOUNT)) {
559                 uart->rx_dma_buf.head = pos;
560                 bfin_serial_dma_rx_chars(uart);
561                 uart->rx_dma_buf.tail = uart->rx_dma_buf.head;
562         }
563 
564         spin_unlock(&uart->rx_lock);
565 
566         return IRQ_HANDLED;
567 }
568 #endif
569 
570 /*
571  * Return TIOCSER_TEMT when transmitter is not busy.
572  */
573 static unsigned int bfin_serial_tx_empty(struct uart_port *port)
574 {
575         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
576         unsigned int lsr;
577 
578         lsr = UART_GET_LSR(uart);
579         if (lsr & TEMT)
580                 return TIOCSER_TEMT;
581         else
582                 return 0;
583 }
584 
585 static void bfin_serial_break_ctl(struct uart_port *port, int break_state)
586 {
587         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
588         u32 lcr = UART_GET_LCR(uart);
589         if (break_state)
590                 lcr |= SB;
591         else
592                 lcr &= ~SB;
593         UART_PUT_LCR(uart, lcr);
594         SSYNC();
595 }
596 
597 static int bfin_serial_startup(struct uart_port *port)
598 {
599         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
600 
601 #ifdef CONFIG_SERIAL_BFIN_DMA
602         dma_addr_t dma_handle;
603 
604         if (request_dma(uart->rx_dma_channel, "BFIN_UART_RX") < 0) {
605                 printk(KERN_NOTICE "Unable to attach Blackfin UART RX DMA channel\n");
606                 return -EBUSY;
607         }
608 
609         if (request_dma(uart->tx_dma_channel, "BFIN_UART_TX") < 0) {
610                 printk(KERN_NOTICE "Unable to attach Blackfin UART TX DMA channel\n");
611                 free_dma(uart->rx_dma_channel);
612                 return -EBUSY;
613         }
614 
615         set_dma_callback(uart->rx_dma_channel, bfin_serial_dma_rx_int, uart);
616         set_dma_callback(uart->tx_dma_channel, bfin_serial_dma_tx_int, uart);
617 
618         uart->rx_dma_buf.buf = (unsigned char *)dma_alloc_coherent(NULL, PAGE_SIZE, &dma_handle, GFP_DMA);
619         uart->rx_dma_buf.head = 0;
620         uart->rx_dma_buf.tail = 0;
621         uart->rx_dma_nrows = 0;
622 
623         set_dma_config(uart->rx_dma_channel,
624                 set_bfin_dma_config(DIR_WRITE, DMA_FLOW_AUTO,
625                                 INTR_ON_ROW, DIMENSION_2D,
626                                 DATA_SIZE_8,
627                                 DMA_SYNC_RESTART));
628         set_dma_x_count(uart->rx_dma_channel, DMA_RX_XCOUNT);
629         set_dma_x_modify(uart->rx_dma_channel, 1);
630         set_dma_y_count(uart->rx_dma_channel, DMA_RX_YCOUNT);
631         set_dma_y_modify(uart->rx_dma_channel, 1);
632         set_dma_start_addr(uart->rx_dma_channel, (unsigned long)uart->rx_dma_buf.buf);
633         enable_dma(uart->rx_dma_channel);
634 
635         uart->rx_dma_timer.data = (unsigned long)(uart);
636         uart->rx_dma_timer.function = (void *)bfin_serial_rx_dma_timeout;
637         uart->rx_dma_timer.expires = jiffies + DMA_RX_FLUSH_JIFFIES;
638         add_timer(&(uart->rx_dma_timer));
639 #else
640 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
641         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
642         if (kgdboc_port_line == uart->port.line && kgdboc_break_enabled)
643                 kgdboc_break_enabled = 0;
644         else {
645 # endif
646         if (request_irq(uart->rx_irq, bfin_serial_rx_int, 0,
647              "BFIN_UART_RX", uart)) {
648                 printk(KERN_NOTICE "Unable to attach BlackFin UART RX interrupt\n");
649                 return -EBUSY;
650         }
651 
652         if (request_irq
653             (uart->tx_irq, bfin_serial_tx_int, 0,
654              "BFIN_UART_TX", uart)) {
655                 printk(KERN_NOTICE "Unable to attach BlackFin UART TX interrupt\n");
656                 free_irq(uart->rx_irq, uart);
657                 return -EBUSY;
658         }
659 
660 # ifdef CONFIG_BF54x
661         {
662                 /*
663                  * UART2 and UART3 on BF548 share interrupt PINs and DMA
664                  * controllers with SPORT2 and SPORT3. UART rx and tx
665                  * interrupts are generated in PIO mode only when configure
666                  * their peripheral mapping registers properly, which means
667                  * request corresponding DMA channels in PIO mode as well.
668                  */
669                 unsigned uart_dma_ch_rx, uart_dma_ch_tx;
670 
671                 switch (uart->rx_irq) {
672                 case IRQ_UART3_RX:
673                         uart_dma_ch_rx = CH_UART3_RX;
674                         uart_dma_ch_tx = CH_UART3_TX;
675                         break;
676                 case IRQ_UART2_RX:
677                         uart_dma_ch_rx = CH_UART2_RX;
678                         uart_dma_ch_tx = CH_UART2_TX;
679                         break;
680                 default:
681                         uart_dma_ch_rx = uart_dma_ch_tx = 0;
682                         break;
683                 }
684 
685                 if (uart_dma_ch_rx &&
686                         request_dma(uart_dma_ch_rx, "BFIN_UART_RX") < 0) {
687                         printk(KERN_NOTICE"Fail to attach UART interrupt\n");
688                         free_irq(uart->rx_irq, uart);
689                         free_irq(uart->tx_irq, uart);
690                         return -EBUSY;
691                 }
692                 if (uart_dma_ch_tx &&
693                         request_dma(uart_dma_ch_tx, "BFIN_UART_TX") < 0) {
694                         printk(KERN_NOTICE "Fail to attach UART interrupt\n");
695                         free_dma(uart_dma_ch_rx);
696                         free_irq(uart->rx_irq, uart);
697                         free_irq(uart->tx_irq, uart);
698                         return -EBUSY;
699                 }
700         }
701 # endif
702 # if defined(CONFIG_KGDB_SERIAL_CONSOLE) || \
703         defined(CONFIG_KGDB_SERIAL_CONSOLE_MODULE)
704         }
705 # endif
706 #endif
707 
708 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
709         if (uart->cts_pin >= 0) {
710                 if (request_irq(gpio_to_irq(uart->cts_pin),
711                         bfin_serial_mctrl_cts_int,
712                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
713                         0, "BFIN_UART_CTS", uart)) {
714                         uart->cts_pin = -1;
715                         pr_info("Unable to attach BlackFin UART CTS interrupt. So, disable it.\n");
716                 }
717         }
718         if (uart->rts_pin >= 0) {
719                 if (gpio_request(uart->rts_pin, DRIVER_NAME)) {
720                         pr_info("fail to request RTS PIN at GPIO_%d\n", uart->rts_pin);
721                         uart->rts_pin = -1;
722                 } else
723                         gpio_direction_output(uart->rts_pin, 0);
724         }
725 #endif
726 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
727         if (uart->cts_pin >= 0) {
728                 if (request_irq(uart->status_irq, bfin_serial_mctrl_cts_int,
729                         0, "BFIN_UART_MODEM_STATUS", uart)) {
730                         uart->cts_pin = -1;
731                         dev_info(port->dev, "Unable to attach BlackFin UART Modem Status interrupt.\n");
732                 }
733 
734                 /* CTS RTS PINs are negative assertive. */
735                 UART_PUT_MCR(uart, UART_GET_MCR(uart) | ACTS);
736                 UART_SET_IER(uart, EDSSI);
737         }
738 #endif
739 
740         UART_SET_IER(uart, ERBFI);
741         return 0;
742 }
743 
744 static void bfin_serial_shutdown(struct uart_port *port)
745 {
746         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
747 
748 #ifdef CONFIG_SERIAL_BFIN_DMA
749         disable_dma(uart->tx_dma_channel);
750         free_dma(uart->tx_dma_channel);
751         disable_dma(uart->rx_dma_channel);
752         free_dma(uart->rx_dma_channel);
753         del_timer(&(uart->rx_dma_timer));
754         dma_free_coherent(NULL, PAGE_SIZE, uart->rx_dma_buf.buf, 0);
755 #else
756 #ifdef CONFIG_BF54x
757         switch (uart->port.irq) {
758         case IRQ_UART3_RX:
759                 free_dma(CH_UART3_RX);
760                 free_dma(CH_UART3_TX);
761                 break;
762         case IRQ_UART2_RX:
763                 free_dma(CH_UART2_RX);
764                 free_dma(CH_UART2_TX);
765                 break;
766         default:
767                 break;
768         }
769 #endif
770         free_irq(uart->rx_irq, uart);
771         free_irq(uart->tx_irq, uart);
772 #endif
773 
774 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
775         if (uart->cts_pin >= 0)
776                 free_irq(gpio_to_irq(uart->cts_pin), uart);
777         if (uart->rts_pin >= 0)
778                 gpio_free(uart->rts_pin);
779 #endif
780 #ifdef CONFIG_SERIAL_BFIN_HARD_CTSRTS
781         if (uart->cts_pin >= 0)
782                 free_irq(uart->status_irq, uart);
783 #endif
784 }
785 
786 static void
787 bfin_serial_set_termios(struct uart_port *port, struct ktermios *termios,
788                    struct ktermios *old)
789 {
790         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
791         unsigned long flags;
792         unsigned int baud, quot;
793         unsigned int ier, lcr = 0;
794         unsigned long timeout;
795 
796         switch (termios->c_cflag & CSIZE) {
797         case CS8:
798                 lcr = WLS(8);
799                 break;
800         case CS7:
801                 lcr = WLS(7);
802                 break;
803         case CS6:
804                 lcr = WLS(6);
805                 break;
806         case CS5:
807                 lcr = WLS(5);
808                 break;
809         default:
810                 printk(KERN_ERR "%s: word length not supported\n",
811                         __func__);
812         }
813 
814         /* Anomaly notes:
815          *  05000231 -  STOP bit is always set to 1 whatever the user is set.
816          */
817         if (termios->c_cflag & CSTOPB) {
818                 if (ANOMALY_05000231)
819                         printk(KERN_WARNING "STOP bits other than 1 is not "
820                                 "supported in case of anomaly 05000231.\n");
821                 else
822                         lcr |= STB;
823         }
824         if (termios->c_cflag & PARENB)
825                 lcr |= PEN;
826         if (!(termios->c_cflag & PARODD))
827                 lcr |= EPS;
828         if (termios->c_cflag & CMSPAR)
829                 lcr |= STP;
830 
831         spin_lock_irqsave(&uart->port.lock, flags);
832 
833         port->read_status_mask = OE;
834         if (termios->c_iflag & INPCK)
835                 port->read_status_mask |= (FE | PE);
836         if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
837                 port->read_status_mask |= BI;
838 
839         /*
840          * Characters to ignore
841          */
842         port->ignore_status_mask = 0;
843         if (termios->c_iflag & IGNPAR)
844                 port->ignore_status_mask |= FE | PE;
845         if (termios->c_iflag & IGNBRK) {
846                 port->ignore_status_mask |= BI;
847                 /*
848                  * If we're ignoring parity and break indicators,
849                  * ignore overruns too (for real raw support).
850                  */
851                 if (termios->c_iflag & IGNPAR)
852                         port->ignore_status_mask |= OE;
853         }
854 
855         baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
856         quot = uart_get_divisor(port, baud);
857 
858         /* If discipline is not IRDA, apply ANOMALY_05000230 */
859         if (termios->c_line != N_IRDA)
860                 quot -= ANOMALY_05000230;
861 
862         UART_SET_ANOMALY_THRESHOLD(uart, USEC_PER_SEC / baud * 15);
863 
864         /* Wait till the transfer buffer is empty */
865         timeout = jiffies + msecs_to_jiffies(10);
866         while (UART_GET_GCTL(uart) & UCEN && !(UART_GET_LSR(uart) & TEMT))
867                 if (time_after(jiffies, timeout)) {
868                         dev_warn(port->dev, "timeout waiting for TX buffer empty\n");
869                         break;
870                 }
871 
872         /* Disable UART */
873         ier = UART_GET_IER(uart);
874         UART_PUT_GCTL(uart, UART_GET_GCTL(uart) & ~UCEN);
875         UART_DISABLE_INTS(uart);
876 
877         /* Set DLAB in LCR to Access CLK */
878         UART_SET_DLAB(uart);
879 
880         UART_PUT_CLK(uart, quot);
881         SSYNC();
882 
883         /* Clear DLAB in LCR to Access THR RBR IER */
884         UART_CLEAR_DLAB(uart);
885 
886         UART_PUT_LCR(uart, (UART_GET_LCR(uart) & ~LCR_MASK) | lcr);
887 
888         /* Enable UART */
889         UART_ENABLE_INTS(uart, ier);
890         UART_PUT_GCTL(uart, UART_GET_GCTL(uart) | UCEN);
891 
892         /* Port speed changed, update the per-port timeout. */
893         uart_update_timeout(port, termios->c_cflag, baud);
894 
895         spin_unlock_irqrestore(&uart->port.lock, flags);
896 }
897 
898 static const char *bfin_serial_type(struct uart_port *port)
899 {
900         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
901 
902         return uart->port.type == PORT_BFIN ? "BFIN-UART" : NULL;
903 }
904 
905 /*
906  * Release the memory region(s) being used by 'port'.
907  */
908 static void bfin_serial_release_port(struct uart_port *port)
909 {
910 }
911 
912 /*
913  * Request the memory region(s) being used by 'port'.
914  */
915 static int bfin_serial_request_port(struct uart_port *port)
916 {
917         return 0;
918 }
919 
920 /*
921  * Configure/autoconfigure the port.
922  */
923 static void bfin_serial_config_port(struct uart_port *port, int flags)
924 {
925         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
926 
927         if (flags & UART_CONFIG_TYPE &&
928             bfin_serial_request_port(&uart->port) == 0)
929                 uart->port.type = PORT_BFIN;
930 }
931 
932 /*
933  * Verify the new serial_struct (for TIOCSSERIAL).
934  * The only change we allow are to the flags and type, and
935  * even then only between PORT_BFIN and PORT_UNKNOWN
936  */
937 static int
938 bfin_serial_verify_port(struct uart_port *port, struct serial_struct *ser)
939 {
940         return 0;
941 }
942 
943 /*
944  * Enable the IrDA function if tty->ldisc.num is N_IRDA.
945  * In other cases, disable IrDA function.
946  */
947 static void bfin_serial_set_ldisc(struct uart_port *port, int ld)
948 {
949         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
950         unsigned int val;
951 
952         switch (ld) {
953         case N_IRDA:
954                 val = UART_GET_GCTL(uart);
955                 val |= (UMOD_IRDA | RPOLC);
956                 UART_PUT_GCTL(uart, val);
957                 break;
958         default:
959                 val = UART_GET_GCTL(uart);
960                 val &= ~(UMOD_MASK | RPOLC);
961                 UART_PUT_GCTL(uart, val);
962         }
963 }
964 
965 static void bfin_serial_reset_irda(struct uart_port *port)
966 {
967         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
968         unsigned int val;
969 
970         val = UART_GET_GCTL(uart);
971         val &= ~(UMOD_MASK | RPOLC);
972         UART_PUT_GCTL(uart, val);
973         SSYNC();
974         val |= (UMOD_IRDA | RPOLC);
975         UART_PUT_GCTL(uart, val);
976         SSYNC();
977 }
978 
979 #ifdef CONFIG_CONSOLE_POLL
980 /* Anomaly notes:
981  *  05000099 -  Because we only use THRE in poll_put and DR in poll_get,
982  *              losing other bits of UART_LSR is not a problem here.
983  */
984 static void bfin_serial_poll_put_char(struct uart_port *port, unsigned char chr)
985 {
986         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
987 
988         while (!(UART_GET_LSR(uart) & THRE))
989                 cpu_relax();
990 
991         UART_CLEAR_DLAB(uart);
992         UART_PUT_CHAR(uart, (unsigned char)chr);
993 }
994 
995 static int bfin_serial_poll_get_char(struct uart_port *port)
996 {
997         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
998         unsigned char chr;
999 
1000         while (!(UART_GET_LSR(uart) & DR))
1001                 cpu_relax();
1002 
1003         UART_CLEAR_DLAB(uart);
1004         chr = UART_GET_CHAR(uart);
1005 
1006         return chr;
1007 }
1008 #endif
1009 
1010 static struct uart_ops bfin_serial_pops = {
1011         .tx_empty       = bfin_serial_tx_empty,
1012         .set_mctrl      = bfin_serial_set_mctrl,
1013         .get_mctrl      = bfin_serial_get_mctrl,
1014         .stop_tx        = bfin_serial_stop_tx,
1015         .start_tx       = bfin_serial_start_tx,
1016         .stop_rx        = bfin_serial_stop_rx,
1017         .enable_ms      = bfin_serial_enable_ms,
1018         .break_ctl      = bfin_serial_break_ctl,
1019         .startup        = bfin_serial_startup,
1020         .shutdown       = bfin_serial_shutdown,
1021         .set_termios    = bfin_serial_set_termios,
1022         .set_ldisc      = bfin_serial_set_ldisc,
1023         .type           = bfin_serial_type,
1024         .release_port   = bfin_serial_release_port,
1025         .request_port   = bfin_serial_request_port,
1026         .config_port    = bfin_serial_config_port,
1027         .verify_port    = bfin_serial_verify_port,
1028 #ifdef CONFIG_CONSOLE_POLL
1029         .poll_put_char  = bfin_serial_poll_put_char,
1030         .poll_get_char  = bfin_serial_poll_get_char,
1031 #endif
1032 };
1033 
1034 #if defined(CONFIG_SERIAL_BFIN_CONSOLE) || defined(CONFIG_EARLY_PRINTK)
1035 /*
1036  * If the port was already initialised (eg, by a boot loader),
1037  * try to determine the current setup.
1038  */
1039 static void __init
1040 bfin_serial_console_get_options(struct bfin_serial_port *uart, int *baud,
1041                            int *parity, int *bits)
1042 {
1043         unsigned int status;
1044 
1045         status = UART_GET_IER(uart) & (ERBFI | ETBEI);
1046         if (status == (ERBFI | ETBEI)) {
1047                 /* ok, the port was enabled */
1048                 u32 lcr, clk;
1049 
1050                 lcr = UART_GET_LCR(uart);
1051 
1052                 *parity = 'n';
1053                 if (lcr & PEN) {
1054                         if (lcr & EPS)
1055                                 *parity = 'e';
1056                         else
1057                                 *parity = 'o';
1058                 }
1059                 *bits = ((lcr & WLS_MASK) >> WLS_OFFSET) + 5;
1060 
1061                 /* Set DLAB in LCR to Access CLK */
1062                 UART_SET_DLAB(uart);
1063 
1064                 clk = UART_GET_CLK(uart);
1065 
1066                 /* Clear DLAB in LCR to Access THR RBR IER */
1067                 UART_CLEAR_DLAB(uart);
1068 
1069                 *baud = get_sclk() / (16*clk);
1070         }
1071         pr_debug("%s:baud = %d, parity = %c, bits= %d\n", __func__, *baud, *parity, *bits);
1072 }
1073 
1074 static struct uart_driver bfin_serial_reg;
1075 
1076 static void bfin_serial_console_putchar(struct uart_port *port, int ch)
1077 {
1078         struct bfin_serial_port *uart = (struct bfin_serial_port *)port;
1079         while (!(UART_GET_LSR(uart) & THRE))
1080                 barrier();
1081         UART_PUT_CHAR(uart, ch);
1082 }
1083 
1084 #endif /* defined (CONFIG_SERIAL_BFIN_CONSOLE) ||
1085                  defined (CONFIG_EARLY_PRINTK) */
1086 
1087 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1088 #define CLASS_BFIN_CONSOLE      "bfin-console"
1089 /*
1090  * Interrupts are disabled on entering
1091  */
1092 static void
1093 bfin_serial_console_write(struct console *co, const char *s, unsigned int count)
1094 {
1095         struct bfin_serial_port *uart = bfin_serial_ports[co->index];
1096         unsigned long flags;
1097 
1098         spin_lock_irqsave(&uart->port.lock, flags);
1099         uart_console_write(&uart->port, s, count, bfin_serial_console_putchar);
1100         spin_unlock_irqrestore(&uart->port.lock, flags);
1101 
1102 }
1103 
1104 static int __init
1105 bfin_serial_console_setup(struct console *co, char *options)
1106 {
1107         struct bfin_serial_port *uart;
1108         int baud = 57600;
1109         int bits = 8;
1110         int parity = 'n';
1111 # if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1112         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1113         int flow = 'r';
1114 # else
1115         int flow = 'n';
1116 # endif
1117 
1118         /*
1119          * Check whether an invalid uart number has been specified, and
1120          * if so, search for the first available port that does have
1121          * console support.
1122          */
1123         if (co->index < 0 || co->index >= BFIN_UART_NR_PORTS)
1124                 return -ENODEV;
1125 
1126         uart = bfin_serial_ports[co->index];
1127         if (!uart)
1128                 return -ENODEV;
1129 
1130         if (options)
1131                 uart_parse_options(options, &baud, &parity, &bits, &flow);
1132         else
1133                 bfin_serial_console_get_options(uart, &baud, &parity, &bits);
1134 
1135         return uart_set_options(&uart->port, co, baud, parity, bits, flow);
1136 }
1137 
1138 static struct console bfin_serial_console = {
1139         .name           = BFIN_SERIAL_DEV_NAME,
1140         .write          = bfin_serial_console_write,
1141         .device         = uart_console_device,
1142         .setup          = bfin_serial_console_setup,
1143         .flags          = CON_PRINTBUFFER,
1144         .index          = -1,
1145         .data           = &bfin_serial_reg,
1146 };
1147 #define BFIN_SERIAL_CONSOLE     (&bfin_serial_console)
1148 #else
1149 #define BFIN_SERIAL_CONSOLE     NULL
1150 #endif /* CONFIG_SERIAL_BFIN_CONSOLE */
1151 
1152 #ifdef  CONFIG_EARLY_PRINTK
1153 static struct bfin_serial_port bfin_earlyprintk_port;
1154 #define CLASS_BFIN_EARLYPRINTK  "bfin-earlyprintk"
1155 
1156 /*
1157  * Interrupts are disabled on entering
1158  */
1159 static void
1160 bfin_earlyprintk_console_write(struct console *co, const char *s, unsigned int count)
1161 {
1162         unsigned long flags;
1163 
1164         if (bfin_earlyprintk_port.port.line != co->index)
1165                 return;
1166 
1167         spin_lock_irqsave(&bfin_earlyprintk_port.port.lock, flags);
1168         uart_console_write(&bfin_earlyprintk_port.port, s, count,
1169                 bfin_serial_console_putchar);
1170         spin_unlock_irqrestore(&bfin_earlyprintk_port.port.lock, flags);
1171 }
1172 
1173 /*
1174  * This should have a .setup or .early_setup in it, but then things get called
1175  * without the command line options, and the baud rate gets messed up - so
1176  * don't let the common infrastructure play with things. (see calls to setup
1177  * & earlysetup in ./kernel/printk.c:register_console()
1178  */
1179 static struct console bfin_early_serial_console __initdata = {
1180         .name = "early_BFuart",
1181         .write = bfin_earlyprintk_console_write,
1182         .device = uart_console_device,
1183         .flags = CON_PRINTBUFFER,
1184         .index = -1,
1185         .data  = &bfin_serial_reg,
1186 };
1187 #endif
1188 
1189 static struct uart_driver bfin_serial_reg = {
1190         .owner                  = THIS_MODULE,
1191         .driver_name            = DRIVER_NAME,
1192         .dev_name               = BFIN_SERIAL_DEV_NAME,
1193         .major                  = BFIN_SERIAL_MAJOR,
1194         .minor                  = BFIN_SERIAL_MINOR,
1195         .nr                     = BFIN_UART_NR_PORTS,
1196         .cons                   = BFIN_SERIAL_CONSOLE,
1197 };
1198 
1199 static int bfin_serial_suspend(struct platform_device *pdev, pm_message_t state)
1200 {
1201         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1202 
1203         return uart_suspend_port(&bfin_serial_reg, &uart->port);
1204 }
1205 
1206 static int bfin_serial_resume(struct platform_device *pdev)
1207 {
1208         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1209 
1210         return uart_resume_port(&bfin_serial_reg, &uart->port);
1211 }
1212 
1213 static int bfin_serial_probe(struct platform_device *pdev)
1214 {
1215         struct resource *res;
1216         struct bfin_serial_port *uart = NULL;
1217         int ret = 0;
1218 
1219         if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1220                 dev_err(&pdev->dev, "Wrong bfin uart platform device id.\n");
1221                 return -ENOENT;
1222         }
1223 
1224         if (bfin_serial_ports[pdev->id] == NULL) {
1225 
1226                 uart = kzalloc(sizeof(*uart), GFP_KERNEL);
1227                 if (!uart) {
1228                         dev_err(&pdev->dev,
1229                                 "fail to malloc bfin_serial_port\n");
1230                         return -ENOMEM;
1231                 }
1232                 bfin_serial_ports[pdev->id] = uart;
1233 
1234 #ifdef CONFIG_EARLY_PRINTK
1235                 if (!(bfin_earlyprintk_port.port.membase
1236                         && bfin_earlyprintk_port.port.line == pdev->id)) {
1237                         /*
1238                          * If the peripheral PINs of current port is allocated
1239                          * in earlyprintk probe stage, don't do it again.
1240                          */
1241 #endif
1242                 ret = peripheral_request_list(
1243                         dev_get_platdata(&pdev->dev),
1244                         DRIVER_NAME);
1245                 if (ret) {
1246                         dev_err(&pdev->dev,
1247                                 "fail to request bfin serial peripherals\n");
1248                         goto out_error_free_mem;
1249                 }
1250 #ifdef CONFIG_EARLY_PRINTK
1251                 }
1252 #endif
1253 
1254                 spin_lock_init(&uart->port.lock);
1255                 uart->port.uartclk   = get_sclk();
1256                 uart->port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1257                 uart->port.ops       = &bfin_serial_pops;
1258                 uart->port.line      = pdev->id;
1259                 uart->port.iotype    = UPIO_MEM;
1260                 uart->port.flags     = UPF_BOOT_AUTOCONF;
1261 
1262                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1263                 if (res == NULL) {
1264                         dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1265                         ret = -ENOENT;
1266                         goto out_error_free_peripherals;
1267                 }
1268 
1269                 uart->port.membase = ioremap(res->start, resource_size(res));
1270                 if (!uart->port.membase) {
1271                         dev_err(&pdev->dev, "Cannot map uart IO\n");
1272                         ret = -ENXIO;
1273                         goto out_error_free_peripherals;
1274                 }
1275                 uart->port.mapbase = res->start;
1276 
1277                 uart->tx_irq = platform_get_irq(pdev, 0);
1278                 if (uart->tx_irq < 0) {
1279                         dev_err(&pdev->dev, "No uart TX IRQ specified\n");
1280                         ret = -ENOENT;
1281                         goto out_error_unmap;
1282                 }
1283 
1284                 uart->rx_irq = platform_get_irq(pdev, 1);
1285                 if (uart->rx_irq < 0) {
1286                         dev_err(&pdev->dev, "No uart RX IRQ specified\n");
1287                         ret = -ENOENT;
1288                         goto out_error_unmap;
1289                 }
1290                 uart->port.irq = uart->rx_irq;
1291 
1292                 uart->status_irq = platform_get_irq(pdev, 2);
1293                 if (uart->status_irq < 0) {
1294                         dev_err(&pdev->dev, "No uart status IRQ specified\n");
1295                         ret = -ENOENT;
1296                         goto out_error_unmap;
1297                 }
1298 
1299 #ifdef CONFIG_SERIAL_BFIN_DMA
1300                 spin_lock_init(&uart->rx_lock);
1301                 uart->tx_done       = 1;
1302                 uart->tx_count      = 0;
1303 
1304                 res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1305                 if (res == NULL) {
1306                         dev_err(&pdev->dev, "No uart TX DMA channel specified\n");
1307                         ret = -ENOENT;
1308                         goto out_error_unmap;
1309                 }
1310                 uart->tx_dma_channel = res->start;
1311 
1312                 res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1313                 if (res == NULL) {
1314                         dev_err(&pdev->dev, "No uart RX DMA channel specified\n");
1315                         ret = -ENOENT;
1316                         goto out_error_unmap;
1317                 }
1318                 uart->rx_dma_channel = res->start;
1319 
1320                 init_timer(&(uart->rx_dma_timer));
1321 #endif
1322 
1323 #if defined(CONFIG_SERIAL_BFIN_CTSRTS) || \
1324         defined(CONFIG_SERIAL_BFIN_HARD_CTSRTS)
1325                 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1326                 if (res == NULL)
1327                         uart->cts_pin = -1;
1328                 else {
1329                         uart->cts_pin = res->start;
1330 #ifdef CONFIG_SERIAL_BFIN_CTSRTS
1331                         uart->port.flags |= ASYNC_CTS_FLOW;
1332 #endif
1333                 }
1334 
1335                 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
1336                 if (res == NULL)
1337                         uart->rts_pin = -1;
1338                 else
1339                         uart->rts_pin = res->start;
1340 #endif
1341         }
1342 
1343 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1344         if (!is_early_platform_device(pdev)) {
1345 #endif
1346                 uart = bfin_serial_ports[pdev->id];
1347                 uart->port.dev = &pdev->dev;
1348                 dev_set_drvdata(&pdev->dev, uart);
1349                 ret = uart_add_one_port(&bfin_serial_reg, &uart->port);
1350 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1351         }
1352 #endif
1353 
1354         if (!ret)
1355                 return 0;
1356 
1357         if (uart) {
1358 out_error_unmap:
1359                 iounmap(uart->port.membase);
1360 out_error_free_peripherals:
1361                 peripheral_free_list(dev_get_platdata(&pdev->dev));
1362 out_error_free_mem:
1363                 kfree(uart);
1364                 bfin_serial_ports[pdev->id] = NULL;
1365         }
1366 
1367         return ret;
1368 }
1369 
1370 static int bfin_serial_remove(struct platform_device *pdev)
1371 {
1372         struct bfin_serial_port *uart = platform_get_drvdata(pdev);
1373 
1374         dev_set_drvdata(&pdev->dev, NULL);
1375 
1376         if (uart) {
1377                 uart_remove_one_port(&bfin_serial_reg, &uart->port);
1378                 iounmap(uart->port.membase);
1379                 peripheral_free_list(dev_get_platdata(&pdev->dev));
1380                 kfree(uart);
1381                 bfin_serial_ports[pdev->id] = NULL;
1382         }
1383 
1384         return 0;
1385 }
1386 
1387 static struct platform_driver bfin_serial_driver = {
1388         .probe          = bfin_serial_probe,
1389         .remove         = bfin_serial_remove,
1390         .suspend        = bfin_serial_suspend,
1391         .resume         = bfin_serial_resume,
1392         .driver         = {
1393                 .name   = DRIVER_NAME,
1394                 .owner  = THIS_MODULE,
1395         },
1396 };
1397 
1398 #if defined(CONFIG_SERIAL_BFIN_CONSOLE)
1399 static struct early_platform_driver early_bfin_serial_driver __initdata = {
1400         .class_str = CLASS_BFIN_CONSOLE,
1401         .pdrv = &bfin_serial_driver,
1402         .requested_id = EARLY_PLATFORM_ID_UNSET,
1403 };
1404 
1405 static int __init bfin_serial_rs_console_init(void)
1406 {
1407         early_platform_driver_register(&early_bfin_serial_driver, DRIVER_NAME);
1408 
1409         early_platform_driver_probe(CLASS_BFIN_CONSOLE, BFIN_UART_NR_PORTS, 0);
1410 
1411         register_console(&bfin_serial_console);
1412 
1413         return 0;
1414 }
1415 console_initcall(bfin_serial_rs_console_init);
1416 #endif
1417 
1418 #ifdef CONFIG_EARLY_PRINTK
1419 /*
1420  * Memory can't be allocated dynamically during earlyprink init stage.
1421  * So, do individual probe for earlyprink with a static uart port variable.
1422  */
1423 static int bfin_earlyprintk_probe(struct platform_device *pdev)
1424 {
1425         struct resource *res;
1426         int ret;
1427 
1428         if (pdev->id < 0 || pdev->id >= BFIN_UART_NR_PORTS) {
1429                 dev_err(&pdev->dev, "Wrong earlyprintk platform device id.\n");
1430                 return -ENOENT;
1431         }
1432 
1433         ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
1434                                         DRIVER_NAME);
1435         if (ret) {
1436                 dev_err(&pdev->dev,
1437                                 "fail to request bfin serial peripherals\n");
1438                         return ret;
1439         }
1440 
1441         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1442         if (res == NULL) {
1443                 dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
1444                 ret = -ENOENT;
1445                 goto out_error_free_peripherals;
1446         }
1447 
1448         bfin_earlyprintk_port.port.membase = ioremap(res->start,
1449                                                      resource_size(res));
1450         if (!bfin_earlyprintk_port.port.membase) {
1451                 dev_err(&pdev->dev, "Cannot map uart IO\n");
1452                 ret = -ENXIO;
1453                 goto out_error_free_peripherals;
1454         }
1455         bfin_earlyprintk_port.port.mapbase = res->start;
1456         bfin_earlyprintk_port.port.line = pdev->id;
1457         bfin_earlyprintk_port.port.uartclk = get_sclk();
1458         bfin_earlyprintk_port.port.fifosize  = BFIN_UART_TX_FIFO_SIZE;
1459         spin_lock_init(&bfin_earlyprintk_port.port.lock);
1460 
1461         return 0;
1462 
1463 out_error_free_peripherals:
1464         peripheral_free_list(dev_get_platdata(&pdev->dev));
1465 
1466         return ret;
1467 }
1468 
1469 static struct platform_driver bfin_earlyprintk_driver = {
1470         .probe          = bfin_earlyprintk_probe,
1471         .driver         = {
1472                 .name   = DRIVER_NAME,
1473                 .owner  = THIS_MODULE,
1474         },
1475 };
1476 
1477 static struct early_platform_driver early_bfin_earlyprintk_driver __initdata = {
1478         .class_str = CLASS_BFIN_EARLYPRINTK,
1479         .pdrv = &bfin_earlyprintk_driver,
1480         .requested_id = EARLY_PLATFORM_ID_UNSET,
1481 };
1482 
1483 struct console __init *bfin_earlyserial_init(unsigned int port,
1484                                                 unsigned int cflag)
1485 {
1486         struct ktermios t;
1487         char port_name[20];
1488 
1489         if (port < 0 || port >= BFIN_UART_NR_PORTS)
1490                 return NULL;
1491 
1492         /*
1493          * Only probe resource of the given port in earlyprintk boot arg.
1494          * The expected port id should be indicated in port name string.
1495          */
1496         snprintf(port_name, 20, DRIVER_NAME ".%d", port);
1497         early_platform_driver_register(&early_bfin_earlyprintk_driver,
1498                 port_name);
1499         early_platform_driver_probe(CLASS_BFIN_EARLYPRINTK, 1, 0);
1500 
1501         if (!bfin_earlyprintk_port.port.membase)
1502                 return NULL;
1503 
1504 #ifdef CONFIG_SERIAL_BFIN_CONSOLE
1505         /*
1506          * If we are using early serial, don't let the normal console rewind
1507          * log buffer, since that causes things to be printed multiple times
1508          */
1509         bfin_serial_console.flags &= ~CON_PRINTBUFFER;
1510 #endif
1511 
1512         bfin_early_serial_console.index = port;
1513         t.c_cflag = cflag;
1514         t.c_iflag = 0;
1515         t.c_oflag = 0;
1516         t.c_lflag = ICANON;
1517         t.c_line = port;
1518         bfin_serial_set_termios(&bfin_earlyprintk_port.port, &t, &t);
1519 
1520         return &bfin_early_serial_console;
1521 }
1522 #endif /* CONFIG_EARLY_PRINTK */
1523 
1524 static int __init bfin_serial_init(void)
1525 {
1526         int ret;
1527 
1528         pr_info("Blackfin serial driver\n");
1529 
1530         ret = uart_register_driver(&bfin_serial_reg);
1531         if (ret) {
1532                 pr_err("failed to register %s:%d\n",
1533                         bfin_serial_reg.driver_name, ret);
1534         }
1535 
1536         ret = platform_driver_register(&bfin_serial_driver);
1537         if (ret) {
1538                 pr_err("fail to register bfin uart\n");
1539                 uart_unregister_driver(&bfin_serial_reg);
1540         }
1541 
1542         return ret;
1543 }
1544 
1545 static void __exit bfin_serial_exit(void)
1546 {
1547         platform_driver_unregister(&bfin_serial_driver);
1548         uart_unregister_driver(&bfin_serial_reg);
1549 }
1550 
1551 
1552 module_init(bfin_serial_init);
1553 module_exit(bfin_serial_exit);
1554 
1555 MODULE_AUTHOR("Sonic Zhang, Aubrey Li");
1556 MODULE_DESCRIPTION("Blackfin generic serial port driver");
1557 MODULE_LICENSE("GPL");
1558 MODULE_ALIAS_CHARDEV_MAJOR(BFIN_SERIAL_MAJOR);
1559 MODULE_ALIAS("platform:bfin-uart");
1560 

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