Version:  2.0.40 2.2.26 2.4.37 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17

Linux/drivers/tty/serial/bfin_sport_uart.c

  1 /*
  2  * Blackfin On-Chip Sport Emulated UART Driver
  3  *
  4  * Copyright 2006-2009 Analog Devices Inc.
  5  *
  6  * Enter bugs at http://blackfin.uclinux.org/
  7  *
  8  * Licensed under the GPL-2 or later.
  9  */
 10 
 11 /*
 12  * This driver and the hardware supported are in term of EE-191 of ADI.
 13  * http://www.analog.com/static/imported-files/application_notes/EE191.pdf 
 14  * This application note describe how to implement a UART on a Sharc DSP,
 15  * but this driver is implemented on Blackfin Processor.
 16  * Transmit Frame Sync is not used by this driver to transfer data out.
 17  */
 18 
 19 /* #define DEBUG */
 20 
 21 #define DRV_NAME "bfin-sport-uart"
 22 #define DEVICE_NAME     "ttySS"
 23 #define pr_fmt(fmt) DRV_NAME ": " fmt
 24 
 25 #include <linux/module.h>
 26 #include <linux/ioport.h>
 27 #include <linux/io.h>
 28 #include <linux/init.h>
 29 #include <linux/console.h>
 30 #include <linux/sysrq.h>
 31 #include <linux/slab.h>
 32 #include <linux/platform_device.h>
 33 #include <linux/tty.h>
 34 #include <linux/tty_flip.h>
 35 #include <linux/serial_core.h>
 36 
 37 #include <asm/bfin_sport.h>
 38 #include <asm/delay.h>
 39 #include <asm/portmux.h>
 40 
 41 #include "bfin_sport_uart.h"
 42 
 43 struct sport_uart_port {
 44         struct uart_port        port;
 45         int                     err_irq;
 46         unsigned short          csize;
 47         unsigned short          rxmask;
 48         unsigned short          txmask1;
 49         unsigned short          txmask2;
 50         unsigned char           stopb;
 51 /*      unsigned char           parib; */
 52 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
 53         int cts_pin;
 54         int rts_pin;
 55 #endif
 56 };
 57 
 58 static int sport_uart_tx_chars(struct sport_uart_port *up);
 59 static void sport_stop_tx(struct uart_port *port);
 60 
 61 static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
 62 {
 63         pr_debug("%s value:%x, mask1=0x%x, mask2=0x%x\n", __func__, value,
 64                 up->txmask1, up->txmask2);
 65 
 66         /* Place Start and Stop bits */
 67         __asm__ __volatile__ (
 68                 "%[val] <<= 1;"
 69                 "%[val] = %[val] & %[mask1];"
 70                 "%[val] = %[val] | %[mask2];"
 71                 : [val]"+d"(value)
 72                 : [mask1]"d"(up->txmask1), [mask2]"d"(up->txmask2)
 73                 : "ASTAT"
 74         );
 75         pr_debug("%s value:%x\n", __func__, value);
 76 
 77         SPORT_PUT_TX(up, value);
 78 }
 79 
 80 static inline unsigned char rx_one_byte(struct sport_uart_port *up)
 81 {
 82         unsigned int value;
 83         unsigned char extract;
 84         u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
 85 
 86         if ((up->csize + up->stopb) > 7)
 87                 value = SPORT_GET_RX32(up);
 88         else
 89                 value = SPORT_GET_RX(up);
 90 
 91         pr_debug("%s value:%x, cs=%d, mask=0x%x\n", __func__, value,
 92                 up->csize, up->rxmask);
 93 
 94         /* Extract data */
 95         __asm__ __volatile__ (
 96                 "%[extr] = 0;"
 97                 "%[mask1] = %[rxmask];"
 98                 "%[mask2] = 0x0200(Z);"
 99                 "%[shift] = 0;"
100                 "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
101                 ".Lloop_s:"
102                 "%[tmp] = extract(%[val], %[mask1].L)(Z);"
103                 "%[tmp] <<= %[shift];"
104                 "%[extr] = %[extr] | %[tmp];"
105                 "%[mask1] = %[mask1] - %[mask2];"
106                 ".Lloop_e:"
107                 "%[shift] += 1;"
108                 : [extr]"=&d"(extract), [shift]"=&d"(tmp_shift), [tmp]"=&d"(tmp),
109                   [mask1]"=&d"(tmp_mask1), [mask2]"=&d"(tmp_mask2)
110                 : [val]"d"(value), [rxmask]"d"(up->rxmask), [lc]"a"(up->csize)
111                 : "ASTAT", "LB0", "LC0", "LT0"
112         );
113 
114         pr_debug("      extract:%x\n", extract);
115         return extract;
116 }
117 
118 static int sport_uart_setup(struct sport_uart_port *up, int size, int baud_rate)
119 {
120         int tclkdiv, rclkdiv;
121         unsigned int sclk = get_sclk();
122 
123         /* Set TCR1 and TCR2, TFSR is not enabled for uart */
124         SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK));
125         SPORT_PUT_TCR2(up, size + 1);
126         pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
127 
128         /* Set RCR1 and RCR2 */
129         SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
130         SPORT_PUT_RCR2(up, (size + 1) * 2 - 1);
131         pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
132 
133         tclkdiv = sclk / (2 * baud_rate) - 1;
134         /* The actual uart baud rate of devices vary between +/-2%. The sport
135          * RX sample rate should be faster than the double of the worst case,
136          * otherwise, wrong data are received. So, set sport RX clock to be
137          * 3% faster.
138          */
139         rclkdiv = sclk / (2 * baud_rate * 2 * 97 / 100) - 1;
140         SPORT_PUT_TCLKDIV(up, tclkdiv);
141         SPORT_PUT_RCLKDIV(up, rclkdiv);
142         SSYNC();
143         pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, rclkdiv:%d\n",
144                         __func__, sclk, baud_rate, tclkdiv, rclkdiv);
145 
146         return 0;
147 }
148 
149 static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
150 {
151         struct sport_uart_port *up = dev_id;
152         struct tty_port *port = &up->port.state->port;
153         unsigned int ch;
154 
155         spin_lock(&up->port.lock);
156 
157         while (SPORT_GET_STAT(up) & RXNE) {
158                 ch = rx_one_byte(up);
159                 up->port.icount.rx++;
160 
161                 if (!uart_handle_sysrq_char(&up->port, ch))
162                         tty_insert_flip_char(port, ch, TTY_NORMAL);
163         }
164 
165         spin_unlock(&up->port.lock);
166 
167         /* XXX this won't deadlock with lowlat? */
168         tty_flip_buffer_push(port);
169 
170         return IRQ_HANDLED;
171 }
172 
173 static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
174 {
175         struct sport_uart_port *up = dev_id;
176 
177         spin_lock(&up->port.lock);
178         sport_uart_tx_chars(up);
179         spin_unlock(&up->port.lock);
180 
181         return IRQ_HANDLED;
182 }
183 
184 static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
185 {
186         struct sport_uart_port *up = dev_id;
187         unsigned int stat = SPORT_GET_STAT(up);
188 
189         spin_lock(&up->port.lock);
190 
191         /* Overflow in RX FIFO */
192         if (stat & ROVF) {
193                 up->port.icount.overrun++;
194                 tty_insert_flip_char(&up->port.state->port, 0, TTY_OVERRUN);
195                 SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
196         }
197         /* These should not happen */
198         if (stat & (TOVF | TUVF | RUVF)) {
199                 pr_err("SPORT Error:%s %s %s\n",
200                        (stat & TOVF) ? "TX overflow" : "",
201                        (stat & TUVF) ? "TX underflow" : "",
202                        (stat & RUVF) ? "RX underflow" : "");
203                 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
204                 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
205         }
206         SSYNC();
207 
208         spin_unlock(&up->port.lock);
209         /* XXX we don't push the overrun bit to TTY? */
210 
211         return IRQ_HANDLED;
212 }
213 
214 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
215 static unsigned int sport_get_mctrl(struct uart_port *port)
216 {
217         struct sport_uart_port *up = (struct sport_uart_port *)port;
218         if (up->cts_pin < 0)
219                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
220 
221         /* CTS PIN is negative assertive. */
222         if (SPORT_UART_GET_CTS(up))
223                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
224         else
225                 return TIOCM_DSR | TIOCM_CAR;
226 }
227 
228 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
229 {
230         struct sport_uart_port *up = (struct sport_uart_port *)port;
231         if (up->rts_pin < 0)
232                 return;
233 
234         /* RTS PIN is negative assertive. */
235         if (mctrl & TIOCM_RTS)
236                 SPORT_UART_ENABLE_RTS(up);
237         else
238                 SPORT_UART_DISABLE_RTS(up);
239 }
240 
241 /*
242  * Handle any change of modem status signal.
243  */
244 static irqreturn_t sport_mctrl_cts_int(int irq, void *dev_id)
245 {
246         struct sport_uart_port *up = (struct sport_uart_port *)dev_id;
247         unsigned int status;
248 
249         status = sport_get_mctrl(&up->port);
250         uart_handle_cts_change(&up->port, status & TIOCM_CTS);
251 
252         return IRQ_HANDLED;
253 }
254 #else
255 static unsigned int sport_get_mctrl(struct uart_port *port)
256 {
257         pr_debug("%s enter\n", __func__);
258         return TIOCM_CTS | TIOCM_CD | TIOCM_DSR;
259 }
260 
261 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
262 {
263         pr_debug("%s enter\n", __func__);
264 }
265 #endif
266 
267 /* Reqeust IRQ, Setup clock */
268 static int sport_startup(struct uart_port *port)
269 {
270         struct sport_uart_port *up = (struct sport_uart_port *)port;
271         int ret;
272 
273         pr_debug("%s enter\n", __func__);
274         ret = request_irq(up->port.irq, sport_uart_rx_irq, 0,
275                 "SPORT_UART_RX", up);
276         if (ret) {
277                 dev_err(port->dev, "unable to request SPORT RX interrupt\n");
278                 return ret;
279         }
280 
281         ret = request_irq(up->port.irq+1, sport_uart_tx_irq, 0,
282                 "SPORT_UART_TX", up);
283         if (ret) {
284                 dev_err(port->dev, "unable to request SPORT TX interrupt\n");
285                 goto fail1;
286         }
287 
288         ret = request_irq(up->err_irq, sport_uart_err_irq, 0,
289                 "SPORT_UART_STATUS", up);
290         if (ret) {
291                 dev_err(port->dev, "unable to request SPORT status interrupt\n");
292                 goto fail2;
293         }
294 
295 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
296         if (up->cts_pin >= 0) {
297                 if (request_irq(gpio_to_irq(up->cts_pin),
298                         sport_mctrl_cts_int,
299                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
300                         0, "BFIN_SPORT_UART_CTS", up)) {
301                         up->cts_pin = -1;
302                         dev_info(port->dev, "Unable to attach BlackFin UART over SPORT CTS interrupt. So, disable it.\n");
303                 }
304         }
305         if (up->rts_pin >= 0) {
306                 if (gpio_request(up->rts_pin, DRV_NAME)) {
307                         dev_info(port->dev, "fail to request RTS PIN at GPIO_%d\n", up->rts_pin);
308                         up->rts_pin = -1;
309                 } else
310                         gpio_direction_output(up->rts_pin, 0);
311         }
312 #endif
313 
314         return 0;
315  fail2:
316         free_irq(up->port.irq+1, up);
317  fail1:
318         free_irq(up->port.irq, up);
319 
320         return ret;
321 }
322 
323 /*
324  * sport_uart_tx_chars
325  *
326  * ret 1 means need to enable sport.
327  * ret 0 means do nothing.
328  */
329 static int sport_uart_tx_chars(struct sport_uart_port *up)
330 {
331         struct circ_buf *xmit = &up->port.state->xmit;
332 
333         if (SPORT_GET_STAT(up) & TXF)
334                 return 0;
335 
336         if (up->port.x_char) {
337                 tx_one_byte(up, up->port.x_char);
338                 up->port.icount.tx++;
339                 up->port.x_char = 0;
340                 return 1;
341         }
342 
343         if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
344                 /* The waiting loop to stop SPORT TX from TX interrupt is
345                  * too long. This may block SPORT RX interrupts and cause
346                  * RX FIFO overflow. So, do stop sport TX only after the last
347                  * char in TX FIFO is moved into the shift register.
348                  */
349                 if (SPORT_GET_STAT(up) & TXHRE)
350                         sport_stop_tx(&up->port);
351                 return 0;
352         }
353 
354         while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
355                 tx_one_byte(up, xmit->buf[xmit->tail]);
356                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
357                 up->port.icount.tx++;
358         }
359 
360         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
361                 uart_write_wakeup(&up->port);
362 
363         return 1;
364 }
365 
366 static unsigned int sport_tx_empty(struct uart_port *port)
367 {
368         struct sport_uart_port *up = (struct sport_uart_port *)port;
369         unsigned int stat;
370 
371         stat = SPORT_GET_STAT(up);
372         pr_debug("%s stat:%04x\n", __func__, stat);
373         if (stat & TXHRE) {
374                 return TIOCSER_TEMT;
375         } else
376                 return 0;
377 }
378 
379 static void sport_stop_tx(struct uart_port *port)
380 {
381         struct sport_uart_port *up = (struct sport_uart_port *)port;
382 
383         pr_debug("%s enter\n", __func__);
384 
385         if (!(SPORT_GET_TCR1(up) & TSPEN))
386                 return;
387 
388         /* Although the hold register is empty, last byte is still in shift
389          * register and not sent out yet. So, put a dummy data into TX FIFO.
390          * Then, sport tx stops when last byte is shift out and the dummy
391          * data is moved into the shift register.
392          */
393         SPORT_PUT_TX(up, 0xffff);
394         while (!(SPORT_GET_STAT(up) & TXHRE))
395                 cpu_relax();
396 
397         SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
398         SSYNC();
399 
400         return;
401 }
402 
403 static void sport_start_tx(struct uart_port *port)
404 {
405         struct sport_uart_port *up = (struct sport_uart_port *)port;
406 
407         pr_debug("%s enter\n", __func__);
408 
409         /* Write data into SPORT FIFO before enable SPROT to transmit */
410         if (sport_uart_tx_chars(up)) {
411                 /* Enable transmit, then an interrupt will generated */
412                 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
413                 SSYNC();
414         }
415 
416         pr_debug("%s exit\n", __func__);
417 }
418 
419 static void sport_stop_rx(struct uart_port *port)
420 {
421         struct sport_uart_port *up = (struct sport_uart_port *)port;
422 
423         pr_debug("%s enter\n", __func__);
424         /* Disable sport to stop rx */
425         SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
426         SSYNC();
427 }
428 
429 static void sport_break_ctl(struct uart_port *port, int break_state)
430 {
431         pr_debug("%s enter\n", __func__);
432 }
433 
434 static void sport_shutdown(struct uart_port *port)
435 {
436         struct sport_uart_port *up = (struct sport_uart_port *)port;
437 
438         dev_dbg(port->dev, "%s enter\n", __func__);
439 
440         /* Disable sport */
441         SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
442         SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
443         SSYNC();
444 
445         free_irq(up->port.irq, up);
446         free_irq(up->port.irq+1, up);
447         free_irq(up->err_irq, up);
448 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
449         if (up->cts_pin >= 0)
450                 free_irq(gpio_to_irq(up->cts_pin), up);
451         if (up->rts_pin >= 0)
452                 gpio_free(up->rts_pin);
453 #endif
454 }
455 
456 static const char *sport_type(struct uart_port *port)
457 {
458         struct sport_uart_port *up = (struct sport_uart_port *)port;
459 
460         pr_debug("%s enter\n", __func__);
461         return up->port.type == PORT_BFIN_SPORT ? "BFIN-SPORT-UART" : NULL;
462 }
463 
464 static void sport_release_port(struct uart_port *port)
465 {
466         pr_debug("%s enter\n", __func__);
467 }
468 
469 static int sport_request_port(struct uart_port *port)
470 {
471         pr_debug("%s enter\n", __func__);
472         return 0;
473 }
474 
475 static void sport_config_port(struct uart_port *port, int flags)
476 {
477         struct sport_uart_port *up = (struct sport_uart_port *)port;
478 
479         pr_debug("%s enter\n", __func__);
480         up->port.type = PORT_BFIN_SPORT;
481 }
482 
483 static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
484 {
485         pr_debug("%s enter\n", __func__);
486         return 0;
487 }
488 
489 static void sport_set_termios(struct uart_port *port,
490                 struct ktermios *termios, struct ktermios *old)
491 {
492         struct sport_uart_port *up = (struct sport_uart_port *)port;
493         unsigned long flags;
494         int i;
495 
496         pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
497 
498 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
499         if (old == NULL && up->cts_pin != -1)
500                 termios->c_cflag |= CRTSCTS;
501         else if (up->cts_pin == -1)
502                 termios->c_cflag &= ~CRTSCTS;
503 #endif
504 
505         switch (termios->c_cflag & CSIZE) {
506         case CS8:
507                 up->csize = 8;
508                 break;
509         case CS7:
510                 up->csize = 7;
511                 break;
512         case CS6:
513                 up->csize = 6;
514                 break;
515         case CS5:
516                 up->csize = 5;
517                 break;
518         default:
519                 pr_warning("requested word length not supported\n");
520         }
521 
522         if (termios->c_cflag & CSTOPB) {
523                 up->stopb = 1;
524         }
525         if (termios->c_cflag & PARENB) {
526                 pr_warning("PAREN bits is not supported yet\n");
527                 /* up->parib = 1; */
528         }
529 
530         spin_lock_irqsave(&up->port.lock, flags);
531 
532         port->read_status_mask = 0;
533 
534         /*
535          * Characters to ignore
536          */
537         port->ignore_status_mask = 0;
538 
539         /* RX extract mask */
540         up->rxmask = 0x01 | (((up->csize + up->stopb) * 2 - 1) << 0x8);
541         /* TX masks, 8 bit data and 1 bit stop for example:
542          * mask1 = b#0111111110
543          * mask2 = b#1000000000
544          */
545         for (i = 0, up->txmask1 = 0; i < up->csize; i++)
546                 up->txmask1 |= (1<<i);
547         up->txmask2 = (1<<i);
548         if (up->stopb) {
549                 ++i;
550                 up->txmask2 |= (1<<i);
551         }
552         up->txmask1 <<= 1;
553         up->txmask2 <<= 1;
554         /* uart baud rate */
555         port->uartclk = uart_get_baud_rate(port, termios, old, 0, get_sclk()/16);
556 
557         /* Disable UART */
558         SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
559         SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
560 
561         sport_uart_setup(up, up->csize + up->stopb, port->uartclk);
562 
563         /* driver TX line high after config, one dummy data is
564          * necessary to stop sport after shift one byte
565          */
566         SPORT_PUT_TX(up, 0xffff);
567         SPORT_PUT_TX(up, 0xffff);
568         SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
569         SSYNC();
570         while (!(SPORT_GET_STAT(up) & TXHRE))
571                 cpu_relax();
572         SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
573         SSYNC();
574 
575         /* Port speed changed, update the per-port timeout. */
576         uart_update_timeout(port, termios->c_cflag, port->uartclk);
577 
578         /* Enable sport rx */
579         SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) | RSPEN);
580         SSYNC();
581 
582         spin_unlock_irqrestore(&up->port.lock, flags);
583 }
584 
585 struct uart_ops sport_uart_ops = {
586         .tx_empty       = sport_tx_empty,
587         .set_mctrl      = sport_set_mctrl,
588         .get_mctrl      = sport_get_mctrl,
589         .stop_tx        = sport_stop_tx,
590         .start_tx       = sport_start_tx,
591         .stop_rx        = sport_stop_rx,
592         .break_ctl      = sport_break_ctl,
593         .startup        = sport_startup,
594         .shutdown       = sport_shutdown,
595         .set_termios    = sport_set_termios,
596         .type           = sport_type,
597         .release_port   = sport_release_port,
598         .request_port   = sport_request_port,
599         .config_port    = sport_config_port,
600         .verify_port    = sport_verify_port,
601 };
602 
603 #define BFIN_SPORT_UART_MAX_PORTS 4
604 
605 static struct sport_uart_port *bfin_sport_uart_ports[BFIN_SPORT_UART_MAX_PORTS];
606 
607 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
608 #define CLASS_BFIN_SPORT_CONSOLE        "bfin-sport-console"
609 
610 static int __init
611 sport_uart_console_setup(struct console *co, char *options)
612 {
613         struct sport_uart_port *up;
614         int baud = 57600;
615         int bits = 8;
616         int parity = 'n';
617 # ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
618         int flow = 'r';
619 # else
620         int flow = 'n';
621 # endif
622 
623         /* Check whether an invalid uart number has been specified */
624         if (co->index < 0 || co->index >= BFIN_SPORT_UART_MAX_PORTS)
625                 return -ENODEV;
626 
627         up = bfin_sport_uart_ports[co->index];
628         if (!up)
629                 return -ENODEV;
630 
631         if (options)
632                 uart_parse_options(options, &baud, &parity, &bits, &flow);
633 
634         return uart_set_options(&up->port, co, baud, parity, bits, flow);
635 }
636 
637 static void sport_uart_console_putchar(struct uart_port *port, int ch)
638 {
639         struct sport_uart_port *up = (struct sport_uart_port *)port;
640 
641         while (SPORT_GET_STAT(up) & TXF)
642                 barrier();
643 
644         tx_one_byte(up, ch);
645 }
646 
647 /*
648  * Interrupts are disabled on entering
649  */
650 static void
651 sport_uart_console_write(struct console *co, const char *s, unsigned int count)
652 {
653         struct sport_uart_port *up = bfin_sport_uart_ports[co->index];
654         unsigned long flags;
655 
656         spin_lock_irqsave(&up->port.lock, flags);
657 
658         if (SPORT_GET_TCR1(up) & TSPEN)
659                 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
660         else {
661                 /* dummy data to start sport */
662                 while (SPORT_GET_STAT(up) & TXF)
663                         barrier();
664                 SPORT_PUT_TX(up, 0xffff);
665                 /* Enable transmit, then an interrupt will generated */
666                 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
667                 SSYNC();
668 
669                 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
670 
671                 /* Although the hold register is empty, last byte is still in shift
672                  * register and not sent out yet. So, put a dummy data into TX FIFO.
673                  * Then, sport tx stops when last byte is shift out and the dummy
674                  * data is moved into the shift register.
675                  */
676                 while (SPORT_GET_STAT(up) & TXF)
677                         barrier();
678                 SPORT_PUT_TX(up, 0xffff);
679                 while (!(SPORT_GET_STAT(up) & TXHRE))
680                         barrier();
681 
682                 /* Stop sport tx transfer */
683                 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
684                 SSYNC();
685         }
686 
687         spin_unlock_irqrestore(&up->port.lock, flags);
688 }
689 
690 static struct uart_driver sport_uart_reg;
691 
692 static struct console sport_uart_console = {
693         .name           = DEVICE_NAME,
694         .write          = sport_uart_console_write,
695         .device         = uart_console_device,
696         .setup          = sport_uart_console_setup,
697         .flags          = CON_PRINTBUFFER,
698         .index          = -1,
699         .data           = &sport_uart_reg,
700 };
701 
702 #define SPORT_UART_CONSOLE      (&sport_uart_console)
703 #else
704 #define SPORT_UART_CONSOLE      NULL
705 #endif /* CONFIG_SERIAL_BFIN_SPORT_CONSOLE */
706 
707 
708 static struct uart_driver sport_uart_reg = {
709         .owner          = THIS_MODULE,
710         .driver_name    = DRV_NAME,
711         .dev_name       = DEVICE_NAME,
712         .major          = 204,
713         .minor          = 84,
714         .nr             = BFIN_SPORT_UART_MAX_PORTS,
715         .cons           = SPORT_UART_CONSOLE,
716 };
717 
718 #ifdef CONFIG_PM
719 static int sport_uart_suspend(struct device *dev)
720 {
721         struct sport_uart_port *sport = dev_get_drvdata(dev);
722 
723         dev_dbg(dev, "%s enter\n", __func__);
724         if (sport)
725                 uart_suspend_port(&sport_uart_reg, &sport->port);
726 
727         return 0;
728 }
729 
730 static int sport_uart_resume(struct device *dev)
731 {
732         struct sport_uart_port *sport = dev_get_drvdata(dev);
733 
734         dev_dbg(dev, "%s enter\n", __func__);
735         if (sport)
736                 uart_resume_port(&sport_uart_reg, &sport->port);
737 
738         return 0;
739 }
740 
741 static struct dev_pm_ops bfin_sport_uart_dev_pm_ops = {
742         .suspend        = sport_uart_suspend,
743         .resume         = sport_uart_resume,
744 };
745 #endif
746 
747 static int sport_uart_probe(struct platform_device *pdev)
748 {
749         struct resource *res;
750         struct sport_uart_port *sport;
751         int ret = 0;
752 
753         dev_dbg(&pdev->dev, "%s enter\n", __func__);
754 
755         if (pdev->id < 0 || pdev->id >= BFIN_SPORT_UART_MAX_PORTS) {
756                 dev_err(&pdev->dev, "Wrong sport uart platform device id.\n");
757                 return -ENOENT;
758         }
759 
760         if (bfin_sport_uart_ports[pdev->id] == NULL) {
761                 bfin_sport_uart_ports[pdev->id] =
762                         kzalloc(sizeof(struct sport_uart_port), GFP_KERNEL);
763                 sport = bfin_sport_uart_ports[pdev->id];
764                 if (!sport) {
765                         dev_err(&pdev->dev,
766                                 "Fail to malloc sport_uart_port\n");
767                         return -ENOMEM;
768                 }
769 
770                 ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
771                                                 DRV_NAME);
772                 if (ret) {
773                         dev_err(&pdev->dev,
774                                 "Fail to request SPORT peripherals\n");
775                         goto out_error_free_mem;
776                 }
777 
778                 spin_lock_init(&sport->port.lock);
779                 sport->port.fifosize  = SPORT_TX_FIFO_SIZE,
780                 sport->port.ops       = &sport_uart_ops;
781                 sport->port.line      = pdev->id;
782                 sport->port.iotype    = UPIO_MEM;
783                 sport->port.flags     = UPF_BOOT_AUTOCONF;
784 
785                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
786                 if (res == NULL) {
787                         dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
788                         ret = -ENOENT;
789                         goto out_error_free_peripherals;
790                 }
791 
792                 sport->port.membase = ioremap(res->start, resource_size(res));
793                 if (!sport->port.membase) {
794                         dev_err(&pdev->dev, "Cannot map sport IO\n");
795                         ret = -ENXIO;
796                         goto out_error_free_peripherals;
797                 }
798                 sport->port.mapbase = res->start;
799 
800                 sport->port.irq = platform_get_irq(pdev, 0);
801                 if ((int)sport->port.irq < 0) {
802                         dev_err(&pdev->dev, "No sport RX/TX IRQ specified\n");
803                         ret = -ENOENT;
804                         goto out_error_unmap;
805                 }
806 
807                 sport->err_irq = platform_get_irq(pdev, 1);
808                 if (sport->err_irq < 0) {
809                         dev_err(&pdev->dev, "No sport status IRQ specified\n");
810                         ret = -ENOENT;
811                         goto out_error_unmap;
812                 }
813 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
814                 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
815                 if (res == NULL)
816                         sport->cts_pin = -1;
817                 else
818                         sport->cts_pin = res->start;
819 
820                 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
821                 if (res == NULL)
822                         sport->rts_pin = -1;
823                 else
824                         sport->rts_pin = res->start;
825 #endif
826         }
827 
828 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
829         if (!is_early_platform_device(pdev)) {
830 #endif
831                 sport = bfin_sport_uart_ports[pdev->id];
832                 sport->port.dev = &pdev->dev;
833                 dev_set_drvdata(&pdev->dev, sport);
834                 ret = uart_add_one_port(&sport_uart_reg, &sport->port);
835 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
836         }
837 #endif
838         if (!ret)
839                 return 0;
840 
841         if (sport) {
842 out_error_unmap:
843                 iounmap(sport->port.membase);
844 out_error_free_peripherals:
845                 peripheral_free_list(dev_get_platdata(&pdev->dev));
846 out_error_free_mem:
847                 kfree(sport);
848                 bfin_sport_uart_ports[pdev->id] = NULL;
849         }
850 
851         return ret;
852 }
853 
854 static int sport_uart_remove(struct platform_device *pdev)
855 {
856         struct sport_uart_port *sport = platform_get_drvdata(pdev);
857 
858         dev_dbg(&pdev->dev, "%s enter\n", __func__);
859         dev_set_drvdata(&pdev->dev, NULL);
860 
861         if (sport) {
862                 uart_remove_one_port(&sport_uart_reg, &sport->port);
863                 iounmap(sport->port.membase);
864                 peripheral_free_list(dev_get_platdata(&pdev->dev));
865                 kfree(sport);
866                 bfin_sport_uart_ports[pdev->id] = NULL;
867         }
868 
869         return 0;
870 }
871 
872 static struct platform_driver sport_uart_driver = {
873         .probe          = sport_uart_probe,
874         .remove         = sport_uart_remove,
875         .driver         = {
876                 .name   = DRV_NAME,
877 #ifdef CONFIG_PM
878                 .pm     = &bfin_sport_uart_dev_pm_ops,
879 #endif
880         },
881 };
882 
883 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
884 static struct early_platform_driver early_sport_uart_driver __initdata = {
885         .class_str = CLASS_BFIN_SPORT_CONSOLE,
886         .pdrv = &sport_uart_driver,
887         .requested_id = EARLY_PLATFORM_ID_UNSET,
888 };
889 
890 static int __init sport_uart_rs_console_init(void)
891 {
892         early_platform_driver_register(&early_sport_uart_driver, DRV_NAME);
893 
894         early_platform_driver_probe(CLASS_BFIN_SPORT_CONSOLE,
895                 BFIN_SPORT_UART_MAX_PORTS, 0);
896 
897         register_console(&sport_uart_console);
898 
899         return 0;
900 }
901 console_initcall(sport_uart_rs_console_init);
902 #endif
903 
904 static int __init sport_uart_init(void)
905 {
906         int ret;
907 
908         pr_info("Blackfin uart over sport driver\n");
909 
910         ret = uart_register_driver(&sport_uart_reg);
911         if (ret) {
912                 pr_err("failed to register %s:%d\n",
913                                 sport_uart_reg.driver_name, ret);
914                 return ret;
915         }
916 
917         ret = platform_driver_register(&sport_uart_driver);
918         if (ret) {
919                 pr_err("failed to register sport uart driver:%d\n", ret);
920                 uart_unregister_driver(&sport_uart_reg);
921         }
922 
923         return ret;
924 }
925 module_init(sport_uart_init);
926 
927 static void __exit sport_uart_exit(void)
928 {
929         platform_driver_unregister(&sport_uart_driver);
930         uart_unregister_driver(&sport_uart_reg);
931 }
932 module_exit(sport_uart_exit);
933 
934 MODULE_AUTHOR("Sonic Zhang, Roy Huang");
935 MODULE_DESCRIPTION("Blackfin serial over SPORT driver");
936 MODULE_LICENSE("GPL");
937 

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