Version:  2.0.40 2.2.26 2.4.37 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18

Linux/drivers/tty/serial/bfin_sport_uart.c

  1 /*
  2  * Blackfin On-Chip Sport Emulated UART Driver
  3  *
  4  * Copyright 2006-2009 Analog Devices Inc.
  5  *
  6  * Enter bugs at http://blackfin.uclinux.org/
  7  *
  8  * Licensed under the GPL-2 or later.
  9  */
 10 
 11 /*
 12  * This driver and the hardware supported are in term of EE-191 of ADI.
 13  * http://www.analog.com/static/imported-files/application_notes/EE191.pdf 
 14  * This application note describe how to implement a UART on a Sharc DSP,
 15  * but this driver is implemented on Blackfin Processor.
 16  * Transmit Frame Sync is not used by this driver to transfer data out.
 17  */
 18 
 19 /* #define DEBUG */
 20 
 21 #define DRV_NAME "bfin-sport-uart"
 22 #define DEVICE_NAME     "ttySS"
 23 #define pr_fmt(fmt) DRV_NAME ": " fmt
 24 
 25 #include <linux/module.h>
 26 #include <linux/ioport.h>
 27 #include <linux/io.h>
 28 #include <linux/init.h>
 29 #include <linux/console.h>
 30 #include <linux/sysrq.h>
 31 #include <linux/slab.h>
 32 #include <linux/platform_device.h>
 33 #include <linux/tty.h>
 34 #include <linux/tty_flip.h>
 35 #include <linux/serial_core.h>
 36 #include <linux/gpio.h>
 37 
 38 #include <asm/bfin_sport.h>
 39 #include <asm/delay.h>
 40 #include <asm/portmux.h>
 41 
 42 #include "bfin_sport_uart.h"
 43 
 44 struct sport_uart_port {
 45         struct uart_port        port;
 46         int                     err_irq;
 47         unsigned short          csize;
 48         unsigned short          rxmask;
 49         unsigned short          txmask1;
 50         unsigned short          txmask2;
 51         unsigned char           stopb;
 52 /*      unsigned char           parib; */
 53 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
 54         int cts_pin;
 55         int rts_pin;
 56 #endif
 57 };
 58 
 59 static int sport_uart_tx_chars(struct sport_uart_port *up);
 60 static void sport_stop_tx(struct uart_port *port);
 61 
 62 static inline void tx_one_byte(struct sport_uart_port *up, unsigned int value)
 63 {
 64         pr_debug("%s value:%x, mask1=0x%x, mask2=0x%x\n", __func__, value,
 65                 up->txmask1, up->txmask2);
 66 
 67         /* Place Start and Stop bits */
 68         __asm__ __volatile__ (
 69                 "%[val] <<= 1;"
 70                 "%[val] = %[val] & %[mask1];"
 71                 "%[val] = %[val] | %[mask2];"
 72                 : [val]"+d"(value)
 73                 : [mask1]"d"(up->txmask1), [mask2]"d"(up->txmask2)
 74                 : "ASTAT"
 75         );
 76         pr_debug("%s value:%x\n", __func__, value);
 77 
 78         SPORT_PUT_TX(up, value);
 79 }
 80 
 81 static inline unsigned char rx_one_byte(struct sport_uart_port *up)
 82 {
 83         unsigned int value;
 84         unsigned char extract;
 85         u32 tmp_mask1, tmp_mask2, tmp_shift, tmp;
 86 
 87         if ((up->csize + up->stopb) > 7)
 88                 value = SPORT_GET_RX32(up);
 89         else
 90                 value = SPORT_GET_RX(up);
 91 
 92         pr_debug("%s value:%x, cs=%d, mask=0x%x\n", __func__, value,
 93                 up->csize, up->rxmask);
 94 
 95         /* Extract data */
 96         __asm__ __volatile__ (
 97                 "%[extr] = 0;"
 98                 "%[mask1] = %[rxmask];"
 99                 "%[mask2] = 0x0200(Z);"
100                 "%[shift] = 0;"
101                 "LSETUP(.Lloop_s, .Lloop_e) LC0 = %[lc];"
102                 ".Lloop_s:"
103                 "%[tmp] = extract(%[val], %[mask1].L)(Z);"
104                 "%[tmp] <<= %[shift];"
105                 "%[extr] = %[extr] | %[tmp];"
106                 "%[mask1] = %[mask1] - %[mask2];"
107                 ".Lloop_e:"
108                 "%[shift] += 1;"
109                 : [extr]"=&d"(extract), [shift]"=&d"(tmp_shift), [tmp]"=&d"(tmp),
110                   [mask1]"=&d"(tmp_mask1), [mask2]"=&d"(tmp_mask2)
111                 : [val]"d"(value), [rxmask]"d"(up->rxmask), [lc]"a"(up->csize)
112                 : "ASTAT", "LB0", "LC0", "LT0"
113         );
114 
115         pr_debug("      extract:%x\n", extract);
116         return extract;
117 }
118 
119 static int sport_uart_setup(struct sport_uart_port *up, int size, int baud_rate)
120 {
121         int tclkdiv, rclkdiv;
122         unsigned int sclk = get_sclk();
123 
124         /* Set TCR1 and TCR2, TFSR is not enabled for uart */
125         SPORT_PUT_TCR1(up, (LATFS | ITFS | TFSR | TLSBIT | ITCLK));
126         SPORT_PUT_TCR2(up, size + 1);
127         pr_debug("%s TCR1:%x, TCR2:%x\n", __func__, SPORT_GET_TCR1(up), SPORT_GET_TCR2(up));
128 
129         /* Set RCR1 and RCR2 */
130         SPORT_PUT_RCR1(up, (RCKFE | LARFS | LRFS | RFSR | IRCLK));
131         SPORT_PUT_RCR2(up, (size + 1) * 2 - 1);
132         pr_debug("%s RCR1:%x, RCR2:%x\n", __func__, SPORT_GET_RCR1(up), SPORT_GET_RCR2(up));
133 
134         tclkdiv = sclk / (2 * baud_rate) - 1;
135         /* The actual uart baud rate of devices vary between +/-2%. The sport
136          * RX sample rate should be faster than the double of the worst case,
137          * otherwise, wrong data are received. So, set sport RX clock to be
138          * 3% faster.
139          */
140         rclkdiv = sclk / (2 * baud_rate * 2 * 97 / 100) - 1;
141         SPORT_PUT_TCLKDIV(up, tclkdiv);
142         SPORT_PUT_RCLKDIV(up, rclkdiv);
143         SSYNC();
144         pr_debug("%s sclk:%d, baud_rate:%d, tclkdiv:%d, rclkdiv:%d\n",
145                         __func__, sclk, baud_rate, tclkdiv, rclkdiv);
146 
147         return 0;
148 }
149 
150 static irqreturn_t sport_uart_rx_irq(int irq, void *dev_id)
151 {
152         struct sport_uart_port *up = dev_id;
153         struct tty_port *port = &up->port.state->port;
154         unsigned int ch;
155 
156         spin_lock(&up->port.lock);
157 
158         while (SPORT_GET_STAT(up) & RXNE) {
159                 ch = rx_one_byte(up);
160                 up->port.icount.rx++;
161 
162                 if (!uart_handle_sysrq_char(&up->port, ch))
163                         tty_insert_flip_char(port, ch, TTY_NORMAL);
164         }
165 
166         spin_unlock(&up->port.lock);
167 
168         /* XXX this won't deadlock with lowlat? */
169         tty_flip_buffer_push(port);
170 
171         return IRQ_HANDLED;
172 }
173 
174 static irqreturn_t sport_uart_tx_irq(int irq, void *dev_id)
175 {
176         struct sport_uart_port *up = dev_id;
177 
178         spin_lock(&up->port.lock);
179         sport_uart_tx_chars(up);
180         spin_unlock(&up->port.lock);
181 
182         return IRQ_HANDLED;
183 }
184 
185 static irqreturn_t sport_uart_err_irq(int irq, void *dev_id)
186 {
187         struct sport_uart_port *up = dev_id;
188         unsigned int stat = SPORT_GET_STAT(up);
189 
190         spin_lock(&up->port.lock);
191 
192         /* Overflow in RX FIFO */
193         if (stat & ROVF) {
194                 up->port.icount.overrun++;
195                 tty_insert_flip_char(&up->port.state->port, 0, TTY_OVERRUN);
196                 SPORT_PUT_STAT(up, ROVF); /* Clear ROVF bit */
197         }
198         /* These should not happen */
199         if (stat & (TOVF | TUVF | RUVF)) {
200                 pr_err("SPORT Error:%s %s %s\n",
201                        (stat & TOVF) ? "TX overflow" : "",
202                        (stat & TUVF) ? "TX underflow" : "",
203                        (stat & RUVF) ? "RX underflow" : "");
204                 SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
205                 SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
206         }
207         SSYNC();
208 
209         spin_unlock(&up->port.lock);
210         /* XXX we don't push the overrun bit to TTY? */
211 
212         return IRQ_HANDLED;
213 }
214 
215 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
216 static unsigned int sport_get_mctrl(struct uart_port *port)
217 {
218         struct sport_uart_port *up = (struct sport_uart_port *)port;
219         if (up->cts_pin < 0)
220                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
221 
222         /* CTS PIN is negative assertive. */
223         if (SPORT_UART_GET_CTS(up))
224                 return TIOCM_CTS | TIOCM_DSR | TIOCM_CAR;
225         else
226                 return TIOCM_DSR | TIOCM_CAR;
227 }
228 
229 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
230 {
231         struct sport_uart_port *up = (struct sport_uart_port *)port;
232         if (up->rts_pin < 0)
233                 return;
234 
235         /* RTS PIN is negative assertive. */
236         if (mctrl & TIOCM_RTS)
237                 SPORT_UART_ENABLE_RTS(up);
238         else
239                 SPORT_UART_DISABLE_RTS(up);
240 }
241 
242 /*
243  * Handle any change of modem status signal.
244  */
245 static irqreturn_t sport_mctrl_cts_int(int irq, void *dev_id)
246 {
247         struct sport_uart_port *up = (struct sport_uart_port *)dev_id;
248         unsigned int status;
249 
250         status = sport_get_mctrl(&up->port);
251         uart_handle_cts_change(&up->port, status & TIOCM_CTS);
252 
253         return IRQ_HANDLED;
254 }
255 #else
256 static unsigned int sport_get_mctrl(struct uart_port *port)
257 {
258         pr_debug("%s enter\n", __func__);
259         return TIOCM_CTS | TIOCM_CD | TIOCM_DSR;
260 }
261 
262 static void sport_set_mctrl(struct uart_port *port, unsigned int mctrl)
263 {
264         pr_debug("%s enter\n", __func__);
265 }
266 #endif
267 
268 /* Reqeust IRQ, Setup clock */
269 static int sport_startup(struct uart_port *port)
270 {
271         struct sport_uart_port *up = (struct sport_uart_port *)port;
272         int ret;
273 
274         pr_debug("%s enter\n", __func__);
275         ret = request_irq(up->port.irq, sport_uart_rx_irq, 0,
276                 "SPORT_UART_RX", up);
277         if (ret) {
278                 dev_err(port->dev, "unable to request SPORT RX interrupt\n");
279                 return ret;
280         }
281 
282         ret = request_irq(up->port.irq+1, sport_uart_tx_irq, 0,
283                 "SPORT_UART_TX", up);
284         if (ret) {
285                 dev_err(port->dev, "unable to request SPORT TX interrupt\n");
286                 goto fail1;
287         }
288 
289         ret = request_irq(up->err_irq, sport_uart_err_irq, 0,
290                 "SPORT_UART_STATUS", up);
291         if (ret) {
292                 dev_err(port->dev, "unable to request SPORT status interrupt\n");
293                 goto fail2;
294         }
295 
296 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
297         if (up->cts_pin >= 0) {
298                 if (request_irq(gpio_to_irq(up->cts_pin),
299                         sport_mctrl_cts_int,
300                         IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING |
301                         0, "BFIN_SPORT_UART_CTS", up)) {
302                         up->cts_pin = -1;
303                         dev_info(port->dev, "Unable to attach BlackFin UART over SPORT CTS interrupt. So, disable it.\n");
304                 }
305         }
306         if (up->rts_pin >= 0) {
307                 if (gpio_request(up->rts_pin, DRV_NAME)) {
308                         dev_info(port->dev, "fail to request RTS PIN at GPIO_%d\n", up->rts_pin);
309                         up->rts_pin = -1;
310                 } else
311                         gpio_direction_output(up->rts_pin, 0);
312         }
313 #endif
314 
315         return 0;
316  fail2:
317         free_irq(up->port.irq+1, up);
318  fail1:
319         free_irq(up->port.irq, up);
320 
321         return ret;
322 }
323 
324 /*
325  * sport_uart_tx_chars
326  *
327  * ret 1 means need to enable sport.
328  * ret 0 means do nothing.
329  */
330 static int sport_uart_tx_chars(struct sport_uart_port *up)
331 {
332         struct circ_buf *xmit = &up->port.state->xmit;
333 
334         if (SPORT_GET_STAT(up) & TXF)
335                 return 0;
336 
337         if (up->port.x_char) {
338                 tx_one_byte(up, up->port.x_char);
339                 up->port.icount.tx++;
340                 up->port.x_char = 0;
341                 return 1;
342         }
343 
344         if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
345                 /* The waiting loop to stop SPORT TX from TX interrupt is
346                  * too long. This may block SPORT RX interrupts and cause
347                  * RX FIFO overflow. So, do stop sport TX only after the last
348                  * char in TX FIFO is moved into the shift register.
349                  */
350                 if (SPORT_GET_STAT(up) & TXHRE)
351                         sport_stop_tx(&up->port);
352                 return 0;
353         }
354 
355         while(!(SPORT_GET_STAT(up) & TXF) && !uart_circ_empty(xmit)) {
356                 tx_one_byte(up, xmit->buf[xmit->tail]);
357                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE -1);
358                 up->port.icount.tx++;
359         }
360 
361         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
362                 uart_write_wakeup(&up->port);
363 
364         return 1;
365 }
366 
367 static unsigned int sport_tx_empty(struct uart_port *port)
368 {
369         struct sport_uart_port *up = (struct sport_uart_port *)port;
370         unsigned int stat;
371 
372         stat = SPORT_GET_STAT(up);
373         pr_debug("%s stat:%04x\n", __func__, stat);
374         if (stat & TXHRE) {
375                 return TIOCSER_TEMT;
376         } else
377                 return 0;
378 }
379 
380 static void sport_stop_tx(struct uart_port *port)
381 {
382         struct sport_uart_port *up = (struct sport_uart_port *)port;
383 
384         pr_debug("%s enter\n", __func__);
385 
386         if (!(SPORT_GET_TCR1(up) & TSPEN))
387                 return;
388 
389         /* Although the hold register is empty, last byte is still in shift
390          * register and not sent out yet. So, put a dummy data into TX FIFO.
391          * Then, sport tx stops when last byte is shift out and the dummy
392          * data is moved into the shift register.
393          */
394         SPORT_PUT_TX(up, 0xffff);
395         while (!(SPORT_GET_STAT(up) & TXHRE))
396                 cpu_relax();
397 
398         SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
399         SSYNC();
400 
401         return;
402 }
403 
404 static void sport_start_tx(struct uart_port *port)
405 {
406         struct sport_uart_port *up = (struct sport_uart_port *)port;
407 
408         pr_debug("%s enter\n", __func__);
409 
410         /* Write data into SPORT FIFO before enable SPROT to transmit */
411         if (sport_uart_tx_chars(up)) {
412                 /* Enable transmit, then an interrupt will generated */
413                 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
414                 SSYNC();
415         }
416 
417         pr_debug("%s exit\n", __func__);
418 }
419 
420 static void sport_stop_rx(struct uart_port *port)
421 {
422         struct sport_uart_port *up = (struct sport_uart_port *)port;
423 
424         pr_debug("%s enter\n", __func__);
425         /* Disable sport to stop rx */
426         SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
427         SSYNC();
428 }
429 
430 static void sport_break_ctl(struct uart_port *port, int break_state)
431 {
432         pr_debug("%s enter\n", __func__);
433 }
434 
435 static void sport_shutdown(struct uart_port *port)
436 {
437         struct sport_uart_port *up = (struct sport_uart_port *)port;
438 
439         dev_dbg(port->dev, "%s enter\n", __func__);
440 
441         /* Disable sport */
442         SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
443         SPORT_PUT_RCR1(up, (SPORT_GET_RCR1(up) & ~RSPEN));
444         SSYNC();
445 
446         free_irq(up->port.irq, up);
447         free_irq(up->port.irq+1, up);
448         free_irq(up->err_irq, up);
449 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
450         if (up->cts_pin >= 0)
451                 free_irq(gpio_to_irq(up->cts_pin), up);
452         if (up->rts_pin >= 0)
453                 gpio_free(up->rts_pin);
454 #endif
455 }
456 
457 static const char *sport_type(struct uart_port *port)
458 {
459         struct sport_uart_port *up = (struct sport_uart_port *)port;
460 
461         pr_debug("%s enter\n", __func__);
462         return up->port.type == PORT_BFIN_SPORT ? "BFIN-SPORT-UART" : NULL;
463 }
464 
465 static void sport_release_port(struct uart_port *port)
466 {
467         pr_debug("%s enter\n", __func__);
468 }
469 
470 static int sport_request_port(struct uart_port *port)
471 {
472         pr_debug("%s enter\n", __func__);
473         return 0;
474 }
475 
476 static void sport_config_port(struct uart_port *port, int flags)
477 {
478         struct sport_uart_port *up = (struct sport_uart_port *)port;
479 
480         pr_debug("%s enter\n", __func__);
481         up->port.type = PORT_BFIN_SPORT;
482 }
483 
484 static int sport_verify_port(struct uart_port *port, struct serial_struct *ser)
485 {
486         pr_debug("%s enter\n", __func__);
487         return 0;
488 }
489 
490 static void sport_set_termios(struct uart_port *port,
491                 struct ktermios *termios, struct ktermios *old)
492 {
493         struct sport_uart_port *up = (struct sport_uart_port *)port;
494         unsigned long flags;
495         int i;
496 
497         pr_debug("%s enter, c_cflag:%08x\n", __func__, termios->c_cflag);
498 
499 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
500         if (old == NULL && up->cts_pin != -1)
501                 termios->c_cflag |= CRTSCTS;
502         else if (up->cts_pin == -1)
503                 termios->c_cflag &= ~CRTSCTS;
504 #endif
505 
506         switch (termios->c_cflag & CSIZE) {
507         case CS8:
508                 up->csize = 8;
509                 break;
510         case CS7:
511                 up->csize = 7;
512                 break;
513         case CS6:
514                 up->csize = 6;
515                 break;
516         case CS5:
517                 up->csize = 5;
518                 break;
519         default:
520                 pr_warning("requested word length not supported\n");
521         }
522 
523         if (termios->c_cflag & CSTOPB) {
524                 up->stopb = 1;
525         }
526         if (termios->c_cflag & PARENB) {
527                 pr_warning("PAREN bits is not supported yet\n");
528                 /* up->parib = 1; */
529         }
530 
531         spin_lock_irqsave(&up->port.lock, flags);
532 
533         port->read_status_mask = 0;
534 
535         /*
536          * Characters to ignore
537          */
538         port->ignore_status_mask = 0;
539 
540         /* RX extract mask */
541         up->rxmask = 0x01 | (((up->csize + up->stopb) * 2 - 1) << 0x8);
542         /* TX masks, 8 bit data and 1 bit stop for example:
543          * mask1 = b#0111111110
544          * mask2 = b#1000000000
545          */
546         for (i = 0, up->txmask1 = 0; i < up->csize; i++)
547                 up->txmask1 |= (1<<i);
548         up->txmask2 = (1<<i);
549         if (up->stopb) {
550                 ++i;
551                 up->txmask2 |= (1<<i);
552         }
553         up->txmask1 <<= 1;
554         up->txmask2 <<= 1;
555         /* uart baud rate */
556         port->uartclk = uart_get_baud_rate(port, termios, old, 0, get_sclk()/16);
557 
558         /* Disable UART */
559         SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
560         SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) & ~RSPEN);
561 
562         sport_uart_setup(up, up->csize + up->stopb, port->uartclk);
563 
564         /* driver TX line high after config, one dummy data is
565          * necessary to stop sport after shift one byte
566          */
567         SPORT_PUT_TX(up, 0xffff);
568         SPORT_PUT_TX(up, 0xffff);
569         SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
570         SSYNC();
571         while (!(SPORT_GET_STAT(up) & TXHRE))
572                 cpu_relax();
573         SPORT_PUT_TCR1(up, SPORT_GET_TCR1(up) & ~TSPEN);
574         SSYNC();
575 
576         /* Port speed changed, update the per-port timeout. */
577         uart_update_timeout(port, termios->c_cflag, port->uartclk);
578 
579         /* Enable sport rx */
580         SPORT_PUT_RCR1(up, SPORT_GET_RCR1(up) | RSPEN);
581         SSYNC();
582 
583         spin_unlock_irqrestore(&up->port.lock, flags);
584 }
585 
586 struct uart_ops sport_uart_ops = {
587         .tx_empty       = sport_tx_empty,
588         .set_mctrl      = sport_set_mctrl,
589         .get_mctrl      = sport_get_mctrl,
590         .stop_tx        = sport_stop_tx,
591         .start_tx       = sport_start_tx,
592         .stop_rx        = sport_stop_rx,
593         .break_ctl      = sport_break_ctl,
594         .startup        = sport_startup,
595         .shutdown       = sport_shutdown,
596         .set_termios    = sport_set_termios,
597         .type           = sport_type,
598         .release_port   = sport_release_port,
599         .request_port   = sport_request_port,
600         .config_port    = sport_config_port,
601         .verify_port    = sport_verify_port,
602 };
603 
604 #define BFIN_SPORT_UART_MAX_PORTS 4
605 
606 static struct sport_uart_port *bfin_sport_uart_ports[BFIN_SPORT_UART_MAX_PORTS];
607 
608 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
609 #define CLASS_BFIN_SPORT_CONSOLE        "bfin-sport-console"
610 
611 static int __init
612 sport_uart_console_setup(struct console *co, char *options)
613 {
614         struct sport_uart_port *up;
615         int baud = 57600;
616         int bits = 8;
617         int parity = 'n';
618 # ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
619         int flow = 'r';
620 # else
621         int flow = 'n';
622 # endif
623 
624         /* Check whether an invalid uart number has been specified */
625         if (co->index < 0 || co->index >= BFIN_SPORT_UART_MAX_PORTS)
626                 return -ENODEV;
627 
628         up = bfin_sport_uart_ports[co->index];
629         if (!up)
630                 return -ENODEV;
631 
632         if (options)
633                 uart_parse_options(options, &baud, &parity, &bits, &flow);
634 
635         return uart_set_options(&up->port, co, baud, parity, bits, flow);
636 }
637 
638 static void sport_uart_console_putchar(struct uart_port *port, int ch)
639 {
640         struct sport_uart_port *up = (struct sport_uart_port *)port;
641 
642         while (SPORT_GET_STAT(up) & TXF)
643                 barrier();
644 
645         tx_one_byte(up, ch);
646 }
647 
648 /*
649  * Interrupts are disabled on entering
650  */
651 static void
652 sport_uart_console_write(struct console *co, const char *s, unsigned int count)
653 {
654         struct sport_uart_port *up = bfin_sport_uart_ports[co->index];
655         unsigned long flags;
656 
657         spin_lock_irqsave(&up->port.lock, flags);
658 
659         if (SPORT_GET_TCR1(up) & TSPEN)
660                 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
661         else {
662                 /* dummy data to start sport */
663                 while (SPORT_GET_STAT(up) & TXF)
664                         barrier();
665                 SPORT_PUT_TX(up, 0xffff);
666                 /* Enable transmit, then an interrupt will generated */
667                 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) | TSPEN));
668                 SSYNC();
669 
670                 uart_console_write(&up->port, s, count, sport_uart_console_putchar);
671 
672                 /* Although the hold register is empty, last byte is still in shift
673                  * register and not sent out yet. So, put a dummy data into TX FIFO.
674                  * Then, sport tx stops when last byte is shift out and the dummy
675                  * data is moved into the shift register.
676                  */
677                 while (SPORT_GET_STAT(up) & TXF)
678                         barrier();
679                 SPORT_PUT_TX(up, 0xffff);
680                 while (!(SPORT_GET_STAT(up) & TXHRE))
681                         barrier();
682 
683                 /* Stop sport tx transfer */
684                 SPORT_PUT_TCR1(up, (SPORT_GET_TCR1(up) & ~TSPEN));
685                 SSYNC();
686         }
687 
688         spin_unlock_irqrestore(&up->port.lock, flags);
689 }
690 
691 static struct uart_driver sport_uart_reg;
692 
693 static struct console sport_uart_console = {
694         .name           = DEVICE_NAME,
695         .write          = sport_uart_console_write,
696         .device         = uart_console_device,
697         .setup          = sport_uart_console_setup,
698         .flags          = CON_PRINTBUFFER,
699         .index          = -1,
700         .data           = &sport_uart_reg,
701 };
702 
703 #define SPORT_UART_CONSOLE      (&sport_uart_console)
704 #else
705 #define SPORT_UART_CONSOLE      NULL
706 #endif /* CONFIG_SERIAL_BFIN_SPORT_CONSOLE */
707 
708 
709 static struct uart_driver sport_uart_reg = {
710         .owner          = THIS_MODULE,
711         .driver_name    = DRV_NAME,
712         .dev_name       = DEVICE_NAME,
713         .major          = 204,
714         .minor          = 84,
715         .nr             = BFIN_SPORT_UART_MAX_PORTS,
716         .cons           = SPORT_UART_CONSOLE,
717 };
718 
719 #ifdef CONFIG_PM
720 static int sport_uart_suspend(struct device *dev)
721 {
722         struct sport_uart_port *sport = dev_get_drvdata(dev);
723 
724         dev_dbg(dev, "%s enter\n", __func__);
725         if (sport)
726                 uart_suspend_port(&sport_uart_reg, &sport->port);
727 
728         return 0;
729 }
730 
731 static int sport_uart_resume(struct device *dev)
732 {
733         struct sport_uart_port *sport = dev_get_drvdata(dev);
734 
735         dev_dbg(dev, "%s enter\n", __func__);
736         if (sport)
737                 uart_resume_port(&sport_uart_reg, &sport->port);
738 
739         return 0;
740 }
741 
742 static struct dev_pm_ops bfin_sport_uart_dev_pm_ops = {
743         .suspend        = sport_uart_suspend,
744         .resume         = sport_uart_resume,
745 };
746 #endif
747 
748 static int sport_uart_probe(struct platform_device *pdev)
749 {
750         struct resource *res;
751         struct sport_uart_port *sport;
752         int ret = 0;
753 
754         dev_dbg(&pdev->dev, "%s enter\n", __func__);
755 
756         if (pdev->id < 0 || pdev->id >= BFIN_SPORT_UART_MAX_PORTS) {
757                 dev_err(&pdev->dev, "Wrong sport uart platform device id.\n");
758                 return -ENOENT;
759         }
760 
761         if (bfin_sport_uart_ports[pdev->id] == NULL) {
762                 bfin_sport_uart_ports[pdev->id] =
763                         kzalloc(sizeof(struct sport_uart_port), GFP_KERNEL);
764                 sport = bfin_sport_uart_ports[pdev->id];
765                 if (!sport) {
766                         dev_err(&pdev->dev,
767                                 "Fail to malloc sport_uart_port\n");
768                         return -ENOMEM;
769                 }
770 
771                 ret = peripheral_request_list(dev_get_platdata(&pdev->dev),
772                                                 DRV_NAME);
773                 if (ret) {
774                         dev_err(&pdev->dev,
775                                 "Fail to request SPORT peripherals\n");
776                         goto out_error_free_mem;
777                 }
778 
779                 spin_lock_init(&sport->port.lock);
780                 sport->port.fifosize  = SPORT_TX_FIFO_SIZE,
781                 sport->port.ops       = &sport_uart_ops;
782                 sport->port.line      = pdev->id;
783                 sport->port.iotype    = UPIO_MEM;
784                 sport->port.flags     = UPF_BOOT_AUTOCONF;
785 
786                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
787                 if (res == NULL) {
788                         dev_err(&pdev->dev, "Cannot get IORESOURCE_MEM\n");
789                         ret = -ENOENT;
790                         goto out_error_free_peripherals;
791                 }
792 
793                 sport->port.membase = ioremap(res->start, resource_size(res));
794                 if (!sport->port.membase) {
795                         dev_err(&pdev->dev, "Cannot map sport IO\n");
796                         ret = -ENXIO;
797                         goto out_error_free_peripherals;
798                 }
799                 sport->port.mapbase = res->start;
800 
801                 sport->port.irq = platform_get_irq(pdev, 0);
802                 if ((int)sport->port.irq < 0) {
803                         dev_err(&pdev->dev, "No sport RX/TX IRQ specified\n");
804                         ret = -ENOENT;
805                         goto out_error_unmap;
806                 }
807 
808                 sport->err_irq = platform_get_irq(pdev, 1);
809                 if (sport->err_irq < 0) {
810                         dev_err(&pdev->dev, "No sport status IRQ specified\n");
811                         ret = -ENOENT;
812                         goto out_error_unmap;
813                 }
814 #ifdef CONFIG_SERIAL_BFIN_SPORT_CTSRTS
815                 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
816                 if (res == NULL)
817                         sport->cts_pin = -1;
818                 else
819                         sport->cts_pin = res->start;
820 
821                 res = platform_get_resource(pdev, IORESOURCE_IO, 1);
822                 if (res == NULL)
823                         sport->rts_pin = -1;
824                 else
825                         sport->rts_pin = res->start;
826 #endif
827         }
828 
829 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
830         if (!is_early_platform_device(pdev)) {
831 #endif
832                 sport = bfin_sport_uart_ports[pdev->id];
833                 sport->port.dev = &pdev->dev;
834                 dev_set_drvdata(&pdev->dev, sport);
835                 ret = uart_add_one_port(&sport_uart_reg, &sport->port);
836 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
837         }
838 #endif
839         if (!ret)
840                 return 0;
841 
842         if (sport) {
843 out_error_unmap:
844                 iounmap(sport->port.membase);
845 out_error_free_peripherals:
846                 peripheral_free_list(dev_get_platdata(&pdev->dev));
847 out_error_free_mem:
848                 kfree(sport);
849                 bfin_sport_uart_ports[pdev->id] = NULL;
850         }
851 
852         return ret;
853 }
854 
855 static int sport_uart_remove(struct platform_device *pdev)
856 {
857         struct sport_uart_port *sport = platform_get_drvdata(pdev);
858 
859         dev_dbg(&pdev->dev, "%s enter\n", __func__);
860         dev_set_drvdata(&pdev->dev, NULL);
861 
862         if (sport) {
863                 uart_remove_one_port(&sport_uart_reg, &sport->port);
864                 iounmap(sport->port.membase);
865                 peripheral_free_list(dev_get_platdata(&pdev->dev));
866                 kfree(sport);
867                 bfin_sport_uart_ports[pdev->id] = NULL;
868         }
869 
870         return 0;
871 }
872 
873 static struct platform_driver sport_uart_driver = {
874         .probe          = sport_uart_probe,
875         .remove         = sport_uart_remove,
876         .driver         = {
877                 .name   = DRV_NAME,
878 #ifdef CONFIG_PM
879                 .pm     = &bfin_sport_uart_dev_pm_ops,
880 #endif
881         },
882 };
883 
884 #ifdef CONFIG_SERIAL_BFIN_SPORT_CONSOLE
885 static struct early_platform_driver early_sport_uart_driver __initdata = {
886         .class_str = CLASS_BFIN_SPORT_CONSOLE,
887         .pdrv = &sport_uart_driver,
888         .requested_id = EARLY_PLATFORM_ID_UNSET,
889 };
890 
891 static int __init sport_uart_rs_console_init(void)
892 {
893         early_platform_driver_register(&early_sport_uart_driver, DRV_NAME);
894 
895         early_platform_driver_probe(CLASS_BFIN_SPORT_CONSOLE,
896                 BFIN_SPORT_UART_MAX_PORTS, 0);
897 
898         register_console(&sport_uart_console);
899 
900         return 0;
901 }
902 console_initcall(sport_uart_rs_console_init);
903 #endif
904 
905 static int __init sport_uart_init(void)
906 {
907         int ret;
908 
909         pr_info("Blackfin uart over sport driver\n");
910 
911         ret = uart_register_driver(&sport_uart_reg);
912         if (ret) {
913                 pr_err("failed to register %s:%d\n",
914                                 sport_uart_reg.driver_name, ret);
915                 return ret;
916         }
917 
918         ret = platform_driver_register(&sport_uart_driver);
919         if (ret) {
920                 pr_err("failed to register sport uart driver:%d\n", ret);
921                 uart_unregister_driver(&sport_uart_reg);
922         }
923 
924         return ret;
925 }
926 module_init(sport_uart_init);
927 
928 static void __exit sport_uart_exit(void)
929 {
930         platform_driver_unregister(&sport_uart_driver);
931         uart_unregister_driver(&sport_uart_reg);
932 }
933 module_exit(sport_uart_exit);
934 
935 MODULE_AUTHOR("Sonic Zhang, Roy Huang");
936 MODULE_DESCRIPTION("Blackfin serial over SPORT driver");
937 MODULE_LICENSE("GPL");
938 

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