Version:  2.0.40 2.2.26 2.4.37 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0

Linux/drivers/tty/serial/8250/8250_core.c

  1 /*
  2  *  Driver for 8250/16550-type serial ports
  3  *
  4  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  5  *
  6  *  Copyright (C) 2001 Russell King.
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License as published by
 10  * the Free Software Foundation; either version 2 of the License, or
 11  * (at your option) any later version.
 12  *
 13  * A note about mapbase / membase
 14  *
 15  *  mapbase is the physical address of the IO port.
 16  *  membase is an 'ioremapped' cookie.
 17  */
 18 
 19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 20 #define SUPPORT_SYSRQ
 21 #endif
 22 
 23 #include <linux/module.h>
 24 #include <linux/moduleparam.h>
 25 #include <linux/ioport.h>
 26 #include <linux/init.h>
 27 #include <linux/console.h>
 28 #include <linux/sysrq.h>
 29 #include <linux/delay.h>
 30 #include <linux/platform_device.h>
 31 #include <linux/tty.h>
 32 #include <linux/ratelimit.h>
 33 #include <linux/tty_flip.h>
 34 #include <linux/serial_core.h>
 35 #include <linux/serial.h>
 36 #include <linux/serial_8250.h>
 37 #include <linux/nmi.h>
 38 #include <linux/mutex.h>
 39 #include <linux/slab.h>
 40 #include <linux/uaccess.h>
 41 #include <linux/pm_runtime.h>
 42 #ifdef CONFIG_SPARC
 43 #include <linux/sunserialcore.h>
 44 #endif
 45 
 46 #include <asm/io.h>
 47 #include <asm/irq.h>
 48 
 49 #include "8250.h"
 50 
 51 /*
 52  * Configuration:
 53  *   share_irqs - whether we pass IRQF_SHARED to request_irq().  This option
 54  *                is unsafe when used on edge-triggered interrupts.
 55  */
 56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
 57 
 58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
 59 
 60 static struct uart_driver serial8250_reg;
 61 
 62 static int serial_index(struct uart_port *port)
 63 {
 64         return (serial8250_reg.minor - 64) + port->line;
 65 }
 66 
 67 static unsigned int skip_txen_test; /* force skip of txen test at init time */
 68 
 69 /*
 70  * Debugging.
 71  */
 72 #if 0
 73 #define DEBUG_AUTOCONF(fmt...)  printk(fmt)
 74 #else
 75 #define DEBUG_AUTOCONF(fmt...)  do { } while (0)
 76 #endif
 77 
 78 #if 0
 79 #define DEBUG_INTR(fmt...)      printk(fmt)
 80 #else
 81 #define DEBUG_INTR(fmt...)      do { } while (0)
 82 #endif
 83 
 84 #define PASS_LIMIT      512
 85 
 86 #define BOTH_EMPTY      (UART_LSR_TEMT | UART_LSR_THRE)
 87 
 88 
 89 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
 90 #define CONFIG_SERIAL_DETECT_IRQ 1
 91 #endif
 92 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
 93 #define CONFIG_SERIAL_MANY_PORTS 1
 94 #endif
 95 
 96 /*
 97  * HUB6 is always on.  This will be removed once the header
 98  * files have been cleaned.
 99  */
100 #define CONFIG_HUB6 1
101 
102 #include <asm/serial.h>
103 /*
104  * SERIAL_PORT_DFNS tells us about built-in ports that have no
105  * standard enumeration mechanism.   Platforms that can find all
106  * serial ports via mechanisms like ACPI or PCI need not supply it.
107  */
108 #ifndef SERIAL_PORT_DFNS
109 #define SERIAL_PORT_DFNS
110 #endif
111 
112 static const struct old_serial_port old_serial_port[] = {
113         SERIAL_PORT_DFNS /* defined in asm/serial.h */
114 };
115 
116 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
117 
118 #ifdef CONFIG_SERIAL_8250_RSA
119 
120 #define PORT_RSA_MAX 4
121 static unsigned long probe_rsa[PORT_RSA_MAX];
122 static unsigned int probe_rsa_count;
123 #endif /* CONFIG_SERIAL_8250_RSA  */
124 
125 struct irq_info {
126         struct                  hlist_node node;
127         int                     irq;
128         spinlock_t              lock;   /* Protects list not the hash */
129         struct list_head        *head;
130 };
131 
132 #define NR_IRQ_HASH             32      /* Can be adjusted later */
133 static struct hlist_head irq_lists[NR_IRQ_HASH];
134 static DEFINE_MUTEX(hash_mutex);        /* Used to walk the hash */
135 
136 /*
137  * Here we define the default xmit fifo size used for each type of UART.
138  */
139 static const struct serial8250_config uart_config[] = {
140         [PORT_UNKNOWN] = {
141                 .name           = "unknown",
142                 .fifo_size      = 1,
143                 .tx_loadsz      = 1,
144         },
145         [PORT_8250] = {
146                 .name           = "8250",
147                 .fifo_size      = 1,
148                 .tx_loadsz      = 1,
149         },
150         [PORT_16450] = {
151                 .name           = "16450",
152                 .fifo_size      = 1,
153                 .tx_loadsz      = 1,
154         },
155         [PORT_16550] = {
156                 .name           = "16550",
157                 .fifo_size      = 1,
158                 .tx_loadsz      = 1,
159         },
160         [PORT_16550A] = {
161                 .name           = "16550A",
162                 .fifo_size      = 16,
163                 .tx_loadsz      = 16,
164                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
165                 .rxtrig_bytes   = {1, 4, 8, 14},
166                 .flags          = UART_CAP_FIFO,
167         },
168         [PORT_CIRRUS] = {
169                 .name           = "Cirrus",
170                 .fifo_size      = 1,
171                 .tx_loadsz      = 1,
172         },
173         [PORT_16650] = {
174                 .name           = "ST16650",
175                 .fifo_size      = 1,
176                 .tx_loadsz      = 1,
177                 .flags          = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
178         },
179         [PORT_16650V2] = {
180                 .name           = "ST16650V2",
181                 .fifo_size      = 32,
182                 .tx_loadsz      = 16,
183                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
184                                   UART_FCR_T_TRIG_00,
185                 .rxtrig_bytes   = {8, 16, 24, 28},
186                 .flags          = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
187         },
188         [PORT_16750] = {
189                 .name           = "TI16750",
190                 .fifo_size      = 64,
191                 .tx_loadsz      = 64,
192                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
193                                   UART_FCR7_64BYTE,
194                 .rxtrig_bytes   = {1, 16, 32, 56},
195                 .flags          = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
196         },
197         [PORT_STARTECH] = {
198                 .name           = "Startech",
199                 .fifo_size      = 1,
200                 .tx_loadsz      = 1,
201         },
202         [PORT_16C950] = {
203                 .name           = "16C950/954",
204                 .fifo_size      = 128,
205                 .tx_loadsz      = 128,
206                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
207                 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
208                 .flags          = UART_CAP_FIFO | UART_CAP_SLEEP,
209         },
210         [PORT_16654] = {
211                 .name           = "ST16654",
212                 .fifo_size      = 64,
213                 .tx_loadsz      = 32,
214                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
215                                   UART_FCR_T_TRIG_10,
216                 .rxtrig_bytes   = {8, 16, 56, 60},
217                 .flags          = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
218         },
219         [PORT_16850] = {
220                 .name           = "XR16850",
221                 .fifo_size      = 128,
222                 .tx_loadsz      = 128,
223                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
224                 .flags          = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
225         },
226         [PORT_RSA] = {
227                 .name           = "RSA",
228                 .fifo_size      = 2048,
229                 .tx_loadsz      = 2048,
230                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
231                 .flags          = UART_CAP_FIFO,
232         },
233         [PORT_NS16550A] = {
234                 .name           = "NS16550A",
235                 .fifo_size      = 16,
236                 .tx_loadsz      = 16,
237                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
238                 .flags          = UART_CAP_FIFO | UART_NATSEMI,
239         },
240         [PORT_XSCALE] = {
241                 .name           = "XScale",
242                 .fifo_size      = 32,
243                 .tx_loadsz      = 32,
244                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
245                 .flags          = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
246         },
247         [PORT_OCTEON] = {
248                 .name           = "OCTEON",
249                 .fifo_size      = 64,
250                 .tx_loadsz      = 64,
251                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
252                 .flags          = UART_CAP_FIFO,
253         },
254         [PORT_AR7] = {
255                 .name           = "AR7",
256                 .fifo_size      = 16,
257                 .tx_loadsz      = 16,
258                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
259                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
260         },
261         [PORT_U6_16550A] = {
262                 .name           = "U6_16550A",
263                 .fifo_size      = 64,
264                 .tx_loadsz      = 64,
265                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
266                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
267         },
268         [PORT_TEGRA] = {
269                 .name           = "Tegra",
270                 .fifo_size      = 32,
271                 .tx_loadsz      = 8,
272                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
273                                   UART_FCR_T_TRIG_01,
274                 .rxtrig_bytes   = {1, 4, 8, 14},
275                 .flags          = UART_CAP_FIFO | UART_CAP_RTOIE,
276         },
277         [PORT_XR17D15X] = {
278                 .name           = "XR17D15X",
279                 .fifo_size      = 64,
280                 .tx_loadsz      = 64,
281                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
282                 .flags          = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
283                                   UART_CAP_SLEEP,
284         },
285         [PORT_XR17V35X] = {
286                 .name           = "XR17V35X",
287                 .fifo_size      = 256,
288                 .tx_loadsz      = 256,
289                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
290                                   UART_FCR_T_TRIG_11,
291                 .flags          = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
292                                   UART_CAP_SLEEP,
293         },
294         [PORT_LPC3220] = {
295                 .name           = "LPC3220",
296                 .fifo_size      = 64,
297                 .tx_loadsz      = 32,
298                 .fcr            = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
299                                   UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
300                 .flags          = UART_CAP_FIFO,
301         },
302         [PORT_BRCM_TRUMANAGE] = {
303                 .name           = "TruManage",
304                 .fifo_size      = 1,
305                 .tx_loadsz      = 1024,
306                 .flags          = UART_CAP_HFIFO,
307         },
308         [PORT_8250_CIR] = {
309                 .name           = "CIR port"
310         },
311         [PORT_ALTR_16550_F32] = {
312                 .name           = "Altera 16550 FIFO32",
313                 .fifo_size      = 32,
314                 .tx_loadsz      = 32,
315                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
316                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
317         },
318         [PORT_ALTR_16550_F64] = {
319                 .name           = "Altera 16550 FIFO64",
320                 .fifo_size      = 64,
321                 .tx_loadsz      = 64,
322                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
323                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
324         },
325         [PORT_ALTR_16550_F128] = {
326                 .name           = "Altera 16550 FIFO128",
327                 .fifo_size      = 128,
328                 .tx_loadsz      = 128,
329                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
330                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
331         },
332 /* tx_loadsz is set to 63-bytes instead of 64-bytes to implement
333 workaround of errata A-008006 which states that tx_loadsz should  be
334 configured less than Maximum supported fifo bytes */
335         [PORT_16550A_FSL64] = {
336                 .name           = "16550A_FSL64",
337                 .fifo_size      = 64,
338                 .tx_loadsz      = 63,
339                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
340                                   UART_FCR7_64BYTE,
341                 .flags          = UART_CAP_FIFO,
342         },
343 };
344 
345 /* Uart divisor latch read */
346 static int default_serial_dl_read(struct uart_8250_port *up)
347 {
348         return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
349 }
350 
351 /* Uart divisor latch write */
352 static void default_serial_dl_write(struct uart_8250_port *up, int value)
353 {
354         serial_out(up, UART_DLL, value & 0xff);
355         serial_out(up, UART_DLM, value >> 8 & 0xff);
356 }
357 
358 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
359 
360 /* Au1x00/RT288x UART hardware has a weird register layout */
361 static const u8 au_io_in_map[] = {
362         [UART_RX]  = 0,
363         [UART_IER] = 2,
364         [UART_IIR] = 3,
365         [UART_LCR] = 5,
366         [UART_MCR] = 6,
367         [UART_LSR] = 7,
368         [UART_MSR] = 8,
369 };
370 
371 static const u8 au_io_out_map[] = {
372         [UART_TX]  = 1,
373         [UART_IER] = 2,
374         [UART_FCR] = 4,
375         [UART_LCR] = 5,
376         [UART_MCR] = 6,
377 };
378 
379 static unsigned int au_serial_in(struct uart_port *p, int offset)
380 {
381         offset = au_io_in_map[offset] << p->regshift;
382         return __raw_readl(p->membase + offset);
383 }
384 
385 static void au_serial_out(struct uart_port *p, int offset, int value)
386 {
387         offset = au_io_out_map[offset] << p->regshift;
388         __raw_writel(value, p->membase + offset);
389 }
390 
391 /* Au1x00 haven't got a standard divisor latch */
392 static int au_serial_dl_read(struct uart_8250_port *up)
393 {
394         return __raw_readl(up->port.membase + 0x28);
395 }
396 
397 static void au_serial_dl_write(struct uart_8250_port *up, int value)
398 {
399         __raw_writel(value, up->port.membase + 0x28);
400 }
401 
402 #endif
403 
404 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
405 {
406         offset = offset << p->regshift;
407         outb(p->hub6 - 1 + offset, p->iobase);
408         return inb(p->iobase + 1);
409 }
410 
411 static void hub6_serial_out(struct uart_port *p, int offset, int value)
412 {
413         offset = offset << p->regshift;
414         outb(p->hub6 - 1 + offset, p->iobase);
415         outb(value, p->iobase + 1);
416 }
417 
418 static unsigned int mem_serial_in(struct uart_port *p, int offset)
419 {
420         offset = offset << p->regshift;
421         return readb(p->membase + offset);
422 }
423 
424 static void mem_serial_out(struct uart_port *p, int offset, int value)
425 {
426         offset = offset << p->regshift;
427         writeb(value, p->membase + offset);
428 }
429 
430 static void mem32_serial_out(struct uart_port *p, int offset, int value)
431 {
432         offset = offset << p->regshift;
433         writel(value, p->membase + offset);
434 }
435 
436 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
437 {
438         offset = offset << p->regshift;
439         return readl(p->membase + offset);
440 }
441 
442 static unsigned int io_serial_in(struct uart_port *p, int offset)
443 {
444         offset = offset << p->regshift;
445         return inb(p->iobase + offset);
446 }
447 
448 static void io_serial_out(struct uart_port *p, int offset, int value)
449 {
450         offset = offset << p->regshift;
451         outb(value, p->iobase + offset);
452 }
453 
454 static int serial8250_default_handle_irq(struct uart_port *port);
455 static int exar_handle_irq(struct uart_port *port);
456 
457 static void set_io_from_upio(struct uart_port *p)
458 {
459         struct uart_8250_port *up = up_to_u8250p(p);
460 
461         up->dl_read = default_serial_dl_read;
462         up->dl_write = default_serial_dl_write;
463 
464         switch (p->iotype) {
465         case UPIO_HUB6:
466                 p->serial_in = hub6_serial_in;
467                 p->serial_out = hub6_serial_out;
468                 break;
469 
470         case UPIO_MEM:
471                 p->serial_in = mem_serial_in;
472                 p->serial_out = mem_serial_out;
473                 break;
474 
475         case UPIO_MEM32:
476                 p->serial_in = mem32_serial_in;
477                 p->serial_out = mem32_serial_out;
478                 break;
479 
480 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
481         case UPIO_AU:
482                 p->serial_in = au_serial_in;
483                 p->serial_out = au_serial_out;
484                 up->dl_read = au_serial_dl_read;
485                 up->dl_write = au_serial_dl_write;
486                 break;
487 #endif
488 
489         default:
490                 p->serial_in = io_serial_in;
491                 p->serial_out = io_serial_out;
492                 break;
493         }
494         /* Remember loaded iotype */
495         up->cur_iotype = p->iotype;
496         p->handle_irq = serial8250_default_handle_irq;
497 }
498 
499 static void
500 serial_port_out_sync(struct uart_port *p, int offset, int value)
501 {
502         switch (p->iotype) {
503         case UPIO_MEM:
504         case UPIO_MEM32:
505         case UPIO_AU:
506                 p->serial_out(p, offset, value);
507                 p->serial_in(p, UART_LCR);      /* safe, no side-effects */
508                 break;
509         default:
510                 p->serial_out(p, offset, value);
511         }
512 }
513 
514 /*
515  * For the 16C950
516  */
517 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
518 {
519         serial_out(up, UART_SCR, offset);
520         serial_out(up, UART_ICR, value);
521 }
522 
523 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
524 {
525         unsigned int value;
526 
527         serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
528         serial_out(up, UART_SCR, offset);
529         value = serial_in(up, UART_ICR);
530         serial_icr_write(up, UART_ACR, up->acr);
531 
532         return value;
533 }
534 
535 /*
536  * FIFO support.
537  */
538 static void serial8250_clear_fifos(struct uart_8250_port *p)
539 {
540         if (p->capabilities & UART_CAP_FIFO) {
541                 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
542                 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
543                                UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
544                 serial_out(p, UART_FCR, 0);
545         }
546 }
547 
548 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
549 {
550         serial8250_clear_fifos(p);
551         serial_out(p, UART_FCR, p->fcr);
552 }
553 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
554 
555 void serial8250_rpm_get(struct uart_8250_port *p)
556 {
557         if (!(p->capabilities & UART_CAP_RPM))
558                 return;
559         pm_runtime_get_sync(p->port.dev);
560 }
561 EXPORT_SYMBOL_GPL(serial8250_rpm_get);
562 
563 void serial8250_rpm_put(struct uart_8250_port *p)
564 {
565         if (!(p->capabilities & UART_CAP_RPM))
566                 return;
567         pm_runtime_mark_last_busy(p->port.dev);
568         pm_runtime_put_autosuspend(p->port.dev);
569 }
570 EXPORT_SYMBOL_GPL(serial8250_rpm_put);
571 
572 /*
573  * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
574  * once and disable_runtime_pm_tx() will still disable RPM because the fifo is
575  * empty and the HW can idle again.
576  */
577 static void serial8250_rpm_get_tx(struct uart_8250_port *p)
578 {
579         unsigned char rpm_active;
580 
581         if (!(p->capabilities & UART_CAP_RPM))
582                 return;
583 
584         rpm_active = xchg(&p->rpm_tx_active, 1);
585         if (rpm_active)
586                 return;
587         pm_runtime_get_sync(p->port.dev);
588 }
589 
590 static void serial8250_rpm_put_tx(struct uart_8250_port *p)
591 {
592         unsigned char rpm_active;
593 
594         if (!(p->capabilities & UART_CAP_RPM))
595                 return;
596 
597         rpm_active = xchg(&p->rpm_tx_active, 0);
598         if (!rpm_active)
599                 return;
600         pm_runtime_mark_last_busy(p->port.dev);
601         pm_runtime_put_autosuspend(p->port.dev);
602 }
603 
604 /*
605  * IER sleep support.  UARTs which have EFRs need the "extended
606  * capability" bit enabled.  Note that on XR16C850s, we need to
607  * reset LCR to write to IER.
608  */
609 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
610 {
611         unsigned char lcr = 0, efr = 0;
612         /*
613          * Exar UARTs have a SLEEP register that enables or disables
614          * each UART to enter sleep mode separately.  On the XR17V35x the
615          * register is accessible to each UART at the UART_EXAR_SLEEP
616          * offset but the UART channel may only write to the corresponding
617          * bit.
618          */
619         serial8250_rpm_get(p);
620         if ((p->port.type == PORT_XR17V35X) ||
621            (p->port.type == PORT_XR17D15X)) {
622                 serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
623                 goto out;
624         }
625 
626         if (p->capabilities & UART_CAP_SLEEP) {
627                 if (p->capabilities & UART_CAP_EFR) {
628                         lcr = serial_in(p, UART_LCR);
629                         efr = serial_in(p, UART_EFR);
630                         serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
631                         serial_out(p, UART_EFR, UART_EFR_ECB);
632                         serial_out(p, UART_LCR, 0);
633                 }
634                 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
635                 if (p->capabilities & UART_CAP_EFR) {
636                         serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
637                         serial_out(p, UART_EFR, efr);
638                         serial_out(p, UART_LCR, lcr);
639                 }
640         }
641 out:
642         serial8250_rpm_put(p);
643 }
644 
645 #ifdef CONFIG_SERIAL_8250_RSA
646 /*
647  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
648  * We set the port uart clock rate if we succeed.
649  */
650 static int __enable_rsa(struct uart_8250_port *up)
651 {
652         unsigned char mode;
653         int result;
654 
655         mode = serial_in(up, UART_RSA_MSR);
656         result = mode & UART_RSA_MSR_FIFO;
657 
658         if (!result) {
659                 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
660                 mode = serial_in(up, UART_RSA_MSR);
661                 result = mode & UART_RSA_MSR_FIFO;
662         }
663 
664         if (result)
665                 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
666 
667         return result;
668 }
669 
670 static void enable_rsa(struct uart_8250_port *up)
671 {
672         if (up->port.type == PORT_RSA) {
673                 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
674                         spin_lock_irq(&up->port.lock);
675                         __enable_rsa(up);
676                         spin_unlock_irq(&up->port.lock);
677                 }
678                 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
679                         serial_out(up, UART_RSA_FRR, 0);
680         }
681 }
682 
683 /*
684  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
685  * It is unknown why interrupts were disabled in here.  However,
686  * the caller is expected to preserve this behaviour by grabbing
687  * the spinlock before calling this function.
688  */
689 static void disable_rsa(struct uart_8250_port *up)
690 {
691         unsigned char mode;
692         int result;
693 
694         if (up->port.type == PORT_RSA &&
695             up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
696                 spin_lock_irq(&up->port.lock);
697 
698                 mode = serial_in(up, UART_RSA_MSR);
699                 result = !(mode & UART_RSA_MSR_FIFO);
700 
701                 if (!result) {
702                         serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
703                         mode = serial_in(up, UART_RSA_MSR);
704                         result = !(mode & UART_RSA_MSR_FIFO);
705                 }
706 
707                 if (result)
708                         up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
709                 spin_unlock_irq(&up->port.lock);
710         }
711 }
712 #endif /* CONFIG_SERIAL_8250_RSA */
713 
714 /*
715  * This is a quickie test to see how big the FIFO is.
716  * It doesn't work at all the time, more's the pity.
717  */
718 static int size_fifo(struct uart_8250_port *up)
719 {
720         unsigned char old_fcr, old_mcr, old_lcr;
721         unsigned short old_dl;
722         int count;
723 
724         old_lcr = serial_in(up, UART_LCR);
725         serial_out(up, UART_LCR, 0);
726         old_fcr = serial_in(up, UART_FCR);
727         old_mcr = serial_in(up, UART_MCR);
728         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
729                     UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
730         serial_out(up, UART_MCR, UART_MCR_LOOP);
731         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
732         old_dl = serial_dl_read(up);
733         serial_dl_write(up, 0x0001);
734         serial_out(up, UART_LCR, 0x03);
735         for (count = 0; count < 256; count++)
736                 serial_out(up, UART_TX, count);
737         mdelay(20);/* FIXME - schedule_timeout */
738         for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
739              (count < 256); count++)
740                 serial_in(up, UART_RX);
741         serial_out(up, UART_FCR, old_fcr);
742         serial_out(up, UART_MCR, old_mcr);
743         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
744         serial_dl_write(up, old_dl);
745         serial_out(up, UART_LCR, old_lcr);
746 
747         return count;
748 }
749 
750 /*
751  * Read UART ID using the divisor method - set DLL and DLM to zero
752  * and the revision will be in DLL and device type in DLM.  We
753  * preserve the device state across this.
754  */
755 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
756 {
757         unsigned char old_dll, old_dlm, old_lcr;
758         unsigned int id;
759 
760         old_lcr = serial_in(p, UART_LCR);
761         serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
762 
763         old_dll = serial_in(p, UART_DLL);
764         old_dlm = serial_in(p, UART_DLM);
765 
766         serial_out(p, UART_DLL, 0);
767         serial_out(p, UART_DLM, 0);
768 
769         id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
770 
771         serial_out(p, UART_DLL, old_dll);
772         serial_out(p, UART_DLM, old_dlm);
773         serial_out(p, UART_LCR, old_lcr);
774 
775         return id;
776 }
777 
778 /*
779  * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
780  * When this function is called we know it is at least a StarTech
781  * 16650 V2, but it might be one of several StarTech UARTs, or one of
782  * its clones.  (We treat the broken original StarTech 16650 V1 as a
783  * 16550, and why not?  Startech doesn't seem to even acknowledge its
784  * existence.)
785  *
786  * What evil have men's minds wrought...
787  */
788 static void autoconfig_has_efr(struct uart_8250_port *up)
789 {
790         unsigned int id1, id2, id3, rev;
791 
792         /*
793          * Everything with an EFR has SLEEP
794          */
795         up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
796 
797         /*
798          * First we check to see if it's an Oxford Semiconductor UART.
799          *
800          * If we have to do this here because some non-National
801          * Semiconductor clone chips lock up if you try writing to the
802          * LSR register (which serial_icr_read does)
803          */
804 
805         /*
806          * Check for Oxford Semiconductor 16C950.
807          *
808          * EFR [4] must be set else this test fails.
809          *
810          * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
811          * claims that it's needed for 952 dual UART's (which are not
812          * recommended for new designs).
813          */
814         up->acr = 0;
815         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
816         serial_out(up, UART_EFR, UART_EFR_ECB);
817         serial_out(up, UART_LCR, 0x00);
818         id1 = serial_icr_read(up, UART_ID1);
819         id2 = serial_icr_read(up, UART_ID2);
820         id3 = serial_icr_read(up, UART_ID3);
821         rev = serial_icr_read(up, UART_REV);
822 
823         DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
824 
825         if (id1 == 0x16 && id2 == 0xC9 &&
826             (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
827                 up->port.type = PORT_16C950;
828 
829                 /*
830                  * Enable work around for the Oxford Semiconductor 952 rev B
831                  * chip which causes it to seriously miscalculate baud rates
832                  * when DLL is 0.
833                  */
834                 if (id3 == 0x52 && rev == 0x01)
835                         up->bugs |= UART_BUG_QUOT;
836                 return;
837         }
838 
839         /*
840          * We check for a XR16C850 by setting DLL and DLM to 0, and then
841          * reading back DLL and DLM.  The chip type depends on the DLM
842          * value read back:
843          *  0x10 - XR16C850 and the DLL contains the chip revision.
844          *  0x12 - XR16C2850.
845          *  0x14 - XR16C854.
846          */
847         id1 = autoconfig_read_divisor_id(up);
848         DEBUG_AUTOCONF("850id=%04x ", id1);
849 
850         id2 = id1 >> 8;
851         if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
852                 up->port.type = PORT_16850;
853                 return;
854         }
855 
856         /*
857          * It wasn't an XR16C850.
858          *
859          * We distinguish between the '654 and the '650 by counting
860          * how many bytes are in the FIFO.  I'm using this for now,
861          * since that's the technique that was sent to me in the
862          * serial driver update, but I'm not convinced this works.
863          * I've had problems doing this in the past.  -TYT
864          */
865         if (size_fifo(up) == 64)
866                 up->port.type = PORT_16654;
867         else
868                 up->port.type = PORT_16650V2;
869 }
870 
871 /*
872  * We detected a chip without a FIFO.  Only two fall into
873  * this category - the original 8250 and the 16450.  The
874  * 16450 has a scratch register (accessible with LCR=0)
875  */
876 static void autoconfig_8250(struct uart_8250_port *up)
877 {
878         unsigned char scratch, status1, status2;
879 
880         up->port.type = PORT_8250;
881 
882         scratch = serial_in(up, UART_SCR);
883         serial_out(up, UART_SCR, 0xa5);
884         status1 = serial_in(up, UART_SCR);
885         serial_out(up, UART_SCR, 0x5a);
886         status2 = serial_in(up, UART_SCR);
887         serial_out(up, UART_SCR, scratch);
888 
889         if (status1 == 0xa5 && status2 == 0x5a)
890                 up->port.type = PORT_16450;
891 }
892 
893 static int broken_efr(struct uart_8250_port *up)
894 {
895         /*
896          * Exar ST16C2550 "A2" devices incorrectly detect as
897          * having an EFR, and report an ID of 0x0201.  See
898          * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html 
899          */
900         if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
901                 return 1;
902 
903         return 0;
904 }
905 
906 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
907 {
908         unsigned char status;
909 
910         status = serial_in(up, 0x04); /* EXCR2 */
911 #define PRESL(x) ((x) & 0x30)
912         if (PRESL(status) == 0x10) {
913                 /* already in high speed mode */
914                 return 0;
915         } else {
916                 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
917                 status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
918                 serial_out(up, 0x04, status);
919         }
920         return 1;
921 }
922 
923 /*
924  * We know that the chip has FIFOs.  Does it have an EFR?  The
925  * EFR is located in the same register position as the IIR and
926  * we know the top two bits of the IIR are currently set.  The
927  * EFR should contain zero.  Try to read the EFR.
928  */
929 static void autoconfig_16550a(struct uart_8250_port *up)
930 {
931         unsigned char status1, status2;
932         unsigned int iersave;
933 
934         up->port.type = PORT_16550A;
935         up->capabilities |= UART_CAP_FIFO;
936 
937         /*
938          * XR17V35x UARTs have an extra divisor register, DLD
939          * that gets enabled with when DLAB is set which will
940          * cause the device to incorrectly match and assign
941          * port type to PORT_16650.  The EFR for this UART is
942          * found at offset 0x09. Instead check the Deice ID (DVID)
943          * register for a 2, 4 or 8 port UART.
944          */
945         if (up->port.flags & UPF_EXAR_EFR) {
946                 status1 = serial_in(up, UART_EXAR_DVID);
947                 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
948                         DEBUG_AUTOCONF("Exar XR17V35x ");
949                         up->port.type = PORT_XR17V35X;
950                         up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
951                                                 UART_CAP_SLEEP;
952 
953                         return;
954                 }
955 
956         }
957 
958         /*
959          * Check for presence of the EFR when DLAB is set.
960          * Only ST16C650V1 UARTs pass this test.
961          */
962         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
963         if (serial_in(up, UART_EFR) == 0) {
964                 serial_out(up, UART_EFR, 0xA8);
965                 if (serial_in(up, UART_EFR) != 0) {
966                         DEBUG_AUTOCONF("EFRv1 ");
967                         up->port.type = PORT_16650;
968                         up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
969                 } else {
970                         serial_out(up, UART_LCR, 0);
971                         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
972                                    UART_FCR7_64BYTE);
973                         status1 = serial_in(up, UART_IIR) >> 5;
974                         serial_out(up, UART_FCR, 0);
975                         serial_out(up, UART_LCR, 0);
976 
977                         if (status1 == 7)
978                                 up->port.type = PORT_16550A_FSL64;
979                         else
980                                 DEBUG_AUTOCONF("Motorola 8xxx DUART ");
981                 }
982                 serial_out(up, UART_EFR, 0);
983                 return;
984         }
985 
986         /*
987          * Maybe it requires 0xbf to be written to the LCR.
988          * (other ST16C650V2 UARTs, TI16C752A, etc)
989          */
990         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
991         if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
992                 DEBUG_AUTOCONF("EFRv2 ");
993                 autoconfig_has_efr(up);
994                 return;
995         }
996 
997         /*
998          * Check for a National Semiconductor SuperIO chip.
999          * Attempt to switch to bank 2, read the value of the LOOP bit
1000          * from EXCR1. Switch back to bank 0, change it in MCR. Then
1001          * switch back to bank 2, read it from EXCR1 again and check
1002          * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
1003          */
1004         serial_out(up, UART_LCR, 0);
1005         status1 = serial_in(up, UART_MCR);
1006         serial_out(up, UART_LCR, 0xE0);
1007         status2 = serial_in(up, 0x02); /* EXCR1 */
1008 
1009         if (!((status2 ^ status1) & UART_MCR_LOOP)) {
1010                 serial_out(up, UART_LCR, 0);
1011                 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
1012                 serial_out(up, UART_LCR, 0xE0);
1013                 status2 = serial_in(up, 0x02); /* EXCR1 */
1014                 serial_out(up, UART_LCR, 0);
1015                 serial_out(up, UART_MCR, status1);
1016 
1017                 if ((status2 ^ status1) & UART_MCR_LOOP) {
1018                         unsigned short quot;
1019 
1020                         serial_out(up, UART_LCR, 0xE0);
1021 
1022                         quot = serial_dl_read(up);
1023                         quot <<= 3;
1024 
1025                         if (ns16550a_goto_highspeed(up))
1026                                 serial_dl_write(up, quot);
1027 
1028                         serial_out(up, UART_LCR, 0);
1029 
1030                         up->port.uartclk = 921600*16;
1031                         up->port.type = PORT_NS16550A;
1032                         up->capabilities |= UART_NATSEMI;
1033                         return;
1034                 }
1035         }
1036 
1037         /*
1038          * No EFR.  Try to detect a TI16750, which only sets bit 5 of
1039          * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1040          * Try setting it with and without DLAB set.  Cheap clones
1041          * set bit 5 without DLAB set.
1042          */
1043         serial_out(up, UART_LCR, 0);
1044         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1045         status1 = serial_in(up, UART_IIR) >> 5;
1046         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1047         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1048         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1049         status2 = serial_in(up, UART_IIR) >> 5;
1050         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1051         serial_out(up, UART_LCR, 0);
1052 
1053         DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1054 
1055         if (status1 == 6 && status2 == 7) {
1056                 up->port.type = PORT_16750;
1057                 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1058                 return;
1059         }
1060 
1061         /*
1062          * Try writing and reading the UART_IER_UUE bit (b6).
1063          * If it works, this is probably one of the Xscale platform's
1064          * internal UARTs.
1065          * We're going to explicitly set the UUE bit to 0 before
1066          * trying to write and read a 1 just to make sure it's not
1067          * already a 1 and maybe locked there before we even start start.
1068          */
1069         iersave = serial_in(up, UART_IER);
1070         serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1071         if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1072                 /*
1073                  * OK it's in a known zero state, try writing and reading
1074                  * without disturbing the current state of the other bits.
1075                  */
1076                 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1077                 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1078                         /*
1079                          * It's an Xscale.
1080                          * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1081                          */
1082                         DEBUG_AUTOCONF("Xscale ");
1083                         up->port.type = PORT_XSCALE;
1084                         up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
1085                         return;
1086                 }
1087         } else {
1088                 /*
1089                  * If we got here we couldn't force the IER_UUE bit to 0.
1090                  * Log it and continue.
1091                  */
1092                 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1093         }
1094         serial_out(up, UART_IER, iersave);
1095 
1096         /*
1097          * Exar uarts have EFR in a weird location
1098          */
1099         if (up->port.flags & UPF_EXAR_EFR) {
1100                 DEBUG_AUTOCONF("Exar XR17D15x ");
1101                 up->port.type = PORT_XR17D15X;
1102                 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1103                                     UART_CAP_SLEEP;
1104 
1105                 return;
1106         }
1107 
1108         /*
1109          * We distinguish between 16550A and U6 16550A by counting
1110          * how many bytes are in the FIFO.
1111          */
1112         if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1113                 up->port.type = PORT_U6_16550A;
1114                 up->capabilities |= UART_CAP_AFE;
1115         }
1116 }
1117 
1118 /*
1119  * This routine is called by rs_init() to initialize a specific serial
1120  * port.  It determines what type of UART chip this serial port is
1121  * using: 8250, 16450, 16550, 16550A.  The important question is
1122  * whether or not this UART is a 16550A or not, since this will
1123  * determine whether or not we can use its FIFO features or not.
1124  */
1125 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1126 {
1127         unsigned char status1, scratch, scratch2, scratch3;
1128         unsigned char save_lcr, save_mcr;
1129         struct uart_port *port = &up->port;
1130         unsigned long flags;
1131         unsigned int old_capabilities;
1132 
1133         if (!port->iobase && !port->mapbase && !port->membase)
1134                 return;
1135 
1136         DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1137                        serial_index(port), port->iobase, port->membase);
1138 
1139         /*
1140          * We really do need global IRQs disabled here - we're going to
1141          * be frobbing the chips IRQ enable register to see if it exists.
1142          */
1143         spin_lock_irqsave(&port->lock, flags);
1144 
1145         up->capabilities = 0;
1146         up->bugs = 0;
1147 
1148         if (!(port->flags & UPF_BUGGY_UART)) {
1149                 /*
1150                  * Do a simple existence test first; if we fail this,
1151                  * there's no point trying anything else.
1152                  *
1153                  * 0x80 is used as a nonsense port to prevent against
1154                  * false positives due to ISA bus float.  The
1155                  * assumption is that 0x80 is a non-existent port;
1156                  * which should be safe since include/asm/io.h also
1157                  * makes this assumption.
1158                  *
1159                  * Note: this is safe as long as MCR bit 4 is clear
1160                  * and the device is in "PC" mode.
1161                  */
1162                 scratch = serial_in(up, UART_IER);
1163                 serial_out(up, UART_IER, 0);
1164 #ifdef __i386__
1165                 outb(0xff, 0x080);
1166 #endif
1167                 /*
1168                  * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1169                  * 16C754B) allow only to modify them if an EFR bit is set.
1170                  */
1171                 scratch2 = serial_in(up, UART_IER) & 0x0f;
1172                 serial_out(up, UART_IER, 0x0F);
1173 #ifdef __i386__
1174                 outb(0, 0x080);
1175 #endif
1176                 scratch3 = serial_in(up, UART_IER) & 0x0f;
1177                 serial_out(up, UART_IER, scratch);
1178                 if (scratch2 != 0 || scratch3 != 0x0F) {
1179                         /*
1180                          * We failed; there's nothing here
1181                          */
1182                         spin_unlock_irqrestore(&port->lock, flags);
1183                         DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1184                                        scratch2, scratch3);
1185                         goto out;
1186                 }
1187         }
1188 
1189         save_mcr = serial_in(up, UART_MCR);
1190         save_lcr = serial_in(up, UART_LCR);
1191 
1192         /*
1193          * Check to see if a UART is really there.  Certain broken
1194          * internal modems based on the Rockwell chipset fail this
1195          * test, because they apparently don't implement the loopback
1196          * test mode.  So this test is skipped on the COM 1 through
1197          * COM 4 ports.  This *should* be safe, since no board
1198          * manufacturer would be stupid enough to design a board
1199          * that conflicts with COM 1-4 --- we hope!
1200          */
1201         if (!(port->flags & UPF_SKIP_TEST)) {
1202                 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1203                 status1 = serial_in(up, UART_MSR) & 0xF0;
1204                 serial_out(up, UART_MCR, save_mcr);
1205                 if (status1 != 0x90) {
1206                         spin_unlock_irqrestore(&port->lock, flags);
1207                         DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1208                                        status1);
1209                         goto out;
1210                 }
1211         }
1212 
1213         /*
1214          * We're pretty sure there's a port here.  Lets find out what
1215          * type of port it is.  The IIR top two bits allows us to find
1216          * out if it's 8250 or 16450, 16550, 16550A or later.  This
1217          * determines what we test for next.
1218          *
1219          * We also initialise the EFR (if any) to zero for later.  The
1220          * EFR occupies the same register location as the FCR and IIR.
1221          */
1222         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1223         serial_out(up, UART_EFR, 0);
1224         serial_out(up, UART_LCR, 0);
1225 
1226         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1227         scratch = serial_in(up, UART_IIR) >> 6;
1228 
1229         switch (scratch) {
1230         case 0:
1231                 autoconfig_8250(up);
1232                 break;
1233         case 1:
1234                 port->type = PORT_UNKNOWN;
1235                 break;
1236         case 2:
1237                 port->type = PORT_16550;
1238                 break;
1239         case 3:
1240                 autoconfig_16550a(up);
1241                 break;
1242         }
1243 
1244 #ifdef CONFIG_SERIAL_8250_RSA
1245         /*
1246          * Only probe for RSA ports if we got the region.
1247          */
1248         if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
1249                 int i;
1250 
1251                 for (i = 0 ; i < probe_rsa_count; ++i) {
1252                         if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1253                                 port->type = PORT_RSA;
1254                                 break;
1255                         }
1256                 }
1257         }
1258 #endif
1259 
1260         serial_out(up, UART_LCR, save_lcr);
1261 
1262         port->fifosize = uart_config[up->port.type].fifo_size;
1263         old_capabilities = up->capabilities; 
1264         up->capabilities = uart_config[port->type].flags;
1265         up->tx_loadsz = uart_config[port->type].tx_loadsz;
1266 
1267         if (port->type == PORT_UNKNOWN)
1268                 goto out_lock;
1269 
1270         /*
1271          * Reset the UART.
1272          */
1273 #ifdef CONFIG_SERIAL_8250_RSA
1274         if (port->type == PORT_RSA)
1275                 serial_out(up, UART_RSA_FRR, 0);
1276 #endif
1277         serial_out(up, UART_MCR, save_mcr);
1278         serial8250_clear_fifos(up);
1279         serial_in(up, UART_RX);
1280         if (up->capabilities & UART_CAP_UUE)
1281                 serial_out(up, UART_IER, UART_IER_UUE);
1282         else
1283                 serial_out(up, UART_IER, 0);
1284 
1285 out_lock:
1286         spin_unlock_irqrestore(&port->lock, flags);
1287         if (up->capabilities != old_capabilities) {
1288                 printk(KERN_WARNING
1289                        "ttyS%d: detected caps %08x should be %08x\n",
1290                        serial_index(port), old_capabilities,
1291                        up->capabilities);
1292         }
1293 out:
1294         DEBUG_AUTOCONF("iir=%d ", scratch);
1295         DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1296 }
1297 
1298 static void autoconfig_irq(struct uart_8250_port *up)
1299 {
1300         struct uart_port *port = &up->port;
1301         unsigned char save_mcr, save_ier;
1302         unsigned char save_ICP = 0;
1303         unsigned int ICP = 0;
1304         unsigned long irqs;
1305         int irq;
1306 
1307         if (port->flags & UPF_FOURPORT) {
1308                 ICP = (port->iobase & 0xfe0) | 0x1f;
1309                 save_ICP = inb_p(ICP);
1310                 outb_p(0x80, ICP);
1311                 inb_p(ICP);
1312         }
1313 
1314         /* forget possible initially masked and pending IRQ */
1315         probe_irq_off(probe_irq_on());
1316         save_mcr = serial_in(up, UART_MCR);
1317         save_ier = serial_in(up, UART_IER);
1318         serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1319 
1320         irqs = probe_irq_on();
1321         serial_out(up, UART_MCR, 0);
1322         udelay(10);
1323         if (port->flags & UPF_FOURPORT) {
1324                 serial_out(up, UART_MCR,
1325                             UART_MCR_DTR | UART_MCR_RTS);
1326         } else {
1327                 serial_out(up, UART_MCR,
1328                             UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1329         }
1330         serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1331         serial_in(up, UART_LSR);
1332         serial_in(up, UART_RX);
1333         serial_in(up, UART_IIR);
1334         serial_in(up, UART_MSR);
1335         serial_out(up, UART_TX, 0xFF);
1336         udelay(20);
1337         irq = probe_irq_off(irqs);
1338 
1339         serial_out(up, UART_MCR, save_mcr);
1340         serial_out(up, UART_IER, save_ier);
1341 
1342         if (port->flags & UPF_FOURPORT)
1343                 outb_p(save_ICP, ICP);
1344 
1345         port->irq = (irq > 0) ? irq : 0;
1346 }
1347 
1348 static inline void __stop_tx(struct uart_8250_port *p)
1349 {
1350         if (p->ier & UART_IER_THRI) {
1351                 p->ier &= ~UART_IER_THRI;
1352                 serial_out(p, UART_IER, p->ier);
1353                 serial8250_rpm_put_tx(p);
1354         }
1355 }
1356 
1357 static void serial8250_stop_tx(struct uart_port *port)
1358 {
1359         struct uart_8250_port *up = up_to_u8250p(port);
1360 
1361         serial8250_rpm_get(up);
1362         __stop_tx(up);
1363 
1364         /*
1365          * We really want to stop the transmitter from sending.
1366          */
1367         if (port->type == PORT_16C950) {
1368                 up->acr |= UART_ACR_TXDIS;
1369                 serial_icr_write(up, UART_ACR, up->acr);
1370         }
1371         serial8250_rpm_put(up);
1372 }
1373 
1374 static void serial8250_start_tx(struct uart_port *port)
1375 {
1376         struct uart_8250_port *up = up_to_u8250p(port);
1377 
1378         serial8250_rpm_get_tx(up);
1379 
1380         if (up->dma && !up->dma->tx_dma(up))
1381                 return;
1382 
1383         if (!(up->ier & UART_IER_THRI)) {
1384                 up->ier |= UART_IER_THRI;
1385                 serial_port_out(port, UART_IER, up->ier);
1386 
1387                 if (up->bugs & UART_BUG_TXEN) {
1388                         unsigned char lsr;
1389                         lsr = serial_in(up, UART_LSR);
1390                         up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1391                         if (lsr & UART_LSR_THRE)
1392                                 serial8250_tx_chars(up);
1393                 }
1394         }
1395 
1396         /*
1397          * Re-enable the transmitter if we disabled it.
1398          */
1399         if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1400                 up->acr &= ~UART_ACR_TXDIS;
1401                 serial_icr_write(up, UART_ACR, up->acr);
1402         }
1403 }
1404 
1405 static void serial8250_throttle(struct uart_port *port)
1406 {
1407         port->throttle(port);
1408 }
1409 
1410 static void serial8250_unthrottle(struct uart_port *port)
1411 {
1412         port->unthrottle(port);
1413 }
1414 
1415 static void serial8250_stop_rx(struct uart_port *port)
1416 {
1417         struct uart_8250_port *up = up_to_u8250p(port);
1418 
1419         serial8250_rpm_get(up);
1420 
1421         up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
1422         up->port.read_status_mask &= ~UART_LSR_DR;
1423         serial_port_out(port, UART_IER, up->ier);
1424 
1425         serial8250_rpm_put(up);
1426 }
1427 
1428 static void serial8250_disable_ms(struct uart_port *port)
1429 {
1430         struct uart_8250_port *up =
1431                 container_of(port, struct uart_8250_port, port);
1432 
1433         /* no MSR capabilities */
1434         if (up->bugs & UART_BUG_NOMSR)
1435                 return;
1436 
1437         up->ier &= ~UART_IER_MSI;
1438         serial_port_out(port, UART_IER, up->ier);
1439 }
1440 
1441 static void serial8250_enable_ms(struct uart_port *port)
1442 {
1443         struct uart_8250_port *up = up_to_u8250p(port);
1444 
1445         /* no MSR capabilities */
1446         if (up->bugs & UART_BUG_NOMSR)
1447                 return;
1448 
1449         up->ier |= UART_IER_MSI;
1450 
1451         serial8250_rpm_get(up);
1452         serial_port_out(port, UART_IER, up->ier);
1453         serial8250_rpm_put(up);
1454 }
1455 
1456 /*
1457  * serial8250_rx_chars: processes according to the passed in LSR
1458  * value, and returns the remaining LSR bits not handled
1459  * by this Rx routine.
1460  */
1461 unsigned char
1462 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1463 {
1464         struct uart_port *port = &up->port;
1465         unsigned char ch;
1466         int max_count = 256;
1467         char flag;
1468 
1469         do {
1470                 if (likely(lsr & UART_LSR_DR))
1471                         ch = serial_in(up, UART_RX);
1472                 else
1473                         /*
1474                          * Intel 82571 has a Serial Over Lan device that will
1475                          * set UART_LSR_BI without setting UART_LSR_DR when
1476                          * it receives a break. To avoid reading from the
1477                          * receive buffer without UART_LSR_DR bit set, we
1478                          * just force the read character to be 0
1479                          */
1480                         ch = 0;
1481 
1482                 flag = TTY_NORMAL;
1483                 port->icount.rx++;
1484 
1485                 lsr |= up->lsr_saved_flags;
1486                 up->lsr_saved_flags = 0;
1487 
1488                 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1489                         if (lsr & UART_LSR_BI) {
1490                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1491                                 port->icount.brk++;
1492                                 /*
1493                                  * We do the SysRQ and SAK checking
1494                                  * here because otherwise the break
1495                                  * may get masked by ignore_status_mask
1496                                  * or read_status_mask.
1497                                  */
1498                                 if (uart_handle_break(port))
1499                                         goto ignore_char;
1500                         } else if (lsr & UART_LSR_PE)
1501                                 port->icount.parity++;
1502                         else if (lsr & UART_LSR_FE)
1503                                 port->icount.frame++;
1504                         if (lsr & UART_LSR_OE)
1505                                 port->icount.overrun++;
1506 
1507                         /*
1508                          * Mask off conditions which should be ignored.
1509                          */
1510                         lsr &= port->read_status_mask;
1511 
1512                         if (lsr & UART_LSR_BI) {
1513                                 DEBUG_INTR("handling break....");
1514                                 flag = TTY_BREAK;
1515                         } else if (lsr & UART_LSR_PE)
1516                                 flag = TTY_PARITY;
1517                         else if (lsr & UART_LSR_FE)
1518                                 flag = TTY_FRAME;
1519                 }
1520                 if (uart_handle_sysrq_char(port, ch))
1521                         goto ignore_char;
1522 
1523                 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1524 
1525 ignore_char:
1526                 lsr = serial_in(up, UART_LSR);
1527         } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (--max_count > 0));
1528         spin_unlock(&port->lock);
1529         tty_flip_buffer_push(&port->state->port);
1530         spin_lock(&port->lock);
1531         return lsr;
1532 }
1533 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1534 
1535 void serial8250_tx_chars(struct uart_8250_port *up)
1536 {
1537         struct uart_port *port = &up->port;
1538         struct circ_buf *xmit = &port->state->xmit;
1539         int count;
1540 
1541         if (port->x_char) {
1542                 serial_out(up, UART_TX, port->x_char);
1543                 port->icount.tx++;
1544                 port->x_char = 0;
1545                 return;
1546         }
1547         if (uart_tx_stopped(port)) {
1548                 serial8250_stop_tx(port);
1549                 return;
1550         }
1551         if (uart_circ_empty(xmit)) {
1552                 __stop_tx(up);
1553                 return;
1554         }
1555 
1556         count = up->tx_loadsz;
1557         do {
1558                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1559                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1560                 port->icount.tx++;
1561                 if (uart_circ_empty(xmit))
1562                         break;
1563                 if (up->capabilities & UART_CAP_HFIFO) {
1564                         if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1565                             BOTH_EMPTY)
1566                                 break;
1567                 }
1568         } while (--count > 0);
1569 
1570         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1571                 uart_write_wakeup(port);
1572 
1573         DEBUG_INTR("THRE...");
1574 
1575         /*
1576          * With RPM enabled, we have to wait until the FIFO is empty before the
1577          * HW can go idle. So we get here once again with empty FIFO and disable
1578          * the interrupt and RPM in __stop_tx()
1579          */
1580         if (uart_circ_empty(xmit) && !(up->capabilities & UART_CAP_RPM))
1581                 __stop_tx(up);
1582 }
1583 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1584 
1585 /* Caller holds uart port lock */
1586 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1587 {
1588         struct uart_port *port = &up->port;
1589         unsigned int status = serial_in(up, UART_MSR);
1590 
1591         status |= up->msr_saved_flags;
1592         up->msr_saved_flags = 0;
1593         if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1594             port->state != NULL) {
1595                 if (status & UART_MSR_TERI)
1596                         port->icount.rng++;
1597                 if (status & UART_MSR_DDSR)
1598                         port->icount.dsr++;
1599                 if (status & UART_MSR_DDCD)
1600                         uart_handle_dcd_change(port, status & UART_MSR_DCD);
1601                 if (status & UART_MSR_DCTS)
1602                         uart_handle_cts_change(port, status & UART_MSR_CTS);
1603 
1604                 wake_up_interruptible(&port->state->port.delta_msr_wait);
1605         }
1606 
1607         return status;
1608 }
1609 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1610 
1611 /*
1612  * This handles the interrupt from one port.
1613  */
1614 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1615 {
1616         unsigned char status;
1617         unsigned long flags;
1618         struct uart_8250_port *up = up_to_u8250p(port);
1619         int dma_err = 0;
1620 
1621         if (iir & UART_IIR_NO_INT)
1622                 return 0;
1623 
1624         spin_lock_irqsave(&port->lock, flags);
1625 
1626         status = serial_port_in(port, UART_LSR);
1627 
1628         DEBUG_INTR("status = %x...", status);
1629 
1630         if (status & (UART_LSR_DR | UART_LSR_BI)) {
1631                 if (up->dma)
1632                         dma_err = up->dma->rx_dma(up, iir);
1633 
1634                 if (!up->dma || dma_err)
1635                         status = serial8250_rx_chars(up, status);
1636         }
1637         serial8250_modem_status(up);
1638         if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1639             (status & UART_LSR_THRE))
1640                 serial8250_tx_chars(up);
1641 
1642         spin_unlock_irqrestore(&port->lock, flags);
1643         return 1;
1644 }
1645 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1646 
1647 static int serial8250_default_handle_irq(struct uart_port *port)
1648 {
1649         struct uart_8250_port *up = up_to_u8250p(port);
1650         unsigned int iir;
1651         int ret;
1652 
1653         serial8250_rpm_get(up);
1654 
1655         iir = serial_port_in(port, UART_IIR);
1656         ret = serial8250_handle_irq(port, iir);
1657 
1658         serial8250_rpm_put(up);
1659         return ret;
1660 }
1661 
1662 /*
1663  * These Exar UARTs have an extra interrupt indicator that could
1664  * fire for a few unimplemented interrupts.  One of which is a
1665  * wakeup event when coming out of sleep.  Put this here just
1666  * to be on the safe side that these interrupts don't go unhandled.
1667  */
1668 static int exar_handle_irq(struct uart_port *port)
1669 {
1670         unsigned char int0, int1, int2, int3;
1671         unsigned int iir = serial_port_in(port, UART_IIR);
1672         int ret;
1673 
1674         ret = serial8250_handle_irq(port, iir);
1675 
1676         if ((port->type == PORT_XR17V35X) ||
1677            (port->type == PORT_XR17D15X)) {
1678                 int0 = serial_port_in(port, 0x80);
1679                 int1 = serial_port_in(port, 0x81);
1680                 int2 = serial_port_in(port, 0x82);
1681                 int3 = serial_port_in(port, 0x83);
1682         }
1683 
1684         return ret;
1685 }
1686 
1687 /*
1688  * This is the serial driver's interrupt routine.
1689  *
1690  * Arjan thinks the old way was overly complex, so it got simplified.
1691  * Alan disagrees, saying that need the complexity to handle the weird
1692  * nature of ISA shared interrupts.  (This is a special exception.)
1693  *
1694  * In order to handle ISA shared interrupts properly, we need to check
1695  * that all ports have been serviced, and therefore the ISA interrupt
1696  * line has been de-asserted.
1697  *
1698  * This means we need to loop through all ports. checking that they
1699  * don't have an interrupt pending.
1700  */
1701 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1702 {
1703         struct irq_info *i = dev_id;
1704         struct list_head *l, *end = NULL;
1705         int pass_counter = 0, handled = 0;
1706 
1707         DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1708 
1709         spin_lock(&i->lock);
1710 
1711         l = i->head;
1712         do {
1713                 struct uart_8250_port *up;
1714                 struct uart_port *port;
1715 
1716                 up = list_entry(l, struct uart_8250_port, list);
1717                 port = &up->port;
1718 
1719                 if (port->handle_irq(port)) {
1720                         handled = 1;
1721                         end = NULL;
1722                 } else if (end == NULL)
1723                         end = l;
1724 
1725                 l = l->next;
1726 
1727                 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1728                         /* If we hit this, we're dead. */
1729                         printk_ratelimited(KERN_ERR
1730                                 "serial8250: too much work for irq%d\n", irq);
1731                         break;
1732                 }
1733         } while (l != end);
1734 
1735         spin_unlock(&i->lock);
1736 
1737         DEBUG_INTR("end.\n");
1738 
1739         return IRQ_RETVAL(handled);
1740 }
1741 
1742 /*
1743  * To support ISA shared interrupts, we need to have one interrupt
1744  * handler that ensures that the IRQ line has been deasserted
1745  * before returning.  Failing to do this will result in the IRQ
1746  * line being stuck active, and, since ISA irqs are edge triggered,
1747  * no more IRQs will be seen.
1748  */
1749 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1750 {
1751         spin_lock_irq(&i->lock);
1752 
1753         if (!list_empty(i->head)) {
1754                 if (i->head == &up->list)
1755                         i->head = i->head->next;
1756                 list_del(&up->list);
1757         } else {
1758                 BUG_ON(i->head != &up->list);
1759                 i->head = NULL;
1760         }
1761         spin_unlock_irq(&i->lock);
1762         /* List empty so throw away the hash node */
1763         if (i->head == NULL) {
1764                 hlist_del(&i->node);
1765                 kfree(i);
1766         }
1767 }
1768 
1769 static int serial_link_irq_chain(struct uart_8250_port *up)
1770 {
1771         struct hlist_head *h;
1772         struct hlist_node *n;
1773         struct irq_info *i;
1774         int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1775 
1776         mutex_lock(&hash_mutex);
1777 
1778         h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1779 
1780         hlist_for_each(n, h) {
1781                 i = hlist_entry(n, struct irq_info, node);
1782                 if (i->irq == up->port.irq)
1783                         break;
1784         }
1785 
1786         if (n == NULL) {
1787                 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1788                 if (i == NULL) {
1789                         mutex_unlock(&hash_mutex);
1790                         return -ENOMEM;
1791                 }
1792                 spin_lock_init(&i->lock);
1793                 i->irq = up->port.irq;
1794                 hlist_add_head(&i->node, h);
1795         }
1796         mutex_unlock(&hash_mutex);
1797 
1798         spin_lock_irq(&i->lock);
1799 
1800         if (i->head) {
1801                 list_add(&up->list, i->head);
1802                 spin_unlock_irq(&i->lock);
1803 
1804                 ret = 0;
1805         } else {
1806                 INIT_LIST_HEAD(&up->list);
1807                 i->head = &up->list;
1808                 spin_unlock_irq(&i->lock);
1809                 irq_flags |= up->port.irqflags;
1810                 ret = request_irq(up->port.irq, serial8250_interrupt,
1811                                   irq_flags, "serial", i);
1812                 if (ret < 0)
1813                         serial_do_unlink(i, up);
1814         }
1815 
1816         return ret;
1817 }
1818 
1819 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1820 {
1821         /*
1822          * yes, some broken gcc emit "warning: 'i' may be used uninitialized"
1823          * but no, we are not going to take a patch that assigns NULL below.
1824          */
1825         struct irq_info *i;
1826         struct hlist_node *n;
1827         struct hlist_head *h;
1828 
1829         mutex_lock(&hash_mutex);
1830 
1831         h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1832 
1833         hlist_for_each(n, h) {
1834                 i = hlist_entry(n, struct irq_info, node);
1835                 if (i->irq == up->port.irq)
1836                         break;
1837         }
1838 
1839         BUG_ON(n == NULL);
1840         BUG_ON(i->head == NULL);
1841 
1842         if (list_empty(i->head))
1843                 free_irq(up->port.irq, i);
1844 
1845         serial_do_unlink(i, up);
1846         mutex_unlock(&hash_mutex);
1847 }
1848 
1849 /*
1850  * This function is used to handle ports that do not have an
1851  * interrupt.  This doesn't work very well for 16450's, but gives
1852  * barely passable results for a 16550A.  (Although at the expense
1853  * of much CPU overhead).
1854  */
1855 static void serial8250_timeout(unsigned long data)
1856 {
1857         struct uart_8250_port *up = (struct uart_8250_port *)data;
1858 
1859         up->port.handle_irq(&up->port);
1860         mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1861 }
1862 
1863 static void serial8250_backup_timeout(unsigned long data)
1864 {
1865         struct uart_8250_port *up = (struct uart_8250_port *)data;
1866         unsigned int iir, ier = 0, lsr;
1867         unsigned long flags;
1868 
1869         spin_lock_irqsave(&up->port.lock, flags);
1870 
1871         /*
1872          * Must disable interrupts or else we risk racing with the interrupt
1873          * based handler.
1874          */
1875         if (up->port.irq) {
1876                 ier = serial_in(up, UART_IER);
1877                 serial_out(up, UART_IER, 0);
1878         }
1879 
1880         iir = serial_in(up, UART_IIR);
1881 
1882         /*
1883          * This should be a safe test for anyone who doesn't trust the
1884          * IIR bits on their UART, but it's specifically designed for
1885          * the "Diva" UART used on the management processor on many HP
1886          * ia64 and parisc boxes.
1887          */
1888         lsr = serial_in(up, UART_LSR);
1889         up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1890         if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1891             (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1892             (lsr & UART_LSR_THRE)) {
1893                 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1894                 iir |= UART_IIR_THRI;
1895         }
1896 
1897         if (!(iir & UART_IIR_NO_INT))
1898                 serial8250_tx_chars(up);
1899 
1900         if (up->port.irq)
1901                 serial_out(up, UART_IER, ier);
1902 
1903         spin_unlock_irqrestore(&up->port.lock, flags);
1904 
1905         /* Standard timer interval plus 0.2s to keep the port running */
1906         mod_timer(&up->timer,
1907                 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1908 }
1909 
1910 static unsigned int serial8250_tx_empty(struct uart_port *port)
1911 {
1912         struct uart_8250_port *up = up_to_u8250p(port);
1913         unsigned long flags;
1914         unsigned int lsr;
1915 
1916         serial8250_rpm_get(up);
1917 
1918         spin_lock_irqsave(&port->lock, flags);
1919         lsr = serial_port_in(port, UART_LSR);
1920         up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1921         spin_unlock_irqrestore(&port->lock, flags);
1922 
1923         serial8250_rpm_put(up);
1924 
1925         return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1926 }
1927 
1928 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1929 {
1930         struct uart_8250_port *up = up_to_u8250p(port);
1931         unsigned int status;
1932         unsigned int ret;
1933 
1934         serial8250_rpm_get(up);
1935         status = serial8250_modem_status(up);
1936         serial8250_rpm_put(up);
1937 
1938         ret = 0;
1939         if (status & UART_MSR_DCD)
1940                 ret |= TIOCM_CAR;
1941         if (status & UART_MSR_RI)
1942                 ret |= TIOCM_RNG;
1943         if (status & UART_MSR_DSR)
1944                 ret |= TIOCM_DSR;
1945         if (status & UART_MSR_CTS)
1946                 ret |= TIOCM_CTS;
1947         return ret;
1948 }
1949 
1950 void serial8250_do_set_mctrl(struct uart_port *port, unsigned int mctrl)
1951 {
1952         struct uart_8250_port *up = up_to_u8250p(port);
1953         unsigned char mcr = 0;
1954 
1955         if (mctrl & TIOCM_RTS)
1956                 mcr |= UART_MCR_RTS;
1957         if (mctrl & TIOCM_DTR)
1958                 mcr |= UART_MCR_DTR;
1959         if (mctrl & TIOCM_OUT1)
1960                 mcr |= UART_MCR_OUT1;
1961         if (mctrl & TIOCM_OUT2)
1962                 mcr |= UART_MCR_OUT2;
1963         if (mctrl & TIOCM_LOOP)
1964                 mcr |= UART_MCR_LOOP;
1965 
1966         mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1967 
1968         serial_port_out(port, UART_MCR, mcr);
1969 }
1970 EXPORT_SYMBOL_GPL(serial8250_do_set_mctrl);
1971 
1972 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1973 {
1974         if (port->set_mctrl)
1975                 return port->set_mctrl(port, mctrl);
1976         return serial8250_do_set_mctrl(port, mctrl);
1977 }
1978 
1979 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1980 {
1981         struct uart_8250_port *up = up_to_u8250p(port);
1982         unsigned long flags;
1983 
1984         serial8250_rpm_get(up);
1985         spin_lock_irqsave(&port->lock, flags);
1986         if (break_state == -1)
1987                 up->lcr |= UART_LCR_SBC;
1988         else
1989                 up->lcr &= ~UART_LCR_SBC;
1990         serial_port_out(port, UART_LCR, up->lcr);
1991         spin_unlock_irqrestore(&port->lock, flags);
1992         serial8250_rpm_put(up);
1993 }
1994 
1995 /*
1996  *      Wait for transmitter & holding register to empty
1997  */
1998 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1999 {
2000         unsigned int status, tmout = 10000;
2001 
2002         /* Wait up to 10ms for the character(s) to be sent. */
2003         for (;;) {
2004                 status = serial_in(up, UART_LSR);
2005 
2006                 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
2007 
2008                 if ((status & bits) == bits)
2009                         break;
2010                 if (--tmout == 0)
2011                         break;
2012                 udelay(1);
2013         }
2014 
2015         /* Wait up to 1s for flow control if necessary */
2016         if (up->port.flags & UPF_CONS_FLOW) {
2017                 unsigned int tmout;
2018                 for (tmout = 1000000; tmout; tmout--) {
2019                         unsigned int msr = serial_in(up, UART_MSR);
2020                         up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
2021                         if (msr & UART_MSR_CTS)
2022                                 break;
2023                         udelay(1);
2024                         touch_nmi_watchdog();
2025                 }
2026         }
2027 }
2028 
2029 #ifdef CONFIG_CONSOLE_POLL
2030 /*
2031  * Console polling routines for writing and reading from the uart while
2032  * in an interrupt or debug context.
2033  */
2034 
2035 static int serial8250_get_poll_char(struct uart_port *port)
2036 {
2037         struct uart_8250_port *up = up_to_u8250p(port);
2038         unsigned char lsr;
2039         int status;
2040 
2041         serial8250_rpm_get(up);
2042 
2043         lsr = serial_port_in(port, UART_LSR);
2044 
2045         if (!(lsr & UART_LSR_DR)) {
2046                 status = NO_POLL_CHAR;
2047                 goto out;
2048         }
2049 
2050         status = serial_port_in(port, UART_RX);
2051 out:
2052         serial8250_rpm_put(up);
2053         return status;
2054 }
2055 
2056 
2057 static void serial8250_put_poll_char(struct uart_port *port,
2058                          unsigned char c)
2059 {
2060         unsigned int ier;
2061         struct uart_8250_port *up = up_to_u8250p(port);
2062 
2063         serial8250_rpm_get(up);
2064         /*
2065          *      First save the IER then disable the interrupts
2066          */
2067         ier = serial_port_in(port, UART_IER);
2068         if (up->capabilities & UART_CAP_UUE)
2069                 serial_port_out(port, UART_IER, UART_IER_UUE);
2070         else
2071                 serial_port_out(port, UART_IER, 0);
2072 
2073         wait_for_xmitr(up, BOTH_EMPTY);
2074         /*
2075          *      Send the character out.
2076          */
2077         serial_port_out(port, UART_TX, c);
2078 
2079         /*
2080          *      Finally, wait for transmitter to become empty
2081          *      and restore the IER
2082          */
2083         wait_for_xmitr(up, BOTH_EMPTY);
2084         serial_port_out(port, UART_IER, ier);
2085         serial8250_rpm_put(up);
2086 }
2087 
2088 #endif /* CONFIG_CONSOLE_POLL */
2089 
2090 int serial8250_do_startup(struct uart_port *port)
2091 {
2092         struct uart_8250_port *up = up_to_u8250p(port);
2093         unsigned long flags;
2094         unsigned char lsr, iir;
2095         int retval;
2096 
2097         if (port->type == PORT_8250_CIR)
2098                 return -ENODEV;
2099 
2100         if (!port->fifosize)
2101                 port->fifosize = uart_config[port->type].fifo_size;
2102         if (!up->tx_loadsz)
2103                 up->tx_loadsz = uart_config[port->type].tx_loadsz;
2104         if (!up->capabilities)
2105                 up->capabilities = uart_config[port->type].flags;
2106         up->mcr = 0;
2107 
2108         if (port->iotype != up->cur_iotype)
2109                 set_io_from_upio(port);
2110 
2111         serial8250_rpm_get(up);
2112         if (port->type == PORT_16C950) {
2113                 /* Wake up and initialize UART */
2114                 up->acr = 0;
2115                 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2116                 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2117                 serial_port_out(port, UART_IER, 0);
2118                 serial_port_out(port, UART_LCR, 0);
2119                 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2120                 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2121                 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2122                 serial_port_out(port, UART_LCR, 0);
2123         }
2124 
2125 #ifdef CONFIG_SERIAL_8250_RSA
2126         /*
2127          * If this is an RSA port, see if we can kick it up to the
2128          * higher speed clock.
2129          */
2130         enable_rsa(up);
2131 #endif
2132         /*
2133          * Clear the FIFO buffers and disable them.
2134          * (they will be reenabled in set_termios())
2135          */
2136         serial8250_clear_fifos(up);
2137 
2138         /*
2139          * Clear the interrupt registers.
2140          */
2141         serial_port_in(port, UART_LSR);
2142         serial_port_in(port, UART_RX);
2143         serial_port_in(port, UART_IIR);
2144         serial_port_in(port, UART_MSR);
2145 
2146         /*
2147          * At this point, there's no way the LSR could still be 0xff;
2148          * if it is, then bail out, because there's likely no UART
2149          * here.
2150          */
2151         if (!(port->flags & UPF_BUGGY_UART) &&
2152             (serial_port_in(port, UART_LSR) == 0xff)) {
2153                 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2154                                    serial_index(port));
2155                 retval = -ENODEV;
2156                 goto out;
2157         }
2158 
2159         /*
2160          * For a XR16C850, we need to set the trigger levels
2161          */
2162         if (port->type == PORT_16850) {
2163                 unsigned char fctr;
2164 
2165                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2166 
2167                 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2168                 serial_port_out(port, UART_FCTR,
2169                                 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2170                 serial_port_out(port, UART_TRG, UART_TRG_96);
2171                 serial_port_out(port, UART_FCTR,
2172                                 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2173                 serial_port_out(port, UART_TRG, UART_TRG_96);
2174 
2175                 serial_port_out(port, UART_LCR, 0);
2176         }
2177 
2178         if (port->irq) {
2179                 unsigned char iir1;
2180                 /*
2181                  * Test for UARTs that do not reassert THRE when the
2182                  * transmitter is idle and the interrupt has already
2183                  * been cleared.  Real 16550s should always reassert
2184                  * this interrupt whenever the transmitter is idle and
2185                  * the interrupt is enabled.  Delays are necessary to
2186                  * allow register changes to become visible.
2187                  */
2188                 spin_lock_irqsave(&port->lock, flags);
2189                 if (up->port.irqflags & IRQF_SHARED)
2190                         disable_irq_nosync(port->irq);
2191 
2192                 wait_for_xmitr(up, UART_LSR_THRE);
2193                 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2194                 udelay(1); /* allow THRE to set */
2195                 iir1 = serial_port_in(port, UART_IIR);
2196                 serial_port_out(port, UART_IER, 0);
2197                 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2198                 udelay(1); /* allow a working UART time to re-assert THRE */
2199                 iir = serial_port_in(port, UART_IIR);
2200                 serial_port_out(port, UART_IER, 0);
2201 
2202                 if (port->irqflags & IRQF_SHARED)
2203                         enable_irq(port->irq);
2204                 spin_unlock_irqrestore(&port->lock, flags);
2205 
2206                 /*
2207                  * If the interrupt is not reasserted, or we otherwise
2208                  * don't trust the iir, setup a timer to kick the UART
2209                  * on a regular basis.
2210                  */
2211                 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2212                     up->port.flags & UPF_BUG_THRE) {
2213                         up->bugs |= UART_BUG_THRE;
2214                         pr_debug("ttyS%d - using backup timer\n",
2215                                  serial_index(port));
2216                 }
2217         }
2218 
2219         /*
2220          * The above check will only give an accurate result the first time
2221          * the port is opened so this value needs to be preserved.
2222          */
2223         if (up->bugs & UART_BUG_THRE) {
2224                 up->timer.function = serial8250_backup_timeout;
2225                 up->timer.data = (unsigned long)up;
2226                 mod_timer(&up->timer, jiffies +
2227                         uart_poll_timeout(port) + HZ / 5);
2228         }
2229 
2230         /*
2231          * If the "interrupt" for this port doesn't correspond with any
2232          * hardware interrupt, we use a timer-based system.  The original
2233          * driver used to do this with IRQ0.
2234          */
2235         if (!port->irq) {
2236                 up->timer.data = (unsigned long)up;
2237                 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2238         } else {
2239                 retval = serial_link_irq_chain(up);
2240                 if (retval)
2241                         goto out;
2242         }
2243 
2244         /*
2245          * Now, initialize the UART
2246          */
2247         serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2248 
2249         spin_lock_irqsave(&port->lock, flags);
2250         if (up->port.flags & UPF_FOURPORT) {
2251                 if (!up->port.irq)
2252                         up->port.mctrl |= TIOCM_OUT1;
2253         } else
2254                 /*
2255                  * Most PC uarts need OUT2 raised to enable interrupts.
2256                  */
2257                 if (port->irq)
2258                         up->port.mctrl |= TIOCM_OUT2;
2259 
2260         serial8250_set_mctrl(port, port->mctrl);
2261 
2262         /* Serial over Lan (SoL) hack:
2263            Intel 8257x Gigabit ethernet chips have a
2264            16550 emulation, to be used for Serial Over Lan.
2265            Those chips take a longer time than a normal
2266            serial device to signalize that a transmission
2267            data was queued. Due to that, the above test generally
2268            fails. One solution would be to delay the reading of
2269            iir. However, this is not reliable, since the timeout
2270            is variable. So, let's just don't test if we receive
2271            TX irq. This way, we'll never enable UART_BUG_TXEN.
2272          */
2273         if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2274                 goto dont_test_tx_en;
2275 
2276         /*
2277          * Do a quick test to see if we receive an
2278          * interrupt when we enable the TX irq.
2279          */
2280         serial_port_out(port, UART_IER, UART_IER_THRI);
2281         lsr = serial_port_in(port, UART_LSR);
2282         iir = serial_port_in(port, UART_IIR);
2283         serial_port_out(port, UART_IER, 0);
2284 
2285         if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2286                 if (!(up->bugs & UART_BUG_TXEN)) {
2287                         up->bugs |= UART_BUG_TXEN;
2288                         pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2289                                  serial_index(port));
2290                 }
2291         } else {
2292                 up->bugs &= ~UART_BUG_TXEN;
2293         }
2294 
2295 dont_test_tx_en:
2296         spin_unlock_irqrestore(&port->lock, flags);
2297 
2298         /*
2299          * Clear the interrupt registers again for luck, and clear the
2300          * saved flags to avoid getting false values from polling
2301          * routines or the previous session.
2302          */
2303         serial_port_in(port, UART_LSR);
2304         serial_port_in(port, UART_RX);
2305         serial_port_in(port, UART_IIR);
2306         serial_port_in(port, UART_MSR);
2307         up->lsr_saved_flags = 0;
2308         up->msr_saved_flags = 0;
2309 
2310         /*
2311          * Request DMA channels for both RX and TX.
2312          */
2313         if (up->dma) {
2314                 retval = serial8250_request_dma(up);
2315                 if (retval) {
2316                         pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
2317                                             serial_index(port));
2318                         up->dma = NULL;
2319                 }
2320         }
2321 
2322         /*
2323          * Finally, enable interrupts.  Note: Modem status interrupts
2324          * are set via set_termios(), which will be occurring imminently
2325          * anyway, so we don't enable them here.
2326          */
2327         up->ier = UART_IER_RLSI | UART_IER_RDI;
2328         serial_port_out(port, UART_IER, up->ier);
2329 
2330         if (port->flags & UPF_FOURPORT) {
2331                 unsigned int icp;
2332                 /*
2333                  * Enable interrupts on the AST Fourport board
2334                  */
2335                 icp = (port->iobase & 0xfe0) | 0x01f;
2336                 outb_p(0x80, icp);
2337                 inb_p(icp);
2338         }
2339         retval = 0;
2340 out:
2341         serial8250_rpm_put(up);
2342         return retval;
2343 }
2344 EXPORT_SYMBOL_GPL(serial8250_do_startup);
2345 
2346 static int serial8250_startup(struct uart_port *port)
2347 {
2348         if (port->startup)
2349                 return port->startup(port);
2350         return serial8250_do_startup(port);
2351 }
2352 
2353 void serial8250_do_shutdown(struct uart_port *port)
2354 {
2355         struct uart_8250_port *up = up_to_u8250p(port);
2356         unsigned long flags;
2357 
2358         serial8250_rpm_get(up);
2359         /*
2360          * Disable interrupts from this port
2361          */
2362         up->ier = 0;
2363         serial_port_out(port, UART_IER, 0);
2364 
2365         if (up->dma)
2366                 serial8250_release_dma(up);
2367 
2368         spin_lock_irqsave(&port->lock, flags);
2369         if (port->flags & UPF_FOURPORT) {
2370                 /* reset interrupts on the AST Fourport board */
2371                 inb((port->iobase & 0xfe0) | 0x1f);
2372                 port->mctrl |= TIOCM_OUT1;
2373         } else
2374                 port->mctrl &= ~TIOCM_OUT2;
2375 
2376         serial8250_set_mctrl(port, port->mctrl);
2377         spin_unlock_irqrestore(&port->lock, flags);
2378 
2379         /*
2380          * Disable break condition and FIFOs
2381          */
2382         serial_port_out(port, UART_LCR,
2383                         serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2384         serial8250_clear_fifos(up);
2385 
2386 #ifdef CONFIG_SERIAL_8250_RSA
2387         /*
2388          * Reset the RSA board back to 115kbps compat mode.
2389          */
2390         disable_rsa(up);
2391 #endif
2392 
2393         /*
2394          * Read data port to reset things, and then unlink from
2395          * the IRQ chain.
2396          */
2397         serial_port_in(port, UART_RX);
2398         serial8250_rpm_put(up);
2399 
2400         del_timer_sync(&up->timer);
2401         up->timer.function = serial8250_timeout;
2402         if (port->irq)
2403                 serial_unlink_irq_chain(up);
2404 }
2405 EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
2406 
2407 static void serial8250_shutdown(struct uart_port *port)
2408 {
2409         if (port->shutdown)
2410                 port->shutdown(port);
2411         else
2412                 serial8250_do_shutdown(port);
2413 }
2414 
2415 /*
2416  * XR17V35x UARTs have an extra fractional divisor register (DLD)
2417  * Calculate divisor with extra 4-bit fractional portion
2418  */
2419 static unsigned int xr17v35x_get_divisor(struct uart_8250_port *up,
2420                                          unsigned int baud,
2421                                          unsigned int *frac)
2422 {
2423         struct uart_port *port = &up->port;
2424         unsigned int quot_16;
2425 
2426         quot_16 = DIV_ROUND_CLOSEST(port->uartclk, baud);
2427         *frac = quot_16 & 0x0f;
2428 
2429         return quot_16 >> 4;
2430 }
2431 
2432 static unsigned int serial8250_get_divisor(struct uart_8250_port *up,
2433                                            unsigned int baud,
2434                                            unsigned int *frac)
2435 {
2436         struct uart_port *port = &up->port;
2437         unsigned int quot;
2438 
2439         /*
2440          * Handle magic divisors for baud rates above baud_base on
2441          * SMSC SuperIO chips.
2442          *
2443          */
2444         if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2445             baud == (port->uartclk/4))
2446                 quot = 0x8001;
2447         else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2448                  baud == (port->uartclk/8))
2449                 quot = 0x8002;
2450         else if (up->port.type == PORT_XR17V35X)
2451                 quot = xr17v35x_get_divisor(up, baud, frac);
2452         else
2453                 quot = uart_get_divisor(port, baud);
2454 
2455         /*
2456          * Oxford Semi 952 rev B workaround
2457          */
2458         if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2459                 quot++;
2460 
2461         return quot;
2462 }
2463 
2464 static unsigned char serial8250_compute_lcr(struct uart_8250_port *up,
2465                                             tcflag_t c_cflag)
2466 {
2467         unsigned char cval;
2468 
2469         switch (c_cflag & CSIZE) {
2470         case CS5:
2471                 cval = UART_LCR_WLEN5;
2472                 break;
2473         case CS6:
2474                 cval = UART_LCR_WLEN6;
2475                 break;
2476         case CS7:
2477                 cval = UART_LCR_WLEN7;
2478                 break;
2479         default:
2480         case CS8:
2481                 cval = UART_LCR_WLEN8;
2482                 break;
2483         }
2484 
2485         if (c_cflag & CSTOPB)
2486                 cval |= UART_LCR_STOP;
2487         if (c_cflag & PARENB) {
2488                 cval |= UART_LCR_PARITY;
2489                 if (up->bugs & UART_BUG_PARITY)
2490                         up->fifo_bug = true;
2491         }
2492         if (!(c_cflag & PARODD))
2493                 cval |= UART_LCR_EPAR;
2494 #ifdef CMSPAR
2495         if (c_cflag & CMSPAR)
2496                 cval |= UART_LCR_SPAR;
2497 #endif
2498 
2499         return cval;
2500 }
2501 
2502 static void serial8250_set_divisor(struct uart_port *port, unsigned int baud,
2503                             unsigned int quot, unsigned int quot_frac)
2504 {
2505         struct uart_8250_port *up = up_to_u8250p(port);
2506 
2507         /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2508         if (is_omap1510_8250(up)) {
2509                 if (baud == 115200) {
2510                         quot = 1;
2511                         serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2512                 } else
2513                         serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2514         }
2515 
2516         /*
2517          * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2518          * otherwise just set DLAB
2519          */
2520         if (up->capabilities & UART_NATSEMI)
2521                 serial_port_out(port, UART_LCR, 0xe0);
2522         else
2523                 serial_port_out(port, UART_LCR, up->lcr | UART_LCR_DLAB);
2524 
2525         serial_dl_write(up, quot);
2526 
2527         /* XR17V35x UARTs have an extra fractional divisor register (DLD) */
2528         if (up->port.type == PORT_XR17V35X)
2529                 serial_port_out(port, 0x2, quot_frac);
2530 }
2531 
2532 void
2533 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2534                           struct ktermios *old)
2535 {
2536         struct uart_8250_port *up = up_to_u8250p(port);
2537         unsigned char cval;
2538         unsigned long flags;
2539         unsigned int baud, quot, frac = 0;
2540 
2541         cval = serial8250_compute_lcr(up, termios->c_cflag);
2542 
2543         /*
2544          * Ask the core to calculate the divisor for us.
2545          */
2546         baud = uart_get_baud_rate(port, termios, old,
2547                                   port->uartclk / 16 / 0xffff,
2548                                   port->uartclk / 16);
2549         quot = serial8250_get_divisor(up, baud, &frac);
2550 
2551         /*
2552          * Ok, we're now changing the port state.  Do it with
2553          * interrupts disabled.
2554          */
2555         serial8250_rpm_get(up);
2556         spin_lock_irqsave(&port->lock, flags);
2557 
2558         up->lcr = cval;                                 /* Save computed LCR */
2559 
2560         if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2561                 /* NOTE: If fifo_bug is not set, a user can set RX_trigger. */
2562                 if ((baud < 2400 && !up->dma) || up->fifo_bug) {
2563                         up->fcr &= ~UART_FCR_TRIGGER_MASK;
2564                         up->fcr |= UART_FCR_TRIGGER_1;
2565                 }
2566         }
2567 
2568         /*
2569          * MCR-based auto flow control.  When AFE is enabled, RTS will be
2570          * deasserted when the receive FIFO contains more characters than
2571          * the trigger, or the MCR RTS bit is cleared.  In the case where
2572          * the remote UART is not using CTS auto flow control, we must
2573          * have sufficient FIFO entries for the latency of the remote
2574          * UART to respond.  IOW, at least 32 bytes of FIFO.
2575          */
2576         if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2577                 up->mcr &= ~UART_MCR_AFE;
2578                 if (termios->c_cflag & CRTSCTS)
2579                         up->mcr |= UART_MCR_AFE;
2580         }
2581 
2582         /*
2583          * Update the per-port timeout.
2584          */
2585         uart_update_timeout(port, termios->c_cflag, baud);
2586 
2587         port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2588         if (termios->c_iflag & INPCK)
2589                 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2590         if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
2591                 port->read_status_mask |= UART_LSR_BI;
2592 
2593         /*
2594          * Characteres to ignore
2595          */
2596         port->ignore_status_mask = 0;
2597         if (termios->c_iflag & IGNPAR)
2598                 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2599         if (termios->c_iflag & IGNBRK) {
2600                 port->ignore_status_mask |= UART_LSR_BI;
2601                 /*
2602                  * If we're ignoring parity and break indicators,
2603                  * ignore overruns too (for real raw support).
2604                  */
2605                 if (termios->c_iflag & IGNPAR)
2606                         port->ignore_status_mask |= UART_LSR_OE;
2607         }
2608 
2609         /*
2610          * ignore all characters if CREAD is not set
2611          */
2612         if ((termios->c_cflag & CREAD) == 0)
2613                 port->ignore_status_mask |= UART_LSR_DR;
2614 
2615         /*
2616          * CTS flow control flag and modem status interrupts
2617          */
2618         up->ier &= ~UART_IER_MSI;
2619         if (!(up->bugs & UART_BUG_NOMSR) &&
2620                         UART_ENABLE_MS(&up->port, termios->c_cflag))
2621                 up->ier |= UART_IER_MSI;
2622         if (up->capabilities & UART_CAP_UUE)
2623                 up->ier |= UART_IER_UUE;
2624         if (up->capabilities & UART_CAP_RTOIE)
2625                 up->ier |= UART_IER_RTOIE;
2626 
2627         serial_port_out(port, UART_IER, up->ier);
2628 
2629         if (up->capabilities & UART_CAP_EFR) {
2630                 unsigned char efr = 0;
2631                 /*
2632                  * TI16C752/Startech hardware flow control.  FIXME:
2633                  * - TI16C752 requires control thresholds to be set.
2634                  * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2635                  */
2636                 if (termios->c_cflag & CRTSCTS)
2637                         efr |= UART_EFR_CTS;
2638 
2639                 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2640                 if (port->flags & UPF_EXAR_EFR)
2641                         serial_port_out(port, UART_XR_EFR, efr);
2642                 else
2643                         serial_port_out(port, UART_EFR, efr);
2644         }
2645 
2646         serial8250_set_divisor(port, baud, quot, frac);
2647 
2648         /*
2649          * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2650          * is written without DLAB set, this mode will be disabled.
2651          */
2652         if (port->type == PORT_16750)
2653                 serial_port_out(port, UART_FCR, up->fcr);
2654 
2655         serial_port_out(port, UART_LCR, up->lcr);       /* reset DLAB */
2656         if (port->type != PORT_16750) {
2657                 /* emulated UARTs (Lucent Venus 167x) need two steps */
2658                 if (up->fcr & UART_FCR_ENABLE_FIFO)
2659                         serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2660                 serial_port_out(port, UART_FCR, up->fcr);       /* set fcr */
2661         }
2662         serial8250_set_mctrl(port, port->mctrl);
2663         spin_unlock_irqrestore(&port->lock, flags);
2664         serial8250_rpm_put(up);
2665 
2666         /* Don't rewrite B0 */
2667         if (tty_termios_baud_rate(termios))
2668                 tty_termios_encode_baud_rate(termios, baud, baud);
2669 }
2670 EXPORT_SYMBOL(serial8250_do_set_termios);
2671 
2672 static void
2673 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2674                        struct ktermios *old)
2675 {
2676         if (port->set_termios)
2677                 port->set_termios(port, termios, old);
2678         else
2679                 serial8250_do_set_termios(port, termios, old);
2680 }
2681 
2682 static void
2683 serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios)
2684 {
2685         if (termios->c_line == N_PPS) {
2686                 port->flags |= UPF_HARDPPS_CD;
2687                 spin_lock_irq(&port->lock);
2688                 serial8250_enable_ms(port);
2689                 spin_unlock_irq(&port->lock);
2690         } else {
2691                 port->flags &= ~UPF_HARDPPS_CD;
2692                 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2693                         spin_lock_irq(&port->lock);
2694                         serial8250_disable_ms(port);
2695                         spin_unlock_irq(&port->lock);
2696                 }
2697         }
2698 }
2699 
2700 
2701 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2702                       unsigned int oldstate)
2703 {
2704         struct uart_8250_port *p = up_to_u8250p(port);
2705 
2706         serial8250_set_sleep(p, state != 0);
2707 }
2708 EXPORT_SYMBOL(serial8250_do_pm);
2709 
2710 static void
2711 serial8250_pm(struct uart_port *port, unsigned int state,
2712               unsigned int oldstate)
2713 {
2714         if (port->pm)
2715                 port->pm(port, state, oldstate);
2716         else
2717                 serial8250_do_pm(port, state, oldstate);
2718 }
2719 
2720 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2721 {
2722         if (pt->port.iotype == UPIO_AU) {
2723                 if (pt->port.type == PORT_RT2880)
2724                         return 0x100;
2725                 return 0x1000;
2726         }
2727         if (is_omap1_8250(pt))
2728                 return 0x16 << pt->port.regshift;
2729 
2730         return 8 << pt->port.regshift;
2731 }
2732 
2733 /*
2734  * Resource handling.
2735  */
2736 static int serial8250_request_std_resource(struct uart_8250_port *up)
2737 {
2738         unsigned int size = serial8250_port_size(up);
2739         struct uart_port *port = &up->port;
2740         int ret = 0;
2741 
2742         switch (port->iotype) {
2743         case UPIO_AU:
2744         case UPIO_TSI:
2745         case UPIO_MEM32:
2746         case UPIO_MEM:
2747                 if (!port->mapbase)
2748                         break;
2749 
2750                 if (!request_mem_region(port->mapbase, size, "serial")) {
2751                         ret = -EBUSY;
2752                         break;
2753                 }
2754 
2755                 if (port->flags & UPF_IOREMAP) {
2756                         port->membase = ioremap_nocache(port->mapbase, size);
2757                         if (!port->membase) {
2758                                 release_mem_region(port->mapbase, size);
2759                                 ret = -ENOMEM;
2760                         }
2761                 }
2762                 break;
2763 
2764         case UPIO_HUB6:
2765         case UPIO_PORT:
2766                 if (!request_region(port->iobase, size, "serial"))
2767                         ret = -EBUSY;
2768                 break;
2769         }
2770         return ret;
2771 }
2772 
2773 static void serial8250_release_std_resource(struct uart_8250_port *up)
2774 {
2775         unsigned int size = serial8250_port_size(up);
2776         struct uart_port *port = &up->port;
2777 
2778         switch (port->iotype) {
2779         case UPIO_AU:
2780         case UPIO_TSI:
2781         case UPIO_MEM32:
2782         case UPIO_MEM:
2783                 if (!port->mapbase)
2784                         break;
2785 
2786                 if (port->flags & UPF_IOREMAP) {
2787                         iounmap(port->membase);
2788                         port->membase = NULL;
2789                 }
2790 
2791                 release_mem_region(port->mapbase, size);
2792                 break;
2793 
2794         case UPIO_HUB6:
2795         case UPIO_PORT:
2796                 release_region(port->iobase, size);
2797                 break;
2798         }
2799 }
2800 
2801 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2802 {
2803         unsigned long start = UART_RSA_BASE << up->port.regshift;
2804         unsigned int size = 8 << up->port.regshift;
2805         struct uart_port *port = &up->port;
2806         int ret = -EINVAL;
2807 
2808         switch (port->iotype) {
2809         case UPIO_HUB6:
2810         case UPIO_PORT:
2811                 start += port->iobase;
2812                 if (request_region(start, size, "serial-rsa"))
2813                         ret = 0;
2814                 else
2815                         ret = -EBUSY;
2816                 break;
2817         }
2818 
2819         return ret;
2820 }
2821 
2822 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2823 {
2824         unsigned long offset = UART_RSA_BASE << up->port.regshift;
2825         unsigned int size = 8 << up->port.regshift;
2826         struct uart_port *port = &up->port;
2827 
2828         switch (port->iotype) {
2829         case UPIO_HUB6:
2830         case UPIO_PORT:
2831                 release_region(port->iobase + offset, size);
2832                 break;
2833         }
2834 }
2835 
2836 static void serial8250_release_port(struct uart_port *port)
2837 {
2838         struct uart_8250_port *up = up_to_u8250p(port);
2839 
2840         serial8250_release_std_resource(up);
2841         if (port->type == PORT_RSA)
2842                 serial8250_release_rsa_resource(up);
2843 }
2844 
2845 static int serial8250_request_port(struct uart_port *port)
2846 {
2847         struct uart_8250_port *up = up_to_u8250p(port);
2848         int ret;
2849 
2850         if (port->type == PORT_8250_CIR)
2851                 return -ENODEV;
2852 
2853         ret = serial8250_request_std_resource(up);
2854         if (ret == 0 && port->type == PORT_RSA) {
2855                 ret = serial8250_request_rsa_resource(up);
2856                 if (ret < 0)
2857                         serial8250_release_std_resource(up);
2858         }
2859 
2860         return ret;
2861 }
2862 
2863 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
2864 {
2865         const struct serial8250_config *conf_type = &uart_config[up->port.type];
2866         unsigned char bytes;
2867 
2868         bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
2869 
2870         return bytes ? bytes : -EOPNOTSUPP;
2871 }
2872 
2873 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
2874 {
2875         const struct serial8250_config *conf_type = &uart_config[up->port.type];
2876         int i;
2877 
2878         if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
2879                 return -EOPNOTSUPP;
2880 
2881         for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
2882                 if (bytes < conf_type->rxtrig_bytes[i])
2883                         /* Use the nearest lower value */
2884                         return (--i) << UART_FCR_R_TRIG_SHIFT;
2885         }
2886 
2887         return UART_FCR_R_TRIG_11;
2888 }
2889 
2890 static int do_get_rxtrig(struct tty_port *port)
2891 {
2892         struct uart_state *state = container_of(port, struct uart_state, port);
2893         struct uart_port *uport = state->uart_port;
2894         struct uart_8250_port *up =
2895                 container_of(uport, struct uart_8250_port, port);
2896 
2897         if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
2898                 return -EINVAL;
2899 
2900         return fcr_get_rxtrig_bytes(up);
2901 }
2902 
2903 static int do_serial8250_get_rxtrig(struct tty_port *port)
2904 {
2905         int rxtrig_bytes;
2906 
2907         mutex_lock(&port->mutex);
2908         rxtrig_bytes = do_get_rxtrig(port);
2909         mutex_unlock(&port->mutex);
2910 
2911         return rxtrig_bytes;
2912 }
2913 
2914 static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
2915         struct device_attribute *attr, char *buf)
2916 {
2917         struct tty_port *port = dev_get_drvdata(dev);
2918         int rxtrig_bytes;
2919 
2920         rxtrig_bytes = do_serial8250_get_rxtrig(port);
2921         if (rxtrig_bytes < 0)
2922                 return rxtrig_bytes;
2923 
2924         return snprintf(buf, PAGE_SIZE, "%d\n", rxtrig_bytes);
2925 }
2926 
2927 static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
2928 {
2929         struct uart_state *state = container_of(port, struct uart_state, port);
2930         struct uart_port *uport = state->uart_port;
2931         struct uart_8250_port *up =
2932                 container_of(uport, struct uart_8250_port, port);
2933         int rxtrig;
2934 
2935         if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||
2936             up->fifo_bug)
2937                 return -EINVAL;
2938 
2939         rxtrig = bytes_to_fcr_rxtrig(up, bytes);
2940         if (rxtrig < 0)
2941                 return rxtrig;
2942 
2943         serial8250_clear_fifos(up);
2944         up->fcr &= ~UART_FCR_TRIGGER_MASK;
2945         up->fcr |= (unsigned char)rxtrig;
2946         serial_out(up, UART_FCR, up->fcr);
2947         return 0;
2948 }
2949 
2950 static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
2951 {
2952         int ret;
2953 
2954         mutex_lock(&port->mutex);
2955         ret = do_set_rxtrig(port, bytes);
2956         mutex_unlock(&port->mutex);
2957 
2958         return ret;
2959 }
2960 
2961 static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
2962         struct device_attribute *attr, const char *buf, size_t count)
2963 {
2964         struct tty_port *port = dev_get_drvdata(dev);
2965         unsigned char bytes;
2966         int ret;
2967 
2968         if (!count)
2969                 return -EINVAL;
2970 
2971         ret = kstrtou8(buf, 10, &bytes);
2972         if (ret < 0)
2973                 return ret;
2974 
2975         ret = do_serial8250_set_rxtrig(port, bytes);
2976         if (ret < 0)
2977                 return ret;
2978 
2979         return count;
2980 }
2981 
2982 static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
2983                    serial8250_get_attr_rx_trig_bytes,
2984                    serial8250_set_attr_rx_trig_bytes);
2985 
2986 static struct attribute *serial8250_dev_attrs[] = {
2987         &dev_attr_rx_trig_bytes.attr,
2988         NULL,
2989         };
2990 
2991 static struct attribute_group serial8250_dev_attr_group = {
2992         .attrs = serial8250_dev_attrs,
2993         };
2994 
2995 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
2996 {
2997         const struct serial8250_config *conf_type = &uart_config[up->port.type];
2998 
2999         if (conf_type->rxtrig_bytes[0])
3000                 up->port.attr_group = &serial8250_dev_attr_group;
3001 }
3002 
3003 static void serial8250_config_port(struct uart_port *port, int flags)
3004 {
3005         struct uart_8250_port *up = up_to_u8250p(port);
3006         int probeflags = PROBE_ANY;
3007         int ret;
3008 
3009         if (port->type == PORT_8250_CIR)
3010                 return;
3011 
3012         /*
3013          * Find the region that we can probe for.  This in turn
3014          * tells us whether we can probe for the type of port.
3015          */
3016         ret = serial8250_request_std_resource(up);
3017         if (ret < 0)
3018                 return;
3019 
3020         ret = serial8250_request_rsa_resource(up);
3021         if (ret < 0)
3022                 probeflags &= ~PROBE_RSA;
3023 
3024         if (port->iotype != up->cur_iotype)
3025                 set_io_from_upio(port);
3026 
3027         if (flags & UART_CONFIG_TYPE)
3028                 autoconfig(up, probeflags);
3029 
3030         /* if access method is AU, it is a 16550 with a quirk */
3031         if (port->type == PORT_16550A && port->iotype == UPIO_AU)
3032                 up->bugs |= UART_BUG_NOMSR;
3033 
3034         /* HW bugs may trigger IRQ while IIR == NO_INT */
3035         if (port->type == PORT_TEGRA)
3036                 up->bugs |= UART_BUG_NOMSR;
3037 
3038         if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
3039                 autoconfig_irq(up);
3040 
3041         if (port->type != PORT_RSA && probeflags & PROBE_RSA)
3042                 serial8250_release_rsa_resource(up);
3043         if (port->type == PORT_UNKNOWN)
3044                 serial8250_release_std_resource(up);
3045 
3046         /* Fixme: probably not the best place for this */
3047         if ((port->type == PORT_XR17V35X) ||
3048            (port->type == PORT_XR17D15X))
3049                 port->handle_irq = exar_handle_irq;
3050 
3051         register_dev_spec_attr_grp(up);
3052         up->fcr = uart_config[up->port.type].fcr;
3053 }
3054 
3055 static int
3056 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
3057 {
3058         if (ser->irq >= nr_irqs || ser->irq < 0 ||
3059             ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
3060             ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
3061             ser->type == PORT_STARTECH)
3062                 return -EINVAL;
3063         return 0;
3064 }
3065 
3066 static const char *
3067 serial8250_type(struct uart_port *port)
3068 {
3069         int type = port->type;
3070 
3071         if (type >= ARRAY_SIZE(uart_config))
3072                 type = 0;
3073         return uart_config[type].name;
3074 }
3075 
3076 static struct uart_ops serial8250_pops = {
3077         .tx_empty       = serial8250_tx_empty,
3078         .set_mctrl      = serial8250_set_mctrl,
3079         .get_mctrl      = serial8250_get_mctrl,
3080         .stop_tx        = serial8250_stop_tx,
3081         .start_tx       = serial8250_start_tx,
3082         .throttle       = serial8250_throttle,
3083         .unthrottle     = serial8250_unthrottle,
3084         .stop_rx        = serial8250_stop_rx,
3085         .enable_ms      = serial8250_enable_ms,
3086         .break_ctl      = serial8250_break_ctl,
3087         .startup        = serial8250_startup,
3088         .shutdown       = serial8250_shutdown,
3089         .set_termios    = serial8250_set_termios,
3090         .set_ldisc      = serial8250_set_ldisc,
3091         .pm             = serial8250_pm,
3092         .type           = serial8250_type,
3093         .release_port   = serial8250_release_port,
3094         .request_port   = serial8250_request_port,
3095         .config_port    = serial8250_config_port,
3096         .verify_port    = serial8250_verify_port,
3097 #ifdef CONFIG_CONSOLE_POLL
3098         .poll_get_char = serial8250_get_poll_char,
3099         .poll_put_char = serial8250_put_poll_char,
3100 #endif
3101 };
3102 
3103 static struct uart_8250_port serial8250_ports[UART_NR];
3104 
3105 /**
3106  * serial8250_get_port - retrieve struct uart_8250_port
3107  * @line: serial line number
3108  *
3109  * This function retrieves struct uart_8250_port for the specific line.
3110  * This struct *must* *not* be used to perform a 8250 or serial core operation
3111  * which is not accessible otherwise. Its only purpose is to make the struct
3112  * accessible to the runtime-pm callbacks for context suspend/restore.
3113  * The lock assumption made here is none because runtime-pm suspend/resume
3114  * callbacks should not be invoked if there is any operation performed on the
3115  * port.
3116  */
3117 struct uart_8250_port *serial8250_get_port(int line)
3118 {
3119         return &serial8250_ports[line];
3120 }
3121 EXPORT_SYMBOL_GPL(serial8250_get_port);
3122 
3123 static void (*serial8250_isa_config)(int port, struct uart_port *up,
3124         unsigned short *capabilities);
3125 
3126 void serial8250_set_isa_configurator(
3127         void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
3128 {
3129         serial8250_isa_config = v;
3130 }
3131 EXPORT_SYMBOL(serial8250_set_isa_configurator);
3132 
3133 static void __init serial8250_isa_init_ports(void)
3134 {
3135         struct uart_8250_port *up;
3136         static int first = 1;
3137         int i, irqflag = 0;
3138 
3139         if (!first)
3140                 return;
3141         first = 0;
3142 
3143         if (nr_uarts > UART_NR)
3144                 nr_uarts = UART_NR;
3145 
3146         for (i = 0; i < nr_uarts; i++) {
3147                 struct uart_8250_port *up = &serial8250_ports[i];
3148                 struct uart_port *port = &up->port;
3149 
3150                 port->line = i;
3151                 spin_lock_init(&port->lock);
3152 
3153                 init_timer(&up->timer);
3154                 up->timer.function = serial8250_timeout;
3155                 up->cur_iotype = 0xFF;
3156 
3157                 /*
3158                  * ALPHA_KLUDGE_MCR needs to be killed.
3159                  */
3160                 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
3161                 up->mcr_force = ALPHA_KLUDGE_MCR;
3162 
3163                 port->ops = &serial8250_pops;
3164         }
3165 
3166         if (share_irqs)
3167                 irqflag = IRQF_SHARED;
3168 
3169         for (i = 0, up = serial8250_ports;
3170              i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
3171              i++, up++) {
3172                 struct uart_port *port = &up->port;
3173 
3174                 port->iobase   = old_serial_port[i].port;
3175                 port->irq      = irq_canonicalize(old_serial_port[i].irq);
3176                 port->irqflags = old_serial_port[i].irqflags;
3177                 port->uartclk  = old_serial_port[i].baud_base * 16;
3178                 port->flags    = old_serial_port[i].flags;
3179                 port->hub6     = old_serial_port[i].hub6;
3180                 port->membase  = old_serial_port[i].iomem_base;
3181                 port->iotype   = old_serial_port[i].io_type;
3182                 port->regshift = old_serial_port[i].iomem_reg_shift;
3183                 set_io_from_upio(port);
3184                 port->irqflags |= irqflag;
3185                 if (serial8250_isa_config != NULL)
3186                         serial8250_isa_config(i, &up->port, &up->capabilities);
3187 
3188         }
3189 }
3190 
3191 static void
3192 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
3193 {
3194         up->port.type = type;
3195         if (!up->port.fifosize)
3196                 up->port.fifosize = uart_config[type].fifo_size;
3197         if (!up->tx_loadsz)
3198                 up->tx_loadsz = uart_config[type].tx_loadsz;
3199         if (!up->capabilities)
3200                 up->capabilities = uart_config[type].flags;
3201 }
3202 
3203 static void __init
3204 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3205 {
3206         int i;
3207 
3208         for (i = 0; i < nr_uarts; i++) {
3209                 struct uart_8250_port *up = &serial8250_ports[i];
3210 
3211                 if (up->port.dev)
3212                         continue;
3213 
3214                 up->port.dev = dev;
3215 
3216                 if (up->port.flags & UPF_FIXED_TYPE)
3217                         serial8250_init_fixed_type_port(up, up->port.type);
3218 
3219                 uart_add_one_port(drv, &up->port);
3220         }
3221 }
3222 
3223 #ifdef CONFIG_SERIAL_8250_CONSOLE
3224 
3225 static void serial8250_console_putchar(struct uart_port *port, int ch)
3226 {
3227         struct uart_8250_port *up = up_to_u8250p(port);
3228 
3229         wait_for_xmitr(up, UART_LSR_THRE);
3230         serial_port_out(port, UART_TX, ch);
3231 }
3232 
3233 /*
3234  *      Print a string to the serial port trying not to disturb
3235  *      any possible real use of the port...
3236  *
3237  *      The console_lock must be held when we get here.
3238  */
3239 static void
3240 serial8250_console_write(struct console *co, const char *s, unsigned int count)
3241 {
3242         struct uart_8250_port *up = &serial8250_ports[co->index];
3243         struct uart_port *port = &up->port;
3244         unsigned long flags;
3245         unsigned int ier;
3246         int locked = 1;
3247 
3248         touch_nmi_watchdog();
3249 
3250         serial8250_rpm_get(up);
3251 
3252         if (port->sysrq)
3253                 locked = 0;
3254         else if (oops_in_progress)
3255                 locked = spin_trylock_irqsave(&port->lock, flags);
3256         else
3257                 spin_lock_irqsave(&port->lock, flags);
3258 
3259         /*
3260          *      First save the IER then disable the interrupts
3261          */
3262         ier = serial_port_in(port, UART_IER);
3263 
3264         if (up->capabilities & UART_CAP_UUE)
3265                 serial_port_out(port, UART_IER, UART_IER_UUE);
3266         else
3267                 serial_port_out(port, UART_IER, 0);
3268 
3269         /* check scratch reg to see if port powered off during system sleep */
3270         if (up->canary && (up->canary != serial_port_in(port, UART_SCR))) {
3271                 struct ktermios termios;
3272                 unsigned int baud, quot, frac = 0;
3273 
3274                 termios.c_cflag = port->cons->cflag;
3275                 if (port->state->port.tty && termios.c_cflag == 0)
3276                         termios.c_cflag = port->state->port.tty->termios.c_cflag;
3277 
3278                 baud = uart_get_baud_rate(port, &termios, NULL,
3279                                           port->uartclk / 16 / 0xffff,
3280                                           port->uartclk / 16);
3281                 quot = serial8250_get_divisor(up, baud, &frac);
3282 
3283                 serial8250_set_divisor(port, baud, quot, frac);
3284                 serial_port_out(port, UART_LCR, up->lcr);
3285                 serial_port_out(port, UART_MCR, UART_MCR_DTR | UART_MCR_RTS);
3286 
3287                 up->canary = 0;
3288         }
3289 
3290         uart_console_write(port, s, count, serial8250_console_putchar);
3291 
3292         /*
3293          *      Finally, wait for transmitter to become empty
3294          *      and restore the IER
3295          */
3296         wait_for_xmitr(up, BOTH_EMPTY);
3297         serial_port_out(port, UART_IER, ier);
3298 
3299         /*
3300          *      The receive handling will happen properly because the
3301          *      receive ready bit will still be set; it is not cleared
3302          *      on read.  However, modem control will not, we must
3303          *      call it if we have saved something in the saved flags
3304          *      while processing with interrupts off.
3305          */
3306         if (up->msr_saved_flags)
3307                 serial8250_modem_status(up);
3308 
3309         if (locked)
3310                 spin_unlock_irqrestore(&port->lock, flags);
3311         serial8250_rpm_put(up);
3312 }
3313 
3314 static int serial8250_console_setup(struct console *co, char *options)
3315 {
3316         struct uart_port *port;
3317         int baud = 9600;
3318         int bits = 8;
3319         int parity = 'n';
3320         int flow = 'n';
3321 
3322         /*
3323          * Check whether an invalid uart number has been specified, and
3324          * if so, search for the first available port that does have
3325          * console support.
3326          */
3327         if (co->index >= nr_uarts)
3328                 co->index = 0;
3329         port = &serial8250_ports[co->index].port;
3330         if (!port->iobase && !port->membase)
3331                 return -ENODEV;
3332 
3333         if (options)
3334                 uart_parse_options(options, &baud, &parity, &bits, &flow);
3335 
3336         return uart_set_options(port, co, baud, parity, bits, flow);
3337 }
3338 
3339 static int serial8250_console_early_setup(void)
3340 {
3341         return serial8250_find_port_for_earlycon();
3342 }
3343 
3344 static struct console serial8250_console = {
3345         .name           = "ttyS",
3346         .write          = serial8250_console_write,
3347         .device         = uart_console_device,
3348         .setup          = serial8250_console_setup,
3349         .early_setup    = serial8250_console_early_setup,
3350         .flags          = CON_PRINTBUFFER | CON_ANYTIME,
3351         .index          = -1,
3352         .data           = &serial8250_reg,
3353 };
3354 
3355 static int __init serial8250_console_init(void)
3356 {
3357         serial8250_isa_init_ports();
3358         register_console(&serial8250_console);
3359         return 0;
3360 }
3361 console_initcall(serial8250_console_init);
3362 
3363 int serial8250_find_port(struct uart_port *p)
3364 {
3365         int line;
3366         struct uart_port *port;
3367 
3368         for (line = 0; line < nr_uarts; line++) {
3369                 port = &serial8250_ports[line].port;
3370                 if (uart_match_port(p, port))
3371                         return line;
3372         }
3373         return -ENODEV;
3374 }
3375 
3376 #define SERIAL8250_CONSOLE      &serial8250_console
3377 #else
3378 #define SERIAL8250_CONSOLE      NULL
3379 #endif
3380 
3381 static struct uart_driver serial8250_reg = {
3382         .owner                  = THIS_MODULE,
3383         .driver_name            = "serial",
3384         .dev_name               = "ttyS",
3385         .major                  = TTY_MAJOR,
3386         .minor                  = 64,
3387         .cons                   = SERIAL8250_CONSOLE,
3388 };
3389 
3390 /*
3391  * early_serial_setup - early registration for 8250 ports
3392  *
3393  * Setup an 8250 port structure prior to console initialisation.  Use
3394  * after console initialisation will cause undefined behaviour.
3395  */
3396 int __init early_serial_setup(struct uart_port *port)
3397 {
3398         struct uart_port *p;
3399 
3400         if (port->line >= ARRAY_SIZE(serial8250_ports))
3401                 return -ENODEV;
3402 
3403         serial8250_isa_init_ports();
3404         p = &serial8250_ports[port->line].port;
3405         p->iobase       = port->iobase;
3406         p->membase      = port->membase;
3407         p->irq          = port->irq;
3408         p->irqflags     = port->irqflags;
3409         p->uartclk      = port->uartclk;
3410         p->fifosize     = port->fifosize;
3411         p->regshift     = port->regshift;
3412         p->iotype       = port->iotype;
3413         p->flags        = port->flags;
3414         p->mapbase      = port->mapbase;
3415         p->private_data = port->private_data;
3416         p->type         = port->type;
3417         p->line         = port->line;
3418 
3419         set_io_from_upio(p);
3420         if (port->serial_in)
3421                 p->serial_in = port->serial_in;
3422         if (port->serial_out)
3423                 p->serial_out = port->serial_out;
3424         if (port->handle_irq)
3425                 p->handle_irq = port->handle_irq;
3426         else
3427                 p->handle_irq = serial8250_default_handle_irq;
3428 
3429         return 0;
3430 }
3431 
3432 /**
3433  *      serial8250_suspend_port - suspend one serial port
3434  *      @line:  serial line number
3435  *
3436  *      Suspend one serial port.
3437  */
3438 void serial8250_suspend_port(int line)
3439 {
3440         struct uart_8250_port *up = &serial8250_ports[line];
3441         struct uart_port *port = &up->port;
3442 
3443         if (!console_suspend_enabled && uart_console(port) &&
3444             port->type != PORT_8250) {
3445                 unsigned char canary = 0xa5;
3446                 serial_out(up, UART_SCR, canary);
3447                 up->canary = canary;
3448         }
3449 
3450         uart_suspend_port(&serial8250_reg, port);
3451 }
3452 
3453 /**
3454  *      serial8250_resume_port - resume one serial port
3455  *      @line:  serial line number
3456  *
3457  *      Resume one serial port.
3458  */
3459 void serial8250_resume_port(int line)
3460 {
3461         struct uart_8250_port *up = &serial8250_ports[line];
3462         struct uart_port *port = &up->port;
3463 
3464         up->canary = 0;
3465 
3466         if (up->capabilities & UART_NATSEMI) {
3467                 /* Ensure it's still in high speed mode */
3468                 serial_port_out(port, UART_LCR, 0xE0);
3469 
3470                 ns16550a_goto_highspeed(up);
3471 
3472                 serial_port_out(port, UART_LCR, 0);
3473                 port->uartclk = 921600*16;
3474         }
3475         uart_resume_port(&serial8250_reg, port);
3476 }
3477 
3478 /*
3479  * Register a set of serial devices attached to a platform device.  The
3480  * list is terminated with a zero flags entry, which means we expect
3481  * all entries to have at least UPF_BOOT_AUTOCONF set.
3482  */
3483 static int serial8250_probe(struct platform_device *dev)
3484 {
3485         struct plat_serial8250_port *p = dev_get_platdata(&dev->dev);
3486         struct uart_8250_port uart;
3487         int ret, i, irqflag = 0;
3488 
3489         memset(&uart, 0, sizeof(uart));
3490 
3491         if (share_irqs)
3492                 irqflag = IRQF_SHARED;
3493 
3494         for (i = 0; p && p->flags != 0; p++, i++) {
3495                 uart.port.iobase        = p->iobase;
3496                 uart.port.membase       = p->membase;
3497                 uart.port.irq           = p->irq;
3498                 uart.port.irqflags      = p->irqflags;
3499                 uart.port.uartclk       = p->uartclk;
3500                 uart.port.regshift      = p->regshift;
3501                 uart.port.iotype        = p->iotype;
3502                 uart.port.flags         = p->flags;
3503                 uart.port.mapbase       = p->mapbase;
3504                 uart.port.hub6          = p->hub6;
3505                 uart.port.private_data  = p->private_data;
3506                 uart.port.type          = p->type;
3507                 uart.port.serial_in     = p->serial_in;
3508                 uart.port.serial_out    = p->serial_out;
3509                 uart.port.handle_irq    = p->handle_irq;
3510                 uart.port.handle_break  = p->handle_break;
3511                 uart.port.set_termios   = p->set_termios;
3512                 uart.port.pm            = p->pm;
3513                 uart.port.dev           = &dev->dev;
3514                 uart.port.irqflags      |= irqflag;
3515                 ret = serial8250_register_8250_port(&uart);
3516                 if (ret < 0) {
3517                         dev_err(&dev->dev, "unable to register port at index %d "
3518                                 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3519                                 p->iobase, (unsigned long long)p->mapbase,
3520                                 p->irq, ret);
3521                 }
3522         }
3523         return 0;
3524 }
3525 
3526 /*
3527  * Remove serial ports registered against a platform device.
3528  */
3529 static int serial8250_remove(struct platform_device *dev)
3530 {
3531         int i;
3532 
3533         for (i = 0; i < nr_uarts; i++) {
3534                 struct uart_8250_port *up = &serial8250_ports[i];
3535 
3536                 if (up->port.dev == &dev->dev)
3537                         serial8250_unregister_port(i);
3538         }
3539         return 0;
3540 }
3541 
3542 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3543 {
3544         int i;
3545 
3546         for (i = 0; i < UART_NR; i++) {
3547                 struct uart_8250_port *up = &serial8250_ports[i];
3548 
3549                 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3550                         uart_suspend_port(&serial8250_reg, &up->port);
3551         }
3552 
3553         return 0;
3554 }
3555 
3556 static int serial8250_resume(struct platform_device *dev)
3557 {
3558         int i;
3559 
3560         for (i = 0; i < UART_NR; i++) {
3561                 struct uart_8250_port *up = &serial8250_ports[i];
3562 
3563                 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3564                         serial8250_resume_port(i);
3565         }
3566 
3567         return 0;
3568 }
3569 
3570 static struct platform_driver serial8250_isa_driver = {
3571         .probe          = serial8250_probe,
3572         .remove         = serial8250_remove,
3573         .suspend        = serial8250_suspend,
3574         .resume         = serial8250_resume,
3575         .driver         = {
3576                 .name   = "serial8250",
3577         },
3578 };
3579 
3580 /*
3581  * This "device" covers _all_ ISA 8250-compatible serial devices listed
3582  * in the table in include/asm/serial.h
3583  */
3584 static struct platform_device *serial8250_isa_devs;
3585 
3586 /*
3587  * serial8250_register_8250_port and serial8250_unregister_port allows for
3588  * 16x50 serial ports to be configured at run-time, to support PCMCIA
3589  * modems and PCI multiport cards.
3590  */
3591 static DEFINE_MUTEX(serial_mutex);
3592 
3593 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3594 {
3595         int i;
3596 
3597         /*
3598          * First, find a port entry which matches.
3599          */
3600         for (i = 0; i < nr_uarts; i++)
3601                 if (uart_match_port(&serial8250_ports[i].port, port))
3602                         return &serial8250_ports[i];
3603 
3604         /* try line number first if still available */
3605         i = port->line;
3606         if (i < nr_uarts && serial8250_ports[i].port.type == PORT_UNKNOWN &&
3607                         serial8250_ports[i].port.iobase == 0)
3608                 return &serial8250_ports[i];
3609         /*
3610          * We didn't find a matching entry, so look for the first
3611          * free entry.  We look for one which hasn't been previously
3612          * used (indicated by zero iobase).
3613          */
3614         for (i = 0; i < nr_uarts; i++)
3615                 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3616                     serial8250_ports[i].port.iobase == 0)
3617                         return &serial8250_ports[i];
3618 
3619         /*
3620          * That also failed.  Last resort is to find any entry which
3621          * doesn't have a real port associated with it.
3622          */
3623         for (i = 0; i < nr_uarts; i++)
3624                 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3625                         return &serial8250_ports[i];
3626 
3627         return NULL;
3628 }
3629 
3630 /**
3631  *      serial8250_register_8250_port - register a serial port
3632  *      @up: serial port template
3633  *
3634  *      Configure the serial port specified by the request. If the
3635  *      port exists and is in use, it is hung up and unregistered
3636  *      first.
3637  *
3638  *      The port is then probed and if necessary the IRQ is autodetected
3639  *      If this fails an error is returned.
3640  *
3641  *      On success the port is ready to use and the line number is returned.
3642  */
3643 int serial8250_register_8250_port(struct uart_8250_port *up)
3644 {
3645         struct uart_8250_port *uart;
3646         int ret = -ENOSPC;
3647 
3648         if (up->port.uartclk == 0)
3649                 return -EINVAL;
3650 
3651         mutex_lock(&serial_mutex);
3652 
3653         uart = serial8250_find_match_or_unused(&up->port);
3654         if (uart && uart->port.type != PORT_8250_CIR) {
3655                 if (uart->port.dev)
3656                         uart_remove_one_port(&serial8250_reg, &uart->port);
3657 
3658                 uart->port.iobase       = up->port.iobase;
3659                 uart->port.membase      = up->port.membase;
3660                 uart->port.irq          = up->port.irq;
3661                 uart->port.irqflags     = up->port.irqflags;
3662                 uart->port.uartclk      = up->port.uartclk;
3663                 uart->port.fifosize     = up->port.fifosize;
3664                 uart->port.regshift     = up->port.regshift;
3665                 uart->port.iotype       = up->port.iotype;
3666                 uart->port.flags        = up->port.flags | UPF_BOOT_AUTOCONF;
3667                 uart->bugs              = up->bugs;
3668                 uart->port.mapbase      = up->port.mapbase;
3669                 uart->port.private_data = up->port.private_data;
3670                 uart->port.fifosize     = up->port.fifosize;
3671                 uart->tx_loadsz         = up->tx_loadsz;
3672                 uart->capabilities      = up->capabilities;
3673                 uart->port.throttle     = up->port.throttle;
3674                 uart->port.unthrottle   = up->port.unthrottle;
3675                 uart->port.rs485_config = up->port.rs485_config;
3676                 uart->port.rs485        = up->port.rs485;
3677 
3678                 /* Take tx_loadsz from fifosize if it wasn't set separately */
3679                 if (uart->port.fifosize && !uart->tx_loadsz)
3680                         uart->tx_loadsz = uart->port.fifosize;
3681 
3682                 if (up->port.dev)
3683                         uart->port.dev = up->port.dev;
3684 
3685                 if (up->port.flags & UPF_FIXED_TYPE)
3686                         serial8250_init_fixed_type_port(uart, up->port.type);
3687 
3688                 set_io_from_upio(&uart->port);
3689                 /* Possibly override default I/O functions.  */
3690                 if (up->port.serial_in)
3691                         uart->port.serial_in = up->port.serial_in;
3692                 if (up->port.serial_out)
3693                         uart->port.serial_out = up->port.serial_out;
3694                 if (up->port.handle_irq)
3695                         uart->port.handle_irq = up->port.handle_irq;
3696                 /*  Possibly override set_termios call */
3697                 if (up->port.set_termios)
3698                         uart->port.set_termios = up->port.set_termios;
3699                 if (up->port.set_mctrl)
3700                         uart->port.set_mctrl = up->port.set_mctrl;
3701                 if (up->port.startup)
3702                         uart->port.startup = up->port.startup;
3703                 if (up->port.shutdown)
3704                         uart->port.shutdown = up->port.shutdown;
3705                 if (up->port.pm)
3706                         uart->port.pm = up->port.pm;
3707                 if (up->port.handle_break)
3708                         uart->port.handle_break = up->port.handle_break;
3709                 if (up->dl_read)
3710                         uart->dl_read = up->dl_read;
3711                 if (up->dl_write)
3712                         uart->dl_write = up->dl_write;
3713                 if (up->dma) {
3714                         uart->dma = up->dma;
3715                         if (!uart->dma->tx_dma)
3716                                 uart->dma->tx_dma = serial8250_tx_dma;
3717                         if (!uart->dma->rx_dma)
3718                                 uart->dma->rx_dma = serial8250_rx_dma;
3719                 }
3720 
3721                 if (serial8250_isa_config != NULL)
3722                         serial8250_isa_config(0, &uart->port,
3723                                         &uart->capabilities);
3724 
3725                 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3726                 if (ret == 0)
3727                         ret = uart->port.line;
3728         }
3729         mutex_unlock(&serial_mutex);
3730 
3731         return ret;
3732 }
3733 EXPORT_SYMBOL(serial8250_register_8250_port);
3734 
3735 /**
3736  *      serial8250_unregister_port - remove a 16x50 serial port at runtime
3737  *      @line: serial line number
3738  *
3739  *      Remove one serial port.  This may not be called from interrupt
3740  *      context.  We hand the port back to the our control.
3741  */
3742 void serial8250_unregister_port(int line)
3743 {
3744         struct uart_8250_port *uart = &serial8250_ports[line];
3745 
3746         mutex_lock(&serial_mutex);
3747         uart_remove_one_port(&serial8250_reg, &uart->port);
3748         if (serial8250_isa_devs) {
3749                 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3750                 uart->port.type = PORT_UNKNOWN;
3751                 uart->port.dev = &serial8250_isa_devs->dev;
3752                 uart->capabilities = uart_config[uart->port.type].flags;
3753                 uart_add_one_port(&serial8250_reg, &uart->port);
3754         } else {
3755                 uart->port.dev = NULL;
3756         }
3757         mutex_unlock(&serial_mutex);
3758 }
3759 EXPORT_SYMBOL(serial8250_unregister_port);
3760 
3761 static int __init serial8250_init(void)
3762 {
3763         int ret;
3764 
3765         serial8250_isa_init_ports();
3766 
3767         printk(KERN_INFO "Serial: 8250/16550 driver, "
3768                 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3769                 share_irqs ? "en" : "dis");
3770 
3771 #ifdef CONFIG_SPARC
3772         ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3773 #else
3774         serial8250_reg.nr = UART_NR;
3775         ret = uart_register_driver(&serial8250_reg);
3776 #endif
3777         if (ret)
3778                 goto out;
3779 
3780         ret = serial8250_pnp_init();
3781         if (ret)
3782                 goto unreg_uart_drv;
3783 
3784         serial8250_isa_devs = platform_device_alloc("serial8250",
3785                                                     PLAT8250_DEV_LEGACY);
3786         if (!serial8250_isa_devs) {
3787                 ret = -ENOMEM;
3788                 goto unreg_pnp;
3789         }
3790 
3791         ret = platform_device_add(serial8250_isa_devs);
3792         if (ret)
3793                 goto put_dev;
3794 
3795         serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3796 
3797         ret = platform_driver_register(&serial8250_isa_driver);
3798         if (ret == 0)
3799                 goto out;
3800 
3801         platform_device_del(serial8250_isa_devs);
3802 put_dev:
3803         platform_device_put(serial8250_isa_devs);
3804 unreg_pnp:
3805         serial8250_pnp_exit();
3806 unreg_uart_drv:
3807 #ifdef CONFIG_SPARC
3808         sunserial_unregister_minors(&serial8250_reg, UART_NR);
3809 #else
3810         uart_unregister_driver(&serial8250_reg);
3811 #endif
3812 out:
3813         return ret;
3814 }
3815 
3816 static void __exit serial8250_exit(void)
3817 {
3818         struct platform_device *isa_dev = serial8250_isa_devs;
3819 
3820         /*
3821          * This tells serial8250_unregister_port() not to re-register
3822          * the ports (thereby making serial8250_isa_driver permanently
3823          * in use.)
3824          */
3825         serial8250_isa_devs = NULL;
3826 
3827         platform_driver_unregister(&serial8250_isa_driver);
3828         platform_device_unregister(isa_dev);
3829 
3830         serial8250_pnp_exit();
3831 
3832 #ifdef CONFIG_SPARC
3833         sunserial_unregister_minors(&serial8250_reg, UART_NR);
3834 #else
3835         uart_unregister_driver(&serial8250_reg);
3836 #endif
3837 }
3838 
3839 module_init(serial8250_init);
3840 module_exit(serial8250_exit);
3841 
3842 EXPORT_SYMBOL(serial8250_suspend_port);
3843 EXPORT_SYMBOL(serial8250_resume_port);
3844 
3845 MODULE_LICENSE("GPL");
3846 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3847 
3848 module_param(share_irqs, uint, 0644);
3849 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3850         " (unsafe)");
3851 
3852 module_param(nr_uarts, uint, 0644);
3853 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3854 
3855 module_param(skip_txen_test, uint, 0644);
3856 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3857 
3858 #ifdef CONFIG_SERIAL_8250_RSA
3859 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3860 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3861 #endif
3862 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
3863 
3864 #ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS
3865 #ifndef MODULE
3866 /* This module was renamed to 8250_core in 3.7.  Keep the old "8250" name
3867  * working as well for the module options so we don't break people.  We
3868  * need to keep the names identical and the convenient macros will happily
3869  * refuse to let us do that by failing the build with redefinition errors
3870  * of global variables.  So we stick them inside a dummy function to avoid
3871  * those conflicts.  The options still get parsed, and the redefined
3872  * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive.
3873  *
3874  * This is hacky.  I'm sorry.
3875  */
3876 static void __used s8250_options(void)
3877 {
3878 #undef MODULE_PARAM_PREFIX
3879 #define MODULE_PARAM_PREFIX "8250_core."
3880 
3881         module_param_cb(share_irqs, &param_ops_uint, &share_irqs, 0644);
3882         module_param_cb(nr_uarts, &param_ops_uint, &nr_uarts, 0644);
3883         module_param_cb(skip_txen_test, &param_ops_uint, &skip_txen_test, 0644);
3884 #ifdef CONFIG_SERIAL_8250_RSA
3885         __module_param_call(MODULE_PARAM_PREFIX, probe_rsa,
3886                 &param_array_ops, .arr = &__param_arr_probe_rsa,
3887                 0444, -1, 0);
3888 #endif
3889 }
3890 #else
3891 MODULE_ALIAS("8250_core");
3892 #endif
3893 #endif
3894 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us