Version:  2.0.40 2.2.26 2.4.37 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19

Linux/drivers/tty/serial/8250/8250_core.c

  1 /*
  2  *  Driver for 8250/16550-type serial ports
  3  *
  4  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  5  *
  6  *  Copyright (C) 2001 Russell King.
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License as published by
 10  * the Free Software Foundation; either version 2 of the License, or
 11  * (at your option) any later version.
 12  *
 13  * A note about mapbase / membase
 14  *
 15  *  mapbase is the physical address of the IO port.
 16  *  membase is an 'ioremapped' cookie.
 17  */
 18 
 19 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 20 #define SUPPORT_SYSRQ
 21 #endif
 22 
 23 #include <linux/module.h>
 24 #include <linux/moduleparam.h>
 25 #include <linux/ioport.h>
 26 #include <linux/init.h>
 27 #include <linux/console.h>
 28 #include <linux/sysrq.h>
 29 #include <linux/delay.h>
 30 #include <linux/platform_device.h>
 31 #include <linux/tty.h>
 32 #include <linux/ratelimit.h>
 33 #include <linux/tty_flip.h>
 34 #include <linux/serial_core.h>
 35 #include <linux/serial.h>
 36 #include <linux/serial_8250.h>
 37 #include <linux/nmi.h>
 38 #include <linux/mutex.h>
 39 #include <linux/slab.h>
 40 #include <linux/uaccess.h>
 41 #include <linux/pm_runtime.h>
 42 #ifdef CONFIG_SPARC
 43 #include <linux/sunserialcore.h>
 44 #endif
 45 
 46 #include <asm/io.h>
 47 #include <asm/irq.h>
 48 
 49 #include "8250.h"
 50 
 51 /*
 52  * Configuration:
 53  *   share_irqs - whether we pass IRQF_SHARED to request_irq().  This option
 54  *                is unsafe when used on edge-triggered interrupts.
 55  */
 56 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
 57 
 58 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
 59 
 60 static struct uart_driver serial8250_reg;
 61 
 62 static int serial_index(struct uart_port *port)
 63 {
 64         return (serial8250_reg.minor - 64) + port->line;
 65 }
 66 
 67 static unsigned int skip_txen_test; /* force skip of txen test at init time */
 68 
 69 /*
 70  * Debugging.
 71  */
 72 #if 0
 73 #define DEBUG_AUTOCONF(fmt...)  printk(fmt)
 74 #else
 75 #define DEBUG_AUTOCONF(fmt...)  do { } while (0)
 76 #endif
 77 
 78 #if 0
 79 #define DEBUG_INTR(fmt...)      printk(fmt)
 80 #else
 81 #define DEBUG_INTR(fmt...)      do { } while (0)
 82 #endif
 83 
 84 #define PASS_LIMIT      512
 85 
 86 #define BOTH_EMPTY      (UART_LSR_TEMT | UART_LSR_THRE)
 87 
 88 
 89 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
 90 #define CONFIG_SERIAL_DETECT_IRQ 1
 91 #endif
 92 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
 93 #define CONFIG_SERIAL_MANY_PORTS 1
 94 #endif
 95 
 96 /*
 97  * HUB6 is always on.  This will be removed once the header
 98  * files have been cleaned.
 99  */
100 #define CONFIG_HUB6 1
101 
102 #include <asm/serial.h>
103 /*
104  * SERIAL_PORT_DFNS tells us about built-in ports that have no
105  * standard enumeration mechanism.   Platforms that can find all
106  * serial ports via mechanisms like ACPI or PCI need not supply it.
107  */
108 #ifndef SERIAL_PORT_DFNS
109 #define SERIAL_PORT_DFNS
110 #endif
111 
112 static const struct old_serial_port old_serial_port[] = {
113         SERIAL_PORT_DFNS /* defined in asm/serial.h */
114 };
115 
116 #define UART_NR CONFIG_SERIAL_8250_NR_UARTS
117 
118 #ifdef CONFIG_SERIAL_8250_RSA
119 
120 #define PORT_RSA_MAX 4
121 static unsigned long probe_rsa[PORT_RSA_MAX];
122 static unsigned int probe_rsa_count;
123 #endif /* CONFIG_SERIAL_8250_RSA  */
124 
125 struct irq_info {
126         struct                  hlist_node node;
127         int                     irq;
128         spinlock_t              lock;   /* Protects list not the hash */
129         struct list_head        *head;
130 };
131 
132 #define NR_IRQ_HASH             32      /* Can be adjusted later */
133 static struct hlist_head irq_lists[NR_IRQ_HASH];
134 static DEFINE_MUTEX(hash_mutex);        /* Used to walk the hash */
135 
136 /*
137  * Here we define the default xmit fifo size used for each type of UART.
138  */
139 static const struct serial8250_config uart_config[] = {
140         [PORT_UNKNOWN] = {
141                 .name           = "unknown",
142                 .fifo_size      = 1,
143                 .tx_loadsz      = 1,
144         },
145         [PORT_8250] = {
146                 .name           = "8250",
147                 .fifo_size      = 1,
148                 .tx_loadsz      = 1,
149         },
150         [PORT_16450] = {
151                 .name           = "16450",
152                 .fifo_size      = 1,
153                 .tx_loadsz      = 1,
154         },
155         [PORT_16550] = {
156                 .name           = "16550",
157                 .fifo_size      = 1,
158                 .tx_loadsz      = 1,
159         },
160         [PORT_16550A] = {
161                 .name           = "16550A",
162                 .fifo_size      = 16,
163                 .tx_loadsz      = 16,
164                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
165                 .rxtrig_bytes   = {1, 4, 8, 14},
166                 .flags          = UART_CAP_FIFO,
167         },
168         [PORT_CIRRUS] = {
169                 .name           = "Cirrus",
170                 .fifo_size      = 1,
171                 .tx_loadsz      = 1,
172         },
173         [PORT_16650] = {
174                 .name           = "ST16650",
175                 .fifo_size      = 1,
176                 .tx_loadsz      = 1,
177                 .flags          = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
178         },
179         [PORT_16650V2] = {
180                 .name           = "ST16650V2",
181                 .fifo_size      = 32,
182                 .tx_loadsz      = 16,
183                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
184                                   UART_FCR_T_TRIG_00,
185                 .rxtrig_bytes   = {8, 16, 24, 28},
186                 .flags          = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
187         },
188         [PORT_16750] = {
189                 .name           = "TI16750",
190                 .fifo_size      = 64,
191                 .tx_loadsz      = 64,
192                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
193                                   UART_FCR7_64BYTE,
194                 .rxtrig_bytes   = {1, 16, 32, 56},
195                 .flags          = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
196         },
197         [PORT_STARTECH] = {
198                 .name           = "Startech",
199                 .fifo_size      = 1,
200                 .tx_loadsz      = 1,
201         },
202         [PORT_16C950] = {
203                 .name           = "16C950/954",
204                 .fifo_size      = 128,
205                 .tx_loadsz      = 128,
206                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
207                 /* UART_CAP_EFR breaks billionon CF bluetooth card. */
208                 .flags          = UART_CAP_FIFO | UART_CAP_SLEEP,
209         },
210         [PORT_16654] = {
211                 .name           = "ST16654",
212                 .fifo_size      = 64,
213                 .tx_loadsz      = 32,
214                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
215                                   UART_FCR_T_TRIG_10,
216                 .rxtrig_bytes   = {8, 16, 56, 60},
217                 .flags          = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
218         },
219         [PORT_16850] = {
220                 .name           = "XR16850",
221                 .fifo_size      = 128,
222                 .tx_loadsz      = 128,
223                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
224                 .flags          = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
225         },
226         [PORT_RSA] = {
227                 .name           = "RSA",
228                 .fifo_size      = 2048,
229                 .tx_loadsz      = 2048,
230                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
231                 .flags          = UART_CAP_FIFO,
232         },
233         [PORT_NS16550A] = {
234                 .name           = "NS16550A",
235                 .fifo_size      = 16,
236                 .tx_loadsz      = 16,
237                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
238                 .flags          = UART_CAP_FIFO | UART_NATSEMI,
239         },
240         [PORT_XSCALE] = {
241                 .name           = "XScale",
242                 .fifo_size      = 32,
243                 .tx_loadsz      = 32,
244                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
245                 .flags          = UART_CAP_FIFO | UART_CAP_UUE | UART_CAP_RTOIE,
246         },
247         [PORT_OCTEON] = {
248                 .name           = "OCTEON",
249                 .fifo_size      = 64,
250                 .tx_loadsz      = 64,
251                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
252                 .flags          = UART_CAP_FIFO,
253         },
254         [PORT_AR7] = {
255                 .name           = "AR7",
256                 .fifo_size      = 16,
257                 .tx_loadsz      = 16,
258                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00,
259                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
260         },
261         [PORT_U6_16550A] = {
262                 .name           = "U6_16550A",
263                 .fifo_size      = 64,
264                 .tx_loadsz      = 64,
265                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
266                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
267         },
268         [PORT_TEGRA] = {
269                 .name           = "Tegra",
270                 .fifo_size      = 32,
271                 .tx_loadsz      = 8,
272                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
273                                   UART_FCR_T_TRIG_01,
274                 .rxtrig_bytes   = {1, 4, 8, 14},
275                 .flags          = UART_CAP_FIFO | UART_CAP_RTOIE,
276         },
277         [PORT_XR17D15X] = {
278                 .name           = "XR17D15X",
279                 .fifo_size      = 64,
280                 .tx_loadsz      = 64,
281                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
282                 .flags          = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
283                                   UART_CAP_SLEEP,
284         },
285         [PORT_XR17V35X] = {
286                 .name           = "XR17V35X",
287                 .fifo_size      = 256,
288                 .tx_loadsz      = 256,
289                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11 |
290                                   UART_FCR_T_TRIG_11,
291                 .flags          = UART_CAP_FIFO | UART_CAP_AFE | UART_CAP_EFR |
292                                   UART_CAP_SLEEP,
293         },
294         [PORT_LPC3220] = {
295                 .name           = "LPC3220",
296                 .fifo_size      = 64,
297                 .tx_loadsz      = 32,
298                 .fcr            = UART_FCR_DMA_SELECT | UART_FCR_ENABLE_FIFO |
299                                   UART_FCR_R_TRIG_00 | UART_FCR_T_TRIG_00,
300                 .flags          = UART_CAP_FIFO,
301         },
302         [PORT_BRCM_TRUMANAGE] = {
303                 .name           = "TruManage",
304                 .fifo_size      = 1,
305                 .tx_loadsz      = 1024,
306                 .flags          = UART_CAP_HFIFO,
307         },
308         [PORT_8250_CIR] = {
309                 .name           = "CIR port"
310         },
311         [PORT_ALTR_16550_F32] = {
312                 .name           = "Altera 16550 FIFO32",
313                 .fifo_size      = 32,
314                 .tx_loadsz      = 32,
315                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
316                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
317         },
318         [PORT_ALTR_16550_F64] = {
319                 .name           = "Altera 16550 FIFO64",
320                 .fifo_size      = 64,
321                 .tx_loadsz      = 64,
322                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
323                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
324         },
325         [PORT_ALTR_16550_F128] = {
326                 .name           = "Altera 16550 FIFO128",
327                 .fifo_size      = 128,
328                 .tx_loadsz      = 128,
329                 .fcr            = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
330                 .flags          = UART_CAP_FIFO | UART_CAP_AFE,
331         },
332 };
333 
334 /* Uart divisor latch read */
335 static int default_serial_dl_read(struct uart_8250_port *up)
336 {
337         return serial_in(up, UART_DLL) | serial_in(up, UART_DLM) << 8;
338 }
339 
340 /* Uart divisor latch write */
341 static void default_serial_dl_write(struct uart_8250_port *up, int value)
342 {
343         serial_out(up, UART_DLL, value & 0xff);
344         serial_out(up, UART_DLM, value >> 8 & 0xff);
345 }
346 
347 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
348 
349 /* Au1x00/RT288x UART hardware has a weird register layout */
350 static const u8 au_io_in_map[] = {
351         [UART_RX]  = 0,
352         [UART_IER] = 2,
353         [UART_IIR] = 3,
354         [UART_LCR] = 5,
355         [UART_MCR] = 6,
356         [UART_LSR] = 7,
357         [UART_MSR] = 8,
358 };
359 
360 static const u8 au_io_out_map[] = {
361         [UART_TX]  = 1,
362         [UART_IER] = 2,
363         [UART_FCR] = 4,
364         [UART_LCR] = 5,
365         [UART_MCR] = 6,
366 };
367 
368 static unsigned int au_serial_in(struct uart_port *p, int offset)
369 {
370         offset = au_io_in_map[offset] << p->regshift;
371         return __raw_readl(p->membase + offset);
372 }
373 
374 static void au_serial_out(struct uart_port *p, int offset, int value)
375 {
376         offset = au_io_out_map[offset] << p->regshift;
377         __raw_writel(value, p->membase + offset);
378 }
379 
380 /* Au1x00 haven't got a standard divisor latch */
381 static int au_serial_dl_read(struct uart_8250_port *up)
382 {
383         return __raw_readl(up->port.membase + 0x28);
384 }
385 
386 static void au_serial_dl_write(struct uart_8250_port *up, int value)
387 {
388         __raw_writel(value, up->port.membase + 0x28);
389 }
390 
391 #endif
392 
393 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
394 {
395         offset = offset << p->regshift;
396         outb(p->hub6 - 1 + offset, p->iobase);
397         return inb(p->iobase + 1);
398 }
399 
400 static void hub6_serial_out(struct uart_port *p, int offset, int value)
401 {
402         offset = offset << p->regshift;
403         outb(p->hub6 - 1 + offset, p->iobase);
404         outb(value, p->iobase + 1);
405 }
406 
407 static unsigned int mem_serial_in(struct uart_port *p, int offset)
408 {
409         offset = offset << p->regshift;
410         return readb(p->membase + offset);
411 }
412 
413 static void mem_serial_out(struct uart_port *p, int offset, int value)
414 {
415         offset = offset << p->regshift;
416         writeb(value, p->membase + offset);
417 }
418 
419 static void mem32_serial_out(struct uart_port *p, int offset, int value)
420 {
421         offset = offset << p->regshift;
422         writel(value, p->membase + offset);
423 }
424 
425 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
426 {
427         offset = offset << p->regshift;
428         return readl(p->membase + offset);
429 }
430 
431 static unsigned int io_serial_in(struct uart_port *p, int offset)
432 {
433         offset = offset << p->regshift;
434         return inb(p->iobase + offset);
435 }
436 
437 static void io_serial_out(struct uart_port *p, int offset, int value)
438 {
439         offset = offset << p->regshift;
440         outb(value, p->iobase + offset);
441 }
442 
443 static int serial8250_default_handle_irq(struct uart_port *port);
444 static int exar_handle_irq(struct uart_port *port);
445 
446 static void set_io_from_upio(struct uart_port *p)
447 {
448         struct uart_8250_port *up = up_to_u8250p(p);
449 
450         up->dl_read = default_serial_dl_read;
451         up->dl_write = default_serial_dl_write;
452 
453         switch (p->iotype) {
454         case UPIO_HUB6:
455                 p->serial_in = hub6_serial_in;
456                 p->serial_out = hub6_serial_out;
457                 break;
458 
459         case UPIO_MEM:
460                 p->serial_in = mem_serial_in;
461                 p->serial_out = mem_serial_out;
462                 break;
463 
464         case UPIO_MEM32:
465                 p->serial_in = mem32_serial_in;
466                 p->serial_out = mem32_serial_out;
467                 break;
468 
469 #if defined(CONFIG_MIPS_ALCHEMY) || defined(CONFIG_SERIAL_8250_RT288X)
470         case UPIO_AU:
471                 p->serial_in = au_serial_in;
472                 p->serial_out = au_serial_out;
473                 up->dl_read = au_serial_dl_read;
474                 up->dl_write = au_serial_dl_write;
475                 break;
476 #endif
477 
478         default:
479                 p->serial_in = io_serial_in;
480                 p->serial_out = io_serial_out;
481                 break;
482         }
483         /* Remember loaded iotype */
484         up->cur_iotype = p->iotype;
485         p->handle_irq = serial8250_default_handle_irq;
486 }
487 
488 static void
489 serial_port_out_sync(struct uart_port *p, int offset, int value)
490 {
491         switch (p->iotype) {
492         case UPIO_MEM:
493         case UPIO_MEM32:
494         case UPIO_AU:
495                 p->serial_out(p, offset, value);
496                 p->serial_in(p, UART_LCR);      /* safe, no side-effects */
497                 break;
498         default:
499                 p->serial_out(p, offset, value);
500         }
501 }
502 
503 /*
504  * For the 16C950
505  */
506 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
507 {
508         serial_out(up, UART_SCR, offset);
509         serial_out(up, UART_ICR, value);
510 }
511 
512 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
513 {
514         unsigned int value;
515 
516         serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
517         serial_out(up, UART_SCR, offset);
518         value = serial_in(up, UART_ICR);
519         serial_icr_write(up, UART_ACR, up->acr);
520 
521         return value;
522 }
523 
524 /*
525  * FIFO support.
526  */
527 static void serial8250_clear_fifos(struct uart_8250_port *p)
528 {
529         if (p->capabilities & UART_CAP_FIFO) {
530                 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO);
531                 serial_out(p, UART_FCR, UART_FCR_ENABLE_FIFO |
532                                UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
533                 serial_out(p, UART_FCR, 0);
534         }
535 }
536 
537 void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p)
538 {
539         serial8250_clear_fifos(p);
540         serial_out(p, UART_FCR, p->fcr);
541 }
542 EXPORT_SYMBOL_GPL(serial8250_clear_and_reinit_fifos);
543 
544 void serial8250_rpm_get(struct uart_8250_port *p)
545 {
546         if (!(p->capabilities & UART_CAP_RPM))
547                 return;
548         pm_runtime_get_sync(p->port.dev);
549 }
550 EXPORT_SYMBOL_GPL(serial8250_rpm_get);
551 
552 void serial8250_rpm_put(struct uart_8250_port *p)
553 {
554         if (!(p->capabilities & UART_CAP_RPM))
555                 return;
556         pm_runtime_mark_last_busy(p->port.dev);
557         pm_runtime_put_autosuspend(p->port.dev);
558 }
559 EXPORT_SYMBOL_GPL(serial8250_rpm_put);
560 
561 /*
562  * These two wrappers ensure that enable_runtime_pm_tx() can be called more than
563  * once and disable_runtime_pm_tx() will still disable RPM because the fifo is
564  * empty and the HW can idle again.
565  */
566 static void serial8250_rpm_get_tx(struct uart_8250_port *p)
567 {
568         unsigned char rpm_active;
569 
570         if (!(p->capabilities & UART_CAP_RPM))
571                 return;
572 
573         rpm_active = xchg(&p->rpm_tx_active, 1);
574         if (rpm_active)
575                 return;
576         pm_runtime_get_sync(p->port.dev);
577 }
578 
579 static void serial8250_rpm_put_tx(struct uart_8250_port *p)
580 {
581         unsigned char rpm_active;
582 
583         if (!(p->capabilities & UART_CAP_RPM))
584                 return;
585 
586         rpm_active = xchg(&p->rpm_tx_active, 0);
587         if (!rpm_active)
588                 return;
589         pm_runtime_mark_last_busy(p->port.dev);
590         pm_runtime_put_autosuspend(p->port.dev);
591 }
592 
593 /*
594  * IER sleep support.  UARTs which have EFRs need the "extended
595  * capability" bit enabled.  Note that on XR16C850s, we need to
596  * reset LCR to write to IER.
597  */
598 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
599 {
600         unsigned char lcr = 0, efr = 0;
601         /*
602          * Exar UARTs have a SLEEP register that enables or disables
603          * each UART to enter sleep mode separately.  On the XR17V35x the
604          * register is accessible to each UART at the UART_EXAR_SLEEP
605          * offset but the UART channel may only write to the corresponding
606          * bit.
607          */
608         serial8250_rpm_get(p);
609         if ((p->port.type == PORT_XR17V35X) ||
610            (p->port.type == PORT_XR17D15X)) {
611                 serial_out(p, UART_EXAR_SLEEP, sleep ? 0xff : 0);
612                 goto out;
613         }
614 
615         if (p->capabilities & UART_CAP_SLEEP) {
616                 if (p->capabilities & UART_CAP_EFR) {
617                         lcr = serial_in(p, UART_LCR);
618                         efr = serial_in(p, UART_EFR);
619                         serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
620                         serial_out(p, UART_EFR, UART_EFR_ECB);
621                         serial_out(p, UART_LCR, 0);
622                 }
623                 serial_out(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
624                 if (p->capabilities & UART_CAP_EFR) {
625                         serial_out(p, UART_LCR, UART_LCR_CONF_MODE_B);
626                         serial_out(p, UART_EFR, efr);
627                         serial_out(p, UART_LCR, lcr);
628                 }
629         }
630 out:
631         serial8250_rpm_put(p);
632 }
633 
634 #ifdef CONFIG_SERIAL_8250_RSA
635 /*
636  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
637  * We set the port uart clock rate if we succeed.
638  */
639 static int __enable_rsa(struct uart_8250_port *up)
640 {
641         unsigned char mode;
642         int result;
643 
644         mode = serial_in(up, UART_RSA_MSR);
645         result = mode & UART_RSA_MSR_FIFO;
646 
647         if (!result) {
648                 serial_out(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
649                 mode = serial_in(up, UART_RSA_MSR);
650                 result = mode & UART_RSA_MSR_FIFO;
651         }
652 
653         if (result)
654                 up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
655 
656         return result;
657 }
658 
659 static void enable_rsa(struct uart_8250_port *up)
660 {
661         if (up->port.type == PORT_RSA) {
662                 if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
663                         spin_lock_irq(&up->port.lock);
664                         __enable_rsa(up);
665                         spin_unlock_irq(&up->port.lock);
666                 }
667                 if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
668                         serial_out(up, UART_RSA_FRR, 0);
669         }
670 }
671 
672 /*
673  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
674  * It is unknown why interrupts were disabled in here.  However,
675  * the caller is expected to preserve this behaviour by grabbing
676  * the spinlock before calling this function.
677  */
678 static void disable_rsa(struct uart_8250_port *up)
679 {
680         unsigned char mode;
681         int result;
682 
683         if (up->port.type == PORT_RSA &&
684             up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
685                 spin_lock_irq(&up->port.lock);
686 
687                 mode = serial_in(up, UART_RSA_MSR);
688                 result = !(mode & UART_RSA_MSR_FIFO);
689 
690                 if (!result) {
691                         serial_out(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
692                         mode = serial_in(up, UART_RSA_MSR);
693                         result = !(mode & UART_RSA_MSR_FIFO);
694                 }
695 
696                 if (result)
697                         up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
698                 spin_unlock_irq(&up->port.lock);
699         }
700 }
701 #endif /* CONFIG_SERIAL_8250_RSA */
702 
703 /*
704  * This is a quickie test to see how big the FIFO is.
705  * It doesn't work at all the time, more's the pity.
706  */
707 static int size_fifo(struct uart_8250_port *up)
708 {
709         unsigned char old_fcr, old_mcr, old_lcr;
710         unsigned short old_dl;
711         int count;
712 
713         old_lcr = serial_in(up, UART_LCR);
714         serial_out(up, UART_LCR, 0);
715         old_fcr = serial_in(up, UART_FCR);
716         old_mcr = serial_in(up, UART_MCR);
717         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
718                     UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
719         serial_out(up, UART_MCR, UART_MCR_LOOP);
720         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
721         old_dl = serial_dl_read(up);
722         serial_dl_write(up, 0x0001);
723         serial_out(up, UART_LCR, 0x03);
724         for (count = 0; count < 256; count++)
725                 serial_out(up, UART_TX, count);
726         mdelay(20);/* FIXME - schedule_timeout */
727         for (count = 0; (serial_in(up, UART_LSR) & UART_LSR_DR) &&
728              (count < 256); count++)
729                 serial_in(up, UART_RX);
730         serial_out(up, UART_FCR, old_fcr);
731         serial_out(up, UART_MCR, old_mcr);
732         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
733         serial_dl_write(up, old_dl);
734         serial_out(up, UART_LCR, old_lcr);
735 
736         return count;
737 }
738 
739 /*
740  * Read UART ID using the divisor method - set DLL and DLM to zero
741  * and the revision will be in DLL and device type in DLM.  We
742  * preserve the device state across this.
743  */
744 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
745 {
746         unsigned char old_dll, old_dlm, old_lcr;
747         unsigned int id;
748 
749         old_lcr = serial_in(p, UART_LCR);
750         serial_out(p, UART_LCR, UART_LCR_CONF_MODE_A);
751 
752         old_dll = serial_in(p, UART_DLL);
753         old_dlm = serial_in(p, UART_DLM);
754 
755         serial_out(p, UART_DLL, 0);
756         serial_out(p, UART_DLM, 0);
757 
758         id = serial_in(p, UART_DLL) | serial_in(p, UART_DLM) << 8;
759 
760         serial_out(p, UART_DLL, old_dll);
761         serial_out(p, UART_DLM, old_dlm);
762         serial_out(p, UART_LCR, old_lcr);
763 
764         return id;
765 }
766 
767 /*
768  * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
769  * When this function is called we know it is at least a StarTech
770  * 16650 V2, but it might be one of several StarTech UARTs, or one of
771  * its clones.  (We treat the broken original StarTech 16650 V1 as a
772  * 16550, and why not?  Startech doesn't seem to even acknowledge its
773  * existence.)
774  *
775  * What evil have men's minds wrought...
776  */
777 static void autoconfig_has_efr(struct uart_8250_port *up)
778 {
779         unsigned int id1, id2, id3, rev;
780 
781         /*
782          * Everything with an EFR has SLEEP
783          */
784         up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
785 
786         /*
787          * First we check to see if it's an Oxford Semiconductor UART.
788          *
789          * If we have to do this here because some non-National
790          * Semiconductor clone chips lock up if you try writing to the
791          * LSR register (which serial_icr_read does)
792          */
793 
794         /*
795          * Check for Oxford Semiconductor 16C950.
796          *
797          * EFR [4] must be set else this test fails.
798          *
799          * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
800          * claims that it's needed for 952 dual UART's (which are not
801          * recommended for new designs).
802          */
803         up->acr = 0;
804         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
805         serial_out(up, UART_EFR, UART_EFR_ECB);
806         serial_out(up, UART_LCR, 0x00);
807         id1 = serial_icr_read(up, UART_ID1);
808         id2 = serial_icr_read(up, UART_ID2);
809         id3 = serial_icr_read(up, UART_ID3);
810         rev = serial_icr_read(up, UART_REV);
811 
812         DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
813 
814         if (id1 == 0x16 && id2 == 0xC9 &&
815             (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
816                 up->port.type = PORT_16C950;
817 
818                 /*
819                  * Enable work around for the Oxford Semiconductor 952 rev B
820                  * chip which causes it to seriously miscalculate baud rates
821                  * when DLL is 0.
822                  */
823                 if (id3 == 0x52 && rev == 0x01)
824                         up->bugs |= UART_BUG_QUOT;
825                 return;
826         }
827 
828         /*
829          * We check for a XR16C850 by setting DLL and DLM to 0, and then
830          * reading back DLL and DLM.  The chip type depends on the DLM
831          * value read back:
832          *  0x10 - XR16C850 and the DLL contains the chip revision.
833          *  0x12 - XR16C2850.
834          *  0x14 - XR16C854.
835          */
836         id1 = autoconfig_read_divisor_id(up);
837         DEBUG_AUTOCONF("850id=%04x ", id1);
838 
839         id2 = id1 >> 8;
840         if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
841                 up->port.type = PORT_16850;
842                 return;
843         }
844 
845         /*
846          * It wasn't an XR16C850.
847          *
848          * We distinguish between the '654 and the '650 by counting
849          * how many bytes are in the FIFO.  I'm using this for now,
850          * since that's the technique that was sent to me in the
851          * serial driver update, but I'm not convinced this works.
852          * I've had problems doing this in the past.  -TYT
853          */
854         if (size_fifo(up) == 64)
855                 up->port.type = PORT_16654;
856         else
857                 up->port.type = PORT_16650V2;
858 }
859 
860 /*
861  * We detected a chip without a FIFO.  Only two fall into
862  * this category - the original 8250 and the 16450.  The
863  * 16450 has a scratch register (accessible with LCR=0)
864  */
865 static void autoconfig_8250(struct uart_8250_port *up)
866 {
867         unsigned char scratch, status1, status2;
868 
869         up->port.type = PORT_8250;
870 
871         scratch = serial_in(up, UART_SCR);
872         serial_out(up, UART_SCR, 0xa5);
873         status1 = serial_in(up, UART_SCR);
874         serial_out(up, UART_SCR, 0x5a);
875         status2 = serial_in(up, UART_SCR);
876         serial_out(up, UART_SCR, scratch);
877 
878         if (status1 == 0xa5 && status2 == 0x5a)
879                 up->port.type = PORT_16450;
880 }
881 
882 static int broken_efr(struct uart_8250_port *up)
883 {
884         /*
885          * Exar ST16C2550 "A2" devices incorrectly detect as
886          * having an EFR, and report an ID of 0x0201.  See
887          * http://linux.derkeiler.com/Mailing-Lists/Kernel/2004-11/4812.html 
888          */
889         if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
890                 return 1;
891 
892         return 0;
893 }
894 
895 static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
896 {
897         unsigned char status;
898 
899         status = serial_in(up, 0x04); /* EXCR2 */
900 #define PRESL(x) ((x) & 0x30)
901         if (PRESL(status) == 0x10) {
902                 /* already in high speed mode */
903                 return 0;
904         } else {
905                 status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
906                 status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
907                 serial_out(up, 0x04, status);
908         }
909         return 1;
910 }
911 
912 /*
913  * We know that the chip has FIFOs.  Does it have an EFR?  The
914  * EFR is located in the same register position as the IIR and
915  * we know the top two bits of the IIR are currently set.  The
916  * EFR should contain zero.  Try to read the EFR.
917  */
918 static void autoconfig_16550a(struct uart_8250_port *up)
919 {
920         unsigned char status1, status2;
921         unsigned int iersave;
922 
923         up->port.type = PORT_16550A;
924         up->capabilities |= UART_CAP_FIFO;
925 
926         /*
927          * XR17V35x UARTs have an extra divisor register, DLD
928          * that gets enabled with when DLAB is set which will
929          * cause the device to incorrectly match and assign
930          * port type to PORT_16650.  The EFR for this UART is
931          * found at offset 0x09. Instead check the Deice ID (DVID)
932          * register for a 2, 4 or 8 port UART.
933          */
934         if (up->port.flags & UPF_EXAR_EFR) {
935                 status1 = serial_in(up, UART_EXAR_DVID);
936                 if (status1 == 0x82 || status1 == 0x84 || status1 == 0x88) {
937                         DEBUG_AUTOCONF("Exar XR17V35x ");
938                         up->port.type = PORT_XR17V35X;
939                         up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
940                                                 UART_CAP_SLEEP;
941 
942                         return;
943                 }
944 
945         }
946 
947         /*
948          * Check for presence of the EFR when DLAB is set.
949          * Only ST16C650V1 UARTs pass this test.
950          */
951         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
952         if (serial_in(up, UART_EFR) == 0) {
953                 serial_out(up, UART_EFR, 0xA8);
954                 if (serial_in(up, UART_EFR) != 0) {
955                         DEBUG_AUTOCONF("EFRv1 ");
956                         up->port.type = PORT_16650;
957                         up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
958                 } else {
959                         DEBUG_AUTOCONF("Motorola 8xxx DUART ");
960                 }
961                 serial_out(up, UART_EFR, 0);
962                 return;
963         }
964 
965         /*
966          * Maybe it requires 0xbf to be written to the LCR.
967          * (other ST16C650V2 UARTs, TI16C752A, etc)
968          */
969         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
970         if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
971                 DEBUG_AUTOCONF("EFRv2 ");
972                 autoconfig_has_efr(up);
973                 return;
974         }
975 
976         /*
977          * Check for a National Semiconductor SuperIO chip.
978          * Attempt to switch to bank 2, read the value of the LOOP bit
979          * from EXCR1. Switch back to bank 0, change it in MCR. Then
980          * switch back to bank 2, read it from EXCR1 again and check
981          * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
982          */
983         serial_out(up, UART_LCR, 0);
984         status1 = serial_in(up, UART_MCR);
985         serial_out(up, UART_LCR, 0xE0);
986         status2 = serial_in(up, 0x02); /* EXCR1 */
987 
988         if (!((status2 ^ status1) & UART_MCR_LOOP)) {
989                 serial_out(up, UART_LCR, 0);
990                 serial_out(up, UART_MCR, status1 ^ UART_MCR_LOOP);
991                 serial_out(up, UART_LCR, 0xE0);
992                 status2 = serial_in(up, 0x02); /* EXCR1 */
993                 serial_out(up, UART_LCR, 0);
994                 serial_out(up, UART_MCR, status1);
995 
996                 if ((status2 ^ status1) & UART_MCR_LOOP) {
997                         unsigned short quot;
998 
999                         serial_out(up, UART_LCR, 0xE0);
1000 
1001                         quot = serial_dl_read(up);
1002                         quot <<= 3;
1003 
1004                         if (ns16550a_goto_highspeed(up))
1005                                 serial_dl_write(up, quot);
1006 
1007                         serial_out(up, UART_LCR, 0);
1008 
1009                         up->port.uartclk = 921600*16;
1010                         up->port.type = PORT_NS16550A;
1011                         up->capabilities |= UART_NATSEMI;
1012                         return;
1013                 }
1014         }
1015 
1016         /*
1017          * No EFR.  Try to detect a TI16750, which only sets bit 5 of
1018          * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
1019          * Try setting it with and without DLAB set.  Cheap clones
1020          * set bit 5 without DLAB set.
1021          */
1022         serial_out(up, UART_LCR, 0);
1023         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1024         status1 = serial_in(up, UART_IIR) >> 5;
1025         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1026         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_A);
1027         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
1028         status2 = serial_in(up, UART_IIR) >> 5;
1029         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1030         serial_out(up, UART_LCR, 0);
1031 
1032         DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
1033 
1034         if (status1 == 6 && status2 == 7) {
1035                 up->port.type = PORT_16750;
1036                 up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
1037                 return;
1038         }
1039 
1040         /*
1041          * Try writing and reading the UART_IER_UUE bit (b6).
1042          * If it works, this is probably one of the Xscale platform's
1043          * internal UARTs.
1044          * We're going to explicitly set the UUE bit to 0 before
1045          * trying to write and read a 1 just to make sure it's not
1046          * already a 1 and maybe locked there before we even start start.
1047          */
1048         iersave = serial_in(up, UART_IER);
1049         serial_out(up, UART_IER, iersave & ~UART_IER_UUE);
1050         if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
1051                 /*
1052                  * OK it's in a known zero state, try writing and reading
1053                  * without disturbing the current state of the other bits.
1054                  */
1055                 serial_out(up, UART_IER, iersave | UART_IER_UUE);
1056                 if (serial_in(up, UART_IER) & UART_IER_UUE) {
1057                         /*
1058                          * It's an Xscale.
1059                          * We'll leave the UART_IER_UUE bit set to 1 (enabled).
1060                          */
1061                         DEBUG_AUTOCONF("Xscale ");
1062                         up->port.type = PORT_XSCALE;
1063                         up->capabilities |= UART_CAP_UUE | UART_CAP_RTOIE;
1064                         return;
1065                 }
1066         } else {
1067                 /*
1068                  * If we got here we couldn't force the IER_UUE bit to 0.
1069                  * Log it and continue.
1070                  */
1071                 DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
1072         }
1073         serial_out(up, UART_IER, iersave);
1074 
1075         /*
1076          * Exar uarts have EFR in a weird location
1077          */
1078         if (up->port.flags & UPF_EXAR_EFR) {
1079                 DEBUG_AUTOCONF("Exar XR17D15x ");
1080                 up->port.type = PORT_XR17D15X;
1081                 up->capabilities |= UART_CAP_AFE | UART_CAP_EFR |
1082                                     UART_CAP_SLEEP;
1083 
1084                 return;
1085         }
1086 
1087         /*
1088          * We distinguish between 16550A and U6 16550A by counting
1089          * how many bytes are in the FIFO.
1090          */
1091         if (up->port.type == PORT_16550A && size_fifo(up) == 64) {
1092                 up->port.type = PORT_U6_16550A;
1093                 up->capabilities |= UART_CAP_AFE;
1094         }
1095 }
1096 
1097 /*
1098  * This routine is called by rs_init() to initialize a specific serial
1099  * port.  It determines what type of UART chip this serial port is
1100  * using: 8250, 16450, 16550, 16550A.  The important question is
1101  * whether or not this UART is a 16550A or not, since this will
1102  * determine whether or not we can use its FIFO features or not.
1103  */
1104 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
1105 {
1106         unsigned char status1, scratch, scratch2, scratch3;
1107         unsigned char save_lcr, save_mcr;
1108         struct uart_port *port = &up->port;
1109         unsigned long flags;
1110         unsigned int old_capabilities;
1111 
1112         if (!port->iobase && !port->mapbase && !port->membase)
1113                 return;
1114 
1115         DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04lx, 0x%p): ",
1116                        serial_index(port), port->iobase, port->membase);
1117 
1118         /*
1119          * We really do need global IRQs disabled here - we're going to
1120          * be frobbing the chips IRQ enable register to see if it exists.
1121          */
1122         spin_lock_irqsave(&port->lock, flags);
1123 
1124         up->capabilities = 0;
1125         up->bugs = 0;
1126 
1127         if (!(port->flags & UPF_BUGGY_UART)) {
1128                 /*
1129                  * Do a simple existence test first; if we fail this,
1130                  * there's no point trying anything else.
1131                  *
1132                  * 0x80 is used as a nonsense port to prevent against
1133                  * false positives due to ISA bus float.  The
1134                  * assumption is that 0x80 is a non-existent port;
1135                  * which should be safe since include/asm/io.h also
1136                  * makes this assumption.
1137                  *
1138                  * Note: this is safe as long as MCR bit 4 is clear
1139                  * and the device is in "PC" mode.
1140                  */
1141                 scratch = serial_in(up, UART_IER);
1142                 serial_out(up, UART_IER, 0);
1143 #ifdef __i386__
1144                 outb(0xff, 0x080);
1145 #endif
1146                 /*
1147                  * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
1148                  * 16C754B) allow only to modify them if an EFR bit is set.
1149                  */
1150                 scratch2 = serial_in(up, UART_IER) & 0x0f;
1151                 serial_out(up, UART_IER, 0x0F);
1152 #ifdef __i386__
1153                 outb(0, 0x080);
1154 #endif
1155                 scratch3 = serial_in(up, UART_IER) & 0x0f;
1156                 serial_out(up, UART_IER, scratch);
1157                 if (scratch2 != 0 || scratch3 != 0x0F) {
1158                         /*
1159                          * We failed; there's nothing here
1160                          */
1161                         spin_unlock_irqrestore(&port->lock, flags);
1162                         DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
1163                                        scratch2, scratch3);
1164                         goto out;
1165                 }
1166         }
1167 
1168         save_mcr = serial_in(up, UART_MCR);
1169         save_lcr = serial_in(up, UART_LCR);
1170 
1171         /*
1172          * Check to see if a UART is really there.  Certain broken
1173          * internal modems based on the Rockwell chipset fail this
1174          * test, because they apparently don't implement the loopback
1175          * test mode.  So this test is skipped on the COM 1 through
1176          * COM 4 ports.  This *should* be safe, since no board
1177          * manufacturer would be stupid enough to design a board
1178          * that conflicts with COM 1-4 --- we hope!
1179          */
1180         if (!(port->flags & UPF_SKIP_TEST)) {
1181                 serial_out(up, UART_MCR, UART_MCR_LOOP | 0x0A);
1182                 status1 = serial_in(up, UART_MSR) & 0xF0;
1183                 serial_out(up, UART_MCR, save_mcr);
1184                 if (status1 != 0x90) {
1185                         spin_unlock_irqrestore(&port->lock, flags);
1186                         DEBUG_AUTOCONF("LOOP test failed (%02x) ",
1187                                        status1);
1188                         goto out;
1189                 }
1190         }
1191 
1192         /*
1193          * We're pretty sure there's a port here.  Lets find out what
1194          * type of port it is.  The IIR top two bits allows us to find
1195          * out if it's 8250 or 16450, 16550, 16550A or later.  This
1196          * determines what we test for next.
1197          *
1198          * We also initialise the EFR (if any) to zero for later.  The
1199          * EFR occupies the same register location as the FCR and IIR.
1200          */
1201         serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
1202         serial_out(up, UART_EFR, 0);
1203         serial_out(up, UART_LCR, 0);
1204 
1205         serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
1206         scratch = serial_in(up, UART_IIR) >> 6;
1207 
1208         switch (scratch) {
1209         case 0:
1210                 autoconfig_8250(up);
1211                 break;
1212         case 1:
1213                 port->type = PORT_UNKNOWN;
1214                 break;
1215         case 2:
1216                 port->type = PORT_16550;
1217                 break;
1218         case 3:
1219                 autoconfig_16550a(up);
1220                 break;
1221         }
1222 
1223 #ifdef CONFIG_SERIAL_8250_RSA
1224         /*
1225          * Only probe for RSA ports if we got the region.
1226          */
1227         if (port->type == PORT_16550A && probeflags & PROBE_RSA) {
1228                 int i;
1229 
1230                 for (i = 0 ; i < probe_rsa_count; ++i) {
1231                         if (probe_rsa[i] == port->iobase && __enable_rsa(up)) {
1232                                 port->type = PORT_RSA;
1233                                 break;
1234                         }
1235                 }
1236         }
1237 #endif
1238 
1239         serial_out(up, UART_LCR, save_lcr);
1240 
1241         port->fifosize = uart_config[up->port.type].fifo_size;
1242         old_capabilities = up->capabilities; 
1243         up->capabilities = uart_config[port->type].flags;
1244         up->tx_loadsz = uart_config[port->type].tx_loadsz;
1245 
1246         if (port->type == PORT_UNKNOWN)
1247                 goto out_lock;
1248 
1249         /*
1250          * Reset the UART.
1251          */
1252 #ifdef CONFIG_SERIAL_8250_RSA
1253         if (port->type == PORT_RSA)
1254                 serial_out(up, UART_RSA_FRR, 0);
1255 #endif
1256         serial_out(up, UART_MCR, save_mcr);
1257         serial8250_clear_fifos(up);
1258         serial_in(up, UART_RX);
1259         if (up->capabilities & UART_CAP_UUE)
1260                 serial_out(up, UART_IER, UART_IER_UUE);
1261         else
1262                 serial_out(up, UART_IER, 0);
1263 
1264 out_lock:
1265         spin_unlock_irqrestore(&port->lock, flags);
1266         if (up->capabilities != old_capabilities) {
1267                 printk(KERN_WARNING
1268                        "ttyS%d: detected caps %08x should be %08x\n",
1269                        serial_index(port), old_capabilities,
1270                        up->capabilities);
1271         }
1272 out:
1273         DEBUG_AUTOCONF("iir=%d ", scratch);
1274         DEBUG_AUTOCONF("type=%s\n", uart_config[port->type].name);
1275 }
1276 
1277 static void autoconfig_irq(struct uart_8250_port *up)
1278 {
1279         struct uart_port *port = &up->port;
1280         unsigned char save_mcr, save_ier;
1281         unsigned char save_ICP = 0;
1282         unsigned int ICP = 0;
1283         unsigned long irqs;
1284         int irq;
1285 
1286         if (port->flags & UPF_FOURPORT) {
1287                 ICP = (port->iobase & 0xfe0) | 0x1f;
1288                 save_ICP = inb_p(ICP);
1289                 outb_p(0x80, ICP);
1290                 inb_p(ICP);
1291         }
1292 
1293         /* forget possible initially masked and pending IRQ */
1294         probe_irq_off(probe_irq_on());
1295         save_mcr = serial_in(up, UART_MCR);
1296         save_ier = serial_in(up, UART_IER);
1297         serial_out(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
1298 
1299         irqs = probe_irq_on();
1300         serial_out(up, UART_MCR, 0);
1301         udelay(10);
1302         if (port->flags & UPF_FOURPORT) {
1303                 serial_out(up, UART_MCR,
1304                             UART_MCR_DTR | UART_MCR_RTS);
1305         } else {
1306                 serial_out(up, UART_MCR,
1307                             UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
1308         }
1309         serial_out(up, UART_IER, 0x0f); /* enable all intrs */
1310         serial_in(up, UART_LSR);
1311         serial_in(up, UART_RX);
1312         serial_in(up, UART_IIR);
1313         serial_in(up, UART_MSR);
1314         serial_out(up, UART_TX, 0xFF);
1315         udelay(20);
1316         irq = probe_irq_off(irqs);
1317 
1318         serial_out(up, UART_MCR, save_mcr);
1319         serial_out(up, UART_IER, save_ier);
1320 
1321         if (port->flags & UPF_FOURPORT)
1322                 outb_p(save_ICP, ICP);
1323 
1324         port->irq = (irq > 0) ? irq : 0;
1325 }
1326 
1327 static inline void __stop_tx(struct uart_8250_port *p)
1328 {
1329         if (p->ier & UART_IER_THRI) {
1330                 p->ier &= ~UART_IER_THRI;
1331                 serial_out(p, UART_IER, p->ier);
1332                 serial8250_rpm_put_tx(p);
1333         }
1334 }
1335 
1336 static void serial8250_stop_tx(struct uart_port *port)
1337 {
1338         struct uart_8250_port *up = up_to_u8250p(port);
1339 
1340         serial8250_rpm_get(up);
1341         __stop_tx(up);
1342 
1343         /*
1344          * We really want to stop the transmitter from sending.
1345          */
1346         if (port->type == PORT_16C950) {
1347                 up->acr |= UART_ACR_TXDIS;
1348                 serial_icr_write(up, UART_ACR, up->acr);
1349         }
1350         serial8250_rpm_put(up);
1351 }
1352 
1353 static void serial8250_start_tx(struct uart_port *port)
1354 {
1355         struct uart_8250_port *up = up_to_u8250p(port);
1356 
1357         serial8250_rpm_get_tx(up);
1358         if (up->dma && !up->dma->tx_dma(up)) {
1359                 return;
1360         } else if (!(up->ier & UART_IER_THRI)) {
1361                 up->ier |= UART_IER_THRI;
1362                 serial_port_out(port, UART_IER, up->ier);
1363 
1364                 if (up->bugs & UART_BUG_TXEN) {
1365                         unsigned char lsr;
1366                         lsr = serial_in(up, UART_LSR);
1367                         up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1368                         if (lsr & UART_LSR_TEMT)
1369                                 serial8250_tx_chars(up);
1370                 }
1371         }
1372 
1373         /*
1374          * Re-enable the transmitter if we disabled it.
1375          */
1376         if (port->type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
1377                 up->acr &= ~UART_ACR_TXDIS;
1378                 serial_icr_write(up, UART_ACR, up->acr);
1379         }
1380 }
1381 
1382 static void serial8250_throttle(struct uart_port *port)
1383 {
1384         port->throttle(port);
1385 }
1386 
1387 static void serial8250_unthrottle(struct uart_port *port)
1388 {
1389         port->unthrottle(port);
1390 }
1391 
1392 static void serial8250_stop_rx(struct uart_port *port)
1393 {
1394         struct uart_8250_port *up = up_to_u8250p(port);
1395 
1396         serial8250_rpm_get(up);
1397 
1398         up->ier &= ~(UART_IER_RLSI | UART_IER_RDI);
1399         up->port.read_status_mask &= ~UART_LSR_DR;
1400         serial_port_out(port, UART_IER, up->ier);
1401 
1402         serial8250_rpm_put(up);
1403 }
1404 
1405 static void serial8250_disable_ms(struct uart_port *port)
1406 {
1407         struct uart_8250_port *up =
1408                 container_of(port, struct uart_8250_port, port);
1409 
1410         /* no MSR capabilities */
1411         if (up->bugs & UART_BUG_NOMSR)
1412                 return;
1413 
1414         up->ier &= ~UART_IER_MSI;
1415         serial_port_out(port, UART_IER, up->ier);
1416 }
1417 
1418 static void serial8250_enable_ms(struct uart_port *port)
1419 {
1420         struct uart_8250_port *up = up_to_u8250p(port);
1421 
1422         /* no MSR capabilities */
1423         if (up->bugs & UART_BUG_NOMSR)
1424                 return;
1425 
1426         up->ier |= UART_IER_MSI;
1427 
1428         serial8250_rpm_get(up);
1429         serial_port_out(port, UART_IER, up->ier);
1430         serial8250_rpm_put(up);
1431 }
1432 
1433 /*
1434  * serial8250_rx_chars: processes according to the passed in LSR
1435  * value, and returns the remaining LSR bits not handled
1436  * by this Rx routine.
1437  */
1438 unsigned char
1439 serial8250_rx_chars(struct uart_8250_port *up, unsigned char lsr)
1440 {
1441         struct uart_port *port = &up->port;
1442         unsigned char ch;
1443         int max_count = 256;
1444         char flag;
1445 
1446         do {
1447                 if (likely(lsr & UART_LSR_DR))
1448                         ch = serial_in(up, UART_RX);
1449                 else
1450                         /*
1451                          * Intel 82571 has a Serial Over Lan device that will
1452                          * set UART_LSR_BI without setting UART_LSR_DR when
1453                          * it receives a break. To avoid reading from the
1454                          * receive buffer without UART_LSR_DR bit set, we
1455                          * just force the read character to be 0
1456                          */
1457                         ch = 0;
1458 
1459                 flag = TTY_NORMAL;
1460                 port->icount.rx++;
1461 
1462                 lsr |= up->lsr_saved_flags;
1463                 up->lsr_saved_flags = 0;
1464 
1465                 if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
1466                         if (lsr & UART_LSR_BI) {
1467                                 lsr &= ~(UART_LSR_FE | UART_LSR_PE);
1468                                 port->icount.brk++;
1469                                 /*
1470                                  * We do the SysRQ and SAK checking
1471                                  * here because otherwise the break
1472                                  * may get masked by ignore_status_mask
1473                                  * or read_status_mask.
1474                                  */
1475                                 if (uart_handle_break(port))
1476                                         goto ignore_char;
1477                         } else if (lsr & UART_LSR_PE)
1478                                 port->icount.parity++;
1479                         else if (lsr & UART_LSR_FE)
1480                                 port->icount.frame++;
1481                         if (lsr & UART_LSR_OE)
1482                                 port->icount.overrun++;
1483 
1484                         /*
1485                          * Mask off conditions which should be ignored.
1486                          */
1487                         lsr &= port->read_status_mask;
1488 
1489                         if (lsr & UART_LSR_BI) {
1490                                 DEBUG_INTR("handling break....");
1491                                 flag = TTY_BREAK;
1492                         } else if (lsr & UART_LSR_PE)
1493                                 flag = TTY_PARITY;
1494                         else if (lsr & UART_LSR_FE)
1495                                 flag = TTY_FRAME;
1496                 }
1497                 if (uart_handle_sysrq_char(port, ch))
1498                         goto ignore_char;
1499 
1500                 uart_insert_char(port, lsr, UART_LSR_OE, ch, flag);
1501 
1502 ignore_char:
1503                 lsr = serial_in(up, UART_LSR);
1504         } while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (--max_count > 0));
1505         spin_unlock(&port->lock);
1506         tty_flip_buffer_push(&port->state->port);
1507         spin_lock(&port->lock);
1508         return lsr;
1509 }
1510 EXPORT_SYMBOL_GPL(serial8250_rx_chars);
1511 
1512 void serial8250_tx_chars(struct uart_8250_port *up)
1513 {
1514         struct uart_port *port = &up->port;
1515         struct circ_buf *xmit = &port->state->xmit;
1516         int count;
1517 
1518         if (port->x_char) {
1519                 serial_out(up, UART_TX, port->x_char);
1520                 port->icount.tx++;
1521                 port->x_char = 0;
1522                 return;
1523         }
1524         if (uart_tx_stopped(port)) {
1525                 serial8250_stop_tx(port);
1526                 return;
1527         }
1528         if (uart_circ_empty(xmit)) {
1529                 __stop_tx(up);
1530                 return;
1531         }
1532 
1533         count = up->tx_loadsz;
1534         do {
1535                 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
1536                 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
1537                 port->icount.tx++;
1538                 if (uart_circ_empty(xmit))
1539                         break;
1540                 if (up->capabilities & UART_CAP_HFIFO) {
1541                         if ((serial_port_in(port, UART_LSR) & BOTH_EMPTY) !=
1542                             BOTH_EMPTY)
1543                                 break;
1544                 }
1545         } while (--count > 0);
1546 
1547         if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
1548                 uart_write_wakeup(port);
1549 
1550         DEBUG_INTR("THRE...");
1551 
1552         /*
1553          * With RPM enabled, we have to wait until the FIFO is empty before the
1554          * HW can go idle. So we get here once again with empty FIFO and disable
1555          * the interrupt and RPM in __stop_tx()
1556          */
1557         if (uart_circ_empty(xmit) && !(up->capabilities & UART_CAP_RPM))
1558                 __stop_tx(up);
1559 }
1560 EXPORT_SYMBOL_GPL(serial8250_tx_chars);
1561 
1562 /* Caller holds uart port lock */
1563 unsigned int serial8250_modem_status(struct uart_8250_port *up)
1564 {
1565         struct uart_port *port = &up->port;
1566         unsigned int status = serial_in(up, UART_MSR);
1567 
1568         status |= up->msr_saved_flags;
1569         up->msr_saved_flags = 0;
1570         if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
1571             port->state != NULL) {
1572                 if (status & UART_MSR_TERI)
1573                         port->icount.rng++;
1574                 if (status & UART_MSR_DDSR)
1575                         port->icount.dsr++;
1576                 if (status & UART_MSR_DDCD)
1577                         uart_handle_dcd_change(port, status & UART_MSR_DCD);
1578                 if (status & UART_MSR_DCTS)
1579                         uart_handle_cts_change(port, status & UART_MSR_CTS);
1580 
1581                 wake_up_interruptible(&port->state->port.delta_msr_wait);
1582         }
1583 
1584         return status;
1585 }
1586 EXPORT_SYMBOL_GPL(serial8250_modem_status);
1587 
1588 /*
1589  * This handles the interrupt from one port.
1590  */
1591 int serial8250_handle_irq(struct uart_port *port, unsigned int iir)
1592 {
1593         unsigned char status;
1594         unsigned long flags;
1595         struct uart_8250_port *up = up_to_u8250p(port);
1596         int dma_err = 0;
1597 
1598         if (iir & UART_IIR_NO_INT)
1599                 return 0;
1600 
1601         spin_lock_irqsave(&port->lock, flags);
1602 
1603         status = serial_port_in(port, UART_LSR);
1604 
1605         DEBUG_INTR("status = %x...", status);
1606 
1607         if (status & (UART_LSR_DR | UART_LSR_BI)) {
1608                 if (up->dma)
1609                         dma_err = up->dma->rx_dma(up, iir);
1610 
1611                 if (!up->dma || dma_err)
1612                         status = serial8250_rx_chars(up, status);
1613         }
1614         serial8250_modem_status(up);
1615         if ((!up->dma || (up->dma && up->dma->tx_err)) &&
1616             (status & UART_LSR_THRE))
1617                 serial8250_tx_chars(up);
1618 
1619         spin_unlock_irqrestore(&port->lock, flags);
1620         return 1;
1621 }
1622 EXPORT_SYMBOL_GPL(serial8250_handle_irq);
1623 
1624 static int serial8250_default_handle_irq(struct uart_port *port)
1625 {
1626         struct uart_8250_port *up = up_to_u8250p(port);
1627         unsigned int iir;
1628         int ret;
1629 
1630         serial8250_rpm_get(up);
1631 
1632         iir = serial_port_in(port, UART_IIR);
1633         ret = serial8250_handle_irq(port, iir);
1634 
1635         serial8250_rpm_put(up);
1636         return ret;
1637 }
1638 
1639 /*
1640  * These Exar UARTs have an extra interrupt indicator that could
1641  * fire for a few unimplemented interrupts.  One of which is a
1642  * wakeup event when coming out of sleep.  Put this here just
1643  * to be on the safe side that these interrupts don't go unhandled.
1644  */
1645 static int exar_handle_irq(struct uart_port *port)
1646 {
1647         unsigned char int0, int1, int2, int3;
1648         unsigned int iir = serial_port_in(port, UART_IIR);
1649         int ret;
1650 
1651         ret = serial8250_handle_irq(port, iir);
1652 
1653         if ((port->type == PORT_XR17V35X) ||
1654            (port->type == PORT_XR17D15X)) {
1655                 int0 = serial_port_in(port, 0x80);
1656                 int1 = serial_port_in(port, 0x81);
1657                 int2 = serial_port_in(port, 0x82);
1658                 int3 = serial_port_in(port, 0x83);
1659         }
1660 
1661         return ret;
1662 }
1663 
1664 /*
1665  * This is the serial driver's interrupt routine.
1666  *
1667  * Arjan thinks the old way was overly complex, so it got simplified.
1668  * Alan disagrees, saying that need the complexity to handle the weird
1669  * nature of ISA shared interrupts.  (This is a special exception.)
1670  *
1671  * In order to handle ISA shared interrupts properly, we need to check
1672  * that all ports have been serviced, and therefore the ISA interrupt
1673  * line has been de-asserted.
1674  *
1675  * This means we need to loop through all ports. checking that they
1676  * don't have an interrupt pending.
1677  */
1678 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
1679 {
1680         struct irq_info *i = dev_id;
1681         struct list_head *l, *end = NULL;
1682         int pass_counter = 0, handled = 0;
1683 
1684         DEBUG_INTR("serial8250_interrupt(%d)...", irq);
1685 
1686         spin_lock(&i->lock);
1687 
1688         l = i->head;
1689         do {
1690                 struct uart_8250_port *up;
1691                 struct uart_port *port;
1692 
1693                 up = list_entry(l, struct uart_8250_port, list);
1694                 port = &up->port;
1695 
1696                 if (port->handle_irq(port)) {
1697                         handled = 1;
1698                         end = NULL;
1699                 } else if (end == NULL)
1700                         end = l;
1701 
1702                 l = l->next;
1703 
1704                 if (l == i->head && pass_counter++ > PASS_LIMIT) {
1705                         /* If we hit this, we're dead. */
1706                         printk_ratelimited(KERN_ERR
1707                                 "serial8250: too much work for irq%d\n", irq);
1708                         break;
1709                 }
1710         } while (l != end);
1711 
1712         spin_unlock(&i->lock);
1713 
1714         DEBUG_INTR("end.\n");
1715 
1716         return IRQ_RETVAL(handled);
1717 }
1718 
1719 /*
1720  * To support ISA shared interrupts, we need to have one interrupt
1721  * handler that ensures that the IRQ line has been deasserted
1722  * before returning.  Failing to do this will result in the IRQ
1723  * line being stuck active, and, since ISA irqs are edge triggered,
1724  * no more IRQs will be seen.
1725  */
1726 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
1727 {
1728         spin_lock_irq(&i->lock);
1729 
1730         if (!list_empty(i->head)) {
1731                 if (i->head == &up->list)
1732                         i->head = i->head->next;
1733                 list_del(&up->list);
1734         } else {
1735                 BUG_ON(i->head != &up->list);
1736                 i->head = NULL;
1737         }
1738         spin_unlock_irq(&i->lock);
1739         /* List empty so throw away the hash node */
1740         if (i->head == NULL) {
1741                 hlist_del(&i->node);
1742                 kfree(i);
1743         }
1744 }
1745 
1746 static int serial_link_irq_chain(struct uart_8250_port *up)
1747 {
1748         struct hlist_head *h;
1749         struct hlist_node *n;
1750         struct irq_info *i;
1751         int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
1752 
1753         mutex_lock(&hash_mutex);
1754 
1755         h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1756 
1757         hlist_for_each(n, h) {
1758                 i = hlist_entry(n, struct irq_info, node);
1759                 if (i->irq == up->port.irq)
1760                         break;
1761         }
1762 
1763         if (n == NULL) {
1764                 i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
1765                 if (i == NULL) {
1766                         mutex_unlock(&hash_mutex);
1767                         return -ENOMEM;
1768                 }
1769                 spin_lock_init(&i->lock);
1770                 i->irq = up->port.irq;
1771                 hlist_add_head(&i->node, h);
1772         }
1773         mutex_unlock(&hash_mutex);
1774 
1775         spin_lock_irq(&i->lock);
1776 
1777         if (i->head) {
1778                 list_add(&up->list, i->head);
1779                 spin_unlock_irq(&i->lock);
1780 
1781                 ret = 0;
1782         } else {
1783                 INIT_LIST_HEAD(&up->list);
1784                 i->head = &up->list;
1785                 spin_unlock_irq(&i->lock);
1786                 irq_flags |= up->port.irqflags;
1787                 ret = request_irq(up->port.irq, serial8250_interrupt,
1788                                   irq_flags, "serial", i);
1789                 if (ret < 0)
1790                         serial_do_unlink(i, up);
1791         }
1792 
1793         return ret;
1794 }
1795 
1796 static void serial_unlink_irq_chain(struct uart_8250_port *up)
1797 {
1798         /*
1799          * yes, some broken gcc emit "warning: 'i' may be used uninitialized"
1800          * but no, we are not going to take a patch that assigns NULL below.
1801          */
1802         struct irq_info *i;
1803         struct hlist_node *n;
1804         struct hlist_head *h;
1805 
1806         mutex_lock(&hash_mutex);
1807 
1808         h = &irq_lists[up->port.irq % NR_IRQ_HASH];
1809 
1810         hlist_for_each(n, h) {
1811                 i = hlist_entry(n, struct irq_info, node);
1812                 if (i->irq == up->port.irq)
1813                         break;
1814         }
1815 
1816         BUG_ON(n == NULL);
1817         BUG_ON(i->head == NULL);
1818 
1819         if (list_empty(i->head))
1820                 free_irq(up->port.irq, i);
1821 
1822         serial_do_unlink(i, up);
1823         mutex_unlock(&hash_mutex);
1824 }
1825 
1826 /*
1827  * This function is used to handle ports that do not have an
1828  * interrupt.  This doesn't work very well for 16450's, but gives
1829  * barely passable results for a 16550A.  (Although at the expense
1830  * of much CPU overhead).
1831  */
1832 static void serial8250_timeout(unsigned long data)
1833 {
1834         struct uart_8250_port *up = (struct uart_8250_port *)data;
1835 
1836         up->port.handle_irq(&up->port);
1837         mod_timer(&up->timer, jiffies + uart_poll_timeout(&up->port));
1838 }
1839 
1840 static void serial8250_backup_timeout(unsigned long data)
1841 {
1842         struct uart_8250_port *up = (struct uart_8250_port *)data;
1843         unsigned int iir, ier = 0, lsr;
1844         unsigned long flags;
1845 
1846         spin_lock_irqsave(&up->port.lock, flags);
1847 
1848         /*
1849          * Must disable interrupts or else we risk racing with the interrupt
1850          * based handler.
1851          */
1852         if (up->port.irq) {
1853                 ier = serial_in(up, UART_IER);
1854                 serial_out(up, UART_IER, 0);
1855         }
1856 
1857         iir = serial_in(up, UART_IIR);
1858 
1859         /*
1860          * This should be a safe test for anyone who doesn't trust the
1861          * IIR bits on their UART, but it's specifically designed for
1862          * the "Diva" UART used on the management processor on many HP
1863          * ia64 and parisc boxes.
1864          */
1865         lsr = serial_in(up, UART_LSR);
1866         up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1867         if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
1868             (!uart_circ_empty(&up->port.state->xmit) || up->port.x_char) &&
1869             (lsr & UART_LSR_THRE)) {
1870                 iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
1871                 iir |= UART_IIR_THRI;
1872         }
1873 
1874         if (!(iir & UART_IIR_NO_INT))
1875                 serial8250_tx_chars(up);
1876 
1877         if (up->port.irq)
1878                 serial_out(up, UART_IER, ier);
1879 
1880         spin_unlock_irqrestore(&up->port.lock, flags);
1881 
1882         /* Standard timer interval plus 0.2s to keep the port running */
1883         mod_timer(&up->timer,
1884                 jiffies + uart_poll_timeout(&up->port) + HZ / 5);
1885 }
1886 
1887 static unsigned int serial8250_tx_empty(struct uart_port *port)
1888 {
1889         struct uart_8250_port *up = up_to_u8250p(port);
1890         unsigned long flags;
1891         unsigned int lsr;
1892 
1893         serial8250_rpm_get(up);
1894 
1895         spin_lock_irqsave(&port->lock, flags);
1896         lsr = serial_port_in(port, UART_LSR);
1897         up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
1898         spin_unlock_irqrestore(&port->lock, flags);
1899 
1900         serial8250_rpm_put(up);
1901 
1902         return (lsr & BOTH_EMPTY) == BOTH_EMPTY ? TIOCSER_TEMT : 0;
1903 }
1904 
1905 static unsigned int serial8250_get_mctrl(struct uart_port *port)
1906 {
1907         struct uart_8250_port *up = up_to_u8250p(port);
1908         unsigned int status;
1909         unsigned int ret;
1910 
1911         serial8250_rpm_get(up);
1912         status = serial8250_modem_status(up);
1913         serial8250_rpm_put(up);
1914 
1915         ret = 0;
1916         if (status & UART_MSR_DCD)
1917                 ret |= TIOCM_CAR;
1918         if (status & UART_MSR_RI)
1919                 ret |= TIOCM_RNG;
1920         if (status & UART_MSR_DSR)
1921                 ret |= TIOCM_DSR;
1922         if (status & UART_MSR_CTS)
1923                 ret |= TIOCM_CTS;
1924         return ret;
1925 }
1926 
1927 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
1928 {
1929         struct uart_8250_port *up = up_to_u8250p(port);
1930         unsigned char mcr = 0;
1931 
1932         if (mctrl & TIOCM_RTS)
1933                 mcr |= UART_MCR_RTS;
1934         if (mctrl & TIOCM_DTR)
1935                 mcr |= UART_MCR_DTR;
1936         if (mctrl & TIOCM_OUT1)
1937                 mcr |= UART_MCR_OUT1;
1938         if (mctrl & TIOCM_OUT2)
1939                 mcr |= UART_MCR_OUT2;
1940         if (mctrl & TIOCM_LOOP)
1941                 mcr |= UART_MCR_LOOP;
1942 
1943         mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
1944 
1945         serial_port_out(port, UART_MCR, mcr);
1946 }
1947 
1948 static void serial8250_break_ctl(struct uart_port *port, int break_state)
1949 {
1950         struct uart_8250_port *up = up_to_u8250p(port);
1951         unsigned long flags;
1952 
1953         serial8250_rpm_get(up);
1954         spin_lock_irqsave(&port->lock, flags);
1955         if (break_state == -1)
1956                 up->lcr |= UART_LCR_SBC;
1957         else
1958                 up->lcr &= ~UART_LCR_SBC;
1959         serial_port_out(port, UART_LCR, up->lcr);
1960         spin_unlock_irqrestore(&port->lock, flags);
1961         serial8250_rpm_put(up);
1962 }
1963 
1964 /*
1965  *      Wait for transmitter & holding register to empty
1966  */
1967 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
1968 {
1969         unsigned int status, tmout = 10000;
1970 
1971         /* Wait up to 10ms for the character(s) to be sent. */
1972         for (;;) {
1973                 status = serial_in(up, UART_LSR);
1974 
1975                 up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
1976 
1977                 if ((status & bits) == bits)
1978                         break;
1979                 if (--tmout == 0)
1980                         break;
1981                 udelay(1);
1982         }
1983 
1984         /* Wait up to 1s for flow control if necessary */
1985         if (up->port.flags & UPF_CONS_FLOW) {
1986                 unsigned int tmout;
1987                 for (tmout = 1000000; tmout; tmout--) {
1988                         unsigned int msr = serial_in(up, UART_MSR);
1989                         up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
1990                         if (msr & UART_MSR_CTS)
1991                                 break;
1992                         udelay(1);
1993                         touch_nmi_watchdog();
1994                 }
1995         }
1996 }
1997 
1998 #ifdef CONFIG_CONSOLE_POLL
1999 /*
2000  * Console polling routines for writing and reading from the uart while
2001  * in an interrupt or debug context.
2002  */
2003 
2004 static int serial8250_get_poll_char(struct uart_port *port)
2005 {
2006         struct uart_8250_port *up = up_to_u8250p(port);
2007         unsigned char lsr;
2008         int status;
2009 
2010         serial8250_rpm_get(up);
2011 
2012         lsr = serial_port_in(port, UART_LSR);
2013 
2014         if (!(lsr & UART_LSR_DR)) {
2015                 status = NO_POLL_CHAR;
2016                 goto out;
2017         }
2018 
2019         status = serial_port_in(port, UART_RX);
2020 out:
2021         serial8250_rpm_put(up);
2022         return status;
2023 }
2024 
2025 
2026 static void serial8250_put_poll_char(struct uart_port *port,
2027                          unsigned char c)
2028 {
2029         unsigned int ier;
2030         struct uart_8250_port *up = up_to_u8250p(port);
2031 
2032         serial8250_rpm_get(up);
2033         /*
2034          *      First save the IER then disable the interrupts
2035          */
2036         ier = serial_port_in(port, UART_IER);
2037         if (up->capabilities & UART_CAP_UUE)
2038                 serial_port_out(port, UART_IER, UART_IER_UUE);
2039         else
2040                 serial_port_out(port, UART_IER, 0);
2041 
2042         wait_for_xmitr(up, BOTH_EMPTY);
2043         /*
2044          *      Send the character out.
2045          */
2046         serial_port_out(port, UART_TX, c);
2047 
2048         /*
2049          *      Finally, wait for transmitter to become empty
2050          *      and restore the IER
2051          */
2052         wait_for_xmitr(up, BOTH_EMPTY);
2053         serial_port_out(port, UART_IER, ier);
2054         serial8250_rpm_put(up);
2055 }
2056 
2057 #endif /* CONFIG_CONSOLE_POLL */
2058 
2059 int serial8250_do_startup(struct uart_port *port)
2060 {
2061         struct uart_8250_port *up = up_to_u8250p(port);
2062         unsigned long flags;
2063         unsigned char lsr, iir;
2064         int retval;
2065 
2066         if (port->type == PORT_8250_CIR)
2067                 return -ENODEV;
2068 
2069         if (!port->fifosize)
2070                 port->fifosize = uart_config[port->type].fifo_size;
2071         if (!up->tx_loadsz)
2072                 up->tx_loadsz = uart_config[port->type].tx_loadsz;
2073         if (!up->capabilities)
2074                 up->capabilities = uart_config[port->type].flags;
2075         up->mcr = 0;
2076 
2077         if (port->iotype != up->cur_iotype)
2078                 set_io_from_upio(port);
2079 
2080         serial8250_rpm_get(up);
2081         if (port->type == PORT_16C950) {
2082                 /* Wake up and initialize UART */
2083                 up->acr = 0;
2084                 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2085                 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2086                 serial_port_out(port, UART_IER, 0);
2087                 serial_port_out(port, UART_LCR, 0);
2088                 serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
2089                 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2090                 serial_port_out(port, UART_EFR, UART_EFR_ECB);
2091                 serial_port_out(port, UART_LCR, 0);
2092         }
2093 
2094 #ifdef CONFIG_SERIAL_8250_RSA
2095         /*
2096          * If this is an RSA port, see if we can kick it up to the
2097          * higher speed clock.
2098          */
2099         enable_rsa(up);
2100 #endif
2101         /*
2102          * Clear the FIFO buffers and disable them.
2103          * (they will be reenabled in set_termios())
2104          */
2105         serial8250_clear_fifos(up);
2106 
2107         /*
2108          * Clear the interrupt registers.
2109          */
2110         if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2111                 serial_port_in(port, UART_RX);
2112         serial_port_in(port, UART_IIR);
2113         serial_port_in(port, UART_MSR);
2114 
2115         /*
2116          * At this point, there's no way the LSR could still be 0xff;
2117          * if it is, then bail out, because there's likely no UART
2118          * here.
2119          */
2120         if (!(port->flags & UPF_BUGGY_UART) &&
2121             (serial_port_in(port, UART_LSR) == 0xff)) {
2122                 printk_ratelimited(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
2123                                    serial_index(port));
2124                 retval = -ENODEV;
2125                 goto out;
2126         }
2127 
2128         /*
2129          * For a XR16C850, we need to set the trigger levels
2130          */
2131         if (port->type == PORT_16850) {
2132                 unsigned char fctr;
2133 
2134                 serial_out(up, UART_LCR, UART_LCR_CONF_MODE_B);
2135 
2136                 fctr = serial_in(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
2137                 serial_port_out(port, UART_FCTR,
2138                                 fctr | UART_FCTR_TRGD | UART_FCTR_RX);
2139                 serial_port_out(port, UART_TRG, UART_TRG_96);
2140                 serial_port_out(port, UART_FCTR,
2141                                 fctr | UART_FCTR_TRGD | UART_FCTR_TX);
2142                 serial_port_out(port, UART_TRG, UART_TRG_96);
2143 
2144                 serial_port_out(port, UART_LCR, 0);
2145         }
2146 
2147         if (port->irq) {
2148                 unsigned char iir1;
2149                 /*
2150                  * Test for UARTs that do not reassert THRE when the
2151                  * transmitter is idle and the interrupt has already
2152                  * been cleared.  Real 16550s should always reassert
2153                  * this interrupt whenever the transmitter is idle and
2154                  * the interrupt is enabled.  Delays are necessary to
2155                  * allow register changes to become visible.
2156                  */
2157                 spin_lock_irqsave(&port->lock, flags);
2158                 if (up->port.irqflags & IRQF_SHARED)
2159                         disable_irq_nosync(port->irq);
2160 
2161                 wait_for_xmitr(up, UART_LSR_THRE);
2162                 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2163                 udelay(1); /* allow THRE to set */
2164                 iir1 = serial_port_in(port, UART_IIR);
2165                 serial_port_out(port, UART_IER, 0);
2166                 serial_port_out_sync(port, UART_IER, UART_IER_THRI);
2167                 udelay(1); /* allow a working UART time to re-assert THRE */
2168                 iir = serial_port_in(port, UART_IIR);
2169                 serial_port_out(port, UART_IER, 0);
2170 
2171                 if (port->irqflags & IRQF_SHARED)
2172                         enable_irq(port->irq);
2173                 spin_unlock_irqrestore(&port->lock, flags);
2174 
2175                 /*
2176                  * If the interrupt is not reasserted, or we otherwise
2177                  * don't trust the iir, setup a timer to kick the UART
2178                  * on a regular basis.
2179                  */
2180                 if ((!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) ||
2181                     up->port.flags & UPF_BUG_THRE) {
2182                         up->bugs |= UART_BUG_THRE;
2183                         pr_debug("ttyS%d - using backup timer\n",
2184                                  serial_index(port));
2185                 }
2186         }
2187 
2188         /*
2189          * The above check will only give an accurate result the first time
2190          * the port is opened so this value needs to be preserved.
2191          */
2192         if (up->bugs & UART_BUG_THRE) {
2193                 up->timer.function = serial8250_backup_timeout;
2194                 up->timer.data = (unsigned long)up;
2195                 mod_timer(&up->timer, jiffies +
2196                         uart_poll_timeout(port) + HZ / 5);
2197         }
2198 
2199         /*
2200          * If the "interrupt" for this port doesn't correspond with any
2201          * hardware interrupt, we use a timer-based system.  The original
2202          * driver used to do this with IRQ0.
2203          */
2204         if (!port->irq) {
2205                 up->timer.data = (unsigned long)up;
2206                 mod_timer(&up->timer, jiffies + uart_poll_timeout(port));
2207         } else {
2208                 retval = serial_link_irq_chain(up);
2209                 if (retval)
2210                         goto out;
2211         }
2212 
2213         /*
2214          * Now, initialize the UART
2215          */
2216         serial_port_out(port, UART_LCR, UART_LCR_WLEN8);
2217 
2218         spin_lock_irqsave(&port->lock, flags);
2219         if (up->port.flags & UPF_FOURPORT) {
2220                 if (!up->port.irq)
2221                         up->port.mctrl |= TIOCM_OUT1;
2222         } else
2223                 /*
2224                  * Most PC uarts need OUT2 raised to enable interrupts.
2225                  */
2226                 if (port->irq)
2227                         up->port.mctrl |= TIOCM_OUT2;
2228 
2229         serial8250_set_mctrl(port, port->mctrl);
2230 
2231         /* Serial over Lan (SoL) hack:
2232            Intel 8257x Gigabit ethernet chips have a
2233            16550 emulation, to be used for Serial Over Lan.
2234            Those chips take a longer time than a normal
2235            serial device to signalize that a transmission
2236            data was queued. Due to that, the above test generally
2237            fails. One solution would be to delay the reading of
2238            iir. However, this is not reliable, since the timeout
2239            is variable. So, let's just don't test if we receive
2240            TX irq. This way, we'll never enable UART_BUG_TXEN.
2241          */
2242         if (skip_txen_test || up->port.flags & UPF_NO_TXEN_TEST)
2243                 goto dont_test_tx_en;
2244 
2245         /*
2246          * Do a quick test to see if we receive an
2247          * interrupt when we enable the TX irq.
2248          */
2249         serial_port_out(port, UART_IER, UART_IER_THRI);
2250         lsr = serial_port_in(port, UART_LSR);
2251         iir = serial_port_in(port, UART_IIR);
2252         serial_port_out(port, UART_IER, 0);
2253 
2254         if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
2255                 if (!(up->bugs & UART_BUG_TXEN)) {
2256                         up->bugs |= UART_BUG_TXEN;
2257                         pr_debug("ttyS%d - enabling bad tx status workarounds\n",
2258                                  serial_index(port));
2259                 }
2260         } else {
2261                 up->bugs &= ~UART_BUG_TXEN;
2262         }
2263 
2264 dont_test_tx_en:
2265         spin_unlock_irqrestore(&port->lock, flags);
2266 
2267         /*
2268          * Clear the interrupt registers again for luck, and clear the
2269          * saved flags to avoid getting false values from polling
2270          * routines or the previous session.
2271          */
2272         if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2273                 serial_port_in(port, UART_RX);
2274         serial_port_in(port, UART_IIR);
2275         serial_port_in(port, UART_MSR);
2276         up->lsr_saved_flags = 0;
2277         up->msr_saved_flags = 0;
2278 
2279         /*
2280          * Request DMA channels for both RX and TX.
2281          */
2282         if (up->dma) {
2283                 retval = serial8250_request_dma(up);
2284                 if (retval) {
2285                         pr_warn_ratelimited("ttyS%d - failed to request DMA\n",
2286                                             serial_index(port));
2287                         up->dma = NULL;
2288                 }
2289         }
2290 
2291         /*
2292          * Finally, enable interrupts.  Note: Modem status interrupts
2293          * are set via set_termios(), which will be occurring imminently
2294          * anyway, so we don't enable them here.
2295          */
2296         up->ier = UART_IER_RLSI | UART_IER_RDI;
2297         serial_port_out(port, UART_IER, up->ier);
2298 
2299         if (port->flags & UPF_FOURPORT) {
2300                 unsigned int icp;
2301                 /*
2302                  * Enable interrupts on the AST Fourport board
2303                  */
2304                 icp = (port->iobase & 0xfe0) | 0x01f;
2305                 outb_p(0x80, icp);
2306                 inb_p(icp);
2307         }
2308         retval = 0;
2309 out:
2310         serial8250_rpm_put(up);
2311         return retval;
2312 }
2313 EXPORT_SYMBOL_GPL(serial8250_do_startup);
2314 
2315 static int serial8250_startup(struct uart_port *port)
2316 {
2317         if (port->startup)
2318                 return port->startup(port);
2319         return serial8250_do_startup(port);
2320 }
2321 
2322 void serial8250_do_shutdown(struct uart_port *port)
2323 {
2324         struct uart_8250_port *up = up_to_u8250p(port);
2325         unsigned long flags;
2326 
2327         serial8250_rpm_get(up);
2328         /*
2329          * Disable interrupts from this port
2330          */
2331         up->ier = 0;
2332         serial_port_out(port, UART_IER, 0);
2333 
2334         if (up->dma)
2335                 serial8250_release_dma(up);
2336 
2337         spin_lock_irqsave(&port->lock, flags);
2338         if (port->flags & UPF_FOURPORT) {
2339                 /* reset interrupts on the AST Fourport board */
2340                 inb((port->iobase & 0xfe0) | 0x1f);
2341                 port->mctrl |= TIOCM_OUT1;
2342         } else
2343                 port->mctrl &= ~TIOCM_OUT2;
2344 
2345         serial8250_set_mctrl(port, port->mctrl);
2346         spin_unlock_irqrestore(&port->lock, flags);
2347 
2348         /*
2349          * Disable break condition and FIFOs
2350          */
2351         serial_port_out(port, UART_LCR,
2352                         serial_port_in(port, UART_LCR) & ~UART_LCR_SBC);
2353         serial8250_clear_fifos(up);
2354 
2355 #ifdef CONFIG_SERIAL_8250_RSA
2356         /*
2357          * Reset the RSA board back to 115kbps compat mode.
2358          */
2359         disable_rsa(up);
2360 #endif
2361 
2362         /*
2363          * Read data port to reset things, and then unlink from
2364          * the IRQ chain.
2365          */
2366         if (serial_port_in(port, UART_LSR) & UART_LSR_DR)
2367                 serial_port_in(port, UART_RX);
2368         serial8250_rpm_put(up);
2369 
2370         del_timer_sync(&up->timer);
2371         up->timer.function = serial8250_timeout;
2372         if (port->irq)
2373                 serial_unlink_irq_chain(up);
2374 }
2375 EXPORT_SYMBOL_GPL(serial8250_do_shutdown);
2376 
2377 static void serial8250_shutdown(struct uart_port *port)
2378 {
2379         if (port->shutdown)
2380                 port->shutdown(port);
2381         else
2382                 serial8250_do_shutdown(port);
2383 }
2384 
2385 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
2386 {
2387         unsigned int quot;
2388 
2389         /*
2390          * Handle magic divisors for baud rates above baud_base on
2391          * SMSC SuperIO chips.
2392          */
2393         if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2394             baud == (port->uartclk/4))
2395                 quot = 0x8001;
2396         else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
2397                  baud == (port->uartclk/8))
2398                 quot = 0x8002;
2399         else
2400                 quot = uart_get_divisor(port, baud);
2401 
2402         return quot;
2403 }
2404 
2405 void
2406 serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios,
2407                           struct ktermios *old)
2408 {
2409         struct uart_8250_port *up = up_to_u8250p(port);
2410         unsigned char cval;
2411         unsigned long flags;
2412         unsigned int baud, quot;
2413 
2414         switch (termios->c_cflag & CSIZE) {
2415         case CS5:
2416                 cval = UART_LCR_WLEN5;
2417                 break;
2418         case CS6:
2419                 cval = UART_LCR_WLEN6;
2420                 break;
2421         case CS7:
2422                 cval = UART_LCR_WLEN7;
2423                 break;
2424         default:
2425         case CS8:
2426                 cval = UART_LCR_WLEN8;
2427                 break;
2428         }
2429 
2430         if (termios->c_cflag & CSTOPB)
2431                 cval |= UART_LCR_STOP;
2432         if (termios->c_cflag & PARENB) {
2433                 cval |= UART_LCR_PARITY;
2434                 if (up->bugs & UART_BUG_PARITY)
2435                         up->fifo_bug = true;
2436         }
2437         if (!(termios->c_cflag & PARODD))
2438                 cval |= UART_LCR_EPAR;
2439 #ifdef CMSPAR
2440         if (termios->c_cflag & CMSPAR)
2441                 cval |= UART_LCR_SPAR;
2442 #endif
2443 
2444         /*
2445          * Ask the core to calculate the divisor for us.
2446          */
2447         baud = uart_get_baud_rate(port, termios, old,
2448                                   port->uartclk / 16 / 0xffff,
2449                                   port->uartclk / 16);
2450         quot = serial8250_get_divisor(port, baud);
2451 
2452         /*
2453          * Oxford Semi 952 rev B workaround
2454          */
2455         if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
2456                 quot++;
2457 
2458         if (up->capabilities & UART_CAP_FIFO && port->fifosize > 1) {
2459                 /* NOTE: If fifo_bug is not set, a user can set RX_trigger. */
2460                 if ((baud < 2400 && !up->dma) || up->fifo_bug) {
2461                         up->fcr &= ~UART_FCR_TRIGGER_MASK;
2462                         up->fcr |= UART_FCR_TRIGGER_1;
2463                 }
2464         }
2465 
2466         /*
2467          * MCR-based auto flow control.  When AFE is enabled, RTS will be
2468          * deasserted when the receive FIFO contains more characters than
2469          * the trigger, or the MCR RTS bit is cleared.  In the case where
2470          * the remote UART is not using CTS auto flow control, we must
2471          * have sufficient FIFO entries for the latency of the remote
2472          * UART to respond.  IOW, at least 32 bytes of FIFO.
2473          */
2474         if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) {
2475                 up->mcr &= ~UART_MCR_AFE;
2476                 if (termios->c_cflag & CRTSCTS)
2477                         up->mcr |= UART_MCR_AFE;
2478         }
2479 
2480         /*
2481          * Ok, we're now changing the port state.  Do it with
2482          * interrupts disabled.
2483          */
2484         serial8250_rpm_get(up);
2485         spin_lock_irqsave(&port->lock, flags);
2486 
2487         /*
2488          * Update the per-port timeout.
2489          */
2490         uart_update_timeout(port, termios->c_cflag, baud);
2491 
2492         port->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2493         if (termios->c_iflag & INPCK)
2494                 port->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2495         if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
2496                 port->read_status_mask |= UART_LSR_BI;
2497 
2498         /*
2499          * Characteres to ignore
2500          */
2501         port->ignore_status_mask = 0;
2502         if (termios->c_iflag & IGNPAR)
2503                 port->ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
2504         if (termios->c_iflag & IGNBRK) {
2505                 port->ignore_status_mask |= UART_LSR_BI;
2506                 /*
2507                  * If we're ignoring parity and break indicators,
2508                  * ignore overruns too (for real raw support).
2509                  */
2510                 if (termios->c_iflag & IGNPAR)
2511                         port->ignore_status_mask |= UART_LSR_OE;
2512         }
2513 
2514         /*
2515          * ignore all characters if CREAD is not set
2516          */
2517         if ((termios->c_cflag & CREAD) == 0)
2518                 port->ignore_status_mask |= UART_LSR_DR;
2519 
2520         /*
2521          * CTS flow control flag and modem status interrupts
2522          */
2523         up->ier &= ~UART_IER_MSI;
2524         if (!(up->bugs & UART_BUG_NOMSR) &&
2525                         UART_ENABLE_MS(&up->port, termios->c_cflag))
2526                 up->ier |= UART_IER_MSI;
2527         if (up->capabilities & UART_CAP_UUE)
2528                 up->ier |= UART_IER_UUE;
2529         if (up->capabilities & UART_CAP_RTOIE)
2530                 up->ier |= UART_IER_RTOIE;
2531 
2532         serial_port_out(port, UART_IER, up->ier);
2533 
2534         if (up->capabilities & UART_CAP_EFR) {
2535                 unsigned char efr = 0;
2536                 /*
2537                  * TI16C752/Startech hardware flow control.  FIXME:
2538                  * - TI16C752 requires control thresholds to be set.
2539                  * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
2540                  */
2541                 if (termios->c_cflag & CRTSCTS)
2542                         efr |= UART_EFR_CTS;
2543 
2544                 serial_port_out(port, UART_LCR, UART_LCR_CONF_MODE_B);
2545                 if (port->flags & UPF_EXAR_EFR)
2546                         serial_port_out(port, UART_XR_EFR, efr);
2547                 else
2548                         serial_port_out(port, UART_EFR, efr);
2549         }
2550 
2551         /* Workaround to enable 115200 baud on OMAP1510 internal ports */
2552         if (is_omap1510_8250(up)) {
2553                 if (baud == 115200) {
2554                         quot = 1;
2555                         serial_port_out(port, UART_OMAP_OSC_12M_SEL, 1);
2556                 } else
2557                         serial_port_out(port, UART_OMAP_OSC_12M_SEL, 0);
2558         }
2559 
2560         /*
2561          * For NatSemi, switch to bank 2 not bank 1, to avoid resetting EXCR2,
2562          * otherwise just set DLAB
2563          */
2564         if (up->capabilities & UART_NATSEMI)
2565                 serial_port_out(port, UART_LCR, 0xe0);
2566         else
2567                 serial_port_out(port, UART_LCR, cval | UART_LCR_DLAB);
2568 
2569         serial_dl_write(up, quot);
2570 
2571         /*
2572          * XR17V35x UARTs have an extra fractional divisor register (DLD)
2573          *
2574          * We need to recalculate all of the registers, because DLM and DLL
2575          * are already rounded to a whole integer.
2576          *
2577          * When recalculating we use a 32x clock instead of a 16x clock to
2578          * allow 1-bit for rounding in the fractional part.
2579          */
2580         if (up->port.type == PORT_XR17V35X) {
2581                 unsigned int baud_x32 = (port->uartclk * 2) / baud;
2582                 u16 quot = baud_x32 / 32;
2583                 u8 quot_frac = DIV_ROUND_CLOSEST(baud_x32 % 32, 2);
2584 
2585                 serial_dl_write(up, quot);
2586                 serial_port_out(port, 0x2, quot_frac & 0xf);
2587         }
2588 
2589         /*
2590          * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
2591          * is written without DLAB set, this mode will be disabled.
2592          */
2593         if (port->type == PORT_16750)
2594                 serial_port_out(port, UART_FCR, up->fcr);
2595 
2596         serial_port_out(port, UART_LCR, cval);          /* reset DLAB */
2597         up->lcr = cval;                                 /* Save LCR */
2598         if (port->type != PORT_16750) {
2599                 /* emulated UARTs (Lucent Venus 167x) need two steps */
2600                 if (up->fcr & UART_FCR_ENABLE_FIFO)
2601                         serial_port_out(port, UART_FCR, UART_FCR_ENABLE_FIFO);
2602                 serial_port_out(port, UART_FCR, up->fcr);       /* set fcr */
2603         }
2604         serial8250_set_mctrl(port, port->mctrl);
2605         spin_unlock_irqrestore(&port->lock, flags);
2606         serial8250_rpm_put(up);
2607 
2608         /* Don't rewrite B0 */
2609         if (tty_termios_baud_rate(termios))
2610                 tty_termios_encode_baud_rate(termios, baud, baud);
2611 }
2612 EXPORT_SYMBOL(serial8250_do_set_termios);
2613 
2614 static void
2615 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
2616                        struct ktermios *old)
2617 {
2618         if (port->set_termios)
2619                 port->set_termios(port, termios, old);
2620         else
2621                 serial8250_do_set_termios(port, termios, old);
2622 }
2623 
2624 static void
2625 serial8250_set_ldisc(struct uart_port *port, struct ktermios *termios)
2626 {
2627         if (termios->c_line == N_PPS) {
2628                 port->flags |= UPF_HARDPPS_CD;
2629                 spin_lock_irq(&port->lock);
2630                 serial8250_enable_ms(port);
2631                 spin_unlock_irq(&port->lock);
2632         } else {
2633                 port->flags &= ~UPF_HARDPPS_CD;
2634                 if (!UART_ENABLE_MS(port, termios->c_cflag)) {
2635                         spin_lock_irq(&port->lock);
2636                         serial8250_disable_ms(port);
2637                         spin_unlock_irq(&port->lock);
2638                 }
2639         }
2640 }
2641 
2642 
2643 void serial8250_do_pm(struct uart_port *port, unsigned int state,
2644                       unsigned int oldstate)
2645 {
2646         struct uart_8250_port *p = up_to_u8250p(port);
2647 
2648         serial8250_set_sleep(p, state != 0);
2649 }
2650 EXPORT_SYMBOL(serial8250_do_pm);
2651 
2652 static void
2653 serial8250_pm(struct uart_port *port, unsigned int state,
2654               unsigned int oldstate)
2655 {
2656         if (port->pm)
2657                 port->pm(port, state, oldstate);
2658         else
2659                 serial8250_do_pm(port, state, oldstate);
2660 }
2661 
2662 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
2663 {
2664         if (pt->port.iotype == UPIO_AU) {
2665                 if (pt->port.type == PORT_RT2880)
2666                         return 0x100;
2667                 return 0x1000;
2668         }
2669         if (is_omap1_8250(pt))
2670                 return 0x16 << pt->port.regshift;
2671 
2672         return 8 << pt->port.regshift;
2673 }
2674 
2675 /*
2676  * Resource handling.
2677  */
2678 static int serial8250_request_std_resource(struct uart_8250_port *up)
2679 {
2680         unsigned int size = serial8250_port_size(up);
2681         struct uart_port *port = &up->port;
2682         int ret = 0;
2683 
2684         switch (port->iotype) {
2685         case UPIO_AU:
2686         case UPIO_TSI:
2687         case UPIO_MEM32:
2688         case UPIO_MEM:
2689                 if (!port->mapbase)
2690                         break;
2691 
2692                 if (!request_mem_region(port->mapbase, size, "serial")) {
2693                         ret = -EBUSY;
2694                         break;
2695                 }
2696 
2697                 if (port->flags & UPF_IOREMAP) {
2698                         port->membase = ioremap_nocache(port->mapbase, size);
2699                         if (!port->membase) {
2700                                 release_mem_region(port->mapbase, size);
2701                                 ret = -ENOMEM;
2702                         }
2703                 }
2704                 break;
2705 
2706         case UPIO_HUB6:
2707         case UPIO_PORT:
2708                 if (!request_region(port->iobase, size, "serial"))
2709                         ret = -EBUSY;
2710                 break;
2711         }
2712         return ret;
2713 }
2714 
2715 static void serial8250_release_std_resource(struct uart_8250_port *up)
2716 {
2717         unsigned int size = serial8250_port_size(up);
2718         struct uart_port *port = &up->port;
2719 
2720         switch (port->iotype) {
2721         case UPIO_AU:
2722         case UPIO_TSI:
2723         case UPIO_MEM32:
2724         case UPIO_MEM:
2725                 if (!port->mapbase)
2726                         break;
2727 
2728                 if (port->flags & UPF_IOREMAP) {
2729                         iounmap(port->membase);
2730                         port->membase = NULL;
2731                 }
2732 
2733                 release_mem_region(port->mapbase, size);
2734                 break;
2735 
2736         case UPIO_HUB6:
2737         case UPIO_PORT:
2738                 release_region(port->iobase, size);
2739                 break;
2740         }
2741 }
2742 
2743 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
2744 {
2745         unsigned long start = UART_RSA_BASE << up->port.regshift;
2746         unsigned int size = 8 << up->port.regshift;
2747         struct uart_port *port = &up->port;
2748         int ret = -EINVAL;
2749 
2750         switch (port->iotype) {
2751         case UPIO_HUB6:
2752         case UPIO_PORT:
2753                 start += port->iobase;
2754                 if (request_region(start, size, "serial-rsa"))
2755                         ret = 0;
2756                 else
2757                         ret = -EBUSY;
2758                 break;
2759         }
2760 
2761         return ret;
2762 }
2763 
2764 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
2765 {
2766         unsigned long offset = UART_RSA_BASE << up->port.regshift;
2767         unsigned int size = 8 << up->port.regshift;
2768         struct uart_port *port = &up->port;
2769 
2770         switch (port->iotype) {
2771         case UPIO_HUB6:
2772         case UPIO_PORT:
2773                 release_region(port->iobase + offset, size);
2774                 break;
2775         }
2776 }
2777 
2778 static void serial8250_release_port(struct uart_port *port)
2779 {
2780         struct uart_8250_port *up = up_to_u8250p(port);
2781 
2782         serial8250_release_std_resource(up);
2783         if (port->type == PORT_RSA)
2784                 serial8250_release_rsa_resource(up);
2785 }
2786 
2787 static int serial8250_request_port(struct uart_port *port)
2788 {
2789         struct uart_8250_port *up = up_to_u8250p(port);
2790         int ret;
2791 
2792         if (port->type == PORT_8250_CIR)
2793                 return -ENODEV;
2794 
2795         ret = serial8250_request_std_resource(up);
2796         if (ret == 0 && port->type == PORT_RSA) {
2797                 ret = serial8250_request_rsa_resource(up);
2798                 if (ret < 0)
2799                         serial8250_release_std_resource(up);
2800         }
2801 
2802         return ret;
2803 }
2804 
2805 static int fcr_get_rxtrig_bytes(struct uart_8250_port *up)
2806 {
2807         const struct serial8250_config *conf_type = &uart_config[up->port.type];
2808         unsigned char bytes;
2809 
2810         bytes = conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(up->fcr)];
2811 
2812         return bytes ? bytes : -EOPNOTSUPP;
2813 }
2814 
2815 static int bytes_to_fcr_rxtrig(struct uart_8250_port *up, unsigned char bytes)
2816 {
2817         const struct serial8250_config *conf_type = &uart_config[up->port.type];
2818         int i;
2819 
2820         if (!conf_type->rxtrig_bytes[UART_FCR_R_TRIG_BITS(UART_FCR_R_TRIG_00)])
2821                 return -EOPNOTSUPP;
2822 
2823         for (i = 1; i < UART_FCR_R_TRIG_MAX_STATE; i++) {
2824                 if (bytes < conf_type->rxtrig_bytes[i])
2825                         /* Use the nearest lower value */
2826                         return (--i) << UART_FCR_R_TRIG_SHIFT;
2827         }
2828 
2829         return UART_FCR_R_TRIG_11;
2830 }
2831 
2832 static int do_get_rxtrig(struct tty_port *port)
2833 {
2834         struct uart_state *state = container_of(port, struct uart_state, port);
2835         struct uart_port *uport = state->uart_port;
2836         struct uart_8250_port *up =
2837                 container_of(uport, struct uart_8250_port, port);
2838 
2839         if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1)
2840                 return -EINVAL;
2841 
2842         return fcr_get_rxtrig_bytes(up);
2843 }
2844 
2845 static int do_serial8250_get_rxtrig(struct tty_port *port)
2846 {
2847         int rxtrig_bytes;
2848 
2849         mutex_lock(&port->mutex);
2850         rxtrig_bytes = do_get_rxtrig(port);
2851         mutex_unlock(&port->mutex);
2852 
2853         return rxtrig_bytes;
2854 }
2855 
2856 static ssize_t serial8250_get_attr_rx_trig_bytes(struct device *dev,
2857         struct device_attribute *attr, char *buf)
2858 {
2859         struct tty_port *port = dev_get_drvdata(dev);
2860         int rxtrig_bytes;
2861 
2862         rxtrig_bytes = do_serial8250_get_rxtrig(port);
2863         if (rxtrig_bytes < 0)
2864                 return rxtrig_bytes;
2865 
2866         return snprintf(buf, PAGE_SIZE, "%d\n", rxtrig_bytes);
2867 }
2868 
2869 static int do_set_rxtrig(struct tty_port *port, unsigned char bytes)
2870 {
2871         struct uart_state *state = container_of(port, struct uart_state, port);
2872         struct uart_port *uport = state->uart_port;
2873         struct uart_8250_port *up =
2874                 container_of(uport, struct uart_8250_port, port);
2875         int rxtrig;
2876 
2877         if (!(up->capabilities & UART_CAP_FIFO) || uport->fifosize <= 1 ||
2878             up->fifo_bug)
2879                 return -EINVAL;
2880 
2881         rxtrig = bytes_to_fcr_rxtrig(up, bytes);
2882         if (rxtrig < 0)
2883                 return rxtrig;
2884 
2885         serial8250_clear_fifos(up);
2886         up->fcr &= ~UART_FCR_TRIGGER_MASK;
2887         up->fcr |= (unsigned char)rxtrig;
2888         serial_out(up, UART_FCR, up->fcr);
2889         return 0;
2890 }
2891 
2892 static int do_serial8250_set_rxtrig(struct tty_port *port, unsigned char bytes)
2893 {
2894         int ret;
2895 
2896         mutex_lock(&port->mutex);
2897         ret = do_set_rxtrig(port, bytes);
2898         mutex_unlock(&port->mutex);
2899 
2900         return ret;
2901 }
2902 
2903 static ssize_t serial8250_set_attr_rx_trig_bytes(struct device *dev,
2904         struct device_attribute *attr, const char *buf, size_t count)
2905 {
2906         struct tty_port *port = dev_get_drvdata(dev);
2907         unsigned char bytes;
2908         int ret;
2909 
2910         if (!count)
2911                 return -EINVAL;
2912 
2913         ret = kstrtou8(buf, 10, &bytes);
2914         if (ret < 0)
2915                 return ret;
2916 
2917         ret = do_serial8250_set_rxtrig(port, bytes);
2918         if (ret < 0)
2919                 return ret;
2920 
2921         return count;
2922 }
2923 
2924 static DEVICE_ATTR(rx_trig_bytes, S_IRUSR | S_IWUSR | S_IRGRP,
2925                    serial8250_get_attr_rx_trig_bytes,
2926                    serial8250_set_attr_rx_trig_bytes);
2927 
2928 static struct attribute *serial8250_dev_attrs[] = {
2929         &dev_attr_rx_trig_bytes.attr,
2930         NULL,
2931         };
2932 
2933 static struct attribute_group serial8250_dev_attr_group = {
2934         .attrs = serial8250_dev_attrs,
2935         };
2936 
2937 static void register_dev_spec_attr_grp(struct uart_8250_port *up)
2938 {
2939         const struct serial8250_config *conf_type = &uart_config[up->port.type];
2940 
2941         if (conf_type->rxtrig_bytes[0])
2942                 up->port.attr_group = &serial8250_dev_attr_group;
2943 }
2944 
2945 static void serial8250_config_port(struct uart_port *port, int flags)
2946 {
2947         struct uart_8250_port *up = up_to_u8250p(port);
2948         int probeflags = PROBE_ANY;
2949         int ret;
2950 
2951         if (port->type == PORT_8250_CIR)
2952                 return;
2953 
2954         /*
2955          * Find the region that we can probe for.  This in turn
2956          * tells us whether we can probe for the type of port.
2957          */
2958         ret = serial8250_request_std_resource(up);
2959         if (ret < 0)
2960                 return;
2961 
2962         ret = serial8250_request_rsa_resource(up);
2963         if (ret < 0)
2964                 probeflags &= ~PROBE_RSA;
2965 
2966         if (port->iotype != up->cur_iotype)
2967                 set_io_from_upio(port);
2968 
2969         if (flags & UART_CONFIG_TYPE)
2970                 autoconfig(up, probeflags);
2971 
2972         /* if access method is AU, it is a 16550 with a quirk */
2973         if (port->type == PORT_16550A && port->iotype == UPIO_AU)
2974                 up->bugs |= UART_BUG_NOMSR;
2975 
2976         /* HW bugs may trigger IRQ while IIR == NO_INT */
2977         if (port->type == PORT_TEGRA)
2978                 up->bugs |= UART_BUG_NOMSR;
2979 
2980         if (port->type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
2981                 autoconfig_irq(up);
2982 
2983         if (port->type != PORT_RSA && probeflags & PROBE_RSA)
2984                 serial8250_release_rsa_resource(up);
2985         if (port->type == PORT_UNKNOWN)
2986                 serial8250_release_std_resource(up);
2987 
2988         /* Fixme: probably not the best place for this */
2989         if ((port->type == PORT_XR17V35X) ||
2990            (port->type == PORT_XR17D15X))
2991                 port->handle_irq = exar_handle_irq;
2992 
2993         register_dev_spec_attr_grp(up);
2994         up->fcr = uart_config[up->port.type].fcr;
2995 }
2996 
2997 static int
2998 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
2999 {
3000         if (ser->irq >= nr_irqs || ser->irq < 0 ||
3001             ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
3002             ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
3003             ser->type == PORT_STARTECH)
3004                 return -EINVAL;
3005         return 0;
3006 }
3007 
3008 static const char *
3009 serial8250_type(struct uart_port *port)
3010 {
3011         int type = port->type;
3012 
3013         if (type >= ARRAY_SIZE(uart_config))
3014                 type = 0;
3015         return uart_config[type].name;
3016 }
3017 
3018 static struct uart_ops serial8250_pops = {
3019         .tx_empty       = serial8250_tx_empty,
3020         .set_mctrl      = serial8250_set_mctrl,
3021         .get_mctrl      = serial8250_get_mctrl,
3022         .stop_tx        = serial8250_stop_tx,
3023         .start_tx       = serial8250_start_tx,
3024         .throttle       = serial8250_throttle,
3025         .unthrottle     = serial8250_unthrottle,
3026         .stop_rx        = serial8250_stop_rx,
3027         .enable_ms      = serial8250_enable_ms,
3028         .break_ctl      = serial8250_break_ctl,
3029         .startup        = serial8250_startup,
3030         .shutdown       = serial8250_shutdown,
3031         .set_termios    = serial8250_set_termios,
3032         .set_ldisc      = serial8250_set_ldisc,
3033         .pm             = serial8250_pm,
3034         .type           = serial8250_type,
3035         .release_port   = serial8250_release_port,
3036         .request_port   = serial8250_request_port,
3037         .config_port    = serial8250_config_port,
3038         .verify_port    = serial8250_verify_port,
3039 #ifdef CONFIG_CONSOLE_POLL
3040         .poll_get_char = serial8250_get_poll_char,
3041         .poll_put_char = serial8250_put_poll_char,
3042 #endif
3043 };
3044 
3045 static struct uart_8250_port serial8250_ports[UART_NR];
3046 
3047 /**
3048  * serial8250_get_port - retrieve struct uart_8250_port
3049  * @line: serial line number
3050  *
3051  * This function retrieves struct uart_8250_port for the specific line.
3052  * This struct *must* *not* be used to perform a 8250 or serial core operation
3053  * which is not accessible otherwise. Its only purpose is to make the struct
3054  * accessible to the runtime-pm callbacks for context suspend/restore.
3055  * The lock assumption made here is none because runtime-pm suspend/resume
3056  * callbacks should not be invoked if there is any operation performed on the
3057  * port.
3058  */
3059 struct uart_8250_port *serial8250_get_port(int line)
3060 {
3061         return &serial8250_ports[line];
3062 }
3063 EXPORT_SYMBOL_GPL(serial8250_get_port);
3064 
3065 static void (*serial8250_isa_config)(int port, struct uart_port *up,
3066         unsigned short *capabilities);
3067 
3068 void serial8250_set_isa_configurator(
3069         void (*v)(int port, struct uart_port *up, unsigned short *capabilities))
3070 {
3071         serial8250_isa_config = v;
3072 }
3073 EXPORT_SYMBOL(serial8250_set_isa_configurator);
3074 
3075 static void __init serial8250_isa_init_ports(void)
3076 {
3077         struct uart_8250_port *up;
3078         static int first = 1;
3079         int i, irqflag = 0;
3080 
3081         if (!first)
3082                 return;
3083         first = 0;
3084 
3085         if (nr_uarts > UART_NR)
3086                 nr_uarts = UART_NR;
3087 
3088         for (i = 0; i < nr_uarts; i++) {
3089                 struct uart_8250_port *up = &serial8250_ports[i];
3090                 struct uart_port *port = &up->port;
3091 
3092                 port->line = i;
3093                 spin_lock_init(&port->lock);
3094 
3095                 init_timer(&up->timer);
3096                 up->timer.function = serial8250_timeout;
3097                 up->cur_iotype = 0xFF;
3098 
3099                 /*
3100                  * ALPHA_KLUDGE_MCR needs to be killed.
3101                  */
3102                 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
3103                 up->mcr_force = ALPHA_KLUDGE_MCR;
3104 
3105                 port->ops = &serial8250_pops;
3106         }
3107 
3108         if (share_irqs)
3109                 irqflag = IRQF_SHARED;
3110 
3111         for (i = 0, up = serial8250_ports;
3112              i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
3113              i++, up++) {
3114                 struct uart_port *port = &up->port;
3115 
3116                 port->iobase   = old_serial_port[i].port;
3117                 port->irq      = irq_canonicalize(old_serial_port[i].irq);
3118                 port->irqflags = old_serial_port[i].irqflags;
3119                 port->uartclk  = old_serial_port[i].baud_base * 16;
3120                 port->flags    = old_serial_port[i].flags;
3121                 port->hub6     = old_serial_port[i].hub6;
3122                 port->membase  = old_serial_port[i].iomem_base;
3123                 port->iotype   = old_serial_port[i].io_type;
3124                 port->regshift = old_serial_port[i].iomem_reg_shift;
3125                 set_io_from_upio(port);
3126                 port->irqflags |= irqflag;
3127                 if (serial8250_isa_config != NULL)
3128                         serial8250_isa_config(i, &up->port, &up->capabilities);
3129 
3130         }
3131 }
3132 
3133 static void
3134 serial8250_init_fixed_type_port(struct uart_8250_port *up, unsigned int type)
3135 {
3136         up->port.type = type;
3137         if (!up->port.fifosize)
3138                 up->port.fifosize = uart_config[type].fifo_size;
3139         if (!up->tx_loadsz)
3140                 up->tx_loadsz = uart_config[type].tx_loadsz;
3141         if (!up->capabilities)
3142                 up->capabilities = uart_config[type].flags;
3143 }
3144 
3145 static void __init
3146 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
3147 {
3148         int i;
3149 
3150         for (i = 0; i < nr_uarts; i++) {
3151                 struct uart_8250_port *up = &serial8250_ports[i];
3152 
3153                 if (up->port.dev)
3154                         continue;
3155 
3156                 up->port.dev = dev;
3157 
3158                 if (up->port.flags & UPF_FIXED_TYPE)
3159                         serial8250_init_fixed_type_port(up, up->port.type);
3160 
3161                 uart_add_one_port(drv, &up->port);
3162         }
3163 }
3164 
3165 #ifdef CONFIG_SERIAL_8250_CONSOLE
3166 
3167 static void serial8250_console_putchar(struct uart_port *port, int ch)
3168 {
3169         struct uart_8250_port *up = up_to_u8250p(port);
3170 
3171         wait_for_xmitr(up, UART_LSR_THRE);
3172         serial_port_out(port, UART_TX, ch);
3173 }
3174 
3175 /*
3176  *      Print a string to the serial port trying not to disturb
3177  *      any possible real use of the port...
3178  *
3179  *      The console_lock must be held when we get here.
3180  */
3181 static void
3182 serial8250_console_write(struct console *co, const char *s, unsigned int count)
3183 {
3184         struct uart_8250_port *up = &serial8250_ports[co->index];
3185         struct uart_port *port = &up->port;
3186         unsigned long flags;
3187         unsigned int ier;
3188         int locked = 1;
3189 
3190         touch_nmi_watchdog();
3191 
3192         serial8250_rpm_get(up);
3193 
3194         if (port->sysrq)
3195                 locked = 0;
3196         else if (oops_in_progress)
3197                 locked = spin_trylock_irqsave(&port->lock, flags);
3198         else
3199                 spin_lock_irqsave(&port->lock, flags);
3200 
3201         /*
3202          *      First save the IER then disable the interrupts
3203          */
3204         ier = serial_port_in(port, UART_IER);
3205 
3206         if (up->capabilities & UART_CAP_UUE)
3207                 serial_port_out(port, UART_IER, UART_IER_UUE);
3208         else
3209                 serial_port_out(port, UART_IER, 0);
3210 
3211         uart_console_write(port, s, count, serial8250_console_putchar);
3212 
3213         /*
3214          *      Finally, wait for transmitter to become empty
3215          *      and restore the IER
3216          */
3217         wait_for_xmitr(up, BOTH_EMPTY);
3218         serial_port_out(port, UART_IER, ier);
3219 
3220         /*
3221          *      The receive handling will happen properly because the
3222          *      receive ready bit will still be set; it is not cleared
3223          *      on read.  However, modem control will not, we must
3224          *      call it if we have saved something in the saved flags
3225          *      while processing with interrupts off.
3226          */
3227         if (up->msr_saved_flags)
3228                 serial8250_modem_status(up);
3229 
3230         if (locked)
3231                 spin_unlock_irqrestore(&port->lock, flags);
3232         serial8250_rpm_put(up);
3233 }
3234 
3235 static int serial8250_console_setup(struct console *co, char *options)
3236 {
3237         struct uart_port *port;
3238         int baud = 9600;
3239         int bits = 8;
3240         int parity = 'n';
3241         int flow = 'n';
3242 
3243         /*
3244          * Check whether an invalid uart number has been specified, and
3245          * if so, search for the first available port that does have
3246          * console support.
3247          */
3248         if (co->index >= nr_uarts)
3249                 co->index = 0;
3250         port = &serial8250_ports[co->index].port;
3251         if (!port->iobase && !port->membase)
3252                 return -ENODEV;
3253 
3254         if (options)
3255                 uart_parse_options(options, &baud, &parity, &bits, &flow);
3256 
3257         return uart_set_options(port, co, baud, parity, bits, flow);
3258 }
3259 
3260 static int serial8250_console_early_setup(void)
3261 {
3262         return serial8250_find_port_for_earlycon();
3263 }
3264 
3265 static struct console serial8250_console = {
3266         .name           = "ttyS",
3267         .write          = serial8250_console_write,
3268         .device         = uart_console_device,
3269         .setup          = serial8250_console_setup,
3270         .early_setup    = serial8250_console_early_setup,
3271         .flags          = CON_PRINTBUFFER | CON_ANYTIME,
3272         .index          = -1,
3273         .data           = &serial8250_reg,
3274 };
3275 
3276 static int __init serial8250_console_init(void)
3277 {
3278         serial8250_isa_init_ports();
3279         register_console(&serial8250_console);
3280         return 0;
3281 }
3282 console_initcall(serial8250_console_init);
3283 
3284 int serial8250_find_port(struct uart_port *p)
3285 {
3286         int line;
3287         struct uart_port *port;
3288 
3289         for (line = 0; line < nr_uarts; line++) {
3290                 port = &serial8250_ports[line].port;
3291                 if (uart_match_port(p, port))
3292                         return line;
3293         }
3294         return -ENODEV;
3295 }
3296 
3297 #define SERIAL8250_CONSOLE      &serial8250_console
3298 #else
3299 #define SERIAL8250_CONSOLE      NULL
3300 #endif
3301 
3302 static struct uart_driver serial8250_reg = {
3303         .owner                  = THIS_MODULE,
3304         .driver_name            = "serial",
3305         .dev_name               = "ttyS",
3306         .major                  = TTY_MAJOR,
3307         .minor                  = 64,
3308         .cons                   = SERIAL8250_CONSOLE,
3309 };
3310 
3311 /*
3312  * early_serial_setup - early registration for 8250 ports
3313  *
3314  * Setup an 8250 port structure prior to console initialisation.  Use
3315  * after console initialisation will cause undefined behaviour.
3316  */
3317 int __init early_serial_setup(struct uart_port *port)
3318 {
3319         struct uart_port *p;
3320 
3321         if (port->line >= ARRAY_SIZE(serial8250_ports))
3322                 return -ENODEV;
3323 
3324         serial8250_isa_init_ports();
3325         p = &serial8250_ports[port->line].port;
3326         p->iobase       = port->iobase;
3327         p->membase      = port->membase;
3328         p->irq          = port->irq;
3329         p->irqflags     = port->irqflags;
3330         p->uartclk      = port->uartclk;
3331         p->fifosize     = port->fifosize;
3332         p->regshift     = port->regshift;
3333         p->iotype       = port->iotype;
3334         p->flags        = port->flags;
3335         p->mapbase      = port->mapbase;
3336         p->private_data = port->private_data;
3337         p->type         = port->type;
3338         p->line         = port->line;
3339 
3340         set_io_from_upio(p);
3341         if (port->serial_in)
3342                 p->serial_in = port->serial_in;
3343         if (port->serial_out)
3344                 p->serial_out = port->serial_out;
3345         if (port->handle_irq)
3346                 p->handle_irq = port->handle_irq;
3347         else
3348                 p->handle_irq = serial8250_default_handle_irq;
3349 
3350         return 0;
3351 }
3352 
3353 /**
3354  *      serial8250_suspend_port - suspend one serial port
3355  *      @line:  serial line number
3356  *
3357  *      Suspend one serial port.
3358  */
3359 void serial8250_suspend_port(int line)
3360 {
3361         uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
3362 }
3363 
3364 /**
3365  *      serial8250_resume_port - resume one serial port
3366  *      @line:  serial line number
3367  *
3368  *      Resume one serial port.
3369  */
3370 void serial8250_resume_port(int line)
3371 {
3372         struct uart_8250_port *up = &serial8250_ports[line];
3373         struct uart_port *port = &up->port;
3374 
3375         if (up->capabilities & UART_NATSEMI) {
3376                 /* Ensure it's still in high speed mode */
3377                 serial_port_out(port, UART_LCR, 0xE0);
3378 
3379                 ns16550a_goto_highspeed(up);
3380 
3381                 serial_port_out(port, UART_LCR, 0);
3382                 port->uartclk = 921600*16;
3383         }
3384         uart_resume_port(&serial8250_reg, port);
3385 }
3386 
3387 /*
3388  * Register a set of serial devices attached to a platform device.  The
3389  * list is terminated with a zero flags entry, which means we expect
3390  * all entries to have at least UPF_BOOT_AUTOCONF set.
3391  */
3392 static int serial8250_probe(struct platform_device *dev)
3393 {
3394         struct plat_serial8250_port *p = dev_get_platdata(&dev->dev);
3395         struct uart_8250_port uart;
3396         int ret, i, irqflag = 0;
3397 
3398         memset(&uart, 0, sizeof(uart));
3399 
3400         if (share_irqs)
3401                 irqflag = IRQF_SHARED;
3402 
3403         for (i = 0; p && p->flags != 0; p++, i++) {
3404                 uart.port.iobase        = p->iobase;
3405                 uart.port.membase       = p->membase;
3406                 uart.port.irq           = p->irq;
3407                 uart.port.irqflags      = p->irqflags;
3408                 uart.port.uartclk       = p->uartclk;
3409                 uart.port.regshift      = p->regshift;
3410                 uart.port.iotype        = p->iotype;
3411                 uart.port.flags         = p->flags;
3412                 uart.port.mapbase       = p->mapbase;
3413                 uart.port.hub6          = p->hub6;
3414                 uart.port.private_data  = p->private_data;
3415                 uart.port.type          = p->type;
3416                 uart.port.serial_in     = p->serial_in;
3417                 uart.port.serial_out    = p->serial_out;
3418                 uart.port.handle_irq    = p->handle_irq;
3419                 uart.port.handle_break  = p->handle_break;
3420                 uart.port.set_termios   = p->set_termios;
3421                 uart.port.pm            = p->pm;
3422                 uart.port.dev           = &dev->dev;
3423                 uart.port.irqflags      |= irqflag;
3424                 ret = serial8250_register_8250_port(&uart);
3425                 if (ret < 0) {
3426                         dev_err(&dev->dev, "unable to register port at index %d "
3427                                 "(IO%lx MEM%llx IRQ%d): %d\n", i,
3428                                 p->iobase, (unsigned long long)p->mapbase,
3429                                 p->irq, ret);
3430                 }
3431         }
3432         return 0;
3433 }
3434 
3435 /*
3436  * Remove serial ports registered against a platform device.
3437  */
3438 static int serial8250_remove(struct platform_device *dev)
3439 {
3440         int i;
3441 
3442         for (i = 0; i < nr_uarts; i++) {
3443                 struct uart_8250_port *up = &serial8250_ports[i];
3444 
3445                 if (up->port.dev == &dev->dev)
3446                         serial8250_unregister_port(i);
3447         }
3448         return 0;
3449 }
3450 
3451 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
3452 {
3453         int i;
3454 
3455         for (i = 0; i < UART_NR; i++) {
3456                 struct uart_8250_port *up = &serial8250_ports[i];
3457 
3458                 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3459                         uart_suspend_port(&serial8250_reg, &up->port);
3460         }
3461 
3462         return 0;
3463 }
3464 
3465 static int serial8250_resume(struct platform_device *dev)
3466 {
3467         int i;
3468 
3469         for (i = 0; i < UART_NR; i++) {
3470                 struct uart_8250_port *up = &serial8250_ports[i];
3471 
3472                 if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
3473                         serial8250_resume_port(i);
3474         }
3475 
3476         return 0;
3477 }
3478 
3479 static struct platform_driver serial8250_isa_driver = {
3480         .probe          = serial8250_probe,
3481         .remove         = serial8250_remove,
3482         .suspend        = serial8250_suspend,
3483         .resume         = serial8250_resume,
3484         .driver         = {
3485                 .name   = "serial8250",
3486         },
3487 };
3488 
3489 /*
3490  * This "device" covers _all_ ISA 8250-compatible serial devices listed
3491  * in the table in include/asm/serial.h
3492  */
3493 static struct platform_device *serial8250_isa_devs;
3494 
3495 /*
3496  * serial8250_register_8250_port and serial8250_unregister_port allows for
3497  * 16x50 serial ports to be configured at run-time, to support PCMCIA
3498  * modems and PCI multiport cards.
3499  */
3500 static DEFINE_MUTEX(serial_mutex);
3501 
3502 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
3503 {
3504         int i;
3505 
3506         /*
3507          * First, find a port entry which matches.
3508          */
3509         for (i = 0; i < nr_uarts; i++)
3510                 if (uart_match_port(&serial8250_ports[i].port, port))
3511                         return &serial8250_ports[i];
3512 
3513         /* try line number first if still available */
3514         i = port->line;
3515         if (i < nr_uarts && serial8250_ports[i].port.type == PORT_UNKNOWN &&
3516                         serial8250_ports[i].port.iobase == 0)
3517                 return &serial8250_ports[i];
3518         /*
3519          * We didn't find a matching entry, so look for the first
3520          * free entry.  We look for one which hasn't been previously
3521          * used (indicated by zero iobase).
3522          */
3523         for (i = 0; i < nr_uarts; i++)
3524                 if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
3525                     serial8250_ports[i].port.iobase == 0)
3526                         return &serial8250_ports[i];
3527 
3528         /*
3529          * That also failed.  Last resort is to find any entry which
3530          * doesn't have a real port associated with it.
3531          */
3532         for (i = 0; i < nr_uarts; i++)
3533                 if (serial8250_ports[i].port.type == PORT_UNKNOWN)
3534                         return &serial8250_ports[i];
3535 
3536         return NULL;
3537 }
3538 
3539 /**
3540  *      serial8250_register_8250_port - register a serial port
3541  *      @up: serial port template
3542  *
3543  *      Configure the serial port specified by the request. If the
3544  *      port exists and is in use, it is hung up and unregistered
3545  *      first.
3546  *
3547  *      The port is then probed and if necessary the IRQ is autodetected
3548  *      If this fails an error is returned.
3549  *
3550  *      On success the port is ready to use and the line number is returned.
3551  */
3552 int serial8250_register_8250_port(struct uart_8250_port *up)
3553 {
3554         struct uart_8250_port *uart;
3555         int ret = -ENOSPC;
3556 
3557         if (up->port.uartclk == 0)
3558                 return -EINVAL;
3559 
3560         mutex_lock(&serial_mutex);
3561 
3562         uart = serial8250_find_match_or_unused(&up->port);
3563         if (uart && uart->port.type != PORT_8250_CIR) {
3564                 if (uart->port.dev)
3565                         uart_remove_one_port(&serial8250_reg, &uart->port);
3566 
3567                 uart->port.iobase       = up->port.iobase;
3568                 uart->port.membase      = up->port.membase;
3569                 uart->port.irq          = up->port.irq;
3570                 uart->port.irqflags     = up->port.irqflags;
3571                 uart->port.uartclk      = up->port.uartclk;
3572                 uart->port.fifosize     = up->port.fifosize;
3573                 uart->port.regshift     = up->port.regshift;
3574                 uart->port.iotype       = up->port.iotype;
3575                 uart->port.flags        = up->port.flags | UPF_BOOT_AUTOCONF;
3576                 uart->bugs              = up->bugs;
3577                 uart->port.mapbase      = up->port.mapbase;
3578                 uart->port.private_data = up->port.private_data;
3579                 uart->port.fifosize     = up->port.fifosize;
3580                 uart->tx_loadsz         = up->tx_loadsz;
3581                 uart->capabilities      = up->capabilities;
3582                 uart->port.throttle     = up->port.throttle;
3583                 uart->port.unthrottle   = up->port.unthrottle;
3584                 uart->port.rs485_config = up->port.rs485_config;
3585                 uart->port.rs485        = up->port.rs485;
3586 
3587                 /* Take tx_loadsz from fifosize if it wasn't set separately */
3588                 if (uart->port.fifosize && !uart->tx_loadsz)
3589                         uart->tx_loadsz = uart->port.fifosize;
3590 
3591                 if (up->port.dev)
3592                         uart->port.dev = up->port.dev;
3593 
3594                 if (up->port.flags & UPF_FIXED_TYPE)
3595                         serial8250_init_fixed_type_port(uart, up->port.type);
3596 
3597                 set_io_from_upio(&uart->port);
3598                 /* Possibly override default I/O functions.  */
3599                 if (up->port.serial_in)
3600                         uart->port.serial_in = up->port.serial_in;
3601                 if (up->port.serial_out)
3602                         uart->port.serial_out = up->port.serial_out;
3603                 if (up->port.handle_irq)
3604                         uart->port.handle_irq = up->port.handle_irq;
3605                 /*  Possibly override set_termios call */
3606                 if (up->port.set_termios)
3607                         uart->port.set_termios = up->port.set_termios;
3608                 if (up->port.startup)
3609                         uart->port.startup = up->port.startup;
3610                 if (up->port.shutdown)
3611                         uart->port.shutdown = up->port.shutdown;
3612                 if (up->port.pm)
3613                         uart->port.pm = up->port.pm;
3614                 if (up->port.handle_break)
3615                         uart->port.handle_break = up->port.handle_break;
3616                 if (up->dl_read)
3617                         uart->dl_read = up->dl_read;
3618                 if (up->dl_write)
3619                         uart->dl_write = up->dl_write;
3620                 if (up->dma) {
3621                         uart->dma = up->dma;
3622                         if (!uart->dma->tx_dma)
3623                                 uart->dma->tx_dma = serial8250_tx_dma;
3624                         if (!uart->dma->rx_dma)
3625                                 uart->dma->rx_dma = serial8250_rx_dma;
3626                 }
3627 
3628                 if (serial8250_isa_config != NULL)
3629                         serial8250_isa_config(0, &uart->port,
3630                                         &uart->capabilities);
3631 
3632                 ret = uart_add_one_port(&serial8250_reg, &uart->port);
3633                 if (ret == 0)
3634                         ret = uart->port.line;
3635         }
3636         mutex_unlock(&serial_mutex);
3637 
3638         return ret;
3639 }
3640 EXPORT_SYMBOL(serial8250_register_8250_port);
3641 
3642 /**
3643  *      serial8250_unregister_port - remove a 16x50 serial port at runtime
3644  *      @line: serial line number
3645  *
3646  *      Remove one serial port.  This may not be called from interrupt
3647  *      context.  We hand the port back to the our control.
3648  */
3649 void serial8250_unregister_port(int line)
3650 {
3651         struct uart_8250_port *uart = &serial8250_ports[line];
3652 
3653         mutex_lock(&serial_mutex);
3654         uart_remove_one_port(&serial8250_reg, &uart->port);
3655         if (serial8250_isa_devs) {
3656                 uart->port.flags &= ~UPF_BOOT_AUTOCONF;
3657                 uart->port.type = PORT_UNKNOWN;
3658                 uart->port.dev = &serial8250_isa_devs->dev;
3659                 uart->capabilities = uart_config[uart->port.type].flags;
3660                 uart_add_one_port(&serial8250_reg, &uart->port);
3661         } else {
3662                 uart->port.dev = NULL;
3663         }
3664         mutex_unlock(&serial_mutex);
3665 }
3666 EXPORT_SYMBOL(serial8250_unregister_port);
3667 
3668 static int __init serial8250_init(void)
3669 {
3670         int ret;
3671 
3672         serial8250_isa_init_ports();
3673 
3674         printk(KERN_INFO "Serial: 8250/16550 driver, "
3675                 "%d ports, IRQ sharing %sabled\n", nr_uarts,
3676                 share_irqs ? "en" : "dis");
3677 
3678 #ifdef CONFIG_SPARC
3679         ret = sunserial_register_minors(&serial8250_reg, UART_NR);
3680 #else
3681         serial8250_reg.nr = UART_NR;
3682         ret = uart_register_driver(&serial8250_reg);
3683 #endif
3684         if (ret)
3685                 goto out;
3686 
3687         ret = serial8250_pnp_init();
3688         if (ret)
3689                 goto unreg_uart_drv;
3690 
3691         serial8250_isa_devs = platform_device_alloc("serial8250",
3692                                                     PLAT8250_DEV_LEGACY);
3693         if (!serial8250_isa_devs) {
3694                 ret = -ENOMEM;
3695                 goto unreg_pnp;
3696         }
3697 
3698         ret = platform_device_add(serial8250_isa_devs);
3699         if (ret)
3700                 goto put_dev;
3701 
3702         serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
3703 
3704         ret = platform_driver_register(&serial8250_isa_driver);
3705         if (ret == 0)
3706                 goto out;
3707 
3708         platform_device_del(serial8250_isa_devs);
3709 put_dev:
3710         platform_device_put(serial8250_isa_devs);
3711 unreg_pnp:
3712         serial8250_pnp_exit();
3713 unreg_uart_drv:
3714 #ifdef CONFIG_SPARC
3715         sunserial_unregister_minors(&serial8250_reg, UART_NR);
3716 #else
3717         uart_unregister_driver(&serial8250_reg);
3718 #endif
3719 out:
3720         return ret;
3721 }
3722 
3723 static void __exit serial8250_exit(void)
3724 {
3725         struct platform_device *isa_dev = serial8250_isa_devs;
3726 
3727         /*
3728          * This tells serial8250_unregister_port() not to re-register
3729          * the ports (thereby making serial8250_isa_driver permanently
3730          * in use.)
3731          */
3732         serial8250_isa_devs = NULL;
3733 
3734         platform_driver_unregister(&serial8250_isa_driver);
3735         platform_device_unregister(isa_dev);
3736 
3737         serial8250_pnp_exit();
3738 
3739 #ifdef CONFIG_SPARC
3740         sunserial_unregister_minors(&serial8250_reg, UART_NR);
3741 #else
3742         uart_unregister_driver(&serial8250_reg);
3743 #endif
3744 }
3745 
3746 module_init(serial8250_init);
3747 module_exit(serial8250_exit);
3748 
3749 EXPORT_SYMBOL(serial8250_suspend_port);
3750 EXPORT_SYMBOL(serial8250_resume_port);
3751 
3752 MODULE_LICENSE("GPL");
3753 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
3754 
3755 module_param(share_irqs, uint, 0644);
3756 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
3757         " (unsafe)");
3758 
3759 module_param(nr_uarts, uint, 0644);
3760 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
3761 
3762 module_param(skip_txen_test, uint, 0644);
3763 MODULE_PARM_DESC(skip_txen_test, "Skip checking for the TXEN bug at init time");
3764 
3765 #ifdef CONFIG_SERIAL_8250_RSA
3766 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
3767 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
3768 #endif
3769 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);
3770 
3771 #ifdef CONFIG_SERIAL_8250_DEPRECATED_OPTIONS
3772 #ifndef MODULE
3773 /* This module was renamed to 8250_core in 3.7.  Keep the old "8250" name
3774  * working as well for the module options so we don't break people.  We
3775  * need to keep the names identical and the convenient macros will happily
3776  * refuse to let us do that by failing the build with redefinition errors
3777  * of global variables.  So we stick them inside a dummy function to avoid
3778  * those conflicts.  The options still get parsed, and the redefined
3779  * MODULE_PARAM_PREFIX lets us keep the "8250." syntax alive.
3780  *
3781  * This is hacky.  I'm sorry.
3782  */
3783 static void __used s8250_options(void)
3784 {
3785 #undef MODULE_PARAM_PREFIX
3786 #define MODULE_PARAM_PREFIX "8250_core."
3787 
3788         module_param_cb(share_irqs, &param_ops_uint, &share_irqs, 0644);
3789         module_param_cb(nr_uarts, &param_ops_uint, &nr_uarts, 0644);
3790         module_param_cb(skip_txen_test, &param_ops_uint, &skip_txen_test, 0644);
3791 #ifdef CONFIG_SERIAL_8250_RSA
3792         __module_param_call(MODULE_PARAM_PREFIX, probe_rsa,
3793                 &param_array_ops, .arr = &__param_arr_probe_rsa,
3794                 0444, -1, 0);
3795 #endif
3796 }
3797 #else
3798 MODULE_ALIAS("8250_core");
3799 #endif
3800 #endif
3801 

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