Version:  2.0.40 2.2.26 2.4.37 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17

Linux/drivers/staging/media/lirc/lirc_sir.c

  1 /*
  2  * LIRC SIR driver, (C) 2000 Milan Pikula <www@fornax.sk>
  3  *
  4  * lirc_sir - Device driver for use with SIR (serial infra red)
  5  * mode of IrDA on many notebooks.
  6  *
  7  *  This program is free software; you can redistribute it and/or modify
  8  *  it under the terms of the GNU General Public License as published by
  9  *  the Free Software Foundation; either version 2 of the License, or
 10  *  (at your option) any later version.
 11  *
 12  *  This program is distributed in the hope that it will be useful,
 13  *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 14  *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 15  *  GNU General Public License for more details.
 16  *
 17  *  You should have received a copy of the GNU General Public License
 18  *  along with this program; if not, write to the Free Software
 19  *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 20  *
 21  *
 22  * 2000/09/16 Frank Przybylski <mail@frankprzybylski.de> :
 23  *  added timeout and relaxed pulse detection, removed gap bug
 24  *
 25  * 2000/12/15 Christoph Bartelmus <lirc@bartelmus.de> :
 26  *   added support for Tekram Irmate 210 (sending does not work yet,
 27  *   kind of disappointing that nobody was able to implement that
 28  *   before),
 29  *   major clean-up
 30  *
 31  * 2001/02/27 Christoph Bartelmus <lirc@bartelmus.de> :
 32  *   added support for StrongARM SA1100 embedded microprocessor
 33  *   parts cut'n'pasted from sa1100_ir.c (C) 2000 Russell King
 34  */
 35 
 36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 37 
 38 #include <linux/module.h>
 39 #include <linux/sched.h>
 40 #include <linux/errno.h>
 41 #include <linux/signal.h>
 42 #include <linux/fs.h>
 43 #include <linux/interrupt.h>
 44 #include <linux/ioport.h>
 45 #include <linux/kernel.h>
 46 #include <linux/serial_reg.h>
 47 #include <linux/time.h>
 48 #include <linux/string.h>
 49 #include <linux/types.h>
 50 #include <linux/wait.h>
 51 #include <linux/mm.h>
 52 #include <linux/delay.h>
 53 #include <linux/poll.h>
 54 #include <linux/io.h>
 55 #include <asm/irq.h>
 56 #include <linux/fcntl.h>
 57 #include <linux/platform_device.h>
 58 
 59 #include <linux/timer.h>
 60 
 61 #include <media/lirc.h>
 62 #include <media/lirc_dev.h>
 63 
 64 /* SECTION: Definitions */
 65 
 66 /*** Tekram dongle ***/
 67 #ifdef LIRC_SIR_TEKRAM
 68 /* stolen from kernel source */
 69 /* definitions for Tekram dongle */
 70 #define TEKRAM_115200 0x00
 71 #define TEKRAM_57600  0x01
 72 #define TEKRAM_38400  0x02
 73 #define TEKRAM_19200  0x03
 74 #define TEKRAM_9600   0x04
 75 #define TEKRAM_2400   0x08
 76 
 77 #define TEKRAM_PW 0x10 /* Pulse select bit */
 78 
 79 /* 10bit * 1s/115200bit in milliseconds = 87ms*/
 80 #define TIME_CONST (10000000ul/115200ul)
 81 
 82 #endif
 83 
 84 #ifdef LIRC_SIR_ACTISYS_ACT200L
 85 static void init_act200(void);
 86 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
 87 static void init_act220(void);
 88 #endif
 89 
 90 #define RBUF_LEN 1024
 91 #define WBUF_LEN 1024
 92 
 93 #define LIRC_DRIVER_NAME "lirc_sir"
 94 
 95 #define PULSE '['
 96 
 97 #ifndef LIRC_SIR_TEKRAM
 98 /* 9bit * 1s/115200bit in milli seconds = 78.125ms*/
 99 #define TIME_CONST (9000000ul/115200ul)
100 #endif
101 
102 
103 /* timeout for sequences in jiffies (=5/100s), must be longer than TIME_CONST */
104 #define SIR_TIMEOUT     (HZ*5/100)
105 
106 #ifndef LIRC_ON_SA1100
107 #ifndef LIRC_IRQ
108 #define LIRC_IRQ 4
109 #endif
110 #ifndef LIRC_PORT
111 /* for external dongles, default to com1 */
112 #if defined(LIRC_SIR_ACTISYS_ACT200L)         || \
113             defined(LIRC_SIR_ACTISYS_ACT220L) || \
114             defined(LIRC_SIR_TEKRAM)
115 #define LIRC_PORT 0x3f8
116 #else
117 /* onboard sir ports are typically com3 */
118 #define LIRC_PORT 0x3e8
119 #endif
120 #endif
121 
122 static int io = LIRC_PORT;
123 static int irq = LIRC_IRQ;
124 static int threshold = 3;
125 #endif
126 
127 static DEFINE_SPINLOCK(timer_lock);
128 static struct timer_list timerlist;
129 /* time of last signal change detected */
130 static struct timeval last_tv = {0, 0};
131 /* time of last UART data ready interrupt */
132 static struct timeval last_intr_tv = {0, 0};
133 static int last_value;
134 
135 static DECLARE_WAIT_QUEUE_HEAD(lirc_read_queue);
136 
137 static DEFINE_SPINLOCK(hardware_lock);
138 
139 static int rx_buf[RBUF_LEN];
140 static unsigned int rx_tail, rx_head;
141 
142 static bool debug;
143 #define dprintk(fmt, args...)                                           \
144         do {                                                            \
145                 if (debug)                                              \
146                         printk(KERN_DEBUG LIRC_DRIVER_NAME ": "         \
147                                 fmt, ## args);                          \
148         } while (0)
149 
150 /* SECTION: Prototypes */
151 
152 /* Communication with user-space */
153 static unsigned int lirc_poll(struct file *file, poll_table *wait);
154 static ssize_t lirc_read(struct file *file, char __user *buf, size_t count,
155                          loff_t *ppos);
156 static ssize_t lirc_write(struct file *file, const char __user *buf, size_t n,
157                           loff_t *pos);
158 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg);
159 static void add_read_queue(int flag, unsigned long val);
160 static int init_chrdev(void);
161 static void drop_chrdev(void);
162 /* Hardware */
163 static irqreturn_t sir_interrupt(int irq, void *dev_id);
164 static void send_space(unsigned long len);
165 static void send_pulse(unsigned long len);
166 static int init_hardware(void);
167 static void drop_hardware(void);
168 /* Initialisation */
169 static int init_port(void);
170 static void drop_port(void);
171 
172 static inline unsigned int sinp(int offset)
173 {
174         return inb(io + offset);
175 }
176 
177 static inline void soutp(int offset, int value)
178 {
179         outb(value, io + offset);
180 }
181 
182 #ifndef MAX_UDELAY_MS
183 #define MAX_UDELAY_US 5000
184 #else
185 #define MAX_UDELAY_US (MAX_UDELAY_MS*1000)
186 #endif
187 
188 static void safe_udelay(unsigned long usecs)
189 {
190         while (usecs > MAX_UDELAY_US) {
191                 udelay(MAX_UDELAY_US);
192                 usecs -= MAX_UDELAY_US;
193         }
194         udelay(usecs);
195 }
196 
197 /* SECTION: Communication with user-space */
198 
199 static unsigned int lirc_poll(struct file *file, poll_table *wait)
200 {
201         poll_wait(file, &lirc_read_queue, wait);
202         if (rx_head != rx_tail)
203                 return POLLIN | POLLRDNORM;
204         return 0;
205 }
206 
207 static ssize_t lirc_read(struct file *file, char __user *buf, size_t count,
208                          loff_t *ppos)
209 {
210         int n = 0;
211         int retval = 0;
212         DECLARE_WAITQUEUE(wait, current);
213 
214         if (count % sizeof(int))
215                 return -EINVAL;
216 
217         add_wait_queue(&lirc_read_queue, &wait);
218         set_current_state(TASK_INTERRUPTIBLE);
219         while (n < count) {
220                 if (rx_head != rx_tail) {
221                         if (copy_to_user(buf + n,
222                                          rx_buf + rx_head,
223                                          sizeof(int))) {
224                                 retval = -EFAULT;
225                                 break;
226                         }
227                         rx_head = (rx_head + 1) & (RBUF_LEN - 1);
228                         n += sizeof(int);
229                 } else {
230                         if (file->f_flags & O_NONBLOCK) {
231                                 retval = -EAGAIN;
232                                 break;
233                         }
234                         if (signal_pending(current)) {
235                                 retval = -ERESTARTSYS;
236                                 break;
237                         }
238                         schedule();
239                         set_current_state(TASK_INTERRUPTIBLE);
240                 }
241         }
242         remove_wait_queue(&lirc_read_queue, &wait);
243         set_current_state(TASK_RUNNING);
244         return n ? n : retval;
245 }
246 static ssize_t lirc_write(struct file *file, const char __user *buf, size_t n,
247                           loff_t *pos)
248 {
249         unsigned long flags;
250         int i, count;
251         int *tx_buf;
252 
253         count = n / sizeof(int);
254         if (n % sizeof(int) || count % 2 == 0)
255                 return -EINVAL;
256         tx_buf = memdup_user(buf, n);
257         if (IS_ERR(tx_buf))
258                 return PTR_ERR(tx_buf);
259         i = 0;
260         local_irq_save(flags);
261         while (1) {
262                 if (i >= count)
263                         break;
264                 if (tx_buf[i])
265                         send_pulse(tx_buf[i]);
266                 i++;
267                 if (i >= count)
268                         break;
269                 if (tx_buf[i])
270                         send_space(tx_buf[i]);
271                 i++;
272         }
273         local_irq_restore(flags);
274         kfree(tx_buf);
275         return count;
276 }
277 
278 static long lirc_ioctl(struct file *filep, unsigned int cmd, unsigned long arg)
279 {
280         u32 __user *uptr = (u32 __user *)arg;
281         int retval = 0;
282         u32 value = 0;
283         if (cmd == LIRC_GET_FEATURES)
284                 value = LIRC_CAN_SEND_PULSE | LIRC_CAN_REC_MODE2;
285         else if (cmd == LIRC_GET_SEND_MODE)
286                 value = LIRC_MODE_PULSE;
287         else if (cmd == LIRC_GET_REC_MODE)
288                 value = LIRC_MODE_MODE2;
289 
290         switch (cmd) {
291         case LIRC_GET_FEATURES:
292         case LIRC_GET_SEND_MODE:
293         case LIRC_GET_REC_MODE:
294                 retval = put_user(value, uptr);
295                 break;
296 
297         case LIRC_SET_SEND_MODE:
298         case LIRC_SET_REC_MODE:
299                 retval = get_user(value, uptr);
300                 break;
301         default:
302                 retval = -ENOIOCTLCMD;
303 
304         }
305 
306         if (retval)
307                 return retval;
308         if (cmd == LIRC_SET_REC_MODE) {
309                 if (value != LIRC_MODE_MODE2)
310                         retval = -ENOSYS;
311         } else if (cmd == LIRC_SET_SEND_MODE) {
312                 if (value != LIRC_MODE_PULSE)
313                         retval = -ENOSYS;
314         }
315 
316         return retval;
317 }
318 
319 static void add_read_queue(int flag, unsigned long val)
320 {
321         unsigned int new_rx_tail;
322         int newval;
323 
324         dprintk("add flag %d with val %lu\n", flag, val);
325 
326         newval = val & PULSE_MASK;
327 
328         /*
329          * statistically, pulses are ~TIME_CONST/2 too long. we could
330          * maybe make this more exact, but this is good enough
331          */
332         if (flag) {
333                 /* pulse */
334                 if (newval > TIME_CONST/2)
335                         newval -= TIME_CONST/2;
336                 else /* should not ever happen */
337                         newval = 1;
338                 newval |= PULSE_BIT;
339         } else {
340                 newval += TIME_CONST/2;
341         }
342         new_rx_tail = (rx_tail + 1) & (RBUF_LEN - 1);
343         if (new_rx_tail == rx_head) {
344                 dprintk("Buffer overrun.\n");
345                 return;
346         }
347         rx_buf[rx_tail] = newval;
348         rx_tail = new_rx_tail;
349         wake_up_interruptible(&lirc_read_queue);
350 }
351 
352 static const struct file_operations lirc_fops = {
353         .owner          = THIS_MODULE,
354         .read           = lirc_read,
355         .write          = lirc_write,
356         .poll           = lirc_poll,
357         .unlocked_ioctl = lirc_ioctl,
358 #ifdef CONFIG_COMPAT
359         .compat_ioctl   = lirc_ioctl,
360 #endif
361         .open           = lirc_dev_fop_open,
362         .release        = lirc_dev_fop_close,
363         .llseek         = no_llseek,
364 };
365 
366 static int set_use_inc(void *data)
367 {
368         return 0;
369 }
370 
371 static void set_use_dec(void *data)
372 {
373 }
374 
375 static struct lirc_driver driver = {
376         .name           = LIRC_DRIVER_NAME,
377         .minor          = -1,
378         .code_length    = 1,
379         .sample_rate    = 0,
380         .data           = NULL,
381         .add_to_buf     = NULL,
382         .set_use_inc    = set_use_inc,
383         .set_use_dec    = set_use_dec,
384         .fops           = &lirc_fops,
385         .dev            = NULL,
386         .owner          = THIS_MODULE,
387 };
388 
389 static struct platform_device *lirc_sir_dev;
390 
391 static int init_chrdev(void)
392 {
393         driver.dev = &lirc_sir_dev->dev;
394         driver.minor = lirc_register_driver(&driver);
395         if (driver.minor < 0) {
396                 pr_err("init_chrdev() failed.\n");
397                 return -EIO;
398         }
399         return 0;
400 }
401 
402 static void drop_chrdev(void)
403 {
404         lirc_unregister_driver(driver.minor);
405 }
406 
407 /* SECTION: Hardware */
408 static long delta(struct timeval *tv1, struct timeval *tv2)
409 {
410         unsigned long deltv;
411 
412         deltv = tv2->tv_sec - tv1->tv_sec;
413         if (deltv > 15)
414                 deltv = 0xFFFFFF;
415         else
416                 deltv = deltv*1000000 +
417                         tv2->tv_usec -
418                         tv1->tv_usec;
419         return deltv;
420 }
421 
422 static void sir_timeout(unsigned long data)
423 {
424         /*
425          * if last received signal was a pulse, but receiving stopped
426          * within the 9 bit frame, we need to finish this pulse and
427          * simulate a signal change to from pulse to space. Otherwise
428          * upper layers will receive two sequences next time.
429          */
430 
431         unsigned long flags;
432         unsigned long pulse_end;
433 
434         /* avoid interference with interrupt */
435         spin_lock_irqsave(&timer_lock, flags);
436         if (last_value) {
437                 /* clear unread bits in UART and restart */
438                 outb(UART_FCR_CLEAR_RCVR, io + UART_FCR);
439                 /* determine 'virtual' pulse end: */
440                 pulse_end = delta(&last_tv, &last_intr_tv);
441                 dprintk("timeout add %d for %lu usec\n", last_value, pulse_end);
442                 add_read_queue(last_value, pulse_end);
443                 last_value = 0;
444                 last_tv = last_intr_tv;
445         }
446         spin_unlock_irqrestore(&timer_lock, flags);
447 }
448 
449 static irqreturn_t sir_interrupt(int irq, void *dev_id)
450 {
451         unsigned char data;
452         struct timeval curr_tv;
453         static unsigned long deltv;
454         unsigned long deltintrtv;
455         unsigned long flags;
456         int iir, lsr;
457 
458         while ((iir = inb(io + UART_IIR) & UART_IIR_ID)) {
459                 switch (iir&UART_IIR_ID) { /* FIXME toto treba preriedit */
460                 case UART_IIR_MSI:
461                         (void) inb(io + UART_MSR);
462                         break;
463                 case UART_IIR_RLSI:
464                         (void) inb(io + UART_LSR);
465                         break;
466                 case UART_IIR_THRI:
467 #if 0
468                         if (lsr & UART_LSR_THRE) /* FIFO is empty */
469                                 outb(data, io + UART_TX)
470 #endif
471                         break;
472                 case UART_IIR_RDI:
473                         /* avoid interference with timer */
474                         spin_lock_irqsave(&timer_lock, flags);
475                         do {
476                                 del_timer(&timerlist);
477                                 data = inb(io + UART_RX);
478                                 do_gettimeofday(&curr_tv);
479                                 deltv = delta(&last_tv, &curr_tv);
480                                 deltintrtv = delta(&last_intr_tv, &curr_tv);
481                                 dprintk("t %lu, d %d\n", deltintrtv, (int)data);
482                                 /*
483                                  * if nothing came in last X cycles,
484                                  * it was gap
485                                  */
486                                 if (deltintrtv > TIME_CONST * threshold) {
487                                         if (last_value) {
488                                                 dprintk("GAP\n");
489                                                 /* simulate signal change */
490                                                 add_read_queue(last_value,
491                                                                deltv -
492                                                                deltintrtv);
493                                                 last_value = 0;
494                                                 last_tv.tv_sec =
495                                                         last_intr_tv.tv_sec;
496                                                 last_tv.tv_usec =
497                                                         last_intr_tv.tv_usec;
498                                                 deltv = deltintrtv;
499                                         }
500                                 }
501                                 data = 1;
502                                 if (data ^ last_value) {
503                                         /*
504                                          * deltintrtv > 2*TIME_CONST, remember?
505                                          * the other case is timeout
506                                          */
507                                         add_read_queue(last_value,
508                                                        deltv-TIME_CONST);
509                                         last_value = data;
510                                         last_tv = curr_tv;
511                                         if (last_tv.tv_usec >= TIME_CONST) {
512                                                 last_tv.tv_usec -= TIME_CONST;
513                                         } else {
514                                                 last_tv.tv_sec--;
515                                                 last_tv.tv_usec += 1000000 -
516                                                         TIME_CONST;
517                                         }
518                                 }
519                                 last_intr_tv = curr_tv;
520                                 if (data) {
521                                         /*
522                                          * start timer for end of
523                                          * sequence detection
524                                          */
525                                         timerlist.expires = jiffies +
526                                                                 SIR_TIMEOUT;
527                                         add_timer(&timerlist);
528                                 }
529 
530                                 lsr = inb(io + UART_LSR);
531                         } while (lsr & UART_LSR_DR); /* data ready */
532                         spin_unlock_irqrestore(&timer_lock, flags);
533                         break;
534                 default:
535                         break;
536                 }
537         }
538         return IRQ_RETVAL(IRQ_HANDLED);
539 }
540 
541 static void send_space(unsigned long len)
542 {
543         safe_udelay(len);
544 }
545 
546 static void send_pulse(unsigned long len)
547 {
548         long bytes_out = len / TIME_CONST;
549 
550         if (bytes_out == 0)
551                 bytes_out++;
552 
553         while (bytes_out--) {
554                 outb(PULSE, io + UART_TX);
555                 /* FIXME treba seriozne cakanie z char/serial.c */
556                 while (!(inb(io + UART_LSR) & UART_LSR_THRE))
557                         ;
558         }
559 }
560 
561 static int init_hardware(void)
562 {
563         unsigned long flags;
564 
565         spin_lock_irqsave(&hardware_lock, flags);
566         /* reset UART */
567 #if defined(LIRC_SIR_TEKRAM)
568         /* disable FIFO */
569         soutp(UART_FCR,
570               UART_FCR_CLEAR_RCVR|
571               UART_FCR_CLEAR_XMIT|
572               UART_FCR_TRIGGER_1);
573 
574         /* Set DLAB 0. */
575         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
576 
577         /* First of all, disable all interrupts */
578         soutp(UART_IER, sinp(UART_IER) &
579               (~(UART_IER_MSI|UART_IER_RLSI|UART_IER_THRI|UART_IER_RDI)));
580 
581         /* Set DLAB 1. */
582         soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
583 
584         /* Set divisor to 12 => 9600 Baud */
585         soutp(UART_DLM, 0);
586         soutp(UART_DLL, 12);
587 
588         /* Set DLAB 0. */
589         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
590 
591         /* power supply */
592         soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
593         safe_udelay(50*1000);
594 
595         /* -DTR low -> reset PIC */
596         soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
597         udelay(1*1000);
598 
599         soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
600         udelay(100);
601 
602 
603         /* -RTS low -> send control byte */
604         soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
605         udelay(7);
606         soutp(UART_TX, TEKRAM_115200|TEKRAM_PW);
607 
608         /* one byte takes ~1042 usec to transmit at 9600,8N1 */
609         udelay(1500);
610 
611         /* back to normal operation */
612         soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
613         udelay(50);
614 
615         udelay(1500);
616 
617         /* read previous control byte */
618         pr_info("0x%02x\n", sinp(UART_RX));
619 
620         /* Set DLAB 1. */
621         soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
622 
623         /* Set divisor to 1 => 115200 Baud */
624         soutp(UART_DLM, 0);
625         soutp(UART_DLL, 1);
626 
627         /* Set DLAB 0, 8 Bit */
628         soutp(UART_LCR, UART_LCR_WLEN8);
629         /* enable interrupts */
630         soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
631 #else
632         outb(0, io + UART_MCR);
633         outb(0, io + UART_IER);
634         /* init UART */
635         /* set DLAB, speed = 115200 */
636         outb(UART_LCR_DLAB | UART_LCR_WLEN7, io + UART_LCR);
637         outb(1, io + UART_DLL); outb(0, io + UART_DLM);
638         /* 7N1+start = 9 bits at 115200 ~ 3 bits at 44000 */
639         outb(UART_LCR_WLEN7, io + UART_LCR);
640         /* FIFO operation */
641         outb(UART_FCR_ENABLE_FIFO, io + UART_FCR);
642         /* interrupts */
643         /* outb(UART_IER_RLSI|UART_IER_RDI|UART_IER_THRI, io + UART_IER); */
644         outb(UART_IER_RDI, io + UART_IER);
645         /* turn on UART */
646         outb(UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2, io + UART_MCR);
647 #ifdef LIRC_SIR_ACTISYS_ACT200L
648         init_act200();
649 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
650         init_act220();
651 #endif
652 #endif
653         spin_unlock_irqrestore(&hardware_lock, flags);
654         return 0;
655 }
656 
657 static void drop_hardware(void)
658 {
659         unsigned long flags;
660 
661         spin_lock_irqsave(&hardware_lock, flags);
662 
663         /* turn off interrupts */
664         outb(0, io + UART_IER);
665 
666         spin_unlock_irqrestore(&hardware_lock, flags);
667 }
668 
669 /* SECTION: Initialisation */
670 
671 static int init_port(void)
672 {
673         int retval;
674 
675         /* get I/O port access and IRQ line */
676         if (request_region(io, 8, LIRC_DRIVER_NAME) == NULL) {
677                 pr_err("i/o port 0x%.4x already in use.\n", io);
678                 return -EBUSY;
679         }
680         retval = request_irq(irq, sir_interrupt, 0,
681                              LIRC_DRIVER_NAME, NULL);
682         if (retval < 0) {
683                 release_region(io, 8);
684                 pr_err("IRQ %d already in use.\n", irq);
685                 return retval;
686         }
687         pr_info("I/O port 0x%.4x, IRQ %d.\n", io, irq);
688 
689         init_timer(&timerlist);
690         timerlist.function = sir_timeout;
691         timerlist.data = 0xabadcafe;
692 
693         return 0;
694 }
695 
696 static void drop_port(void)
697 {
698         free_irq(irq, NULL);
699         del_timer_sync(&timerlist);
700         release_region(io, 8);
701 }
702 
703 #ifdef LIRC_SIR_ACTISYS_ACT200L
704 /* Crystal/Cirrus CS8130 IR transceiver, used in Actisys Act200L dongle */
705 /* some code borrowed from Linux IRDA driver */
706 
707 /* Register 0: Control register #1 */
708 #define ACT200L_REG0    0x00
709 #define ACT200L_TXEN    0x01 /* Enable transmitter */
710 #define ACT200L_RXEN    0x02 /* Enable receiver */
711 #define ACT200L_ECHO    0x08 /* Echo control chars */
712 
713 /* Register 1: Control register #2 */
714 #define ACT200L_REG1    0x10
715 #define ACT200L_LODB    0x01 /* Load new baud rate count value */
716 #define ACT200L_WIDE    0x04 /* Expand the maximum allowable pulse */
717 
718 /* Register 3: Transmit mode register #2 */
719 #define ACT200L_REG3    0x30
720 #define ACT200L_B0      0x01 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P)  */
721 #define ACT200L_B1      0x02 /* DataBits, 0=6, 1=7, 2=8, 3=9(8P)  */
722 #define ACT200L_CHSY    0x04 /* StartBit Synced 0=bittime, 1=startbit */
723 
724 /* Register 4: Output Power register */
725 #define ACT200L_REG4    0x40
726 #define ACT200L_OP0     0x01 /* Enable LED1C output */
727 #define ACT200L_OP1     0x02 /* Enable LED2C output */
728 #define ACT200L_BLKR    0x04
729 
730 /* Register 5: Receive Mode register */
731 #define ACT200L_REG5    0x50
732 #define ACT200L_RWIDL   0x01 /* fixed 1.6us pulse mode */
733     /*.. other various IRDA bit modes, and TV remote modes..*/
734 
735 /* Register 6: Receive Sensitivity register #1 */
736 #define ACT200L_REG6    0x60
737 #define ACT200L_RS0     0x01 /* receive threshold bit 0 */
738 #define ACT200L_RS1     0x02 /* receive threshold bit 1 */
739 
740 /* Register 7: Receive Sensitivity register #2 */
741 #define ACT200L_REG7    0x70
742 #define ACT200L_ENPOS   0x04 /* Ignore the falling edge */
743 
744 /* Register 8,9: Baud Rate Divider register #1,#2 */
745 #define ACT200L_REG8    0x80
746 #define ACT200L_REG9    0x90
747 
748 #define ACT200L_2400    0x5f
749 #define ACT200L_9600    0x17
750 #define ACT200L_19200   0x0b
751 #define ACT200L_38400   0x05
752 #define ACT200L_57600   0x03
753 #define ACT200L_115200  0x01
754 
755 /* Register 13: Control register #3 */
756 #define ACT200L_REG13   0xd0
757 #define ACT200L_SHDW    0x01 /* Enable access to shadow registers */
758 
759 /* Register 15: Status register */
760 #define ACT200L_REG15   0xf0
761 
762 /* Register 21: Control register #4 */
763 #define ACT200L_REG21   0x50
764 #define ACT200L_EXCK    0x02 /* Disable clock output driver */
765 #define ACT200L_OSCL    0x04 /* oscillator in low power, medium accuracy mode */
766 
767 static void init_act200(void)
768 {
769         int i;
770         __u8 control[] = {
771                 ACT200L_REG15,
772                 ACT200L_REG13 | ACT200L_SHDW,
773                 ACT200L_REG21 | ACT200L_EXCK | ACT200L_OSCL,
774                 ACT200L_REG13,
775                 ACT200L_REG7  | ACT200L_ENPOS,
776                 ACT200L_REG6  | ACT200L_RS0  | ACT200L_RS1,
777                 ACT200L_REG5  | ACT200L_RWIDL,
778                 ACT200L_REG4  | ACT200L_OP0  | ACT200L_OP1 | ACT200L_BLKR,
779                 ACT200L_REG3  | ACT200L_B0,
780                 ACT200L_REG0  | ACT200L_TXEN | ACT200L_RXEN,
781                 ACT200L_REG8 |  (ACT200L_115200       & 0x0f),
782                 ACT200L_REG9 | ((ACT200L_115200 >> 4) & 0x0f),
783                 ACT200L_REG1 | ACT200L_LODB | ACT200L_WIDE
784         };
785 
786         /* Set DLAB 1. */
787         soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN8);
788 
789         /* Set divisor to 12 => 9600 Baud */
790         soutp(UART_DLM, 0);
791         soutp(UART_DLL, 12);
792 
793         /* Set DLAB 0. */
794         soutp(UART_LCR, UART_LCR_WLEN8);
795         /* Set divisor to 12 => 9600 Baud */
796 
797         /* power supply */
798         soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
799         for (i = 0; i < 50; i++)
800                 safe_udelay(1000);
801 
802                 /* Reset the dongle : set RTS low for 25 ms */
803         soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
804         for (i = 0; i < 25; i++)
805                 udelay(1000);
806 
807         soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
808         udelay(100);
809 
810         /* Clear DTR and set RTS to enter command mode */
811         soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
812         udelay(7);
813 
814         /* send out the control register settings for 115K 7N1 SIR operation */
815         for (i = 0; i < sizeof(control); i++) {
816                 soutp(UART_TX, control[i]);
817                 /* one byte takes ~1042 usec to transmit at 9600,8N1 */
818                 udelay(1500);
819         }
820 
821         /* back to normal operation */
822         soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
823         udelay(50);
824 
825         udelay(1500);
826         soutp(UART_LCR, sinp(UART_LCR) | UART_LCR_DLAB);
827 
828         /* Set DLAB 1. */
829         soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
830 
831         /* Set divisor to 1 => 115200 Baud */
832         soutp(UART_DLM, 0);
833         soutp(UART_DLL, 1);
834 
835         /* Set DLAB 0. */
836         soutp(UART_LCR, sinp(UART_LCR) & (~UART_LCR_DLAB));
837 
838         /* Set DLAB 0, 7 Bit */
839         soutp(UART_LCR, UART_LCR_WLEN7);
840 
841         /* enable interrupts */
842         soutp(UART_IER, sinp(UART_IER)|UART_IER_RDI);
843 }
844 #endif
845 
846 #ifdef LIRC_SIR_ACTISYS_ACT220L
847 /*
848  * Derived from linux IrDA driver (net/irda/actisys.c)
849  * Drop me a mail for any kind of comment: maxx@spaceboyz.net
850  */
851 
852 void init_act220(void)
853 {
854         int i;
855 
856         /* DLAB 1 */
857         soutp(UART_LCR, UART_LCR_DLAB|UART_LCR_WLEN7);
858 
859         /* 9600 baud */
860         soutp(UART_DLM, 0);
861         soutp(UART_DLL, 12);
862 
863         /* DLAB 0 */
864         soutp(UART_LCR, UART_LCR_WLEN7);
865 
866         /* reset the dongle, set DTR low for 10us */
867         soutp(UART_MCR, UART_MCR_RTS|UART_MCR_OUT2);
868         udelay(10);
869 
870         /* back to normal (still 9600) */
871         soutp(UART_MCR, UART_MCR_DTR|UART_MCR_RTS|UART_MCR_OUT2);
872 
873         /*
874          * send RTS pulses until we reach 115200
875          * i hope this is really the same for act220l/act220l+
876          */
877         for (i = 0; i < 3; i++) {
878                 udelay(10);
879                 /* set RTS low for 10 us */
880                 soutp(UART_MCR, UART_MCR_DTR|UART_MCR_OUT2);
881                 udelay(10);
882                 /* set RTS high for 10 us */
883                 soutp(UART_MCR, UART_MCR_RTS|UART_MCR_DTR|UART_MCR_OUT2);
884         }
885 
886         /* back to normal operation */
887         udelay(1500); /* better safe than sorry ;) */
888 
889         /* Set DLAB 1. */
890         soutp(UART_LCR, UART_LCR_DLAB | UART_LCR_WLEN7);
891 
892         /* Set divisor to 1 => 115200 Baud */
893         soutp(UART_DLM, 0);
894         soutp(UART_DLL, 1);
895 
896         /* Set DLAB 0, 7 Bit */
897         /* The dongle doesn't seem to have any problems with operation at 7N1 */
898         soutp(UART_LCR, UART_LCR_WLEN7);
899 
900         /* enable interrupts */
901         soutp(UART_IER, UART_IER_RDI);
902 }
903 #endif
904 
905 static int init_lirc_sir(void)
906 {
907         int retval;
908 
909         init_waitqueue_head(&lirc_read_queue);
910         retval = init_port();
911         if (retval < 0)
912                 return retval;
913         init_hardware();
914         pr_info("Installed.\n");
915         return 0;
916 }
917 
918 static int lirc_sir_probe(struct platform_device *dev)
919 {
920         return 0;
921 }
922 
923 static int lirc_sir_remove(struct platform_device *dev)
924 {
925         return 0;
926 }
927 
928 static struct platform_driver lirc_sir_driver = {
929         .probe          = lirc_sir_probe,
930         .remove         = lirc_sir_remove,
931         .driver         = {
932                 .name   = "lirc_sir",
933                 .owner  = THIS_MODULE,
934         },
935 };
936 
937 static int __init lirc_sir_init(void)
938 {
939         int retval;
940 
941         retval = platform_driver_register(&lirc_sir_driver);
942         if (retval) {
943                 pr_err("Platform driver register failed!\n");
944                 return -ENODEV;
945         }
946 
947         lirc_sir_dev = platform_device_alloc("lirc_dev", 0);
948         if (!lirc_sir_dev) {
949                 pr_err("Platform device alloc failed!\n");
950                 retval = -ENOMEM;
951                 goto pdev_alloc_fail;
952         }
953 
954         retval = platform_device_add(lirc_sir_dev);
955         if (retval) {
956                 pr_err("Platform device add failed!\n");
957                 retval = -ENODEV;
958                 goto pdev_add_fail;
959         }
960 
961         retval = init_chrdev();
962         if (retval < 0)
963                 goto fail;
964 
965         retval = init_lirc_sir();
966         if (retval) {
967                 drop_chrdev();
968                 goto fail;
969         }
970 
971         return 0;
972 
973 fail:
974         platform_device_del(lirc_sir_dev);
975 pdev_add_fail:
976         platform_device_put(lirc_sir_dev);
977 pdev_alloc_fail:
978         platform_driver_unregister(&lirc_sir_driver);
979         return retval;
980 }
981 
982 static void __exit lirc_sir_exit(void)
983 {
984         drop_hardware();
985         drop_chrdev();
986         drop_port();
987         platform_device_unregister(lirc_sir_dev);
988         platform_driver_unregister(&lirc_sir_driver);
989         pr_info("Uninstalled.\n");
990 }
991 
992 module_init(lirc_sir_init);
993 module_exit(lirc_sir_exit);
994 
995 #ifdef LIRC_SIR_TEKRAM
996 MODULE_DESCRIPTION("Infrared receiver driver for Tekram Irmate 210");
997 MODULE_AUTHOR("Christoph Bartelmus");
998 #elif defined(LIRC_SIR_ACTISYS_ACT200L)
999 MODULE_DESCRIPTION("LIRC driver for Actisys Act200L");
1000 MODULE_AUTHOR("Karl Bongers");
1001 #elif defined(LIRC_SIR_ACTISYS_ACT220L)
1002 MODULE_DESCRIPTION("LIRC driver for Actisys Act220L(+)");
1003 MODULE_AUTHOR("Jan Roemisch");
1004 #else
1005 MODULE_DESCRIPTION("Infrared receiver driver for SIR type serial ports");
1006 MODULE_AUTHOR("Milan Pikula");
1007 #endif
1008 MODULE_LICENSE("GPL");
1009 
1010 module_param(io, int, S_IRUGO);
1011 MODULE_PARM_DESC(io, "I/O address base (0x3f8 or 0x2f8)");
1012 
1013 module_param(irq, int, S_IRUGO);
1014 MODULE_PARM_DESC(irq, "Interrupt (4 or 3)");
1015 
1016 module_param(threshold, int, S_IRUGO);
1017 MODULE_PARM_DESC(threshold, "space detection threshold (3)");
1018 
1019 module_param(debug, bool, S_IRUGO | S_IWUSR);
1020 MODULE_PARM_DESC(debug, "Enable debugging messages");
1021 

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