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Linux/drivers/staging/imx-drm/ipuv3-crtc.c

  1 /*
  2  * i.MX IPUv3 Graphics driver
  3  *
  4  * Copyright (C) 2011 Sascha Hauer, Pengutronix
  5  *
  6  * This program is free software; you can redistribute it and/or
  7  * modify it under the terms of the GNU General Public License
  8  * as published by the Free Software Foundation; either version 2
  9  * of the License, or (at your option) any later version.
 10  * This program is distributed in the hope that it will be useful,
 11  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 13  * GNU General Public License for more details.
 14  *
 15  * You should have received a copy of the GNU General Public License
 16  * along with this program; if not, write to the Free Software
 17  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 18  * MA 02110-1301, USA.
 19  */
 20 #include <linux/component.h>
 21 #include <linux/module.h>
 22 #include <linux/export.h>
 23 #include <linux/device.h>
 24 #include <linux/platform_device.h>
 25 #include <drm/drmP.h>
 26 #include <drm/drm_crtc_helper.h>
 27 #include <linux/fb.h>
 28 #include <linux/clk.h>
 29 #include <linux/errno.h>
 30 #include <drm/drm_gem_cma_helper.h>
 31 #include <drm/drm_fb_cma_helper.h>
 32 
 33 #include "ipu-v3/imx-ipu-v3.h"
 34 #include "imx-drm.h"
 35 #include "ipuv3-plane.h"
 36 
 37 #define DRIVER_DESC             "i.MX IPUv3 Graphics"
 38 
 39 struct ipu_crtc {
 40         struct device           *dev;
 41         struct drm_crtc         base;
 42         struct imx_drm_crtc     *imx_crtc;
 43 
 44         /* plane[0] is the full plane, plane[1] is the partial plane */
 45         struct ipu_plane        *plane[2];
 46 
 47         struct ipu_dc           *dc;
 48         struct ipu_di           *di;
 49         int                     enabled;
 50         struct drm_pending_vblank_event *page_flip_event;
 51         struct drm_framebuffer  *newfb;
 52         int                     irq;
 53         u32                     interface_pix_fmt;
 54         unsigned long           di_clkflags;
 55         int                     di_hsync_pin;
 56         int                     di_vsync_pin;
 57 };
 58 
 59 #define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
 60 
 61 static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
 62 {
 63         if (ipu_crtc->enabled)
 64                 return;
 65 
 66         ipu_di_enable(ipu_crtc->di);
 67         ipu_dc_enable_channel(ipu_crtc->dc);
 68         ipu_plane_enable(ipu_crtc->plane[0]);
 69 
 70         ipu_crtc->enabled = 1;
 71 }
 72 
 73 static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
 74 {
 75         if (!ipu_crtc->enabled)
 76                 return;
 77 
 78         ipu_plane_disable(ipu_crtc->plane[0]);
 79         ipu_dc_disable_channel(ipu_crtc->dc);
 80         ipu_di_disable(ipu_crtc->di);
 81 
 82         ipu_crtc->enabled = 0;
 83 }
 84 
 85 static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
 86 {
 87         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
 88 
 89         dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
 90 
 91         switch (mode) {
 92         case DRM_MODE_DPMS_ON:
 93                 ipu_fb_enable(ipu_crtc);
 94                 break;
 95         case DRM_MODE_DPMS_STANDBY:
 96         case DRM_MODE_DPMS_SUSPEND:
 97         case DRM_MODE_DPMS_OFF:
 98                 ipu_fb_disable(ipu_crtc);
 99                 break;
100         }
101 }
102 
103 static int ipu_page_flip(struct drm_crtc *crtc,
104                 struct drm_framebuffer *fb,
105                 struct drm_pending_vblank_event *event,
106                 uint32_t page_flip_flags)
107 {
108         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
109         int ret;
110 
111         if (ipu_crtc->newfb)
112                 return -EBUSY;
113 
114         ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
115         if (ret) {
116                 dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
117                 list_del(&event->base.link);
118 
119                 return ret;
120         }
121 
122         ipu_crtc->newfb = fb;
123         ipu_crtc->page_flip_event = event;
124         crtc->primary->fb = fb;
125 
126         return 0;
127 }
128 
129 static const struct drm_crtc_funcs ipu_crtc_funcs = {
130         .set_config = drm_crtc_helper_set_config,
131         .destroy = drm_crtc_cleanup,
132         .page_flip = ipu_page_flip,
133 };
134 
135 static int ipu_crtc_mode_set(struct drm_crtc *crtc,
136                                struct drm_display_mode *orig_mode,
137                                struct drm_display_mode *mode,
138                                int x, int y,
139                                struct drm_framebuffer *old_fb)
140 {
141         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
142         int ret;
143         struct ipu_di_signal_cfg sig_cfg = {};
144         u32 out_pixel_fmt;
145 
146         dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
147                         mode->hdisplay);
148         dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
149                         mode->vdisplay);
150 
151         out_pixel_fmt = ipu_crtc->interface_pix_fmt;
152 
153         if (mode->flags & DRM_MODE_FLAG_INTERLACE)
154                 sig_cfg.interlaced = 1;
155         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
156                 sig_cfg.Hsync_pol = 1;
157         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
158                 sig_cfg.Vsync_pol = 1;
159 
160         sig_cfg.enable_pol = 1;
161         sig_cfg.clk_pol = 1;
162         sig_cfg.width = mode->hdisplay;
163         sig_cfg.height = mode->vdisplay;
164         sig_cfg.pixel_fmt = out_pixel_fmt;
165         sig_cfg.h_start_width = mode->htotal - mode->hsync_end;
166         sig_cfg.h_sync_width = mode->hsync_end - mode->hsync_start;
167         sig_cfg.h_end_width = mode->hsync_start - mode->hdisplay;
168 
169         sig_cfg.v_start_width = mode->vtotal - mode->vsync_end;
170         sig_cfg.v_sync_width = mode->vsync_end - mode->vsync_start;
171         sig_cfg.v_end_width = mode->vsync_start - mode->vdisplay;
172         sig_cfg.pixelclock = mode->clock * 1000;
173         sig_cfg.clkflags = ipu_crtc->di_clkflags;
174 
175         sig_cfg.v_to_h_sync = 0;
176 
177         sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
178         sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;
179 
180         ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, sig_cfg.interlaced,
181                         out_pixel_fmt, mode->hdisplay);
182         if (ret) {
183                 dev_err(ipu_crtc->dev,
184                                 "initializing display controller failed with %d\n",
185                                 ret);
186                 return ret;
187         }
188 
189         ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
190         if (ret) {
191                 dev_err(ipu_crtc->dev,
192                                 "initializing panel failed with %d\n", ret);
193                 return ret;
194         }
195 
196         return ipu_plane_mode_set(ipu_crtc->plane[0], crtc, mode, crtc->primary->fb,
197                                   0, 0, mode->hdisplay, mode->vdisplay,
198                                   x, y, mode->hdisplay, mode->vdisplay);
199 }
200 
201 static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
202 {
203         unsigned long flags;
204         struct drm_device *drm = ipu_crtc->base.dev;
205 
206         spin_lock_irqsave(&drm->event_lock, flags);
207         if (ipu_crtc->page_flip_event)
208                 drm_send_vblank_event(drm, -1, ipu_crtc->page_flip_event);
209         ipu_crtc->page_flip_event = NULL;
210         imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
211         spin_unlock_irqrestore(&drm->event_lock, flags);
212 }
213 
214 static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
215 {
216         struct ipu_crtc *ipu_crtc = dev_id;
217 
218         imx_drm_handle_vblank(ipu_crtc->imx_crtc);
219 
220         if (ipu_crtc->newfb) {
221                 ipu_crtc->newfb = NULL;
222                 ipu_plane_set_base(ipu_crtc->plane[0], ipu_crtc->base.primary->fb,
223                                 ipu_crtc->plane[0]->x, ipu_crtc->plane[0]->y);
224                 ipu_crtc_handle_pageflip(ipu_crtc);
225         }
226 
227         return IRQ_HANDLED;
228 }
229 
230 static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
231                                   const struct drm_display_mode *mode,
232                                   struct drm_display_mode *adjusted_mode)
233 {
234         return true;
235 }
236 
237 static void ipu_crtc_prepare(struct drm_crtc *crtc)
238 {
239         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
240 
241         ipu_fb_disable(ipu_crtc);
242 }
243 
244 static void ipu_crtc_commit(struct drm_crtc *crtc)
245 {
246         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
247 
248         ipu_fb_enable(ipu_crtc);
249 }
250 
251 static struct drm_crtc_helper_funcs ipu_helper_funcs = {
252         .dpms = ipu_crtc_dpms,
253         .mode_fixup = ipu_crtc_mode_fixup,
254         .mode_set = ipu_crtc_mode_set,
255         .prepare = ipu_crtc_prepare,
256         .commit = ipu_crtc_commit,
257 };
258 
259 static int ipu_enable_vblank(struct drm_crtc *crtc)
260 {
261         return 0;
262 }
263 
264 static void ipu_disable_vblank(struct drm_crtc *crtc)
265 {
266         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
267 
268         ipu_crtc->page_flip_event = NULL;
269         ipu_crtc->newfb = NULL;
270 }
271 
272 static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc, u32 encoder_type,
273                 u32 pixfmt, int hsync_pin, int vsync_pin)
274 {
275         struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
276 
277         ipu_crtc->interface_pix_fmt = pixfmt;
278         ipu_crtc->di_hsync_pin = hsync_pin;
279         ipu_crtc->di_vsync_pin = vsync_pin;
280 
281         switch (encoder_type) {
282         case DRM_MODE_ENCODER_DAC:
283         case DRM_MODE_ENCODER_TVDAC:
284         case DRM_MODE_ENCODER_LVDS:
285                 ipu_crtc->di_clkflags = IPU_DI_CLKMODE_SYNC |
286                         IPU_DI_CLKMODE_EXT;
287                 break;
288         case DRM_MODE_ENCODER_TMDS:
289         case DRM_MODE_ENCODER_NONE:
290                 ipu_crtc->di_clkflags = 0;
291                 break;
292         }
293 
294         return 0;
295 }
296 
297 static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
298         .enable_vblank = ipu_enable_vblank,
299         .disable_vblank = ipu_disable_vblank,
300         .set_interface_pix_fmt = ipu_set_interface_pix_fmt,
301         .crtc_funcs = &ipu_crtc_funcs,
302         .crtc_helper_funcs = &ipu_helper_funcs,
303 };
304 
305 static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
306 {
307         if (!IS_ERR_OR_NULL(ipu_crtc->dc))
308                 ipu_dc_put(ipu_crtc->dc);
309         if (!IS_ERR_OR_NULL(ipu_crtc->di))
310                 ipu_di_put(ipu_crtc->di);
311 }
312 
313 static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
314                 struct ipu_client_platformdata *pdata)
315 {
316         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
317         int ret;
318 
319         ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
320         if (IS_ERR(ipu_crtc->dc)) {
321                 ret = PTR_ERR(ipu_crtc->dc);
322                 goto err_out;
323         }
324 
325         ipu_crtc->di = ipu_di_get(ipu, pdata->di);
326         if (IS_ERR(ipu_crtc->di)) {
327                 ret = PTR_ERR(ipu_crtc->di);
328                 goto err_out;
329         }
330 
331         return 0;
332 err_out:
333         ipu_put_resources(ipu_crtc);
334 
335         return ret;
336 }
337 
338 static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
339         struct ipu_client_platformdata *pdata, struct drm_device *drm)
340 {
341         struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
342         int dp = -EINVAL;
343         int ret;
344         int id;
345 
346         ret = ipu_get_resources(ipu_crtc, pdata);
347         if (ret) {
348                 dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
349                                 ret);
350                 return ret;
351         }
352 
353         ret = imx_drm_add_crtc(drm, &ipu_crtc->base, &ipu_crtc->imx_crtc,
354                         &ipu_crtc_helper_funcs, ipu_crtc->dev->of_node);
355         if (ret) {
356                 dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
357                 goto err_put_resources;
358         }
359 
360         if (pdata->dp >= 0)
361                 dp = IPU_DP_FLOW_SYNC_BG;
362         id = imx_drm_crtc_id(ipu_crtc->imx_crtc);
363         ipu_crtc->plane[0] = ipu_plane_init(ipu_crtc->base.dev, ipu,
364                                             pdata->dma[0], dp, BIT(id), true);
365         ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
366         if (ret) {
367                 dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
368                         ret);
369                 goto err_remove_crtc;
370         }
371 
372         /* If this crtc is using the DP, add an overlay plane */
373         if (pdata->dp >= 0 && pdata->dma[1] > 0) {
374                 ipu_crtc->plane[1] = ipu_plane_init(ipu_crtc->base.dev, ipu,
375                                                     pdata->dma[1],
376                                                     IPU_DP_FLOW_SYNC_FG,
377                                                     BIT(id), false);
378                 if (IS_ERR(ipu_crtc->plane[1]))
379                         ipu_crtc->plane[1] = NULL;
380         }
381 
382         ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
383         ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
384                         "imx_drm", ipu_crtc);
385         if (ret < 0) {
386                 dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
387                 goto err_put_plane_res;
388         }
389 
390         return 0;
391 
392 err_put_plane_res:
393         ipu_plane_put_resources(ipu_crtc->plane[0]);
394 err_remove_crtc:
395         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
396 err_put_resources:
397         ipu_put_resources(ipu_crtc);
398 
399         return ret;
400 }
401 
402 static struct device_node *ipu_drm_get_port_by_id(struct device_node *parent,
403                                                   int port_id)
404 {
405         struct device_node *port;
406         int id, ret;
407 
408         port = of_get_child_by_name(parent, "port");
409         while (port) {
410                 ret = of_property_read_u32(port, "reg", &id);
411                 if (!ret && id == port_id)
412                         return port;
413 
414                 do {
415                         port = of_get_next_child(parent, port);
416                         if (!port)
417                                 return NULL;
418                 } while (of_node_cmp(port->name, "port"));
419         }
420 
421         return NULL;
422 }
423 
424 static int ipu_drm_bind(struct device *dev, struct device *master, void *data)
425 {
426         struct ipu_client_platformdata *pdata = dev->platform_data;
427         struct drm_device *drm = data;
428         struct ipu_crtc *ipu_crtc;
429         int ret;
430 
431         ipu_crtc = devm_kzalloc(dev, sizeof(*ipu_crtc), GFP_KERNEL);
432         if (!ipu_crtc)
433                 return -ENOMEM;
434 
435         ipu_crtc->dev = dev;
436 
437         ret = ipu_crtc_init(ipu_crtc, pdata, drm);
438         if (ret)
439                 return ret;
440 
441         dev_set_drvdata(dev, ipu_crtc);
442 
443         return 0;
444 }
445 
446 static void ipu_drm_unbind(struct device *dev, struct device *master,
447         void *data)
448 {
449         struct ipu_crtc *ipu_crtc = dev_get_drvdata(dev);
450 
451         imx_drm_remove_crtc(ipu_crtc->imx_crtc);
452 
453         ipu_plane_put_resources(ipu_crtc->plane[0]);
454         ipu_put_resources(ipu_crtc);
455 }
456 
457 static const struct component_ops ipu_crtc_ops = {
458         .bind = ipu_drm_bind,
459         .unbind = ipu_drm_unbind,
460 };
461 
462 static int ipu_drm_probe(struct platform_device *pdev)
463 {
464         struct device *dev = &pdev->dev;
465         struct ipu_client_platformdata *pdata = dev->platform_data;
466         int ret;
467 
468         if (!dev->platform_data)
469                 return -EINVAL;
470 
471         if (!dev->of_node) {
472                 /* Associate crtc device with the corresponding DI port node */
473                 dev->of_node = ipu_drm_get_port_by_id(dev->parent->of_node,
474                                                       pdata->di + 2);
475                 if (!dev->of_node) {
476                         dev_err(dev, "missing port@%d node in %s\n",
477                                 pdata->di + 2, dev->parent->of_node->full_name);
478                         return -ENODEV;
479                 }
480         }
481 
482         ret = dma_set_coherent_mask(dev, DMA_BIT_MASK(32));
483         if (ret)
484                 return ret;
485 
486         return component_add(dev, &ipu_crtc_ops);
487 }
488 
489 static int ipu_drm_remove(struct platform_device *pdev)
490 {
491         component_del(&pdev->dev, &ipu_crtc_ops);
492         return 0;
493 }
494 
495 static struct platform_driver ipu_drm_driver = {
496         .driver = {
497                 .name = "imx-ipuv3-crtc",
498         },
499         .probe = ipu_drm_probe,
500         .remove = ipu_drm_remove,
501 };
502 module_platform_driver(ipu_drm_driver);
503 
504 MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
505 MODULE_DESCRIPTION(DRIVER_DESC);
506 MODULE_LICENSE("GPL");
507 MODULE_ALIAS("platform:imx-ipuv3-crtc");
508 

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