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Linux/drivers/staging/comedi/drivers/ni_65xx.c

  1 /*
  2  * ni_65xx.c
  3  * Comedi driver for National Instruments PCI-65xx static dio boards
  4  *
  5  * Copyright (C) 2006 Jon Grierson <jd@renko.co.uk>
  6  * Copyright (C) 2006 Frank Mori Hess <fmhess@users.sourceforge.net>
  7  *
  8  * COMEDI - Linux Control and Measurement Device Interface
  9  * Copyright (C) 1999,2002,2003 David A. Schleef <ds@schleef.org>
 10  *
 11  * This program is free software; you can redistribute it and/or modify
 12  * it under the terms of the GNU General Public License as published by
 13  * the Free Software Foundation; either version 2 of the License, or
 14  * (at your option) any later version.
 15  *
 16  * This program is distributed in the hope that it will be useful,
 17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19  * GNU General Public License for more details.
 20  */
 21 
 22 /*
 23  * Driver: ni_65xx
 24  * Description: National Instruments 65xx static dio boards
 25  * Author: Jon Grierson <jd@renko.co.uk>,
 26  *         Frank Mori Hess <fmhess@users.sourceforge.net>
 27  * Status: testing
 28  * Devices: (National Instruments) PCI-6509 [ni_65xx]
 29  *          (National Instruments) PXI-6509 [ni_65xx]
 30  *          (National Instruments) PCI-6510 [ni_65xx]
 31  *          (National Instruments) PCI-6511 [ni_65xx]
 32  *          (National Instruments) PXI-6511 [ni_65xx]
 33  *          (National Instruments) PCI-6512 [ni_65xx]
 34  *          (National Instruments) PXI-6512 [ni_65xx]
 35  *          (National Instruments) PCI-6513 [ni_65xx]
 36  *          (National Instruments) PXI-6513 [ni_65xx]
 37  *          (National Instruments) PCI-6514 [ni_65xx]
 38  *          (National Instruments) PXI-6514 [ni_65xx]
 39  *          (National Instruments) PCI-6515 [ni_65xx]
 40  *          (National Instruments) PXI-6515 [ni_65xx]
 41  *          (National Instruments) PCI-6516 [ni_65xx]
 42  *          (National Instruments) PCI-6517 [ni_65xx]
 43  *          (National Instruments) PCI-6518 [ni_65xx]
 44  *          (National Instruments) PCI-6519 [ni_65xx]
 45  *          (National Instruments) PCI-6520 [ni_65xx]
 46  *          (National Instruments) PCI-6521 [ni_65xx]
 47  *          (National Instruments) PXI-6521 [ni_65xx]
 48  *          (National Instruments) PCI-6528 [ni_65xx]
 49  *          (National Instruments) PXI-6528 [ni_65xx]
 50  * Updated: Mon, 21 Jul 2014 12:49:58 +0000
 51  *
 52  * Configuration Options: not applicable, uses PCI auto config
 53  *
 54  * Based on the PCI-6527 driver by ds.
 55  * The interrupt subdevice (subdevice 3) is probably broken for all
 56  * boards except maybe the 6514.
 57  *
 58  * This driver previously inverted the outputs on PCI-6513 through to
 59  * PCI-6519 and on PXI-6513 through to PXI-6515.  It no longer inverts
 60  * outputs on those cards by default as it didn't make much sense.  If
 61  * you require the outputs to be inverted on those cards for legacy
 62  * reasons, set the module parameter "legacy_invert_outputs=true" when
 63  * loading the module, or set "ni_65xx.legacy_invert_outputs=true" on
 64  * the kernel command line if the driver is built in to the kernel.
 65  */
 66 
 67 /*
 68  * Manuals (available from ftp://ftp.natinst.com/support/manuals)
 69  *
 70  *      370106b.pdf     6514 Register Level Programmer Manual
 71  */
 72 
 73 #include <linux/module.h>
 74 #include <linux/pci.h>
 75 #include <linux/interrupt.h>
 76 
 77 #include "../comedidev.h"
 78 
 79 #include "comedi_fc.h"
 80 
 81 /*
 82  * PCI BAR1 Register Map
 83  */
 84 
 85 /* Non-recurring Registers (8-bit except where noted) */
 86 #define NI_65XX_ID_REG                  0x00
 87 #define NI_65XX_CLR_REG                 0x01
 88 #define NI_65XX_CLR_WDOG_INT            (1 << 6)
 89 #define NI_65XX_CLR_WDOG_PING           (1 << 5)
 90 #define NI_65XX_CLR_WDOG_EXP            (1 << 4)
 91 #define NI_65XX_CLR_EDGE_INT            (1 << 3)
 92 #define NI_65XX_CLR_OVERFLOW_INT        (1 << 2)
 93 #define NI_65XX_STATUS_REG              0x02
 94 #define NI_65XX_STATUS_WDOG_INT         (1 << 5)
 95 #define NI_65XX_STATUS_FALL_EDGE        (1 << 4)
 96 #define NI_65XX_STATUS_RISE_EDGE        (1 << 3)
 97 #define NI_65XX_STATUS_INT              (1 << 2)
 98 #define NI_65XX_STATUS_OVERFLOW_INT     (1 << 1)
 99 #define NI_65XX_STATUS_EDGE_INT         (1 << 0)
100 #define NI_65XX_CTRL_REG                0x03
101 #define NI_65XX_CTRL_WDOG_ENA           (1 << 5)
102 #define NI_65XX_CTRL_FALL_EDGE_ENA      (1 << 4)
103 #define NI_65XX_CTRL_RISE_EDGE_ENA      (1 << 3)
104 #define NI_65XX_CTRL_INT_ENA            (1 << 2)
105 #define NI_65XX_CTRL_OVERFLOW_ENA       (1 << 1)
106 #define NI_65XX_CTRL_EDGE_ENA           (1 << 0)
107 #define NI_65XX_REV_REG                 0x04 /* 32-bit */
108 #define NI_65XX_FILTER_REG              0x08 /* 32-bit */
109 #define NI_65XX_RTSI_ROUTE_REG          0x0c /* 16-bit */
110 #define NI_65XX_RTSI_EDGE_REG           0x0e /* 16-bit */
111 #define NI_65XX_RTSI_WDOG_REG           0x10 /* 16-bit */
112 #define NI_65XX_RTSI_TRIG_REG           0x12 /* 16-bit */
113 #define NI_65XX_AUTO_CLK_SEL_REG        0x14 /* PXI-6528 only */
114 #define NI_65XX_AUTO_CLK_SEL_STATUS     (1 << 1)
115 #define NI_65XX_AUTO_CLK_SEL_DISABLE    (1 << 0)
116 #define NI_65XX_WDOG_CTRL_REG           0x15
117 #define NI_65XX_WDOG_CTRL_ENA           (1 << 0)
118 #define NI_65XX_RTSI_CFG_REG            0x16
119 #define NI_65XX_RTSI_CFG_RISE_SENSE     (1 << 2)
120 #define NI_65XX_RTSI_CFG_FALL_SENSE     (1 << 1)
121 #define NI_65XX_RTSI_CFG_SYNC_DETECT    (1 << 0)
122 #define NI_65XX_WDOG_STATUS_REG         0x17
123 #define NI_65XX_WDOG_STATUS_EXP         (1 << 0)
124 #define NI_65XX_WDOG_INTERVAL_REG       0x18 /* 32-bit */
125 
126 /* Recurring port registers (8-bit) */
127 #define NI_65XX_PORT(x)                 ((x) * 0x10)
128 #define NI_65XX_IO_DATA_REG(x)          (0x40 + NI_65XX_PORT(x))
129 #define NI_65XX_IO_SEL_REG(x)           (0x41 + NI_65XX_PORT(x))
130 #define NI_65XX_IO_SEL_OUTPUT           (0 << 0)
131 #define NI_65XX_IO_SEL_INPUT            (1 << 0)
132 #define NI_65XX_RISE_EDGE_ENA_REG(x)    (0x42 + NI_65XX_PORT(x))
133 #define NI_65XX_FALL_EDGE_ENA_REG(x)    (0x43 + NI_65XX_PORT(x))
134 #define NI_65XX_FILTER_ENA(x)           (0x44 + NI_65XX_PORT(x))
135 #define NI_65XX_WDOG_HIZ_REG(x)         (0x46 + NI_65XX_PORT(x))
136 #define NI_65XX_WDOG_ENA(x)             (0x47 + NI_65XX_PORT(x))
137 #define NI_65XX_WDOG_HI_LO_REG(x)       (0x48 + NI_65XX_PORT(x))
138 #define NI_65XX_RTSI_ENA(x)             (0x49 + NI_65XX_PORT(x))
139 
140 #define NI_65XX_PORT_TO_CHAN(x)         ((x) * 8)
141 #define NI_65XX_CHAN_TO_PORT(x)         ((x) / 8)
142 #define NI_65XX_CHAN_TO_MASK(x)         (1 << ((x) % 8))
143 
144 enum ni_65xx_boardid {
145         BOARD_PCI6509,
146         BOARD_PXI6509,
147         BOARD_PCI6510,
148         BOARD_PCI6511,
149         BOARD_PXI6511,
150         BOARD_PCI6512,
151         BOARD_PXI6512,
152         BOARD_PCI6513,
153         BOARD_PXI6513,
154         BOARD_PCI6514,
155         BOARD_PXI6514,
156         BOARD_PCI6515,
157         BOARD_PXI6515,
158         BOARD_PCI6516,
159         BOARD_PCI6517,
160         BOARD_PCI6518,
161         BOARD_PCI6519,
162         BOARD_PCI6520,
163         BOARD_PCI6521,
164         BOARD_PXI6521,
165         BOARD_PCI6528,
166         BOARD_PXI6528,
167 };
168 
169 struct ni_65xx_board {
170         const char *name;
171         unsigned num_dio_ports;
172         unsigned num_di_ports;
173         unsigned num_do_ports;
174         unsigned legacy_invert:1;
175 };
176 
177 static const struct ni_65xx_board ni_65xx_boards[] = {
178         [BOARD_PCI6509] = {
179                 .name           = "pci-6509",
180                 .num_dio_ports  = 12,
181         },
182         [BOARD_PXI6509] = {
183                 .name           = "pxi-6509",
184                 .num_dio_ports  = 12,
185         },
186         [BOARD_PCI6510] = {
187                 .name           = "pci-6510",
188                 .num_di_ports   = 4,
189         },
190         [BOARD_PCI6511] = {
191                 .name           = "pci-6511",
192                 .num_di_ports   = 8,
193         },
194         [BOARD_PXI6511] = {
195                 .name           = "pxi-6511",
196                 .num_di_ports   = 8,
197         },
198         [BOARD_PCI6512] = {
199                 .name           = "pci-6512",
200                 .num_do_ports   = 8,
201         },
202         [BOARD_PXI6512] = {
203                 .name           = "pxi-6512",
204                 .num_do_ports   = 8,
205         },
206         [BOARD_PCI6513] = {
207                 .name           = "pci-6513",
208                 .num_do_ports   = 8,
209                 .legacy_invert  = 1,
210         },
211         [BOARD_PXI6513] = {
212                 .name           = "pxi-6513",
213                 .num_do_ports   = 8,
214                 .legacy_invert  = 1,
215         },
216         [BOARD_PCI6514] = {
217                 .name           = "pci-6514",
218                 .num_di_ports   = 4,
219                 .num_do_ports   = 4,
220                 .legacy_invert  = 1,
221         },
222         [BOARD_PXI6514] = {
223                 .name           = "pxi-6514",
224                 .num_di_ports   = 4,
225                 .num_do_ports   = 4,
226                 .legacy_invert  = 1,
227         },
228         [BOARD_PCI6515] = {
229                 .name           = "pci-6515",
230                 .num_di_ports   = 4,
231                 .num_do_ports   = 4,
232                 .legacy_invert  = 1,
233         },
234         [BOARD_PXI6515] = {
235                 .name           = "pxi-6515",
236                 .num_di_ports   = 4,
237                 .num_do_ports   = 4,
238                 .legacy_invert  = 1,
239         },
240         [BOARD_PCI6516] = {
241                 .name           = "pci-6516",
242                 .num_do_ports   = 4,
243                 .legacy_invert  = 1,
244         },
245         [BOARD_PCI6517] = {
246                 .name           = "pci-6517",
247                 .num_do_ports   = 4,
248                 .legacy_invert  = 1,
249         },
250         [BOARD_PCI6518] = {
251                 .name           = "pci-6518",
252                 .num_di_ports   = 2,
253                 .num_do_ports   = 2,
254                 .legacy_invert  = 1,
255         },
256         [BOARD_PCI6519] = {
257                 .name           = "pci-6519",
258                 .num_di_ports   = 2,
259                 .num_do_ports   = 2,
260                 .legacy_invert  = 1,
261         },
262         [BOARD_PCI6520] = {
263                 .name           = "pci-6520",
264                 .num_di_ports   = 1,
265                 .num_do_ports   = 1,
266         },
267         [BOARD_PCI6521] = {
268                 .name           = "pci-6521",
269                 .num_di_ports   = 1,
270                 .num_do_ports   = 1,
271         },
272         [BOARD_PXI6521] = {
273                 .name           = "pxi-6521",
274                 .num_di_ports   = 1,
275                 .num_do_ports   = 1,
276         },
277         [BOARD_PCI6528] = {
278                 .name           = "pci-6528",
279                 .num_di_ports   = 3,
280                 .num_do_ports   = 3,
281         },
282         [BOARD_PXI6528] = {
283                 .name           = "pxi-6528",
284                 .num_di_ports   = 3,
285                 .num_do_ports   = 3,
286         },
287 };
288 
289 static bool ni_65xx_legacy_invert_outputs;
290 module_param_named(legacy_invert_outputs, ni_65xx_legacy_invert_outputs,
291                    bool, 0444);
292 MODULE_PARM_DESC(legacy_invert_outputs,
293                  "invert outputs of PCI/PXI-6513/6514/6515/6516/6517/6518/6519 for compatibility with old user code");
294 
295 static unsigned int ni_65xx_num_ports(struct comedi_device *dev)
296 {
297         const struct ni_65xx_board *board = dev->board_ptr;
298 
299         return board->num_dio_ports + board->num_di_ports + board->num_do_ports;
300 }
301 
302 static void ni_65xx_disable_input_filters(struct comedi_device *dev)
303 {
304         unsigned int num_ports = ni_65xx_num_ports(dev);
305         int i;
306 
307         /* disable input filtering on all ports */
308         for (i = 0; i < num_ports; ++i)
309                 writeb(0x00, dev->mmio + NI_65XX_FILTER_ENA(i));
310 
311         /* set filter interval to 0 (32bit reg) */
312         writel(0x00000000, dev->mmio + NI_65XX_FILTER_REG);
313 }
314 
315 /* updates edge detection for base_chan to base_chan+31 */
316 static void ni_65xx_update_edge_detection(struct comedi_device *dev,
317                                           unsigned int base_chan,
318                                           unsigned int rising,
319                                           unsigned int falling)
320 {
321         unsigned int num_ports = ni_65xx_num_ports(dev);
322         unsigned int port;
323 
324         if (base_chan >= NI_65XX_PORT_TO_CHAN(num_ports))
325                 return;
326 
327         for (port = NI_65XX_CHAN_TO_PORT(base_chan); port < num_ports; port++) {
328                 int bitshift = (int)(NI_65XX_PORT_TO_CHAN(port) - base_chan);
329                 unsigned int port_mask, port_rising, port_falling;
330 
331                 if (bitshift >= 32)
332                         break;
333 
334                 if (bitshift >= 0) {
335                         port_mask = ~0U >> bitshift;
336                         port_rising = rising >> bitshift;
337                         port_falling = falling >> bitshift;
338                 } else {
339                         port_mask = ~0U << -bitshift;
340                         port_rising = rising << -bitshift;
341                         port_falling = falling << -bitshift;
342                 }
343                 if (port_mask & 0xff) {
344                         if (~port_mask & 0xff) {
345                                 port_rising |=
346                                     readb(dev->mmio +
347                                           NI_65XX_RISE_EDGE_ENA_REG(port)) &
348                                     ~port_mask;
349                                 port_falling |=
350                                     readb(dev->mmio +
351                                           NI_65XX_FALL_EDGE_ENA_REG(port)) &
352                                     ~port_mask;
353                         }
354                         writeb(port_rising & 0xff,
355                                dev->mmio + NI_65XX_RISE_EDGE_ENA_REG(port));
356                         writeb(port_falling & 0xff,
357                                dev->mmio + NI_65XX_FALL_EDGE_ENA_REG(port));
358                 }
359         }
360 }
361 
362 static void ni_65xx_disable_edge_detection(struct comedi_device *dev)
363 {
364         /* clear edge detection for channels 0 to 31 */
365         ni_65xx_update_edge_detection(dev, 0, 0, 0);
366         /* clear edge detection for channels 32 to 63 */
367         ni_65xx_update_edge_detection(dev, 32, 0, 0);
368         /* clear edge detection for channels 64 to 95 */
369         ni_65xx_update_edge_detection(dev, 64, 0, 0);
370 }
371 
372 static int ni_65xx_dio_insn_config(struct comedi_device *dev,
373                                    struct comedi_subdevice *s,
374                                    struct comedi_insn *insn,
375                                    unsigned int *data)
376 {
377         unsigned long base_port = (unsigned long)s->private;
378         unsigned int chan = CR_CHAN(insn->chanspec);
379         unsigned int chan_mask = NI_65XX_CHAN_TO_MASK(chan);
380         unsigned port = base_port + NI_65XX_CHAN_TO_PORT(chan);
381         unsigned int interval;
382         unsigned int val;
383 
384         switch (data[0]) {
385         case INSN_CONFIG_FILTER:
386                 /*
387                  * The deglitch filter interval is specified in nanoseconds.
388                  * The hardware supports intervals in 200ns increments. Round
389                  * the user values up and return the actual interval.
390                  */
391                 interval = (data[1] + 100) / 200;
392                 if (interval > 0xfffff)
393                         interval = 0xfffff;
394                 data[1] = interval * 200;
395 
396                 /*
397                  * Enable/disable the channel for deglitch filtering. Note
398                  * that the filter interval is never set to ''. This is done
399                  * because other channels might still be enabled for filtering.
400                  */
401                 val = readb(dev->mmio + NI_65XX_FILTER_ENA(port));
402                 if (interval) {
403                         writel(interval, dev->mmio + NI_65XX_FILTER_REG);
404                         val |= chan_mask;
405                 } else {
406                         val &= ~chan_mask;
407                 }
408                 writeb(val, dev->mmio + NI_65XX_FILTER_ENA(port));
409                 break;
410 
411         case INSN_CONFIG_DIO_OUTPUT:
412                 if (s->type != COMEDI_SUBD_DIO)
413                         return -EINVAL;
414                 writeb(NI_65XX_IO_SEL_OUTPUT,
415                        dev->mmio + NI_65XX_IO_SEL_REG(port));
416                 break;
417 
418         case INSN_CONFIG_DIO_INPUT:
419                 if (s->type != COMEDI_SUBD_DIO)
420                         return -EINVAL;
421                 writeb(NI_65XX_IO_SEL_INPUT,
422                        dev->mmio + NI_65XX_IO_SEL_REG(port));
423                 break;
424 
425         case INSN_CONFIG_DIO_QUERY:
426                 if (s->type != COMEDI_SUBD_DIO)
427                         return -EINVAL;
428                 val = readb(dev->mmio + NI_65XX_IO_SEL_REG(port));
429                 data[1] = (val == NI_65XX_IO_SEL_INPUT) ? COMEDI_INPUT
430                                                         : COMEDI_OUTPUT;
431                 break;
432 
433         default:
434                 return -EINVAL;
435         }
436 
437         return insn->n;
438 }
439 
440 static int ni_65xx_dio_insn_bits(struct comedi_device *dev,
441                                  struct comedi_subdevice *s,
442                                  struct comedi_insn *insn,
443                                  unsigned int *data)
444 {
445         unsigned long base_port = (unsigned long)s->private;
446         unsigned int base_chan = CR_CHAN(insn->chanspec);
447         int last_port_offset = NI_65XX_CHAN_TO_PORT(s->n_chan - 1);
448         unsigned read_bits = 0;
449         int port_offset;
450 
451         for (port_offset = NI_65XX_CHAN_TO_PORT(base_chan);
452              port_offset <= last_port_offset; port_offset++) {
453                 unsigned port = base_port + port_offset;
454                 int base_port_channel = NI_65XX_PORT_TO_CHAN(port_offset);
455                 unsigned port_mask, port_data, bits;
456                 int bitshift = base_port_channel - base_chan;
457 
458                 if (bitshift >= 32)
459                         break;
460                 port_mask = data[0];
461                 port_data = data[1];
462                 if (bitshift > 0) {
463                         port_mask >>= bitshift;
464                         port_data >>= bitshift;
465                 } else {
466                         port_mask <<= -bitshift;
467                         port_data <<= -bitshift;
468                 }
469                 port_mask &= 0xff;
470                 port_data &= 0xff;
471 
472                 /* update the outputs */
473                 if (port_mask) {
474                         bits = readb(dev->mmio + NI_65XX_IO_DATA_REG(port));
475                         bits ^= s->io_bits;     /* invert if necessary */
476                         bits &= ~port_mask;
477                         bits |= (port_data & port_mask);
478                         bits ^= s->io_bits;     /* invert back */
479                         writeb(bits, dev->mmio + NI_65XX_IO_DATA_REG(port));
480                 }
481 
482                 /* read back the actual state */
483                 bits = readb(dev->mmio + NI_65XX_IO_DATA_REG(port));
484                 bits ^= s->io_bits;     /* invert if necessary */
485                 if (bitshift > 0)
486                         bits <<= bitshift;
487                 else
488                         bits >>= -bitshift;
489 
490                 read_bits |= bits;
491         }
492         data[1] = read_bits;
493         return insn->n;
494 }
495 
496 static irqreturn_t ni_65xx_interrupt(int irq, void *d)
497 {
498         struct comedi_device *dev = d;
499         struct comedi_subdevice *s = dev->read_subdev;
500         unsigned int status;
501 
502         status = readb(dev->mmio + NI_65XX_STATUS_REG);
503         if ((status & NI_65XX_STATUS_INT) == 0)
504                 return IRQ_NONE;
505         if ((status & NI_65XX_STATUS_EDGE_INT) == 0)
506                 return IRQ_NONE;
507 
508         writeb(NI_65XX_CLR_EDGE_INT | NI_65XX_CLR_OVERFLOW_INT,
509                dev->mmio + NI_65XX_CLR_REG);
510 
511         comedi_buf_put(s, 0);
512         s->async->events |= COMEDI_CB_EOS;
513         comedi_event(dev, s);
514         return IRQ_HANDLED;
515 }
516 
517 static int ni_65xx_intr_cmdtest(struct comedi_device *dev,
518                                 struct comedi_subdevice *s,
519                                 struct comedi_cmd *cmd)
520 {
521         int err = 0;
522 
523         /* Step 1 : check if triggers are trivially valid */
524 
525         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
526         err |= cfc_check_trigger_src(&cmd->scan_begin_src, TRIG_OTHER);
527         err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_FOLLOW);
528         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
529         err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT);
530 
531         if (err)
532                 return 1;
533 
534         /* Step 2a : make sure trigger sources are unique */
535         /* Step 2b : and mutually compatible */
536 
537         if (err)
538                 return 2;
539 
540         /* Step 3: check if arguments are trivially valid */
541 
542         err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
543         err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
544         err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
545         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
546         err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
547 
548         if (err)
549                 return 3;
550 
551         /* Step 4: fix up any arguments */
552 
553         /* Step 5: check channel list if it exists */
554 
555         return 0;
556 }
557 
558 static int ni_65xx_intr_cmd(struct comedi_device *dev,
559                             struct comedi_subdevice *s)
560 {
561         writeb(NI_65XX_CLR_EDGE_INT | NI_65XX_CLR_OVERFLOW_INT,
562                dev->mmio + NI_65XX_CLR_REG);
563         writeb(NI_65XX_CTRL_FALL_EDGE_ENA | NI_65XX_CTRL_RISE_EDGE_ENA |
564                NI_65XX_CTRL_INT_ENA | NI_65XX_CTRL_EDGE_ENA,
565                dev->mmio + NI_65XX_CTRL_REG);
566 
567         return 0;
568 }
569 
570 static int ni_65xx_intr_cancel(struct comedi_device *dev,
571                                struct comedi_subdevice *s)
572 {
573         writeb(0x00, dev->mmio + NI_65XX_CTRL_REG);
574 
575         return 0;
576 }
577 
578 static int ni_65xx_intr_insn_bits(struct comedi_device *dev,
579                                   struct comedi_subdevice *s,
580                                   struct comedi_insn *insn,
581                                   unsigned int *data)
582 {
583         data[1] = 0;
584         return insn->n;
585 }
586 
587 static int ni_65xx_intr_insn_config(struct comedi_device *dev,
588                                     struct comedi_subdevice *s,
589                                     struct comedi_insn *insn,
590                                     unsigned int *data)
591 {
592         switch (data[0]) {
593         case INSN_CONFIG_CHANGE_NOTIFY:
594                 /* add instruction to check_insn_config_length() */
595                 if (insn->n != 3)
596                         return -EINVAL;
597 
598                 /* update edge detection for channels 0 to 31 */
599                 ni_65xx_update_edge_detection(dev, 0, data[1], data[2]);
600                 /* clear edge detection for channels 32 to 63 */
601                 ni_65xx_update_edge_detection(dev, 32, 0, 0);
602                 /* clear edge detection for channels 64 to 95 */
603                 ni_65xx_update_edge_detection(dev, 64, 0, 0);
604                 break;
605         case INSN_CONFIG_DIGITAL_TRIG:
606                 /* check trigger number */
607                 if (data[1] != 0)
608                         return -EINVAL;
609                 /* check digital trigger operation */
610                 switch (data[2]) {
611                 case COMEDI_DIGITAL_TRIG_DISABLE:
612                         ni_65xx_disable_edge_detection(dev);
613                         break;
614                 case COMEDI_DIGITAL_TRIG_ENABLE_EDGES:
615                         /*
616                          * update edge detection for channels data[3]
617                          * to (data[3] + 31)
618                          */
619                         ni_65xx_update_edge_detection(dev, data[3],
620                                                       data[4], data[5]);
621                         break;
622                 default:
623                         return -EINVAL;
624                 }
625                 break;
626         default:
627                 return -EINVAL;
628         }
629 
630         return insn->n;
631 }
632 
633 /* ripped from mite.h and mite_setup2() to avoid mite dependancy */
634 #define MITE_IODWBSR    0xc0     /* IO Device Window Base Size Register */
635 #define WENAB           (1 << 7) /* window enable */
636 
637 static int ni_65xx_mite_init(struct pci_dev *pcidev)
638 {
639         void __iomem *mite_base;
640         u32 main_phys_addr;
641 
642         /* ioremap the MITE registers (BAR 0) temporarily */
643         mite_base = pci_ioremap_bar(pcidev, 0);
644         if (!mite_base)
645                 return -ENOMEM;
646 
647         /* set data window to main registers (BAR 1) */
648         main_phys_addr = pci_resource_start(pcidev, 1);
649         writel(main_phys_addr | WENAB, mite_base + MITE_IODWBSR);
650 
651         /* finished with MITE registers */
652         iounmap(mite_base);
653         return 0;
654 }
655 
656 static int ni_65xx_auto_attach(struct comedi_device *dev,
657                                unsigned long context)
658 {
659         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
660         const struct ni_65xx_board *board = NULL;
661         struct comedi_subdevice *s;
662         unsigned i;
663         int ret;
664 
665         if (context < ARRAY_SIZE(ni_65xx_boards))
666                 board = &ni_65xx_boards[context];
667         if (!board)
668                 return -ENODEV;
669         dev->board_ptr = board;
670         dev->board_name = board->name;
671 
672         ret = comedi_pci_enable(dev);
673         if (ret)
674                 return ret;
675 
676         ret = ni_65xx_mite_init(pcidev);
677         if (ret)
678                 return ret;
679 
680         dev->mmio = pci_ioremap_bar(pcidev, 1);
681         if (!dev->mmio)
682                 return -ENOMEM;
683 
684         writeb(NI_65XX_CLR_EDGE_INT | NI_65XX_CLR_OVERFLOW_INT,
685                dev->mmio + NI_65XX_CLR_REG);
686         writeb(0x00, dev->mmio + NI_65XX_CTRL_REG);
687 
688         if (pcidev->irq) {
689                 ret = request_irq(pcidev->irq, ni_65xx_interrupt, IRQF_SHARED,
690                                   dev->board_name, dev);
691                 if (ret == 0)
692                         dev->irq = pcidev->irq;
693         }
694 
695         dev_info(dev->class_dev, "board: %s, ID=0x%02x", dev->board_name,
696                readb(dev->mmio + NI_65XX_ID_REG));
697 
698         ret = comedi_alloc_subdevices(dev, 4);
699         if (ret)
700                 return ret;
701 
702         s = &dev->subdevices[0];
703         if (board->num_di_ports) {
704                 s->type         = COMEDI_SUBD_DI;
705                 s->subdev_flags = SDF_READABLE;
706                 s->n_chan       = NI_65XX_PORT_TO_CHAN(board->num_di_ports);
707                 s->maxdata      = 1;
708                 s->range_table  = &range_digital;
709                 s->insn_bits    = ni_65xx_dio_insn_bits;
710                 s->insn_config  = ni_65xx_dio_insn_config;
711 
712                 /* the input ports always start at port 0 */
713                 s->private = (void *)0;
714         } else {
715                 s->type         = COMEDI_SUBD_UNUSED;
716         }
717 
718         s = &dev->subdevices[1];
719         if (board->num_do_ports) {
720                 s->type         = COMEDI_SUBD_DO;
721                 s->subdev_flags = SDF_WRITABLE;
722                 s->n_chan       = NI_65XX_PORT_TO_CHAN(board->num_do_ports);
723                 s->maxdata      = 1;
724                 s->range_table  = &range_digital;
725                 s->insn_bits    = ni_65xx_dio_insn_bits;
726 
727                 /* the output ports always start after the input ports */
728                 s->private = (void *)(unsigned long)board->num_di_ports;
729 
730                 /*
731                  * Use the io_bits to handle the inverted outputs.  Inverted
732                  * outputs are only supported if the "legacy_invert_outputs"
733                  * module parameter is set to "true".
734                  */
735                 if (ni_65xx_legacy_invert_outputs && board->legacy_invert)
736                         s->io_bits = 0xff;
737 
738                 /* reset all output ports to comedi '' */
739                 for (i = 0; i < board->num_do_ports; ++i) {
740                         writeb(s->io_bits,      /* inverted if necessary */
741                                dev->mmio +
742                                NI_65XX_IO_DATA_REG(board->num_di_ports + i));
743                 }
744         } else {
745                 s->type         = COMEDI_SUBD_UNUSED;
746         }
747 
748         s = &dev->subdevices[2];
749         if (board->num_dio_ports) {
750                 s->type         = COMEDI_SUBD_DIO;
751                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
752                 s->n_chan       = NI_65XX_PORT_TO_CHAN(board->num_dio_ports);
753                 s->maxdata      = 1;
754                 s->range_table  = &range_digital;
755                 s->insn_bits    = ni_65xx_dio_insn_bits;
756                 s->insn_config  = ni_65xx_dio_insn_config;
757 
758                 /* the input/output ports always start at port 0 */
759                 s->private = (void *)0;
760 
761                 /* configure all ports for input */
762                 for (i = 0; i < board->num_dio_ports; ++i) {
763                         writeb(NI_65XX_IO_SEL_INPUT,
764                                dev->mmio + NI_65XX_IO_SEL_REG(i));
765                 }
766         } else {
767                 s->type         = COMEDI_SUBD_UNUSED;
768         }
769 
770         s = &dev->subdevices[3];
771         s->type         = COMEDI_SUBD_DI;
772         s->subdev_flags = SDF_READABLE;
773         s->n_chan       = 1;
774         s->maxdata      = 1;
775         s->range_table  = &range_digital;
776         s->insn_bits    = ni_65xx_intr_insn_bits;
777         if (dev->irq) {
778                 dev->read_subdev = s;
779                 s->subdev_flags |= SDF_CMD_READ;
780                 s->len_chanlist = 1;
781                 s->insn_config  = ni_65xx_intr_insn_config;
782                 s->do_cmdtest   = ni_65xx_intr_cmdtest;
783                 s->do_cmd       = ni_65xx_intr_cmd;
784                 s->cancel       = ni_65xx_intr_cancel;
785         }
786 
787         ni_65xx_disable_input_filters(dev);
788         ni_65xx_disable_edge_detection(dev);
789 
790         return 0;
791 }
792 
793 static void ni_65xx_detach(struct comedi_device *dev)
794 {
795         if (dev->mmio)
796                 writeb(0x00, dev->mmio + NI_65XX_CTRL_REG);
797         comedi_pci_detach(dev);
798 }
799 
800 static struct comedi_driver ni_65xx_driver = {
801         .driver_name    = "ni_65xx",
802         .module         = THIS_MODULE,
803         .auto_attach    = ni_65xx_auto_attach,
804         .detach         = ni_65xx_detach,
805 };
806 
807 static int ni_65xx_pci_probe(struct pci_dev *dev,
808                              const struct pci_device_id *id)
809 {
810         return comedi_pci_auto_config(dev, &ni_65xx_driver, id->driver_data);
811 }
812 
813 static const struct pci_device_id ni_65xx_pci_table[] = {
814         { PCI_VDEVICE(NI, 0x1710), BOARD_PXI6509 },
815         { PCI_VDEVICE(NI, 0x7085), BOARD_PCI6509 },
816         { PCI_VDEVICE(NI, 0x7086), BOARD_PXI6528 },
817         { PCI_VDEVICE(NI, 0x7087), BOARD_PCI6515 },
818         { PCI_VDEVICE(NI, 0x7088), BOARD_PCI6514 },
819         { PCI_VDEVICE(NI, 0x70a9), BOARD_PCI6528 },
820         { PCI_VDEVICE(NI, 0x70c3), BOARD_PCI6511 },
821         { PCI_VDEVICE(NI, 0x70c8), BOARD_PCI6513 },
822         { PCI_VDEVICE(NI, 0x70c9), BOARD_PXI6515 },
823         { PCI_VDEVICE(NI, 0x70cc), BOARD_PCI6512 },
824         { PCI_VDEVICE(NI, 0x70cd), BOARD_PXI6514 },
825         { PCI_VDEVICE(NI, 0x70d1), BOARD_PXI6513 },
826         { PCI_VDEVICE(NI, 0x70d2), BOARD_PXI6512 },
827         { PCI_VDEVICE(NI, 0x70d3), BOARD_PXI6511 },
828         { PCI_VDEVICE(NI, 0x7124), BOARD_PCI6510 },
829         { PCI_VDEVICE(NI, 0x7125), BOARD_PCI6516 },
830         { PCI_VDEVICE(NI, 0x7126), BOARD_PCI6517 },
831         { PCI_VDEVICE(NI, 0x7127), BOARD_PCI6518 },
832         { PCI_VDEVICE(NI, 0x7128), BOARD_PCI6519 },
833         { PCI_VDEVICE(NI, 0x718b), BOARD_PCI6521 },
834         { PCI_VDEVICE(NI, 0x718c), BOARD_PXI6521 },
835         { PCI_VDEVICE(NI, 0x71c5), BOARD_PCI6520 },
836         { 0 }
837 };
838 MODULE_DEVICE_TABLE(pci, ni_65xx_pci_table);
839 
840 static struct pci_driver ni_65xx_pci_driver = {
841         .name           = "ni_65xx",
842         .id_table       = ni_65xx_pci_table,
843         .probe          = ni_65xx_pci_probe,
844         .remove         = comedi_pci_auto_unconfig,
845 };
846 module_comedi_pci_driver(ni_65xx_driver, ni_65xx_pci_driver);
847 
848 MODULE_AUTHOR("Comedi http://www.comedi.org");
849 MODULE_DESCRIPTION("Comedi driver for NI PCI-65xx static dio boards");
850 MODULE_LICENSE("GPL");
851 

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