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Linux/drivers/staging/comedi/drivers/cb_pcimdas.c

  1 /*
  2  * comedi/drivers/cb_pcimdas.c
  3  * Comedi driver for Computer Boards PCIM-DAS1602/16 and PCIe-DAS1602/16
  4  *
  5  * COMEDI - Linux Control and Measurement Device Interface
  6  * Copyright (C) 2000 David A. Schleef <ds@schleef.org>
  7  *
  8  * This program is free software; you can redistribute it and/or modify
  9  * it under the terms of the GNU General Public License as published by
 10  * the Free Software Foundation; either version 2 of the License, or
 11  * (at your option) any later version.
 12  *
 13  * This program is distributed in the hope that it will be useful,
 14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 16  * GNU General Public License for more details.
 17  */
 18 
 19 /*
 20  * Driver: cb_pcimdas
 21  * Description: Measurement Computing PCI Migration series boards
 22  * Devices: [ComputerBoards] PCIM-DAS1602/16 (cb_pcimdas), PCIe-DAS1602/16
 23  * Author: Richard Bytheway
 24  * Updated: Mon, 13 Oct 2014 11:57:39 +0000
 25  * Status: experimental
 26  *
 27  * Written to support the PCIM-DAS1602/16 and PCIe-DAS1602/16.
 28  *
 29  * Configuration Options:
 30  *   none
 31  *
 32  * Manual configuration of PCI(e) cards is not supported; they are configured
 33  * automatically.
 34  *
 35  * Developed from cb_pcidas and skel by Richard Bytheway (mocelet@sucs.org).
 36  * Only supports DIO, AO and simple AI in it's present form.
 37  * No interrupts, multi channel or FIFO AI,
 38  * although the card looks like it could support this.
 39  *
 40  * http://www.mccdaq.com/PDFs/Manuals/pcim-das1602-16.pdf
 41  * http://www.mccdaq.com/PDFs/Manuals/pcie-das1602-16.pdf
 42  */
 43 
 44 #include <linux/module.h>
 45 #include <linux/interrupt.h>
 46 
 47 #include "../comedi_pci.h"
 48 
 49 #include "comedi_8254.h"
 50 #include "plx9052.h"
 51 #include "8255.h"
 52 
 53 /*
 54  * PCI Bar 1 Register map
 55  * see plx9052.h for register and bit defines
 56  */
 57 
 58 /*
 59  * PCI Bar 2 Register map (devpriv->daqio)
 60  */
 61 #define PCIMDAS_AI_REG                  0x00
 62 #define PCIMDAS_AI_SOFTTRIG_REG         0x00
 63 #define PCIMDAS_AO_REG(x)               (0x02 + ((x) * 2))
 64 
 65 /*
 66  * PCI Bar 3 Register map (devpriv->BADR3)
 67  */
 68 #define PCIMDAS_MUX_REG                 0x00
 69 #define PCIMDAS_MUX(_lo, _hi)           ((_lo) | ((_hi) << 4))
 70 #define PCIMDAS_DI_DO_REG               0x01
 71 #define PCIMDAS_STATUS_REG              0x02
 72 #define PCIMDAS_STATUS_EOC              BIT(7)
 73 #define PCIMDAS_STATUS_UB               BIT(6)
 74 #define PCIMDAS_STATUS_MUX              BIT(5)
 75 #define PCIMDAS_STATUS_CLK              BIT(4)
 76 #define PCIMDAS_STATUS_TO_CURR_MUX(x)   ((x) & 0xf)
 77 #define PCIMDAS_CONV_STATUS_REG         0x03
 78 #define PCIMDAS_CONV_STATUS_EOC         BIT(7)
 79 #define PCIMDAS_CONV_STATUS_EOB         BIT(6)
 80 #define PCIMDAS_CONV_STATUS_EOA         BIT(5)
 81 #define PCIMDAS_CONV_STATUS_FNE         BIT(4)
 82 #define PCIMDAS_CONV_STATUS_FHF         BIT(3)
 83 #define PCIMDAS_CONV_STATUS_OVERRUN     BIT(2)
 84 #define PCIMDAS_IRQ_REG                 0x04
 85 #define PCIMDAS_IRQ_INTE                BIT(7)
 86 #define PCIMDAS_IRQ_INT                 BIT(6)
 87 #define PCIMDAS_IRQ_OVERRUN             BIT(4)
 88 #define PCIMDAS_IRQ_EOA                 BIT(3)
 89 #define PCIMDAS_IRQ_EOA_INT_SEL         BIT(2)
 90 #define PCIMDAS_IRQ_INTSEL(x)           ((x) << 0)
 91 #define PCIMDAS_IRQ_INTSEL_EOC          PCIMDAS_IRQ_INTSEL(0)
 92 #define PCIMDAS_IRQ_INTSEL_FNE          PCIMDAS_IRQ_INTSEL(1)
 93 #define PCIMDAS_IRQ_INTSEL_EOB          PCIMDAS_IRQ_INTSEL(2)
 94 #define PCIMDAS_IRQ_INTSEL_FHF_EOA      PCIMDAS_IRQ_INTSEL(3)
 95 #define PCIMDAS_PACER_REG               0x05
 96 #define PCIMDAS_PACER_GATE_STATUS       BIT(6)
 97 #define PCIMDAS_PACER_GATE_POL          BIT(5)
 98 #define PCIMDAS_PACER_GATE_LATCH        BIT(4)
 99 #define PCIMDAS_PACER_GATE_EN           BIT(3)
100 #define PCIMDAS_PACER_EXT_PACER_POL     BIT(2)
101 #define PCIMDAS_PACER_SRC(x)            ((x) << 0)
102 #define PCIMDAS_PACER_SRC_POLLED        PCIMDAS_PACER_SRC(0)
103 #define PCIMDAS_PACER_SRC_EXT           PCIMDAS_PACER_SRC(2)
104 #define PCIMDAS_PACER_SRC_INT           PCIMDAS_PACER_SRC(3)
105 #define PCIMDAS_PACER_SRC_MASK          (3 << 0)
106 #define PCIMDAS_BURST_REG               0x06
107 #define PCIMDAS_BURST_BME               BIT(1)
108 #define PCIMDAS_BURST_CONV_EN           BIT(0)
109 #define PCIMDAS_GAIN_REG                0x07
110 #define PCIMDAS_8254_BASE               0x08
111 #define PCIMDAS_USER_CNTR_REG           0x0c
112 #define PCIMDAS_USER_CNTR_CTR1_CLK_SEL  BIT(0)
113 #define PCIMDAS_RESIDUE_MSB_REG         0x0d
114 #define PCIMDAS_RESIDUE_LSB_REG         0x0e
115 
116 /*
117  * PCI Bar 4 Register map (dev->iobase)
118  */
119 #define PCIMDAS_8255_BASE               0x00
120 
121 static const struct comedi_lrange cb_pcimdas_ai_bip_range = {
122         4, {
123                 BIP_RANGE(10),
124                 BIP_RANGE(5),
125                 BIP_RANGE(2.5),
126                 BIP_RANGE(1.25)
127         }
128 };
129 
130 static const struct comedi_lrange cb_pcimdas_ai_uni_range = {
131         4, {
132                 UNI_RANGE(10),
133                 UNI_RANGE(5),
134                 UNI_RANGE(2.5),
135                 UNI_RANGE(1.25)
136         }
137 };
138 
139 /*
140  * The Analog Output range is not programmable. The DAC ranges are
141  * jumper-settable on the board. The settings are not software-readable.
142  */
143 static const struct comedi_lrange cb_pcimdas_ao_range = {
144         4, {
145                 BIP_RANGE(10),
146                 BIP_RANGE(5),
147                 UNI_RANGE(10),
148                 UNI_RANGE(5)
149         }
150 };
151 
152 /*
153  * this structure is for data unique to this hardware driver.  If
154  * several hardware drivers keep similar information in this structure,
155  * feel free to suggest moving the variable to the struct comedi_device
156  * struct.
157  */
158 struct cb_pcimdas_private {
159         /* base addresses */
160         unsigned long daqio;
161         unsigned long BADR3;
162 };
163 
164 static int cb_pcimdas_ai_eoc(struct comedi_device *dev,
165                              struct comedi_subdevice *s,
166                              struct comedi_insn *insn,
167                              unsigned long context)
168 {
169         struct cb_pcimdas_private *devpriv = dev->private;
170         unsigned int status;
171 
172         status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
173         if ((status & PCIMDAS_STATUS_EOC) == 0)
174                 return 0;
175         return -EBUSY;
176 }
177 
178 static int cb_pcimdas_ai_insn_read(struct comedi_device *dev,
179                                    struct comedi_subdevice *s,
180                                    struct comedi_insn *insn,
181                                    unsigned int *data)
182 {
183         struct cb_pcimdas_private *devpriv = dev->private;
184         unsigned int chan = CR_CHAN(insn->chanspec);
185         unsigned int range = CR_RANGE(insn->chanspec);
186         int n;
187         unsigned int d;
188         int ret;
189 
190         /*  only support sw initiated reads from a single channel */
191 
192         /* configure for sw initiated read */
193         d = inb(devpriv->BADR3 + PCIMDAS_PACER_REG);
194         if ((d & PCIMDAS_PACER_SRC_MASK) != PCIMDAS_PACER_SRC_POLLED) {
195                 d &= ~PCIMDAS_PACER_SRC_MASK;
196                 d |= PCIMDAS_PACER_SRC_POLLED;
197                 outb(d, devpriv->BADR3 + PCIMDAS_PACER_REG);
198         }
199 
200         /* set bursting off, conversions on */
201         outb(PCIMDAS_BURST_CONV_EN, devpriv->BADR3 + PCIMDAS_BURST_REG);
202 
203         /* set range */
204         outb(range, devpriv->BADR3 + PCIMDAS_GAIN_REG);
205 
206         /* set mux for single channel scan */
207         outb(PCIMDAS_MUX(chan, chan), devpriv->BADR3 + PCIMDAS_MUX_REG);
208 
209         /* convert n samples */
210         for (n = 0; n < insn->n; n++) {
211                 /* trigger conversion */
212                 outw(0, devpriv->daqio + PCIMDAS_AI_SOFTTRIG_REG);
213 
214                 /* wait for conversion to end */
215                 ret = comedi_timeout(dev, s, insn, cb_pcimdas_ai_eoc, 0);
216                 if (ret)
217                         return ret;
218 
219                 /* read data */
220                 data[n] = inw(devpriv->daqio + PCIMDAS_AI_REG);
221         }
222 
223         /* return the number of samples read/written */
224         return n;
225 }
226 
227 static int cb_pcimdas_ao_insn_write(struct comedi_device *dev,
228                                     struct comedi_subdevice *s,
229                                     struct comedi_insn *insn,
230                                     unsigned int *data)
231 {
232         struct cb_pcimdas_private *devpriv = dev->private;
233         unsigned int chan = CR_CHAN(insn->chanspec);
234         unsigned int val = s->readback[chan];
235         int i;
236 
237         for (i = 0; i < insn->n; i++) {
238                 val = data[i];
239                 outw(val, devpriv->daqio + PCIMDAS_AO_REG(chan));
240         }
241         s->readback[chan] = val;
242 
243         return insn->n;
244 }
245 
246 static int cb_pcimdas_di_insn_bits(struct comedi_device *dev,
247                                    struct comedi_subdevice *s,
248                                    struct comedi_insn *insn,
249                                    unsigned int *data)
250 {
251         struct cb_pcimdas_private *devpriv = dev->private;
252         unsigned int val;
253 
254         val = inb(devpriv->BADR3 + PCIMDAS_DI_DO_REG);
255 
256         data[1] = val & 0x0f;
257 
258         return insn->n;
259 }
260 
261 static int cb_pcimdas_do_insn_bits(struct comedi_device *dev,
262                                     struct comedi_subdevice *s,
263                                     struct comedi_insn *insn,
264                                     unsigned int *data)
265 {
266         struct cb_pcimdas_private *devpriv = dev->private;
267 
268         if (comedi_dio_update_state(s, data))
269                 outb(s->state, devpriv->BADR3 + PCIMDAS_DI_DO_REG);
270 
271         data[1] = s->state;
272 
273         return insn->n;
274 }
275 
276 static int cb_pcimdas_counter_insn_config(struct comedi_device *dev,
277                                           struct comedi_subdevice *s,
278                                           struct comedi_insn *insn,
279                                           unsigned int *data)
280 {
281         struct cb_pcimdas_private *devpriv = dev->private;
282         unsigned int ctrl;
283 
284         switch (data[0]) {
285         case INSN_CONFIG_SET_CLOCK_SRC:
286                 switch (data[1]) {
287                 case 0: /* internal 100 kHz clock */
288                         ctrl = PCIMDAS_USER_CNTR_CTR1_CLK_SEL;
289                         break;
290                 case 1: /* external clk on pin 21 */
291                         ctrl = 0;
292                         break;
293                 default:
294                         return -EINVAL;
295                 }
296                 outb(ctrl, devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
297                 break;
298         case INSN_CONFIG_GET_CLOCK_SRC:
299                 ctrl = inb(devpriv->BADR3 + PCIMDAS_USER_CNTR_REG);
300                 if (ctrl & PCIMDAS_USER_CNTR_CTR1_CLK_SEL) {
301                         data[1] = 0;
302                         data[2] = I8254_OSC_BASE_100KHZ;
303                 } else {
304                         data[1] = 1;
305                         data[2] = 0;
306                 }
307                 break;
308         default:
309                 return -EINVAL;
310         }
311 
312         return insn->n;
313 }
314 
315 static unsigned int cb_pcimdas_pacer_clk(struct comedi_device *dev)
316 {
317         struct cb_pcimdas_private *devpriv = dev->private;
318         unsigned int status;
319 
320         /* The Pacer Clock jumper selects a 10 MHz or 1 MHz clock */
321         status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
322         if (status & PCIMDAS_STATUS_CLK)
323                 return I8254_OSC_BASE_10MHZ;
324         return I8254_OSC_BASE_1MHZ;
325 }
326 
327 static bool cb_pcimdas_is_ai_se(struct comedi_device *dev)
328 {
329         struct cb_pcimdas_private *devpriv = dev->private;
330         unsigned int status;
331 
332         /*
333          * The number of Analog Input channels is set with the
334          * Analog Input Mode Switch on the board. The board can
335          * have 16 single-ended or 8 differential channels.
336          */
337         status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
338         return status & PCIMDAS_STATUS_MUX;
339 }
340 
341 static bool cb_pcimdas_is_ai_uni(struct comedi_device *dev)
342 {
343         struct cb_pcimdas_private *devpriv = dev->private;
344         unsigned int status;
345 
346         /*
347          * The Analog Input range polarity is set with the
348          * Analog Input Polarity Switch on the board. The
349          * inputs can be set to Unipolar or Bipolar ranges.
350          */
351         status = inb(devpriv->BADR3 + PCIMDAS_STATUS_REG);
352         return status & PCIMDAS_STATUS_UB;
353 }
354 
355 static int cb_pcimdas_auto_attach(struct comedi_device *dev,
356                                   unsigned long context_unused)
357 {
358         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
359         struct cb_pcimdas_private *devpriv;
360         struct comedi_subdevice *s;
361         int ret;
362 
363         devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
364         if (!devpriv)
365                 return -ENOMEM;
366 
367         ret = comedi_pci_enable(dev);
368         if (ret)
369                 return ret;
370 
371         devpriv->daqio = pci_resource_start(pcidev, 2);
372         devpriv->BADR3 = pci_resource_start(pcidev, 3);
373         dev->iobase = pci_resource_start(pcidev, 4);
374 
375         dev->pacer = comedi_8254_init(devpriv->BADR3 + PCIMDAS_8254_BASE,
376                                       cb_pcimdas_pacer_clk(dev),
377                                       I8254_IO8, 0);
378         if (!dev->pacer)
379                 return -ENOMEM;
380 
381         ret = comedi_alloc_subdevices(dev, 6);
382         if (ret)
383                 return ret;
384 
385         /* Analog Input subdevice */
386         s = &dev->subdevices[0];
387         s->type         = COMEDI_SUBD_AI;
388         s->subdev_flags = SDF_READABLE;
389         if (cb_pcimdas_is_ai_se(dev)) {
390                 s->subdev_flags |= SDF_GROUND;
391                 s->n_chan       = 16;
392         } else {
393                 s->subdev_flags |= SDF_DIFF;
394                 s->n_chan       = 8;
395         }
396         s->maxdata      = 0xffff;
397         s->range_table  = cb_pcimdas_is_ai_uni(dev) ? &cb_pcimdas_ai_uni_range
398                                                     : &cb_pcimdas_ai_bip_range;
399         s->insn_read    = cb_pcimdas_ai_insn_read;
400 
401         /* Analog Output subdevice */
402         s = &dev->subdevices[1];
403         s->type         = COMEDI_SUBD_AO;
404         s->subdev_flags = SDF_WRITABLE;
405         s->n_chan       = 2;
406         s->maxdata      = 0xfff;
407         s->range_table  = &cb_pcimdas_ao_range;
408         s->insn_write   = cb_pcimdas_ao_insn_write;
409 
410         ret = comedi_alloc_subdev_readback(s);
411         if (ret)
412                 return ret;
413 
414         /* Digital I/O subdevice */
415         s = &dev->subdevices[2];
416         ret = subdev_8255_init(dev, s, NULL, PCIMDAS_8255_BASE);
417         if (ret)
418                 return ret;
419 
420         /* Digital Input subdevice (main connector) */
421         s = &dev->subdevices[3];
422         s->type         = COMEDI_SUBD_DI;
423         s->subdev_flags = SDF_READABLE;
424         s->n_chan       = 4;
425         s->maxdata      = 1;
426         s->range_table  = &range_digital;
427         s->insn_bits    = cb_pcimdas_di_insn_bits;
428 
429         /* Digital Output subdevice (main connector) */
430         s = &dev->subdevices[4];
431         s->type         = COMEDI_SUBD_DO;
432         s->subdev_flags = SDF_WRITABLE;
433         s->n_chan       = 4;
434         s->maxdata      = 1;
435         s->range_table  = &range_digital;
436         s->insn_bits    = cb_pcimdas_do_insn_bits;
437 
438         /* Counter subdevice (8254) */
439         s = &dev->subdevices[5];
440         comedi_8254_subdevice_init(s, dev->pacer);
441 
442         dev->pacer->insn_config = cb_pcimdas_counter_insn_config;
443 
444         /* counters 1 and 2 are used internally for the pacer */
445         comedi_8254_set_busy(dev->pacer, 1, true);
446         comedi_8254_set_busy(dev->pacer, 2, true);
447 
448         return 0;
449 }
450 
451 static struct comedi_driver cb_pcimdas_driver = {
452         .driver_name    = "cb_pcimdas",
453         .module         = THIS_MODULE,
454         .auto_attach    = cb_pcimdas_auto_attach,
455         .detach         = comedi_pci_detach,
456 };
457 
458 static int cb_pcimdas_pci_probe(struct pci_dev *dev,
459                                 const struct pci_device_id *id)
460 {
461         return comedi_pci_auto_config(dev, &cb_pcimdas_driver,
462                                       id->driver_data);
463 }
464 
465 static const struct pci_device_id cb_pcimdas_pci_table[] = {
466         { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0056) },       /* PCIM-DAS1602/16 */
467         { PCI_DEVICE(PCI_VENDOR_ID_CB, 0x0115) },       /* PCIe-DAS1602/16 */
468         { 0 }
469 };
470 MODULE_DEVICE_TABLE(pci, cb_pcimdas_pci_table);
471 
472 static struct pci_driver cb_pcimdas_pci_driver = {
473         .name           = "cb_pcimdas",
474         .id_table       = cb_pcimdas_pci_table,
475         .probe          = cb_pcimdas_pci_probe,
476         .remove         = comedi_pci_auto_unconfig,
477 };
478 module_comedi_pci_driver(cb_pcimdas_driver, cb_pcimdas_pci_driver);
479 
480 MODULE_AUTHOR("Comedi http://www.comedi.org");
481 MODULE_DESCRIPTION("Comedi driver for PCIM-DAS1602/16 and PCIe-DAS1602/16");
482 MODULE_LICENSE("GPL");
483 

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