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Linux/drivers/staging/comedi/drivers/cb_pcidas.c

  1 /*
  2     comedi/drivers/cb_pcidas.c
  3 
  4     Developed by Ivan Martinez and Frank Mori Hess, with valuable help from
  5     David Schleef and the rest of the Comedi developers comunity.
  6 
  7     Copyright (C) 2001-2003 Ivan Martinez <imr@oersted.dtu.dk>
  8     Copyright (C) 2001,2002 Frank Mori Hess <fmhess@users.sourceforge.net>
  9 
 10     COMEDI - Linux Control and Measurement Device Interface
 11     Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
 12 
 13     This program is free software; you can redistribute it and/or modify
 14     it under the terms of the GNU General Public License as published by
 15     the Free Software Foundation; either version 2 of the License, or
 16     (at your option) any later version.
 17 
 18     This program is distributed in the hope that it will be useful,
 19     but WITHOUT ANY WARRANTY; without even the implied warranty of
 20     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 21     GNU General Public License for more details.
 22 */
 23 /*
 24 Driver: cb_pcidas
 25 Description: MeasurementComputing PCI-DAS series
 26   with the AMCC S5933 PCI controller
 27 Author: Ivan Martinez <imr@oersted.dtu.dk>,
 28   Frank Mori Hess <fmhess@users.sourceforge.net>
 29 Updated: 2003-3-11
 30 Devices: [Measurement Computing] PCI-DAS1602/16 (cb_pcidas),
 31   PCI-DAS1602/16jr, PCI-DAS1602/12, PCI-DAS1200, PCI-DAS1200jr,
 32   PCI-DAS1000, PCI-DAS1001, PCI_DAS1002
 33 
 34 Status:
 35   There are many reports of the driver being used with most of the
 36   supported cards. Despite no detailed log is maintained, it can
 37   be said that the driver is quite tested and stable.
 38 
 39   The boards may be autocalibrated using the comedi_calibrate
 40   utility.
 41 
 42 Configuration options: not applicable, uses PCI auto config
 43 
 44 For commands, the scanned channels must be consecutive
 45 (i.e. 4-5-6-7, 2-3-4,...), and must all have the same
 46 range and aref.
 47 
 48 AI Triggering:
 49    For start_src == TRIG_EXT, the A/D EXTERNAL TRIGGER IN (pin 45) is used.
 50    For 1602 series, the start_arg is interpreted as follows:
 51      start_arg == 0                   => gated trigger (level high)
 52      start_arg == CR_INVERT           => gated trigger (level low)
 53      start_arg == CR_EDGE             => Rising edge
 54      start_arg == CR_EDGE | CR_INVERT => Falling edge
 55    For the other boards the trigger will be done on rising edge
 56 */
 57 /*
 58 
 59 TODO:
 60 
 61 analog triggering on 1602 series
 62 */
 63 
 64 #include <linux/module.h>
 65 #include <linux/pci.h>
 66 #include <linux/delay.h>
 67 #include <linux/interrupt.h>
 68 
 69 #include "../comedidev.h"
 70 
 71 #include "8253.h"
 72 #include "8255.h"
 73 #include "amcc_s5933.h"
 74 #include "comedi_fc.h"
 75 
 76 #define AI_BUFFER_SIZE          1024    /* max ai fifo size */
 77 #define AO_BUFFER_SIZE          1024    /* max ao fifo size */
 78 #define NUM_CHANNELS_8800       8
 79 #define NUM_CHANNELS_7376       1
 80 #define NUM_CHANNELS_8402       2
 81 #define NUM_CHANNELS_DAC08      1
 82 
 83 /* Control/Status registers */
 84 #define INT_ADCFIFO             0       /* INTERRUPT / ADC FIFO register */
 85 #define   INT_EOS               0x1     /* int end of scan */
 86 #define   INT_FHF               0x2     /* int fifo half full */
 87 #define   INT_FNE               0x3     /* int fifo not empty */
 88 #define   INT_MASK              0x3     /* mask of int select bits */
 89 #define   INTE                  0x4     /* int enable */
 90 #define   DAHFIE                0x8     /* dac half full int enable */
 91 #define   EOAIE                 0x10    /* end of acq. int enable */
 92 #define   DAHFI                 0x20    /* dac half full status / clear */
 93 #define   EOAI                  0x40    /* end of acq. int status / clear */
 94 #define   INT                   0x80    /* int status / clear */
 95 #define   EOBI                  0x200   /* end of burst int status */
 96 #define   ADHFI                 0x400   /* half-full int status */
 97 #define   ADNEI                 0x800   /* fifo not empty int status (latch) */
 98 #define   ADNE                  0x1000  /* fifo not empty status (realtime) */
 99 #define   DAEMIE                0x1000  /* dac empty int enable */
100 #define   LADFUL                0x2000  /* fifo overflow / clear */
101 #define   DAEMI                 0x4000  /* dac fifo empty int status / clear */
102 
103 #define ADCMUX_CONT             2       /* ADC CHANNEL MUX AND CONTROL reg */
104 #define   BEGIN_SCAN(x)         ((x) & 0xf)
105 #define   END_SCAN(x)           (((x) & 0xf) << 4)
106 #define   GAIN_BITS(x)          (((x) & 0x3) << 8)
107 #define   UNIP                  0x800   /* Analog front-end unipolar mode */
108 #define   SE                    0x400   /* Inputs in single-ended mode */
109 #define   PACER_MASK            0x3000  /* pacer source bits */
110 #define   PACER_INT             0x1000  /* int. pacer */
111 #define   PACER_EXT_FALL        0x2000  /* ext. falling edge */
112 #define   PACER_EXT_RISE        0x3000  /* ext. rising edge */
113 #define   EOC                   0x4000  /* adc not busy */
114 
115 #define TRIG_CONTSTAT            4      /* TRIGGER CONTROL/STATUS register */
116 #define   SW_TRIGGER            0x1     /* software start trigger */
117 #define   EXT_TRIGGER           0x2     /* ext. start trigger */
118 #define   ANALOG_TRIGGER        0x3     /* ext. analog trigger */
119 #define   TRIGGER_MASK          0x3     /* start trigger mask */
120 #define   TGPOL                 0x04    /* invert trigger (1602 only) */
121 #define   TGSEL                 0x08    /* edge/level trigerred (1602 only) */
122 #define   TGEN                  0x10    /* enable external start trigger */
123 #define   BURSTE                0x20    /* burst mode enable */
124 #define   XTRCL                 0x80    /* clear external trigger */
125 
126 #define CALIBRATION_REG         6       /* CALIBRATION register */
127 #define   SELECT_8800_BIT       0x100   /* select 8800 caldac */
128 #define   SELECT_TRIMPOT_BIT    0x200   /* select ad7376 trim pot */
129 #define   SELECT_DAC08_BIT      0x400   /* select dac08 caldac */
130 #define   CAL_SRC_BITS(x)       (((x) & 0x7) << 11)
131 #define   CAL_EN_BIT            0x4000  /* calibration source enable */
132 #define   SERIAL_DATA_IN_BIT    0x8000  /* serial data bit going to caldac */
133 
134 #define DAC_CSR                 0x8     /* dac control and status register */
135 #define   DACEN                 0x02    /* dac enable */
136 #define   DAC_MODE_UPDATE_BOTH  0x80    /* update both dacs */
137 
138 static inline unsigned int DAC_RANGE(unsigned int channel, unsigned int range)
139 {
140         return (range & 0x3) << (8 + 2 * (channel & 0x1));
141 }
142 
143 static inline unsigned int DAC_RANGE_MASK(unsigned int channel)
144 {
145         return 0x3 << (8 + 2 * (channel & 0x1));
146 };
147 
148 /* bits for 1602 series only */
149 #define   DAC_EMPTY             0x1     /* fifo empty, read, write clear */
150 #define   DAC_START             0x4     /* start/arm fifo operations */
151 #define   DAC_PACER_MASK        0x18    /* bits that set pacer source */
152 #define   DAC_PACER_INT         0x8     /* int. pacing */
153 #define   DAC_PACER_EXT_FALL    0x10    /* ext. pacing, falling edge */
154 #define   DAC_PACER_EXT_RISE    0x18    /* ext. pacing, rising edge */
155 
156 static inline unsigned int DAC_CHAN_EN(unsigned int channel)
157 {
158         return 1 << (5 + (channel & 0x1));      /*  enable channel 0 or 1 */
159 };
160 
161 /* analog input fifo */
162 #define ADCDATA                 0       /* ADC DATA register */
163 #define ADCFIFOCLR              2       /* ADC FIFO CLEAR */
164 
165 /* pacer, counter, dio registers */
166 #define ADC8254                 0
167 #define DIO_8255                4
168 #define DAC8254                 8
169 
170 /* analog output registers for 100x, 1200 series */
171 static inline unsigned int DAC_DATA_REG(unsigned int channel)
172 {
173         return 2 * (channel & 0x1);
174 }
175 
176 /* analog output registers for 1602 series*/
177 #define DACDATA                 0       /* DAC DATA register */
178 #define DACFIFOCLR              2       /* DAC FIFO CLEAR */
179 
180 #define IS_UNIPOLAR             0x4     /* unipolar range mask */
181 
182 /* analog input ranges for most boards */
183 static const struct comedi_lrange cb_pcidas_ranges = {
184         8, {
185                 BIP_RANGE(10),
186                 BIP_RANGE(5),
187                 BIP_RANGE(2.5),
188                 BIP_RANGE(1.25),
189                 UNI_RANGE(10),
190                 UNI_RANGE(5),
191                 UNI_RANGE(2.5),
192                 UNI_RANGE(1.25)
193         }
194 };
195 
196 /* pci-das1001 input ranges */
197 static const struct comedi_lrange cb_pcidas_alt_ranges = {
198         8, {
199                 BIP_RANGE(10),
200                 BIP_RANGE(1),
201                 BIP_RANGE(0.1),
202                 BIP_RANGE(0.01),
203                 UNI_RANGE(10),
204                 UNI_RANGE(1),
205                 UNI_RANGE(0.1),
206                 UNI_RANGE(0.01)
207         }
208 };
209 
210 /* analog output ranges */
211 static const struct comedi_lrange cb_pcidas_ao_ranges = {
212         4, {
213                 BIP_RANGE(5),
214                 BIP_RANGE(10),
215                 UNI_RANGE(5),
216                 UNI_RANGE(10)
217         }
218 };
219 
220 enum trimpot_model {
221         AD7376,
222         AD8402,
223 };
224 
225 enum cb_pcidas_boardid {
226         BOARD_PCIDAS1602_16,
227         BOARD_PCIDAS1200,
228         BOARD_PCIDAS1602_12,
229         BOARD_PCIDAS1200_JR,
230         BOARD_PCIDAS1602_16_JR,
231         BOARD_PCIDAS1000,
232         BOARD_PCIDAS1001,
233         BOARD_PCIDAS1002,
234 };
235 
236 struct cb_pcidas_board {
237         const char *name;
238         int ai_nchan;           /*  Inputs in single-ended mode */
239         int ai_bits;            /*  analog input resolution */
240         int ai_speed;           /*  fastest conversion period in ns */
241         int ao_nchan;           /*  number of analog out channels */
242         int has_ao_fifo;        /*  analog output has fifo */
243         int ao_scan_speed;      /*  analog output scan speed for 1602 series */
244         int fifo_size;          /*  number of samples fifo can hold */
245         const struct comedi_lrange *ranges;
246         enum trimpot_model trimpot;
247         unsigned has_dac08:1;
248         unsigned is_1602:1;
249 };
250 
251 static const struct cb_pcidas_board cb_pcidas_boards[] = {
252         [BOARD_PCIDAS1602_16] = {
253                 .name           = "pci-das1602/16",
254                 .ai_nchan       = 16,
255                 .ai_bits        = 16,
256                 .ai_speed       = 5000,
257                 .ao_nchan       = 2,
258                 .has_ao_fifo    = 1,
259                 .ao_scan_speed  = 10000,
260                 .fifo_size      = 512,
261                 .ranges         = &cb_pcidas_ranges,
262                 .trimpot        = AD8402,
263                 .has_dac08      = 1,
264                 .is_1602        = 1,
265         },
266         [BOARD_PCIDAS1200] = {
267                 .name           = "pci-das1200",
268                 .ai_nchan       = 16,
269                 .ai_bits        = 12,
270                 .ai_speed       = 3200,
271                 .ao_nchan       = 2,
272                 .fifo_size      = 1024,
273                 .ranges         = &cb_pcidas_ranges,
274                 .trimpot        = AD7376,
275         },
276         [BOARD_PCIDAS1602_12] = {
277                 .name           = "pci-das1602/12",
278                 .ai_nchan       = 16,
279                 .ai_bits        = 12,
280                 .ai_speed       = 3200,
281                 .ao_nchan       = 2,
282                 .has_ao_fifo    = 1,
283                 .ao_scan_speed  = 4000,
284                 .fifo_size      = 1024,
285                 .ranges         = &cb_pcidas_ranges,
286                 .trimpot        = AD7376,
287                 .is_1602        = 1,
288         },
289         [BOARD_PCIDAS1200_JR] = {
290                 .name           = "pci-das1200/jr",
291                 .ai_nchan       = 16,
292                 .ai_bits        = 12,
293                 .ai_speed       = 3200,
294                 .fifo_size      = 1024,
295                 .ranges         = &cb_pcidas_ranges,
296                 .trimpot        = AD7376,
297         },
298         [BOARD_PCIDAS1602_16_JR] = {
299                 .name           = "pci-das1602/16/jr",
300                 .ai_nchan       = 16,
301                 .ai_bits        = 16,
302                 .ai_speed       = 5000,
303                 .fifo_size      = 512,
304                 .ranges         = &cb_pcidas_ranges,
305                 .trimpot        = AD8402,
306                 .has_dac08      = 1,
307                 .is_1602        = 1,
308         },
309         [BOARD_PCIDAS1000] = {
310                 .name           = "pci-das1000",
311                 .ai_nchan       = 16,
312                 .ai_bits        = 12,
313                 .ai_speed       = 4000,
314                 .fifo_size      = 1024,
315                 .ranges         = &cb_pcidas_ranges,
316                 .trimpot        = AD7376,
317         },
318         [BOARD_PCIDAS1001] = {
319                 .name           = "pci-das1001",
320                 .ai_nchan       = 16,
321                 .ai_bits        = 12,
322                 .ai_speed       = 6800,
323                 .ao_nchan       = 2,
324                 .fifo_size      = 1024,
325                 .ranges         = &cb_pcidas_alt_ranges,
326                 .trimpot        = AD7376,
327         },
328         [BOARD_PCIDAS1002] = {
329                 .name           = "pci-das1002",
330                 .ai_nchan       = 16,
331                 .ai_bits        = 12,
332                 .ai_speed       = 6800,
333                 .ao_nchan       = 2,
334                 .fifo_size      = 1024,
335                 .ranges         = &cb_pcidas_ranges,
336                 .trimpot        = AD7376,
337         },
338 };
339 
340 struct cb_pcidas_private {
341         /* base addresses */
342         unsigned long s5933_config;
343         unsigned long control_status;
344         unsigned long adc_fifo;
345         unsigned long pacer_counter_dio;
346         unsigned long ao_registers;
347         /* divisors of master clock for analog input pacing */
348         unsigned int divisor1;
349         unsigned int divisor2;
350         /* number of analog input samples remaining */
351         unsigned int count;
352         /* bits to write to registers */
353         unsigned int adc_fifo_bits;
354         unsigned int s5933_intcsr_bits;
355         unsigned int ao_control_bits;
356         /* fifo buffers */
357         unsigned short ai_buffer[AI_BUFFER_SIZE];
358         unsigned short ao_buffer[AO_BUFFER_SIZE];
359         /* divisors of master clock for analog output pacing */
360         unsigned int ao_divisor1;
361         unsigned int ao_divisor2;
362         /* number of analog output samples remaining */
363         unsigned int ao_count;
364         /* cached values for readback */
365         unsigned short ao_value[2];
366         unsigned int caldac_value[NUM_CHANNELS_8800];
367         unsigned int trimpot_value[NUM_CHANNELS_8402];
368         unsigned int dac08_value;
369         unsigned int calibration_source;
370 };
371 
372 static inline unsigned int cal_enable_bits(struct comedi_device *dev)
373 {
374         struct cb_pcidas_private *devpriv = dev->private;
375 
376         return CAL_EN_BIT | CAL_SRC_BITS(devpriv->calibration_source);
377 }
378 
379 static int cb_pcidas_ai_eoc(struct comedi_device *dev,
380                             struct comedi_subdevice *s,
381                             struct comedi_insn *insn,
382                             unsigned long context)
383 {
384         struct cb_pcidas_private *devpriv = dev->private;
385         unsigned int status;
386 
387         status = inw(devpriv->control_status + ADCMUX_CONT);
388         if (status & EOC)
389                 return 0;
390         return -EBUSY;
391 }
392 
393 static int cb_pcidas_ai_rinsn(struct comedi_device *dev,
394                               struct comedi_subdevice *s,
395                               struct comedi_insn *insn, unsigned int *data)
396 {
397         struct cb_pcidas_private *devpriv = dev->private;
398         unsigned int chan = CR_CHAN(insn->chanspec);
399         unsigned int range = CR_RANGE(insn->chanspec);
400         unsigned int aref = CR_AREF(insn->chanspec);
401         unsigned int bits;
402         int ret;
403         int n;
404 
405         /* enable calibration input if appropriate */
406         if (insn->chanspec & CR_ALT_SOURCE) {
407                 outw(cal_enable_bits(dev),
408                      devpriv->control_status + CALIBRATION_REG);
409                 chan = 0;
410         } else {
411                 outw(0, devpriv->control_status + CALIBRATION_REG);
412         }
413 
414         /* set mux limits and gain */
415         bits = BEGIN_SCAN(chan) | END_SCAN(chan) | GAIN_BITS(range);
416         /* set unipolar/bipolar */
417         if (range & IS_UNIPOLAR)
418                 bits |= UNIP;
419         /* set single-ended/differential */
420         if (aref != AREF_DIFF)
421                 bits |= SE;
422         outw(bits, devpriv->control_status + ADCMUX_CONT);
423 
424         /* clear fifo */
425         outw(0, devpriv->adc_fifo + ADCFIFOCLR);
426 
427         /* convert n samples */
428         for (n = 0; n < insn->n; n++) {
429                 /* trigger conversion */
430                 outw(0, devpriv->adc_fifo + ADCDATA);
431 
432                 /* wait for conversion to end */
433                 ret = comedi_timeout(dev, s, insn, cb_pcidas_ai_eoc, 0);
434                 if (ret)
435                         return ret;
436 
437                 /* read data */
438                 data[n] = inw(devpriv->adc_fifo + ADCDATA);
439         }
440 
441         /* return the number of samples read/written */
442         return n;
443 }
444 
445 static int ai_config_insn(struct comedi_device *dev, struct comedi_subdevice *s,
446                           struct comedi_insn *insn, unsigned int *data)
447 {
448         struct cb_pcidas_private *devpriv = dev->private;
449         int id = data[0];
450         unsigned int source = data[1];
451 
452         switch (id) {
453         case INSN_CONFIG_ALT_SOURCE:
454                 if (source >= 8) {
455                         dev_err(dev->class_dev,
456                                 "invalid calibration source: %i\n",
457                                 source);
458                         return -EINVAL;
459                 }
460                 devpriv->calibration_source = source;
461                 break;
462         default:
463                 return -EINVAL;
464         }
465         return insn->n;
466 }
467 
468 /* analog output insn for pcidas-1000 and 1200 series */
469 static int cb_pcidas_ao_nofifo_winsn(struct comedi_device *dev,
470                                      struct comedi_subdevice *s,
471                                      struct comedi_insn *insn,
472                                      unsigned int *data)
473 {
474         struct cb_pcidas_private *devpriv = dev->private;
475         unsigned int chan = CR_CHAN(insn->chanspec);
476         unsigned int range = CR_RANGE(insn->chanspec);
477         unsigned long flags;
478 
479         /* set channel and range */
480         spin_lock_irqsave(&dev->spinlock, flags);
481         devpriv->ao_control_bits &= (~DAC_MODE_UPDATE_BOTH &
482                                      ~DAC_RANGE_MASK(chan));
483         devpriv->ao_control_bits |= (DACEN | DAC_RANGE(chan, range));
484         outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
485         spin_unlock_irqrestore(&dev->spinlock, flags);
486 
487         /* remember value for readback */
488         devpriv->ao_value[chan] = data[0];
489 
490         /* send data */
491         outw(data[0], devpriv->ao_registers + DAC_DATA_REG(chan));
492 
493         return insn->n;
494 }
495 
496 /* analog output insn for pcidas-1602 series */
497 static int cb_pcidas_ao_fifo_winsn(struct comedi_device *dev,
498                                    struct comedi_subdevice *s,
499                                    struct comedi_insn *insn, unsigned int *data)
500 {
501         struct cb_pcidas_private *devpriv = dev->private;
502         unsigned int chan = CR_CHAN(insn->chanspec);
503         unsigned int range = CR_RANGE(insn->chanspec);
504         unsigned long flags;
505 
506         /* clear dac fifo */
507         outw(0, devpriv->ao_registers + DACFIFOCLR);
508 
509         /* set channel and range */
510         spin_lock_irqsave(&dev->spinlock, flags);
511         devpriv->ao_control_bits &= (~DAC_CHAN_EN(0) & ~DAC_CHAN_EN(1) &
512                                      ~DAC_RANGE_MASK(chan) & ~DAC_PACER_MASK);
513         devpriv->ao_control_bits |= (DACEN | DAC_RANGE(chan, range) |
514                                      DAC_CHAN_EN(chan) | DAC_START);
515         outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
516         spin_unlock_irqrestore(&dev->spinlock, flags);
517 
518         /* remember value for readback */
519         devpriv->ao_value[chan] = data[0];
520 
521         /* send data */
522         outw(data[0], devpriv->ao_registers + DACDATA);
523 
524         return insn->n;
525 }
526 
527 static int cb_pcidas_ao_readback_insn(struct comedi_device *dev,
528                                       struct comedi_subdevice *s,
529                                       struct comedi_insn *insn,
530                                       unsigned int *data)
531 {
532         struct cb_pcidas_private *devpriv = dev->private;
533 
534         data[0] = devpriv->ao_value[CR_CHAN(insn->chanspec)];
535 
536         return 1;
537 }
538 
539 static int wait_for_nvram_ready(unsigned long s5933_base_addr)
540 {
541         static const int timeout = 1000;
542         unsigned int i;
543 
544         for (i = 0; i < timeout; i++) {
545                 if ((inb(s5933_base_addr +
546                          AMCC_OP_REG_MCSR_NVCMD) & MCSR_NV_BUSY)
547                     == 0)
548                         return 0;
549                 udelay(1);
550         }
551         return -1;
552 }
553 
554 static int nvram_read(struct comedi_device *dev, unsigned int address,
555                         uint8_t *data)
556 {
557         struct cb_pcidas_private *devpriv = dev->private;
558         unsigned long iobase = devpriv->s5933_config;
559 
560         if (wait_for_nvram_ready(iobase) < 0)
561                 return -ETIMEDOUT;
562 
563         outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_LOW_ADDR,
564              iobase + AMCC_OP_REG_MCSR_NVCMD);
565         outb(address & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA);
566         outb(MCSR_NV_ENABLE | MCSR_NV_LOAD_HIGH_ADDR,
567              iobase + AMCC_OP_REG_MCSR_NVCMD);
568         outb((address >> 8) & 0xff, iobase + AMCC_OP_REG_MCSR_NVDATA);
569         outb(MCSR_NV_ENABLE | MCSR_NV_READ, iobase + AMCC_OP_REG_MCSR_NVCMD);
570 
571         if (wait_for_nvram_ready(iobase) < 0)
572                 return -ETIMEDOUT;
573 
574         *data = inb(iobase + AMCC_OP_REG_MCSR_NVDATA);
575 
576         return 0;
577 }
578 
579 static int eeprom_read_insn(struct comedi_device *dev,
580                             struct comedi_subdevice *s,
581                             struct comedi_insn *insn, unsigned int *data)
582 {
583         uint8_t nvram_data;
584         int retval;
585 
586         retval = nvram_read(dev, CR_CHAN(insn->chanspec), &nvram_data);
587         if (retval < 0)
588                 return retval;
589 
590         data[0] = nvram_data;
591 
592         return 1;
593 }
594 
595 static void write_calibration_bitstream(struct comedi_device *dev,
596                                         unsigned int register_bits,
597                                         unsigned int bitstream,
598                                         unsigned int bitstream_length)
599 {
600         struct cb_pcidas_private *devpriv = dev->private;
601         static const int write_delay = 1;
602         unsigned int bit;
603 
604         for (bit = 1 << (bitstream_length - 1); bit; bit >>= 1) {
605                 if (bitstream & bit)
606                         register_bits |= SERIAL_DATA_IN_BIT;
607                 else
608                         register_bits &= ~SERIAL_DATA_IN_BIT;
609                 udelay(write_delay);
610                 outw(register_bits, devpriv->control_status + CALIBRATION_REG);
611         }
612 }
613 
614 static int caldac_8800_write(struct comedi_device *dev, unsigned int address,
615                              uint8_t value)
616 {
617         struct cb_pcidas_private *devpriv = dev->private;
618         static const int num_caldac_channels = 8;
619         static const int bitstream_length = 11;
620         unsigned int bitstream = ((address & 0x7) << 8) | value;
621         static const int caldac_8800_udelay = 1;
622 
623         if (address >= num_caldac_channels) {
624                 dev_err(dev->class_dev, "illegal caldac channel\n");
625                 return -1;
626         }
627 
628         if (value == devpriv->caldac_value[address])
629                 return 1;
630 
631         devpriv->caldac_value[address] = value;
632 
633         write_calibration_bitstream(dev, cal_enable_bits(dev), bitstream,
634                                     bitstream_length);
635 
636         udelay(caldac_8800_udelay);
637         outw(cal_enable_bits(dev) | SELECT_8800_BIT,
638              devpriv->control_status + CALIBRATION_REG);
639         udelay(caldac_8800_udelay);
640         outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
641 
642         return 1;
643 }
644 
645 static int caldac_write_insn(struct comedi_device *dev,
646                              struct comedi_subdevice *s,
647                              struct comedi_insn *insn, unsigned int *data)
648 {
649         const unsigned int channel = CR_CHAN(insn->chanspec);
650 
651         return caldac_8800_write(dev, channel, data[0]);
652 }
653 
654 static int caldac_read_insn(struct comedi_device *dev,
655                             struct comedi_subdevice *s,
656                             struct comedi_insn *insn, unsigned int *data)
657 {
658         struct cb_pcidas_private *devpriv = dev->private;
659 
660         data[0] = devpriv->caldac_value[CR_CHAN(insn->chanspec)];
661 
662         return 1;
663 }
664 
665 /* 1602/16 pregain offset */
666 static void dac08_write(struct comedi_device *dev, unsigned int value)
667 {
668         struct cb_pcidas_private *devpriv = dev->private;
669         unsigned long cal_reg;
670 
671         if (devpriv->dac08_value != value) {
672                 devpriv->dac08_value = value;
673 
674                 cal_reg = devpriv->control_status + CALIBRATION_REG;
675 
676                 value &= 0xff;
677                 value |= cal_enable_bits(dev);
678 
679                 /* latch the new value into the caldac */
680                 outw(value, cal_reg);
681                 udelay(1);
682                 outw(value | SELECT_DAC08_BIT, cal_reg);
683                 udelay(1);
684                 outw(value, cal_reg);
685                 udelay(1);
686         }
687 }
688 
689 static int dac08_write_insn(struct comedi_device *dev,
690                             struct comedi_subdevice *s,
691                             struct comedi_insn *insn, unsigned int *data)
692 {
693         int i;
694 
695         for (i = 0; i < insn->n; i++)
696                 dac08_write(dev, data[i]);
697 
698         return insn->n;
699 }
700 
701 static int dac08_read_insn(struct comedi_device *dev,
702                            struct comedi_subdevice *s, struct comedi_insn *insn,
703                            unsigned int *data)
704 {
705         struct cb_pcidas_private *devpriv = dev->private;
706 
707         data[0] = devpriv->dac08_value;
708 
709         return 1;
710 }
711 
712 static int trimpot_7376_write(struct comedi_device *dev, uint8_t value)
713 {
714         struct cb_pcidas_private *devpriv = dev->private;
715         static const int bitstream_length = 7;
716         unsigned int bitstream = value & 0x7f;
717         unsigned int register_bits;
718         static const int ad7376_udelay = 1;
719 
720         register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT;
721         udelay(ad7376_udelay);
722         outw(register_bits, devpriv->control_status + CALIBRATION_REG);
723 
724         write_calibration_bitstream(dev, register_bits, bitstream,
725                                     bitstream_length);
726 
727         udelay(ad7376_udelay);
728         outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
729 
730         return 0;
731 }
732 
733 /* For 1602/16 only
734  * ch 0 : adc gain
735  * ch 1 : adc postgain offset */
736 static int trimpot_8402_write(struct comedi_device *dev, unsigned int channel,
737                               uint8_t value)
738 {
739         struct cb_pcidas_private *devpriv = dev->private;
740         static const int bitstream_length = 10;
741         unsigned int bitstream = ((channel & 0x3) << 8) | (value & 0xff);
742         unsigned int register_bits;
743         static const int ad8402_udelay = 1;
744 
745         register_bits = cal_enable_bits(dev) | SELECT_TRIMPOT_BIT;
746         udelay(ad8402_udelay);
747         outw(register_bits, devpriv->control_status + CALIBRATION_REG);
748 
749         write_calibration_bitstream(dev, register_bits, bitstream,
750                                     bitstream_length);
751 
752         udelay(ad8402_udelay);
753         outw(cal_enable_bits(dev), devpriv->control_status + CALIBRATION_REG);
754 
755         return 0;
756 }
757 
758 static int cb_pcidas_trimpot_write(struct comedi_device *dev,
759                                    unsigned int channel, unsigned int value)
760 {
761         const struct cb_pcidas_board *thisboard = comedi_board(dev);
762         struct cb_pcidas_private *devpriv = dev->private;
763 
764         if (devpriv->trimpot_value[channel] == value)
765                 return 1;
766 
767         devpriv->trimpot_value[channel] = value;
768         switch (thisboard->trimpot) {
769         case AD7376:
770                 trimpot_7376_write(dev, value);
771                 break;
772         case AD8402:
773                 trimpot_8402_write(dev, channel, value);
774                 break;
775         default:
776                 dev_err(dev->class_dev, "driver bug?\n");
777                 return -1;
778         }
779 
780         return 1;
781 }
782 
783 static int trimpot_write_insn(struct comedi_device *dev,
784                               struct comedi_subdevice *s,
785                               struct comedi_insn *insn, unsigned int *data)
786 {
787         unsigned int channel = CR_CHAN(insn->chanspec);
788 
789         return cb_pcidas_trimpot_write(dev, channel, data[0]);
790 }
791 
792 static int trimpot_read_insn(struct comedi_device *dev,
793                              struct comedi_subdevice *s,
794                              struct comedi_insn *insn, unsigned int *data)
795 {
796         struct cb_pcidas_private *devpriv = dev->private;
797         unsigned int channel = CR_CHAN(insn->chanspec);
798 
799         data[0] = devpriv->trimpot_value[channel];
800 
801         return 1;
802 }
803 
804 static int cb_pcidas_ai_check_chanlist(struct comedi_device *dev,
805                                        struct comedi_subdevice *s,
806                                        struct comedi_cmd *cmd)
807 {
808         unsigned int chan0 = CR_CHAN(cmd->chanlist[0]);
809         unsigned int range0 = CR_RANGE(cmd->chanlist[0]);
810         int i;
811 
812         for (i = 1; i < cmd->chanlist_len; i++) {
813                 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
814                 unsigned int range = CR_RANGE(cmd->chanlist[i]);
815 
816                 if (chan != (chan0 + i) % s->n_chan) {
817                         dev_dbg(dev->class_dev,
818                                 "entries in chanlist must be consecutive channels, counting upwards\n");
819                         return -EINVAL;
820                 }
821 
822                 if (range != range0) {
823                         dev_dbg(dev->class_dev,
824                                 "entries in chanlist must all have the same gain\n");
825                         return -EINVAL;
826                 }
827         }
828         return 0;
829 }
830 
831 static int cb_pcidas_ai_cmdtest(struct comedi_device *dev,
832                                 struct comedi_subdevice *s,
833                                 struct comedi_cmd *cmd)
834 {
835         const struct cb_pcidas_board *thisboard = comedi_board(dev);
836         struct cb_pcidas_private *devpriv = dev->private;
837         int err = 0;
838         unsigned int arg;
839 
840         /* Step 1 : check if triggers are trivially valid */
841 
842         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW | TRIG_EXT);
843         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
844                                         TRIG_FOLLOW | TRIG_TIMER | TRIG_EXT);
845         err |= cfc_check_trigger_src(&cmd->convert_src,
846                                         TRIG_TIMER | TRIG_NOW | TRIG_EXT);
847         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
848         err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
849 
850         if (err)
851                 return 1;
852 
853         /* Step 2a : make sure trigger sources are unique */
854 
855         err |= cfc_check_trigger_is_unique(cmd->start_src);
856         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
857         err |= cfc_check_trigger_is_unique(cmd->convert_src);
858         err |= cfc_check_trigger_is_unique(cmd->stop_src);
859 
860         /* Step 2b : and mutually compatible */
861 
862         if (cmd->scan_begin_src == TRIG_FOLLOW && cmd->convert_src == TRIG_NOW)
863                 err |= -EINVAL;
864         if (cmd->scan_begin_src != TRIG_FOLLOW && cmd->convert_src != TRIG_NOW)
865                 err |= -EINVAL;
866         if (cmd->start_src == TRIG_EXT &&
867             (cmd->convert_src == TRIG_EXT || cmd->scan_begin_src == TRIG_EXT))
868                 err |= -EINVAL;
869 
870         if (err)
871                 return 2;
872 
873         /* Step 3: check if arguments are trivially valid */
874 
875         switch (cmd->start_src) {
876         case TRIG_NOW:
877                 err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
878                 break;
879         case TRIG_EXT:
880                 /* External trigger, only CR_EDGE and CR_INVERT flags allowed */
881                 if ((cmd->start_arg
882                      & (CR_FLAGS_MASK & ~(CR_EDGE | CR_INVERT))) != 0) {
883                         cmd->start_arg &= ~(CR_FLAGS_MASK &
884                                                 ~(CR_EDGE | CR_INVERT));
885                         err |= -EINVAL;
886                 }
887                 if (!thisboard->is_1602 && (cmd->start_arg & CR_INVERT)) {
888                         cmd->start_arg &= (CR_FLAGS_MASK & ~CR_INVERT);
889                         err |= -EINVAL;
890                 }
891                 break;
892         }
893 
894         if (cmd->scan_begin_src == TRIG_TIMER)
895                 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
896                                 thisboard->ai_speed * cmd->chanlist_len);
897 
898         if (cmd->convert_src == TRIG_TIMER)
899                 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
900                                                  thisboard->ai_speed);
901 
902         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
903 
904         if (cmd->stop_src == TRIG_NONE)
905                 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
906 
907         if (err)
908                 return 3;
909 
910         /* step 4: fix up any arguments */
911 
912         if (cmd->scan_begin_src == TRIG_TIMER) {
913                 arg = cmd->scan_begin_arg;
914                 i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
915                                           &devpriv->divisor1,
916                                           &devpriv->divisor2,
917                                           &arg, cmd->flags);
918                 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
919         }
920         if (cmd->convert_src == TRIG_TIMER) {
921                 arg = cmd->convert_arg;
922                 i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
923                                           &devpriv->divisor1,
924                                           &devpriv->divisor2,
925                                           &arg, cmd->flags);
926                 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
927         }
928 
929         if (err)
930                 return 4;
931 
932         /* Step 5: check channel list if it exists */
933         if (cmd->chanlist && cmd->chanlist_len > 0)
934                 err |= cb_pcidas_ai_check_chanlist(dev, s, cmd);
935 
936         if (err)
937                 return 5;
938 
939         return 0;
940 }
941 
942 static void cb_pcidas_ai_load_counters(struct comedi_device *dev)
943 {
944         struct cb_pcidas_private *devpriv = dev->private;
945         unsigned long timer_base = devpriv->pacer_counter_dio + ADC8254;
946 
947         i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
948         i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
949 
950         i8254_write(timer_base, 0, 1, devpriv->divisor1);
951         i8254_write(timer_base, 0, 2, devpriv->divisor2);
952 }
953 
954 static int cb_pcidas_ai_cmd(struct comedi_device *dev,
955                             struct comedi_subdevice *s)
956 {
957         const struct cb_pcidas_board *thisboard = comedi_board(dev);
958         struct cb_pcidas_private *devpriv = dev->private;
959         struct comedi_async *async = s->async;
960         struct comedi_cmd *cmd = &async->cmd;
961         unsigned int bits;
962         unsigned long flags;
963 
964         /*  make sure CAL_EN_BIT is disabled */
965         outw(0, devpriv->control_status + CALIBRATION_REG);
966         /*  initialize before settings pacer source and count values */
967         outw(0, devpriv->control_status + TRIG_CONTSTAT);
968         /*  clear fifo */
969         outw(0, devpriv->adc_fifo + ADCFIFOCLR);
970 
971         /*  set mux limits, gain and pacer source */
972         bits = BEGIN_SCAN(CR_CHAN(cmd->chanlist[0])) |
973             END_SCAN(CR_CHAN(cmd->chanlist[cmd->chanlist_len - 1])) |
974             GAIN_BITS(CR_RANGE(cmd->chanlist[0]));
975         /*  set unipolar/bipolar */
976         if (CR_RANGE(cmd->chanlist[0]) & IS_UNIPOLAR)
977                 bits |= UNIP;
978         /*  set singleended/differential */
979         if (CR_AREF(cmd->chanlist[0]) != AREF_DIFF)
980                 bits |= SE;
981         /*  set pacer source */
982         if (cmd->convert_src == TRIG_EXT || cmd->scan_begin_src == TRIG_EXT)
983                 bits |= PACER_EXT_RISE;
984         else
985                 bits |= PACER_INT;
986         outw(bits, devpriv->control_status + ADCMUX_CONT);
987 
988         /*  load counters */
989         if (cmd->scan_begin_src == TRIG_TIMER || cmd->convert_src == TRIG_TIMER)
990                 cb_pcidas_ai_load_counters(dev);
991 
992         /*  set number of conversions */
993         if (cmd->stop_src == TRIG_COUNT)
994                 devpriv->count = cmd->chanlist_len * cmd->stop_arg;
995         /*  enable interrupts */
996         spin_lock_irqsave(&dev->spinlock, flags);
997         devpriv->adc_fifo_bits |= INTE;
998         devpriv->adc_fifo_bits &= ~INT_MASK;
999         if (cmd->flags & TRIG_WAKE_EOS) {
1000                 if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1) {
1001                         /* interrupt end of burst */
1002                         devpriv->adc_fifo_bits |= INT_EOS;
1003                 } else {
1004                         /* interrupt fifo not empty */
1005                         devpriv->adc_fifo_bits |= INT_FNE;
1006                 }
1007         } else {
1008                 /* interrupt fifo half full */
1009                 devpriv->adc_fifo_bits |= INT_FHF;
1010         }
1011 
1012         /*  enable (and clear) interrupts */
1013         outw(devpriv->adc_fifo_bits | EOAI | INT | LADFUL,
1014              devpriv->control_status + INT_ADCFIFO);
1015         spin_unlock_irqrestore(&dev->spinlock, flags);
1016 
1017         /*  set start trigger and burst mode */
1018         bits = 0;
1019         if (cmd->start_src == TRIG_NOW) {
1020                 bits |= SW_TRIGGER;
1021         } else {        /* TRIG_EXT */
1022                 bits |= EXT_TRIGGER | TGEN | XTRCL;
1023                 if (thisboard->is_1602) {
1024                         if (cmd->start_arg & CR_INVERT)
1025                                 bits |= TGPOL;
1026                         if (cmd->start_arg & CR_EDGE)
1027                                 bits |= TGSEL;
1028                 }
1029         }
1030         if (cmd->convert_src == TRIG_NOW && cmd->chanlist_len > 1)
1031                 bits |= BURSTE;
1032         outw(bits, devpriv->control_status + TRIG_CONTSTAT);
1033 
1034         return 0;
1035 }
1036 
1037 static int cb_pcidas_ao_check_chanlist(struct comedi_device *dev,
1038                                        struct comedi_subdevice *s,
1039                                        struct comedi_cmd *cmd)
1040 {
1041         unsigned int chan0 = CR_CHAN(cmd->chanlist[0]);
1042 
1043         if (cmd->chanlist_len > 1) {
1044                 unsigned int chan1 = CR_CHAN(cmd->chanlist[1]);
1045 
1046                 if (chan0 != 0 || chan1 != 1) {
1047                         dev_dbg(dev->class_dev,
1048                                 "channels must be ordered channel 0, channel 1 in chanlist\n");
1049                         return -EINVAL;
1050                 }
1051         }
1052 
1053         return 0;
1054 }
1055 
1056 static int cb_pcidas_ao_cmdtest(struct comedi_device *dev,
1057                                 struct comedi_subdevice *s,
1058                                 struct comedi_cmd *cmd)
1059 {
1060         const struct cb_pcidas_board *thisboard = comedi_board(dev);
1061         struct cb_pcidas_private *devpriv = dev->private;
1062         int err = 0;
1063         unsigned int arg;
1064 
1065         /* Step 1 : check if triggers are trivially valid */
1066 
1067         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_INT);
1068         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
1069                                         TRIG_TIMER | TRIG_EXT);
1070         err |= cfc_check_trigger_src(&cmd->convert_src, TRIG_NOW);
1071         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
1072         err |= cfc_check_trigger_src(&cmd->stop_src, TRIG_COUNT | TRIG_NONE);
1073 
1074         if (err)
1075                 return 1;
1076 
1077         /* Step 2a : make sure trigger sources are unique */
1078 
1079         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
1080         err |= cfc_check_trigger_is_unique(cmd->stop_src);
1081 
1082         /* Step 2b : and mutually compatible */
1083 
1084         if (err)
1085                 return 2;
1086 
1087         /* Step 3: check if arguments are trivially valid */
1088 
1089         err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
1090 
1091         if (cmd->scan_begin_src == TRIG_TIMER)
1092                 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
1093                                                  thisboard->ao_scan_speed);
1094 
1095         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
1096 
1097         if (cmd->stop_src == TRIG_NONE)
1098                 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
1099 
1100         if (err)
1101                 return 3;
1102 
1103         /* step 4: fix up any arguments */
1104 
1105         if (cmd->scan_begin_src == TRIG_TIMER) {
1106                 arg = cmd->scan_begin_arg;
1107                 i8253_cascade_ns_to_timer(I8254_OSC_BASE_10MHZ,
1108                                           &devpriv->ao_divisor1,
1109                                           &devpriv->ao_divisor2,
1110                                           &arg, cmd->flags);
1111                 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
1112         }
1113 
1114         if (err)
1115                 return 4;
1116 
1117         /* Step 5: check channel list if it exists */
1118         if (cmd->chanlist && cmd->chanlist_len > 0)
1119                 err |= cb_pcidas_ao_check_chanlist(dev, s, cmd);
1120 
1121         if (err)
1122                 return 5;
1123 
1124         return 0;
1125 }
1126 
1127 /* cancel analog input command */
1128 static int cb_pcidas_cancel(struct comedi_device *dev,
1129                             struct comedi_subdevice *s)
1130 {
1131         struct cb_pcidas_private *devpriv = dev->private;
1132         unsigned long flags;
1133 
1134         spin_lock_irqsave(&dev->spinlock, flags);
1135         /*  disable interrupts */
1136         devpriv->adc_fifo_bits &= ~INTE & ~EOAIE;
1137         outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO);
1138         spin_unlock_irqrestore(&dev->spinlock, flags);
1139 
1140         /*  disable start trigger source and burst mode */
1141         outw(0, devpriv->control_status + TRIG_CONTSTAT);
1142         /*  software pacer source */
1143         outw(0, devpriv->control_status + ADCMUX_CONT);
1144 
1145         return 0;
1146 }
1147 
1148 static int cb_pcidas_ao_inttrig(struct comedi_device *dev,
1149                                 struct comedi_subdevice *s,
1150                                 unsigned int trig_num)
1151 {
1152         const struct cb_pcidas_board *thisboard = comedi_board(dev);
1153         struct cb_pcidas_private *devpriv = dev->private;
1154         unsigned int num_bytes, num_points = thisboard->fifo_size;
1155         struct comedi_async *async = s->async;
1156         struct comedi_cmd *cmd = &s->async->cmd;
1157         unsigned long flags;
1158 
1159         if (trig_num != cmd->start_arg)
1160                 return -EINVAL;
1161 
1162         /*  load up fifo */
1163         if (cmd->stop_src == TRIG_COUNT && devpriv->ao_count < num_points)
1164                 num_points = devpriv->ao_count;
1165 
1166         num_bytes = cfc_read_array_from_buffer(s, devpriv->ao_buffer,
1167                                                num_points * sizeof(short));
1168         num_points = num_bytes / sizeof(short);
1169 
1170         if (cmd->stop_src == TRIG_COUNT)
1171                 devpriv->ao_count -= num_points;
1172         /*  write data to board's fifo */
1173         outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer, num_bytes);
1174 
1175         /*  enable dac half-full and empty interrupts */
1176         spin_lock_irqsave(&dev->spinlock, flags);
1177         devpriv->adc_fifo_bits |= DAEMIE | DAHFIE;
1178 
1179         /*  enable and clear interrupts */
1180         outw(devpriv->adc_fifo_bits | DAEMI | DAHFI,
1181              devpriv->control_status + INT_ADCFIFO);
1182 
1183         /*  start dac */
1184         devpriv->ao_control_bits |= DAC_START | DACEN | DAC_EMPTY;
1185         outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1186 
1187         spin_unlock_irqrestore(&dev->spinlock, flags);
1188 
1189         async->inttrig = NULL;
1190 
1191         return 0;
1192 }
1193 
1194 static void cb_pcidas_ao_load_counters(struct comedi_device *dev)
1195 {
1196         struct cb_pcidas_private *devpriv = dev->private;
1197         unsigned long timer_base = devpriv->pacer_counter_dio + DAC8254;
1198 
1199         i8254_set_mode(timer_base, 0, 1, I8254_MODE2 | I8254_BINARY);
1200         i8254_set_mode(timer_base, 0, 2, I8254_MODE2 | I8254_BINARY);
1201 
1202         i8254_write(timer_base, 0, 1, devpriv->ao_divisor1);
1203         i8254_write(timer_base, 0, 2, devpriv->ao_divisor2);
1204 }
1205 
1206 static int cb_pcidas_ao_cmd(struct comedi_device *dev,
1207                             struct comedi_subdevice *s)
1208 {
1209         struct cb_pcidas_private *devpriv = dev->private;
1210         struct comedi_async *async = s->async;
1211         struct comedi_cmd *cmd = &async->cmd;
1212         unsigned int i;
1213         unsigned long flags;
1214 
1215         /*  set channel limits, gain */
1216         spin_lock_irqsave(&dev->spinlock, flags);
1217         for (i = 0; i < cmd->chanlist_len; i++) {
1218                 /*  enable channel */
1219                 devpriv->ao_control_bits |=
1220                     DAC_CHAN_EN(CR_CHAN(cmd->chanlist[i]));
1221                 /*  set range */
1222                 devpriv->ao_control_bits |= DAC_RANGE(CR_CHAN(cmd->chanlist[i]),
1223                                                       CR_RANGE(cmd->
1224                                                                chanlist[i]));
1225         }
1226 
1227         /*  disable analog out before settings pacer source and count values */
1228         outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1229         spin_unlock_irqrestore(&dev->spinlock, flags);
1230 
1231         /*  clear fifo */
1232         outw(0, devpriv->ao_registers + DACFIFOCLR);
1233 
1234         /*  load counters */
1235         if (cmd->scan_begin_src == TRIG_TIMER)
1236                 cb_pcidas_ao_load_counters(dev);
1237 
1238         /*  set number of conversions */
1239         if (cmd->stop_src == TRIG_COUNT)
1240                 devpriv->ao_count = cmd->chanlist_len * cmd->stop_arg;
1241         /*  set pacer source */
1242         spin_lock_irqsave(&dev->spinlock, flags);
1243         switch (cmd->scan_begin_src) {
1244         case TRIG_TIMER:
1245                 devpriv->ao_control_bits |= DAC_PACER_INT;
1246                 break;
1247         case TRIG_EXT:
1248                 devpriv->ao_control_bits |= DAC_PACER_EXT_RISE;
1249                 break;
1250         default:
1251                 spin_unlock_irqrestore(&dev->spinlock, flags);
1252                 dev_err(dev->class_dev, "error setting dac pacer source\n");
1253                 return -1;
1254         }
1255         spin_unlock_irqrestore(&dev->spinlock, flags);
1256 
1257         async->inttrig = cb_pcidas_ao_inttrig;
1258 
1259         return 0;
1260 }
1261 
1262 /* cancel analog output command */
1263 static int cb_pcidas_ao_cancel(struct comedi_device *dev,
1264                                struct comedi_subdevice *s)
1265 {
1266         struct cb_pcidas_private *devpriv = dev->private;
1267         unsigned long flags;
1268 
1269         spin_lock_irqsave(&dev->spinlock, flags);
1270         /*  disable interrupts */
1271         devpriv->adc_fifo_bits &= ~DAHFIE & ~DAEMIE;
1272         outw(devpriv->adc_fifo_bits, devpriv->control_status + INT_ADCFIFO);
1273 
1274         /*  disable output */
1275         devpriv->ao_control_bits &= ~DACEN & ~DAC_PACER_MASK;
1276         outw(devpriv->ao_control_bits, devpriv->control_status + DAC_CSR);
1277         spin_unlock_irqrestore(&dev->spinlock, flags);
1278 
1279         return 0;
1280 }
1281 
1282 static void handle_ao_interrupt(struct comedi_device *dev, unsigned int status)
1283 {
1284         const struct cb_pcidas_board *thisboard = comedi_board(dev);
1285         struct cb_pcidas_private *devpriv = dev->private;
1286         struct comedi_subdevice *s = dev->write_subdev;
1287         struct comedi_async *async = s->async;
1288         struct comedi_cmd *cmd = &async->cmd;
1289         unsigned int half_fifo = thisboard->fifo_size / 2;
1290         unsigned int num_points;
1291         unsigned long flags;
1292 
1293         if (status & DAEMI) {
1294                 /*  clear dac empty interrupt latch */
1295                 spin_lock_irqsave(&dev->spinlock, flags);
1296                 outw(devpriv->adc_fifo_bits | DAEMI,
1297                      devpriv->control_status + INT_ADCFIFO);
1298                 spin_unlock_irqrestore(&dev->spinlock, flags);
1299                 if (inw(devpriv->ao_registers + DAC_CSR) & DAC_EMPTY) {
1300                         if (cmd->stop_src == TRIG_NONE ||
1301                             (cmd->stop_src == TRIG_COUNT
1302                              && devpriv->ao_count)) {
1303                                 dev_err(dev->class_dev, "dac fifo underflow\n");
1304                                 async->events |= COMEDI_CB_ERROR;
1305                         }
1306                         async->events |= COMEDI_CB_EOA;
1307                 }
1308         } else if (status & DAHFI) {
1309                 unsigned int num_bytes;
1310 
1311                 /*  figure out how many points we are writing to fifo */
1312                 num_points = half_fifo;
1313                 if (cmd->stop_src == TRIG_COUNT &&
1314                     devpriv->ao_count < num_points)
1315                         num_points = devpriv->ao_count;
1316                 num_bytes =
1317                     cfc_read_array_from_buffer(s, devpriv->ao_buffer,
1318                                                num_points * sizeof(short));
1319                 num_points = num_bytes / sizeof(short);
1320 
1321                 if (cmd->stop_src == TRIG_COUNT)
1322                         devpriv->ao_count -= num_points;
1323                 /*  write data to board's fifo */
1324                 outsw(devpriv->ao_registers + DACDATA, devpriv->ao_buffer,
1325                       num_points);
1326                 /*  clear half-full interrupt latch */
1327                 spin_lock_irqsave(&dev->spinlock, flags);
1328                 outw(devpriv->adc_fifo_bits | DAHFI,
1329                      devpriv->control_status + INT_ADCFIFO);
1330                 spin_unlock_irqrestore(&dev->spinlock, flags);
1331         }
1332 
1333         cfc_handle_events(dev, s);
1334 }
1335 
1336 static irqreturn_t cb_pcidas_interrupt(int irq, void *d)
1337 {
1338         struct comedi_device *dev = (struct comedi_device *)d;
1339         const struct cb_pcidas_board *thisboard = comedi_board(dev);
1340         struct cb_pcidas_private *devpriv = dev->private;
1341         struct comedi_subdevice *s = dev->read_subdev;
1342         struct comedi_async *async;
1343         struct comedi_cmd *cmd;
1344         int status, s5933_status;
1345         int half_fifo = thisboard->fifo_size / 2;
1346         unsigned int num_samples, i;
1347         static const int timeout = 10000;
1348         unsigned long flags;
1349 
1350         if (!dev->attached)
1351                 return IRQ_NONE;
1352 
1353         async = s->async;
1354         cmd = &async->cmd;
1355 
1356         s5933_status = inl(devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1357 
1358         if ((INTCSR_INTR_ASSERTED & s5933_status) == 0)
1359                 return IRQ_NONE;
1360 
1361         /*  make sure mailbox 4 is empty */
1362         inl_p(devpriv->s5933_config + AMCC_OP_REG_IMB4);
1363         /*  clear interrupt on amcc s5933 */
1364         outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS,
1365              devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1366 
1367         status = inw(devpriv->control_status + INT_ADCFIFO);
1368 
1369         /*  check for analog output interrupt */
1370         if (status & (DAHFI | DAEMI))
1371                 handle_ao_interrupt(dev, status);
1372         /*  check for analog input interrupts */
1373         /*  if fifo half-full */
1374         if (status & ADHFI) {
1375                 /*  read data */
1376                 num_samples = half_fifo;
1377                 if (cmd->stop_src == TRIG_COUNT &&
1378                     num_samples > devpriv->count) {
1379                         num_samples = devpriv->count;
1380                 }
1381                 insw(devpriv->adc_fifo + ADCDATA, devpriv->ai_buffer,
1382                      num_samples);
1383                 cfc_write_array_to_buffer(s, devpriv->ai_buffer,
1384                                           num_samples * sizeof(short));
1385                 devpriv->count -= num_samples;
1386                 if (cmd->stop_src == TRIG_COUNT && devpriv->count == 0)
1387                         async->events |= COMEDI_CB_EOA;
1388                 /*  clear half-full interrupt latch */
1389                 spin_lock_irqsave(&dev->spinlock, flags);
1390                 outw(devpriv->adc_fifo_bits | INT,
1391                      devpriv->control_status + INT_ADCFIFO);
1392                 spin_unlock_irqrestore(&dev->spinlock, flags);
1393                 /*  else if fifo not empty */
1394         } else if (status & (ADNEI | EOBI)) {
1395                 for (i = 0; i < timeout; i++) {
1396                         /*  break if fifo is empty */
1397                         if ((ADNE & inw(devpriv->control_status +
1398                                         INT_ADCFIFO)) == 0)
1399                                 break;
1400                         cfc_write_to_buffer(s, inw(devpriv->adc_fifo));
1401                         if (cmd->stop_src == TRIG_COUNT &&
1402                             --devpriv->count == 0) {
1403                                 /* end of acquisition */
1404                                 async->events |= COMEDI_CB_EOA;
1405                                 break;
1406                         }
1407                 }
1408                 /*  clear not-empty interrupt latch */
1409                 spin_lock_irqsave(&dev->spinlock, flags);
1410                 outw(devpriv->adc_fifo_bits | INT,
1411                      devpriv->control_status + INT_ADCFIFO);
1412                 spin_unlock_irqrestore(&dev->spinlock, flags);
1413         } else if (status & EOAI) {
1414                 dev_err(dev->class_dev,
1415                         "bug! encountered end of acquisition interrupt?\n");
1416                 /*  clear EOA interrupt latch */
1417                 spin_lock_irqsave(&dev->spinlock, flags);
1418                 outw(devpriv->adc_fifo_bits | EOAI,
1419                      devpriv->control_status + INT_ADCFIFO);
1420                 spin_unlock_irqrestore(&dev->spinlock, flags);
1421         }
1422         /* check for fifo overflow */
1423         if (status & LADFUL) {
1424                 dev_err(dev->class_dev, "fifo overflow\n");
1425                 /*  clear overflow interrupt latch */
1426                 spin_lock_irqsave(&dev->spinlock, flags);
1427                 outw(devpriv->adc_fifo_bits | LADFUL,
1428                      devpriv->control_status + INT_ADCFIFO);
1429                 spin_unlock_irqrestore(&dev->spinlock, flags);
1430                 async->events |= COMEDI_CB_EOA | COMEDI_CB_ERROR;
1431         }
1432 
1433         cfc_handle_events(dev, s);
1434 
1435         return IRQ_HANDLED;
1436 }
1437 
1438 static int cb_pcidas_auto_attach(struct comedi_device *dev,
1439                                  unsigned long context)
1440 {
1441         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
1442         const struct cb_pcidas_board *thisboard = NULL;
1443         struct cb_pcidas_private *devpriv;
1444         struct comedi_subdevice *s;
1445         int i;
1446         int ret;
1447 
1448         if (context < ARRAY_SIZE(cb_pcidas_boards))
1449                 thisboard = &cb_pcidas_boards[context];
1450         if (!thisboard)
1451                 return -ENODEV;
1452         dev->board_ptr  = thisboard;
1453         dev->board_name = thisboard->name;
1454 
1455         devpriv = comedi_alloc_devpriv(dev, sizeof(*devpriv));
1456         if (!devpriv)
1457                 return -ENOMEM;
1458 
1459         ret = comedi_pci_enable(dev);
1460         if (ret)
1461                 return ret;
1462 
1463         devpriv->s5933_config = pci_resource_start(pcidev, 0);
1464         devpriv->control_status = pci_resource_start(pcidev, 1);
1465         devpriv->adc_fifo = pci_resource_start(pcidev, 2);
1466         devpriv->pacer_counter_dio = pci_resource_start(pcidev, 3);
1467         if (thisboard->ao_nchan)
1468                 devpriv->ao_registers = pci_resource_start(pcidev, 4);
1469 
1470         /*  disable and clear interrupts on amcc s5933 */
1471         outl(INTCSR_INBOX_INTR_STATUS,
1472              devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1473 
1474         ret = request_irq(pcidev->irq, cb_pcidas_interrupt, IRQF_SHARED,
1475                           dev->board_name, dev);
1476         if (ret) {
1477                 dev_dbg(dev->class_dev, "unable to allocate irq %d\n",
1478                         pcidev->irq);
1479                 return ret;
1480         }
1481         dev->irq = pcidev->irq;
1482 
1483         ret = comedi_alloc_subdevices(dev, 7);
1484         if (ret)
1485                 return ret;
1486 
1487         s = &dev->subdevices[0];
1488         /* analog input subdevice */
1489         dev->read_subdev = s;
1490         s->type = COMEDI_SUBD_AI;
1491         s->subdev_flags = SDF_READABLE | SDF_GROUND | SDF_DIFF | SDF_CMD_READ;
1492         /* WARNING: Number of inputs in differential mode is ignored */
1493         s->n_chan = thisboard->ai_nchan;
1494         s->len_chanlist = thisboard->ai_nchan;
1495         s->maxdata = (1 << thisboard->ai_bits) - 1;
1496         s->range_table = thisboard->ranges;
1497         s->insn_read = cb_pcidas_ai_rinsn;
1498         s->insn_config = ai_config_insn;
1499         s->do_cmd = cb_pcidas_ai_cmd;
1500         s->do_cmdtest = cb_pcidas_ai_cmdtest;
1501         s->cancel = cb_pcidas_cancel;
1502 
1503         /* analog output subdevice */
1504         s = &dev->subdevices[1];
1505         if (thisboard->ao_nchan) {
1506                 s->type = COMEDI_SUBD_AO;
1507                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_GROUND;
1508                 s->n_chan = thisboard->ao_nchan;
1509                 /*
1510                  * analog out resolution is the same as
1511                  * analog input resolution, so use ai_bits
1512                  */
1513                 s->maxdata = (1 << thisboard->ai_bits) - 1;
1514                 s->range_table = &cb_pcidas_ao_ranges;
1515                 s->insn_read = cb_pcidas_ao_readback_insn;
1516                 if (thisboard->has_ao_fifo) {
1517                         dev->write_subdev = s;
1518                         s->subdev_flags |= SDF_CMD_WRITE;
1519                         s->insn_write = cb_pcidas_ao_fifo_winsn;
1520                         s->do_cmdtest = cb_pcidas_ao_cmdtest;
1521                         s->do_cmd = cb_pcidas_ao_cmd;
1522                         s->cancel = cb_pcidas_ao_cancel;
1523                 } else {
1524                         s->insn_write = cb_pcidas_ao_nofifo_winsn;
1525                 }
1526         } else {
1527                 s->type = COMEDI_SUBD_UNUSED;
1528         }
1529 
1530         /* 8255 */
1531         s = &dev->subdevices[2];
1532         ret = subdev_8255_init(dev, s, NULL,
1533                                devpriv->pacer_counter_dio + DIO_8255);
1534         if (ret)
1535                 return ret;
1536 
1537         /*  serial EEPROM, */
1538         s = &dev->subdevices[3];
1539         s->type = COMEDI_SUBD_MEMORY;
1540         s->subdev_flags = SDF_READABLE | SDF_INTERNAL;
1541         s->n_chan = 256;
1542         s->maxdata = 0xff;
1543         s->insn_read = eeprom_read_insn;
1544 
1545         /*  8800 caldac */
1546         s = &dev->subdevices[4];
1547         s->type = COMEDI_SUBD_CALIB;
1548         s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1549         s->n_chan = NUM_CHANNELS_8800;
1550         s->maxdata = 0xff;
1551         s->insn_read = caldac_read_insn;
1552         s->insn_write = caldac_write_insn;
1553         for (i = 0; i < s->n_chan; i++)
1554                 caldac_8800_write(dev, i, s->maxdata / 2);
1555 
1556         /*  trim potentiometer */
1557         s = &dev->subdevices[5];
1558         s->type = COMEDI_SUBD_CALIB;
1559         s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1560         if (thisboard->trimpot == AD7376) {
1561                 s->n_chan = NUM_CHANNELS_7376;
1562                 s->maxdata = 0x7f;
1563         } else {
1564                 s->n_chan = NUM_CHANNELS_8402;
1565                 s->maxdata = 0xff;
1566         }
1567         s->insn_read = trimpot_read_insn;
1568         s->insn_write = trimpot_write_insn;
1569         for (i = 0; i < s->n_chan; i++)
1570                 cb_pcidas_trimpot_write(dev, i, s->maxdata / 2);
1571 
1572         /*  dac08 caldac */
1573         s = &dev->subdevices[6];
1574         if (thisboard->has_dac08) {
1575                 s->type = COMEDI_SUBD_CALIB;
1576                 s->subdev_flags = SDF_READABLE | SDF_WRITABLE | SDF_INTERNAL;
1577                 s->n_chan = NUM_CHANNELS_DAC08;
1578                 s->insn_read = dac08_read_insn;
1579                 s->insn_write = dac08_write_insn;
1580                 s->maxdata = 0xff;
1581                 dac08_write(dev, s->maxdata / 2);
1582         } else
1583                 s->type = COMEDI_SUBD_UNUSED;
1584 
1585         /*  make sure mailbox 4 is empty */
1586         inl(devpriv->s5933_config + AMCC_OP_REG_IMB4);
1587         /* Set bits to enable incoming mailbox interrupts on amcc s5933. */
1588         devpriv->s5933_intcsr_bits =
1589             INTCSR_INBOX_BYTE(3) | INTCSR_INBOX_SELECT(3) |
1590             INTCSR_INBOX_FULL_INT;
1591         /*  clear and enable interrupt on amcc s5933 */
1592         outl(devpriv->s5933_intcsr_bits | INTCSR_INBOX_INTR_STATUS,
1593              devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1594 
1595         return 0;
1596 }
1597 
1598 static void cb_pcidas_detach(struct comedi_device *dev)
1599 {
1600         struct cb_pcidas_private *devpriv = dev->private;
1601 
1602         if (devpriv) {
1603                 if (devpriv->s5933_config) {
1604                         outl(INTCSR_INBOX_INTR_STATUS,
1605                              devpriv->s5933_config + AMCC_OP_REG_INTCSR);
1606                 }
1607         }
1608         if (dev->irq)
1609                 free_irq(dev->irq, dev);
1610         comedi_pci_disable(dev);
1611 }
1612 
1613 static struct comedi_driver cb_pcidas_driver = {
1614         .driver_name    = "cb_pcidas",
1615         .module         = THIS_MODULE,
1616         .auto_attach    = cb_pcidas_auto_attach,
1617         .detach         = cb_pcidas_detach,
1618 };
1619 
1620 static int cb_pcidas_pci_probe(struct pci_dev *dev,
1621                                const struct pci_device_id *id)
1622 {
1623         return comedi_pci_auto_config(dev, &cb_pcidas_driver,
1624                                       id->driver_data);
1625 }
1626 
1627 static const struct pci_device_id cb_pcidas_pci_table[] = {
1628         { PCI_VDEVICE(CB, 0x0001), BOARD_PCIDAS1602_16 },
1629         { PCI_VDEVICE(CB, 0x000f), BOARD_PCIDAS1200 },
1630         { PCI_VDEVICE(CB, 0x0010), BOARD_PCIDAS1602_12 },
1631         { PCI_VDEVICE(CB, 0x0019), BOARD_PCIDAS1200_JR },
1632         { PCI_VDEVICE(CB, 0x001c), BOARD_PCIDAS1602_16_JR },
1633         { PCI_VDEVICE(CB, 0x004c), BOARD_PCIDAS1000 },
1634         { PCI_VDEVICE(CB, 0x001a), BOARD_PCIDAS1001 },
1635         { PCI_VDEVICE(CB, 0x001b), BOARD_PCIDAS1002 },
1636         { 0 }
1637 };
1638 MODULE_DEVICE_TABLE(pci, cb_pcidas_pci_table);
1639 
1640 static struct pci_driver cb_pcidas_pci_driver = {
1641         .name           = "cb_pcidas",
1642         .id_table       = cb_pcidas_pci_table,
1643         .probe          = cb_pcidas_pci_probe,
1644         .remove         = comedi_pci_auto_unconfig,
1645 };
1646 module_comedi_pci_driver(cb_pcidas_driver, cb_pcidas_pci_driver);
1647 
1648 MODULE_AUTHOR("Comedi http://www.comedi.org");
1649 MODULE_DESCRIPTION("Comedi low-level driver");
1650 MODULE_LICENSE("GPL");
1651 

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