Version:  2.0.40 2.2.26 2.4.37 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16

Linux/drivers/staging/comedi/drivers/adl_pci9111.c

  1 /*
  2 
  3 comedi/drivers/adl_pci9111.c
  4 
  5 Hardware driver for PCI9111 ADLink cards:
  6 
  7 PCI-9111HR
  8 
  9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
 10 
 11 This program is free software; you can redistribute it and/or modify
 12 it under the terms of the GNU General Public License as published by
 13 the Free Software Foundation; either version 2 of the License, or
 14 (at your option) any later version.
 15 
 16 This program is distributed in the hope that it will be useful,
 17 but WITHOUT ANY WARRANTY; without even the implied warranty of
 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19 GNU General Public License for more details.
 20 */
 21 
 22 /*
 23 Driver: adl_pci9111
 24 Description: Adlink PCI-9111HR
 25 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
 26 Devices: [ADLink] PCI-9111HR (adl_pci9111)
 27 Status: experimental
 28 
 29 Supports:
 30 
 31         - ai_insn read
 32         - ao_insn read/write
 33         - di_insn read
 34         - do_insn read/write
 35         - ai_do_cmd mode with the following sources:
 36 
 37         - start_src             TRIG_NOW
 38         - scan_begin_src        TRIG_FOLLOW     TRIG_TIMER      TRIG_EXT
 39         - convert_src                           TRIG_TIMER      TRIG_EXT
 40         - scan_end_src          TRIG_COUNT
 41         - stop_src              TRIG_COUNT      TRIG_NONE
 42 
 43 The scanned channels must be consecutive and start from 0. They must
 44 all have the same range and aref.
 45 
 46 Configuration options: not applicable, uses PCI auto config
 47 */
 48 
 49 /*
 50 CHANGELOG:
 51 
 52 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
 53 a multiple of chanlist_len*convert_arg.
 54 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
 55 2002/02/18 Added external trigger support for analog input.
 56 
 57 TODO:
 58 
 59         - Really test implemented functionality.
 60         - Add support for the PCI-9111DG with a probe routine to identify
 61           the card type (perhaps with the help of the channel number readback
 62           of the A/D Data register).
 63         - Add external multiplexer support.
 64 
 65 */
 66 
 67 #include <linux/module.h>
 68 #include <linux/pci.h>
 69 #include <linux/delay.h>
 70 #include <linux/interrupt.h>
 71 
 72 #include "../comedidev.h"
 73 
 74 #include "8253.h"
 75 #include "plx9052.h"
 76 #include "comedi_fc.h"
 77 
 78 #define PCI9111_DRIVER_NAME     "adl_pci9111"
 79 #define PCI9111_HR_DEVICE_ID    0x9111
 80 
 81 #define PCI9111_FIFO_HALF_SIZE  512
 82 
 83 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS    10000
 84 
 85 #define PCI9111_RANGE_SETTING_DELAY             10
 86 #define PCI9111_AI_INSTANT_READ_UDELAY_US       2
 87 
 88 /*
 89  * IO address map and bit defines
 90  */
 91 #define PCI9111_AI_FIFO_REG             0x00
 92 #define PCI9111_AO_REG                  0x00
 93 #define PCI9111_DIO_REG                 0x02
 94 #define PCI9111_EDIO_REG                0x04
 95 #define PCI9111_AI_CHANNEL_REG          0x06
 96 #define PCI9111_AI_RANGE_STAT_REG       0x08
 97 #define PCI9111_AI_STAT_AD_BUSY         (1 << 7)
 98 #define PCI9111_AI_STAT_FF_FF           (1 << 6)
 99 #define PCI9111_AI_STAT_FF_HF           (1 << 5)
100 #define PCI9111_AI_STAT_FF_EF           (1 << 4)
101 #define PCI9111_AI_RANGE_MASK           (7 << 0)
102 #define PCI9111_AI_TRIG_CTRL_REG        0x0a
103 #define PCI9111_AI_TRIG_CTRL_TRGEVENT   (1 << 5)
104 #define PCI9111_AI_TRIG_CTRL_POTRG      (1 << 4)
105 #define PCI9111_AI_TRIG_CTRL_PTRG       (1 << 3)
106 #define PCI9111_AI_TRIG_CTRL_ETIS       (1 << 2)
107 #define PCI9111_AI_TRIG_CTRL_TPST       (1 << 1)
108 #define PCI9111_AI_TRIG_CTRL_ASCAN      (1 << 0)
109 #define PCI9111_INT_CTRL_REG            0x0c
110 #define PCI9111_INT_CTRL_ISC2           (1 << 3)
111 #define PCI9111_INT_CTRL_FFEN           (1 << 2)
112 #define PCI9111_INT_CTRL_ISC1           (1 << 1)
113 #define PCI9111_INT_CTRL_ISC0           (1 << 0)
114 #define PCI9111_SOFT_TRIG_REG           0x0e
115 #define PCI9111_8254_BASE_REG           0x40
116 #define PCI9111_INT_CLR_REG             0x48
117 
118 /* PLX 9052 Local Interrupt 1 enabled and active */
119 #define PCI9111_LI1_ACTIVE      (PLX9052_INTCSR_LI1ENAB |       \
120                                  PLX9052_INTCSR_LI1STAT)
121 
122 /* PLX 9052 Local Interrupt 2 enabled and active */
123 #define PCI9111_LI2_ACTIVE      (PLX9052_INTCSR_LI2ENAB |       \
124                                  PLX9052_INTCSR_LI2STAT)
125 
126 static const struct comedi_lrange pci9111_ai_range = {
127         5, {
128                 BIP_RANGE(10),
129                 BIP_RANGE(5),
130                 BIP_RANGE(2.5),
131                 BIP_RANGE(1.25),
132                 BIP_RANGE(0.625)
133         }
134 };
135 
136 struct pci9111_private_data {
137         unsigned long lcr_io_base;
138 
139         int stop_counter;
140 
141         unsigned int scan_delay;
142         unsigned int chunk_counter;
143         unsigned int chunk_num_samples;
144 
145         int ao_readback;
146 
147         unsigned int div1;
148         unsigned int div2;
149 
150         unsigned short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
151 };
152 
153 static void plx9050_interrupt_control(unsigned long io_base,
154                                       bool LINTi1_enable,
155                                       bool LINTi1_active_high,
156                                       bool LINTi2_enable,
157                                       bool LINTi2_active_high,
158                                       bool interrupt_enable)
159 {
160         int flags = 0;
161 
162         if (LINTi1_enable)
163                 flags |= PLX9052_INTCSR_LI1ENAB;
164         if (LINTi1_active_high)
165                 flags |= PLX9052_INTCSR_LI1POL;
166         if (LINTi2_enable)
167                 flags |= PLX9052_INTCSR_LI2ENAB;
168         if (LINTi2_active_high)
169                 flags |= PLX9052_INTCSR_LI2POL;
170 
171         if (interrupt_enable)
172                 flags |= PLX9052_INTCSR_PCIENAB;
173 
174         outb(flags, io_base + PLX9052_INTCSR);
175 }
176 
177 static void pci9111_timer_set(struct comedi_device *dev)
178 {
179         struct pci9111_private_data *dev_private = dev->private;
180         unsigned long timer_base = dev->iobase + PCI9111_8254_BASE_REG;
181 
182         i8254_set_mode(timer_base, 1, 0, I8254_MODE0 | I8254_BINARY);
183         i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
184         i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
185 
186         udelay(1);
187 
188         i8254_write(timer_base, 1, 2, dev_private->div2);
189         i8254_write(timer_base, 1, 1, dev_private->div1);
190 }
191 
192 enum pci9111_trigger_sources {
193         software,
194         timer_pacer,
195         external
196 };
197 
198 static void pci9111_trigger_source_set(struct comedi_device *dev,
199                                        enum pci9111_trigger_sources source)
200 {
201         int flags;
202 
203         /* Read the current trigger mode control bits */
204         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
205         /* Mask off the EITS and TPST bits */
206         flags &= 0x9;
207 
208         switch (source) {
209         case software:
210                 break;
211 
212         case timer_pacer:
213                 flags |= PCI9111_AI_TRIG_CTRL_TPST;
214                 break;
215 
216         case external:
217                 flags |= PCI9111_AI_TRIG_CTRL_ETIS;
218                 break;
219         }
220 
221         outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
222 }
223 
224 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
225 {
226         int flags;
227 
228         /* Read the current trigger mode control bits */
229         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
230         /* Mask off the PTRG bit */
231         flags &= 0x7;
232 
233         if (pretrigger)
234                 flags |= PCI9111_AI_TRIG_CTRL_PTRG;
235 
236         outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
237 }
238 
239 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
240 {
241         int flags;
242 
243         /* Read the current trigger mode control bits */
244         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
245         /* Mask off the ASCAN bit */
246         flags &= 0xe;
247 
248         if (autoscan)
249                 flags |= PCI9111_AI_TRIG_CTRL_ASCAN;
250 
251         outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
252 }
253 
254 enum pci9111_ISC0_sources {
255         irq_on_eoc,
256         irq_on_fifo_half_full
257 };
258 
259 enum pci9111_ISC1_sources {
260         irq_on_timer_tick,
261         irq_on_external_trigger
262 };
263 
264 static void pci9111_interrupt_source_set(struct comedi_device *dev,
265                                          enum pci9111_ISC0_sources irq_0_source,
266                                          enum pci9111_ISC1_sources irq_1_source)
267 {
268         int flags;
269 
270         /* Read the current interrupt control bits */
271         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
272         /* Shift the bits so they are compatible with the write register */
273         flags >>= 4;
274         /* Mask off the ISCx bits */
275         flags &= 0xc0;
276 
277         /* Now set the new ISCx bits */
278         if (irq_0_source == irq_on_fifo_half_full)
279                 flags |= PCI9111_INT_CTRL_ISC0;
280 
281         if (irq_1_source == irq_on_external_trigger)
282                 flags |= PCI9111_INT_CTRL_ISC1;
283 
284         outb(flags, dev->iobase + PCI9111_INT_CTRL_REG);
285 }
286 
287 static void pci9111_fifo_reset(struct comedi_device *dev)
288 {
289         unsigned long int_ctrl_reg = dev->iobase + PCI9111_INT_CTRL_REG;
290 
291         /* To reset the FIFO, set FFEN sequence as 0 -> 1 -> 0 */
292         outb(0, int_ctrl_reg);
293         outb(PCI9111_INT_CTRL_FFEN, int_ctrl_reg);
294         outb(0, int_ctrl_reg);
295 }
296 
297 static int pci9111_ai_cancel(struct comedi_device *dev,
298                              struct comedi_subdevice *s)
299 {
300         struct pci9111_private_data *dev_private = dev->private;
301 
302         /*  Disable interrupts */
303         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
304                                   true, false);
305 
306         pci9111_trigger_source_set(dev, software);
307 
308         pci9111_autoscan_set(dev, false);
309 
310         pci9111_fifo_reset(dev);
311 
312         return 0;
313 }
314 
315 static int pci9111_ai_check_chanlist(struct comedi_device *dev,
316                                      struct comedi_subdevice *s,
317                                      struct comedi_cmd *cmd)
318 {
319         unsigned int range0 = CR_RANGE(cmd->chanlist[0]);
320         unsigned int aref0 = CR_AREF(cmd->chanlist[0]);
321         int i;
322 
323         for (i = 1; i < cmd->chanlist_len; i++) {
324                 unsigned int chan = CR_CHAN(cmd->chanlist[i]);
325                 unsigned int range = CR_RANGE(cmd->chanlist[i]);
326                 unsigned int aref = CR_AREF(cmd->chanlist[i]);
327 
328                 if (chan != i) {
329                         dev_dbg(dev->class_dev,
330                                 "entries in chanlist must be consecutive channels,counting upwards from 0\n");
331                         return -EINVAL;
332                 }
333 
334                 if (range != range0) {
335                         dev_dbg(dev->class_dev,
336                                 "entries in chanlist must all have the same gain\n");
337                         return -EINVAL;
338                 }
339 
340                 if (aref != aref0) {
341                         dev_dbg(dev->class_dev,
342                                 "entries in chanlist must all have the same reference\n");
343                         return -EINVAL;
344                 }
345         }
346 
347         return 0;
348 }
349 
350 static int pci9111_ai_do_cmd_test(struct comedi_device *dev,
351                                   struct comedi_subdevice *s,
352                                   struct comedi_cmd *cmd)
353 {
354         struct pci9111_private_data *dev_private = dev->private;
355         int err = 0;
356         unsigned int arg;
357 
358         /* Step 1 : check if triggers are trivially valid */
359 
360         err |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
361         err |= cfc_check_trigger_src(&cmd->scan_begin_src,
362                                         TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
363         err |= cfc_check_trigger_src(&cmd->convert_src,
364                                         TRIG_TIMER | TRIG_EXT);
365         err |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
366         err |= cfc_check_trigger_src(&cmd->stop_src,
367                                         TRIG_COUNT | TRIG_NONE);
368 
369         if (err)
370                 return 1;
371 
372         /* Step 2a : make sure trigger sources are unique */
373 
374         err |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
375         err |= cfc_check_trigger_is_unique(cmd->convert_src);
376         err |= cfc_check_trigger_is_unique(cmd->stop_src);
377 
378         /* Step 2b : and mutually compatible */
379 
380         if (cmd->scan_begin_src != TRIG_FOLLOW) {
381                 if (cmd->scan_begin_src != cmd->convert_src)
382                         err |= -EINVAL;
383         }
384 
385         if (err)
386                 return 2;
387 
388         /* Step 3: check if arguments are trivially valid */
389 
390         err |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
391 
392         if (cmd->convert_src == TRIG_TIMER)
393                 err |= cfc_check_trigger_arg_min(&cmd->convert_arg,
394                                         PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
395         else    /* TRIG_EXT */
396                 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
397 
398         if (cmd->scan_begin_src == TRIG_TIMER)
399                 err |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
400                                         PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
401         else    /* TRIG_FOLLOW || TRIG_EXT */
402                 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
403 
404         err |= cfc_check_trigger_arg_is(&cmd->scan_end_arg, cmd->chanlist_len);
405 
406         if (cmd->stop_src == TRIG_COUNT)
407                 err |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
408         else    /* TRIG_NONE */
409                 err |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
410 
411         if (err)
412                 return 3;
413 
414         /* Step 4: fix up any arguments */
415 
416         if (cmd->convert_src == TRIG_TIMER) {
417                 arg = cmd->convert_arg;
418                 i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
419                                           &dev_private->div1,
420                                           &dev_private->div2,
421                                           &arg, cmd->flags);
422                 err |= cfc_check_trigger_arg_is(&cmd->convert_arg, arg);
423         }
424 
425         /*
426          * There's only one timer on this card, so the scan_begin timer
427          * must be a multiple of chanlist_len*convert_arg
428          */
429         if (cmd->scan_begin_src == TRIG_TIMER) {
430                 arg = cmd->chanlist_len * cmd->convert_arg;
431 
432                 if (arg < cmd->scan_begin_arg)
433                         arg *= (cmd->scan_begin_arg / arg);
434 
435                 err |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, arg);
436         }
437 
438         if (err)
439                 return 4;
440 
441         /* Step 5: check channel list if it exists */
442         if (cmd->chanlist && cmd->chanlist_len > 0)
443                 err |= pci9111_ai_check_chanlist(dev, s, cmd);
444 
445         if (err)
446                 return 5;
447 
448         return 0;
449 
450 }
451 
452 static int pci9111_ai_do_cmd(struct comedi_device *dev,
453                              struct comedi_subdevice *s)
454 {
455         struct pci9111_private_data *dev_private = dev->private;
456         struct comedi_cmd *cmd = &s->async->cmd;
457 
458         /*  Set channel scan limit */
459         /*  PCI9111 allows only scanning from channel 0 to channel n */
460         /*  TODO: handle the case of an external multiplexer */
461 
462         if (cmd->chanlist_len > 1) {
463                 outb(cmd->chanlist_len - 1,
464                         dev->iobase + PCI9111_AI_CHANNEL_REG);
465                 pci9111_autoscan_set(dev, true);
466         } else {
467                 outb(CR_CHAN(cmd->chanlist[0]),
468                         dev->iobase + PCI9111_AI_CHANNEL_REG);
469                 pci9111_autoscan_set(dev, false);
470         }
471 
472         /*  Set gain */
473         /*  This is the same gain on every channel */
474 
475         outb(CR_RANGE(cmd->chanlist[0]) & PCI9111_AI_RANGE_MASK,
476                 dev->iobase + PCI9111_AI_RANGE_STAT_REG);
477 
478         /* Set counter */
479         if (cmd->stop_src == TRIG_COUNT)
480                 dev_private->stop_counter = cmd->stop_arg * cmd->chanlist_len;
481         else    /* TRIG_NONE */
482                 dev_private->stop_counter = 0;
483 
484         /*  Set timer pacer */
485         dev_private->scan_delay = 0;
486         if (cmd->convert_src == TRIG_TIMER) {
487                 pci9111_trigger_source_set(dev, software);
488                 pci9111_timer_set(dev);
489                 pci9111_fifo_reset(dev);
490                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
491                                              irq_on_timer_tick);
492                 pci9111_trigger_source_set(dev, timer_pacer);
493                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
494                                           false, true, true);
495 
496                 if (cmd->scan_begin_src == TRIG_TIMER) {
497                         dev_private->scan_delay = (cmd->scan_begin_arg /
498                                 (cmd->convert_arg * cmd->chanlist_len)) - 1;
499                 }
500         } else {        /* TRIG_EXT */
501                 pci9111_trigger_source_set(dev, external);
502                 pci9111_fifo_reset(dev);
503                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
504                                              irq_on_timer_tick);
505                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
506                                           false, true, true);
507 
508         }
509 
510         dev_private->stop_counter *= (1 + dev_private->scan_delay);
511         dev_private->chunk_counter = 0;
512         dev_private->chunk_num_samples = cmd->chanlist_len *
513                                          (1 + dev_private->scan_delay);
514 
515         return 0;
516 }
517 
518 static void pci9111_ai_munge(struct comedi_device *dev,
519                              struct comedi_subdevice *s, void *data,
520                              unsigned int num_bytes,
521                              unsigned int start_chan_index)
522 {
523         unsigned short *array = data;
524         unsigned int maxdata = s->maxdata;
525         unsigned int invert = (maxdata + 1) >> 1;
526         unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
527         unsigned int num_samples = num_bytes / sizeof(short);
528         unsigned int i;
529 
530         for (i = 0; i < num_samples; i++)
531                 array[i] = ((array[i] >> shift) & maxdata) ^ invert;
532 }
533 
534 static void pci9111_handle_fifo_half_full(struct comedi_device *dev,
535                                           struct comedi_subdevice *s)
536 {
537         struct pci9111_private_data *devpriv = dev->private;
538         struct comedi_cmd *cmd = &s->async->cmd;
539         unsigned int total = 0;
540         unsigned int samples;
541 
542         if (cmd->stop_src == TRIG_COUNT &&
543             PCI9111_FIFO_HALF_SIZE > devpriv->stop_counter)
544                 samples = devpriv->stop_counter;
545         else
546                 samples = PCI9111_FIFO_HALF_SIZE;
547 
548         insw(dev->iobase + PCI9111_AI_FIFO_REG,
549              devpriv->ai_bounce_buffer, samples);
550 
551         if (devpriv->scan_delay < 1) {
552                 total = cfc_write_array_to_buffer(s,
553                                                   devpriv->ai_bounce_buffer,
554                                                   samples * sizeof(short));
555         } else {
556                 unsigned int pos = 0;
557                 unsigned int to_read;
558 
559                 while (pos < samples) {
560                         if (devpriv->chunk_counter < cmd->chanlist_len) {
561                                 to_read = cmd->chanlist_len -
562                                           devpriv->chunk_counter;
563 
564                                 if (to_read > samples - pos)
565                                         to_read = samples - pos;
566 
567                                 total += cfc_write_array_to_buffer(s,
568                                                 devpriv->ai_bounce_buffer + pos,
569                                                 to_read * sizeof(short));
570                         } else {
571                                 to_read = devpriv->chunk_num_samples -
572                                           devpriv->chunk_counter;
573 
574                                 if (to_read > samples - pos)
575                                         to_read = samples - pos;
576 
577                                 total += to_read * sizeof(short);
578                         }
579 
580                         pos += to_read;
581                         devpriv->chunk_counter += to_read;
582 
583                         if (devpriv->chunk_counter >=
584                             devpriv->chunk_num_samples)
585                                 devpriv->chunk_counter = 0;
586                 }
587         }
588 
589         devpriv->stop_counter -= total / sizeof(short);
590 }
591 
592 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
593 {
594         struct comedi_device *dev = p_device;
595         struct pci9111_private_data *dev_private = dev->private;
596         struct comedi_subdevice *s = dev->read_subdev;
597         struct comedi_async *async;
598         struct comedi_cmd *cmd;
599         unsigned int status;
600         unsigned long irq_flags;
601         unsigned char intcsr;
602 
603         if (!dev->attached) {
604                 /*  Ignore interrupt before device fully attached. */
605                 /*  Might not even have allocated subdevices yet! */
606                 return IRQ_NONE;
607         }
608 
609         async = s->async;
610         cmd = &async->cmd;
611 
612         spin_lock_irqsave(&dev->spinlock, irq_flags);
613 
614         /*  Check if we are source of interrupt */
615         intcsr = inb(dev_private->lcr_io_base + PLX9052_INTCSR);
616         if (!(((intcsr & PLX9052_INTCSR_PCIENAB) != 0) &&
617               (((intcsr & PCI9111_LI1_ACTIVE) == PCI9111_LI1_ACTIVE) ||
618                ((intcsr & PCI9111_LI2_ACTIVE) == PCI9111_LI2_ACTIVE)))) {
619                 /*  Not the source of the interrupt. */
620                 /*  (N.B. not using PLX9052_INTCSR_SOFTINT) */
621                 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
622                 return IRQ_NONE;
623         }
624 
625         if ((intcsr & PCI9111_LI1_ACTIVE) == PCI9111_LI1_ACTIVE) {
626                 /*  Interrupt comes from fifo_half-full signal */
627 
628                 status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
629 
630                 /* '' means FIFO is full, data may have been lost */
631                 if (!(status & PCI9111_AI_STAT_FF_FF)) {
632                         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
633                         comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
634                         outb(0, dev->iobase + PCI9111_INT_CLR_REG);
635                         async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
636                         cfc_handle_events(dev, s);
637 
638                         return IRQ_HANDLED;
639                 }
640 
641                 /* '' means FIFO is half-full */
642                 if (!(status & PCI9111_AI_STAT_FF_HF))
643                         pci9111_handle_fifo_half_full(dev, s);
644         }
645 
646         if (cmd->stop_src == TRIG_COUNT && dev_private->stop_counter == 0)
647                 async->events |= COMEDI_CB_EOA;
648 
649         outb(0, dev->iobase + PCI9111_INT_CLR_REG);
650 
651         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
652 
653         cfc_handle_events(dev, s);
654 
655         return IRQ_HANDLED;
656 }
657 
658 static int pci9111_ai_eoc(struct comedi_device *dev,
659                           struct comedi_subdevice *s,
660                           struct comedi_insn *insn,
661                           unsigned long context)
662 {
663         unsigned int status;
664 
665         status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
666         if (status & PCI9111_AI_STAT_FF_EF)
667                 return 0;
668         return -EBUSY;
669 }
670 
671 static int pci9111_ai_insn_read(struct comedi_device *dev,
672                                 struct comedi_subdevice *s,
673                                 struct comedi_insn *insn, unsigned int *data)
674 {
675         unsigned int chan = CR_CHAN(insn->chanspec);
676         unsigned int range = CR_RANGE(insn->chanspec);
677         unsigned int maxdata = s->maxdata;
678         unsigned int invert = (maxdata + 1) >> 1;
679         unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
680         unsigned int status;
681         int ret;
682         int i;
683 
684         outb(chan, dev->iobase + PCI9111_AI_CHANNEL_REG);
685 
686         status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
687         if ((status & PCI9111_AI_RANGE_MASK) != range) {
688                 outb(range & PCI9111_AI_RANGE_MASK,
689                         dev->iobase + PCI9111_AI_RANGE_STAT_REG);
690         }
691 
692         pci9111_fifo_reset(dev);
693 
694         for (i = 0; i < insn->n; i++) {
695                 /* Generate a software trigger */
696                 outb(0, dev->iobase + PCI9111_SOFT_TRIG_REG);
697 
698                 ret = comedi_timeout(dev, s, insn, pci9111_ai_eoc, 0);
699                 if (ret) {
700                         pci9111_fifo_reset(dev);
701                         return ret;
702                 }
703 
704                 data[i] = inw(dev->iobase + PCI9111_AI_FIFO_REG);
705                 data[i] = ((data[i] >> shift) & maxdata) ^ invert;
706         }
707 
708         return i;
709 }
710 
711 static int pci9111_ao_insn_write(struct comedi_device *dev,
712                                  struct comedi_subdevice *s,
713                                  struct comedi_insn *insn,
714                                  unsigned int *data)
715 {
716         struct pci9111_private_data *dev_private = dev->private;
717         unsigned int val = 0;
718         int i;
719 
720         for (i = 0; i < insn->n; i++) {
721                 val = data[i];
722                 outw(val, dev->iobase + PCI9111_AO_REG);
723         }
724         dev_private->ao_readback = val;
725 
726         return insn->n;
727 }
728 
729 static int pci9111_ao_insn_read(struct comedi_device *dev,
730                                 struct comedi_subdevice *s,
731                                 struct comedi_insn *insn,
732                                 unsigned int *data)
733 {
734         struct pci9111_private_data *dev_private = dev->private;
735         int i;
736 
737         for (i = 0; i < insn->n; i++)
738                 data[i] = dev_private->ao_readback;
739 
740         return insn->n;
741 }
742 
743 static int pci9111_di_insn_bits(struct comedi_device *dev,
744                                 struct comedi_subdevice *s,
745                                 struct comedi_insn *insn,
746                                 unsigned int *data)
747 {
748         data[1] = inw(dev->iobase + PCI9111_DIO_REG);
749 
750         return insn->n;
751 }
752 
753 static int pci9111_do_insn_bits(struct comedi_device *dev,
754                                 struct comedi_subdevice *s,
755                                 struct comedi_insn *insn,
756                                 unsigned int *data)
757 {
758         if (comedi_dio_update_state(s, data))
759                 outw(s->state, dev->iobase + PCI9111_DIO_REG);
760 
761         data[1] = s->state;
762 
763         return insn->n;
764 }
765 
766 static int pci9111_reset(struct comedi_device *dev)
767 {
768         struct pci9111_private_data *dev_private = dev->private;
769 
770         /*  Set trigger source to software */
771         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
772                                   true, false);
773 
774         pci9111_trigger_source_set(dev, software);
775         pci9111_pretrigger_set(dev, false);
776         pci9111_autoscan_set(dev, false);
777 
778         /* Reset 8254 chip */
779         dev_private->div1 = 0;
780         dev_private->div2 = 0;
781         pci9111_timer_set(dev);
782 
783         return 0;
784 }
785 
786 static int pci9111_auto_attach(struct comedi_device *dev,
787                                          unsigned long context_unused)
788 {
789         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
790         struct pci9111_private_data *dev_private;
791         struct comedi_subdevice *s;
792         int ret;
793 
794         dev_private = comedi_alloc_devpriv(dev, sizeof(*dev_private));
795         if (!dev_private)
796                 return -ENOMEM;
797 
798         ret = comedi_pci_enable(dev);
799         if (ret)
800                 return ret;
801         dev_private->lcr_io_base = pci_resource_start(pcidev, 1);
802         dev->iobase = pci_resource_start(pcidev, 2);
803 
804         pci9111_reset(dev);
805 
806         if (pcidev->irq) {
807                 ret = request_irq(pcidev->irq, pci9111_interrupt,
808                                   IRQF_SHARED, dev->board_name, dev);
809                 if (ret == 0)
810                         dev->irq = pcidev->irq;
811         }
812 
813         ret = comedi_alloc_subdevices(dev, 4);
814         if (ret)
815                 return ret;
816 
817         s = &dev->subdevices[0];
818         s->type         = COMEDI_SUBD_AI;
819         s->subdev_flags = SDF_READABLE | SDF_COMMON;
820         s->n_chan       = 16;
821         s->maxdata      = 0xffff;
822         s->range_table  = &pci9111_ai_range;
823         s->insn_read    = pci9111_ai_insn_read;
824         if (dev->irq) {
825                 dev->read_subdev = s;
826                 s->subdev_flags |= SDF_CMD_READ;
827                 s->len_chanlist = s->n_chan;
828                 s->do_cmdtest   = pci9111_ai_do_cmd_test;
829                 s->do_cmd       = pci9111_ai_do_cmd;
830                 s->cancel       = pci9111_ai_cancel;
831                 s->munge        = pci9111_ai_munge;
832         }
833 
834         s = &dev->subdevices[1];
835         s->type         = COMEDI_SUBD_AO;
836         s->subdev_flags = SDF_WRITABLE | SDF_COMMON;
837         s->n_chan       = 1;
838         s->maxdata      = 0x0fff;
839         s->len_chanlist = 1;
840         s->range_table  = &range_bipolar10;
841         s->insn_write   = pci9111_ao_insn_write;
842         s->insn_read    = pci9111_ao_insn_read;
843 
844         s = &dev->subdevices[2];
845         s->type         = COMEDI_SUBD_DI;
846         s->subdev_flags = SDF_READABLE;
847         s->n_chan       = 16;
848         s->maxdata      = 1;
849         s->range_table  = &range_digital;
850         s->insn_bits    = pci9111_di_insn_bits;
851 
852         s = &dev->subdevices[3];
853         s->type         = COMEDI_SUBD_DO;
854         s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
855         s->n_chan       = 16;
856         s->maxdata      = 1;
857         s->range_table  = &range_digital;
858         s->insn_bits    = pci9111_do_insn_bits;
859 
860         return 0;
861 }
862 
863 static void pci9111_detach(struct comedi_device *dev)
864 {
865         if (dev->iobase)
866                 pci9111_reset(dev);
867         if (dev->irq != 0)
868                 free_irq(dev->irq, dev);
869         comedi_pci_disable(dev);
870 }
871 
872 static struct comedi_driver adl_pci9111_driver = {
873         .driver_name    = "adl_pci9111",
874         .module         = THIS_MODULE,
875         .auto_attach    = pci9111_auto_attach,
876         .detach         = pci9111_detach,
877 };
878 
879 static int pci9111_pci_probe(struct pci_dev *dev,
880                              const struct pci_device_id *id)
881 {
882         return comedi_pci_auto_config(dev, &adl_pci9111_driver,
883                                       id->driver_data);
884 }
885 
886 static const struct pci_device_id pci9111_pci_table[] = {
887         { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
888         /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
889         { 0 }
890 };
891 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
892 
893 static struct pci_driver adl_pci9111_pci_driver = {
894         .name           = "adl_pci9111",
895         .id_table       = pci9111_pci_table,
896         .probe          = pci9111_pci_probe,
897         .remove         = comedi_pci_auto_unconfig,
898 };
899 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
900 
901 MODULE_AUTHOR("Comedi http://www.comedi.org");
902 MODULE_DESCRIPTION("Comedi low-level driver");
903 MODULE_LICENSE("GPL");
904 

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