Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/staging/comedi/drivers/adl_pci9111.c

  1 /*
  2 
  3 comedi/drivers/adl_pci9111.c
  4 
  5 Hardware driver for PCI9111 ADLink cards:
  6 
  7 PCI-9111HR
  8 
  9 Copyright (C) 2002-2005 Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
 10 
 11 This program is free software; you can redistribute it and/or modify
 12 it under the terms of the GNU General Public License as published by
 13 the Free Software Foundation; either version 2 of the License, or
 14 (at your option) any later version.
 15 
 16 This program is distributed in the hope that it will be useful,
 17 but WITHOUT ANY WARRANTY; without even the implied warranty of
 18 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19 GNU General Public License for more details.
 20 */
 21 
 22 /*
 23 Driver: adl_pci9111
 24 Description: Adlink PCI-9111HR
 25 Author: Emmanuel Pacaud <emmanuel.pacaud@univ-poitiers.fr>
 26 Devices: [ADLink] PCI-9111HR (adl_pci9111)
 27 Status: experimental
 28 
 29 Supports:
 30 
 31         - ai_insn read
 32         - ao_insn read/write
 33         - di_insn read
 34         - do_insn read/write
 35         - ai_do_cmd mode with the following sources:
 36 
 37         - start_src             TRIG_NOW
 38         - scan_begin_src        TRIG_FOLLOW     TRIG_TIMER      TRIG_EXT
 39         - convert_src                           TRIG_TIMER      TRIG_EXT
 40         - scan_end_src          TRIG_COUNT
 41         - stop_src              TRIG_COUNT      TRIG_NONE
 42 
 43 The scanned channels must be consecutive and start from 0. They must
 44 all have the same range and aref.
 45 
 46 Configuration options: not applicable, uses PCI auto config
 47 */
 48 
 49 /*
 50 CHANGELOG:
 51 
 52 2005/02/17 Extend AI streaming capabilities. Now, scan_begin_arg can be
 53 a multiple of chanlist_len*convert_arg.
 54 2002/02/19 Fixed the two's complement conversion in pci9111_(hr_)ai_get_data.
 55 2002/02/18 Added external trigger support for analog input.
 56 
 57 TODO:
 58 
 59         - Really test implemented functionality.
 60         - Add support for the PCI-9111DG with a probe routine to identify
 61           the card type (perhaps with the help of the channel number readback
 62           of the A/D Data register).
 63         - Add external multiplexer support.
 64 
 65 */
 66 
 67 #include <linux/module.h>
 68 #include <linux/pci.h>
 69 #include <linux/delay.h>
 70 #include <linux/interrupt.h>
 71 
 72 #include "../comedidev.h"
 73 
 74 #include "8253.h"
 75 #include "plx9052.h"
 76 #include "comedi_fc.h"
 77 
 78 #define PCI9111_DRIVER_NAME     "adl_pci9111"
 79 #define PCI9111_HR_DEVICE_ID    0x9111
 80 
 81 #define PCI9111_FIFO_HALF_SIZE  512
 82 
 83 #define PCI9111_AI_ACQUISITION_PERIOD_MIN_NS    10000
 84 
 85 #define PCI9111_RANGE_SETTING_DELAY             10
 86 #define PCI9111_AI_INSTANT_READ_UDELAY_US       2
 87 
 88 /*
 89  * IO address map and bit defines
 90  */
 91 #define PCI9111_AI_FIFO_REG             0x00
 92 #define PCI9111_AO_REG                  0x00
 93 #define PCI9111_DIO_REG                 0x02
 94 #define PCI9111_EDIO_REG                0x04
 95 #define PCI9111_AI_CHANNEL_REG          0x06
 96 #define PCI9111_AI_RANGE_STAT_REG       0x08
 97 #define PCI9111_AI_STAT_AD_BUSY         (1 << 7)
 98 #define PCI9111_AI_STAT_FF_FF           (1 << 6)
 99 #define PCI9111_AI_STAT_FF_HF           (1 << 5)
100 #define PCI9111_AI_STAT_FF_EF           (1 << 4)
101 #define PCI9111_AI_RANGE_MASK           (7 << 0)
102 #define PCI9111_AI_TRIG_CTRL_REG        0x0a
103 #define PCI9111_AI_TRIG_CTRL_TRGEVENT   (1 << 5)
104 #define PCI9111_AI_TRIG_CTRL_POTRG      (1 << 4)
105 #define PCI9111_AI_TRIG_CTRL_PTRG       (1 << 3)
106 #define PCI9111_AI_TRIG_CTRL_ETIS       (1 << 2)
107 #define PCI9111_AI_TRIG_CTRL_TPST       (1 << 1)
108 #define PCI9111_AI_TRIG_CTRL_ASCAN      (1 << 0)
109 #define PCI9111_INT_CTRL_REG            0x0c
110 #define PCI9111_INT_CTRL_ISC2           (1 << 3)
111 #define PCI9111_INT_CTRL_FFEN           (1 << 2)
112 #define PCI9111_INT_CTRL_ISC1           (1 << 1)
113 #define PCI9111_INT_CTRL_ISC0           (1 << 0)
114 #define PCI9111_SOFT_TRIG_REG           0x0e
115 #define PCI9111_8254_BASE_REG           0x40
116 #define PCI9111_INT_CLR_REG             0x48
117 
118 /* PLX 9052 Local Interrupt 1 enabled and active */
119 #define PCI9111_LI1_ACTIVE      (PLX9052_INTCSR_LI1ENAB |       \
120                                  PLX9052_INTCSR_LI1STAT)
121 
122 /* PLX 9052 Local Interrupt 2 enabled and active */
123 #define PCI9111_LI2_ACTIVE      (PLX9052_INTCSR_LI2ENAB |       \
124                                  PLX9052_INTCSR_LI2STAT)
125 
126 static const struct comedi_lrange pci9111_ai_range = {
127         5, {
128                 BIP_RANGE(10),
129                 BIP_RANGE(5),
130                 BIP_RANGE(2.5),
131                 BIP_RANGE(1.25),
132                 BIP_RANGE(0.625)
133         }
134 };
135 
136 struct pci9111_private_data {
137         unsigned long lcr_io_base;
138 
139         int stop_counter;
140         int stop_is_none;
141 
142         unsigned int scan_delay;
143         unsigned int chanlist_len;
144         unsigned int chunk_counter;
145         unsigned int chunk_num_samples;
146 
147         int ao_readback;
148 
149         unsigned int div1;
150         unsigned int div2;
151 
152         unsigned short ai_bounce_buffer[2 * PCI9111_FIFO_HALF_SIZE];
153 };
154 
155 static void plx9050_interrupt_control(unsigned long io_base,
156                                       bool LINTi1_enable,
157                                       bool LINTi1_active_high,
158                                       bool LINTi2_enable,
159                                       bool LINTi2_active_high,
160                                       bool interrupt_enable)
161 {
162         int flags = 0;
163 
164         if (LINTi1_enable)
165                 flags |= PLX9052_INTCSR_LI1ENAB;
166         if (LINTi1_active_high)
167                 flags |= PLX9052_INTCSR_LI1POL;
168         if (LINTi2_enable)
169                 flags |= PLX9052_INTCSR_LI2ENAB;
170         if (LINTi2_active_high)
171                 flags |= PLX9052_INTCSR_LI2POL;
172 
173         if (interrupt_enable)
174                 flags |= PLX9052_INTCSR_PCIENAB;
175 
176         outb(flags, io_base + PLX9052_INTCSR);
177 }
178 
179 static void pci9111_timer_set(struct comedi_device *dev)
180 {
181         struct pci9111_private_data *dev_private = dev->private;
182         unsigned long timer_base = dev->iobase + PCI9111_8254_BASE_REG;
183 
184         i8254_set_mode(timer_base, 1, 0, I8254_MODE0 | I8254_BINARY);
185         i8254_set_mode(timer_base, 1, 1, I8254_MODE2 | I8254_BINARY);
186         i8254_set_mode(timer_base, 1, 2, I8254_MODE2 | I8254_BINARY);
187 
188         udelay(1);
189 
190         i8254_write(timer_base, 1, 2, dev_private->div2);
191         i8254_write(timer_base, 1, 1, dev_private->div1);
192 }
193 
194 enum pci9111_trigger_sources {
195         software,
196         timer_pacer,
197         external
198 };
199 
200 static void pci9111_trigger_source_set(struct comedi_device *dev,
201                                        enum pci9111_trigger_sources source)
202 {
203         int flags;
204 
205         /* Read the current trigger mode control bits */
206         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
207         /* Mask off the EITS and TPST bits */
208         flags &= 0x9;
209 
210         switch (source) {
211         case software:
212                 break;
213 
214         case timer_pacer:
215                 flags |= PCI9111_AI_TRIG_CTRL_TPST;
216                 break;
217 
218         case external:
219                 flags |= PCI9111_AI_TRIG_CTRL_ETIS;
220                 break;
221         }
222 
223         outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
224 }
225 
226 static void pci9111_pretrigger_set(struct comedi_device *dev, bool pretrigger)
227 {
228         int flags;
229 
230         /* Read the current trigger mode control bits */
231         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
232         /* Mask off the PTRG bit */
233         flags &= 0x7;
234 
235         if (pretrigger)
236                 flags |= PCI9111_AI_TRIG_CTRL_PTRG;
237 
238         outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
239 }
240 
241 static void pci9111_autoscan_set(struct comedi_device *dev, bool autoscan)
242 {
243         int flags;
244 
245         /* Read the current trigger mode control bits */
246         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
247         /* Mask off the ASCAN bit */
248         flags &= 0xe;
249 
250         if (autoscan)
251                 flags |= PCI9111_AI_TRIG_CTRL_ASCAN;
252 
253         outb(flags, dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
254 }
255 
256 enum pci9111_ISC0_sources {
257         irq_on_eoc,
258         irq_on_fifo_half_full
259 };
260 
261 enum pci9111_ISC1_sources {
262         irq_on_timer_tick,
263         irq_on_external_trigger
264 };
265 
266 static void pci9111_interrupt_source_set(struct comedi_device *dev,
267                                          enum pci9111_ISC0_sources irq_0_source,
268                                          enum pci9111_ISC1_sources irq_1_source)
269 {
270         int flags;
271 
272         /* Read the current interrupt control bits */
273         flags = inb(dev->iobase + PCI9111_AI_TRIG_CTRL_REG);
274         /* Shift the bits so they are compatible with the write register */
275         flags >>= 4;
276         /* Mask off the ISCx bits */
277         flags &= 0xc0;
278 
279         /* Now set the new ISCx bits */
280         if (irq_0_source == irq_on_fifo_half_full)
281                 flags |= PCI9111_INT_CTRL_ISC0;
282 
283         if (irq_1_source == irq_on_external_trigger)
284                 flags |= PCI9111_INT_CTRL_ISC1;
285 
286         outb(flags, dev->iobase + PCI9111_INT_CTRL_REG);
287 }
288 
289 static void pci9111_fifo_reset(struct comedi_device *dev)
290 {
291         unsigned long int_ctrl_reg = dev->iobase + PCI9111_INT_CTRL_REG;
292 
293         /* To reset the FIFO, set FFEN sequence as 0 -> 1 -> 0 */
294         outb(0, int_ctrl_reg);
295         outb(PCI9111_INT_CTRL_FFEN, int_ctrl_reg);
296         outb(0, int_ctrl_reg);
297 }
298 
299 static int pci9111_ai_cancel(struct comedi_device *dev,
300                              struct comedi_subdevice *s)
301 {
302         struct pci9111_private_data *dev_private = dev->private;
303 
304         /*  Disable interrupts */
305         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
306                                   true, false);
307 
308         pci9111_trigger_source_set(dev, software);
309 
310         pci9111_autoscan_set(dev, false);
311 
312         pci9111_fifo_reset(dev);
313 
314         return 0;
315 }
316 
317 static int pci9111_ai_do_cmd_test(struct comedi_device *dev,
318                                   struct comedi_subdevice *s,
319                                   struct comedi_cmd *cmd)
320 {
321         struct pci9111_private_data *dev_private = dev->private;
322         int tmp;
323         int error = 0;
324         int range, reference;
325         int i;
326 
327         /* Step 1 : check if triggers are trivially valid */
328 
329         error |= cfc_check_trigger_src(&cmd->start_src, TRIG_NOW);
330         error |= cfc_check_trigger_src(&cmd->scan_begin_src,
331                                         TRIG_TIMER | TRIG_FOLLOW | TRIG_EXT);
332         error |= cfc_check_trigger_src(&cmd->convert_src,
333                                         TRIG_TIMER | TRIG_EXT);
334         error |= cfc_check_trigger_src(&cmd->scan_end_src, TRIG_COUNT);
335         error |= cfc_check_trigger_src(&cmd->stop_src,
336                                         TRIG_COUNT | TRIG_NONE);
337 
338         if (error)
339                 return 1;
340 
341         /* Step 2a : make sure trigger sources are unique */
342 
343         error |= cfc_check_trigger_is_unique(cmd->scan_begin_src);
344         error |= cfc_check_trigger_is_unique(cmd->convert_src);
345         error |= cfc_check_trigger_is_unique(cmd->stop_src);
346 
347         /* Step 2b : and mutually compatible */
348 
349         if ((cmd->convert_src == TRIG_TIMER) &&
350             !((cmd->scan_begin_src == TRIG_TIMER) ||
351               (cmd->scan_begin_src == TRIG_FOLLOW)))
352                 error |= -EINVAL;
353         if ((cmd->convert_src == TRIG_EXT) &&
354             !((cmd->scan_begin_src == TRIG_EXT) ||
355               (cmd->scan_begin_src == TRIG_FOLLOW)))
356                 error |= -EINVAL;
357 
358         if (error)
359                 return 2;
360 
361         /* Step 3: check if arguments are trivially valid */
362 
363         error |= cfc_check_trigger_arg_is(&cmd->start_arg, 0);
364 
365         if (cmd->convert_src == TRIG_TIMER)
366                 error |= cfc_check_trigger_arg_min(&cmd->convert_arg,
367                                         PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
368         else    /* TRIG_EXT */
369                 error |= cfc_check_trigger_arg_is(&cmd->convert_arg, 0);
370 
371         if (cmd->scan_begin_src == TRIG_TIMER)
372                 error |= cfc_check_trigger_arg_min(&cmd->scan_begin_arg,
373                                         PCI9111_AI_ACQUISITION_PERIOD_MIN_NS);
374         else    /* TRIG_FOLLOW || TRIG_EXT */
375                 error |= cfc_check_trigger_arg_is(&cmd->scan_begin_arg, 0);
376 
377         error |= cfc_check_trigger_arg_is(&cmd->scan_end_arg,
378                                           cmd->chanlist_len);
379 
380         if (cmd->stop_src == TRIG_COUNT)
381                 error |= cfc_check_trigger_arg_min(&cmd->stop_arg, 1);
382         else    /* TRIG_NONE */
383                 error |= cfc_check_trigger_arg_is(&cmd->stop_arg, 0);
384 
385         if (error)
386                 return 3;
387 
388         /*  Step 4 : fix up any arguments */
389 
390         if (cmd->convert_src == TRIG_TIMER) {
391                 tmp = cmd->convert_arg;
392                 i8253_cascade_ns_to_timer(I8254_OSC_BASE_2MHZ,
393                                           &dev_private->div1,
394                                           &dev_private->div2,
395                                           &cmd->convert_arg, cmd->flags);
396                 if (tmp != cmd->convert_arg)
397                         error++;
398         }
399         /*  There's only one timer on this card, so the scan_begin timer must */
400         /*  be a multiple of chanlist_len*convert_arg */
401 
402         if (cmd->scan_begin_src == TRIG_TIMER) {
403 
404                 unsigned int scan_begin_min;
405                 unsigned int scan_begin_arg;
406                 unsigned int scan_factor;
407 
408                 scan_begin_min = cmd->chanlist_len * cmd->convert_arg;
409 
410                 if (cmd->scan_begin_arg != scan_begin_min) {
411                         if (scan_begin_min < cmd->scan_begin_arg) {
412                                 scan_factor =
413                                     cmd->scan_begin_arg / scan_begin_min;
414                                 scan_begin_arg = scan_factor * scan_begin_min;
415                                 if (cmd->scan_begin_arg != scan_begin_arg) {
416                                         cmd->scan_begin_arg = scan_begin_arg;
417                                         error++;
418                                 }
419                         } else {
420                                 cmd->scan_begin_arg = scan_begin_min;
421                                 error++;
422                         }
423                 }
424         }
425 
426         if (error)
427                 return 4;
428 
429         /*  Step 5 : check channel list */
430 
431         if (cmd->chanlist) {
432 
433                 range = CR_RANGE(cmd->chanlist[0]);
434                 reference = CR_AREF(cmd->chanlist[0]);
435 
436                 if (cmd->chanlist_len > 1) {
437                         for (i = 0; i < cmd->chanlist_len; i++) {
438                                 if (CR_CHAN(cmd->chanlist[i]) != i) {
439                                         comedi_error(dev,
440                                                      "entries in chanlist must be consecutive "
441                                                      "channels,counting upwards from 0\n");
442                                         error++;
443                                 }
444                                 if (CR_RANGE(cmd->chanlist[i]) != range) {
445                                         comedi_error(dev,
446                                                      "entries in chanlist must all have the same gain\n");
447                                         error++;
448                                 }
449                                 if (CR_AREF(cmd->chanlist[i]) != reference) {
450                                         comedi_error(dev,
451                                                      "entries in chanlist must all have the same reference\n");
452                                         error++;
453                                 }
454                         }
455                 }
456         }
457 
458         if (error)
459                 return 5;
460 
461         return 0;
462 
463 }
464 
465 static int pci9111_ai_do_cmd(struct comedi_device *dev,
466                              struct comedi_subdevice *s)
467 {
468         struct pci9111_private_data *dev_private = dev->private;
469         struct comedi_cmd *async_cmd = &s->async->cmd;
470 
471         /*  Set channel scan limit */
472         /*  PCI9111 allows only scanning from channel 0 to channel n */
473         /*  TODO: handle the case of an external multiplexer */
474 
475         if (async_cmd->chanlist_len > 1) {
476                 outb(async_cmd->chanlist_len - 1,
477                         dev->iobase + PCI9111_AI_CHANNEL_REG);
478                 pci9111_autoscan_set(dev, true);
479         } else {
480                 outb(CR_CHAN(async_cmd->chanlist[0]),
481                         dev->iobase + PCI9111_AI_CHANNEL_REG);
482                 pci9111_autoscan_set(dev, false);
483         }
484 
485         /*  Set gain */
486         /*  This is the same gain on every channel */
487 
488         outb(CR_RANGE(async_cmd->chanlist[0]) & PCI9111_AI_RANGE_MASK,
489                 dev->iobase + PCI9111_AI_RANGE_STAT_REG);
490 
491         /* Set counter */
492         if (async_cmd->stop_src == TRIG_COUNT) {
493                 dev_private->stop_counter =
494                     async_cmd->stop_arg * async_cmd->chanlist_len;
495                 dev_private->stop_is_none = 0;
496         } else {        /* TRIG_NONE */
497                 dev_private->stop_counter = 0;
498                 dev_private->stop_is_none = 1;
499         }
500 
501         /*  Set timer pacer */
502         dev_private->scan_delay = 0;
503         if (async_cmd->convert_src == TRIG_TIMER) {
504                 pci9111_trigger_source_set(dev, software);
505                 pci9111_timer_set(dev);
506                 pci9111_fifo_reset(dev);
507                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
508                                              irq_on_timer_tick);
509                 pci9111_trigger_source_set(dev, timer_pacer);
510                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
511                                           false, true, true);
512 
513                 if (async_cmd->scan_begin_src == TRIG_TIMER) {
514                         dev_private->scan_delay =
515                                 (async_cmd->scan_begin_arg /
516                                  (async_cmd->convert_arg *
517                                   async_cmd->chanlist_len)) - 1;
518                 }
519         } else {        /* TRIG_EXT */
520                 pci9111_trigger_source_set(dev, external);
521                 pci9111_fifo_reset(dev);
522                 pci9111_interrupt_source_set(dev, irq_on_fifo_half_full,
523                                              irq_on_timer_tick);
524                 plx9050_interrupt_control(dev_private->lcr_io_base, true, true,
525                                           false, true, true);
526 
527         }
528 
529         dev_private->stop_counter *= (1 + dev_private->scan_delay);
530         dev_private->chanlist_len = async_cmd->chanlist_len;
531         dev_private->chunk_counter = 0;
532         dev_private->chunk_num_samples =
533             dev_private->chanlist_len * (1 + dev_private->scan_delay);
534 
535         return 0;
536 }
537 
538 static void pci9111_ai_munge(struct comedi_device *dev,
539                              struct comedi_subdevice *s, void *data,
540                              unsigned int num_bytes,
541                              unsigned int start_chan_index)
542 {
543         unsigned short *array = data;
544         unsigned int maxdata = s->maxdata;
545         unsigned int invert = (maxdata + 1) >> 1;
546         unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
547         unsigned int num_samples = num_bytes / sizeof(short);
548         unsigned int i;
549 
550         for (i = 0; i < num_samples; i++)
551                 array[i] = ((array[i] >> shift) & maxdata) ^ invert;
552 }
553 
554 static irqreturn_t pci9111_interrupt(int irq, void *p_device)
555 {
556         struct comedi_device *dev = p_device;
557         struct pci9111_private_data *dev_private = dev->private;
558         struct comedi_subdevice *s = dev->read_subdev;
559         struct comedi_async *async;
560         unsigned int status;
561         unsigned long irq_flags;
562         unsigned char intcsr;
563 
564         if (!dev->attached) {
565                 /*  Ignore interrupt before device fully attached. */
566                 /*  Might not even have allocated subdevices yet! */
567                 return IRQ_NONE;
568         }
569 
570         async = s->async;
571 
572         spin_lock_irqsave(&dev->spinlock, irq_flags);
573 
574         /*  Check if we are source of interrupt */
575         intcsr = inb(dev_private->lcr_io_base + PLX9052_INTCSR);
576         if (!(((intcsr & PLX9052_INTCSR_PCIENAB) != 0) &&
577               (((intcsr & PCI9111_LI1_ACTIVE) == PCI9111_LI1_ACTIVE) ||
578                ((intcsr & PCI9111_LI2_ACTIVE) == PCI9111_LI2_ACTIVE)))) {
579                 /*  Not the source of the interrupt. */
580                 /*  (N.B. not using PLX9052_INTCSR_SOFTINT) */
581                 spin_unlock_irqrestore(&dev->spinlock, irq_flags);
582                 return IRQ_NONE;
583         }
584 
585         if ((intcsr & PCI9111_LI1_ACTIVE) == PCI9111_LI1_ACTIVE) {
586                 /*  Interrupt comes from fifo_half-full signal */
587 
588                 status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
589 
590                 /* '' means FIFO is full, data may have been lost */
591                 if (!(status & PCI9111_AI_STAT_FF_FF)) {
592                         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
593                         comedi_error(dev, PCI9111_DRIVER_NAME " fifo overflow");
594                         outb(0, dev->iobase + PCI9111_INT_CLR_REG);
595                         async->events |= COMEDI_CB_ERROR | COMEDI_CB_EOA;
596                         cfc_handle_events(dev, s);
597 
598                         return IRQ_HANDLED;
599                 }
600 
601                 /* '' means FIFO is half-full */
602                 if (!(status & PCI9111_AI_STAT_FF_HF)) {
603                         unsigned int num_samples;
604                         unsigned int bytes_written = 0;
605 
606                         num_samples =
607                             PCI9111_FIFO_HALF_SIZE >
608                             dev_private->stop_counter
609                             && !dev_private->
610                             stop_is_none ? dev_private->stop_counter :
611                             PCI9111_FIFO_HALF_SIZE;
612                         insw(dev->iobase + PCI9111_AI_FIFO_REG,
613                              dev_private->ai_bounce_buffer, num_samples);
614 
615                         if (dev_private->scan_delay < 1) {
616                                 bytes_written =
617                                     cfc_write_array_to_buffer(s,
618                                                               dev_private->
619                                                               ai_bounce_buffer,
620                                                               num_samples *
621                                                               sizeof(short));
622                         } else {
623                                 int position = 0;
624                                 int to_read;
625 
626                                 while (position < num_samples) {
627                                         if (dev_private->chunk_counter <
628                                             dev_private->chanlist_len) {
629                                                 to_read =
630                                                     dev_private->chanlist_len -
631                                                     dev_private->chunk_counter;
632 
633                                                 if (to_read >
634                                                     num_samples - position)
635                                                         to_read =
636                                                             num_samples -
637                                                             position;
638 
639                                                 bytes_written +=
640                                                     cfc_write_array_to_buffer
641                                                     (s,
642                                                      dev_private->ai_bounce_buffer
643                                                      + position,
644                                                      to_read * sizeof(short));
645                                         } else {
646                                                 to_read =
647                                                     dev_private->chunk_num_samples
648                                                     -
649                                                     dev_private->chunk_counter;
650                                                 if (to_read >
651                                                     num_samples - position)
652                                                         to_read =
653                                                             num_samples -
654                                                             position;
655 
656                                                 bytes_written +=
657                                                     sizeof(short) * to_read;
658                                         }
659 
660                                         position += to_read;
661                                         dev_private->chunk_counter += to_read;
662 
663                                         if (dev_private->chunk_counter >=
664                                             dev_private->chunk_num_samples)
665                                                 dev_private->chunk_counter = 0;
666                                 }
667                         }
668 
669                         dev_private->stop_counter -=
670                             bytes_written / sizeof(short);
671                 }
672         }
673 
674         if (dev_private->stop_counter == 0 && !dev_private->stop_is_none)
675                 async->events |= COMEDI_CB_EOA;
676 
677         outb(0, dev->iobase + PCI9111_INT_CLR_REG);
678 
679         spin_unlock_irqrestore(&dev->spinlock, irq_flags);
680 
681         cfc_handle_events(dev, s);
682 
683         return IRQ_HANDLED;
684 }
685 
686 static int pci9111_ai_eoc(struct comedi_device *dev,
687                           struct comedi_subdevice *s,
688                           struct comedi_insn *insn,
689                           unsigned long context)
690 {
691         unsigned int status;
692 
693         status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
694         if (status & PCI9111_AI_STAT_FF_EF)
695                 return 0;
696         return -EBUSY;
697 }
698 
699 static int pci9111_ai_insn_read(struct comedi_device *dev,
700                                 struct comedi_subdevice *s,
701                                 struct comedi_insn *insn, unsigned int *data)
702 {
703         unsigned int chan = CR_CHAN(insn->chanspec);
704         unsigned int range = CR_RANGE(insn->chanspec);
705         unsigned int maxdata = s->maxdata;
706         unsigned int invert = (maxdata + 1) >> 1;
707         unsigned int shift = (maxdata == 0xffff) ? 0 : 4;
708         unsigned int status;
709         int ret;
710         int i;
711 
712         outb(chan, dev->iobase + PCI9111_AI_CHANNEL_REG);
713 
714         status = inb(dev->iobase + PCI9111_AI_RANGE_STAT_REG);
715         if ((status & PCI9111_AI_RANGE_MASK) != range) {
716                 outb(range & PCI9111_AI_RANGE_MASK,
717                         dev->iobase + PCI9111_AI_RANGE_STAT_REG);
718         }
719 
720         pci9111_fifo_reset(dev);
721 
722         for (i = 0; i < insn->n; i++) {
723                 /* Generate a software trigger */
724                 outb(0, dev->iobase + PCI9111_SOFT_TRIG_REG);
725 
726                 ret = comedi_timeout(dev, s, insn, pci9111_ai_eoc, 0);
727                 if (ret) {
728                         pci9111_fifo_reset(dev);
729                         return ret;
730                 }
731 
732                 data[i] = inw(dev->iobase + PCI9111_AI_FIFO_REG);
733                 data[i] = ((data[i] >> shift) & maxdata) ^ invert;
734         }
735 
736         return i;
737 }
738 
739 static int pci9111_ao_insn_write(struct comedi_device *dev,
740                                  struct comedi_subdevice *s,
741                                  struct comedi_insn *insn,
742                                  unsigned int *data)
743 {
744         struct pci9111_private_data *dev_private = dev->private;
745         unsigned int val = 0;
746         int i;
747 
748         for (i = 0; i < insn->n; i++) {
749                 val = data[i];
750                 outw(val, dev->iobase + PCI9111_AO_REG);
751         }
752         dev_private->ao_readback = val;
753 
754         return insn->n;
755 }
756 
757 static int pci9111_ao_insn_read(struct comedi_device *dev,
758                                 struct comedi_subdevice *s,
759                                 struct comedi_insn *insn,
760                                 unsigned int *data)
761 {
762         struct pci9111_private_data *dev_private = dev->private;
763         int i;
764 
765         for (i = 0; i < insn->n; i++)
766                 data[i] = dev_private->ao_readback;
767 
768         return insn->n;
769 }
770 
771 static int pci9111_di_insn_bits(struct comedi_device *dev,
772                                 struct comedi_subdevice *s,
773                                 struct comedi_insn *insn,
774                                 unsigned int *data)
775 {
776         data[1] = inw(dev->iobase + PCI9111_DIO_REG);
777 
778         return insn->n;
779 }
780 
781 static int pci9111_do_insn_bits(struct comedi_device *dev,
782                                 struct comedi_subdevice *s,
783                                 struct comedi_insn *insn,
784                                 unsigned int *data)
785 {
786         if (comedi_dio_update_state(s, data))
787                 outw(s->state, dev->iobase + PCI9111_DIO_REG);
788 
789         data[1] = s->state;
790 
791         return insn->n;
792 }
793 
794 static int pci9111_reset(struct comedi_device *dev)
795 {
796         struct pci9111_private_data *dev_private = dev->private;
797 
798         /*  Set trigger source to software */
799         plx9050_interrupt_control(dev_private->lcr_io_base, true, true, true,
800                                   true, false);
801 
802         pci9111_trigger_source_set(dev, software);
803         pci9111_pretrigger_set(dev, false);
804         pci9111_autoscan_set(dev, false);
805 
806         /* Reset 8254 chip */
807         dev_private->div1 = 0;
808         dev_private->div2 = 0;
809         pci9111_timer_set(dev);
810 
811         return 0;
812 }
813 
814 static int pci9111_auto_attach(struct comedi_device *dev,
815                                          unsigned long context_unused)
816 {
817         struct pci_dev *pcidev = comedi_to_pci_dev(dev);
818         struct pci9111_private_data *dev_private;
819         struct comedi_subdevice *s;
820         int ret;
821 
822         dev_private = comedi_alloc_devpriv(dev, sizeof(*dev_private));
823         if (!dev_private)
824                 return -ENOMEM;
825 
826         ret = comedi_pci_enable(dev);
827         if (ret)
828                 return ret;
829         dev_private->lcr_io_base = pci_resource_start(pcidev, 1);
830         dev->iobase = pci_resource_start(pcidev, 2);
831 
832         pci9111_reset(dev);
833 
834         if (pcidev->irq) {
835                 ret = request_irq(pcidev->irq, pci9111_interrupt,
836                                   IRQF_SHARED, dev->board_name, dev);
837                 if (ret == 0)
838                         dev->irq = pcidev->irq;
839         }
840 
841         ret = comedi_alloc_subdevices(dev, 4);
842         if (ret)
843                 return ret;
844 
845         s = &dev->subdevices[0];
846         s->type         = COMEDI_SUBD_AI;
847         s->subdev_flags = SDF_READABLE | SDF_COMMON;
848         s->n_chan       = 16;
849         s->maxdata      = 0xffff;
850         s->range_table  = &pci9111_ai_range;
851         s->insn_read    = pci9111_ai_insn_read;
852         if (dev->irq) {
853                 dev->read_subdev = s;
854                 s->subdev_flags |= SDF_CMD_READ;
855                 s->len_chanlist = s->n_chan;
856                 s->do_cmdtest   = pci9111_ai_do_cmd_test;
857                 s->do_cmd       = pci9111_ai_do_cmd;
858                 s->cancel       = pci9111_ai_cancel;
859                 s->munge        = pci9111_ai_munge;
860         }
861 
862         s = &dev->subdevices[1];
863         s->type         = COMEDI_SUBD_AO;
864         s->subdev_flags = SDF_WRITABLE | SDF_COMMON;
865         s->n_chan       = 1;
866         s->maxdata      = 0x0fff;
867         s->len_chanlist = 1;
868         s->range_table  = &range_bipolar10;
869         s->insn_write   = pci9111_ao_insn_write;
870         s->insn_read    = pci9111_ao_insn_read;
871 
872         s = &dev->subdevices[2];
873         s->type         = COMEDI_SUBD_DI;
874         s->subdev_flags = SDF_READABLE;
875         s->n_chan       = 16;
876         s->maxdata      = 1;
877         s->range_table  = &range_digital;
878         s->insn_bits    = pci9111_di_insn_bits;
879 
880         s = &dev->subdevices[3];
881         s->type         = COMEDI_SUBD_DO;
882         s->subdev_flags = SDF_READABLE | SDF_WRITABLE;
883         s->n_chan       = 16;
884         s->maxdata      = 1;
885         s->range_table  = &range_digital;
886         s->insn_bits    = pci9111_do_insn_bits;
887 
888         return 0;
889 }
890 
891 static void pci9111_detach(struct comedi_device *dev)
892 {
893         if (dev->iobase)
894                 pci9111_reset(dev);
895         if (dev->irq != 0)
896                 free_irq(dev->irq, dev);
897         comedi_pci_disable(dev);
898 }
899 
900 static struct comedi_driver adl_pci9111_driver = {
901         .driver_name    = "adl_pci9111",
902         .module         = THIS_MODULE,
903         .auto_attach    = pci9111_auto_attach,
904         .detach         = pci9111_detach,
905 };
906 
907 static int pci9111_pci_probe(struct pci_dev *dev,
908                              const struct pci_device_id *id)
909 {
910         return comedi_pci_auto_config(dev, &adl_pci9111_driver,
911                                       id->driver_data);
912 }
913 
914 static const struct pci_device_id pci9111_pci_table[] = {
915         { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HR_DEVICE_ID) },
916         /* { PCI_DEVICE(PCI_VENDOR_ID_ADLINK, PCI9111_HG_DEVICE_ID) }, */
917         { 0 }
918 };
919 MODULE_DEVICE_TABLE(pci, pci9111_pci_table);
920 
921 static struct pci_driver adl_pci9111_pci_driver = {
922         .name           = "adl_pci9111",
923         .id_table       = pci9111_pci_table,
924         .probe          = pci9111_pci_probe,
925         .remove         = comedi_pci_auto_unconfig,
926 };
927 module_comedi_pci_driver(adl_pci9111_driver, adl_pci9111_pci_driver);
928 
929 MODULE_AUTHOR("Comedi http://www.comedi.org");
930 MODULE_DESCRIPTION("Comedi low-level driver");
931 MODULE_LICENSE("GPL");
932 

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