Version:  2.0.40 2.2.26 2.4.37 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17

Linux/drivers/scsi/qla2xxx/qla_os.c

  1 /*
  2  * QLogic Fibre Channel HBA Driver
  3  * Copyright (c)  2003-2014 QLogic Corporation
  4  *
  5  * See LICENSE.qla2xxx for copyright and licensing details.
  6  */
  7 #include "qla_def.h"
  8 
  9 #include <linux/moduleparam.h>
 10 #include <linux/vmalloc.h>
 11 #include <linux/delay.h>
 12 #include <linux/kthread.h>
 13 #include <linux/mutex.h>
 14 #include <linux/kobject.h>
 15 #include <linux/slab.h>
 16 #include <scsi/scsi_tcq.h>
 17 #include <scsi/scsicam.h>
 18 #include <scsi/scsi_transport.h>
 19 #include <scsi/scsi_transport_fc.h>
 20 
 21 #include "qla_target.h"
 22 
 23 /*
 24  * Driver version
 25  */
 26 char qla2x00_version_str[40];
 27 
 28 static int apidev_major;
 29 
 30 /*
 31  * SRB allocation cache
 32  */
 33 static struct kmem_cache *srb_cachep;
 34 
 35 /*
 36  * CT6 CTX allocation cache
 37  */
 38 static struct kmem_cache *ctx_cachep;
 39 /*
 40  * error level for logging
 41  */
 42 int ql_errlev = ql_log_all;
 43 
 44 static int ql2xenableclass2;
 45 module_param(ql2xenableclass2, int, S_IRUGO|S_IRUSR);
 46 MODULE_PARM_DESC(ql2xenableclass2,
 47                 "Specify if Class 2 operations are supported from the very "
 48                 "beginning. Default is 0 - class 2 not supported.");
 49 
 50 
 51 int ql2xlogintimeout = 20;
 52 module_param(ql2xlogintimeout, int, S_IRUGO);
 53 MODULE_PARM_DESC(ql2xlogintimeout,
 54                 "Login timeout value in seconds.");
 55 
 56 int qlport_down_retry;
 57 module_param(qlport_down_retry, int, S_IRUGO);
 58 MODULE_PARM_DESC(qlport_down_retry,
 59                 "Maximum number of command retries to a port that returns "
 60                 "a PORT-DOWN status.");
 61 
 62 int ql2xplogiabsentdevice;
 63 module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
 64 MODULE_PARM_DESC(ql2xplogiabsentdevice,
 65                 "Option to enable PLOGI to devices that are not present after "
 66                 "a Fabric scan.  This is needed for several broken switches. "
 67                 "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
 68 
 69 int ql2xloginretrycount = 0;
 70 module_param(ql2xloginretrycount, int, S_IRUGO);
 71 MODULE_PARM_DESC(ql2xloginretrycount,
 72                 "Specify an alternate value for the NVRAM login retry count.");
 73 
 74 int ql2xallocfwdump = 1;
 75 module_param(ql2xallocfwdump, int, S_IRUGO);
 76 MODULE_PARM_DESC(ql2xallocfwdump,
 77                 "Option to enable allocation of memory for a firmware dump "
 78                 "during HBA initialization.  Memory allocation requirements "
 79                 "vary by ISP type.  Default is 1 - allocate memory.");
 80 
 81 int ql2xextended_error_logging;
 82 module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
 83 MODULE_PARM_DESC(ql2xextended_error_logging,
 84                 "Option to enable extended error logging,\n"
 85                 "\t\tDefault is 0 - no logging.  0x40000000 - Module Init & Probe.\n"
 86                 "\t\t0x20000000 - Mailbox Cmnds. 0x10000000 - Device Discovery.\n"
 87                 "\t\t0x08000000 - IO tracing.    0x04000000 - DPC Thread.\n"
 88                 "\t\t0x02000000 - Async events.  0x01000000 - Timer routines.\n"
 89                 "\t\t0x00800000 - User space.    0x00400000 - Task Management.\n"
 90                 "\t\t0x00200000 - AER/EEH.       0x00100000 - Multi Q.\n"
 91                 "\t\t0x00080000 - P3P Specific.  0x00040000 - Virtual Port.\n"
 92                 "\t\t0x00020000 - Buffer Dump.   0x00010000 - Misc.\n"
 93                 "\t\t0x00008000 - Verbose.       0x00004000 - Target.\n"
 94                 "\t\t0x00002000 - Target Mgmt.   0x00001000 - Target TMF.\n"
 95                 "\t\t0x7fffffff - For enabling all logs, can be too many logs.\n"
 96                 "\t\t0x1e400000 - Preferred value for capturing essential "
 97                 "debug information (equivalent to old "
 98                 "ql2xextended_error_logging=1).\n"
 99                 "\t\tDo LOGICAL OR of the value to enable more than one level");
100 
101 int ql2xshiftctondsd = 6;
102 module_param(ql2xshiftctondsd, int, S_IRUGO);
103 MODULE_PARM_DESC(ql2xshiftctondsd,
104                 "Set to control shifting of command type processing "
105                 "based on total number of SG elements.");
106 
107 int ql2xfdmienable=1;
108 module_param(ql2xfdmienable, int, S_IRUGO);
109 MODULE_PARM_DESC(ql2xfdmienable,
110                 "Enables FDMI registrations. "
111                 "0 - no FDMI. Default is 1 - perform FDMI.");
112 
113 #define MAX_Q_DEPTH     32
114 static int ql2xmaxqdepth = MAX_Q_DEPTH;
115 module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
116 MODULE_PARM_DESC(ql2xmaxqdepth,
117                 "Maximum queue depth to set for each LUN. "
118                 "Default is 32.");
119 
120 int ql2xenabledif = 2;
121 module_param(ql2xenabledif, int, S_IRUGO);
122 MODULE_PARM_DESC(ql2xenabledif,
123                 " Enable T10-CRC-DIF:\n"
124                 " Default is 2.\n"
125                 "  0 -- No DIF Support\n"
126                 "  1 -- Enable DIF for all types\n"
127                 "  2 -- Enable DIF for all types, except Type 0.\n");
128 
129 int ql2xenablehba_err_chk = 2;
130 module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
131 MODULE_PARM_DESC(ql2xenablehba_err_chk,
132                 " Enable T10-CRC-DIF Error isolation by HBA:\n"
133                 " Default is 2.\n"
134                 "  0 -- Error isolation disabled\n"
135                 "  1 -- Error isolation enabled only for DIX Type 0\n"
136                 "  2 -- Error isolation enabled for all Types\n");
137 
138 int ql2xiidmaenable=1;
139 module_param(ql2xiidmaenable, int, S_IRUGO);
140 MODULE_PARM_DESC(ql2xiidmaenable,
141                 "Enables iIDMA settings "
142                 "Default is 1 - perform iIDMA. 0 - no iIDMA.");
143 
144 int ql2xmaxqueues = 1;
145 module_param(ql2xmaxqueues, int, S_IRUGO);
146 MODULE_PARM_DESC(ql2xmaxqueues,
147                 "Enables MQ settings "
148                 "Default is 1 for single queue. Set it to number "
149                 "of queues in MQ mode.");
150 
151 int ql2xmultique_tag;
152 module_param(ql2xmultique_tag, int, S_IRUGO);
153 MODULE_PARM_DESC(ql2xmultique_tag,
154                 "Enables CPU affinity settings for the driver "
155                 "Default is 0 for no affinity of request and response IO. "
156                 "Set it to 1 to turn on the cpu affinity.");
157 
158 int ql2xfwloadbin;
159 module_param(ql2xfwloadbin, int, S_IRUGO|S_IWUSR);
160 MODULE_PARM_DESC(ql2xfwloadbin,
161                 "Option to specify location from which to load ISP firmware:.\n"
162                 " 2 -- load firmware via the request_firmware() (hotplug).\n"
163                 "      interface.\n"
164                 " 1 -- load firmware from flash.\n"
165                 " 0 -- use default semantics.\n");
166 
167 int ql2xetsenable;
168 module_param(ql2xetsenable, int, S_IRUGO);
169 MODULE_PARM_DESC(ql2xetsenable,
170                 "Enables firmware ETS burst."
171                 "Default is 0 - skip ETS enablement.");
172 
173 int ql2xdbwr = 1;
174 module_param(ql2xdbwr, int, S_IRUGO|S_IWUSR);
175 MODULE_PARM_DESC(ql2xdbwr,
176                 "Option to specify scheme for request queue posting.\n"
177                 " 0 -- Regular doorbell.\n"
178                 " 1 -- CAMRAM doorbell (faster).\n");
179 
180 int ql2xtargetreset = 1;
181 module_param(ql2xtargetreset, int, S_IRUGO);
182 MODULE_PARM_DESC(ql2xtargetreset,
183                  "Enable target reset."
184                  "Default is 1 - use hw defaults.");
185 
186 int ql2xgffidenable;
187 module_param(ql2xgffidenable, int, S_IRUGO);
188 MODULE_PARM_DESC(ql2xgffidenable,
189                 "Enables GFF_ID checks of port type. "
190                 "Default is 0 - Do not use GFF_ID information.");
191 
192 int ql2xasynctmfenable;
193 module_param(ql2xasynctmfenable, int, S_IRUGO);
194 MODULE_PARM_DESC(ql2xasynctmfenable,
195                 "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
196                 "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
197 
198 int ql2xdontresethba;
199 module_param(ql2xdontresethba, int, S_IRUGO|S_IWUSR);
200 MODULE_PARM_DESC(ql2xdontresethba,
201                 "Option to specify reset behaviour.\n"
202                 " 0 (Default) -- Reset on failure.\n"
203                 " 1 -- Do not reset on failure.\n");
204 
205 uint64_t ql2xmaxlun = MAX_LUNS;
206 module_param(ql2xmaxlun, ullong, S_IRUGO);
207 MODULE_PARM_DESC(ql2xmaxlun,
208                 "Defines the maximum LU number to register with the SCSI "
209                 "midlayer. Default is 65535.");
210 
211 int ql2xmdcapmask = 0x1F;
212 module_param(ql2xmdcapmask, int, S_IRUGO);
213 MODULE_PARM_DESC(ql2xmdcapmask,
214                 "Set the Minidump driver capture mask level. "
215                 "Default is 0x1F - Can be set to 0x3, 0x7, 0xF, 0x1F, 0x7F.");
216 
217 int ql2xmdenable = 1;
218 module_param(ql2xmdenable, int, S_IRUGO);
219 MODULE_PARM_DESC(ql2xmdenable,
220                 "Enable/disable MiniDump. "
221                 "0 - MiniDump disabled. "
222                 "1 (Default) - MiniDump enabled.");
223 
224 /*
225  * SCSI host template entry points
226  */
227 static int qla2xxx_slave_configure(struct scsi_device * device);
228 static int qla2xxx_slave_alloc(struct scsi_device *);
229 static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
230 static void qla2xxx_scan_start(struct Scsi_Host *);
231 static void qla2xxx_slave_destroy(struct scsi_device *);
232 static int qla2xxx_queuecommand(struct Scsi_Host *h, struct scsi_cmnd *cmd);
233 static int qla2xxx_eh_abort(struct scsi_cmnd *);
234 static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
235 static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
236 static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
237 static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
238 
239 static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
240 static int qla2x00_change_queue_type(struct scsi_device *, int);
241 static void qla2x00_free_device(scsi_qla_host_t *);
242 
243 struct scsi_host_template qla2xxx_driver_template = {
244         .module                 = THIS_MODULE,
245         .name                   = QLA2XXX_DRIVER_NAME,
246         .queuecommand           = qla2xxx_queuecommand,
247 
248         .eh_abort_handler       = qla2xxx_eh_abort,
249         .eh_device_reset_handler = qla2xxx_eh_device_reset,
250         .eh_target_reset_handler = qla2xxx_eh_target_reset,
251         .eh_bus_reset_handler   = qla2xxx_eh_bus_reset,
252         .eh_host_reset_handler  = qla2xxx_eh_host_reset,
253 
254         .slave_configure        = qla2xxx_slave_configure,
255 
256         .slave_alloc            = qla2xxx_slave_alloc,
257         .slave_destroy          = qla2xxx_slave_destroy,
258         .scan_finished          = qla2xxx_scan_finished,
259         .scan_start             = qla2xxx_scan_start,
260         .change_queue_depth     = qla2x00_change_queue_depth,
261         .change_queue_type      = qla2x00_change_queue_type,
262         .this_id                = -1,
263         .cmd_per_lun            = 3,
264         .use_clustering         = ENABLE_CLUSTERING,
265         .sg_tablesize           = SG_ALL,
266 
267         .max_sectors            = 0xFFFF,
268         .shost_attrs            = qla2x00_host_attrs,
269 
270         .supported_mode         = MODE_INITIATOR,
271 };
272 
273 static struct scsi_transport_template *qla2xxx_transport_template = NULL;
274 struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
275 
276 /* TODO Convert to inlines
277  *
278  * Timer routines
279  */
280 
281 __inline__ void
282 qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
283 {
284         init_timer(&vha->timer);
285         vha->timer.expires = jiffies + interval * HZ;
286         vha->timer.data = (unsigned long)vha;
287         vha->timer.function = (void (*)(unsigned long))func;
288         add_timer(&vha->timer);
289         vha->timer_active = 1;
290 }
291 
292 static inline void
293 qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
294 {
295         /* Currently used for 82XX only. */
296         if (vha->device_flags & DFLG_DEV_FAILED) {
297                 ql_dbg(ql_dbg_timer, vha, 0x600d,
298                     "Device in a failed state, returning.\n");
299                 return;
300         }
301 
302         mod_timer(&vha->timer, jiffies + interval * HZ);
303 }
304 
305 static __inline__ void
306 qla2x00_stop_timer(scsi_qla_host_t *vha)
307 {
308         del_timer_sync(&vha->timer);
309         vha->timer_active = 0;
310 }
311 
312 static int qla2x00_do_dpc(void *data);
313 
314 static void qla2x00_rst_aen(scsi_qla_host_t *);
315 
316 static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
317         struct req_que **, struct rsp_que **);
318 static void qla2x00_free_fw_dump(struct qla_hw_data *);
319 static void qla2x00_mem_free(struct qla_hw_data *);
320 
321 /* -------------------------------------------------------------------------- */
322 static int qla2x00_alloc_queues(struct qla_hw_data *ha, struct req_que *req,
323                                 struct rsp_que *rsp)
324 {
325         scsi_qla_host_t *vha = pci_get_drvdata(ha->pdev);
326         ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
327                                 GFP_KERNEL);
328         if (!ha->req_q_map) {
329                 ql_log(ql_log_fatal, vha, 0x003b,
330                     "Unable to allocate memory for request queue ptrs.\n");
331                 goto fail_req_map;
332         }
333 
334         ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
335                                 GFP_KERNEL);
336         if (!ha->rsp_q_map) {
337                 ql_log(ql_log_fatal, vha, 0x003c,
338                     "Unable to allocate memory for response queue ptrs.\n");
339                 goto fail_rsp_map;
340         }
341         /*
342          * Make sure we record at least the request and response queue zero in
343          * case we need to free them if part of the probe fails.
344          */
345         ha->rsp_q_map[0] = rsp;
346         ha->req_q_map[0] = req;
347         set_bit(0, ha->rsp_qid_map);
348         set_bit(0, ha->req_qid_map);
349         return 1;
350 
351 fail_rsp_map:
352         kfree(ha->req_q_map);
353         ha->req_q_map = NULL;
354 fail_req_map:
355         return -ENOMEM;
356 }
357 
358 static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
359 {
360         if (IS_QLAFX00(ha)) {
361                 if (req && req->ring_fx00)
362                         dma_free_coherent(&ha->pdev->dev,
363                             (req->length_fx00 + 1) * sizeof(request_t),
364                             req->ring_fx00, req->dma_fx00);
365         } else if (req && req->ring)
366                 dma_free_coherent(&ha->pdev->dev,
367                 (req->length + 1) * sizeof(request_t),
368                 req->ring, req->dma);
369 
370         if (req)
371                 kfree(req->outstanding_cmds);
372 
373         kfree(req);
374         req = NULL;
375 }
376 
377 static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
378 {
379         if (IS_QLAFX00(ha)) {
380                 if (rsp && rsp->ring)
381                         dma_free_coherent(&ha->pdev->dev,
382                             (rsp->length_fx00 + 1) * sizeof(request_t),
383                             rsp->ring_fx00, rsp->dma_fx00);
384         } else if (rsp && rsp->ring) {
385                 dma_free_coherent(&ha->pdev->dev,
386                 (rsp->length + 1) * sizeof(response_t),
387                 rsp->ring, rsp->dma);
388         }
389         kfree(rsp);
390         rsp = NULL;
391 }
392 
393 static void qla2x00_free_queues(struct qla_hw_data *ha)
394 {
395         struct req_que *req;
396         struct rsp_que *rsp;
397         int cnt;
398 
399         for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
400                 req = ha->req_q_map[cnt];
401                 qla2x00_free_req_que(ha, req);
402         }
403         kfree(ha->req_q_map);
404         ha->req_q_map = NULL;
405 
406         for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
407                 rsp = ha->rsp_q_map[cnt];
408                 qla2x00_free_rsp_que(ha, rsp);
409         }
410         kfree(ha->rsp_q_map);
411         ha->rsp_q_map = NULL;
412 }
413 
414 static int qla25xx_setup_mode(struct scsi_qla_host *vha)
415 {
416         uint16_t options = 0;
417         int ques, req, ret;
418         struct qla_hw_data *ha = vha->hw;
419 
420         if (!(ha->fw_attributes & BIT_6)) {
421                 ql_log(ql_log_warn, vha, 0x00d8,
422                     "Firmware is not multi-queue capable.\n");
423                 goto fail;
424         }
425         if (ql2xmultique_tag) {
426                 /* create a request queue for IO */
427                 options |= BIT_7;
428                 req = qla25xx_create_req_que(ha, options, 0, 0, -1,
429                         QLA_DEFAULT_QUE_QOS);
430                 if (!req) {
431                         ql_log(ql_log_warn, vha, 0x00e0,
432                             "Failed to create request queue.\n");
433                         goto fail;
434                 }
435                 ha->wq = alloc_workqueue("qla2xxx_wq", WQ_MEM_RECLAIM, 1);
436                 vha->req = ha->req_q_map[req];
437                 options |= BIT_1;
438                 for (ques = 1; ques < ha->max_rsp_queues; ques++) {
439                         ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
440                         if (!ret) {
441                                 ql_log(ql_log_warn, vha, 0x00e8,
442                                     "Failed to create response queue.\n");
443                                 goto fail2;
444                         }
445                 }
446                 ha->flags.cpu_affinity_enabled = 1;
447                 ql_dbg(ql_dbg_multiq, vha, 0xc007,
448                     "CPU affinity mode enalbed, "
449                     "no. of response queues:%d no. of request queues:%d.\n",
450                     ha->max_rsp_queues, ha->max_req_queues);
451                 ql_dbg(ql_dbg_init, vha, 0x00e9,
452                     "CPU affinity mode enalbed, "
453                     "no. of response queues:%d no. of request queues:%d.\n",
454                     ha->max_rsp_queues, ha->max_req_queues);
455         }
456         return 0;
457 fail2:
458         qla25xx_delete_queues(vha);
459         destroy_workqueue(ha->wq);
460         ha->wq = NULL;
461         vha->req = ha->req_q_map[0];
462 fail:
463         ha->mqenable = 0;
464         kfree(ha->req_q_map);
465         kfree(ha->rsp_q_map);
466         ha->max_req_queues = ha->max_rsp_queues = 1;
467         return 1;
468 }
469 
470 static char *
471 qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
472 {
473         struct qla_hw_data *ha = vha->hw;
474         static char *pci_bus_modes[] = {
475                 "33", "66", "100", "133",
476         };
477         uint16_t pci_bus;
478 
479         strcpy(str, "PCI");
480         pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
481         if (pci_bus) {
482                 strcat(str, "-X (");
483                 strcat(str, pci_bus_modes[pci_bus]);
484         } else {
485                 pci_bus = (ha->pci_attr & BIT_8) >> 8;
486                 strcat(str, " (");
487                 strcat(str, pci_bus_modes[pci_bus]);
488         }
489         strcat(str, " MHz)");
490 
491         return (str);
492 }
493 
494 static char *
495 qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
496 {
497         static char *pci_bus_modes[] = { "33", "66", "100", "133", };
498         struct qla_hw_data *ha = vha->hw;
499         uint32_t pci_bus;
500 
501         if (pci_is_pcie(ha->pdev)) {
502                 char lwstr[6];
503                 uint32_t lstat, lspeed, lwidth;
504 
505                 pcie_capability_read_dword(ha->pdev, PCI_EXP_LNKCAP, &lstat);
506                 lspeed = lstat & PCI_EXP_LNKCAP_SLS;
507                 lwidth = (lstat & PCI_EXP_LNKCAP_MLW) >> 4;
508 
509                 strcpy(str, "PCIe (");
510                 switch (lspeed) {
511                 case 1:
512                         strcat(str, "2.5GT/s ");
513                         break;
514                 case 2:
515                         strcat(str, "5.0GT/s ");
516                         break;
517                 case 3:
518                         strcat(str, "8.0GT/s ");
519                         break;
520                 default:
521                         strcat(str, "<unknown> ");
522                         break;
523                 }
524                 snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
525                 strcat(str, lwstr);
526 
527                 return str;
528         }
529 
530         strcpy(str, "PCI");
531         pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
532         if (pci_bus == 0 || pci_bus == 8) {
533                 strcat(str, " (");
534                 strcat(str, pci_bus_modes[pci_bus >> 3]);
535         } else {
536                 strcat(str, "-X ");
537                 if (pci_bus & BIT_2)
538                         strcat(str, "Mode 2");
539                 else
540                         strcat(str, "Mode 1");
541                 strcat(str, " (");
542                 strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
543         }
544         strcat(str, " MHz)");
545 
546         return str;
547 }
548 
549 static char *
550 qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
551 {
552         char un_str[10];
553         struct qla_hw_data *ha = vha->hw;
554 
555         sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
556             ha->fw_minor_version,
557             ha->fw_subminor_version);
558 
559         if (ha->fw_attributes & BIT_9) {
560                 strcat(str, "FLX");
561                 return (str);
562         }
563 
564         switch (ha->fw_attributes & 0xFF) {
565         case 0x7:
566                 strcat(str, "EF");
567                 break;
568         case 0x17:
569                 strcat(str, "TP");
570                 break;
571         case 0x37:
572                 strcat(str, "IP");
573                 break;
574         case 0x77:
575                 strcat(str, "VI");
576                 break;
577         default:
578                 sprintf(un_str, "(%x)", ha->fw_attributes);
579                 strcat(str, un_str);
580                 break;
581         }
582         if (ha->fw_attributes & 0x100)
583                 strcat(str, "X");
584 
585         return (str);
586 }
587 
588 static char *
589 qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
590 {
591         struct qla_hw_data *ha = vha->hw;
592 
593         sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
594             ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
595         return str;
596 }
597 
598 void
599 qla2x00_sp_free_dma(void *vha, void *ptr)
600 {
601         srb_t *sp = (srb_t *)ptr;
602         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
603         struct qla_hw_data *ha = sp->fcport->vha->hw;
604         void *ctx = GET_CMD_CTX_SP(sp);
605 
606         if (sp->flags & SRB_DMA_VALID) {
607                 scsi_dma_unmap(cmd);
608                 sp->flags &= ~SRB_DMA_VALID;
609         }
610 
611         if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
612                 dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
613                     scsi_prot_sg_count(cmd), cmd->sc_data_direction);
614                 sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
615         }
616 
617         if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
618                 /* List assured to be having elements */
619                 qla2x00_clean_dsd_pool(ha, sp, NULL);
620                 sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
621         }
622 
623         if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
624                 dma_pool_free(ha->dl_dma_pool, ctx,
625                     ((struct crc_context *)ctx)->crc_ctx_dma);
626                 sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
627         }
628 
629         if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
630                 struct ct6_dsd *ctx1 = (struct ct6_dsd *)ctx;
631 
632                 dma_pool_free(ha->fcp_cmnd_dma_pool, ctx1->fcp_cmnd,
633                         ctx1->fcp_cmnd_dma);
634                 list_splice(&ctx1->dsd_list, &ha->gbl_dsd_list);
635                 ha->gbl_dsd_inuse -= ctx1->dsd_use_cnt;
636                 ha->gbl_dsd_avail += ctx1->dsd_use_cnt;
637                 mempool_free(ctx1, ha->ctx_mempool);
638                 ctx1 = NULL;
639         }
640 
641         CMD_SP(cmd) = NULL;
642         qla2x00_rel_sp(sp->fcport->vha, sp);
643 }
644 
645 static void
646 qla2x00_sp_compl(void *data, void *ptr, int res)
647 {
648         struct qla_hw_data *ha = (struct qla_hw_data *)data;
649         srb_t *sp = (srb_t *)ptr;
650         struct scsi_cmnd *cmd = GET_CMD_SP(sp);
651 
652         cmd->result = res;
653 
654         if (atomic_read(&sp->ref_count) == 0) {
655                 ql_dbg(ql_dbg_io, sp->fcport->vha, 0x3015,
656                     "SP reference-count to ZERO -- sp=%p cmd=%p.\n",
657                     sp, GET_CMD_SP(sp));
658                 if (ql2xextended_error_logging & ql_dbg_io)
659                         BUG();
660                 return;
661         }
662         if (!atomic_dec_and_test(&sp->ref_count))
663                 return;
664 
665         qla2x00_sp_free_dma(ha, sp);
666         cmd->scsi_done(cmd);
667 }
668 
669 /* If we are SP1 here, we need to still take and release the host_lock as SP1
670  * does not have the changes necessary to avoid taking host->host_lock.
671  */
672 static int
673 qla2xxx_queuecommand(struct Scsi_Host *host, struct scsi_cmnd *cmd)
674 {
675         scsi_qla_host_t *vha = shost_priv(host);
676         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
677         struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
678         struct qla_hw_data *ha = vha->hw;
679         struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
680         srb_t *sp;
681         int rval;
682 
683         if (ha->flags.eeh_busy) {
684                 if (ha->flags.pci_channel_io_perm_failure) {
685                         ql_dbg(ql_dbg_aer, vha, 0x9010,
686                             "PCI Channel IO permanent failure, exiting "
687                             "cmd=%p.\n", cmd);
688                         cmd->result = DID_NO_CONNECT << 16;
689                 } else {
690                         ql_dbg(ql_dbg_aer, vha, 0x9011,
691                             "EEH_Busy, Requeuing the cmd=%p.\n", cmd);
692                         cmd->result = DID_REQUEUE << 16;
693                 }
694                 goto qc24_fail_command;
695         }
696 
697         rval = fc_remote_port_chkready(rport);
698         if (rval) {
699                 cmd->result = rval;
700                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3003,
701                     "fc_remote_port_chkready failed for cmd=%p, rval=0x%x.\n",
702                     cmd, rval);
703                 goto qc24_fail_command;
704         }
705 
706         if (!vha->flags.difdix_supported &&
707                 scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
708                         ql_dbg(ql_dbg_io, vha, 0x3004,
709                             "DIF Cap not reg, fail DIF capable cmd's:%p.\n",
710                             cmd);
711                         cmd->result = DID_NO_CONNECT << 16;
712                         goto qc24_fail_command;
713         }
714 
715         if (!fcport) {
716                 cmd->result = DID_NO_CONNECT << 16;
717                 goto qc24_fail_command;
718         }
719 
720         if (atomic_read(&fcport->state) != FCS_ONLINE) {
721                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
722                         atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
723                         ql_dbg(ql_dbg_io, vha, 0x3005,
724                             "Returning DNC, fcport_state=%d loop_state=%d.\n",
725                             atomic_read(&fcport->state),
726                             atomic_read(&base_vha->loop_state));
727                         cmd->result = DID_NO_CONNECT << 16;
728                         goto qc24_fail_command;
729                 }
730                 goto qc24_target_busy;
731         }
732 
733         sp = qla2x00_get_sp(vha, fcport, GFP_ATOMIC);
734         if (!sp)
735                 goto qc24_host_busy;
736 
737         sp->u.scmd.cmd = cmd;
738         sp->type = SRB_SCSI_CMD;
739         atomic_set(&sp->ref_count, 1);
740         CMD_SP(cmd) = (void *)sp;
741         sp->free = qla2x00_sp_free_dma;
742         sp->done = qla2x00_sp_compl;
743 
744         rval = ha->isp_ops->start_scsi(sp);
745         if (rval != QLA_SUCCESS) {
746                 ql_dbg(ql_dbg_io + ql_dbg_verbose, vha, 0x3013,
747                     "Start scsi failed rval=%d for cmd=%p.\n", rval, cmd);
748                 goto qc24_host_busy_free_sp;
749         }
750 
751         return 0;
752 
753 qc24_host_busy_free_sp:
754         qla2x00_sp_free_dma(ha, sp);
755 
756 qc24_host_busy:
757         return SCSI_MLQUEUE_HOST_BUSY;
758 
759 qc24_target_busy:
760         return SCSI_MLQUEUE_TARGET_BUSY;
761 
762 qc24_fail_command:
763         cmd->scsi_done(cmd);
764 
765         return 0;
766 }
767 
768 /*
769  * qla2x00_eh_wait_on_command
770  *    Waits for the command to be returned by the Firmware for some
771  *    max time.
772  *
773  * Input:
774  *    cmd = Scsi Command to wait on.
775  *
776  * Return:
777  *    Not Found : 0
778  *    Found : 1
779  */
780 static int
781 qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
782 {
783 #define ABORT_POLLING_PERIOD    1000
784 #define ABORT_WAIT_ITER         ((2 * 1000) / (ABORT_POLLING_PERIOD))
785         unsigned long wait_iter = ABORT_WAIT_ITER;
786         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
787         struct qla_hw_data *ha = vha->hw;
788         int ret = QLA_SUCCESS;
789 
790         if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
791                 ql_dbg(ql_dbg_taskm, vha, 0x8005,
792                     "Return:eh_wait.\n");
793                 return ret;
794         }
795 
796         while (CMD_SP(cmd) && wait_iter--) {
797                 msleep(ABORT_POLLING_PERIOD);
798         }
799         if (CMD_SP(cmd))
800                 ret = QLA_FUNCTION_FAILED;
801 
802         return ret;
803 }
804 
805 /*
806  * qla2x00_wait_for_hba_online
807  *    Wait till the HBA is online after going through
808  *    <= MAX_RETRIES_OF_ISP_ABORT  or
809  *    finally HBA is disabled ie marked offline
810  *
811  * Input:
812  *     ha - pointer to host adapter structure
813  *
814  * Note:
815  *    Does context switching-Release SPIN_LOCK
816  *    (if any) before calling this routine.
817  *
818  * Return:
819  *    Success (Adapter is online) : 0
820  *    Failed  (Adapter is offline/disabled) : 1
821  */
822 int
823 qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
824 {
825         int             return_status;
826         unsigned long   wait_online;
827         struct qla_hw_data *ha = vha->hw;
828         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
829 
830         wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
831         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
832             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
833             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
834             ha->dpc_active) && time_before(jiffies, wait_online)) {
835 
836                 msleep(1000);
837         }
838         if (base_vha->flags.online)
839                 return_status = QLA_SUCCESS;
840         else
841                 return_status = QLA_FUNCTION_FAILED;
842 
843         return (return_status);
844 }
845 
846 /*
847  * qla2x00_wait_for_hba_ready
848  * Wait till the HBA is ready before doing driver unload
849  *
850  * Input:
851  *     ha - pointer to host adapter structure
852  *
853  * Note:
854  *    Does context switching-Release SPIN_LOCK
855  *    (if any) before calling this routine.
856  *
857  */
858 static void
859 qla2x00_wait_for_hba_ready(scsi_qla_host_t *vha)
860 {
861         struct qla_hw_data *ha = vha->hw;
862 
863         while ((!(vha->flags.online) || ha->dpc_active ||
864             ha->flags.mbox_busy))
865                 msleep(1000);
866 }
867 
868 int
869 qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
870 {
871         int             return_status;
872         unsigned long   wait_reset;
873         struct qla_hw_data *ha = vha->hw;
874         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
875 
876         wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
877         while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
878             test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
879             test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
880             ha->dpc_active) && time_before(jiffies, wait_reset)) {
881 
882                 msleep(1000);
883 
884                 if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
885                     ha->flags.chip_reset_done)
886                         break;
887         }
888         if (ha->flags.chip_reset_done)
889                 return_status = QLA_SUCCESS;
890         else
891                 return_status = QLA_FUNCTION_FAILED;
892 
893         return return_status;
894 }
895 
896 static void
897 sp_get(struct srb *sp)
898 {
899         atomic_inc(&sp->ref_count);
900 }
901 
902 /**************************************************************************
903 * qla2xxx_eh_abort
904 *
905 * Description:
906 *    The abort function will abort the specified command.
907 *
908 * Input:
909 *    cmd = Linux SCSI command packet to be aborted.
910 *
911 * Returns:
912 *    Either SUCCESS or FAILED.
913 *
914 * Note:
915 *    Only return FAILED if command not returned by firmware.
916 **************************************************************************/
917 static int
918 qla2xxx_eh_abort(struct scsi_cmnd *cmd)
919 {
920         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
921         srb_t *sp;
922         int ret;
923         unsigned int id;
924         uint64_t lun;
925         unsigned long flags;
926         int rval, wait = 0;
927         struct qla_hw_data *ha = vha->hw;
928 
929         if (!CMD_SP(cmd))
930                 return SUCCESS;
931 
932         ret = fc_block_scsi_eh(cmd);
933         if (ret != 0)
934                 return ret;
935         ret = SUCCESS;
936 
937         id = cmd->device->id;
938         lun = cmd->device->lun;
939 
940         spin_lock_irqsave(&ha->hardware_lock, flags);
941         sp = (srb_t *) CMD_SP(cmd);
942         if (!sp) {
943                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
944                 return SUCCESS;
945         }
946 
947         ql_dbg(ql_dbg_taskm, vha, 0x8002,
948             "Aborting from RISC nexus=%ld:%d:%llu sp=%p cmd=%p\n",
949             vha->host_no, id, lun, sp, cmd);
950 
951         /* Get a reference to the sp and drop the lock.*/
952         sp_get(sp);
953 
954         spin_unlock_irqrestore(&ha->hardware_lock, flags);
955         rval = ha->isp_ops->abort_command(sp);
956         if (rval) {
957                 if (rval == QLA_FUNCTION_PARAMETER_ERROR) {
958                         /*
959                          * Decrement the ref_count since we can't find the
960                          * command
961                          */
962                         atomic_dec(&sp->ref_count);
963                         ret = SUCCESS;
964                 } else
965                         ret = FAILED;
966 
967                 ql_dbg(ql_dbg_taskm, vha, 0x8003,
968                     "Abort command mbx failed cmd=%p, rval=%x.\n", cmd, rval);
969         } else {
970                 ql_dbg(ql_dbg_taskm, vha, 0x8004,
971                     "Abort command mbx success cmd=%p.\n", cmd);
972                 wait = 1;
973         }
974 
975         spin_lock_irqsave(&ha->hardware_lock, flags);
976         /*
977          * Clear the slot in the oustanding_cmds array if we can't find the
978          * command to reclaim the resources.
979          */
980         if (rval == QLA_FUNCTION_PARAMETER_ERROR)
981                 vha->req->outstanding_cmds[sp->handle] = NULL;
982         sp->done(ha, sp, 0);
983         spin_unlock_irqrestore(&ha->hardware_lock, flags);
984 
985         /* Did the command return during mailbox execution? */
986         if (ret == FAILED && !CMD_SP(cmd))
987                 ret = SUCCESS;
988 
989         /* Wait for the command to be returned. */
990         if (wait) {
991                 if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
992                         ql_log(ql_log_warn, vha, 0x8006,
993                             "Abort handler timed out cmd=%p.\n", cmd);
994                         ret = FAILED;
995                 }
996         }
997 
998         ql_log(ql_log_info, vha, 0x801c,
999             "Abort command issued nexus=%ld:%d:%llu --  %d %x.\n",
1000             vha->host_no, id, lun, wait, ret);
1001 
1002         return ret;
1003 }
1004 
1005 int
1006 qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
1007         uint64_t l, enum nexus_wait_type type)
1008 {
1009         int cnt, match, status;
1010         unsigned long flags;
1011         struct qla_hw_data *ha = vha->hw;
1012         struct req_que *req;
1013         srb_t *sp;
1014         struct scsi_cmnd *cmd;
1015 
1016         status = QLA_SUCCESS;
1017 
1018         spin_lock_irqsave(&ha->hardware_lock, flags);
1019         req = vha->req;
1020         for (cnt = 1; status == QLA_SUCCESS &&
1021                 cnt < req->num_outstanding_cmds; cnt++) {
1022                 sp = req->outstanding_cmds[cnt];
1023                 if (!sp)
1024                         continue;
1025                 if (sp->type != SRB_SCSI_CMD)
1026                         continue;
1027                 if (vha->vp_idx != sp->fcport->vha->vp_idx)
1028                         continue;
1029                 match = 0;
1030                 cmd = GET_CMD_SP(sp);
1031                 switch (type) {
1032                 case WAIT_HOST:
1033                         match = 1;
1034                         break;
1035                 case WAIT_TARGET:
1036                         match = cmd->device->id == t;
1037                         break;
1038                 case WAIT_LUN:
1039                         match = (cmd->device->id == t &&
1040                                 cmd->device->lun == l);
1041                         break;
1042                 }
1043                 if (!match)
1044                         continue;
1045 
1046                 spin_unlock_irqrestore(&ha->hardware_lock, flags);
1047                 status = qla2x00_eh_wait_on_command(cmd);
1048                 spin_lock_irqsave(&ha->hardware_lock, flags);
1049         }
1050         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1051 
1052         return status;
1053 }
1054 
1055 static char *reset_errors[] = {
1056         "HBA not online",
1057         "HBA not ready",
1058         "Task management failed",
1059         "Waiting for command completions",
1060 };
1061 
1062 static int
1063 __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
1064     struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, uint64_t, int))
1065 {
1066         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1067         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1068         int err;
1069 
1070         if (!fcport) {
1071                 return FAILED;
1072         }
1073 
1074         err = fc_block_scsi_eh(cmd);
1075         if (err != 0)
1076                 return err;
1077 
1078         ql_log(ql_log_info, vha, 0x8009,
1079             "%s RESET ISSUED nexus=%ld:%d:%llu cmd=%p.\n", name, vha->host_no,
1080             cmd->device->id, cmd->device->lun, cmd);
1081 
1082         err = 0;
1083         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1084                 ql_log(ql_log_warn, vha, 0x800a,
1085                     "Wait for hba online failed for cmd=%p.\n", cmd);
1086                 goto eh_reset_failed;
1087         }
1088         err = 2;
1089         if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
1090                 != QLA_SUCCESS) {
1091                 ql_log(ql_log_warn, vha, 0x800c,
1092                     "do_reset failed for cmd=%p.\n", cmd);
1093                 goto eh_reset_failed;
1094         }
1095         err = 3;
1096         if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
1097             cmd->device->lun, type) != QLA_SUCCESS) {
1098                 ql_log(ql_log_warn, vha, 0x800d,
1099                     "wait for pending cmds failed for cmd=%p.\n", cmd);
1100                 goto eh_reset_failed;
1101         }
1102 
1103         ql_log(ql_log_info, vha, 0x800e,
1104             "%s RESET SUCCEEDED nexus:%ld:%d:%llu cmd=%p.\n", name,
1105             vha->host_no, cmd->device->id, cmd->device->lun, cmd);
1106 
1107         return SUCCESS;
1108 
1109 eh_reset_failed:
1110         ql_log(ql_log_info, vha, 0x800f,
1111             "%s RESET FAILED: %s nexus=%ld:%d:%llu cmd=%p.\n", name,
1112             reset_errors[err], vha->host_no, cmd->device->id, cmd->device->lun,
1113             cmd);
1114         return FAILED;
1115 }
1116 
1117 static int
1118 qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
1119 {
1120         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1121         struct qla_hw_data *ha = vha->hw;
1122 
1123         return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
1124             ha->isp_ops->lun_reset);
1125 }
1126 
1127 static int
1128 qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
1129 {
1130         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1131         struct qla_hw_data *ha = vha->hw;
1132 
1133         return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
1134             ha->isp_ops->target_reset);
1135 }
1136 
1137 /**************************************************************************
1138 * qla2xxx_eh_bus_reset
1139 *
1140 * Description:
1141 *    The bus reset function will reset the bus and abort any executing
1142 *    commands.
1143 *
1144 * Input:
1145 *    cmd = Linux SCSI command packet of the command that cause the
1146 *          bus reset.
1147 *
1148 * Returns:
1149 *    SUCCESS/FAILURE (defined as macro in scsi.h).
1150 *
1151 **************************************************************************/
1152 static int
1153 qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
1154 {
1155         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1156         fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
1157         int ret = FAILED;
1158         unsigned int id;
1159         uint64_t lun;
1160 
1161         id = cmd->device->id;
1162         lun = cmd->device->lun;
1163 
1164         if (!fcport) {
1165                 return ret;
1166         }
1167 
1168         ret = fc_block_scsi_eh(cmd);
1169         if (ret != 0)
1170                 return ret;
1171         ret = FAILED;
1172 
1173         ql_log(ql_log_info, vha, 0x8012,
1174             "BUS RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1175 
1176         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1177                 ql_log(ql_log_fatal, vha, 0x8013,
1178                     "Wait for hba online failed board disabled.\n");
1179                 goto eh_bus_reset_done;
1180         }
1181 
1182         if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
1183                 ret = SUCCESS;
1184 
1185         if (ret == FAILED)
1186                 goto eh_bus_reset_done;
1187 
1188         /* Flush outstanding commands. */
1189         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) !=
1190             QLA_SUCCESS) {
1191                 ql_log(ql_log_warn, vha, 0x8014,
1192                     "Wait for pending commands failed.\n");
1193                 ret = FAILED;
1194         }
1195 
1196 eh_bus_reset_done:
1197         ql_log(ql_log_warn, vha, 0x802b,
1198             "BUS RESET %s nexus=%ld:%d:%llu.\n",
1199             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1200 
1201         return ret;
1202 }
1203 
1204 /**************************************************************************
1205 * qla2xxx_eh_host_reset
1206 *
1207 * Description:
1208 *    The reset function will reset the Adapter.
1209 *
1210 * Input:
1211 *      cmd = Linux SCSI command packet of the command that cause the
1212 *            adapter reset.
1213 *
1214 * Returns:
1215 *      Either SUCCESS or FAILED.
1216 *
1217 * Note:
1218 **************************************************************************/
1219 static int
1220 qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
1221 {
1222         scsi_qla_host_t *vha = shost_priv(cmd->device->host);
1223         struct qla_hw_data *ha = vha->hw;
1224         int ret = FAILED;
1225         unsigned int id;
1226         uint64_t lun;
1227         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
1228 
1229         id = cmd->device->id;
1230         lun = cmd->device->lun;
1231 
1232         ql_log(ql_log_info, vha, 0x8018,
1233             "ADAPTER RESET ISSUED nexus=%ld:%d:%llu.\n", vha->host_no, id, lun);
1234 
1235         /*
1236          * No point in issuing another reset if one is active.  Also do not
1237          * attempt a reset if we are updating flash.
1238          */
1239         if (qla2x00_reset_active(vha) || ha->optrom_state != QLA_SWAITING)
1240                 goto eh_host_reset_lock;
1241 
1242         if (vha != base_vha) {
1243                 if (qla2x00_vp_abort_isp(vha))
1244                         goto eh_host_reset_lock;
1245         } else {
1246                 if (IS_P3P_TYPE(vha->hw)) {
1247                         if (!qla82xx_fcoe_ctx_reset(vha)) {
1248                                 /* Ctx reset success */
1249                                 ret = SUCCESS;
1250                                 goto eh_host_reset_lock;
1251                         }
1252                         /* fall thru if ctx reset failed */
1253                 }
1254                 if (ha->wq)
1255                         flush_workqueue(ha->wq);
1256 
1257                 set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1258                 if (ha->isp_ops->abort_isp(base_vha)) {
1259                         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1260                         /* failed. schedule dpc to try */
1261                         set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
1262 
1263                         if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
1264                                 ql_log(ql_log_warn, vha, 0x802a,
1265                                     "wait for hba online failed.\n");
1266                                 goto eh_host_reset_lock;
1267                         }
1268                 }
1269                 clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
1270         }
1271 
1272         /* Waiting for command to be returned to OS.*/
1273         if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, WAIT_HOST) ==
1274                 QLA_SUCCESS)
1275                 ret = SUCCESS;
1276 
1277 eh_host_reset_lock:
1278         ql_log(ql_log_info, vha, 0x8017,
1279             "ADAPTER RESET %s nexus=%ld:%d:%llu.\n",
1280             (ret == FAILED) ? "FAILED" : "SUCCEEDED", vha->host_no, id, lun);
1281 
1282         return ret;
1283 }
1284 
1285 /*
1286 * qla2x00_loop_reset
1287 *      Issue loop reset.
1288 *
1289 * Input:
1290 *      ha = adapter block pointer.
1291 *
1292 * Returns:
1293 *      0 = success
1294 */
1295 int
1296 qla2x00_loop_reset(scsi_qla_host_t *vha)
1297 {
1298         int ret;
1299         struct fc_port *fcport;
1300         struct qla_hw_data *ha = vha->hw;
1301 
1302         if (IS_QLAFX00(ha)) {
1303                 return qlafx00_loop_reset(vha);
1304         }
1305 
1306         if (ql2xtargetreset == 1 && ha->flags.enable_target_reset) {
1307                 list_for_each_entry(fcport, &vha->vp_fcports, list) {
1308                         if (fcport->port_type != FCT_TARGET)
1309                                 continue;
1310 
1311                         ret = ha->isp_ops->target_reset(fcport, 0, 0);
1312                         if (ret != QLA_SUCCESS) {
1313                                 ql_dbg(ql_dbg_taskm, vha, 0x802c,
1314                                     "Bus Reset failed: Reset=%d "
1315                                     "d_id=%x.\n", ret, fcport->d_id.b24);
1316                         }
1317                 }
1318         }
1319 
1320 
1321         if (ha->flags.enable_lip_full_login && !IS_CNA_CAPABLE(ha)) {
1322                 atomic_set(&vha->loop_state, LOOP_DOWN);
1323                 atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
1324                 qla2x00_mark_all_devices_lost(vha, 0);
1325                 ret = qla2x00_full_login_lip(vha);
1326                 if (ret != QLA_SUCCESS) {
1327                         ql_dbg(ql_dbg_taskm, vha, 0x802d,
1328                             "full_login_lip=%d.\n", ret);
1329                 }
1330         }
1331 
1332         if (ha->flags.enable_lip_reset) {
1333                 ret = qla2x00_lip_reset(vha);
1334                 if (ret != QLA_SUCCESS)
1335                         ql_dbg(ql_dbg_taskm, vha, 0x802e,
1336                             "lip_reset failed (%d).\n", ret);
1337         }
1338 
1339         /* Issue marker command only when we are going to start the I/O */
1340         vha->marker_needed = 1;
1341 
1342         return QLA_SUCCESS;
1343 }
1344 
1345 void
1346 qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
1347 {
1348         int que, cnt;
1349         unsigned long flags;
1350         srb_t *sp;
1351         struct qla_hw_data *ha = vha->hw;
1352         struct req_que *req;
1353 
1354         spin_lock_irqsave(&ha->hardware_lock, flags);
1355         for (que = 0; que < ha->max_req_queues; que++) {
1356                 req = ha->req_q_map[que];
1357                 if (!req)
1358                         continue;
1359                 if (!req->outstanding_cmds)
1360                         continue;
1361                 for (cnt = 1; cnt < req->num_outstanding_cmds; cnt++) {
1362                         sp = req->outstanding_cmds[cnt];
1363                         if (sp) {
1364                                 req->outstanding_cmds[cnt] = NULL;
1365                                 sp->done(vha, sp, res);
1366                         }
1367                 }
1368         }
1369         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1370 }
1371 
1372 static int
1373 qla2xxx_slave_alloc(struct scsi_device *sdev)
1374 {
1375         struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
1376 
1377         if (!rport || fc_remote_port_chkready(rport))
1378                 return -ENXIO;
1379 
1380         sdev->hostdata = *(fc_port_t **)rport->dd_data;
1381 
1382         return 0;
1383 }
1384 
1385 static int
1386 qla2xxx_slave_configure(struct scsi_device *sdev)
1387 {
1388         scsi_qla_host_t *vha = shost_priv(sdev->host);
1389         struct req_que *req = vha->req;
1390 
1391         if (IS_T10_PI_CAPABLE(vha->hw))
1392                 blk_queue_update_dma_alignment(sdev->request_queue, 0x7);
1393 
1394         if (sdev->tagged_supported)
1395                 scsi_activate_tcq(sdev, req->max_q_depth);
1396         else
1397                 scsi_deactivate_tcq(sdev, req->max_q_depth);
1398         return 0;
1399 }
1400 
1401 static void
1402 qla2xxx_slave_destroy(struct scsi_device *sdev)
1403 {
1404         sdev->hostdata = NULL;
1405 }
1406 
1407 static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
1408 {
1409         fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
1410 
1411         if (!scsi_track_queue_full(sdev, qdepth))
1412                 return;
1413 
1414         ql_dbg(ql_dbg_io, fcport->vha, 0x3029,
1415             "Queue depth adjusted-down to %d for nexus=%ld:%d:%llu.\n",
1416             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1417 }
1418 
1419 static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
1420 {
1421         fc_port_t *fcport = sdev->hostdata;
1422         struct scsi_qla_host *vha = fcport->vha;
1423         struct req_que *req = NULL;
1424 
1425         req = vha->req;
1426         if (!req)
1427                 return;
1428 
1429         if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
1430                 return;
1431 
1432         if (sdev->ordered_tags)
1433                 scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
1434         else
1435                 scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
1436 
1437         ql_dbg(ql_dbg_io, vha, 0x302a,
1438             "Queue depth adjusted-up to %d for nexus=%ld:%d:%llu.\n",
1439             sdev->queue_depth, fcport->vha->host_no, sdev->id, sdev->lun);
1440 }
1441 
1442 static int
1443 qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
1444 {
1445         switch (reason) {
1446         case SCSI_QDEPTH_DEFAULT:
1447                 scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
1448                 break;
1449         case SCSI_QDEPTH_QFULL:
1450                 qla2x00_handle_queue_full(sdev, qdepth);
1451                 break;
1452         case SCSI_QDEPTH_RAMP_UP:
1453                 qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
1454                 break;
1455         default:
1456                 return -EOPNOTSUPP;
1457         }
1458 
1459         return sdev->queue_depth;
1460 }
1461 
1462 static int
1463 qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
1464 {
1465         if (sdev->tagged_supported) {
1466                 scsi_set_tag_type(sdev, tag_type);
1467                 if (tag_type)
1468                         scsi_activate_tcq(sdev, sdev->queue_depth);
1469                 else
1470                         scsi_deactivate_tcq(sdev, sdev->queue_depth);
1471         } else
1472                 tag_type = 0;
1473 
1474         return tag_type;
1475 }
1476 
1477 /**
1478  * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
1479  * @ha: HA context
1480  *
1481  * At exit, the @ha's flags.enable_64bit_addressing set to indicated
1482  * supported addressing method.
1483  */
1484 static void
1485 qla2x00_config_dma_addressing(struct qla_hw_data *ha)
1486 {
1487         /* Assume a 32bit DMA mask. */
1488         ha->flags.enable_64bit_addressing = 0;
1489 
1490         if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
1491                 /* Any upper-dword bits set? */
1492                 if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
1493                     !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
1494                         /* Ok, a 64bit DMA mask is applicable. */
1495                         ha->flags.enable_64bit_addressing = 1;
1496                         ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
1497                         ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
1498                         return;
1499                 }
1500         }
1501 
1502         dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
1503         pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
1504 }
1505 
1506 static void
1507 qla2x00_enable_intrs(struct qla_hw_data *ha)
1508 {
1509         unsigned long flags = 0;
1510         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1511 
1512         spin_lock_irqsave(&ha->hardware_lock, flags);
1513         ha->interrupts_on = 1;
1514         /* enable risc and host interrupts */
1515         WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
1516         RD_REG_WORD(&reg->ictrl);
1517         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1518 
1519 }
1520 
1521 static void
1522 qla2x00_disable_intrs(struct qla_hw_data *ha)
1523 {
1524         unsigned long flags = 0;
1525         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
1526 
1527         spin_lock_irqsave(&ha->hardware_lock, flags);
1528         ha->interrupts_on = 0;
1529         /* disable risc and host interrupts */
1530         WRT_REG_WORD(&reg->ictrl, 0);
1531         RD_REG_WORD(&reg->ictrl);
1532         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1533 }
1534 
1535 static void
1536 qla24xx_enable_intrs(struct qla_hw_data *ha)
1537 {
1538         unsigned long flags = 0;
1539         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1540 
1541         spin_lock_irqsave(&ha->hardware_lock, flags);
1542         ha->interrupts_on = 1;
1543         WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
1544         RD_REG_DWORD(&reg->ictrl);
1545         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1546 }
1547 
1548 static void
1549 qla24xx_disable_intrs(struct qla_hw_data *ha)
1550 {
1551         unsigned long flags = 0;
1552         struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
1553 
1554         if (IS_NOPOLLING_TYPE(ha))
1555                 return;
1556         spin_lock_irqsave(&ha->hardware_lock, flags);
1557         ha->interrupts_on = 0;
1558         WRT_REG_DWORD(&reg->ictrl, 0);
1559         RD_REG_DWORD(&reg->ictrl);
1560         spin_unlock_irqrestore(&ha->hardware_lock, flags);
1561 }
1562 
1563 static int
1564 qla2x00_iospace_config(struct qla_hw_data *ha)
1565 {
1566         resource_size_t pio;
1567         uint16_t msix;
1568         int cpus;
1569 
1570         if (pci_request_selected_regions(ha->pdev, ha->bars,
1571             QLA2XXX_DRIVER_NAME)) {
1572                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0011,
1573                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1574                     pci_name(ha->pdev));
1575                 goto iospace_error_exit;
1576         }
1577         if (!(ha->bars & 1))
1578                 goto skip_pio;
1579 
1580         /* We only need PIO for Flash operations on ISP2312 v2 chips. */
1581         pio = pci_resource_start(ha->pdev, 0);
1582         if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
1583                 if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1584                         ql_log_pci(ql_log_warn, ha->pdev, 0x0012,
1585                             "Invalid pci I/O region size (%s).\n",
1586                             pci_name(ha->pdev));
1587                         pio = 0;
1588                 }
1589         } else {
1590                 ql_log_pci(ql_log_warn, ha->pdev, 0x0013,
1591                     "Region #0 no a PIO resource (%s).\n",
1592                     pci_name(ha->pdev));
1593                 pio = 0;
1594         }
1595         ha->pio_address = pio;
1596         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0014,
1597             "PIO address=%llu.\n",
1598             (unsigned long long)ha->pio_address);
1599 
1600 skip_pio:
1601         /* Use MMIO operations for all accesses. */
1602         if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
1603                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0015,
1604                     "Region #1 not an MMIO resource (%s), aborting.\n",
1605                     pci_name(ha->pdev));
1606                 goto iospace_error_exit;
1607         }
1608         if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
1609                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0016,
1610                     "Invalid PCI mem region size (%s), aborting.\n",
1611                     pci_name(ha->pdev));
1612                 goto iospace_error_exit;
1613         }
1614 
1615         ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
1616         if (!ha->iobase) {
1617                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0017,
1618                     "Cannot remap MMIO (%s), aborting.\n",
1619                     pci_name(ha->pdev));
1620                 goto iospace_error_exit;
1621         }
1622 
1623         /* Determine queue resources */
1624         ha->max_req_queues = ha->max_rsp_queues = 1;
1625         if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
1626                 (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
1627                 (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
1628                 goto mqiobase_exit;
1629 
1630         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
1631                         pci_resource_len(ha->pdev, 3));
1632         if (ha->mqiobase) {
1633                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0018,
1634                     "MQIO Base=%p.\n", ha->mqiobase);
1635                 /* Read MSIX vector size of the board */
1636                 pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
1637                 ha->msix_count = msix;
1638                 /* Max queues are bounded by available msix vectors */
1639                 /* queue 0 uses two msix vectors */
1640                 if (ql2xmultique_tag) {
1641                         cpus = num_online_cpus();
1642                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1643                                 (cpus + 1) : (ha->msix_count - 1);
1644                         ha->max_req_queues = 2;
1645                 } else if (ql2xmaxqueues > 1) {
1646                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1647                             QLA_MQ_SIZE : ql2xmaxqueues;
1648                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc008,
1649                             "QoS mode set, max no of request queues:%d.\n",
1650                             ha->max_req_queues);
1651                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0019,
1652                             "QoS mode set, max no of request queues:%d.\n",
1653                             ha->max_req_queues);
1654                 }
1655                 ql_log_pci(ql_log_info, ha->pdev, 0x001a,
1656                     "MSI-X vector count: %d.\n", msix);
1657         } else
1658                 ql_log_pci(ql_log_info, ha->pdev, 0x001b,
1659                     "BAR 3 not enabled.\n");
1660 
1661 mqiobase_exit:
1662         ha->msix_count = ha->max_rsp_queues + 1;
1663         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x001c,
1664             "MSIX Count:%d.\n", ha->msix_count);
1665         return (0);
1666 
1667 iospace_error_exit:
1668         return (-ENOMEM);
1669 }
1670 
1671 
1672 static int
1673 qla83xx_iospace_config(struct qla_hw_data *ha)
1674 {
1675         uint16_t msix;
1676         int cpus;
1677 
1678         if (pci_request_selected_regions(ha->pdev, ha->bars,
1679             QLA2XXX_DRIVER_NAME)) {
1680                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0117,
1681                     "Failed to reserve PIO/MMIO regions (%s), aborting.\n",
1682                     pci_name(ha->pdev));
1683 
1684                 goto iospace_error_exit;
1685         }
1686 
1687         /* Use MMIO operations for all accesses. */
1688         if (!(pci_resource_flags(ha->pdev, 0) & IORESOURCE_MEM)) {
1689                 ql_log_pci(ql_log_warn, ha->pdev, 0x0118,
1690                     "Invalid pci I/O region size (%s).\n",
1691                     pci_name(ha->pdev));
1692                 goto iospace_error_exit;
1693         }
1694         if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
1695                 ql_log_pci(ql_log_warn, ha->pdev, 0x0119,
1696                     "Invalid PCI mem region size (%s), aborting\n",
1697                         pci_name(ha->pdev));
1698                 goto iospace_error_exit;
1699         }
1700 
1701         ha->iobase = ioremap(pci_resource_start(ha->pdev, 0), MIN_IOBASE_LEN);
1702         if (!ha->iobase) {
1703                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011a,
1704                     "Cannot remap MMIO (%s), aborting.\n",
1705                     pci_name(ha->pdev));
1706                 goto iospace_error_exit;
1707         }
1708 
1709         /* 64bit PCI BAR - BAR2 will correspoond to region 4 */
1710         /* 83XX 26XX always use MQ type access for queues
1711          * - mbar 2, a.k.a region 4 */
1712         ha->max_req_queues = ha->max_rsp_queues = 1;
1713         ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 4),
1714                         pci_resource_len(ha->pdev, 4));
1715 
1716         if (!ha->mqiobase) {
1717                 ql_log_pci(ql_log_fatal, ha->pdev, 0x011d,
1718                     "BAR2/region4 not enabled\n");
1719                 goto mqiobase_exit;
1720         }
1721 
1722         ha->msixbase = ioremap(pci_resource_start(ha->pdev, 2),
1723                         pci_resource_len(ha->pdev, 2));
1724         if (ha->msixbase) {
1725                 /* Read MSIX vector size of the board */
1726                 pci_read_config_word(ha->pdev,
1727                     QLA_83XX_PCI_MSIX_CONTROL, &msix);
1728                 ha->msix_count = msix;
1729                 /* Max queues are bounded by available msix vectors */
1730                 /* queue 0 uses two msix vectors */
1731                 if (ql2xmultique_tag) {
1732                         cpus = num_online_cpus();
1733                         ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
1734                                 (cpus + 1) : (ha->msix_count - 1);
1735                         ha->max_req_queues = 2;
1736                 } else if (ql2xmaxqueues > 1) {
1737                         ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
1738                                                 QLA_MQ_SIZE : ql2xmaxqueues;
1739                         ql_dbg_pci(ql_dbg_multiq, ha->pdev, 0xc00c,
1740                             "QoS mode set, max no of request queues:%d.\n",
1741                             ha->max_req_queues);
1742                         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011b,
1743                             "QoS mode set, max no of request queues:%d.\n",
1744                             ha->max_req_queues);
1745                 }
1746                 ql_log_pci(ql_log_info, ha->pdev, 0x011c,
1747                     "MSI-X vector count: %d.\n", msix);
1748         } else
1749                 ql_log_pci(ql_log_info, ha->pdev, 0x011e,
1750                     "BAR 1 not enabled.\n");
1751 
1752 mqiobase_exit:
1753         ha->msix_count = ha->max_rsp_queues + 1;
1754 
1755         qlt_83xx_iospace_config(ha);
1756 
1757         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x011f,
1758             "MSIX Count:%d.\n", ha->msix_count);
1759         return 0;
1760 
1761 iospace_error_exit:
1762         return -ENOMEM;
1763 }
1764 
1765 static struct isp_operations qla2100_isp_ops = {
1766         .pci_config             = qla2100_pci_config,
1767         .reset_chip             = qla2x00_reset_chip,
1768         .chip_diag              = qla2x00_chip_diag,
1769         .config_rings           = qla2x00_config_rings,
1770         .reset_adapter          = qla2x00_reset_adapter,
1771         .nvram_config           = qla2x00_nvram_config,
1772         .update_fw_options      = qla2x00_update_fw_options,
1773         .load_risc              = qla2x00_load_risc,
1774         .pci_info_str           = qla2x00_pci_info_str,
1775         .fw_version_str         = qla2x00_fw_version_str,
1776         .intr_handler           = qla2100_intr_handler,
1777         .enable_intrs           = qla2x00_enable_intrs,
1778         .disable_intrs          = qla2x00_disable_intrs,
1779         .abort_command          = qla2x00_abort_command,
1780         .target_reset           = qla2x00_abort_target,
1781         .lun_reset              = qla2x00_lun_reset,
1782         .fabric_login           = qla2x00_login_fabric,
1783         .fabric_logout          = qla2x00_fabric_logout,
1784         .calc_req_entries       = qla2x00_calc_iocbs_32,
1785         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1786         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1787         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1788         .read_nvram             = qla2x00_read_nvram_data,
1789         .write_nvram            = qla2x00_write_nvram_data,
1790         .fw_dump                = qla2100_fw_dump,
1791         .beacon_on              = NULL,
1792         .beacon_off             = NULL,
1793         .beacon_blink           = NULL,
1794         .read_optrom            = qla2x00_read_optrom_data,
1795         .write_optrom           = qla2x00_write_optrom_data,
1796         .get_flash_version      = qla2x00_get_flash_version,
1797         .start_scsi             = qla2x00_start_scsi,
1798         .abort_isp              = qla2x00_abort_isp,
1799         .iospace_config         = qla2x00_iospace_config,
1800         .initialize_adapter     = qla2x00_initialize_adapter,
1801 };
1802 
1803 static struct isp_operations qla2300_isp_ops = {
1804         .pci_config             = qla2300_pci_config,
1805         .reset_chip             = qla2x00_reset_chip,
1806         .chip_diag              = qla2x00_chip_diag,
1807         .config_rings           = qla2x00_config_rings,
1808         .reset_adapter          = qla2x00_reset_adapter,
1809         .nvram_config           = qla2x00_nvram_config,
1810         .update_fw_options      = qla2x00_update_fw_options,
1811         .load_risc              = qla2x00_load_risc,
1812         .pci_info_str           = qla2x00_pci_info_str,
1813         .fw_version_str         = qla2x00_fw_version_str,
1814         .intr_handler           = qla2300_intr_handler,
1815         .enable_intrs           = qla2x00_enable_intrs,
1816         .disable_intrs          = qla2x00_disable_intrs,
1817         .abort_command          = qla2x00_abort_command,
1818         .target_reset           = qla2x00_abort_target,
1819         .lun_reset              = qla2x00_lun_reset,
1820         .fabric_login           = qla2x00_login_fabric,
1821         .fabric_logout          = qla2x00_fabric_logout,
1822         .calc_req_entries       = qla2x00_calc_iocbs_32,
1823         .build_iocbs            = qla2x00_build_scsi_iocbs_32,
1824         .prep_ms_iocb           = qla2x00_prep_ms_iocb,
1825         .prep_ms_fdmi_iocb      = qla2x00_prep_ms_fdmi_iocb,
1826         .read_nvram             = qla2x00_read_nvram_data,
1827         .write_nvram            = qla2x00_write_nvram_data,
1828         .fw_dump                = qla2300_fw_dump,
1829         .beacon_on              = qla2x00_beacon_on,
1830         .beacon_off             = qla2x00_beacon_off,
1831         .beacon_blink           = qla2x00_beacon_blink,
1832         .read_optrom            = qla2x00_read_optrom_data,
1833         .write_optrom           = qla2x00_write_optrom_data,
1834         .get_flash_version      = qla2x00_get_flash_version,
1835         .start_scsi             = qla2x00_start_scsi,
1836         .abort_isp              = qla2x00_abort_isp,
1837         .iospace_config         = qla2x00_iospace_config,
1838         .initialize_adapter     = qla2x00_initialize_adapter,
1839 };
1840 
1841 static struct isp_operations qla24xx_isp_ops = {
1842         .pci_config             = qla24xx_pci_config,
1843         .reset_chip             = qla24xx_reset_chip,
1844         .chip_diag              = qla24xx_chip_diag,
1845         .config_rings           = qla24xx_config_rings,
1846         .reset_adapter          = qla24xx_reset_adapter,
1847         .nvram_config           = qla24xx_nvram_config,
1848         .update_fw_options      = qla24xx_update_fw_options,
1849         .load_risc              = qla24xx_load_risc,
1850         .pci_info_str           = qla24xx_pci_info_str,
1851         .fw_version_str         = qla24xx_fw_version_str,
1852         .intr_handler           = qla24xx_intr_handler,
1853         .enable_intrs           = qla24xx_enable_intrs,
1854         .disable_intrs          = qla24xx_disable_intrs,
1855         .abort_command          = qla24xx_abort_command,
1856         .target_reset           = qla24xx_abort_target,
1857         .lun_reset              = qla24xx_lun_reset,
1858         .fabric_login           = qla24xx_login_fabric,
1859         .fabric_logout          = qla24xx_fabric_logout,
1860         .calc_req_entries       = NULL,
1861         .build_iocbs            = NULL,
1862         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1863         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1864         .read_nvram             = qla24xx_read_nvram_data,
1865         .write_nvram            = qla24xx_write_nvram_data,
1866         .fw_dump                = qla24xx_fw_dump,
1867         .beacon_on              = qla24xx_beacon_on,
1868         .beacon_off             = qla24xx_beacon_off,
1869         .beacon_blink           = qla24xx_beacon_blink,
1870         .read_optrom            = qla24xx_read_optrom_data,
1871         .write_optrom           = qla24xx_write_optrom_data,
1872         .get_flash_version      = qla24xx_get_flash_version,
1873         .start_scsi             = qla24xx_start_scsi,
1874         .abort_isp              = qla2x00_abort_isp,
1875         .iospace_config         = qla2x00_iospace_config,
1876         .initialize_adapter     = qla2x00_initialize_adapter,
1877 };
1878 
1879 static struct isp_operations qla25xx_isp_ops = {
1880         .pci_config             = qla25xx_pci_config,
1881         .reset_chip             = qla24xx_reset_chip,
1882         .chip_diag              = qla24xx_chip_diag,
1883         .config_rings           = qla24xx_config_rings,
1884         .reset_adapter          = qla24xx_reset_adapter,
1885         .nvram_config           = qla24xx_nvram_config,
1886         .update_fw_options      = qla24xx_update_fw_options,
1887         .load_risc              = qla24xx_load_risc,
1888         .pci_info_str           = qla24xx_pci_info_str,
1889         .fw_version_str         = qla24xx_fw_version_str,
1890         .intr_handler           = qla24xx_intr_handler,
1891         .enable_intrs           = qla24xx_enable_intrs,
1892         .disable_intrs          = qla24xx_disable_intrs,
1893         .abort_command          = qla24xx_abort_command,
1894         .target_reset           = qla24xx_abort_target,
1895         .lun_reset              = qla24xx_lun_reset,
1896         .fabric_login           = qla24xx_login_fabric,
1897         .fabric_logout          = qla24xx_fabric_logout,
1898         .calc_req_entries       = NULL,
1899         .build_iocbs            = NULL,
1900         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1901         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1902         .read_nvram             = qla25xx_read_nvram_data,
1903         .write_nvram            = qla25xx_write_nvram_data,
1904         .fw_dump                = qla25xx_fw_dump,
1905         .beacon_on              = qla24xx_beacon_on,
1906         .beacon_off             = qla24xx_beacon_off,
1907         .beacon_blink           = qla24xx_beacon_blink,
1908         .read_optrom            = qla25xx_read_optrom_data,
1909         .write_optrom           = qla24xx_write_optrom_data,
1910         .get_flash_version      = qla24xx_get_flash_version,
1911         .start_scsi             = qla24xx_dif_start_scsi,
1912         .abort_isp              = qla2x00_abort_isp,
1913         .iospace_config         = qla2x00_iospace_config,
1914         .initialize_adapter     = qla2x00_initialize_adapter,
1915 };
1916 
1917 static struct isp_operations qla81xx_isp_ops = {
1918         .pci_config             = qla25xx_pci_config,
1919         .reset_chip             = qla24xx_reset_chip,
1920         .chip_diag              = qla24xx_chip_diag,
1921         .config_rings           = qla24xx_config_rings,
1922         .reset_adapter          = qla24xx_reset_adapter,
1923         .nvram_config           = qla81xx_nvram_config,
1924         .update_fw_options      = qla81xx_update_fw_options,
1925         .load_risc              = qla81xx_load_risc,
1926         .pci_info_str           = qla24xx_pci_info_str,
1927         .fw_version_str         = qla24xx_fw_version_str,
1928         .intr_handler           = qla24xx_intr_handler,
1929         .enable_intrs           = qla24xx_enable_intrs,
1930         .disable_intrs          = qla24xx_disable_intrs,
1931         .abort_command          = qla24xx_abort_command,
1932         .target_reset           = qla24xx_abort_target,
1933         .lun_reset              = qla24xx_lun_reset,
1934         .fabric_login           = qla24xx_login_fabric,
1935         .fabric_logout          = qla24xx_fabric_logout,
1936         .calc_req_entries       = NULL,
1937         .build_iocbs            = NULL,
1938         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1939         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1940         .read_nvram             = NULL,
1941         .write_nvram            = NULL,
1942         .fw_dump                = qla81xx_fw_dump,
1943         .beacon_on              = qla24xx_beacon_on,
1944         .beacon_off             = qla24xx_beacon_off,
1945         .beacon_blink           = qla83xx_beacon_blink,
1946         .read_optrom            = qla25xx_read_optrom_data,
1947         .write_optrom           = qla24xx_write_optrom_data,
1948         .get_flash_version      = qla24xx_get_flash_version,
1949         .start_scsi             = qla24xx_dif_start_scsi,
1950         .abort_isp              = qla2x00_abort_isp,
1951         .iospace_config         = qla2x00_iospace_config,
1952         .initialize_adapter     = qla2x00_initialize_adapter,
1953 };
1954 
1955 static struct isp_operations qla82xx_isp_ops = {
1956         .pci_config             = qla82xx_pci_config,
1957         .reset_chip             = qla82xx_reset_chip,
1958         .chip_diag              = qla24xx_chip_diag,
1959         .config_rings           = qla82xx_config_rings,
1960         .reset_adapter          = qla24xx_reset_adapter,
1961         .nvram_config           = qla81xx_nvram_config,
1962         .update_fw_options      = qla24xx_update_fw_options,
1963         .load_risc              = qla82xx_load_risc,
1964         .pci_info_str           = qla24xx_pci_info_str,
1965         .fw_version_str         = qla24xx_fw_version_str,
1966         .intr_handler           = qla82xx_intr_handler,
1967         .enable_intrs           = qla82xx_enable_intrs,
1968         .disable_intrs          = qla82xx_disable_intrs,
1969         .abort_command          = qla24xx_abort_command,
1970         .target_reset           = qla24xx_abort_target,
1971         .lun_reset              = qla24xx_lun_reset,
1972         .fabric_login           = qla24xx_login_fabric,
1973         .fabric_logout          = qla24xx_fabric_logout,
1974         .calc_req_entries       = NULL,
1975         .build_iocbs            = NULL,
1976         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
1977         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
1978         .read_nvram             = qla24xx_read_nvram_data,
1979         .write_nvram            = qla24xx_write_nvram_data,
1980         .fw_dump                = qla82xx_fw_dump,
1981         .beacon_on              = qla82xx_beacon_on,
1982         .beacon_off             = qla82xx_beacon_off,
1983         .beacon_blink           = NULL,
1984         .read_optrom            = qla82xx_read_optrom_data,
1985         .write_optrom           = qla82xx_write_optrom_data,
1986         .get_flash_version      = qla82xx_get_flash_version,
1987         .start_scsi             = qla82xx_start_scsi,
1988         .abort_isp              = qla82xx_abort_isp,
1989         .iospace_config         = qla82xx_iospace_config,
1990         .initialize_adapter     = qla2x00_initialize_adapter,
1991 };
1992 
1993 static struct isp_operations qla8044_isp_ops = {
1994         .pci_config             = qla82xx_pci_config,
1995         .reset_chip             = qla82xx_reset_chip,
1996         .chip_diag              = qla24xx_chip_diag,
1997         .config_rings           = qla82xx_config_rings,
1998         .reset_adapter          = qla24xx_reset_adapter,
1999         .nvram_config           = qla81xx_nvram_config,
2000         .update_fw_options      = qla24xx_update_fw_options,
2001         .load_risc              = qla82xx_load_risc,
2002         .pci_info_str           = qla24xx_pci_info_str,
2003         .fw_version_str         = qla24xx_fw_version_str,
2004         .intr_handler           = qla8044_intr_handler,
2005         .enable_intrs           = qla82xx_enable_intrs,
2006         .disable_intrs          = qla82xx_disable_intrs,
2007         .abort_command          = qla24xx_abort_command,
2008         .target_reset           = qla24xx_abort_target,
2009         .lun_reset              = qla24xx_lun_reset,
2010         .fabric_login           = qla24xx_login_fabric,
2011         .fabric_logout          = qla24xx_fabric_logout,
2012         .calc_req_entries       = NULL,
2013         .build_iocbs            = NULL,
2014         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2015         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2016         .read_nvram             = NULL,
2017         .write_nvram            = NULL,
2018         .fw_dump                = qla8044_fw_dump,
2019         .beacon_on              = qla82xx_beacon_on,
2020         .beacon_off             = qla82xx_beacon_off,
2021         .beacon_blink           = NULL,
2022         .read_optrom            = qla8044_read_optrom_data,
2023         .write_optrom           = qla8044_write_optrom_data,
2024         .get_flash_version      = qla82xx_get_flash_version,
2025         .start_scsi             = qla82xx_start_scsi,
2026         .abort_isp              = qla8044_abort_isp,
2027         .iospace_config         = qla82xx_iospace_config,
2028         .initialize_adapter     = qla2x00_initialize_adapter,
2029 };
2030 
2031 static struct isp_operations qla83xx_isp_ops = {
2032         .pci_config             = qla25xx_pci_config,
2033         .reset_chip             = qla24xx_reset_chip,
2034         .chip_diag              = qla24xx_chip_diag,
2035         .config_rings           = qla24xx_config_rings,
2036         .reset_adapter          = qla24xx_reset_adapter,
2037         .nvram_config           = qla81xx_nvram_config,
2038         .update_fw_options      = qla81xx_update_fw_options,
2039         .load_risc              = qla81xx_load_risc,
2040         .pci_info_str           = qla24xx_pci_info_str,
2041         .fw_version_str         = qla24xx_fw_version_str,
2042         .intr_handler           = qla24xx_intr_handler,
2043         .enable_intrs           = qla24xx_enable_intrs,
2044         .disable_intrs          = qla24xx_disable_intrs,
2045         .abort_command          = qla24xx_abort_command,
2046         .target_reset           = qla24xx_abort_target,
2047         .lun_reset              = qla24xx_lun_reset,
2048         .fabric_login           = qla24xx_login_fabric,
2049         .fabric_logout          = qla24xx_fabric_logout,
2050         .calc_req_entries       = NULL,
2051         .build_iocbs            = NULL,
2052         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2053         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2054         .read_nvram             = NULL,
2055         .write_nvram            = NULL,
2056         .fw_dump                = qla83xx_fw_dump,
2057         .beacon_on              = qla24xx_beacon_on,
2058         .beacon_off             = qla24xx_beacon_off,
2059         .beacon_blink           = qla83xx_beacon_blink,
2060         .read_optrom            = qla25xx_read_optrom_data,
2061         .write_optrom           = qla24xx_write_optrom_data,
2062         .get_flash_version      = qla24xx_get_flash_version,
2063         .start_scsi             = qla24xx_dif_start_scsi,
2064         .abort_isp              = qla2x00_abort_isp,
2065         .iospace_config         = qla83xx_iospace_config,
2066         .initialize_adapter     = qla2x00_initialize_adapter,
2067 };
2068 
2069 static struct isp_operations qlafx00_isp_ops = {
2070         .pci_config             = qlafx00_pci_config,
2071         .reset_chip             = qlafx00_soft_reset,
2072         .chip_diag              = qlafx00_chip_diag,
2073         .config_rings           = qlafx00_config_rings,
2074         .reset_adapter          = qlafx00_soft_reset,
2075         .nvram_config           = NULL,
2076         .update_fw_options      = NULL,
2077         .load_risc              = NULL,
2078         .pci_info_str           = qlafx00_pci_info_str,
2079         .fw_version_str         = qlafx00_fw_version_str,
2080         .intr_handler           = qlafx00_intr_handler,
2081         .enable_intrs           = qlafx00_enable_intrs,
2082         .disable_intrs          = qlafx00_disable_intrs,
2083         .abort_command          = qla24xx_async_abort_command,
2084         .target_reset           = qlafx00_abort_target,
2085         .lun_reset              = qlafx00_lun_reset,
2086         .fabric_login           = NULL,
2087         .fabric_logout          = NULL,
2088         .calc_req_entries       = NULL,
2089         .build_iocbs            = NULL,
2090         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2091         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2092         .read_nvram             = qla24xx_read_nvram_data,
2093         .write_nvram            = qla24xx_write_nvram_data,
2094         .fw_dump                = NULL,
2095         .beacon_on              = qla24xx_beacon_on,
2096         .beacon_off             = qla24xx_beacon_off,
2097         .beacon_blink           = NULL,
2098         .read_optrom            = qla24xx_read_optrom_data,
2099         .write_optrom           = qla24xx_write_optrom_data,
2100         .get_flash_version      = qla24xx_get_flash_version,
2101         .start_scsi             = qlafx00_start_scsi,
2102         .abort_isp              = qlafx00_abort_isp,
2103         .iospace_config         = qlafx00_iospace_config,
2104         .initialize_adapter     = qlafx00_initialize_adapter,
2105 };
2106 
2107 static struct isp_operations qla27xx_isp_ops = {
2108         .pci_config             = qla25xx_pci_config,
2109         .reset_chip             = qla24xx_reset_chip,
2110         .chip_diag              = qla24xx_chip_diag,
2111         .config_rings           = qla24xx_config_rings,
2112         .reset_adapter          = qla24xx_reset_adapter,
2113         .nvram_config           = qla81xx_nvram_config,
2114         .update_fw_options      = qla81xx_update_fw_options,
2115         .load_risc              = qla81xx_load_risc,
2116         .pci_info_str           = qla24xx_pci_info_str,
2117         .fw_version_str         = qla24xx_fw_version_str,
2118         .intr_handler           = qla24xx_intr_handler,
2119         .enable_intrs           = qla24xx_enable_intrs,
2120         .disable_intrs          = qla24xx_disable_intrs,
2121         .abort_command          = qla24xx_abort_command,
2122         .target_reset           = qla24xx_abort_target,
2123         .lun_reset              = qla24xx_lun_reset,
2124         .fabric_login           = qla24xx_login_fabric,
2125         .fabric_logout          = qla24xx_fabric_logout,
2126         .calc_req_entries       = NULL,
2127         .build_iocbs            = NULL,
2128         .prep_ms_iocb           = qla24xx_prep_ms_iocb,
2129         .prep_ms_fdmi_iocb      = qla24xx_prep_ms_fdmi_iocb,
2130         .read_nvram             = NULL,
2131         .write_nvram            = NULL,
2132         .fw_dump                = qla27xx_fwdump,
2133         .beacon_on              = qla24xx_beacon_on,
2134         .beacon_off             = qla24xx_beacon_off,
2135         .beacon_blink           = qla83xx_beacon_blink,
2136         .read_optrom            = qla25xx_read_optrom_data,
2137         .write_optrom           = qla24xx_write_optrom_data,
2138         .get_flash_version      = qla24xx_get_flash_version,
2139         .start_scsi             = qla24xx_dif_start_scsi,
2140         .abort_isp              = qla2x00_abort_isp,
2141         .iospace_config         = qla83xx_iospace_config,
2142         .initialize_adapter     = qla2x00_initialize_adapter,
2143 };
2144 
2145 static inline void
2146 qla2x00_set_isp_flags(struct qla_hw_data *ha)
2147 {
2148         ha->device_type = DT_EXTENDED_IDS;
2149         switch (ha->pdev->device) {
2150         case PCI_DEVICE_ID_QLOGIC_ISP2100:
2151                 ha->device_type |= DT_ISP2100;
2152                 ha->device_type &= ~DT_EXTENDED_IDS;
2153                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2154                 break;
2155         case PCI_DEVICE_ID_QLOGIC_ISP2200:
2156                 ha->device_type |= DT_ISP2200;
2157                 ha->device_type &= ~DT_EXTENDED_IDS;
2158                 ha->fw_srisc_address = RISC_START_ADDRESS_2100;
2159                 break;
2160         case PCI_DEVICE_ID_QLOGIC_ISP2300:
2161                 ha->device_type |= DT_ISP2300;
2162                 ha->device_type |= DT_ZIO_SUPPORTED;
2163                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2164                 break;
2165         case PCI_DEVICE_ID_QLOGIC_ISP2312:
2166                 ha->device_type |= DT_ISP2312;
2167                 ha->device_type |= DT_ZIO_SUPPORTED;
2168                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2169                 break;
2170         case PCI_DEVICE_ID_QLOGIC_ISP2322:
2171                 ha->device_type |= DT_ISP2322;
2172                 ha->device_type |= DT_ZIO_SUPPORTED;
2173                 if (ha->pdev->subsystem_vendor == 0x1028 &&
2174                     ha->pdev->subsystem_device == 0x0170)
2175                         ha->device_type |= DT_OEM_001;
2176                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2177                 break;
2178         case PCI_DEVICE_ID_QLOGIC_ISP6312:
2179                 ha->device_type |= DT_ISP6312;
2180                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2181                 break;
2182         case PCI_DEVICE_ID_QLOGIC_ISP6322:
2183                 ha->device_type |= DT_ISP6322;
2184                 ha->fw_srisc_address = RISC_START_ADDRESS_2300;
2185                 break;
2186         case PCI_DEVICE_ID_QLOGIC_ISP2422:
2187                 ha->device_type |= DT_ISP2422;
2188                 ha->device_type |= DT_ZIO_SUPPORTED;
2189                 ha->device_type |= DT_FWI2;
2190                 ha->device_type |= DT_IIDMA;
2191                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2192                 break;
2193         case PCI_DEVICE_ID_QLOGIC_ISP2432:
2194                 ha->device_type |= DT_ISP2432;
2195                 ha->device_type |= DT_ZIO_SUPPORTED;
2196                 ha->device_type |= DT_FWI2;
2197                 ha->device_type |= DT_IIDMA;
2198                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2199                 break;
2200         case PCI_DEVICE_ID_QLOGIC_ISP8432:
2201                 ha->device_type |= DT_ISP8432;
2202                 ha->device_type |= DT_ZIO_SUPPORTED;
2203                 ha->device_type |= DT_FWI2;
2204                 ha->device_type |= DT_IIDMA;
2205                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2206                 break;
2207         case PCI_DEVICE_ID_QLOGIC_ISP5422:
2208                 ha->device_type |= DT_ISP5422;
2209                 ha->device_type |= DT_FWI2;
2210                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2211                 break;
2212         case PCI_DEVICE_ID_QLOGIC_ISP5432:
2213                 ha->device_type |= DT_ISP5432;
2214                 ha->device_type |= DT_FWI2;
2215                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2216                 break;
2217         case PCI_DEVICE_ID_QLOGIC_ISP2532:
2218                 ha->device_type |= DT_ISP2532;
2219                 ha->device_type |= DT_ZIO_SUPPORTED;
2220                 ha->device_type |= DT_FWI2;
2221                 ha->device_type |= DT_IIDMA;
2222                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2223                 break;
2224         case PCI_DEVICE_ID_QLOGIC_ISP8001:
2225                 ha->device_type |= DT_ISP8001;
2226                 ha->device_type |= DT_ZIO_SUPPORTED;
2227                 ha->device_type |= DT_FWI2;
2228                 ha->device_type |= DT_IIDMA;
2229                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2230                 break;
2231         case PCI_DEVICE_ID_QLOGIC_ISP8021:
2232                 ha->device_type |= DT_ISP8021;
2233                 ha->device_type |= DT_ZIO_SUPPORTED;
2234                 ha->device_type |= DT_FWI2;
2235                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2236                 /* Initialize 82XX ISP flags */
2237                 qla82xx_init_flags(ha);
2238                 break;
2239          case PCI_DEVICE_ID_QLOGIC_ISP8044:
2240                 ha->device_type |= DT_ISP8044;
2241                 ha->device_type |= DT_ZIO_SUPPORTED;
2242                 ha->device_type |= DT_FWI2;
2243                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2244                 /* Initialize 82XX ISP flags */
2245                 qla82xx_init_flags(ha);
2246                 break;
2247         case PCI_DEVICE_ID_QLOGIC_ISP2031:
2248                 ha->device_type |= DT_ISP2031;
2249                 ha->device_type |= DT_ZIO_SUPPORTED;
2250                 ha->device_type |= DT_FWI2;
2251                 ha->device_type |= DT_IIDMA;
2252                 ha->device_type |= DT_T10_PI;
2253                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2254                 break;
2255         case PCI_DEVICE_ID_QLOGIC_ISP8031:
2256                 ha->device_type |= DT_ISP8031;
2257                 ha->device_type |= DT_ZIO_SUPPORTED;
2258                 ha->device_type |= DT_FWI2;
2259                 ha->device_type |= DT_IIDMA;
2260                 ha->device_type |= DT_T10_PI;
2261                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2262                 break;
2263         case PCI_DEVICE_ID_QLOGIC_ISPF001:
2264                 ha->device_type |= DT_ISPFX00;
2265                 break;
2266         case PCI_DEVICE_ID_QLOGIC_ISP2071:
2267                 ha->device_type |= DT_ISP2071;
2268                 ha->device_type |= DT_ZIO_SUPPORTED;
2269                 ha->device_type |= DT_FWI2;
2270                 ha->device_type |= DT_IIDMA;
2271                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2272                 break;
2273         case PCI_DEVICE_ID_QLOGIC_ISP2271:
2274                 ha->device_type |= DT_ISP2271;
2275                 ha->device_type |= DT_ZIO_SUPPORTED;
2276                 ha->device_type |= DT_FWI2;
2277                 ha->device_type |= DT_IIDMA;
2278                 ha->fw_srisc_address = RISC_START_ADDRESS_2400;
2279                 break;
2280         }
2281 
2282         if (IS_QLA82XX(ha))
2283                 ha->port_no = ha->portnum & 1;
2284         else {
2285                 /* Get adapter physical port no from interrupt pin register. */
2286                 pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
2287                 if (IS_QLA27XX(ha))
2288                         ha->port_no--;
2289                 else
2290                         ha->port_no = !(ha->port_no & 1);
2291         }
2292 
2293         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x000b,
2294             "device_type=0x%x port=%d fw_srisc_address=0x%x.\n",
2295             ha->device_type, ha->port_no, ha->fw_srisc_address);
2296 }
2297 
2298 static void
2299 qla2xxx_scan_start(struct Scsi_Host *shost)
2300 {
2301         scsi_qla_host_t *vha = shost_priv(shost);
2302 
2303         if (vha->hw->flags.running_gold_fw)
2304                 return;
2305 
2306         set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
2307         set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
2308         set_bit(RSCN_UPDATE, &vha->dpc_flags);
2309         set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
2310 }
2311 
2312 static int
2313 qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
2314 {
2315         scsi_qla_host_t *vha = shost_priv(shost);
2316 
2317         if (!vha->host)
2318                 return 1;
2319         if (time > vha->hw->loop_reset_delay * HZ)
2320                 return 1;
2321 
2322         return atomic_read(&vha->loop_state) == LOOP_READY;
2323 }
2324 
2325 /*
2326  * PCI driver interface
2327  */
2328 static int
2329 qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
2330 {
2331         int     ret = -ENODEV;
2332         struct Scsi_Host *host;
2333         scsi_qla_host_t *base_vha = NULL;
2334         struct qla_hw_data *ha;
2335         char pci_info[30];
2336         char fw_str[30], wq_name[30];
2337         struct scsi_host_template *sht;
2338         int bars, mem_only = 0;
2339         uint16_t req_length = 0, rsp_length = 0;
2340         struct req_que *req = NULL;
2341         struct rsp_que *rsp = NULL;
2342         bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
2343         sht = &qla2xxx_driver_template;
2344         if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
2345             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
2346             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
2347             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
2348             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
2349             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
2350             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
2351             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021 ||
2352             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2031 ||
2353             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8031 ||
2354             pdev->device == PCI_DEVICE_ID_QLOGIC_ISPF001 ||
2355             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8044 ||
2356             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2071 ||
2357             pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2271) {
2358                 bars = pci_select_bars(pdev, IORESOURCE_MEM);
2359                 mem_only = 1;
2360                 ql_dbg_pci(ql_dbg_init, pdev, 0x0007,
2361                     "Mem only adapter.\n");
2362         }
2363         ql_dbg_pci(ql_dbg_init, pdev, 0x0008,
2364             "Bars=%d.\n", bars);
2365 
2366         if (mem_only) {
2367                 if (pci_enable_device_mem(pdev))
2368                         goto probe_out;
2369         } else {
2370                 if (pci_enable_device(pdev))
2371                         goto probe_out;
2372         }
2373 
2374         /* This may fail but that's ok */
2375         pci_enable_pcie_error_reporting(pdev);
2376 
2377         ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
2378         if (!ha) {
2379                 ql_log_pci(ql_log_fatal, pdev, 0x0009,
2380                     "Unable to allocate memory for ha.\n");
2381                 goto probe_out;
2382         }
2383         ql_dbg_pci(ql_dbg_init, pdev, 0x000a,
2384             "Memory allocated for ha=%p.\n", ha);
2385         ha->pdev = pdev;
2386         ha->tgt.enable_class_2 = ql2xenableclass2;
2387 
2388         /* Clear our data area */
2389         ha->bars = bars;
2390         ha->mem_only = mem_only;
2391         spin_lock_init(&ha->hardware_lock);
2392         spin_lock_init(&ha->vport_slock);
2393         mutex_init(&ha->selflogin_lock);
2394         mutex_init(&ha->optrom_mutex);
2395 
2396         /* Set ISP-type information. */
2397         qla2x00_set_isp_flags(ha);
2398 
2399         /* Set EEH reset type to fundamental if required by hba */
2400         if (IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha) ||
2401             IS_QLA83XX(ha) || IS_QLA27XX(ha))
2402                 pdev->needs_freset = 1;
2403 
2404         ha->prev_topology = 0;
2405         ha->init_cb_size = sizeof(init_cb_t);
2406         ha->link_data_rate = PORT_SPEED_UNKNOWN;
2407         ha->optrom_size = OPTROM_SIZE_2300;
2408 
2409         /* Assign ISP specific operations. */
2410         if (IS_QLA2100(ha)) {
2411                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2412                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
2413                 req_length = REQUEST_ENTRY_CNT_2100;
2414                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2415                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2416                 ha->gid_list_info_size = 4;
2417                 ha->flash_conf_off = ~0;
2418                 ha->flash_data_off = ~0;
2419                 ha->nvram_conf_off = ~0;
2420                 ha->nvram_data_off = ~0;
2421                 ha->isp_ops = &qla2100_isp_ops;
2422         } else if (IS_QLA2200(ha)) {
2423                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2424                 ha->mbx_count = MAILBOX_REGISTER_COUNT_2200;
2425                 req_length = REQUEST_ENTRY_CNT_2200;
2426                 rsp_length = RESPONSE_ENTRY_CNT_2100;
2427                 ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
2428                 ha->gid_list_info_size = 4;
2429                 ha->flash_conf_off = ~0;
2430                 ha->flash_data_off = ~0;
2431                 ha->nvram_conf_off = ~0;
2432                 ha->nvram_data_off = ~0;
2433                 ha->isp_ops = &qla2100_isp_ops;
2434         } else if (IS_QLA23XX(ha)) {
2435                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2100;
2436                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2437                 req_length = REQUEST_ENTRY_CNT_2200;
2438                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2439                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2440                 ha->gid_list_info_size = 6;
2441                 if (IS_QLA2322(ha) || IS_QLA6322(ha))
2442                         ha->optrom_size = OPTROM_SIZE_2322;
2443                 ha->flash_conf_off = ~0;
2444                 ha->flash_data_off = ~0;
2445                 ha->nvram_conf_off = ~0;
2446                 ha->nvram_data_off = ~0;
2447                 ha->isp_ops = &qla2300_isp_ops;
2448         } else if (IS_QLA24XX_TYPE(ha)) {
2449                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2450                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2451                 req_length = REQUEST_ENTRY_CNT_24XX;
2452                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2453                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2454                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2455                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2456                 ha->gid_list_info_size = 8;
2457                 ha->optrom_size = OPTROM_SIZE_24XX;
2458                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
2459                 ha->isp_ops = &qla24xx_isp_ops;
2460                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2461                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2462                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2463                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2464         } else if (IS_QLA25XX(ha)) {
2465                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2466                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2467                 req_length = REQUEST_ENTRY_CNT_24XX;
2468                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2469                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2470                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2471                 ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
2472                 ha->gid_list_info_size = 8;
2473                 ha->optrom_size = OPTROM_SIZE_25XX;
2474                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2475                 ha->isp_ops = &qla25xx_isp_ops;
2476                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2477                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2478                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2479                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2480         } else if (IS_QLA81XX(ha)) {
2481                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2482                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2483                 req_length = REQUEST_ENTRY_CNT_24XX;
2484                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2485                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2486                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2487                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2488                 ha->gid_list_info_size = 8;
2489                 ha->optrom_size = OPTROM_SIZE_81XX;
2490                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2491                 ha->isp_ops = &qla81xx_isp_ops;
2492                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2493                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2494                 ha->nvram_conf_off = ~0;
2495                 ha->nvram_data_off = ~0;
2496         } else if (IS_QLA82XX(ha)) {
2497                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2498                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2499                 req_length = REQUEST_ENTRY_CNT_82XX;
2500                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2501                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2502                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2503                 ha->gid_list_info_size = 8;
2504                 ha->optrom_size = OPTROM_SIZE_82XX;
2505                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2506                 ha->isp_ops = &qla82xx_isp_ops;
2507                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2508                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2509                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2510                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2511         } else if (IS_QLA8044(ha)) {
2512                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2513                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2514                 req_length = REQUEST_ENTRY_CNT_82XX;
2515                 rsp_length = RESPONSE_ENTRY_CNT_82XX;
2516                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2517                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2518                 ha->gid_list_info_size = 8;
2519                 ha->optrom_size = OPTROM_SIZE_83XX;
2520                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2521                 ha->isp_ops = &qla8044_isp_ops;
2522                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
2523                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
2524                 ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
2525                 ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
2526         } else if (IS_QLA83XX(ha)) {
2527                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2528                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2529                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2530                 req_length = REQUEST_ENTRY_CNT_24XX;
2531                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2532                 ha->tgt.atio_q_length = ATIO_ENTRY_CNT_24XX;
2533                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2534                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2535                 ha->gid_list_info_size = 8;
2536                 ha->optrom_size = OPTROM_SIZE_83XX;
2537                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2538                 ha->isp_ops = &qla83xx_isp_ops;
2539                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2540                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2541                 ha->nvram_conf_off = ~0;
2542                 ha->nvram_data_off = ~0;
2543         }  else if (IS_QLAFX00(ha)) {
2544                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_FX00;
2545                 ha->mbx_count = MAILBOX_REGISTER_COUNT_FX00;
2546                 ha->aen_mbx_count = AEN_MAILBOX_REGISTER_COUNT_FX00;
2547                 req_length = REQUEST_ENTRY_CNT_FX00;
2548                 rsp_length = RESPONSE_ENTRY_CNT_FX00;
2549                 ha->isp_ops = &qlafx00_isp_ops;
2550                 ha->port_down_retry_count = 30; /* default value */
2551                 ha->mr.fw_hbt_cnt = QLAFX00_HEARTBEAT_INTERVAL;
2552                 ha->mr.fw_reset_timer_tick = QLAFX00_RESET_INTERVAL;
2553                 ha->mr.fw_critemp_timer_tick = QLAFX00_CRITEMP_INTERVAL;
2554                 ha->mr.fw_hbt_en = 1;
2555                 ha->mr.host_info_resend = false;
2556                 ha->mr.hinfo_resend_timer_tick = QLAFX00_HINFO_RESEND_INTERVAL;
2557         } else if (IS_QLA27XX(ha)) {
2558                 ha->portnum = PCI_FUNC(ha->pdev->devfn);
2559                 ha->max_fibre_devices = MAX_FIBRE_DEVICES_2400;
2560                 ha->mbx_count = MAILBOX_REGISTER_COUNT;
2561                 req_length = REQUEST_ENTRY_CNT_24XX;
2562                 rsp_length = RESPONSE_ENTRY_CNT_2300;
2563                 ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
2564                 ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
2565                 ha->gid_list_info_size = 8;
2566                 ha->optrom_size = OPTROM_SIZE_83XX;
2567                 ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
2568                 ha->isp_ops = &qla27xx_isp_ops;
2569                 ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
2570                 ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
2571                 ha->nvram_conf_off = ~0;
2572                 ha->nvram_data_off = ~0;
2573         }
2574 
2575         ql_dbg_pci(ql_dbg_init, pdev, 0x001e,
2576             "mbx_count=%d, req_length=%d, "
2577             "rsp_length=%d, max_loop_id=%d, init_cb_size=%d, "
2578             "gid_list_info_size=%d, optrom_size=%d, nvram_npiv_size=%d, "
2579             "max_fibre_devices=%d.\n",
2580             ha->mbx_count, req_length, rsp_length, ha->max_loop_id,
2581             ha->init_cb_size, ha->gid_list_info_size, ha->optrom_size,
2582             ha->nvram_npiv_size, ha->max_fibre_devices);
2583         ql_dbg_pci(ql_dbg_init, pdev, 0x001f,
2584             "isp_ops=%p, flash_conf_off=%d, "
2585             "flash_data_off=%d, nvram_conf_off=%d, nvram_data_off=%d.\n",
2586             ha->isp_ops, ha->flash_conf_off, ha->flash_data_off,
2587             ha->nvram_conf_off, ha->nvram_data_off);
2588 
2589         /* Configure PCI I/O space */
2590         ret = ha->isp_ops->iospace_config(ha);
2591         if (ret)
2592                 goto iospace_config_failed;
2593 
2594         ql_log_pci(ql_log_info, pdev, 0x001d,
2595             "Found an ISP%04X irq %d iobase 0x%p.\n",
2596             pdev->device, pdev->irq, ha->iobase);
2597         mutex_init(&ha->vport_lock);
2598         init_completion(&ha->mbx_cmd_comp);
2599         complete(&ha->mbx_cmd_comp);
2600         init_completion(&ha->mbx_intr_comp);
2601         init_completion(&ha->dcbx_comp);
2602         init_completion(&ha->lb_portup_comp);
2603 
2604         set_bit(0, (unsigned long *) ha->vp_idx_map);
2605 
2606         qla2x00_config_dma_addressing(ha);
2607         ql_dbg_pci(ql_dbg_init, pdev, 0x0020,
2608             "64 Bit addressing is %s.\n",
2609             ha->flags.enable_64bit_addressing ? "enable" :
2610             "disable");
2611         ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
2612         if (ret) {
2613                 ql_log_pci(ql_log_fatal, pdev, 0x0031,
2614                     "Failed to allocate memory for adapter, aborting.\n");
2615 
2616                 goto probe_hw_failed;
2617         }
2618 
2619         req->max_q_depth = MAX_Q_DEPTH;
2620         if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
2621                 req->max_q_depth = ql2xmaxqdepth;
2622 
2623 
2624         base_vha = qla2x00_create_host(sht, ha);
2625         if (!base_vha) {
2626                 ret = -ENOMEM;
2627                 qla2x00_mem_free(ha);
2628                 qla2x00_free_req_que(ha, req);
2629                 qla2x00_free_rsp_que(ha, rsp);
2630                 goto probe_hw_failed;
2631         }
2632 
2633         pci_set_drvdata(pdev, base_vha);
2634 
2635         host = base_vha->host;
2636         base_vha->req = req;
2637         if (IS_QLA2XXX_MIDTYPE(ha))
2638                 base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
2639         else
2640                 base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
2641                                                 base_vha->vp_idx;
2642 
2643         /* Setup fcport template structure. */
2644         ha->mr.fcport.vha = base_vha;
2645         ha->mr.fcport.port_type = FCT_UNKNOWN;
2646         ha->mr.fcport.loop_id = FC_NO_LOOP_ID;
2647         qla2x00_set_fcport_state(&ha->mr.fcport, FCS_UNCONFIGURED);
2648         ha->mr.fcport.supported_classes = FC_COS_UNSPECIFIED;
2649         ha->mr.fcport.scan_state = 1;
2650 
2651         /* Set the SG table size based on ISP type */
2652         if (!IS_FWI2_CAPABLE(ha)) {
2653                 if (IS_QLA2100(ha))
2654                         host->sg_tablesize = 32;
2655         } else {
2656                 if (!IS_QLA82XX(ha))
2657                         host->sg_tablesize = QLA_SG_ALL;
2658         }
2659         host->max_id = ha->max_fibre_devices;
2660         host->cmd_per_lun = 3;
2661         host->unique_id = host->host_no;
2662         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif)
2663                 host->max_cmd_len = 32;
2664         else
2665                 host->max_cmd_len = MAX_CMDSZ;
2666         host->max_channel = MAX_BUSES - 1;
2667         /* Older HBAs support only 16-bit LUNs */
2668         if (!IS_QLAFX00(ha) && !IS_FWI2_CAPABLE(ha) &&
2669             ql2xmaxlun > 0xffff)
2670                 host->max_lun = 0xffff;
2671         else
2672                 host->max_lun = ql2xmaxlun;
2673         host->transportt = qla2xxx_transport_template;
2674         sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
2675 
2676         ql_dbg(ql_dbg_init, base_vha, 0x0033,
2677             "max_id=%d this_id=%d "
2678             "cmd_per_len=%d unique_id=%d max_cmd_len=%d max_channel=%d "
2679             "max_lun=%llu transportt=%p, vendor_id=%llu.\n", host->max_id,
2680             host->this_id, host->cmd_per_lun, host->unique_id,
2681             host->max_cmd_len, host->max_channel, host->max_lun,
2682             host->transportt, sht->vendor_id);
2683 
2684 que_init:
2685         /* Alloc arrays of request and response ring ptrs */
2686         if (!qla2x00_alloc_queues(ha, req, rsp)) {
2687                 ql_log(ql_log_fatal, base_vha, 0x003d,
2688                     "Failed to allocate memory for queue pointers..."
2689                     "aborting.\n");
2690                 goto probe_init_failed;
2691         }
2692 
2693         qlt_probe_one_stage1(base_vha, ha);
2694 
2695         /* Set up the irqs */
2696         ret = qla2x00_request_irqs(ha, rsp);
2697         if (ret)
2698                 goto probe_init_failed;
2699 
2700         pci_save_state(pdev);
2701 
2702         /* Assign back pointers */
2703         rsp->req = req;
2704         req->rsp = rsp;
2705 
2706         if (IS_QLAFX00(ha)) {
2707                 ha->rsp_q_map[0] = rsp;
2708                 ha->req_q_map[0] = req;
2709                 set_bit(0, ha->req_qid_map);
2710                 set_bit(0, ha->rsp_qid_map);
2711         }
2712 
2713         /* FWI2-capable only. */
2714         req->req_q_in = &ha->iobase->isp24.req_q_in;
2715         req->req_q_out = &ha->iobase->isp24.req_q_out;
2716         rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
2717         rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
2718         if (ha->mqenable || IS_QLA83XX(ha) || IS_QLA27XX(ha)) {
2719                 req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
2720                 req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
2721                 rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
2722                 rsp->rsp_q_out =  &ha->mqiobase->isp25mq.rsp_q_out;
2723         }
2724 
2725         if (IS_QLAFX00(ha)) {
2726                 req->req_q_in = &ha->iobase->ispfx00.req_q_in;
2727                 req->req_q_out = &ha->iobase->ispfx00.req_q_out;
2728                 rsp->rsp_q_in = &ha->iobase->ispfx00.rsp_q_in;
2729                 rsp->rsp_q_out = &ha->iobase->ispfx00.rsp_q_out;
2730         }
2731 
2732         if (IS_P3P_TYPE(ha)) {
2733                 req->req_q_out = &ha->iobase->isp82.req_q_out[0];
2734                 rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
2735                 rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
2736         }
2737 
2738         ql_dbg(ql_dbg_multiq, base_vha, 0xc009,
2739             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2740             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2741         ql_dbg(ql_dbg_multiq, base_vha, 0xc00a,
2742             "req->req_q_in=%p req->req_q_out=%p "
2743             "rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2744             req->req_q_in, req->req_q_out,
2745             rsp->rsp_q_in, rsp->rsp_q_out);
2746         ql_dbg(ql_dbg_init, base_vha, 0x003e,
2747             "rsp_q_map=%p req_q_map=%p rsp->req=%p req->rsp=%p.\n",
2748             ha->rsp_q_map, ha->req_q_map, rsp->req, req->rsp);
2749         ql_dbg(ql_dbg_init, base_vha, 0x003f,
2750             "req->req_q_in=%p req->req_q_out=%p rsp->rsp_q_in=%p rsp->rsp_q_out=%p.\n",
2751             req->req_q_in, req->req_q_out, rsp->rsp_q_in, rsp->rsp_q_out);
2752 
2753         if (ha->isp_ops->initialize_adapter(base_vha)) {
2754                 ql_log(ql_log_fatal, base_vha, 0x00d6,
2755                     "Failed to initialize adapter - Adapter flags %x.\n",
2756                     base_vha->device_flags);
2757 
2758                 if (IS_QLA82XX(ha)) {
2759                         qla82xx_idc_lock(ha);
2760                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
2761                                 QLA8XXX_DEV_FAILED);
2762                         qla82xx_idc_unlock(ha);
2763                         ql_log(ql_log_fatal, base_vha, 0x00d7,
2764                             "HW State: FAILED.\n");
2765                 } else if (IS_QLA8044(ha)) {
2766                         qla8044_idc_lock(ha);
2767                         qla8044_wr_direct(base_vha,
2768                                 QLA8044_CRB_DEV_STATE_INDEX,
2769                                 QLA8XXX_DEV_FAILED);
2770                         qla8044_idc_unlock(ha);
2771                         ql_log(ql_log_fatal, base_vha, 0x0150,
2772                             "HW State: FAILED.\n");
2773                 }
2774 
2775                 ret = -ENODEV;
2776                 goto probe_failed;
2777         }
2778 
2779         if (IS_QLAFX00(ha))
2780                 host->can_queue = QLAFX00_MAX_CANQUEUE;
2781         else
2782                 host->can_queue = req->num_outstanding_cmds - 10;
2783 
2784         ql_dbg(ql_dbg_init, base_vha, 0x0032,
2785             "can_queue=%d, req=%p, mgmt_svr_loop_id=%d, sg_tablesize=%d.\n",
2786             host->can_queue, base_vha->req,
2787             base_vha->mgmt_svr_loop_id, host->sg_tablesize);
2788 
2789         if (ha->mqenable) {
2790                 if (qla25xx_setup_mode(base_vha)) {
2791                         ql_log(ql_log_warn, base_vha, 0x00ec,
2792                             "Failed to create queues, falling back to single queue mode.\n");
2793                         goto que_init;
2794                 }
2795         }
2796 
2797         if (ha->flags.running_gold_fw)
2798                 goto skip_dpc;
2799 
2800         /*
2801          * Startup the kernel thread for this host adapter
2802          */
2803         ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
2804             "%s_dpc", base_vha->host_str);
2805         if (IS_ERR(ha->dpc_thread)) {
2806                 ql_log(ql_log_fatal, base_vha, 0x00ed,
2807                     "Failed to start DPC thread.\n");
2808                 ret = PTR_ERR(ha->dpc_thread);
2809                 goto probe_failed;
2810         }
2811         ql_dbg(ql_dbg_init, base_vha, 0x00ee,
2812             "DPC thread started successfully.\n");
2813 
2814         /*
2815          * If we're not coming up in initiator mode, we might sit for
2816          * a while without waking up the dpc thread, which leads to a
2817          * stuck process warning.  So just kick the dpc once here and
2818          * let the kthread start (and go back to sleep in qla2x00_do_dpc).
2819          */
2820         qla2xxx_wake_dpc(base_vha);
2821 
2822         INIT_WORK(&ha->board_disable, qla2x00_disable_board_on_pci_error);
2823 
2824         if (IS_QLA8031(ha) || IS_MCTP_CAPABLE(ha)) {
2825                 sprintf(wq_name, "qla2xxx_%lu_dpc_lp_wq", base_vha->host_no);
2826                 ha->dpc_lp_wq = create_singlethread_workqueue(wq_name);
2827                 INIT_WORK(&ha->idc_aen, qla83xx_service_idc_aen);
2828 
2829                 sprintf(wq_name, "qla2xxx_%lu_dpc_hp_wq", base_vha->host_no);
2830                 ha->dpc_hp_wq = create_singlethread_workqueue(wq_name);
2831                 INIT_WORK(&ha->nic_core_reset, qla83xx_nic_core_reset_work);
2832                 INIT_WORK(&ha->idc_state_handler,
2833                     qla83xx_idc_state_handler_work);
2834                 INIT_WORK(&ha->nic_core_unrecoverable,
2835                     qla83xx_nic_core_unrecoverable_work);
2836         }
2837 
2838 skip_dpc:
2839         list_add_tail(&base_vha->list, &ha->vp_list);
2840         base_vha->host->irq = ha->pdev->irq;
2841 
2842         /* Initialized the timer */
2843         qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
2844         ql_dbg(ql_dbg_init, base_vha, 0x00ef,
2845             "Started qla2x00_timer with "
2846             "interval=%d.\n", WATCH_INTERVAL);
2847         ql_dbg(ql_dbg_init, base_vha, 0x00f0,
2848             "Detected hba at address=%p.\n",
2849             ha);
2850 
2851         if (IS_T10_PI_CAPABLE(ha) && ql2xenabledif) {
2852                 if (ha->fw_attributes & BIT_4) {
2853                         int prot = 0, guard;
2854                         base_vha->flags.difdix_supported = 1;
2855                         ql_dbg(ql_dbg_init, base_vha, 0x00f1,
2856                             "Registering for DIF/DIX type 1 and 3 protection.\n");
2857                         if (ql2xenabledif == 1)
2858                                 prot = SHOST_DIX_TYPE0_PROTECTION;
2859                         scsi_host_set_prot(host,
2860                             prot | SHOST_DIF_TYPE1_PROTECTION
2861                             | SHOST_DIF_TYPE2_PROTECTION
2862                             | SHOST_DIF_TYPE3_PROTECTION
2863                             | SHOST_DIX_TYPE1_PROTECTION
2864                             | SHOST_DIX_TYPE2_PROTECTION
2865                             | SHOST_DIX_TYPE3_PROTECTION);
2866 
2867                         guard = SHOST_DIX_GUARD_CRC;
2868 
2869                         if (IS_PI_IPGUARD_CAPABLE(ha) &&
2870                             (ql2xenabledif > 1 || IS_PI_DIFB_DIX0_CAPABLE(ha)))
2871                                 guard |= SHOST_DIX_GUARD_IP;
2872 
2873                         scsi_host_set_guard(host, guard);
2874                 } else
2875                         base_vha->flags.difdix_supported = 0;
2876         }
2877 
2878         ha->isp_ops->enable_intrs(ha);
2879 
2880         if (IS_QLAFX00(ha)) {
2881                 ret = qlafx00_fx_disc(base_vha,
2882                         &base_vha->hw->mr.fcport, FXDISC_GET_CONFIG_INFO);
2883                 host->sg_tablesize = (ha->mr.extended_io_enabled) ?
2884                     QLA_SG_ALL : 128;
2885         }
2886 
2887         ret = scsi_add_host(host, &pdev->dev);
2888         if (ret)
2889                 goto probe_failed;
2890 
2891         base_vha->flags.init_done = 1;
2892         base_vha->flags.online = 1;
2893         ha->prev_minidump_failed = 0;
2894 
2895         ql_dbg(ql_dbg_init, base_vha, 0x00f2,
2896             "Init done and hba is online.\n");
2897 
2898         if (qla_ini_mode_enabled(base_vha))
2899                 scsi_scan_host(host);
2900         else
2901                 ql_dbg(ql_dbg_init, base_vha, 0x0122,
2902                         "skipping scsi_scan_host() for non-initiator port\n");
2903 
2904         qla2x00_alloc_sysfs_attr(base_vha);
2905 
2906         if (IS_QLAFX00(ha)) {
2907                 ret = qlafx00_fx_disc(base_vha,
2908                         &base_vha->hw->mr.fcport, FXDISC_GET_PORT_INFO);
2909 
2910                 /* Register system information */
2911                 ret =  qlafx00_fx_disc(base_vha,
2912                         &base_vha->hw->mr.fcport, FXDISC_REG_HOST_INFO);
2913         }
2914 
2915         qla2x00_init_host_attr(base_vha);
2916 
2917         qla2x00_dfs_setup(base_vha);
2918 
2919         ql_log(ql_log_info, base_vha, 0x00fb,
2920             "QLogic %s - %s.\n", ha->model_number, ha->model_desc);
2921         ql_log(ql_log_info, base_vha, 0x00fc,
2922             "ISP%04X: %s @ %s hdma%c host#=%ld fw=%s.\n",
2923             pdev->device, ha->isp_ops->pci_info_str(base_vha, pci_info),
2924             pci_name(pdev), ha->flags.enable_64bit_addressing ? '+' : '-',
2925             base_vha->host_no,
2926             ha->isp_ops->fw_version_str(base_vha, fw_str));
2927 
2928         qlt_add_target(ha, base_vha);
2929 
2930         return 0;
2931 
2932 probe_init_failed:
2933         qla2x00_free_req_que(ha, req);
2934         ha->req_q_map[0] = NULL;
2935         clear_bit(0, ha->req_qid_map);
2936         qla2x00_free_rsp_que(ha, rsp);
2937         ha->rsp_q_map[0] = NULL;
2938         clear_bit(0, ha->rsp_qid_map);
2939         ha->max_req_queues = ha->max_rsp_queues = 0;
2940 
2941 probe_failed:
2942         if (base_vha->timer_active)
2943                 qla2x00_stop_timer(base_vha);
2944         base_vha->flags.online = 0;
2945         if (ha->dpc_thread) {
2946                 struct task_struct *t = ha->dpc_thread;
2947 
2948                 ha->dpc_thread = NULL;
2949                 kthread_stop(t);
2950         }
2951 
2952         qla2x00_free_device(base_vha);
2953 
2954         scsi_host_put(base_vha->host);
2955 
2956 probe_hw_failed:
2957         if (IS_QLA82XX(ha)) {
2958                 qla82xx_idc_lock(ha);
2959                 qla82xx_clear_drv_active(ha);
2960                 qla82xx_idc_unlock(ha);
2961         }
2962         if (IS_QLA8044(ha)) {
2963                 qla8044_idc_lock(ha);
2964                 qla8044_clear_drv_active(ha);
2965                 qla8044_idc_unlock(ha);
2966         }
2967 iospace_config_failed:
2968         if (IS_P3P_TYPE(ha)) {
2969                 if (!ha->nx_pcibase)
2970                         iounmap((device_reg_t *)ha->nx_pcibase);
2971                 if (!ql2xdbwr)
2972                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
2973         } else {
2974                 if (ha->iobase)
2975                         iounmap(ha->iobase);
2976                 if (ha->cregbase)
2977                         iounmap(ha->cregbase);
2978         }
2979         pci_release_selected_regions(ha->pdev, ha->bars);
2980         kfree(ha);
2981         ha = NULL;
2982 
2983 probe_out:
2984         pci_disable_device(pdev);
2985         return ret;
2986 }
2987 
2988 static void
2989 qla2x00_shutdown(struct pci_dev *pdev)
2990 {
2991         scsi_qla_host_t *vha;
2992         struct qla_hw_data  *ha;
2993 
2994         if (!atomic_read(&pdev->enable_cnt))
2995                 return;
2996 
2997         vha = pci_get_drvdata(pdev);
2998         ha = vha->hw;
2999 
3000         /* Notify ISPFX00 firmware */
3001         if (IS_QLAFX00(ha))
3002                 qlafx00_driver_shutdown(vha, 20);
3003 
3004         /* Turn-off FCE trace */
3005         if (ha->flags.fce_enabled) {
3006                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3007                 ha->flags.fce_enabled = 0;
3008         }
3009 
3010         /* Turn-off EFT trace */
3011         if (ha->eft)
3012                 qla2x00_disable_eft_trace(vha);
3013 
3014         /* Stop currently executing firmware. */
3015         qla2x00_try_to_stop_firmware(vha);
3016 
3017         /* Turn adapter off line */
3018         vha->flags.online = 0;
3019 
3020         /* turn-off interrupts on the card */
3021         if (ha->interrupts_on) {
3022                 vha->flags.init_done = 0;
3023                 ha->isp_ops->disable_intrs(ha);
3024         }
3025 
3026         qla2x00_free_irqs(vha);
3027 
3028         qla2x00_free_fw_dump(ha);
3029 }
3030 
3031 /* Deletes all the virtual ports for a given ha */
3032 static void
3033 qla2x00_delete_all_vps(struct qla_hw_data *ha, scsi_qla_host_t *base_vha)
3034 {
3035         struct Scsi_Host *scsi_host;
3036         scsi_qla_host_t *vha;
3037         unsigned long flags;
3038 
3039         mutex_lock(&ha->vport_lock);
3040         while (ha->cur_vport_count) {
3041                 spin_lock_irqsave(&ha->vport_slock, flags);
3042 
3043                 BUG_ON(base_vha->list.next == &ha->vp_list);
3044                 /* This assumes first entry in ha->vp_list is always base vha */
3045                 vha = list_first_entry(&base_vha->list, scsi_qla_host_t, list);
3046                 scsi_host = scsi_host_get(vha->host);
3047 
3048                 spin_unlock_irqrestore(&ha->vport_slock, flags);
3049                 mutex_unlock(&ha->vport_lock);
3050 
3051                 fc_vport_terminate(vha->fc_vport);
3052                 scsi_host_put(vha->host);
3053 
3054                 mutex_lock(&ha->vport_lock);
3055         }
3056         mutex_unlock(&ha->vport_lock);
3057 }
3058 
3059 /* Stops all deferred work threads */
3060 static void
3061 qla2x00_destroy_deferred_work(struct qla_hw_data *ha)
3062 {
3063         /* Flush the work queue and remove it */
3064         if (ha->wq) {
3065                 flush_workqueue(ha->wq);
3066                 destroy_workqueue(ha->wq);
3067                 ha->wq = NULL;
3068         }
3069 
3070         /* Cancel all work and destroy DPC workqueues */
3071         if (ha->dpc_lp_wq) {
3072                 cancel_work_sync(&ha->idc_aen);
3073                 destroy_workqueue(ha->dpc_lp_wq);
3074                 ha->dpc_lp_wq = NULL;
3075         }
3076 
3077         if (ha->dpc_hp_wq) {
3078                 cancel_work_sync(&ha->nic_core_reset);
3079                 cancel_work_sync(&ha->idc_state_handler);
3080                 cancel_work_sync(&ha->nic_core_unrecoverable);
3081                 destroy_workqueue(ha->dpc_hp_wq);
3082                 ha->dpc_hp_wq = NULL;
3083         }
3084 
3085         /* Kill the kernel thread for this host */
3086         if (ha->dpc_thread) {
3087                 struct task_struct *t = ha->dpc_thread;
3088 
3089                 /*
3090                  * qla2xxx_wake_dpc checks for ->dpc_thread
3091                  * so we need to zero it out.
3092                  */
3093                 ha->dpc_thread = NULL;
3094                 kthread_stop(t);
3095         }
3096 }
3097 
3098 static void
3099 qla2x00_unmap_iobases(struct qla_hw_data *ha)
3100 {
3101         if (IS_QLA82XX(ha)) {
3102 
3103                 iounmap((device_reg_t *)ha->nx_pcibase);
3104                 if (!ql2xdbwr)
3105                         iounmap((device_reg_t *)ha->nxdb_wr_ptr);
3106         } else {
3107                 if (ha->iobase)
3108                         iounmap(ha->iobase);
3109 
3110                 if (ha->cregbase)
3111                         iounmap(ha->cregbase);
3112 
3113                 if (ha->mqiobase)
3114                         iounmap(ha->mqiobase);
3115 
3116                 if ((IS_QLA83XX(ha) || IS_QLA27XX(ha)) && ha->msixbase)
3117                         iounmap(ha->msixbase);
3118         }
3119 }
3120 
3121 static void
3122 qla2x00_clear_drv_active(scsi_qla_host_t *vha)
3123 {
3124         struct qla_hw_data *ha = vha->hw;
3125 
3126         if (IS_QLA8044(ha)) {
3127                 qla8044_idc_lock(ha);
3128                 qla8044_clear_drv_active(ha);
3129                 qla8044_idc_unlock(ha);
3130         } else if (IS_QLA82XX(ha)) {
3131                 qla82xx_idc_lock(ha);
3132                 qla82xx_clear_drv_active(ha);
3133                 qla82xx_idc_unlock(ha);
3134         }
3135 }
3136 
3137 static void
3138 qla2x00_remove_one(struct pci_dev *pdev)
3139 {
3140         scsi_qla_host_t *base_vha;
3141         struct qla_hw_data  *ha;
3142 
3143         /*
3144          * If the PCI device is disabled that means that probe failed and any
3145          * resources should be have cleaned up on probe exit.
3146          */
3147         if (!atomic_read(&pdev->enable_cnt))
3148                 return;
3149 
3150         base_vha = pci_get_drvdata(pdev);
3151         ha = base_vha->hw;
3152 
3153         qla2x00_wait_for_hba_ready(base_vha);
3154 
3155         set_bit(UNLOADING, &base_vha->dpc_flags);
3156 
3157         if (IS_QLAFX00(ha))
3158                 qlafx00_driver_shutdown(base_vha, 20);
3159 
3160         qla2x00_delete_all_vps(ha, base_vha);
3161 
3162         if (IS_QLA8031(ha)) {
3163                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07e,
3164                     "Clearing fcoe driver presence.\n");
3165                 if (qla83xx_clear_drv_presence(base_vha) != QLA_SUCCESS)
3166                         ql_dbg(ql_dbg_p3p, base_vha, 0xb079,
3167                             "Error while clearing DRV-Presence.\n");
3168         }
3169 
3170         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
3171 
3172         qla2x00_dfs_remove(base_vha);
3173 
3174         qla84xx_put_chip(base_vha);
3175 
3176         /* Disable timer */
3177         if (base_vha->timer_active)
3178                 qla2x00_stop_timer(base_vha);
3179 
3180         base_vha->flags.online = 0;
3181 
3182         qla2x00_destroy_deferred_work(ha);
3183 
3184         qlt_remove_target(ha, base_vha);
3185 
3186         qla2x00_free_sysfs_attr(base_vha, true);
3187 
3188         fc_remove_host(base_vha->host);
3189 
3190         scsi_remove_host(base_vha->host);
3191 
3192         qla2x00_free_device(base_vha);
3193 
3194         scsi_host_put(base_vha->host);
3195 
3196         qla2x00_clear_drv_active(base_vha);
3197 
3198         qla2x00_unmap_iobases(ha);
3199 
3200         pci_release_selected_regions(ha->pdev, ha->bars);
3201         kfree(ha);
3202         ha = NULL;
3203 
3204         pci_disable_pcie_error_reporting(pdev);
3205 
3206         pci_disable_device(pdev);
3207 }
3208 
3209 static void
3210 qla2x00_free_device(scsi_qla_host_t *vha)
3211 {
3212         struct qla_hw_data *ha = vha->hw;
3213 
3214         qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
3215 
3216         /* Disable timer */
3217         if (vha->timer_active)
3218                 qla2x00_stop_timer(vha);
3219 
3220         qla25xx_delete_queues(vha);
3221 
3222         if (ha->flags.fce_enabled)
3223                 qla2x00_disable_fce_trace(vha, NULL, NULL);
3224 
3225         if (ha->eft)
3226                 qla2x00_disable_eft_trace(vha);
3227 
3228         /* Stop currently executing firmware. */
3229         qla2x00_try_to_stop_firmware(vha);
3230 
3231         vha->flags.online = 0;
3232 
3233         /* turn-off interrupts on the card */
3234         if (ha->interrupts_on) {
3235                 vha->flags.init_done = 0;
3236                 ha->isp_ops->disable_intrs(ha);
3237         }
3238 
3239         qla2x00_free_irqs(vha);
3240 
3241         qla2x00_free_fcports(vha);
3242 
3243         qla2x00_mem_free(ha);
3244 
3245         qla82xx_md_free(vha);
3246 
3247         qla2x00_free_queues(ha);
3248 }
3249 
3250 void qla2x00_free_fcports(struct scsi_qla_host *vha)
3251 {
3252         fc_port_t *fcport, *tfcport;
3253 
3254         list_for_each_entry_safe(fcport, tfcport, &vha->vp_fcports, list) {
3255                 list_del(&fcport->list);
3256                 qla2x00_clear_loop_id(fcport);
3257                 kfree(fcport);
3258                 fcport = NULL;
3259         }
3260 }
3261 
3262 static inline void
3263 qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
3264     int defer)
3265 {
3266         struct fc_rport *rport;
3267         scsi_qla_host_t *base_vha;
3268         unsigned long flags;
3269 
3270         if (!fcport->rport)
3271                 return;
3272 
3273         rport = fcport->rport;
3274         if (defer) {
3275                 base_vha = pci_get_drvdata(vha->hw->pdev);
3276                 spin_lock_irqsave(vha->host->host_lock, flags);
3277                 fcport->drport = rport;
3278                 spin_unlock_irqrestore(vha->host->host_lock, flags);
3279                 set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
3280                 qla2xxx_wake_dpc(base_vha);
3281         } else {
3282                 fc_remote_port_delete(rport);
3283                 qlt_fc_port_deleted(vha, fcport);
3284         }
3285 }
3286 
3287 /*
3288  * qla2x00_mark_device_lost Updates fcport state when device goes offline.
3289  *
3290  * Input: ha = adapter block pointer.  fcport = port structure pointer.
3291  *
3292  * Return: None.
3293  *
3294  * Context:
3295  */
3296 void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
3297     int do_login, int defer)
3298 {
3299         if (IS_QLAFX00(vha->hw)) {
3300                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3301                 qla2x00_schedule_rport_del(vha, fcport, defer);
3302                 return;
3303         }
3304 
3305         if (atomic_read(&fcport->state) == FCS_ONLINE &&
3306             vha->vp_idx == fcport->vha->vp_idx) {
3307                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3308                 qla2x00_schedule_rport_del(vha, fcport, defer);
3309         }
3310         /*
3311          * We may need to retry the login, so don't change the state of the
3312          * port but do the retries.
3313          */
3314         if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
3315                 qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3316 
3317         if (!do_login)
3318                 return;
3319 
3320         if (fcport->login_retry == 0) {
3321                 fcport->login_retry = vha->hw->login_retry_count;
3322                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
3323 
3324                 ql_dbg(ql_dbg_disc, vha, 0x2067,
3325                     "Port login retry %8phN, id = 0x%04x retry cnt=%d.\n",
3326                     fcport->port_name, fcport->loop_id, fcport->login_retry);
3327         }
3328 }
3329 
3330 /*
3331  * qla2x00_mark_all_devices_lost
3332  *      Updates fcport state when device goes offline.
3333  *
3334  * Input:
3335  *      ha = adapter block pointer.
3336  *      fcport = port structure pointer.
3337  *
3338  * Return:
3339  *      None.
3340  *
3341  * Context:
3342  */
3343 void
3344 qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
3345 {
3346         fc_port_t *fcport;
3347 
3348         list_for_each_entry(fcport, &vha->vp_fcports, list) {
3349                 if (vha->vp_idx != 0 && vha->vp_idx != fcport->vha->vp_idx)
3350                         continue;
3351 
3352                 /*
3353                  * No point in marking the device as lost, if the device is
3354                  * already DEAD.
3355                  */
3356                 if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
3357                         continue;
3358                 if (atomic_read(&fcport->state) == FCS_ONLINE) {
3359                         qla2x00_set_fcport_state(fcport, FCS_DEVICE_LOST);
3360                         if (defer)
3361                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3362                         else if (vha->vp_idx == fcport->vha->vp_idx)
3363                                 qla2x00_schedule_rport_del(vha, fcport, defer);
3364                 }
3365         }
3366 }
3367 
3368 /*
3369 * qla2x00_mem_alloc
3370 *      Allocates adapter memory.
3371 *
3372 * Returns:
3373 *      0  = success.
3374 *      !0  = failure.
3375 */
3376 static int
3377 qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
3378         struct req_que **req, struct rsp_que **rsp)
3379 {
3380         char    name[16];
3381 
3382         ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
3383                 &ha->init_cb_dma, GFP_KERNEL);
3384         if (!ha->init_cb)
3385                 goto fail;
3386 
3387         if (qlt_mem_alloc(ha) < 0)
3388                 goto fail_free_init_cb;
3389 
3390         ha->gid_list = dma_alloc_coherent(&ha->pdev->dev,
3391                 qla2x00_gid_list_size(ha), &ha->gid_list_dma, GFP_KERNEL);
3392         if (!ha->gid_list)
3393                 goto fail_free_tgt_mem;
3394 
3395         ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
3396         if (!ha->srb_mempool)
3397                 goto fail_free_gid_list;
3398 
3399         if (IS_P3P_TYPE(ha)) {
3400                 /* Allocate cache for CT6 Ctx. */
3401                 if (!ctx_cachep) {
3402                         ctx_cachep = kmem_cache_create("qla2xxx_ctx",
3403                                 sizeof(struct ct6_dsd), 0,
3404                                 SLAB_HWCACHE_ALIGN, NULL);
3405                         if (!ctx_cachep)
3406                                 goto fail_free_gid_list;
3407                 }
3408                 ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
3409                         ctx_cachep);
3410                 if (!ha->ctx_mempool)
3411                         goto fail_free_srb_mempool;
3412                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0021,
3413                     "ctx_cachep=%p ctx_mempool=%p.\n",
3414                     ctx_cachep, ha->ctx_mempool);
3415         }
3416 
3417         /* Get memory for cached NVRAM */
3418         ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
3419         if (!ha->nvram)
3420                 goto fail_free_ctx_mempool;
3421 
3422         snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
3423                 ha->pdev->device);
3424         ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3425                 DMA_POOL_SIZE, 8, 0);
3426         if (!ha->s_dma_pool)
3427                 goto fail_free_nvram;
3428 
3429         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0022,
3430             "init_cb=%p gid_list=%p, srb_mempool=%p s_dma_pool=%p.\n",
3431             ha->init_cb, ha->gid_list, ha->srb_mempool, ha->s_dma_pool);
3432 
3433         if (IS_P3P_TYPE(ha) || ql2xenabledif) {
3434                 ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3435                         DSD_LIST_DMA_POOL_SIZE, 8, 0);
3436                 if (!ha->dl_dma_pool) {
3437                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0023,
3438                             "Failed to allocate memory for dl_dma_pool.\n");
3439                         goto fail_s_dma_pool;
3440                 }
3441 
3442                 ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
3443                         FCP_CMND_DMA_POOL_SIZE, 8, 0);
3444                 if (!ha->fcp_cmnd_dma_pool) {
3445                         ql_log_pci(ql_log_fatal, ha->pdev, 0x0024,
3446                             "Failed to allocate memory for fcp_cmnd_dma_pool.\n");
3447                         goto fail_dl_dma_pool;
3448                 }
3449                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0025,
3450                     "dl_dma_pool=%p fcp_cmnd_dma_pool=%p.\n",
3451                     ha->dl_dma_pool, ha->fcp_cmnd_dma_pool);
3452         }
3453 
3454         /* Allocate memory for SNS commands */
3455         if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
3456         /* Get consistent memory allocated for SNS commands */
3457                 ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
3458                 sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
3459                 if (!ha->sns_cmd)
3460                         goto fail_dma_pool;
3461                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0026,
3462                     "sns_cmd: %p.\n", ha->sns_cmd);
3463         } else {
3464         /* Get consistent memory allocated for MS IOCB */
3465                 ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3466                         &ha->ms_iocb_dma);
3467                 if (!ha->ms_iocb)
3468                         goto fail_dma_pool;
3469         /* Get consistent memory allocated for CT SNS commands */
3470                 ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
3471                         sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
3472                 if (!ha->ct_sns)
3473                         goto fail_free_ms_iocb;
3474                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0027,
3475                     "ms_iocb=%p ct_sns=%p.\n",
3476                     ha->ms_iocb, ha->ct_sns);
3477         }
3478 
3479         /* Allocate memory for request ring */
3480         *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
3481         if (!*req) {
3482                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0028,
3483                     "Failed to allocate memory for req.\n");
3484                 goto fail_req;
3485         }
3486         (*req)->length = req_len;
3487         (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
3488                 ((*req)->length + 1) * sizeof(request_t),
3489                 &(*req)->dma, GFP_KERNEL);
3490         if (!(*req)->ring) {
3491                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0029,
3492                     "Failed to allocate memory for req_ring.\n");
3493                 goto fail_req_ring;
3494         }
3495         /* Allocate memory for response ring */
3496         *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
3497         if (!*rsp) {
3498                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002a,
3499                     "Failed to allocate memory for rsp.\n");
3500                 goto fail_rsp;
3501         }
3502         (*rsp)->hw = ha;
3503         (*rsp)->length = rsp_len;
3504         (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
3505                 ((*rsp)->length + 1) * sizeof(response_t),
3506                 &(*rsp)->dma, GFP_KERNEL);
3507         if (!(*rsp)->ring) {
3508                 ql_log_pci(ql_log_fatal, ha->pdev, 0x002b,
3509                     "Failed to allocate memory for rsp_ring.\n");
3510                 goto fail_rsp_ring;
3511         }
3512         (*req)->rsp = *rsp;
3513         (*rsp)->req = *req;
3514         ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002c,
3515             "req=%p req->length=%d req->ring=%p rsp=%p "
3516             "rsp->length=%d rsp->ring=%p.\n",
3517             *req, (*req)->length, (*req)->ring, *rsp, (*rsp)->length,
3518             (*rsp)->ring);
3519         /* Allocate memory for NVRAM data for vports */
3520         if (ha->nvram_npiv_size) {
3521                 ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
3522                     ha->nvram_npiv_size, GFP_KERNEL);
3523                 if (!ha->npiv_info) {
3524                         ql_log_pci(ql_log_fatal, ha->pdev, 0x002d,
3525                             "Failed to allocate memory for npiv_info.\n");
3526                         goto fail_npiv_info;
3527                 }
3528         } else
3529                 ha->npiv_info = NULL;
3530 
3531         /* Get consistent memory allocated for EX-INIT-CB. */
3532         if (IS_CNA_CAPABLE(ha) || IS_QLA2031(ha) || IS_QLA27XX(ha)) {
3533                 ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3534                     &ha->ex_init_cb_dma);
3535                 if (!ha->ex_init_cb)
3536                         goto fail_ex_init_cb;
3537                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002e,
3538                     "ex_init_cb=%p.\n", ha->ex_init_cb);
3539         }
3540 
3541         INIT_LIST_HEAD(&ha->gbl_dsd_list);
3542 
3543         /* Get consistent memory allocated for Async Port-Database. */
3544         if (!IS_FWI2_CAPABLE(ha)) {
3545                 ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
3546                         &ha->async_pd_dma);
3547                 if (!ha->async_pd)
3548                         goto fail_async_pd;
3549                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x002f,
3550                     "async_pd=%p.\n", ha->async_pd);
3551         }
3552 
3553         INIT_LIST_HEAD(&ha->vp_list);
3554 
3555         /* Allocate memory for our loop_id bitmap */
3556         ha->loop_id_map = kzalloc(BITS_TO_LONGS(LOOPID_MAP_SIZE) * sizeof(long),
3557             GFP_KERNEL);
3558         if (!ha->loop_id_map)
3559                 goto fail_async_pd;
3560         else {
3561                 qla2x00_set_reserved_loop_ids(ha);
3562                 ql_dbg_pci(ql_dbg_init, ha->pdev, 0x0123,
3563                     "loop_id_map=%p.\n", ha->loop_id_map);
3564         }
3565 
3566         return 0;
3567 
3568 fail_async_pd:
3569         dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
3570 fail_ex_init_cb:
3571         kfree(ha->npiv_info);
3572 fail_npiv_info:
3573         dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
3574                 sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
3575         (*rsp)->ring = NULL;
3576         (*rsp)->dma = 0;
3577 fail_rsp_ring:
3578         kfree(*rsp);
3579 fail_rsp:
3580         dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
3581                 sizeof(request_t), (*req)->ring, (*req)->dma);
3582         (*req)->ring = NULL;
3583         (*req)->dma = 0;
3584 fail_req_ring:
3585         kfree(*req);
3586 fail_req:
3587         dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3588                 ha->ct_sns, ha->ct_sns_dma);
3589         ha->ct_sns = NULL;
3590         ha->ct_sns_dma = 0;
3591 fail_free_ms_iocb:
3592         dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3593         ha->ms_iocb = NULL;
3594         ha->ms_iocb_dma = 0;
3595 fail_dma_pool:
3596         if (IS_QLA82XX(ha) || ql2xenabledif) {
3597                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3598                 ha->fcp_cmnd_dma_pool = NULL;
3599         }
3600 fail_dl_dma_pool:
3601         if (IS_QLA82XX(ha) || ql2xenabledif) {
3602                 dma_pool_destroy(ha->dl_dma_pool);
3603                 ha->dl_dma_pool = NULL;
3604         }
3605 fail_s_dma_pool:
3606         dma_pool_destroy(ha->s_dma_pool);
3607         ha->s_dma_pool = NULL;
3608 fail_free_nvram:
3609         kfree(ha->nvram);
3610         ha->nvram = NULL;
3611 fail_free_ctx_mempool:
3612         mempool_destroy(ha->ctx_mempool);
3613         ha->ctx_mempool = NULL;
3614 fail_free_srb_mempool:
3615         mempool_destroy(ha->srb_mempool);
3616         ha->srb_mempool = NULL;
3617 fail_free_gid_list:
3618         dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3619         ha->gid_list,
3620         ha->gid_list_dma);
3621         ha->gid_list = NULL;
3622         ha->gid_list_dma = 0;
3623 fail_free_tgt_mem:
3624         qlt_mem_free(ha);
3625 fail_free_init_cb:
3626         dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
3627         ha->init_cb_dma);
3628         ha->init_cb = NULL;
3629         ha->init_cb_dma = 0;
3630 fail:
3631         ql_log(ql_log_fatal, NULL, 0x0030,
3632             "Memory allocation failure.\n");
3633         return -ENOMEM;
3634 }
3635 
3636 /*
3637 * qla2x00_free_fw_dump
3638 *       Frees fw dump stuff.
3639 *
3640 * Input:
3641 *       ha = adapter block pointer
3642 */
3643 static void
3644 qla2x00_free_fw_dump(struct qla_hw_data *ha)
3645 {
3646         if (ha->fce)
3647                 dma_free_coherent(&ha->pdev->dev,
3648                     FCE_SIZE, ha->fce, ha->fce_dma);
3649 
3650         if (ha->eft)
3651                 dma_free_coherent(&ha->pdev->dev,
3652                     EFT_SIZE, ha->eft, ha->eft_dma);
3653 
3654         if (ha->fw_dump)
3655                 vfree(ha->fw_dump);
3656         if (ha->fw_dump_template)
3657                 vfree(ha->fw_dump_template);
3658 
3659         ha->fce = NULL;
3660         ha->fce_dma = 0;
3661         ha->eft = NULL;
3662         ha->eft_dma = 0;
3663         ha->fw_dumped = 0;
3664         ha->fw_dump_cap_flags = 0;
3665         ha->fw_dump_reading = 0;
3666         ha->fw_dump = NULL;
3667         ha->fw_dump_len = 0;
3668         ha->fw_dump_template = NULL;
3669         ha->fw_dump_template_len = 0;
3670 }
3671 
3672 /*
3673 * qla2x00_mem_free
3674 *      Frees all adapter allocated memory.
3675 *
3676 * Input:
3677 *      ha = adapter block pointer.
3678 */
3679 static void
3680 qla2x00_mem_free(struct qla_hw_data *ha)
3681 {
3682         qla2x00_free_fw_dump(ha);
3683 
3684         if (ha->mctp_dump)
3685                 dma_free_coherent(&ha->pdev->dev, MCTP_DUMP_SIZE, ha->mctp_dump,
3686                     ha->mctp_dump_dma);
3687 
3688         if (ha->srb_mempool)
3689                 mempool_destroy(ha->srb_mempool);
3690 
3691         if (ha->dcbx_tlv)
3692                 dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
3693                     ha->dcbx_tlv, ha->dcbx_tlv_dma);
3694 
3695         if (ha->xgmac_data)
3696                 dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
3697                     ha->xgmac_data, ha->xgmac_data_dma);
3698 
3699         if (ha->sns_cmd)
3700                 dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
3701                 ha->sns_cmd, ha->sns_cmd_dma);
3702 
3703         if (ha->ct_sns)
3704                 dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
3705                 ha->ct_sns, ha->ct_sns_dma);
3706 
3707         if (ha->sfp_data)
3708                 dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
3709 
3710         if (ha->ms_iocb)
3711                 dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
3712 
3713         if (ha->ex_init_cb)
3714                 dma_pool_free(ha->s_dma_pool,
3715                         ha->ex_init_cb, ha->ex_init_cb_dma);
3716 
3717         if (ha->async_pd)
3718                 dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
3719 
3720         if (ha->s_dma_pool)
3721                 dma_pool_destroy(ha->s_dma_pool);
3722 
3723         if (ha->gid_list)
3724                 dma_free_coherent(&ha->pdev->dev, qla2x00_gid_list_size(ha),
3725                 ha->gid_list, ha->gid_list_dma);
3726 
3727         if (IS_QLA82XX(ha)) {
3728                 if (!list_empty(&ha->gbl_dsd_list)) {
3729                         struct dsd_dma *dsd_ptr, *tdsd_ptr;
3730 
3731                         /* clean up allocated prev pool */
3732                         list_for_each_entry_safe(dsd_ptr,
3733                                 tdsd_ptr, &ha->gbl_dsd_list, list) {
3734                                 dma_pool_free(ha->dl_dma_pool,
3735                                 dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
3736                                 list_del(&dsd_ptr->list);
3737                                 kfree(dsd_ptr);
3738                         }
3739                 }
3740         }
3741 
3742         if (ha->dl_dma_pool)
3743                 dma_pool_destroy(ha->dl_dma_pool);
3744 
3745         if (ha->fcp_cmnd_dma_pool)
3746                 dma_pool_destroy(ha->fcp_cmnd_dma_pool);
3747 
3748         if (ha->ctx_mempool)
3749                 mempool_destroy(ha->ctx_mempool);
3750 
3751         qlt_mem_free(ha);
3752 
3753         if (ha->init_cb)
3754                 dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
3755                         ha->init_cb, ha->init_cb_dma);
3756         vfree(ha->optrom_buffer);
3757         kfree(ha->nvram);
3758         kfree(ha->npiv_info);
3759         kfree(ha->swl);
3760         kfree(ha->loop_id_map);
3761 
3762         ha->srb_mempool = NULL;
3763         ha->ctx_mempool = NULL;
3764         ha->sns_cmd = NULL;
3765         ha->sns_cmd_dma = 0;
3766         ha->ct_sns = NULL;
3767         ha->ct_sns_dma = 0;
3768         ha->ms_iocb = NULL;
3769         ha->ms_iocb_dma = 0;
3770         ha->init_cb = NULL;
3771         ha->init_cb_dma = 0;
3772         ha->ex_init_cb = NULL;
3773         ha->ex_init_cb_dma = 0;
3774         ha->async_pd = NULL;
3775         ha->async_pd_dma = 0;
3776 
3777         ha->s_dma_pool = NULL;
3778         ha->dl_dma_pool = NULL;
3779         ha->fcp_cmnd_dma_pool = NULL;
3780 
3781         ha->gid_list = NULL;
3782         ha->gid_list_dma = 0;
3783 
3784         ha->tgt.atio_ring = NULL;
3785         ha->tgt.atio_dma = 0;
3786         ha->tgt.tgt_vp_map = NULL;
3787 }
3788 
3789 struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
3790                                                 struct qla_hw_data *ha)
3791 {
3792         struct Scsi_Host *host;
3793         struct scsi_qla_host *vha = NULL;
3794 
3795         host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
3796         if (host == NULL) {
3797                 ql_log_pci(ql_log_fatal, ha->pdev, 0x0107,
3798                     "Failed to allocate host from the scsi layer, aborting.\n");
3799                 goto fail;
3800         }
3801 
3802         /* Clear our data area */
3803         vha = shost_priv(host);
3804         memset(vha, 0, sizeof(scsi_qla_host_t));
3805 
3806         vha->host = host;
3807         vha->host_no = host->host_no;
3808         vha->hw = ha;
3809 
3810         INIT_LIST_HEAD(&vha->vp_fcports);
3811         INIT_LIST_HEAD(&vha->work_list);
3812         INIT_LIST_HEAD(&vha->list);
3813 
3814         spin_lock_init(&vha->work_lock);
3815 
3816         sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
3817         ql_dbg(ql_dbg_init, vha, 0x0041,
3818             "Allocated the host=%p hw=%p vha=%p dev_name=%s",
3819             vha->host, vha->hw, vha,
3820             dev_name(&(ha->pdev->dev)));
3821 
3822         return vha;
3823 
3824 fail:
3825         return vha;
3826 }
3827 
3828 static struct qla_work_evt *
3829 qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
3830 {
3831         struct qla_work_evt *e;
3832         uint8_t bail;
3833 
3834         QLA_VHA_MARK_BUSY(vha, bail);
3835         if (bail)
3836                 return NULL;
3837 
3838         e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
3839         if (!e) {
3840                 QLA_VHA_MARK_NOT_BUSY(vha);
3841                 return NULL;
3842         }
3843 
3844         INIT_LIST_HEAD(&e->list);
3845         e->type = type;
3846         e->flags = QLA_EVT_FLAG_FREE;
3847         return e;
3848 }
3849 
3850 static int
3851 qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
3852 {
3853         unsigned long flags;
3854 
3855         spin_lock_irqsave(&vha->work_lock, flags);
3856         list_add_tail(&e->list, &vha->work_list);
3857         spin_unlock_irqrestore(&vha->work_lock, flags);
3858         qla2xxx_wake_dpc(vha);
3859 
3860         return QLA_SUCCESS;
3861 }
3862 
3863 int
3864 qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
3865     u32 data)
3866 {
3867         struct qla_work_evt *e;
3868 
3869         e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
3870         if (!e)
3871                 return QLA_FUNCTION_FAILED;
3872 
3873         e->u.aen.code = code;
3874         e->u.aen.data = data;
3875         return qla2x00_post_work(vha, e);
3876 }
3877 
3878 int
3879 qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
3880 {
3881         struct qla_work_evt *e;
3882 
3883         e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
3884         if (!e)
3885                 return QLA_FUNCTION_FAILED;
3886 
3887         memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
3888         return qla2x00_post_work(vha, e);
3889 }
3890 
3891 #define qla2x00_post_async_work(name, type)     \
3892 int qla2x00_post_async_##name##_work(           \
3893     struct scsi_qla_host *vha,                  \
3894     fc_port_t *fcport, uint16_t *data)          \
3895 {                                               \
3896         struct qla_work_evt *e;                 \
3897                                                 \
3898         e = qla2x00_alloc_work(vha, type);      \
3899         if (!e)                                 \
3900                 return QLA_FUNCTION_FAILED;     \
3901                                                 \
3902         e->u.logio.fcport = fcport;             \
3903         if (data) {                             \
3904                 e->u.logio.data[0] = data[0];   \
3905                 e->u.logio.data[1] = data[1];   \
3906         }                                       \
3907         return qla2x00_post_work(vha, e);       \
3908 }
3909 
3910 qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
3911 qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
3912 qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
3913 qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
3914 qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
3915 qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
3916 
3917 int
3918 qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
3919 {
3920         struct qla_work_evt *e;
3921 
3922         e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
3923         if (!e)
3924                 return QLA_FUNCTION_FAILED;
3925 
3926         e->u.uevent.code = code;
3927         return qla2x00_post_work(vha, e);
3928 }
3929 
3930 static void
3931 qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
3932 {
3933         char event_string[40];
3934         char *envp[] = { event_string, NULL };
3935 
3936         switch (code) {
3937         case QLA_UEVENT_CODE_FW_DUMP:
3938                 snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
3939                     vha->host_no);
3940                 break;
3941         default:
3942                 /* do nothing */
3943                 break;
3944         }
3945         kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
3946 }
3947 
3948 int
3949 qlafx00_post_aenfx_work(struct scsi_qla_host *vha,  uint32_t evtcode,
3950                         uint32_t *data, int cnt)
3951 {
3952         struct qla_work_evt *e;
3953 
3954         e = qla2x00_alloc_work(vha, QLA_EVT_AENFX);
3955         if (!e)
3956                 return QLA_FUNCTION_FAILED;
3957 
3958         e->u.aenfx.evtcode = evtcode;
3959         e->u.aenfx.count = cnt;
3960         memcpy(e->u.aenfx.mbx, data, sizeof(*data) * cnt);
3961         return qla2x00_post_work(vha, e);
3962 }
3963 
3964 void
3965 qla2x00_do_work(struct scsi_qla_host *vha)
3966 {
3967         struct qla_work_evt *e, *tmp;
3968         unsigned long flags;
3969         LIST_HEAD(work);
3970 
3971         spin_lock_irqsave(&vha->work_lock, flags);
3972         list_splice_init(&vha->work_list, &work);
3973         spin_unlock_irqrestore(&vha->work_lock, flags);
3974 
3975         list_for_each_entry_safe(e, tmp, &work, list) {
3976                 list_del_init(&e->list);
3977 
3978                 switch (e->type) {
3979                 case QLA_EVT_AEN:
3980                         fc_host_post_event(vha->host, fc_get_event_number(),
3981                             e->u.aen.code, e->u.aen.data);
3982                         break;
3983                 case QLA_EVT_IDC_ACK:
3984                         qla81xx_idc_ack(vha, e->u.idc_ack.mb);
3985                         break;
3986                 case QLA_EVT_ASYNC_LOGIN:
3987                         qla2x00_async_login(vha, e->u.logio.fcport,
3988                             e->u.logio.data);
3989                         break;
3990                 case QLA_EVT_ASYNC_LOGIN_DONE:
3991                         qla2x00_async_login_done(vha, e->u.logio.fcport,
3992                             e->u.logio.data);
3993                         break;
3994                 case QLA_EVT_ASYNC_LOGOUT:
3995                         qla2x00_async_logout(vha, e->u.logio.fcport);
3996                         break;
3997                 case QLA_EVT_ASYNC_LOGOUT_DONE:
3998                         qla2x00_async_logout_done(vha, e->u.logio.fcport,
3999                             e->u.logio.data);
4000                         break;
4001                 case QLA_EVT_ASYNC_ADISC:
4002                         qla2x00_async_adisc(vha, e->u.logio.fcport,
4003                             e->u.logio.data);
4004                         break;
4005                 case QLA_EVT_ASYNC_ADISC_DONE:
4006                         qla2x00_async_adisc_done(vha, e->u.logio.fcport,
4007                             e->u.logio.data);
4008                         break;
4009                 case QLA_EVT_UEVENT:
4010                         qla2x00_uevent_emit(vha, e->u.uevent.code);
4011                         break;
4012                 case QLA_EVT_AENFX:
4013                         qlafx00_process_aen(vha, e);
4014                         break;
4015                 }
4016                 if (e->flags & QLA_EVT_FLAG_FREE)
4017                         kfree(e);
4018 
4019                 /* For each work completed decrement vha ref count */
4020                 QLA_VHA_MARK_NOT_BUSY(vha);
4021         }
4022 }
4023 
4024 /* Relogins all the fcports of a vport
4025  * Context: dpc thread
4026  */
4027 void qla2x00_relogin(struct scsi_qla_host *vha)
4028 {
4029         fc_port_t       *fcport;
4030         int status;
4031         uint16_t        next_loopid = 0;
4032         struct qla_hw_data *ha = vha->hw;
4033         uint16_t data[2];
4034 
4035         list_for_each_entry(fcport, &vha->vp_fcports, list) {
4036         /*
4037          * If the port is not ONLINE then try to login
4038          * to it if we haven't run out of retries.
4039          */
4040                 if (atomic_read(&fcport->state) != FCS_ONLINE &&
4041                     fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
4042                         fcport->login_retry--;
4043                         if (fcport->flags & FCF_FABRIC_DEVICE) {
4044                                 if (fcport->flags & FCF_FCP2_DEVICE)
4045                                         ha->isp_ops->fabric_logout(vha,
4046                                                         fcport->loop_id,
4047                                                         fcport->d_id.b.domain,
4048                                                         fcport->d_id.b.area,
4049                                                         fcport->d_id.b.al_pa);
4050 
4051                                 if (fcport->loop_id == FC_NO_LOOP_ID) {
4052                                         fcport->loop_id = next_loopid =
4053                                             ha->min_external_loopid;
4054                                         status = qla2x00_find_new_loop_id(
4055                                             vha, fcport);
4056                                         if (status != QLA_SUCCESS) {
4057                                                 /* Ran out of IDs to use */
4058                                                 break;
4059                                         }
4060                                 }
4061 
4062                                 if (IS_ALOGIO_CAPABLE(ha)) {
4063                                         fcport->flags |= FCF_ASYNC_SENT;
4064                                         data[0] = 0;
4065                                         data[1] = QLA_LOGIO_LOGIN_RETRIED;
4066                                         status = qla2x00_post_async_login_work(
4067                                             vha, fcport, data);
4068                                         if (status == QLA_SUCCESS)
4069                                                 continue;
4070                                         /* Attempt a retry. */
4071                                         status = 1;
4072                                 } else {
4073                                         status = qla2x00_fabric_login(vha,
4074                                             fcport, &next_loopid);
4075                                         if (status ==  QLA_SUCCESS) {
4076                                                 int status2;
4077                                                 uint8_t opts;
4078 
4079                                                 opts = 0;
4080                                                 if (fcport->flags &
4081                                                     FCF_FCP2_DEVICE)
4082                                                         opts |= BIT_1;
4083                                                 status2 =
4084                                                     qla2x00_get_port_database(
4085                                                         vha, fcport, opts);
4086                                                 if (status2 != QLA_SUCCESS)
4087                                                         status = 1;
4088                                         }
4089                                 }
4090                         } else
4091                                 status = qla2x00_local_device_login(vha,
4092                                                                 fcport);
4093 
4094                         if (status == QLA_SUCCESS) {
4095                                 fcport->old_loop_id = fcport->loop_id;
4096 
4097                                 ql_dbg(ql_dbg_disc, vha, 0x2003,
4098                                     "Port login OK: logged in ID 0x%x.\n",
4099                                     fcport->loop_id);
4100 
4101                                 qla2x00_update_fcport(vha, fcport);
4102 
4103                         } else if (status == 1) {
4104                                 set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
4105                                 /* retry the login again */
4106                                 ql_dbg(ql_dbg_disc, vha, 0x2007,
4107                                     "Retrying %d login again loop_id 0x%x.\n",
4108                                     fcport->login_retry, fcport->loop_id);
4109                         } else {
4110                                 fcport->login_retry = 0;
4111                         }
4112 
4113                         if (fcport->login_retry == 0 && status != QLA_SUCCESS)
4114                                 qla2x00_clear_loop_id(fcport);
4115                 }
4116                 if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
4117                         break;
4118         }
4119 }
4120 
4121 /* Schedule work on any of the dpc-workqueues */
4122 void
4123 qla83xx_schedule_work(scsi_qla_host_t *base_vha, int work_code)
4124 {
4125         struct qla_hw_data *ha = base_vha->hw;
4126 
4127         switch (work_code) {
4128         case MBA_IDC_AEN: /* 0x8200 */
4129                 if (ha->dpc_lp_wq)
4130                         queue_work(ha->dpc_lp_wq, &ha->idc_aen);
4131                 break;
4132 
4133         case QLA83XX_NIC_CORE_RESET: /* 0x1 */
4134                 if (!ha->flags.nic_core_reset_hdlr_active) {
4135                         if (ha->dpc_hp_wq)
4136                                 queue_work(ha->dpc_hp_wq, &ha->nic_core_reset);
4137                 } else
4138                         ql_dbg(ql_dbg_p3p, base_vha, 0xb05e,
4139                             "NIC Core reset is already active. Skip "
4140                             "scheduling it again.\n");
4141                 break;
4142         case QLA83XX_IDC_STATE_HANDLER: /* 0x2 */
4143                 if (ha->dpc_hp_wq)
4144                         queue_work(ha->dpc_hp_wq, &ha->idc_state_handler);
4145                 break;
4146         case QLA83XX_NIC_CORE_UNRECOVERABLE: /* 0x3 */
4147                 if (ha->dpc_hp_wq)
4148                         queue_work(ha->dpc_hp_wq, &ha->nic_core_unrecoverable);
4149                 break;
4150         default:
4151                 ql_log(ql_log_warn, base_vha, 0xb05f,
4152                     "Unknow work-code=0x%x.\n", work_code);
4153         }
4154 
4155         return;
4156 }
4157 
4158 /* Work: Perform NIC Core Unrecoverable state handling */
4159 void
4160 qla83xx_nic_core_unrecoverable_work(struct work_struct *work)
4161 {
4162         struct qla_hw_data *ha =
4163                 container_of(work, struct qla_hw_data, nic_core_unrecoverable);
4164         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4165         uint32_t dev_state = 0;
4166 
4167         qla83xx_idc_lock(base_vha, 0);
4168         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4169         qla83xx_reset_ownership(base_vha);
4170         if (ha->flags.nic_core_reset_owner) {
4171                 ha->flags.nic_core_reset_owner = 0;
4172                 qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4173                     QLA8XXX_DEV_FAILED);
4174                 ql_log(ql_log_info, base_vha, 0xb060, "HW State: FAILED.\n");
4175                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4176         }
4177         qla83xx_idc_unlock(base_vha, 0);
4178 }
4179 
4180 /* Work: Execute IDC state handler */
4181 void
4182 qla83xx_idc_state_handler_work(struct work_struct *work)
4183 {
4184         struct qla_hw_data *ha =
4185                 container_of(work, struct qla_hw_data, idc_state_handler);
4186         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4187         uint32_t dev_state = 0;
4188 
4189         qla83xx_idc_lock(base_vha, 0);
4190         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4191         if (dev_state == QLA8XXX_DEV_FAILED ||
4192                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT)
4193                 qla83xx_idc_state_handler(base_vha);
4194         qla83xx_idc_unlock(base_vha, 0);
4195 }
4196 
4197 static int
4198 qla83xx_check_nic_core_fw_alive(scsi_qla_host_t *base_vha)
4199 {
4200         int rval = QLA_SUCCESS;
4201         unsigned long heart_beat_wait = jiffies + (1 * HZ);
4202         uint32_t heart_beat_counter1, heart_beat_counter2;
4203 
4204         do {
4205                 if (time_after(jiffies, heart_beat_wait)) {
4206                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07c,
4207                             "Nic Core f/w is not alive.\n");
4208                         rval = QLA_FUNCTION_FAILED;
4209                         break;
4210                 }
4211 
4212                 qla83xx_idc_lock(base_vha, 0);
4213                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4214                     &heart_beat_counter1);
4215                 qla83xx_idc_unlock(base_vha, 0);
4216                 msleep(100);
4217                 qla83xx_idc_lock(base_vha, 0);
4218                 qla83xx_rd_reg(base_vha, QLA83XX_FW_HEARTBEAT,
4219                     &heart_beat_counter2);
4220                 qla83xx_idc_unlock(base_vha, 0);
4221         } while (heart_beat_counter1 == heart_beat_counter2);
4222 
4223         return rval;
4224 }
4225 
4226 /* Work: Perform NIC Core Reset handling */
4227 void
4228 qla83xx_nic_core_reset_work(struct work_struct *work)
4229 {
4230         struct qla_hw_data *ha =
4231                 container_of(work, struct qla_hw_data, nic_core_reset);
4232         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4233         uint32_t dev_state = 0;
4234 
4235         if (IS_QLA2031(ha)) {
4236                 if (qla2xxx_mctp_dump(base_vha) != QLA_SUCCESS)
4237                         ql_log(ql_log_warn, base_vha, 0xb081,
4238                             "Failed to dump mctp\n");
4239                 return;
4240         }
4241 
4242         if (!ha->flags.nic_core_reset_hdlr_active) {
4243                 if (qla83xx_check_nic_core_fw_alive(base_vha) == QLA_SUCCESS) {
4244                         qla83xx_idc_lock(base_vha, 0);
4245                         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4246                             &dev_state);
4247                         qla83xx_idc_unlock(base_vha, 0);
4248                         if (dev_state != QLA8XXX_DEV_NEED_RESET) {
4249                                 ql_dbg(ql_dbg_p3p, base_vha, 0xb07a,
4250                                     "Nic Core f/w is alive.\n");
4251                                 return;
4252                         }
4253                 }
4254 
4255                 ha->flags.nic_core_reset_hdlr_active = 1;
4256                 if (qla83xx_nic_core_reset(base_vha)) {
4257                         /* NIC Core reset failed. */
4258                         ql_dbg(ql_dbg_p3p, base_vha, 0xb061,
4259                             "NIC Core reset failed.\n");
4260                 }
4261                 ha->flags.nic_core_reset_hdlr_active = 0;
4262         }
4263 }
4264 
4265 /* Work: Handle 8200 IDC aens */
4266 void
4267 qla83xx_service_idc_aen(struct work_struct *work)
4268 {
4269         struct qla_hw_data *ha =
4270                 container_of(work, struct qla_hw_data, idc_aen);
4271         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4272         uint32_t dev_state, idc_control;
4273 
4274         qla83xx_idc_lock(base_vha, 0);
4275         qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4276         qla83xx_rd_reg(base_vha, QLA83XX_IDC_CONTROL, &idc_control);
4277         qla83xx_idc_unlock(base_vha, 0);
4278         if (dev_state == QLA8XXX_DEV_NEED_RESET) {
4279                 if (idc_control & QLA83XX_IDC_GRACEFUL_RESET) {
4280                         ql_dbg(ql_dbg_p3p, base_vha, 0xb062,
4281                             "Application requested NIC Core Reset.\n");
4282                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4283                 } else if (qla83xx_check_nic_core_fw_alive(base_vha) ==
4284                     QLA_SUCCESS) {
4285                         ql_dbg(ql_dbg_p3p, base_vha, 0xb07b,
4286                             "Other protocol driver requested NIC Core Reset.\n");
4287                         qla83xx_schedule_work(base_vha, QLA83XX_NIC_CORE_RESET);
4288                 }
4289         } else if (dev_state == QLA8XXX_DEV_FAILED ||
4290                         dev_state == QLA8XXX_DEV_NEED_QUIESCENT) {
4291                 qla83xx_schedule_work(base_vha, QLA83XX_IDC_STATE_HANDLER);
4292         }
4293 }
4294 
4295 static void
4296 qla83xx_wait_logic(void)
4297 {
4298         int i;
4299 
4300         /* Yield CPU */
4301         if (!in_interrupt()) {
4302                 /*
4303                  * Wait about 200ms before retrying again.
4304                  * This controls the number of retries for single
4305                  * lock operation.
4306                  */
4307                 msleep(100);
4308                 schedule();
4309         } else {
4310                 for (i = 0; i < 20; i++)
4311                         cpu_relax(); /* This a nop instr on i386 */
4312         }
4313 }
4314 
4315 static int
4316 qla83xx_force_lock_recovery(scsi_qla_host_t *base_vha)
4317 {
4318         int rval;
4319         uint32_t data;
4320         uint32_t idc_lck_rcvry_stage_mask = 0x3;
4321         uint32_t idc_lck_rcvry_owner_mask = 0x3c;
4322         struct qla_hw_data *ha = base_vha->hw;
4323         ql_dbg(ql_dbg_p3p, base_vha, 0xb086,
4324             "Trying force recovery of the IDC lock.\n");
4325 
4326         rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY, &data);
4327         if (rval)
4328                 return rval;
4329 
4330         if ((data & idc_lck_rcvry_stage_mask) > 0) {
4331                 return QLA_SUCCESS;
4332         } else {
4333                 data = (IDC_LOCK_RECOVERY_STAGE1) | (ha->portnum << 2);
4334                 rval = qla83xx_wr_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4335                     data);
4336                 if (rval)
4337                         return rval;
4338 
4339                 msleep(200);
4340 
4341                 rval = qla83xx_rd_reg(base_vha, QLA83XX_IDC_LOCK_RECOVERY,
4342                     &data);
4343                 if (rval)
4344                         return rval;
4345 
4346                 if (((data & idc_lck_rcvry_owner_mask) >> 2) == ha->portnum) {
4347                         data &= (IDC_LOCK_RECOVERY_STAGE2 |
4348                                         ~(idc_lck_rcvry_stage_mask));
4349                         rval = qla83xx_wr_reg(base_vha,
4350                             QLA83XX_IDC_LOCK_RECOVERY, data);
4351                         if (rval)
4352                                 return rval;
4353 
4354                         /* Forcefully perform IDC UnLock */
4355                         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK,
4356                             &data);
4357                         if (rval)
4358                                 return rval;
4359                         /* Clear lock-id by setting 0xff */
4360                         rval = qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4361                             0xff);
4362                         if (rval)
4363                                 return rval;
4364                         /* Clear lock-recovery by setting 0x0 */
4365                         rval = qla83xx_wr_reg(base_vha,
4366                             QLA83XX_IDC_LOCK_RECOVERY, 0x0);
4367                         if (rval)
4368                                 return rval;
4369                 } else
4370                         return QLA_SUCCESS;
4371         }
4372 
4373         return rval;
4374 }
4375 
4376 static int
4377 qla83xx_idc_lock_recovery(scsi_qla_host_t *base_vha)
4378 {
4379         int rval = QLA_SUCCESS;
4380         uint32_t o_drv_lockid, n_drv_lockid;
4381         unsigned long lock_recovery_timeout;
4382 
4383         lock_recovery_timeout = jiffies + QLA83XX_MAX_LOCK_RECOVERY_WAIT;
4384 retry_lockid:
4385         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &o_drv_lockid);
4386         if (rval)
4387                 goto exit;
4388 
4389         /* MAX wait time before forcing IDC Lock recovery = 2 secs */
4390         if (time_after_eq(jiffies, lock_recovery_timeout)) {
4391                 if (qla83xx_force_lock_recovery(base_vha) == QLA_SUCCESS)
4392                         return QLA_SUCCESS;
4393                 else
4394                         return QLA_FUNCTION_FAILED;
4395         }
4396 
4397         rval = qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &n_drv_lockid);
4398         if (rval)
4399                 goto exit;
4400 
4401         if (o_drv_lockid == n_drv_lockid) {
4402                 qla83xx_wait_logic();
4403                 goto retry_lockid;
4404         } else
4405                 return QLA_SUCCESS;
4406 
4407 exit:
4408         return rval;
4409 }
4410 
4411 void
4412 qla83xx_idc_lock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4413 {
4414         uint16_t options = (requester_id << 15) | BIT_6;
4415         uint32_t data;
4416         uint32_t lock_owner;
4417         struct qla_hw_data *ha = base_vha->hw;
4418 
4419         /* IDC-lock implementation using driver-lock/lock-id remote registers */
4420 retry_lock:
4421         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCK, &data)
4422             == QLA_SUCCESS) {
4423                 if (data) {
4424                         /* Setting lock-id to our function-number */
4425                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4426                             ha->portnum);
4427                 } else {
4428                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID,
4429                             &lock_owner);
4430                         ql_dbg(ql_dbg_p3p, base_vha, 0xb063,
4431                             "Failed to acquire IDC lock, acquired by %d, "
4432                             "retrying...\n", lock_owner);
4433 
4434                         /* Retry/Perform IDC-Lock recovery */
4435                         if (qla83xx_idc_lock_recovery(base_vha)
4436                             == QLA_SUCCESS) {
4437                                 qla83xx_wait_logic();
4438                                 goto retry_lock;
4439                         } else
4440                                 ql_log(ql_log_warn, base_vha, 0xb075,
4441                                     "IDC Lock recovery FAILED.\n");
4442                 }
4443 
4444         }
4445 
4446         return;
4447 
4448         /* XXX: IDC-lock implementation using access-control mbx */
4449 retry_lock2:
4450         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4451                 ql_dbg(ql_dbg_p3p, base_vha, 0xb072,
4452                     "Failed to acquire IDC lock. retrying...\n");
4453                 /* Retry/Perform IDC-Lock recovery */
4454                 if (qla83xx_idc_lock_recovery(base_vha) == QLA_SUCCESS) {
4455                         qla83xx_wait_logic();
4456                         goto retry_lock2;
4457                 } else
4458                         ql_log(ql_log_warn, base_vha, 0xb076,
4459                             "IDC Lock recovery FAILED.\n");
4460         }
4461 
4462         return;
4463 }
4464 
4465 void
4466 qla83xx_idc_unlock(scsi_qla_host_t *base_vha, uint16_t requester_id)
4467 {
4468         uint16_t options = (requester_id << 15) | BIT_7, retry;
4469         uint32_t data;
4470         struct qla_hw_data *ha = base_vha->hw;
4471 
4472         /* IDC-unlock implementation using driver-unlock/lock-id
4473          * remote registers
4474          */
4475         retry = 0;
4476 retry_unlock:
4477         if (qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_LOCKID, &data)
4478             == QLA_SUCCESS) {
4479                 if (data == ha->portnum) {
4480                         qla83xx_rd_reg(base_vha, QLA83XX_DRIVER_UNLOCK, &data);
4481                         /* Clearing lock-id by setting 0xff */
4482                         qla83xx_wr_reg(base_vha, QLA83XX_DRIVER_LOCKID, 0xff);
4483                 } else if (retry < 10) {
4484                         /* SV: XXX: IDC unlock retrying needed here? */
4485 
4486                         /* Retry for IDC-unlock */
4487                         qla83xx_wait_logic();
4488                         retry++;
4489                         ql_dbg(ql_dbg_p3p, base_vha, 0xb064,
4490                             "Failed to release IDC lock, retyring=%d\n", retry);
4491                         goto retry_unlock;
4492                 }
4493         } else if (retry < 10) {
4494                 /* Retry for IDC-unlock */
4495                 qla83xx_wait_logic();
4496                 retry++;
4497                 ql_dbg(ql_dbg_p3p, base_vha, 0xb065,
4498                     "Failed to read drv-lockid, retyring=%d\n", retry);
4499                 goto retry_unlock;
4500         }
4501 
4502         return;
4503 
4504         /* XXX: IDC-unlock implementation using access-control mbx */
4505         retry = 0;
4506 retry_unlock2:
4507         if (qla83xx_access_control(base_vha, options, 0, 0, NULL)) {
4508                 if (retry < 10) {
4509                         /* Retry for IDC-unlock */
4510                         qla83xx_wait_logic();
4511                         retry++;
4512                         ql_dbg(ql_dbg_p3p, base_vha, 0xb066,
4513                             "Failed to release IDC lock, retyring=%d\n", retry);
4514                         goto retry_unlock2;
4515                 }
4516         }
4517 
4518         return;
4519 }
4520 
4521 int
4522 __qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4523 {
4524         int rval = QLA_SUCCESS;
4525         struct qla_hw_data *ha = vha->hw;
4526         uint32_t drv_presence;
4527 
4528         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4529         if (rval == QLA_SUCCESS) {
4530                 drv_presence |= (1 << ha->portnum);
4531                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4532                     drv_presence);
4533         }
4534 
4535         return rval;
4536 }
4537 
4538 int
4539 qla83xx_set_drv_presence(scsi_qla_host_t *vha)
4540 {
4541         int rval = QLA_SUCCESS;
4542 
4543         qla83xx_idc_lock(vha, 0);
4544         rval = __qla83xx_set_drv_presence(vha);
4545         qla83xx_idc_unlock(vha, 0);
4546 
4547         return rval;
4548 }
4549 
4550 int
4551 __qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4552 {
4553         int rval = QLA_SUCCESS;
4554         struct qla_hw_data *ha = vha->hw;
4555         uint32_t drv_presence;
4556 
4557         rval = qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4558         if (rval == QLA_SUCCESS) {
4559                 drv_presence &= ~(1 << ha->portnum);
4560                 rval = qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4561                     drv_presence);
4562         }
4563 
4564         return rval;
4565 }
4566 
4567 int
4568 qla83xx_clear_drv_presence(scsi_qla_host_t *vha)
4569 {
4570         int rval = QLA_SUCCESS;
4571 
4572         qla83xx_idc_lock(vha, 0);
4573         rval = __qla83xx_clear_drv_presence(vha);
4574         qla83xx_idc_unlock(vha, 0);
4575 
4576         return rval;
4577 }
4578 
4579 static void
4580 qla83xx_need_reset_handler(scsi_qla_host_t *vha)
4581 {
4582         struct qla_hw_data *ha = vha->hw;
4583         uint32_t drv_ack, drv_presence;
4584         unsigned long ack_timeout;
4585 
4586         /* Wait for IDC ACK from all functions (DRV-ACK == DRV-PRESENCE) */
4587         ack_timeout = jiffies + (ha->fcoe_reset_timeout * HZ);
4588         while (1) {
4589                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRIVER_ACK, &drv_ack);
4590                 qla83xx_rd_reg(vha, QLA83XX_IDC_DRV_PRESENCE, &drv_presence);
4591                 if ((drv_ack & drv_presence) == drv_presence)
4592                         break;
4593 
4594                 if (time_after_eq(jiffies, ack_timeout)) {
4595                         ql_log(ql_log_warn, vha, 0xb067,
4596                             "RESET ACK TIMEOUT! drv_presence=0x%x "
4597                             "drv_ack=0x%x\n", drv_presence, drv_ack);
4598                         /*
4599                          * The function(s) which did not ack in time are forced
4600                          * to withdraw any further participation in the IDC
4601                          * reset.
4602                          */
4603                         if (drv_ack != drv_presence)
4604                                 qla83xx_wr_reg(vha, QLA83XX_IDC_DRV_PRESENCE,
4605                                     drv_ack);
4606                         break;
4607                 }
4608 
4609                 qla83xx_idc_unlock(vha, 0);
4610                 msleep(1000);
4611                 qla83xx_idc_lock(vha, 0);
4612         }
4613 
4614         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_COLD);
4615         ql_log(ql_log_info, vha, 0xb068, "HW State: COLD/RE-INIT.\n");
4616 }
4617 
4618 static int
4619 qla83xx_device_bootstrap(scsi_qla_host_t *vha)
4620 {
4621         int rval = QLA_SUCCESS;
4622         uint32_t idc_control;
4623 
4624         qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_INITIALIZING);
4625         ql_log(ql_log_info, vha, 0xb069, "HW State: INITIALIZING.\n");
4626 
4627         /* Clearing IDC-Control Graceful-Reset Bit before resetting f/w */
4628         __qla83xx_get_idc_control(vha, &idc_control);
4629         idc_control &= ~QLA83XX_IDC_GRACEFUL_RESET;
4630         __qla83xx_set_idc_control(vha, 0);
4631 
4632         qla83xx_idc_unlock(vha, 0);
4633         rval = qla83xx_restart_nic_firmware(vha);
4634         qla83xx_idc_lock(vha, 0);
4635 
4636         if (rval != QLA_SUCCESS) {
4637                 ql_log(ql_log_fatal, vha, 0xb06a,
4638                     "Failed to restart NIC f/w.\n");
4639                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_FAILED);
4640                 ql_log(ql_log_info, vha, 0xb06b, "HW State: FAILED.\n");
4641         } else {
4642                 ql_dbg(ql_dbg_p3p, vha, 0xb06c,
4643                     "Success in restarting nic f/w.\n");
4644                 qla83xx_wr_reg(vha, QLA83XX_IDC_DEV_STATE, QLA8XXX_DEV_READY);
4645                 ql_log(ql_log_info, vha, 0xb06d, "HW State: READY.\n");
4646         }
4647 
4648         return rval;
4649 }
4650 
4651 /* Assumes idc_lock always held on entry */
4652 int
4653 qla83xx_idc_state_handler(scsi_qla_host_t *base_vha)
4654 {
4655         struct qla_hw_data *ha = base_vha->hw;
4656         int rval = QLA_SUCCESS;
4657         unsigned long dev_init_timeout;
4658         uint32_t dev_state;
4659 
4660         /* Wait for MAX-INIT-TIMEOUT for the device to go ready */
4661         dev_init_timeout = jiffies + (ha->fcoe_dev_init_timeout * HZ);
4662 
4663         while (1) {
4664 
4665                 if (time_after_eq(jiffies, dev_init_timeout)) {
4666                         ql_log(ql_log_warn, base_vha, 0xb06e,
4667                             "Initialization TIMEOUT!\n");
4668                         /* Init timeout. Disable further NIC Core
4669                          * communication.
4670                          */
4671                         qla83xx_wr_reg(base_vha, QLA83XX_IDC_DEV_STATE,
4672                                 QLA8XXX_DEV_FAILED);
4673                         ql_log(ql_log_info, base_vha, 0xb06f,
4674                             "HW State: FAILED.\n");
4675                 }
4676 
4677                 qla83xx_rd_reg(base_vha, QLA83XX_IDC_DEV_STATE, &dev_state);
4678                 switch (dev_state) {
4679                 case QLA8XXX_DEV_READY:
4680                         if (ha->flags.nic_core_reset_owner)
4681                                 qla83xx_idc_audit(base_vha,
4682                                     IDC_AUDIT_COMPLETION);
4683                         ha->flags.nic_core_reset_owner = 0;
4684                         ql_dbg(ql_dbg_p3p, base_vha, 0xb070,
4685                             "Reset_owner reset by 0x%x.\n",
4686                             ha->portnum);
4687                         goto exit;
4688                 case QLA8XXX_DEV_COLD:
4689                         if (ha->flags.nic_core_reset_owner)
4690                                 rval = qla83xx_device_bootstrap(base_vha);
4691                         else {
4692                         /* Wait for AEN to change device-state */
4693                                 qla83xx_idc_unlock(base_vha, 0);
4694                                 msleep(1000);
4695                                 qla83xx_idc_lock(base_vha, 0);
4696                         }
4697                         break;
4698                 case QLA8XXX_DEV_INITIALIZING:
4699                         /* Wait for AEN to change device-state */
4700                         qla83xx_idc_unlock(base_vha, 0);
4701                         msleep(1000);
4702                         qla83xx_idc_lock(base_vha, 0);
4703                         break;
4704                 case QLA8XXX_DEV_NEED_RESET:
4705                         if (!ql2xdontresethba && ha->flags.nic_core_reset_owner)
4706                                 qla83xx_need_reset_handler(base_vha);
4707                         else {
4708                                 /* Wait for AEN to change device-state */
4709                                 qla83xx_idc_unlock(base_vha, 0);
4710                                 msleep(1000);
4711                                 qla83xx_idc_lock(base_vha, 0);
4712                         }
4713                         /* reset timeout value after need reset handler */
4714                         dev_init_timeout = jiffies +
4715                             (ha->fcoe_dev_init_timeout * HZ);
4716                         break;
4717                 case QLA8XXX_DEV_NEED_QUIESCENT:
4718                         /* XXX: DEBUG for now */
4719                         qla83xx_idc_unlock(base_vha, 0);
4720                         msleep(1000);
4721                         qla83xx_idc_lock(base_vha, 0);
4722                         break;
4723                 case QLA8XXX_DEV_QUIESCENT:
4724                         /* XXX: DEBUG for now */
4725                         if (ha->flags.quiesce_owner)
4726                                 goto exit;
4727 
4728                         qla83xx_idc_unlock(base_vha, 0);
4729                         msleep(1000);
4730                         qla83xx_idc_lock(base_vha, 0);
4731                         dev_init_timeout = jiffies +
4732                             (ha->fcoe_dev_init_timeout * HZ);
4733                         break;
4734                 case QLA8XXX_DEV_FAILED:
4735                         if (ha->flags.nic_core_reset_owner)
4736                                 qla83xx_idc_audit(base_vha,
4737                                     IDC_AUDIT_COMPLETION);
4738                         ha->flags.nic_core_reset_owner = 0;
4739                         __qla83xx_clear_drv_presence(base_vha);
4740                         qla83xx_idc_unlock(base_vha, 0);
4741                         qla8xxx_dev_failed_handler(base_vha);
4742                         rval = QLA_FUNCTION_FAILED;
4743                         qla83xx_idc_lock(base_vha, 0);
4744                         goto exit;
4745                 case QLA8XXX_BAD_VALUE:
4746                         qla83xx_idc_unlock(base_vha, 0);
4747                         msleep(1000);
4748                         qla83xx_idc_lock(base_vha, 0);
4749                         break;
4750                 default:
4751                         ql_log(ql_log_warn, base_vha, 0xb071,
4752                             "Unknow Device State: %x.\n", dev_state);
4753                         qla83xx_idc_unlock(base_vha, 0);
4754                         qla8xxx_dev_failed_handler(base_vha);
4755                         rval = QLA_FUNCTION_FAILED;
4756                         qla83xx_idc_lock(base_vha, 0);
4757                         goto exit;
4758                 }
4759         }
4760 
4761 exit:
4762         return rval;
4763 }
4764 
4765 void
4766 qla2x00_disable_board_on_pci_error(struct work_struct *work)
4767 {
4768         struct qla_hw_data *ha = container_of(work, struct qla_hw_data,
4769             board_disable);
4770         struct pci_dev *pdev = ha->pdev;
4771         scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
4772 
4773         ql_log(ql_log_warn, base_vha, 0x015b,
4774             "Disabling adapter.\n");
4775 
4776         set_bit(UNLOADING, &base_vha->dpc_flags);
4777 
4778         qla2x00_delete_all_vps(ha, base_vha);
4779 
4780         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
4781 
4782         qla2x00_dfs_remove(base_vha);
4783 
4784         qla84xx_put_chip(base_vha);
4785 
4786         if (base_vha->timer_active)
4787                 qla2x00_stop_timer(base_vha);
4788 
4789         base_vha->flags.online = 0;
4790 
4791         qla2x00_destroy_deferred_work(ha);
4792 
4793         /*
4794          * Do not try to stop beacon blink as it will issue a mailbox
4795          * command.
4796          */
4797         qla2x00_free_sysfs_attr(base_vha, false);
4798 
4799         fc_remove_host(base_vha->host);
4800 
4801         scsi_remove_host(base_vha->host);
4802 
4803         base_vha->flags.init_done = 0;
4804         qla25xx_delete_queues(base_vha);
4805         qla2x00_free_irqs(base_vha);
4806         qla2x00_free_fcports(base_vha);
4807         qla2x00_mem_free(ha);
4808         qla82xx_md_free(base_vha);
4809         qla2x00_free_queues(ha);
4810 
4811         scsi_host_put(base_vha->host);
4812 
4813         qla2x00_unmap_iobases(ha);
4814 
4815         pci_release_selected_regions(ha->pdev, ha->bars);
4816         kfree(ha);
4817         ha = NULL;
4818 
4819         pci_disable_pcie_error_reporting(pdev);
4820         pci_disable_device(pdev);
4821         pci_set_drvdata(pdev, NULL);
4822 
4823 }
4824 
4825 /**************************************************************************
4826 * qla2x00_do_dpc
4827 *   This kernel thread is a task that is schedule by the interrupt handler
4828 *   to perform the background processing for interrupts.
4829 *
4830 * Notes:
4831 * This task always run in the context of a kernel thread.  It
4832 * is kick-off by the driver's detect code and starts up
4833 * up one per adapter. It immediately goes to sleep and waits for
4834 * some fibre event.  When either the interrupt handler or
4835 * the timer routine detects a event it will one of the task
4836 * bits then wake us up.
4837 **************************************************************************/
4838 static int
4839 qla2x00_do_dpc(void *data)
4840 {
4841         int             rval;
4842         scsi_qla_host_t *base_vha;
4843         struct qla_hw_data *ha;
4844 
4845         ha = (struct qla_hw_data *)data;
4846         base_vha = pci_get_drvdata(ha->pdev);
4847 
4848         set_user_nice(current, MIN_NICE);
4849 
4850         set_current_state(TASK_INTERRUPTIBLE);
4851         while (!kthread_should_stop()) {
4852                 ql_dbg(ql_dbg_dpc, base_vha, 0x4000,
4853                     "DPC handler sleeping.\n");
4854 
4855                 schedule();
4856                 __set_current_state(TASK_RUNNING);
4857 
4858                 if (!base_vha->flags.init_done || ha->flags.mbox_busy)
4859                         goto end_loop;
4860 
4861                 if (ha->flags.eeh_busy) {
4862                         ql_dbg(ql_dbg_dpc, base_vha, 0x4003,
4863                             "eeh_busy=%d.\n", ha->flags.eeh_busy);
4864                         goto end_loop;
4865                 }
4866 
4867                 ha->dpc_active = 1;
4868 
4869                 ql_dbg(ql_dbg_dpc + ql_dbg_verbose, base_vha, 0x4001,
4870                     "DPC handler waking up, dpc_flags=0x%lx.\n",
4871                     base_vha->dpc_flags);
4872 
4873                 qla2x00_do_work(base_vha);
4874 
4875                 if (IS_P3P_TYPE(ha)) {
4876                         if (IS_QLA8044(ha)) {
4877                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4878                                         &base_vha->dpc_flags)) {
4879                                         qla8044_idc_lock(ha);
4880                                         qla8044_wr_direct(base_vha,
4881                                                 QLA8044_CRB_DEV_STATE_INDEX,
4882                                                 QLA8XXX_DEV_FAILED);
4883                                         qla8044_idc_unlock(ha);
4884                                         ql_log(ql_log_info, base_vha, 0x4004,
4885                                                 "HW State: FAILED.\n");
4886                                         qla8044_device_state_handler(base_vha);
4887                                         continue;
4888                                 }
4889 
4890                         } else {
4891                                 if (test_and_clear_bit(ISP_UNRECOVERABLE,
4892                                         &base_vha->dpc_flags)) {
4893                                         qla82xx_idc_lock(ha);
4894                                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
4895                                                 QLA8XXX_DEV_FAILED);
4896                                         qla82xx_idc_unlock(ha);
4897                                         ql_log(ql_log_info, base_vha, 0x0151,
4898                                                 "HW State: FAILED.\n");
4899                                         qla82xx_device_state_handler(base_vha);
4900                                         continue;
4901                                 }
4902                         }
4903 
4904                         if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
4905                                 &base_vha->dpc_flags)) {
4906 
4907                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4005,
4908                                     "FCoE context reset scheduled.\n");
4909                                 if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4910                                         &base_vha->dpc_flags))) {
4911                                         if (qla82xx_fcoe_ctx_reset(base_vha)) {
4912                                                 /* FCoE-ctx reset failed.
4913                                                  * Escalate to chip-reset
4914                                                  */
4915                                                 set_bit(ISP_ABORT_NEEDED,
4916                                                         &base_vha->dpc_flags);
4917                                         }
4918                                         clear_bit(ABORT_ISP_ACTIVE,
4919                                                 &base_vha->dpc_flags);
4920                                 }
4921 
4922                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4006,
4923                                     "FCoE context reset end.\n");
4924                         }
4925                 } else if (IS_QLAFX00(ha)) {
4926                         if (test_and_clear_bit(ISP_UNRECOVERABLE,
4927                                 &base_vha->dpc_flags)) {
4928                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4020,
4929                                     "Firmware Reset Recovery\n");
4930                                 if (qlafx00_reset_initialize(base_vha)) {
4931                                         /* Failed. Abort isp later. */
4932                                         if (!test_bit(UNLOADING,
4933                                             &base_vha->dpc_flags)) {
4934                                                 set_bit(ISP_UNRECOVERABLE,
4935                                                     &base_vha->dpc_flags);
4936                                                 ql_dbg(ql_dbg_dpc, base_vha,
4937                                                     0x4021,
4938                                                     "Reset Recovery Failed\n");
4939                                         }
4940                                 }
4941                         }
4942 
4943                         if (test_and_clear_bit(FX00_TARGET_SCAN,
4944                                 &base_vha->dpc_flags)) {
4945                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4022,
4946                                     "ISPFx00 Target Scan scheduled\n");
4947                                 if (qlafx00_rescan_isp(base_vha)) {
4948                                         if (!test_bit(UNLOADING,
4949                                             &base_vha->dpc_flags))
4950                                                 set_bit(ISP_UNRECOVERABLE,
4951                                                     &base_vha->dpc_flags);
4952                                         ql_dbg(ql_dbg_dpc, base_vha, 0x401e,
4953                                             "ISPFx00 Target Scan Failed\n");
4954                                 }
4955                                 ql_dbg(ql_dbg_dpc, base_vha, 0x401f,
4956                                     "ISPFx00 Target Scan End\n");
4957                         }
4958                         if (test_and_clear_bit(FX00_HOST_INFO_RESEND,
4959                                 &base_vha->dpc_flags)) {
4960                                 ql_dbg(ql_dbg_dpc, base_vha, 0x4023,
4961                                     "ISPFx00 Host Info resend scheduled\n");
4962                                 qlafx00_fx_disc(base_vha,
4963                                     &base_vha->hw->mr.fcport,
4964                                     FXDISC_REG_HOST_INFO);
4965                         }
4966                 }
4967 
4968                 if (test_and_clear_bit(ISP_ABORT_NEEDED,
4969                                                 &base_vha->dpc_flags)) {
4970 
4971                         ql_dbg(ql_dbg_dpc, base_vha, 0x4007,
4972                             "ISP abort scheduled.\n");
4973                         if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
4974                             &base_vha->dpc_flags))) {
4975 
4976                                 if (ha->isp_ops->abort_isp(base_vha)) {
4977                                         /* failed. retry later */
4978                                         set_bit(ISP_ABORT_NEEDED,
4979                                             &base_vha->dpc_flags);
4980                                 }
4981                                 clear_bit(ABORT_ISP_ACTIVE,
4982                                                 &base_vha->dpc_flags);
4983                         }
4984 
4985                         ql_dbg(ql_dbg_dpc, base_vha, 0x4008,
4986                             "ISP abort end.\n");
4987                 }
4988 
4989                 if (test_and_clear_bit(FCPORT_UPDATE_NEEDED,
4990                     &base_vha->dpc_flags)) {
4991                         qla2x00_update_fcports(base_vha);
4992                 }
4993 
4994                 if (test_bit(SCR_PENDING, &base_vha->dpc_flags)) {
4995                         int ret;
4996                         ret = qla2x00_send_change_request(base_vha, 0x3, 0);
4997                         if (ret != QLA_SUCCESS)
4998                                 ql_log(ql_log_warn, base_vha, 0x121,
4999                                     "Failed to enable receiving of RSCN "
5000                                     "requests: 0x%x.\n", ret);
5001                         clear_bit(SCR_PENDING, &base_vha->dpc_flags);
5002                 }
5003 
5004                 if (IS_QLAFX00(ha))
5005                         goto loop_resync_check;
5006 
5007                 if (test_bit(ISP_QUIESCE_NEEDED, &base_vha->dpc_flags)) {
5008                         ql_dbg(ql_dbg_dpc, base_vha, 0x4009,
5009                             "Quiescence mode scheduled.\n");
5010                         if (IS_P3P_TYPE(ha)) {
5011                                 if (IS_QLA82XX(ha))
5012                                         qla82xx_device_state_handler(base_vha);
5013                                 if (IS_QLA8044(ha))
5014                                         qla8044_device_state_handler(base_vha);
5015                                 clear_bit(ISP_QUIESCE_NEEDED,
5016                                     &base_vha->dpc_flags);
5017                                 if (!ha->flags.quiesce_owner) {
5018                                         qla2x00_perform_loop_resync(base_vha);
5019                                         if (IS_QLA82XX(ha)) {
5020                                                 qla82xx_idc_lock(ha);
5021                                                 qla82xx_clear_qsnt_ready(
5022                                                     base_vha);
5023                                                 qla82xx_idc_unlock(ha);
5024                                         } else if (IS_QLA8044(ha)) {
5025                                                 qla8044_idc_lock(ha);
5026                                                 qla8044_clear_qsnt_ready(
5027                                                     base_vha);
5028                                                 qla8044_idc_unlock(ha);
5029                                         }
5030                                 }
5031                         } else {
5032                                 clear_bit(ISP_QUIESCE_NEEDED,
5033                                     &base_vha->dpc_flags);
5034                                 qla2x00_quiesce_io(base_vha);
5035                         }
5036                         ql_dbg(ql_dbg_dpc, base_vha, 0x400a,
5037                             "Quiescence mode end.\n");
5038                 }
5039 
5040                 if (test_and_clear_bit(RESET_MARKER_NEEDED,
5041                                 &base_vha->dpc_flags) &&
5042                     (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
5043 
5044                         ql_dbg(ql_dbg_dpc, base_vha, 0x400b,
5045                             "Reset marker scheduled.\n");
5046                         qla2x00_rst_aen(base_vha);
5047                         clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
5048                         ql_dbg(ql_dbg_dpc, base_vha, 0x400c,
5049                             "Reset marker end.\n");
5050                 }
5051 
5052                 /* Retry each device up to login retry count */
5053                 if ((test_and_clear_bit(RELOGIN_NEEDED,
5054                                                 &base_vha->dpc_flags)) &&
5055                     !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
5056                     atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
5057 
5058                         ql_dbg(ql_dbg_dpc, base_vha, 0x400d,
5059                             "Relogin scheduled.\n");
5060                         qla2x00_relogin(base_vha);
5061                         ql_dbg(ql_dbg_dpc, base_vha, 0x400e,
5062                             "Relogin end.\n");
5063                 }
5064 loop_resync_check:
5065                 if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
5066                     &base_vha->dpc_flags)) {
5067 
5068                         ql_dbg(ql_dbg_dpc, base_vha, 0x400f,
5069                             "Loop resync scheduled.\n");
5070 
5071                         if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
5072                             &base_vha->dpc_flags))) {
5073 
5074                                 rval = qla2x00_loop_resync(base_vha);
5075 
5076                                 clear_bit(LOOP_RESYNC_ACTIVE,
5077                                                 &base_vha->dpc_flags);
5078                         }
5079 
5080                         ql_dbg(ql_dbg_dpc, base_vha, 0x4010,
5081                             "Loop resync end.\n");
5082                 }
5083 
5084                 if (IS_QLAFX00(ha))
5085                         goto intr_on_check;
5086 
5087                 if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
5088                     atomic_read(&base_vha->loop_state) == LOOP_READY) {
5089                         clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
5090                         qla2xxx_flash_npiv_conf(base_vha);
5091                 }
5092 
5093 intr_on_check:
5094                 if (!ha->interrupts_on)
5095                         ha->isp_ops->enable_intrs(ha);
5096 
5097                 if (test_and_clear_bit(BEACON_BLINK_NEEDED,
5098                                         &base_vha->dpc_flags)) {
5099                         if (ha->beacon_blink_led == 1)
5100                                 ha->isp_ops->beacon_blink(base_vha);
5101                 }
5102 
5103                 if (!IS_QLAFX00(ha))
5104                         qla2x00_do_dpc_all_vps(base_vha);
5105 
5106                 ha->dpc_active = 0;
5107 end_loop:
5108                 set_current_state(TASK_INTERRUPTIBLE);
5109         } /* End of while(1) */
5110         __set_current_state(TASK_RUNNING);
5111 
5112         ql_dbg(ql_dbg_dpc, base_vha, 0x4011,
5113             "DPC handler exiting.\n");
5114 
5115         /*
5116          * Make sure that nobody tries to wake us up again.
5117          */
5118         ha->dpc_active = 0;
5119 
5120         /* Cleanup any residual CTX SRBs. */
5121         qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
5122 
5123         return 0;
5124 }
5125 
5126 void
5127 qla2xxx_wake_dpc(struct scsi_qla_host *vha)
5128 {
5129         struct qla_hw_data *ha = vha->hw;
5130         struct task_struct *t = ha->dpc_thread;
5131 
5132         if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
5133                 wake_up_process(t);
5134 }
5135 
5136 /*
5137 *  qla2x00_rst_aen
5138 *      Processes asynchronous reset.
5139 *
5140 * Input:
5141 *      ha  = adapter block pointer.
5142 */
5143 static void
5144 qla2x00_rst_aen(scsi_qla_host_t *vha)
5145 {
5146         if (vha->flags.online && !vha->flags.reset_active &&
5147             !atomic_read(&vha->loop_down_timer) &&
5148             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
5149                 do {
5150                         clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
5151 
5152                         /*
5153                          * Issue marker command only when we are going to start
5154                          * the I/O.
5155                          */
5156                         vha->marker_needed = 1;
5157                 } while (!atomic_read(&vha->loop_down_timer) &&
5158                     (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
5159         }
5160 }
5161 
5162 /**************************************************************************
5163 *   qla2x00_timer
5164 *
5165 * Description:
5166 *   One second timer
5167 *
5168 * Context: Interrupt
5169 ***************************************************************************/
5170 void
5171 qla2x00_timer(scsi_qla_host_t *vha)
5172 {
5173         unsigned long   cpu_flags = 0;
5174         int             start_dpc = 0;
5175         int             index;
5176         srb_t           *sp;
5177         uint16_t        w;
5178         struct qla_hw_data *ha = vha->hw;
5179         struct req_que *req;
5180 
5181         if (ha->flags.eeh_busy) {
5182                 ql_dbg(ql_dbg_timer, vha, 0x6000,
5183                     "EEH = %d, restarting timer.\n",
5184                     ha->flags.eeh_busy);
5185                 qla2x00_restart_timer(vha, WATCH_INTERVAL);
5186                 return;
5187         }
5188 
5189         /*
5190          * Hardware read to raise pending EEH errors during mailbox waits. If
5191          * the read returns -1 then disable the board.
5192          */
5193         if (!pci_channel_offline(ha->pdev)) {
5194                 pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
5195                 if (w == 0xffff)
5196                         /*
5197                          * Schedule this on the default system workqueue so that
5198                          * all the adapter workqueues and the DPC thread can be
5199                          * shutdown cleanly.
5200                          */
5201                         schedule_work(&ha->board_disable);
5202         }
5203 
5204         /* Make sure qla82xx_watchdog is run only for physical port */
5205         if (!vha->vp_idx && IS_P3P_TYPE(ha)) {
5206                 if (test_bit(ISP_QUIESCE_NEEDED, &vha->dpc_flags))
5207                         start_dpc++;
5208                 if (IS_QLA82XX(ha))
5209                         qla82xx_watchdog(vha);
5210                 else if (IS_QLA8044(ha))
5211                         qla8044_watchdog(vha);
5212         }
5213 
5214         if (!vha->vp_idx && IS_QLAFX00(ha))
5215                 qlafx00_timer_routine(vha);
5216 
5217         /* Loop down handler. */
5218         if (atomic_read(&vha->loop_down_timer) > 0 &&
5219             !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags)) &&
5220             !(test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags))
5221                 && vha->flags.online) {
5222 
5223                 if (atomic_read(&vha->loop_down_timer) ==
5224                     vha->loop_down_abort_time) {
5225 
5226                         ql_log(ql_log_info, vha, 0x6008,
5227                             "Loop down - aborting the queues before time expires.\n");
5228 
5229                         if (!IS_QLA2100(ha) && vha->link_down_timeout)
5230                                 atomic_set(&vha->loop_state, LOOP_DEAD);
5231 
5232                         /*
5233                          * Schedule an ISP abort to return any FCP2-device
5234                          * commands.
5235                          */
5236                         /* NPIV - scan physical port only */
5237                         if (!vha->vp_idx) {
5238                                 spin_lock_irqsave(&ha->hardware_lock,
5239                                     cpu_flags);
5240                                 req = ha->req_q_map[0];
5241                                 for (index = 1;
5242                                     index < req->num_outstanding_cmds;
5243                                     index++) {
5244                                         fc_port_t *sfcp;
5245 
5246                                         sp = req->outstanding_cmds[index];
5247                                         if (!sp)
5248                                                 continue;
5249                                         if (sp->type != SRB_SCSI_CMD)
5250                                                 continue;
5251                                         sfcp = sp->fcport;
5252                                         if (!(sfcp->flags & FCF_FCP2_DEVICE))
5253                                                 continue;
5254 
5255                                         if (IS_QLA82XX(ha))
5256                                                 set_bit(FCOE_CTX_RESET_NEEDED,
5257                                                         &vha->dpc_flags);
5258                                         else
5259                                                 set_bit(ISP_ABORT_NEEDED,
5260                                                         &vha->dpc_flags);
5261                                         break;
5262                                 }
5263                                 spin_unlock_irqrestore(&ha->hardware_lock,
5264                                                                 cpu_flags);
5265                         }
5266                         start_dpc++;
5267                 }
5268 
5269                 /* if the loop has been down for 4 minutes, reinit adapter */
5270                 if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
5271                         if (!(vha->device_flags & DFLG_NO_CABLE)) {
5272                                 ql_log(ql_log_warn, vha, 0x6009,
5273                                     "Loop down - aborting ISP.\n");
5274 
5275                                 if (IS_QLA82XX(ha))
5276                                         set_bit(FCOE_CTX_RESET_NEEDED,
5277                                                 &vha->dpc_flags);
5278                                 else
5279                                         set_bit(ISP_ABORT_NEEDED,
5280                                                 &vha->dpc_flags);
5281                         }
5282                 }
5283                 ql_dbg(ql_dbg_timer, vha, 0x600a,
5284                     "Loop down - seconds remaining %d.\n",
5285                     atomic_read(&vha->loop_down_timer));
5286         }
5287         /* Check if beacon LED needs to be blinked for physical host only */
5288         if (!vha->vp_idx && (ha->beacon_blink_led == 1)) {
5289                 /* There is no beacon_blink function for ISP82xx */
5290                 if (!IS_P3P_TYPE(ha)) {
5291                         set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
5292                         start_dpc++;
5293                 }
5294         }
5295 
5296         /* Process any deferred work. */
5297         if (!list_empty(&vha->work_list))
5298                 start_dpc++;
5299 
5300         /* Schedule the DPC routine if needed */
5301         if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
5302             test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
5303             test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
5304             start_dpc ||
5305             test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
5306             test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
5307             test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
5308             test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
5309             test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
5310             test_bit(RELOGIN_NEEDED, &vha->dpc_flags))) {
5311                 ql_dbg(ql_dbg_timer, vha, 0x600b,
5312                     "isp_abort_needed=%d loop_resync_needed=%d "
5313                     "fcport_update_needed=%d start_dpc=%d "
5314                     "reset_marker_needed=%d",
5315                     test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags),
5316                     test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags),
5317                     test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags),
5318                     start_dpc,
5319                     test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags));
5320                 ql_dbg(ql_dbg_timer, vha, 0x600c,
5321                     "beacon_blink_needed=%d isp_unrecoverable=%d "
5322                     "fcoe_ctx_reset_needed=%d vp_dpc_needed=%d "
5323                     "relogin_needed=%d.\n",
5324                     test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags),
5325                     test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags),
5326                     test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags),
5327                     test_bit(VP_DPC_NEEDED, &vha->dpc_flags),
5328                     test_bit(RELOGIN_NEEDED, &vha->dpc_flags));
5329                 qla2xxx_wake_dpc(vha);
5330         }
5331 
5332         qla2x00_restart_timer(vha, WATCH_INTERVAL);
5333 }
5334 
5335 /* Firmware interface routines. */
5336 
5337 #define FW_BLOBS        11
5338 #define FW_ISP21XX      0
5339 #define FW_ISP22XX      1
5340 #define FW_ISP2300      2
5341 #define FW_ISP2322      3
5342 #define FW_ISP24XX      4
5343 #define FW_ISP25XX      5
5344 #define FW_ISP81XX      6
5345 #define FW_ISP82XX      7
5346 #define FW_ISP2031      8
5347 #define FW_ISP8031      9
5348 #define FW_ISP27XX      10
5349 
5350 #define FW_FILE_ISP21XX "ql2100_fw.bin"
5351 #define FW_FILE_ISP22XX "ql2200_fw.bin"
5352 #define FW_FILE_ISP2300 "ql2300_fw.bin"
5353 #define FW_FILE_ISP2322 "ql2322_fw.bin"
5354 #define FW_FILE_ISP24XX "ql2400_fw.bin"
5355 #define FW_FILE_ISP25XX "ql2500_fw.bin"
5356 #define FW_FILE_ISP81XX "ql8100_fw.bin"
5357 #define FW_FILE_ISP82XX "ql8200_fw.bin"
5358 #define FW_FILE_ISP2031 "ql2600_fw.bin"
5359 #define FW_FILE_ISP8031 "ql8300_fw.bin"
5360 #define FW_FILE_ISP27XX "ql2700_fw.bin"
5361 
5362 
5363 static DEFINE_MUTEX(qla_fw_lock);
5364 
5365 static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
5366         { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
5367         { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
5368         { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
5369         { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
5370         { .name = FW_FILE_ISP24XX, },
5371         { .name = FW_FILE_ISP25XX, },
5372         { .name = FW_FILE_ISP81XX, },
5373         { .name = FW_FILE_ISP82XX, },
5374         { .name = FW_FILE_ISP2031, },
5375         { .name = FW_FILE_ISP8031, },
5376         { .name = FW_FILE_ISP27XX, },
5377 };
5378 
5379 struct fw_blob *
5380 qla2x00_request_firmware(scsi_qla_host_t *vha)
5381 {
5382         struct qla_hw_data *ha = vha->hw;
5383         struct fw_blob *blob;
5384 
5385         if (IS_QLA2100(ha)) {
5386                 blob = &qla_fw_blobs[FW_ISP21XX];
5387         } else if (IS_QLA2200(ha)) {
5388                 blob = &qla_fw_blobs[FW_ISP22XX];
5389         } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
5390                 blob = &qla_fw_blobs[FW_ISP2300];
5391         } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
5392                 blob = &qla_fw_blobs[FW_ISP2322];
5393         } else if (IS_QLA24XX_TYPE(ha)) {
5394                 blob = &qla_fw_blobs[FW_ISP24XX];
5395         } else if (IS_QLA25XX(ha)) {
5396                 blob = &qla_fw_blobs[FW_ISP25XX];
5397         } else if (IS_QLA81XX(ha)) {
5398                 blob = &qla_fw_blobs[FW_ISP81XX];
5399         } else if (IS_QLA82XX(ha)) {
5400                 blob = &qla_fw_blobs[FW_ISP82XX];
5401         } else if (IS_QLA2031(ha)) {
5402                 blob = &qla_fw_blobs[FW_ISP2031];
5403         } else if (IS_QLA8031(ha)) {
5404                 blob = &qla_fw_blobs[FW_ISP8031];
5405         } else if (IS_QLA27XX(ha)) {
5406                 blob = &qla_fw_blobs[FW_ISP27XX];
5407         } else {
5408                 return NULL;
5409         }
5410 
5411         mutex_lock(&qla_fw_lock);
5412         if (blob->fw)
5413                 goto out;
5414 
5415         if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
5416                 ql_log(ql_log_warn, vha, 0x0063,
5417                     "Failed to load firmware image (%s).\n", blob->name);
5418                 blob->fw = NULL;
5419                 blob = NULL;
5420                 goto out;
5421         }
5422 
5423 out:
5424         mutex_unlock(&qla_fw_lock);
5425         return blob;
5426 }
5427 
5428 static void
5429 qla2x00_release_firmware(void)
5430 {
5431         int idx;
5432 
5433         mutex_lock(&qla_fw_lock);
5434         for (idx = 0; idx < FW_BLOBS; idx++)
5435                 release_firmware(qla_fw_blobs[idx].fw);
5436         mutex_unlock(&qla_fw_lock);
5437 }
5438 
5439 static pci_ers_result_t
5440 qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
5441 {
5442         scsi_qla_host_t *vha = pci_get_drvdata(pdev);
5443         struct qla_hw_data *ha = vha->hw;
5444 
5445         ql_dbg(ql_dbg_aer, vha, 0x9000,
5446             "PCI error detected, state %x.\n", state);
5447 
5448         switch (state) {
5449         case pci_channel_io_normal:
5450                 ha->flags.eeh_busy = 0;
5451                 return PCI_ERS_RESULT_CAN_RECOVER;
5452         case pci_channel_io_frozen:
5453                 ha->flags.eeh_busy = 1;
5454                 /* For ISP82XX complete any pending mailbox cmd */
5455                 if (IS_QLA82XX(ha)) {
5456                         ha->flags.isp82xx_fw_hung = 1;
5457                         ql_dbg(ql_dbg_aer, vha, 0x9001, "Pci channel io frozen\n");
5458                         qla82xx_clear_pending_mbx(vha);
5459                 }
5460                 qla2x00_free_irqs(vha);
5461                 pci_disable_device(pdev);
5462                 /* Return back all IOs */
5463                 qla2x00_abort_all_cmds(vha, DID_RESET << 16);
5464                 return PCI_ERS_RESULT_NEED_RESET;
5465         case pci_channel_io_perm_failure:
5466                 ha->flags.pci_channel_io_perm_failure = 1;
5467                 qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
5468                 return PCI_ERS_RESULT_DISCONNECT;
5469         }
5470         return PCI_ERS_RESULT_NEED_RESET;
5471 }
5472 
5473 static pci_ers_result_t
5474 qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
5475 {
5476         int risc_paused = 0;
5477         uint32_t stat;
5478         unsigned long flags;
5479         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5480         struct qla_hw_data *ha = base_vha->hw;
5481         struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
5482         struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
5483 
5484         if (IS_QLA82XX(ha))
5485                 return PCI_ERS_RESULT_RECOVERED;
5486 
5487         spin_lock_irqsave(&ha->hardware_lock, flags);
5488         if (IS_QLA2100(ha) || IS_QLA2200(ha)){
5489                 stat = RD_REG_DWORD(&reg->hccr);
5490                 if (stat & HCCR_RISC_PAUSE)
5491                         risc_paused = 1;
5492         } else if (IS_QLA23XX(ha)) {
5493                 stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
5494                 if (stat & HSR_RISC_PAUSED)
5495                         risc_paused = 1;
5496         } else if (IS_FWI2_CAPABLE(ha)) {
5497                 stat = RD_REG_DWORD(&reg24->host_status);
5498                 if (stat & HSRX_RISC_PAUSED)
5499                         risc_paused = 1;
5500         }
5501         spin_unlock_irqrestore(&ha->hardware_lock, flags);
5502 
5503         if (risc_paused) {
5504                 ql_log(ql_log_info, base_vha, 0x9003,
5505                     "RISC paused -- mmio_enabled, Dumping firmware.\n");
5506                 ha->isp_ops->fw_dump(base_vha, 0);
5507 
5508                 return PCI_ERS_RESULT_NEED_RESET;
5509         } else
5510                 return PCI_ERS_RESULT_RECOVERED;
5511 }
5512 
5513 static uint32_t
5514 qla82xx_error_recovery(scsi_qla_host_t *base_vha)
5515 {
5516         uint32_t rval = QLA_FUNCTION_FAILED;
5517         uint32_t drv_active = 0;
5518         struct qla_hw_data *ha = base_vha->hw;
5519         int fn;
5520         struct pci_dev *other_pdev = NULL;
5521 
5522         ql_dbg(ql_dbg_aer, base_vha, 0x9006,
5523             "Entered %s.\n", __func__);
5524 
5525         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5526 
5527         if (base_vha->flags.online) {
5528                 /* Abort all outstanding commands,
5529                  * so as to be requeued later */
5530                 qla2x00_abort_isp_cleanup(base_vha);
5531         }
5532 
5533 
5534         fn = PCI_FUNC(ha->pdev->devfn);
5535         while (fn > 0) {
5536                 fn--;
5537                 ql_dbg(ql_dbg_aer, base_vha, 0x9007,
5538                     "Finding pci device at function = 0x%x.\n", fn);
5539                 other_pdev =
5540                     pci_get_domain_bus_and_slot(pci_domain_nr(ha->pdev->bus),
5541                     ha->pdev->bus->number, PCI_DEVFN(PCI_SLOT(ha->pdev->devfn),
5542                     fn));
5543 
5544                 if (!other_pdev)
5545                         continue;
5546                 if (atomic_read(&other_pdev->enable_cnt)) {
5547                         ql_dbg(ql_dbg_aer, base_vha, 0x9008,
5548                             "Found PCI func available and enable at 0x%x.\n",
5549                             fn);
5550                         pci_dev_put(other_pdev);
5551                         break;
5552                 }
5553                 pci_dev_put(other_pdev);
5554         }
5555 
5556         if (!fn) {
5557                 /* Reset owner */
5558                 ql_dbg(ql_dbg_aer, base_vha, 0x9009,
5559                     "This devfn is reset owner = 0x%x.\n",
5560                     ha->pdev->devfn);
5561                 qla82xx_idc_lock(ha);
5562 
5563                 qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5564                     QLA8XXX_DEV_INITIALIZING);
5565 
5566                 qla82xx_wr_32(ha, QLA82XX_CRB_DRV_IDC_VERSION,
5567                     QLA82XX_IDC_VERSION);
5568 
5569                 drv_active = qla82xx_rd_32(ha, QLA82XX_CRB_DRV_ACTIVE);
5570                 ql_dbg(ql_dbg_aer, base_vha, 0x900a,
5571                     "drv_active = 0x%x.\n", drv_active);
5572 
5573                 qla82xx_idc_unlock(ha);
5574                 /* Reset if device is not already reset
5575                  * drv_active would be 0 if a reset has already been done
5576                  */
5577                 if (drv_active)
5578                         rval = qla82xx_start_firmware(base_vha);
5579                 else
5580                         rval = QLA_SUCCESS;
5581                 qla82xx_idc_lock(ha);
5582 
5583                 if (rval != QLA_SUCCESS) {
5584                         ql_log(ql_log_info, base_vha, 0x900b,
5585                             "HW State: FAILED.\n");
5586                         qla82xx_clear_drv_active(ha);
5587                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5588                             QLA8XXX_DEV_FAILED);
5589                 } else {
5590                         ql_log(ql_log_info, base_vha, 0x900c,
5591                             "HW State: READY.\n");
5592                         qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
5593                             QLA8XXX_DEV_READY);
5594                         qla82xx_idc_unlock(ha);
5595                         ha->flags.isp82xx_fw_hung = 0;
5596                         rval = qla82xx_restart_isp(base_vha);
5597                         qla82xx_idc_lock(ha);
5598                         /* Clear driver state register */
5599                         qla82xx_wr_32(ha, QLA82XX_CRB_DRV_STATE, 0);
5600                         qla82xx_set_drv_active(base_vha);
5601                 }
5602                 qla82xx_idc_unlock(ha);
5603         } else {
5604                 ql_dbg(ql_dbg_aer, base_vha, 0x900d,
5605                     "This devfn is not reset owner = 0x%x.\n",
5606                     ha->pdev->devfn);
5607                 if ((qla82xx_rd_32(ha, QLA82XX_CRB_DEV_STATE) ==
5608                     QLA8XXX_DEV_READY)) {
5609                         ha->flags.isp82xx_fw_hung = 0;
5610                         rval = qla82xx_restart_isp(base_vha);
5611                         qla82xx_idc_lock(ha);
5612                         qla82xx_set_drv_active(base_vha);
5613                         qla82xx_idc_unlock(ha);
5614                 }
5615         }
5616         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5617 
5618         return rval;
5619 }
5620 
5621 static pci_ers_result_t
5622 qla2xxx_pci_slot_reset(struct pci_dev *pdev)
5623 {
5624         pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
5625         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5626         struct qla_hw_data *ha = base_vha->hw;
5627         struct rsp_que *rsp;
5628         int rc, retries = 10;
5629 
5630         ql_dbg(ql_dbg_aer, base_vha, 0x9004,
5631             "Slot Reset.\n");
5632 
5633         /* Workaround: qla2xxx driver which access hardware earlier
5634          * needs error state to be pci_channel_io_online.
5635          * Otherwise mailbox command timesout.
5636          */
5637         pdev->error_state = pci_channel_io_normal;
5638 
5639         pci_restore_state(pdev);
5640 
5641         /* pci_restore_state() clears the saved_state flag of the device
5642          * save restored state which resets saved_state flag
5643          */
5644         pci_save_state(pdev);
5645 
5646         if (ha->mem_only)
5647                 rc = pci_enable_device_mem(pdev);
5648         else
5649                 rc = pci_enable_device(pdev);
5650 
5651         if (rc) {
5652                 ql_log(ql_log_warn, base_vha, 0x9005,
5653                     "Can't re-enable PCI device after reset.\n");
5654                 goto exit_slot_reset;
5655         }
5656 
5657         rsp = ha->rsp_q_map[0];
5658         if (qla2x00_request_irqs(ha, rsp))
5659                 goto exit_slot_reset;
5660 
5661         if (ha->isp_ops->pci_config(base_vha))
5662                 goto exit_slot_reset;
5663 
5664         if (IS_QLA82XX(ha)) {
5665                 if (qla82xx_error_recovery(base_vha) == QLA_SUCCESS) {
5666                         ret = PCI_ERS_RESULT_RECOVERED;
5667                         goto exit_slot_reset;
5668                 } else
5669                         goto exit_slot_reset;
5670         }
5671 
5672         while (ha->flags.mbox_busy && retries--)
5673                 msleep(1000);
5674 
5675         set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5676         if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
5677                 ret =  PCI_ERS_RESULT_RECOVERED;
5678         clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
5679 
5680 
5681 exit_slot_reset:
5682         ql_dbg(ql_dbg_aer, base_vha, 0x900e,
5683             "slot_reset return %x.\n", ret);
5684 
5685         return ret;
5686 }
5687 
5688 static void
5689 qla2xxx_pci_resume(struct pci_dev *pdev)
5690 {
5691         scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
5692         struct qla_hw_data *ha = base_vha->hw;
5693         int ret;
5694 
5695         ql_dbg(ql_dbg_aer, base_vha, 0x900f,
5696             "pci_resume.\n");
5697 
5698         ret = qla2x00_wait_for_hba_online(base_vha);
5699         if (ret != QLA_SUCCESS) {
5700                 ql_log(ql_log_fatal, base_vha, 0x9002,
5701                     "The device failed to resume I/O from slot/link_reset.\n");
5702         }
5703 
5704         pci_cleanup_aer_uncorrect_error_status(pdev);
5705 
5706         ha->flags.eeh_busy = 0;
5707 }
5708 
5709 static const struct pci_error_handlers qla2xxx_err_handler = {
5710         .error_detected = qla2xxx_pci_error_detected,
5711         .mmio_enabled = qla2xxx_pci_mmio_enabled,
5712         .slot_reset = qla2xxx_pci_slot_reset,
5713         .resume = qla2xxx_pci_resume,
5714 };
5715 
5716 static struct pci_device_id qla2xxx_pci_tbl[] = {
5717         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
5718         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
5719         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
5720         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
5721         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
5722         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
5723         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
5724         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
5725         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
5726         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
5727         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
5728         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
5729         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
5730         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2031) },
5731         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
5732         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
5733         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8031) },
5734         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISPF001) },
5735         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8044) },
5736         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2071) },
5737         { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2271) },
5738         { 0 },
5739 };
5740 MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
5741 
5742 static struct pci_driver qla2xxx_pci_driver = {
5743         .name           = QLA2XXX_DRIVER_NAME,
5744         .driver         = {
5745                 .owner          = THIS_MODULE,
5746         },
5747         .id_table       = qla2xxx_pci_tbl,
5748         .probe          = qla2x00_probe_one,
5749         .remove         = qla2x00_remove_one,
5750         .shutdown       = qla2x00_shutdown,
5751         .err_handler    = &qla2xxx_err_handler,
5752 };
5753 
5754 static const struct file_operations apidev_fops = {
5755         .owner = THIS_MODULE,
5756         .llseek = noop_llseek,
5757 };
5758 
5759 /**
5760  * qla2x00_module_init - Module initialization.
5761  **/
5762 static int __init
5763 qla2x00_module_init(void)
5764 {
5765         int ret = 0;
5766 
5767         /* Allocate cache for SRBs. */
5768         srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
5769             SLAB_HWCACHE_ALIGN, NULL);
5770         if (srb_cachep == NULL) {
5771                 ql_log(ql_log_fatal, NULL, 0x0001,
5772                     "Unable to allocate SRB cache...Failing load!.\n");
5773                 return -ENOMEM;
5774         }
5775 
5776         /* Initialize target kmem_cache and mem_pools */
5777         ret = qlt_init();
5778         if (ret < 0) {
5779                 kmem_cache_destroy(srb_cachep);
5780                 return ret;
5781         } else if (ret > 0) {
5782                 /*
5783                  * If initiator mode is explictly disabled by qlt_init(),
5784                  * prevent scsi_transport_fc.c:fc_scsi_scan_rport() from
5785                  * performing scsi_scan_target() during LOOP UP event.
5786                  */
5787                 qla2xxx_transport_functions.disable_target_scan = 1;
5788                 qla2xxx_transport_vport_functions.disable_target_scan = 1;
5789         }
5790 
5791         /* Derive version string. */
5792         strcpy(qla2x00_version_str, QLA2XXX_VERSION);
5793         if (ql2xextended_error_logging)
5794                 strcat(qla2x00_version_str, "-debug");
5795 
5796         qla2xxx_transport_template =
5797             fc_attach_transport(&qla2xxx_transport_functions);
5798         if (!qla2xxx_transport_template) {
5799                 kmem_cache_destroy(srb_cachep);
5800                 ql_log(ql_log_fatal, NULL, 0x0002,
5801                     "fc_attach_transport failed...Failing load!.\n");
5802                 qlt_exit();
5803                 return -ENODEV;
5804         }
5805 
5806         apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
5807         if (apidev_major < 0) {
5808                 ql_log(ql_log_fatal, NULL, 0x0003,
5809                     "Unable to register char device %s.\n", QLA2XXX_APIDEV);
5810         }
5811 
5812         qla2xxx_transport_vport_template =
5813             fc_attach_transport(&qla2xxx_transport_vport_functions);
5814         if (!qla2xxx_transport_vport_template) {
5815                 kmem_cache_destroy(srb_cachep);
5816                 qlt_exit();
5817                 fc_release_transport(qla2xxx_transport_template);
5818                 ql_log(ql_log_fatal, NULL, 0x0004,
5819                     "fc_attach_transport vport failed...Failing load!.\n");
5820                 return -ENODEV;
5821         }
5822         ql_log(ql_log_info, NULL, 0x0005,
5823             "QLogic Fibre Channel HBA Driver: %s.\n",
5824             qla2x00_version_str);
5825         ret = pci_register_driver(&qla2xxx_pci_driver);
5826         if (ret) {
5827                 kmem_cache_destroy(srb_cachep);
5828                 qlt_exit();
5829                 fc_release_transport(qla2xxx_transport_template);
5830                 fc_release_transport(qla2xxx_transport_vport_template);
5831                 ql_log(ql_log_fatal, NULL, 0x0006,
5832                     "pci_register_driver failed...ret=%d Failing load!.\n",
5833                     ret);
5834         }
5835         return ret;
5836 }
5837 
5838 /**
5839  * qla2x00_module_exit - Module cleanup.
5840  **/
5841 static void __exit
5842 qla2x00_module_exit(void)
5843 {
5844         unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
5845         pci_unregister_driver(&qla2xxx_pci_driver);
5846         qla2x00_release_firmware();
5847         kmem_cache_destroy(srb_cachep);
5848         qlt_exit();
5849         if (ctx_cachep)
5850                 kmem_cache_destroy(ctx_cachep);
5851         fc_release_transport(qla2xxx_transport_template);
5852         fc_release_transport(qla2xxx_transport_vport_template);
5853 }
5854 
5855 module_init(qla2x00_module_init);
5856 module_exit(qla2x00_module_exit);
5857 
5858 MODULE_AUTHOR("QLogic Corporation");
5859 MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
5860 MODULE_LICENSE("GPL");
5861 MODULE_VERSION(QLA2XXX_VERSION);
5862 MODULE_FIRMWARE(FW_FILE_ISP21XX);
5863 MODULE_FIRMWARE(FW_FILE_ISP22XX);
5864 MODULE_FIRMWARE(FW_FILE_ISP2300);
5865 MODULE_FIRMWARE(FW_FILE_ISP2322);
5866 MODULE_FIRMWARE(FW_FILE_ISP24XX);
5867 MODULE_FIRMWARE(FW_FILE_ISP25XX);
5868 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us