Version:  2.0.40 2.2.26 2.4.37 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1

Linux/drivers/scsi/arcmsr/arcmsr_hba.c

  1 /*
  2 *******************************************************************************
  3 **        O.S   : Linux
  4 **   FILE NAME  : arcmsr_hba.c
  5 **        BY    : Nick Cheng, C.L. Huang
  6 **   Description: SCSI RAID Device Driver for Areca RAID Controller
  7 *******************************************************************************
  8 ** Copyright (C) 2002 - 2014, Areca Technology Corporation All rights reserved
  9 **
 10 **     Web site: www.areca.com.tw
 11 **       E-mail: support@areca.com.tw
 12 **
 13 ** This program is free software; you can redistribute it and/or modify
 14 ** it under the terms of the GNU General Public License version 2 as
 15 ** published by the Free Software Foundation.
 16 ** This program is distributed in the hope that it will be useful,
 17 ** but WITHOUT ANY WARRANTY; without even the implied warranty of
 18 ** MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19 ** GNU General Public License for more details.
 20 *******************************************************************************
 21 ** Redistribution and use in source and binary forms, with or without
 22 ** modification, are permitted provided that the following conditions
 23 ** are met:
 24 ** 1. Redistributions of source code must retain the above copyright
 25 **    notice, this list of conditions and the following disclaimer.
 26 ** 2. Redistributions in binary form must reproduce the above copyright
 27 **    notice, this list of conditions and the following disclaimer in the
 28 **    documentation and/or other materials provided with the distribution.
 29 ** 3. The name of the author may not be used to endorse or promote products
 30 **    derived from this software without specific prior written permission.
 31 **
 32 ** THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
 33 ** IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
 34 ** OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
 35 ** IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
 36 ** INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES(INCLUDING,BUT
 37 ** NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 38 ** DATA, OR PROFITS; OR BUSINESS INTERRUPTION)HOWEVER CAUSED AND ON ANY
 39 ** THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 40 ** (INCLUDING NEGLIGENCE OR OTHERWISE)ARISING IN ANY WAY OUT OF THE USE OF
 41 ** THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 42 *******************************************************************************
 43 ** For history of changes, see Documentation/scsi/ChangeLog.arcmsr
 44 **     Firmware Specification, see Documentation/scsi/arcmsr_spec.txt
 45 *******************************************************************************
 46 */
 47 #include <linux/module.h>
 48 #include <linux/reboot.h>
 49 #include <linux/spinlock.h>
 50 #include <linux/pci_ids.h>
 51 #include <linux/interrupt.h>
 52 #include <linux/moduleparam.h>
 53 #include <linux/errno.h>
 54 #include <linux/types.h>
 55 #include <linux/delay.h>
 56 #include <linux/dma-mapping.h>
 57 #include <linux/timer.h>
 58 #include <linux/slab.h>
 59 #include <linux/pci.h>
 60 #include <linux/aer.h>
 61 #include <linux/circ_buf.h>
 62 #include <asm/dma.h>
 63 #include <asm/io.h>
 64 #include <asm/uaccess.h>
 65 #include <scsi/scsi_host.h>
 66 #include <scsi/scsi.h>
 67 #include <scsi/scsi_cmnd.h>
 68 #include <scsi/scsi_tcq.h>
 69 #include <scsi/scsi_device.h>
 70 #include <scsi/scsi_transport.h>
 71 #include <scsi/scsicam.h>
 72 #include "arcmsr.h"
 73 MODULE_AUTHOR("Nick Cheng, C.L. Huang <support@areca.com.tw>");
 74 MODULE_DESCRIPTION("Areca ARC11xx/12xx/16xx/188x SAS/SATA RAID Controller Driver");
 75 MODULE_LICENSE("Dual BSD/GPL");
 76 MODULE_VERSION(ARCMSR_DRIVER_VERSION);
 77 
 78 #define ARCMSR_SLEEPTIME        10
 79 #define ARCMSR_RETRYCOUNT       12
 80 
 81 static wait_queue_head_t wait_q;
 82 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
 83                                         struct scsi_cmnd *cmd);
 84 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb);
 85 static int arcmsr_abort(struct scsi_cmnd *);
 86 static int arcmsr_bus_reset(struct scsi_cmnd *);
 87 static int arcmsr_bios_param(struct scsi_device *sdev,
 88                 struct block_device *bdev, sector_t capacity, int *info);
 89 static int arcmsr_queue_command(struct Scsi_Host *h, struct scsi_cmnd *cmd);
 90 static int arcmsr_probe(struct pci_dev *pdev,
 91                                 const struct pci_device_id *id);
 92 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state);
 93 static int arcmsr_resume(struct pci_dev *pdev);
 94 static void arcmsr_remove(struct pci_dev *pdev);
 95 static void arcmsr_shutdown(struct pci_dev *pdev);
 96 static void arcmsr_iop_init(struct AdapterControlBlock *acb);
 97 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb);
 98 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb);
 99 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
100         u32 intmask_org);
101 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb);
102 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb);
103 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb);
104 static void arcmsr_request_device_map(unsigned long pacb);
105 static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb);
106 static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb);
107 static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb);
108 static void arcmsr_message_isr_bh_fn(struct work_struct *work);
109 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb);
110 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb);
111 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *pACB);
112 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb);
113 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb);
114 static const char *arcmsr_info(struct Scsi_Host *);
115 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb);
116 static void arcmsr_free_irq(struct pci_dev *, struct AdapterControlBlock *);
117 static int arcmsr_adjust_disk_queue_depth(struct scsi_device *sdev, int queue_depth)
118 {
119         if (queue_depth > ARCMSR_MAX_CMD_PERLUN)
120                 queue_depth = ARCMSR_MAX_CMD_PERLUN;
121         return scsi_change_queue_depth(sdev, queue_depth);
122 }
123 
124 static struct scsi_host_template arcmsr_scsi_host_template = {
125         .module                 = THIS_MODULE,
126         .name                   = "Areca SAS/SATA RAID driver",
127         .info                   = arcmsr_info,
128         .queuecommand           = arcmsr_queue_command,
129         .eh_abort_handler               = arcmsr_abort,
130         .eh_bus_reset_handler   = arcmsr_bus_reset,
131         .bios_param             = arcmsr_bios_param,
132         .change_queue_depth     = arcmsr_adjust_disk_queue_depth,
133         .can_queue              = ARCMSR_MAX_OUTSTANDING_CMD,
134         .this_id                        = ARCMSR_SCSI_INITIATOR_ID,
135         .sg_tablesize                   = ARCMSR_DEFAULT_SG_ENTRIES, 
136         .max_sectors                    = ARCMSR_MAX_XFER_SECTORS_C, 
137         .cmd_per_lun            = ARCMSR_MAX_CMD_PERLUN,
138         .use_clustering         = ENABLE_CLUSTERING,
139         .shost_attrs            = arcmsr_host_attrs,
140         .no_write_same          = 1,
141 };
142 
143 static struct pci_device_id arcmsr_device_id_table[] = {
144         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1110),
145                 .driver_data = ACB_ADAPTER_TYPE_A},
146         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1120),
147                 .driver_data = ACB_ADAPTER_TYPE_A},
148         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1130),
149                 .driver_data = ACB_ADAPTER_TYPE_A},
150         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1160),
151                 .driver_data = ACB_ADAPTER_TYPE_A},
152         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1170),
153                 .driver_data = ACB_ADAPTER_TYPE_A},
154         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1200),
155                 .driver_data = ACB_ADAPTER_TYPE_B},
156         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1201),
157                 .driver_data = ACB_ADAPTER_TYPE_B},
158         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1202),
159                 .driver_data = ACB_ADAPTER_TYPE_B},
160         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1210),
161                 .driver_data = ACB_ADAPTER_TYPE_A},
162         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1214),
163                 .driver_data = ACB_ADAPTER_TYPE_D},
164         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1220),
165                 .driver_data = ACB_ADAPTER_TYPE_A},
166         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1230),
167                 .driver_data = ACB_ADAPTER_TYPE_A},
168         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1260),
169                 .driver_data = ACB_ADAPTER_TYPE_A},
170         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1270),
171                 .driver_data = ACB_ADAPTER_TYPE_A},
172         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1280),
173                 .driver_data = ACB_ADAPTER_TYPE_A},
174         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1380),
175                 .driver_data = ACB_ADAPTER_TYPE_A},
176         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1381),
177                 .driver_data = ACB_ADAPTER_TYPE_A},
178         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1680),
179                 .driver_data = ACB_ADAPTER_TYPE_A},
180         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1681),
181                 .driver_data = ACB_ADAPTER_TYPE_A},
182         {PCI_DEVICE(PCI_VENDOR_ID_ARECA, PCI_DEVICE_ID_ARECA_1880),
183                 .driver_data = ACB_ADAPTER_TYPE_C},
184         {0, 0}, /* Terminating entry */
185 };
186 MODULE_DEVICE_TABLE(pci, arcmsr_device_id_table);
187 
188 static struct pci_driver arcmsr_pci_driver = {
189         .name                   = "arcmsr",
190         .id_table                       = arcmsr_device_id_table,
191         .probe                  = arcmsr_probe,
192         .remove                 = arcmsr_remove,
193         .suspend                = arcmsr_suspend,
194         .resume                 = arcmsr_resume,
195         .shutdown               = arcmsr_shutdown,
196 };
197 /*
198 ****************************************************************************
199 ****************************************************************************
200 */
201 
202 static void arcmsr_free_mu(struct AdapterControlBlock *acb)
203 {
204         switch (acb->adapter_type) {
205         case ACB_ADAPTER_TYPE_B:
206         case ACB_ADAPTER_TYPE_D: {
207                 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize,
208                         acb->dma_coherent2, acb->dma_coherent_handle2);
209                 break;
210         }
211         }
212 }
213 
214 static bool arcmsr_remap_pciregion(struct AdapterControlBlock *acb)
215 {
216         struct pci_dev *pdev = acb->pdev;
217         switch (acb->adapter_type){
218         case ACB_ADAPTER_TYPE_A:{
219                 acb->pmuA = ioremap(pci_resource_start(pdev,0), pci_resource_len(pdev,0));
220                 if (!acb->pmuA) {
221                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
222                         return false;
223                 }
224                 break;
225         }
226         case ACB_ADAPTER_TYPE_B:{
227                 void __iomem *mem_base0, *mem_base1;
228                 mem_base0 = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
229                 if (!mem_base0) {
230                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
231                         return false;
232                 }
233                 mem_base1 = ioremap(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
234                 if (!mem_base1) {
235                         iounmap(mem_base0);
236                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
237                         return false;
238                 }
239                 acb->mem_base0 = mem_base0;
240                 acb->mem_base1 = mem_base1;
241                 break;
242         }
243         case ACB_ADAPTER_TYPE_C:{
244                 acb->pmuC = ioremap_nocache(pci_resource_start(pdev, 1), pci_resource_len(pdev, 1));
245                 if (!acb->pmuC) {
246                         printk(KERN_NOTICE "arcmsr%d: memory mapping region fail \n", acb->host->host_no);
247                         return false;
248                 }
249                 if (readl(&acb->pmuC->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
250                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &acb->pmuC->outbound_doorbell_clear);/*clear interrupt*/
251                         return true;
252                 }
253                 break;
254         }
255         case ACB_ADAPTER_TYPE_D: {
256                 void __iomem *mem_base0;
257                 unsigned long addr, range, flags;
258 
259                 addr = (unsigned long)pci_resource_start(pdev, 0);
260                 range = pci_resource_len(pdev, 0);
261                 flags = pci_resource_flags(pdev, 0);
262                 if (flags & IORESOURCE_CACHEABLE)
263                         mem_base0 = ioremap(addr, range);
264                 else
265                         mem_base0 = ioremap_nocache(addr, range);
266                 if (!mem_base0) {
267                         pr_notice("arcmsr%d: memory mapping region fail\n",
268                                 acb->host->host_no);
269                         return false;
270                 }
271                 acb->mem_base0 = mem_base0;
272                 break;
273                 }
274         }
275         return true;
276 }
277 
278 static void arcmsr_unmap_pciregion(struct AdapterControlBlock *acb)
279 {
280         switch (acb->adapter_type) {
281         case ACB_ADAPTER_TYPE_A:{
282                 iounmap(acb->pmuA);
283         }
284         break;
285         case ACB_ADAPTER_TYPE_B:{
286                 iounmap(acb->mem_base0);
287                 iounmap(acb->mem_base1);
288         }
289 
290         break;
291         case ACB_ADAPTER_TYPE_C:{
292                 iounmap(acb->pmuC);
293         }
294         break;
295         case ACB_ADAPTER_TYPE_D:
296                 iounmap(acb->mem_base0);
297                 break;
298         }
299 }
300 
301 static irqreturn_t arcmsr_do_interrupt(int irq, void *dev_id)
302 {
303         irqreturn_t handle_state;
304         struct AdapterControlBlock *acb = dev_id;
305 
306         handle_state = arcmsr_interrupt(acb);
307         return handle_state;
308 }
309 
310 static int arcmsr_bios_param(struct scsi_device *sdev,
311                 struct block_device *bdev, sector_t capacity, int *geom)
312 {
313         int ret, heads, sectors, cylinders, total_capacity;
314         unsigned char *buffer;/* return copy of block device's partition table */
315 
316         buffer = scsi_bios_ptable(bdev);
317         if (buffer) {
318                 ret = scsi_partsize(buffer, capacity, &geom[2], &geom[0], &geom[1]);
319                 kfree(buffer);
320                 if (ret != -1)
321                         return ret;
322         }
323         total_capacity = capacity;
324         heads = 64;
325         sectors = 32;
326         cylinders = total_capacity / (heads * sectors);
327         if (cylinders > 1024) {
328                 heads = 255;
329                 sectors = 63;
330                 cylinders = total_capacity / (heads * sectors);
331         }
332         geom[0] = heads;
333         geom[1] = sectors;
334         geom[2] = cylinders;
335         return 0;
336 }
337 
338 static uint8_t arcmsr_hbaA_wait_msgint_ready(struct AdapterControlBlock *acb)
339 {
340         struct MessageUnit_A __iomem *reg = acb->pmuA;
341         int i;
342 
343         for (i = 0; i < 2000; i++) {
344                 if (readl(&reg->outbound_intstatus) &
345                                 ARCMSR_MU_OUTBOUND_MESSAGE0_INT) {
346                         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT,
347                                 &reg->outbound_intstatus);
348                         return true;
349                 }
350                 msleep(10);
351         } /* max 20 seconds */
352 
353         return false;
354 }
355 
356 static uint8_t arcmsr_hbaB_wait_msgint_ready(struct AdapterControlBlock *acb)
357 {
358         struct MessageUnit_B *reg = acb->pmuB;
359         int i;
360 
361         for (i = 0; i < 2000; i++) {
362                 if (readl(reg->iop2drv_doorbell)
363                         & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE) {
364                         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN,
365                                         reg->iop2drv_doorbell);
366                         writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT,
367                                         reg->drv2iop_doorbell);
368                         return true;
369                 }
370                 msleep(10);
371         } /* max 20 seconds */
372 
373         return false;
374 }
375 
376 static uint8_t arcmsr_hbaC_wait_msgint_ready(struct AdapterControlBlock *pACB)
377 {
378         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
379         int i;
380 
381         for (i = 0; i < 2000; i++) {
382                 if (readl(&phbcmu->outbound_doorbell)
383                                 & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
384                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR,
385                                 &phbcmu->outbound_doorbell_clear); /*clear interrupt*/
386                         return true;
387                 }
388                 msleep(10);
389         } /* max 20 seconds */
390 
391         return false;
392 }
393 
394 static bool arcmsr_hbaD_wait_msgint_ready(struct AdapterControlBlock *pACB)
395 {
396         struct MessageUnit_D *reg = pACB->pmuD;
397         int i;
398 
399         for (i = 0; i < 2000; i++) {
400                 if (readl(reg->outbound_doorbell)
401                         & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
402                         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
403                                 reg->outbound_doorbell);
404                         return true;
405                 }
406                 msleep(10);
407         } /* max 20 seconds */
408         return false;
409 }
410 
411 static void arcmsr_hbaA_flush_cache(struct AdapterControlBlock *acb)
412 {
413         struct MessageUnit_A __iomem *reg = acb->pmuA;
414         int retry_count = 30;
415         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
416         do {
417                 if (arcmsr_hbaA_wait_msgint_ready(acb))
418                         break;
419                 else {
420                         retry_count--;
421                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
422                         timeout, retry count down = %d \n", acb->host->host_no, retry_count);
423                 }
424         } while (retry_count != 0);
425 }
426 
427 static void arcmsr_hbaB_flush_cache(struct AdapterControlBlock *acb)
428 {
429         struct MessageUnit_B *reg = acb->pmuB;
430         int retry_count = 30;
431         writel(ARCMSR_MESSAGE_FLUSH_CACHE, reg->drv2iop_doorbell);
432         do {
433                 if (arcmsr_hbaB_wait_msgint_ready(acb))
434                         break;
435                 else {
436                         retry_count--;
437                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
438                         timeout,retry count down = %d \n", acb->host->host_no, retry_count);
439                 }
440         } while (retry_count != 0);
441 }
442 
443 static void arcmsr_hbaC_flush_cache(struct AdapterControlBlock *pACB)
444 {
445         struct MessageUnit_C __iomem *reg = pACB->pmuC;
446         int retry_count = 30;/* enlarge wait flush adapter cache time: 10 minute */
447         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, &reg->inbound_msgaddr0);
448         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
449         do {
450                 if (arcmsr_hbaC_wait_msgint_ready(pACB)) {
451                         break;
452                 } else {
453                         retry_count--;
454                         printk(KERN_NOTICE "arcmsr%d: wait 'flush adapter cache' \
455                         timeout,retry count down = %d \n", pACB->host->host_no, retry_count);
456                 }
457         } while (retry_count != 0);
458         return;
459 }
460 
461 static void arcmsr_hbaD_flush_cache(struct AdapterControlBlock *pACB)
462 {
463         int retry_count = 15;
464         struct MessageUnit_D *reg = pACB->pmuD;
465 
466         writel(ARCMSR_INBOUND_MESG0_FLUSH_CACHE, reg->inbound_msgaddr0);
467         do {
468                 if (arcmsr_hbaD_wait_msgint_ready(pACB))
469                         break;
470 
471                 retry_count--;
472                 pr_notice("arcmsr%d: wait 'flush adapter "
473                         "cache' timeout, retry count down = %d\n",
474                         pACB->host->host_no, retry_count);
475         } while (retry_count != 0);
476 }
477 
478 static void arcmsr_flush_adapter_cache(struct AdapterControlBlock *acb)
479 {
480         switch (acb->adapter_type) {
481 
482         case ACB_ADAPTER_TYPE_A: {
483                 arcmsr_hbaA_flush_cache(acb);
484                 }
485                 break;
486 
487         case ACB_ADAPTER_TYPE_B: {
488                 arcmsr_hbaB_flush_cache(acb);
489                 }
490                 break;
491         case ACB_ADAPTER_TYPE_C: {
492                 arcmsr_hbaC_flush_cache(acb);
493                 }
494                 break;
495         case ACB_ADAPTER_TYPE_D:
496                 arcmsr_hbaD_flush_cache(acb);
497                 break;
498         }
499 }
500 
501 static int arcmsr_alloc_ccb_pool(struct AdapterControlBlock *acb)
502 {
503         struct pci_dev *pdev = acb->pdev;
504         void *dma_coherent;
505         dma_addr_t dma_coherent_handle;
506         struct CommandControlBlock *ccb_tmp;
507         int i = 0, j = 0;
508         dma_addr_t cdb_phyaddr;
509         unsigned long roundup_ccbsize;
510         unsigned long max_xfer_len;
511         unsigned long max_sg_entrys;
512         uint32_t  firm_config_version;
513 
514         for (i = 0; i < ARCMSR_MAX_TARGETID; i++)
515                 for (j = 0; j < ARCMSR_MAX_TARGETLUN; j++)
516                         acb->devstate[i][j] = ARECA_RAID_GONE;
517 
518         max_xfer_len = ARCMSR_MAX_XFER_LEN;
519         max_sg_entrys = ARCMSR_DEFAULT_SG_ENTRIES;
520         firm_config_version = acb->firm_cfg_version;
521         if((firm_config_version & 0xFF) >= 3){
522                 max_xfer_len = (ARCMSR_CDB_SG_PAGE_LENGTH << ((firm_config_version >> 8) & 0xFF)) * 1024;/* max 4M byte */
523                 max_sg_entrys = (max_xfer_len/4096);
524         }
525         acb->host->max_sectors = max_xfer_len/512;
526         acb->host->sg_tablesize = max_sg_entrys;
527         roundup_ccbsize = roundup(sizeof(struct CommandControlBlock) + (max_sg_entrys - 1) * sizeof(struct SG64ENTRY), 32);
528         acb->uncache_size = roundup_ccbsize * ARCMSR_MAX_FREECCB_NUM;
529         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->uncache_size, &dma_coherent_handle, GFP_KERNEL);
530         if(!dma_coherent){
531                 printk(KERN_NOTICE "arcmsr%d: dma_alloc_coherent got error\n", acb->host->host_no);
532                 return -ENOMEM;
533         }
534         acb->dma_coherent = dma_coherent;
535         acb->dma_coherent_handle = dma_coherent_handle;
536         memset(dma_coherent, 0, acb->uncache_size);
537         ccb_tmp = dma_coherent;
538         acb->vir2phy_offset = (unsigned long)dma_coherent - (unsigned long)dma_coherent_handle;
539         for(i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++){
540                 cdb_phyaddr = dma_coherent_handle + offsetof(struct CommandControlBlock, arcmsr_cdb);
541                 switch (acb->adapter_type) {
542                 case ACB_ADAPTER_TYPE_A:
543                 case ACB_ADAPTER_TYPE_B:
544                         ccb_tmp->cdb_phyaddr = cdb_phyaddr >> 5;
545                         break;
546                 case ACB_ADAPTER_TYPE_C:
547                 case ACB_ADAPTER_TYPE_D:
548                         ccb_tmp->cdb_phyaddr = cdb_phyaddr;
549                         break;
550                 }
551                 acb->pccb_pool[i] = ccb_tmp;
552                 ccb_tmp->acb = acb;
553                 INIT_LIST_HEAD(&ccb_tmp->list);
554                 list_add_tail(&ccb_tmp->list, &acb->ccb_free_list);
555                 ccb_tmp = (struct CommandControlBlock *)((unsigned long)ccb_tmp + roundup_ccbsize);
556                 dma_coherent_handle = dma_coherent_handle + roundup_ccbsize;
557         }
558         return 0;
559 }
560 
561 static void arcmsr_message_isr_bh_fn(struct work_struct *work) 
562 {
563         struct AdapterControlBlock *acb = container_of(work,
564                 struct AdapterControlBlock, arcmsr_do_message_isr_bh);
565         char *acb_dev_map = (char *)acb->device_map;
566         uint32_t __iomem *signature = NULL;
567         char __iomem *devicemap = NULL;
568         int target, lun;
569         struct scsi_device *psdev;
570         char diff, temp;
571 
572         switch (acb->adapter_type) {
573         case ACB_ADAPTER_TYPE_A: {
574                 struct MessageUnit_A __iomem *reg  = acb->pmuA;
575 
576                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
577                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
578                 break;
579         }
580         case ACB_ADAPTER_TYPE_B: {
581                 struct MessageUnit_B *reg  = acb->pmuB;
582 
583                 signature = (uint32_t __iomem *)(&reg->message_rwbuffer[0]);
584                 devicemap = (char __iomem *)(&reg->message_rwbuffer[21]);
585                 break;
586         }
587         case ACB_ADAPTER_TYPE_C: {
588                 struct MessageUnit_C __iomem *reg  = acb->pmuC;
589 
590                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
591                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
592                 break;
593         }
594         case ACB_ADAPTER_TYPE_D: {
595                 struct MessageUnit_D *reg  = acb->pmuD;
596 
597                 signature = (uint32_t __iomem *)(&reg->msgcode_rwbuffer[0]);
598                 devicemap = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
599                 break;
600         }
601         }
602         atomic_inc(&acb->rq_map_token);
603         if (readl(signature) != ARCMSR_SIGNATURE_GET_CONFIG)
604                 return;
605         for (target = 0; target < ARCMSR_MAX_TARGETID - 1;
606                 target++) {
607                 temp = readb(devicemap);
608                 diff = (*acb_dev_map) ^ temp;
609                 if (diff != 0) {
610                         *acb_dev_map = temp;
611                         for (lun = 0; lun < ARCMSR_MAX_TARGETLUN;
612                                 lun++) {
613                                 if ((diff & 0x01) == 1 &&
614                                         (temp & 0x01) == 1) {
615                                         scsi_add_device(acb->host,
616                                                 0, target, lun);
617                                 } else if ((diff & 0x01) == 1
618                                         && (temp & 0x01) == 0) {
619                                         psdev = scsi_device_lookup(acb->host,
620                                                 0, target, lun);
621                                         if (psdev != NULL) {
622                                                 scsi_remove_device(psdev);
623                                                 scsi_device_put(psdev);
624                                         }
625                                 }
626                                 temp >>= 1;
627                                 diff >>= 1;
628                         }
629                 }
630                 devicemap++;
631                 acb_dev_map++;
632         }
633 }
634 
635 static int
636 arcmsr_request_irq(struct pci_dev *pdev, struct AdapterControlBlock *acb)
637 {
638         int     i, j, r;
639         struct msix_entry entries[ARCMST_NUM_MSIX_VECTORS];
640 
641         for (i = 0; i < ARCMST_NUM_MSIX_VECTORS; i++)
642                 entries[i].entry = i;
643         r = pci_enable_msix_range(pdev, entries, 1, ARCMST_NUM_MSIX_VECTORS);
644         if (r < 0)
645                 goto msi_int;
646         acb->msix_vector_count = r;
647         for (i = 0; i < r; i++) {
648                 if (request_irq(entries[i].vector,
649                         arcmsr_do_interrupt, 0, "arcmsr", acb)) {
650                         pr_warn("arcmsr%d: request_irq =%d failed!\n",
651                                 acb->host->host_no, entries[i].vector);
652                         for (j = 0 ; j < i ; j++)
653                                 free_irq(entries[j].vector, acb);
654                         pci_disable_msix(pdev);
655                         goto msi_int;
656                 }
657                 acb->entries[i] = entries[i];
658         }
659         acb->acb_flags |= ACB_F_MSIX_ENABLED;
660         pr_info("arcmsr%d: msi-x enabled\n", acb->host->host_no);
661         return SUCCESS;
662 msi_int:
663         if (pci_enable_msi_exact(pdev, 1) < 0)
664                 goto legacy_int;
665         if (request_irq(pdev->irq, arcmsr_do_interrupt,
666                 IRQF_SHARED, "arcmsr", acb)) {
667                 pr_warn("arcmsr%d: request_irq =%d failed!\n",
668                         acb->host->host_no, pdev->irq);
669                 pci_disable_msi(pdev);
670                 goto legacy_int;
671         }
672         acb->acb_flags |= ACB_F_MSI_ENABLED;
673         pr_info("arcmsr%d: msi enabled\n", acb->host->host_no);
674         return SUCCESS;
675 legacy_int:
676         if (request_irq(pdev->irq, arcmsr_do_interrupt,
677                 IRQF_SHARED, "arcmsr", acb)) {
678                 pr_warn("arcmsr%d: request_irq = %d failed!\n",
679                         acb->host->host_no, pdev->irq);
680                 return FAILED;
681         }
682         return SUCCESS;
683 }
684 
685 static int arcmsr_probe(struct pci_dev *pdev, const struct pci_device_id *id)
686 {
687         struct Scsi_Host *host;
688         struct AdapterControlBlock *acb;
689         uint8_t bus,dev_fun;
690         int error;
691         error = pci_enable_device(pdev);
692         if(error){
693                 return -ENODEV;
694         }
695         host = scsi_host_alloc(&arcmsr_scsi_host_template, sizeof(struct AdapterControlBlock));
696         if(!host){
697                 goto pci_disable_dev;
698         }
699         error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
700         if(error){
701                 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
702                 if(error){
703                         printk(KERN_WARNING
704                                "scsi%d: No suitable DMA mask available\n",
705                                host->host_no);
706                         goto scsi_host_release;
707                 }
708         }
709         init_waitqueue_head(&wait_q);
710         bus = pdev->bus->number;
711         dev_fun = pdev->devfn;
712         acb = (struct AdapterControlBlock *) host->hostdata;
713         memset(acb,0,sizeof(struct AdapterControlBlock));
714         acb->pdev = pdev;
715         acb->host = host;
716         host->max_lun = ARCMSR_MAX_TARGETLUN;
717         host->max_id = ARCMSR_MAX_TARGETID;             /*16:8*/
718         host->max_cmd_len = 16;                         /*this is issue of 64bit LBA ,over 2T byte*/
719         host->can_queue = ARCMSR_MAX_OUTSTANDING_CMD;
720         host->cmd_per_lun = ARCMSR_MAX_CMD_PERLUN;          
721         host->this_id = ARCMSR_SCSI_INITIATOR_ID;
722         host->unique_id = (bus << 8) | dev_fun;
723         pci_set_drvdata(pdev, host);
724         pci_set_master(pdev);
725         error = pci_request_regions(pdev, "arcmsr");
726         if(error){
727                 goto scsi_host_release;
728         }
729         spin_lock_init(&acb->eh_lock);
730         spin_lock_init(&acb->ccblist_lock);
731         spin_lock_init(&acb->postq_lock);
732         spin_lock_init(&acb->doneq_lock);
733         spin_lock_init(&acb->rqbuffer_lock);
734         spin_lock_init(&acb->wqbuffer_lock);
735         acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
736                         ACB_F_MESSAGE_RQBUFFER_CLEARED |
737                         ACB_F_MESSAGE_WQBUFFER_READED);
738         acb->acb_flags &= ~ACB_F_SCSISTOPADAPTER;
739         INIT_LIST_HEAD(&acb->ccb_free_list);
740         acb->adapter_type = id->driver_data;
741         error = arcmsr_remap_pciregion(acb);
742         if(!error){
743                 goto pci_release_regs;
744         }
745         error = arcmsr_get_firmware_spec(acb);
746         if(!error){
747                 goto unmap_pci_region;
748         }
749         error = arcmsr_alloc_ccb_pool(acb);
750         if(error){
751                 goto free_hbb_mu;
752         }
753         error = scsi_add_host(host, &pdev->dev);
754         if(error){
755                 goto free_ccb_pool;
756         }
757         if (arcmsr_request_irq(pdev, acb) == FAILED)
758                 goto scsi_host_remove;
759         arcmsr_iop_init(acb);
760         INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
761         atomic_set(&acb->rq_map_token, 16);
762         atomic_set(&acb->ante_token_value, 16);
763         acb->fw_flag = FW_NORMAL;
764         init_timer(&acb->eternal_timer);
765         acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
766         acb->eternal_timer.data = (unsigned long) acb;
767         acb->eternal_timer.function = &arcmsr_request_device_map;
768         add_timer(&acb->eternal_timer);
769         if(arcmsr_alloc_sysfs_attr(acb))
770                 goto out_free_sysfs;
771         scsi_scan_host(host);
772         return 0;
773 out_free_sysfs:
774         del_timer_sync(&acb->eternal_timer);
775         flush_work(&acb->arcmsr_do_message_isr_bh);
776         arcmsr_stop_adapter_bgrb(acb);
777         arcmsr_flush_adapter_cache(acb);
778         arcmsr_free_irq(pdev, acb);
779 scsi_host_remove:
780         scsi_remove_host(host);
781 free_ccb_pool:
782         arcmsr_free_ccb_pool(acb);
783 free_hbb_mu:
784         arcmsr_free_mu(acb);
785 unmap_pci_region:
786         arcmsr_unmap_pciregion(acb);
787 pci_release_regs:
788         pci_release_regions(pdev);
789 scsi_host_release:
790         scsi_host_put(host);
791 pci_disable_dev:
792         pci_disable_device(pdev);
793         return -ENODEV;
794 }
795 
796 static void arcmsr_free_irq(struct pci_dev *pdev,
797                 struct AdapterControlBlock *acb)
798 {
799         int i;
800 
801         if (acb->acb_flags & ACB_F_MSI_ENABLED) {
802                 free_irq(pdev->irq, acb);
803                 pci_disable_msi(pdev);
804         } else if (acb->acb_flags & ACB_F_MSIX_ENABLED) {
805                 for (i = 0; i < acb->msix_vector_count; i++)
806                         free_irq(acb->entries[i].vector, acb);
807                 pci_disable_msix(pdev);
808         } else
809                 free_irq(pdev->irq, acb);
810 }
811 
812 static int arcmsr_suspend(struct pci_dev *pdev, pm_message_t state)
813 {
814         uint32_t intmask_org;
815         struct Scsi_Host *host = pci_get_drvdata(pdev);
816         struct AdapterControlBlock *acb =
817                 (struct AdapterControlBlock *)host->hostdata;
818 
819         intmask_org = arcmsr_disable_outbound_ints(acb);
820         arcmsr_free_irq(pdev, acb);
821         del_timer_sync(&acb->eternal_timer);
822         flush_work(&acb->arcmsr_do_message_isr_bh);
823         arcmsr_stop_adapter_bgrb(acb);
824         arcmsr_flush_adapter_cache(acb);
825         pci_set_drvdata(pdev, host);
826         pci_save_state(pdev);
827         pci_disable_device(pdev);
828         pci_set_power_state(pdev, pci_choose_state(pdev, state));
829         return 0;
830 }
831 
832 static int arcmsr_resume(struct pci_dev *pdev)
833 {
834         int error;
835         struct Scsi_Host *host = pci_get_drvdata(pdev);
836         struct AdapterControlBlock *acb =
837                 (struct AdapterControlBlock *)host->hostdata;
838 
839         pci_set_power_state(pdev, PCI_D0);
840         pci_enable_wake(pdev, PCI_D0, 0);
841         pci_restore_state(pdev);
842         if (pci_enable_device(pdev)) {
843                 pr_warn("%s: pci_enable_device error\n", __func__);
844                 return -ENODEV;
845         }
846         error = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
847         if (error) {
848                 error = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
849                 if (error) {
850                         pr_warn("scsi%d: No suitable DMA mask available\n",
851                                host->host_no);
852                         goto controller_unregister;
853                 }
854         }
855         pci_set_master(pdev);
856         if (arcmsr_request_irq(pdev, acb) == FAILED)
857                 goto controller_stop;
858         arcmsr_iop_init(acb);
859         INIT_WORK(&acb->arcmsr_do_message_isr_bh, arcmsr_message_isr_bh_fn);
860         atomic_set(&acb->rq_map_token, 16);
861         atomic_set(&acb->ante_token_value, 16);
862         acb->fw_flag = FW_NORMAL;
863         init_timer(&acb->eternal_timer);
864         acb->eternal_timer.expires = jiffies + msecs_to_jiffies(6 * HZ);
865         acb->eternal_timer.data = (unsigned long) acb;
866         acb->eternal_timer.function = &arcmsr_request_device_map;
867         add_timer(&acb->eternal_timer);
868         return 0;
869 controller_stop:
870         arcmsr_stop_adapter_bgrb(acb);
871         arcmsr_flush_adapter_cache(acb);
872 controller_unregister:
873         scsi_remove_host(host);
874         arcmsr_free_ccb_pool(acb);
875         arcmsr_unmap_pciregion(acb);
876         pci_release_regions(pdev);
877         scsi_host_put(host);
878         pci_disable_device(pdev);
879         return -ENODEV;
880 }
881 
882 static uint8_t arcmsr_hbaA_abort_allcmd(struct AdapterControlBlock *acb)
883 {
884         struct MessageUnit_A __iomem *reg = acb->pmuA;
885         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
886         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
887                 printk(KERN_NOTICE
888                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
889                         , acb->host->host_no);
890                 return false;
891         }
892         return true;
893 }
894 
895 static uint8_t arcmsr_hbaB_abort_allcmd(struct AdapterControlBlock *acb)
896 {
897         struct MessageUnit_B *reg = acb->pmuB;
898 
899         writel(ARCMSR_MESSAGE_ABORT_CMD, reg->drv2iop_doorbell);
900         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
901                 printk(KERN_NOTICE
902                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
903                         , acb->host->host_no);
904                 return false;
905         }
906         return true;
907 }
908 static uint8_t arcmsr_hbaC_abort_allcmd(struct AdapterControlBlock *pACB)
909 {
910         struct MessageUnit_C __iomem *reg = pACB->pmuC;
911         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, &reg->inbound_msgaddr0);
912         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
913         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
914                 printk(KERN_NOTICE
915                         "arcmsr%d: wait 'abort all outstanding command' timeout\n"
916                         , pACB->host->host_no);
917                 return false;
918         }
919         return true;
920 }
921 
922 static uint8_t arcmsr_hbaD_abort_allcmd(struct AdapterControlBlock *pACB)
923 {
924         struct MessageUnit_D *reg = pACB->pmuD;
925 
926         writel(ARCMSR_INBOUND_MESG0_ABORT_CMD, reg->inbound_msgaddr0);
927         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
928                 pr_notice("arcmsr%d: wait 'abort all outstanding "
929                         "command' timeout\n", pACB->host->host_no);
930                 return false;
931         }
932         return true;
933 }
934 
935 static uint8_t arcmsr_abort_allcmd(struct AdapterControlBlock *acb)
936 {
937         uint8_t rtnval = 0;
938         switch (acb->adapter_type) {
939         case ACB_ADAPTER_TYPE_A: {
940                 rtnval = arcmsr_hbaA_abort_allcmd(acb);
941                 }
942                 break;
943 
944         case ACB_ADAPTER_TYPE_B: {
945                 rtnval = arcmsr_hbaB_abort_allcmd(acb);
946                 }
947                 break;
948 
949         case ACB_ADAPTER_TYPE_C: {
950                 rtnval = arcmsr_hbaC_abort_allcmd(acb);
951                 }
952                 break;
953 
954         case ACB_ADAPTER_TYPE_D:
955                 rtnval = arcmsr_hbaD_abort_allcmd(acb);
956                 break;
957         }
958         return rtnval;
959 }
960 
961 static void arcmsr_pci_unmap_dma(struct CommandControlBlock *ccb)
962 {
963         struct scsi_cmnd *pcmd = ccb->pcmd;
964 
965         scsi_dma_unmap(pcmd);
966 }
967 
968 static void arcmsr_ccb_complete(struct CommandControlBlock *ccb)
969 {
970         struct AdapterControlBlock *acb = ccb->acb;
971         struct scsi_cmnd *pcmd = ccb->pcmd;
972         unsigned long flags;
973         atomic_dec(&acb->ccboutstandingcount);
974         arcmsr_pci_unmap_dma(ccb);
975         ccb->startdone = ARCMSR_CCB_DONE;
976         spin_lock_irqsave(&acb->ccblist_lock, flags);
977         list_add_tail(&ccb->list, &acb->ccb_free_list);
978         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
979         pcmd->scsi_done(pcmd);
980 }
981 
982 static void arcmsr_report_sense_info(struct CommandControlBlock *ccb)
983 {
984 
985         struct scsi_cmnd *pcmd = ccb->pcmd;
986         struct SENSE_DATA *sensebuffer = (struct SENSE_DATA *)pcmd->sense_buffer;
987         pcmd->result = DID_OK << 16;
988         if (sensebuffer) {
989                 int sense_data_length =
990                         sizeof(struct SENSE_DATA) < SCSI_SENSE_BUFFERSIZE
991                         ? sizeof(struct SENSE_DATA) : SCSI_SENSE_BUFFERSIZE;
992                 memset(sensebuffer, 0, SCSI_SENSE_BUFFERSIZE);
993                 memcpy(sensebuffer, ccb->arcmsr_cdb.SenseData, sense_data_length);
994                 sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
995                 sensebuffer->Valid = 1;
996         }
997 }
998 
999 static u32 arcmsr_disable_outbound_ints(struct AdapterControlBlock *acb)
1000 {
1001         u32 orig_mask = 0;
1002         switch (acb->adapter_type) {    
1003         case ACB_ADAPTER_TYPE_A : {
1004                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1005                 orig_mask = readl(&reg->outbound_intmask);
1006                 writel(orig_mask|ARCMSR_MU_OUTBOUND_ALL_INTMASKENABLE, \
1007                                                 &reg->outbound_intmask);
1008                 }
1009                 break;
1010         case ACB_ADAPTER_TYPE_B : {
1011                 struct MessageUnit_B *reg = acb->pmuB;
1012                 orig_mask = readl(reg->iop2drv_doorbell_mask);
1013                 writel(0, reg->iop2drv_doorbell_mask);
1014                 }
1015                 break;
1016         case ACB_ADAPTER_TYPE_C:{
1017                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1018                 /* disable all outbound interrupt */
1019                 orig_mask = readl(&reg->host_int_mask); /* disable outbound message0 int */
1020                 writel(orig_mask|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
1021                 }
1022                 break;
1023         case ACB_ADAPTER_TYPE_D: {
1024                 struct MessageUnit_D *reg = acb->pmuD;
1025                 /* disable all outbound interrupt */
1026                 writel(ARCMSR_ARC1214_ALL_INT_DISABLE, reg->pcief0_int_enable);
1027                 }
1028                 break;
1029         }
1030         return orig_mask;
1031 }
1032 
1033 static void arcmsr_report_ccb_state(struct AdapterControlBlock *acb, 
1034                         struct CommandControlBlock *ccb, bool error)
1035 {
1036         uint8_t id, lun;
1037         id = ccb->pcmd->device->id;
1038         lun = ccb->pcmd->device->lun;
1039         if (!error) {
1040                 if (acb->devstate[id][lun] == ARECA_RAID_GONE)
1041                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1042                 ccb->pcmd->result = DID_OK << 16;
1043                 arcmsr_ccb_complete(ccb);
1044         }else{
1045                 switch (ccb->arcmsr_cdb.DeviceStatus) {
1046                 case ARCMSR_DEV_SELECT_TIMEOUT: {
1047                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1048                         ccb->pcmd->result = DID_NO_CONNECT << 16;
1049                         arcmsr_ccb_complete(ccb);
1050                         }
1051                         break;
1052 
1053                 case ARCMSR_DEV_ABORTED:
1054 
1055                 case ARCMSR_DEV_INIT_FAIL: {
1056                         acb->devstate[id][lun] = ARECA_RAID_GONE;
1057                         ccb->pcmd->result = DID_BAD_TARGET << 16;
1058                         arcmsr_ccb_complete(ccb);
1059                         }
1060                         break;
1061 
1062                 case ARCMSR_DEV_CHECK_CONDITION: {
1063                         acb->devstate[id][lun] = ARECA_RAID_GOOD;
1064                         arcmsr_report_sense_info(ccb);
1065                         arcmsr_ccb_complete(ccb);
1066                         }
1067                         break;
1068 
1069                 default:
1070                         printk(KERN_NOTICE
1071                                 "arcmsr%d: scsi id = %d lun = %d isr get command error done, \
1072                                 but got unknown DeviceStatus = 0x%x \n"
1073                                 , acb->host->host_no
1074                                 , id
1075                                 , lun
1076                                 , ccb->arcmsr_cdb.DeviceStatus);
1077                                 acb->devstate[id][lun] = ARECA_RAID_GONE;
1078                                 ccb->pcmd->result = DID_NO_CONNECT << 16;
1079                                 arcmsr_ccb_complete(ccb);
1080                         break;
1081                 }
1082         }
1083 }
1084 
1085 static void arcmsr_drain_donequeue(struct AdapterControlBlock *acb, struct CommandControlBlock *pCCB, bool error)
1086 {
1087         int id, lun;
1088         if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
1089                 if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
1090                         struct scsi_cmnd *abortcmd = pCCB->pcmd;
1091                         if (abortcmd) {
1092                                 id = abortcmd->device->id;
1093                                 lun = abortcmd->device->lun;                            
1094                                 abortcmd->result |= DID_ABORT << 16;
1095                                 arcmsr_ccb_complete(pCCB);
1096                                 printk(KERN_NOTICE "arcmsr%d: pCCB ='0x%p' isr got aborted command \n",
1097                                 acb->host->host_no, pCCB);
1098                         }
1099                         return;
1100                 }
1101                 printk(KERN_NOTICE "arcmsr%d: isr get an illegal ccb command \
1102                                 done acb = '0x%p'"
1103                                 "ccb = '0x%p' ccbacb = '0x%p' startdone = 0x%x"
1104                                 " ccboutstandingcount = %d \n"
1105                                 , acb->host->host_no
1106                                 , acb
1107                                 , pCCB
1108                                 , pCCB->acb
1109                                 , pCCB->startdone
1110                                 , atomic_read(&acb->ccboutstandingcount));
1111                   return;
1112         }
1113         arcmsr_report_ccb_state(acb, pCCB, error);
1114 }
1115 
1116 static void arcmsr_done4abort_postqueue(struct AdapterControlBlock *acb)
1117 {
1118         int i = 0;
1119         uint32_t flag_ccb, ccb_cdb_phy;
1120         struct ARCMSR_CDB *pARCMSR_CDB;
1121         bool error;
1122         struct CommandControlBlock *pCCB;
1123         switch (acb->adapter_type) {
1124 
1125         case ACB_ADAPTER_TYPE_A: {
1126                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1127                 uint32_t outbound_intstatus;
1128                 outbound_intstatus = readl(&reg->outbound_intstatus) &
1129                                         acb->outbound_int_enable;
1130                 /*clear and abort all outbound posted Q*/
1131                 writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
1132                 while(((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF)
1133                                 && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
1134                         pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1135                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1136                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1137                         arcmsr_drain_donequeue(acb, pCCB, error);
1138                 }
1139                 }
1140                 break;
1141 
1142         case ACB_ADAPTER_TYPE_B: {
1143                 struct MessageUnit_B *reg = acb->pmuB;
1144                 /*clear all outbound posted Q*/
1145                 writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell); /* clear doorbell interrupt */
1146                 for (i = 0; i < ARCMSR_MAX_HBB_POSTQUEUE; i++) {
1147                         flag_ccb = reg->done_qbuffer[i];
1148                         if (flag_ccb != 0) {
1149                                 reg->done_qbuffer[i] = 0;
1150                                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1151                                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1152                                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1153                                 arcmsr_drain_donequeue(acb, pCCB, error);
1154                         }
1155                         reg->post_qbuffer[i] = 0;
1156                 }
1157                 reg->doneq_index = 0;
1158                 reg->postq_index = 0;
1159                 }
1160                 break;
1161         case ACB_ADAPTER_TYPE_C: {
1162                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1163                 while ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {
1164                         /*need to do*/
1165                         flag_ccb = readl(&reg->outbound_queueport_low);
1166                         ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1167                         pARCMSR_CDB = (struct  ARCMSR_CDB *)(acb->vir2phy_offset+ccb_cdb_phy);/*frame must be 32 bytes aligned*/
1168                         pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1169                         error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
1170                         arcmsr_drain_donequeue(acb, pCCB, error);
1171                 }
1172                 }
1173                 break;
1174         case ACB_ADAPTER_TYPE_D: {
1175                 struct MessageUnit_D  *pmu = acb->pmuD;
1176                 uint32_t outbound_write_pointer;
1177                 uint32_t doneq_index, index_stripped, addressLow, residual, toggle;
1178                 unsigned long flags;
1179 
1180                 residual = atomic_read(&acb->ccboutstandingcount);
1181                 for (i = 0; i < residual; i++) {
1182                         spin_lock_irqsave(&acb->doneq_lock, flags);
1183                         outbound_write_pointer =
1184                                 pmu->done_qbuffer[0].addressLow + 1;
1185                         doneq_index = pmu->doneq_index;
1186                         if ((doneq_index & 0xFFF) !=
1187                                 (outbound_write_pointer & 0xFFF)) {
1188                                 toggle = doneq_index & 0x4000;
1189                                 index_stripped = (doneq_index & 0xFFF) + 1;
1190                                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1191                                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1192                                         ((toggle ^ 0x4000) + 1);
1193                                 doneq_index = pmu->doneq_index;
1194                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1195                                 addressLow = pmu->done_qbuffer[doneq_index &
1196                                         0xFFF].addressLow;
1197                                 ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1198                                 pARCMSR_CDB = (struct  ARCMSR_CDB *)
1199                                         (acb->vir2phy_offset + ccb_cdb_phy);
1200                                 pCCB = container_of(pARCMSR_CDB,
1201                                         struct CommandControlBlock, arcmsr_cdb);
1202                                 error = (addressLow &
1203                                         ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ?
1204                                         true : false;
1205                                 arcmsr_drain_donequeue(acb, pCCB, error);
1206                                 writel(doneq_index,
1207                                         pmu->outboundlist_read_pointer);
1208                         } else {
1209                                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
1210                                 mdelay(10);
1211                         }
1212                 }
1213                 pmu->postq_index = 0;
1214                 pmu->doneq_index = 0x40FF;
1215                 }
1216                 break;
1217         }
1218 }
1219 
1220 static void arcmsr_remove(struct pci_dev *pdev)
1221 {
1222         struct Scsi_Host *host = pci_get_drvdata(pdev);
1223         struct AdapterControlBlock *acb =
1224                 (struct AdapterControlBlock *) host->hostdata;
1225         int poll_count = 0;
1226         arcmsr_free_sysfs_attr(acb);
1227         scsi_remove_host(host);
1228         flush_work(&acb->arcmsr_do_message_isr_bh);
1229         del_timer_sync(&acb->eternal_timer);
1230         arcmsr_disable_outbound_ints(acb);
1231         arcmsr_stop_adapter_bgrb(acb);
1232         arcmsr_flush_adapter_cache(acb);        
1233         acb->acb_flags |= ACB_F_SCSISTOPADAPTER;
1234         acb->acb_flags &= ~ACB_F_IOP_INITED;
1235 
1236         for (poll_count = 0; poll_count < ARCMSR_MAX_OUTSTANDING_CMD; poll_count++){
1237                 if (!atomic_read(&acb->ccboutstandingcount))
1238                         break;
1239                 arcmsr_interrupt(acb);/* FIXME: need spinlock */
1240                 msleep(25);
1241         }
1242 
1243         if (atomic_read(&acb->ccboutstandingcount)) {
1244                 int i;
1245 
1246                 arcmsr_abort_allcmd(acb);
1247                 arcmsr_done4abort_postqueue(acb);
1248                 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
1249                         struct CommandControlBlock *ccb = acb->pccb_pool[i];
1250                         if (ccb->startdone == ARCMSR_CCB_START) {
1251                                 ccb->startdone = ARCMSR_CCB_ABORTED;
1252                                 ccb->pcmd->result = DID_ABORT << 16;
1253                                 arcmsr_ccb_complete(ccb);
1254                         }
1255                 }
1256         }
1257         arcmsr_free_irq(pdev, acb);
1258         arcmsr_free_ccb_pool(acb);
1259         arcmsr_free_mu(acb);
1260         arcmsr_unmap_pciregion(acb);
1261         pci_release_regions(pdev);
1262         scsi_host_put(host);
1263         pci_disable_device(pdev);
1264 }
1265 
1266 static void arcmsr_shutdown(struct pci_dev *pdev)
1267 {
1268         struct Scsi_Host *host = pci_get_drvdata(pdev);
1269         struct AdapterControlBlock *acb =
1270                 (struct AdapterControlBlock *)host->hostdata;
1271         del_timer_sync(&acb->eternal_timer);
1272         arcmsr_disable_outbound_ints(acb);
1273         arcmsr_free_irq(pdev, acb);
1274         flush_work(&acb->arcmsr_do_message_isr_bh);
1275         arcmsr_stop_adapter_bgrb(acb);
1276         arcmsr_flush_adapter_cache(acb);
1277 }
1278 
1279 static int arcmsr_module_init(void)
1280 {
1281         int error = 0;
1282         error = pci_register_driver(&arcmsr_pci_driver);
1283         return error;
1284 }
1285 
1286 static void arcmsr_module_exit(void)
1287 {
1288         pci_unregister_driver(&arcmsr_pci_driver);
1289 }
1290 module_init(arcmsr_module_init);
1291 module_exit(arcmsr_module_exit);
1292 
1293 static void arcmsr_enable_outbound_ints(struct AdapterControlBlock *acb,
1294                                                 u32 intmask_org)
1295 {
1296         u32 mask;
1297         switch (acb->adapter_type) {
1298 
1299         case ACB_ADAPTER_TYPE_A: {
1300                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1301                 mask = intmask_org & ~(ARCMSR_MU_OUTBOUND_POSTQUEUE_INTMASKENABLE |
1302                              ARCMSR_MU_OUTBOUND_DOORBELL_INTMASKENABLE|
1303                              ARCMSR_MU_OUTBOUND_MESSAGE0_INTMASKENABLE);
1304                 writel(mask, &reg->outbound_intmask);
1305                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x000000ff;
1306                 }
1307                 break;
1308 
1309         case ACB_ADAPTER_TYPE_B: {
1310                 struct MessageUnit_B *reg = acb->pmuB;
1311                 mask = intmask_org | (ARCMSR_IOP2DRV_DATA_WRITE_OK |
1312                         ARCMSR_IOP2DRV_DATA_READ_OK |
1313                         ARCMSR_IOP2DRV_CDB_DONE |
1314                         ARCMSR_IOP2DRV_MESSAGE_CMD_DONE);
1315                 writel(mask, reg->iop2drv_doorbell_mask);
1316                 acb->outbound_int_enable = (intmask_org | mask) & 0x0000000f;
1317                 }
1318                 break;
1319         case ACB_ADAPTER_TYPE_C: {
1320                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1321                 mask = ~(ARCMSR_HBCMU_UTILITY_A_ISR_MASK | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR_MASK|ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR_MASK);
1322                 writel(intmask_org & mask, &reg->host_int_mask);
1323                 acb->outbound_int_enable = ~(intmask_org & mask) & 0x0000000f;
1324                 }
1325                 break;
1326         case ACB_ADAPTER_TYPE_D: {
1327                 struct MessageUnit_D *reg = acb->pmuD;
1328 
1329                 mask = ARCMSR_ARC1214_ALL_INT_ENABLE;
1330                 writel(intmask_org | mask, reg->pcief0_int_enable);
1331                 break;
1332                 }
1333         }
1334 }
1335 
1336 static int arcmsr_build_ccb(struct AdapterControlBlock *acb,
1337         struct CommandControlBlock *ccb, struct scsi_cmnd *pcmd)
1338 {
1339         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1340         int8_t *psge = (int8_t *)&arcmsr_cdb->u;
1341         __le32 address_lo, address_hi;
1342         int arccdbsize = 0x30;
1343         __le32 length = 0;
1344         int i;
1345         struct scatterlist *sg;
1346         int nseg;
1347         ccb->pcmd = pcmd;
1348         memset(arcmsr_cdb, 0, sizeof(struct ARCMSR_CDB));
1349         arcmsr_cdb->TargetID = pcmd->device->id;
1350         arcmsr_cdb->LUN = pcmd->device->lun;
1351         arcmsr_cdb->Function = 1;
1352         arcmsr_cdb->msgContext = 0;
1353         memcpy(arcmsr_cdb->Cdb, pcmd->cmnd, pcmd->cmd_len);
1354 
1355         nseg = scsi_dma_map(pcmd);
1356         if (unlikely(nseg > acb->host->sg_tablesize || nseg < 0))
1357                 return FAILED;
1358         scsi_for_each_sg(pcmd, sg, nseg, i) {
1359                 /* Get the physical address of the current data pointer */
1360                 length = cpu_to_le32(sg_dma_len(sg));
1361                 address_lo = cpu_to_le32(dma_addr_lo32(sg_dma_address(sg)));
1362                 address_hi = cpu_to_le32(dma_addr_hi32(sg_dma_address(sg)));
1363                 if (address_hi == 0) {
1364                         struct SG32ENTRY *pdma_sg = (struct SG32ENTRY *)psge;
1365 
1366                         pdma_sg->address = address_lo;
1367                         pdma_sg->length = length;
1368                         psge += sizeof (struct SG32ENTRY);
1369                         arccdbsize += sizeof (struct SG32ENTRY);
1370                 } else {
1371                         struct SG64ENTRY *pdma_sg = (struct SG64ENTRY *)psge;
1372 
1373                         pdma_sg->addresshigh = address_hi;
1374                         pdma_sg->address = address_lo;
1375                         pdma_sg->length = length|cpu_to_le32(IS_SG64_ADDR);
1376                         psge += sizeof (struct SG64ENTRY);
1377                         arccdbsize += sizeof (struct SG64ENTRY);
1378                 }
1379         }
1380         arcmsr_cdb->sgcount = (uint8_t)nseg;
1381         arcmsr_cdb->DataLength = scsi_bufflen(pcmd);
1382         arcmsr_cdb->msgPages = arccdbsize/0x100 + (arccdbsize % 0x100 ? 1 : 0);
1383         if ( arccdbsize > 256)
1384                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_SGL_BSIZE;
1385         if (pcmd->sc_data_direction == DMA_TO_DEVICE)
1386                 arcmsr_cdb->Flags |= ARCMSR_CDB_FLAG_WRITE;
1387         ccb->arc_cdb_size = arccdbsize;
1388         return SUCCESS;
1389 }
1390 
1391 static void arcmsr_post_ccb(struct AdapterControlBlock *acb, struct CommandControlBlock *ccb)
1392 {
1393         uint32_t cdb_phyaddr = ccb->cdb_phyaddr;
1394         struct ARCMSR_CDB *arcmsr_cdb = (struct ARCMSR_CDB *)&ccb->arcmsr_cdb;
1395         atomic_inc(&acb->ccboutstandingcount);
1396         ccb->startdone = ARCMSR_CCB_START;
1397         switch (acb->adapter_type) {
1398         case ACB_ADAPTER_TYPE_A: {
1399                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1400 
1401                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE)
1402                         writel(cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE,
1403                         &reg->inbound_queueport);
1404                 else
1405                         writel(cdb_phyaddr, &reg->inbound_queueport);
1406                 break;
1407         }
1408 
1409         case ACB_ADAPTER_TYPE_B: {
1410                 struct MessageUnit_B *reg = acb->pmuB;
1411                 uint32_t ending_index, index = reg->postq_index;
1412 
1413                 ending_index = ((index + 1) % ARCMSR_MAX_HBB_POSTQUEUE);
1414                 reg->post_qbuffer[ending_index] = 0;
1415                 if (arcmsr_cdb->Flags & ARCMSR_CDB_FLAG_SGL_BSIZE) {
1416                         reg->post_qbuffer[index] =
1417                                 cdb_phyaddr | ARCMSR_CCBPOST_FLAG_SGL_BSIZE;
1418                 } else {
1419                         reg->post_qbuffer[index] = cdb_phyaddr;
1420                 }
1421                 index++;
1422                 index %= ARCMSR_MAX_HBB_POSTQUEUE;/*if last index number set it to 0 */
1423                 reg->postq_index = index;
1424                 writel(ARCMSR_DRV2IOP_CDB_POSTED, reg->drv2iop_doorbell);
1425                 }
1426                 break;
1427         case ACB_ADAPTER_TYPE_C: {
1428                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1429                 uint32_t ccb_post_stamp, arc_cdb_size;
1430 
1431                 arc_cdb_size = (ccb->arc_cdb_size > 0x300) ? 0x300 : ccb->arc_cdb_size;
1432                 ccb_post_stamp = (cdb_phyaddr | ((arc_cdb_size - 1) >> 6) | 1);
1433                 if (acb->cdb_phyaddr_hi32) {
1434                         writel(acb->cdb_phyaddr_hi32, &phbcmu->inbound_queueport_high);
1435                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1436                 } else {
1437                         writel(ccb_post_stamp, &phbcmu->inbound_queueport_low);
1438                 }
1439                 }
1440                 break;
1441         case ACB_ADAPTER_TYPE_D: {
1442                 struct MessageUnit_D  *pmu = acb->pmuD;
1443                 u16 index_stripped;
1444                 u16 postq_index, toggle;
1445                 unsigned long flags;
1446                 struct InBound_SRB *pinbound_srb;
1447 
1448                 spin_lock_irqsave(&acb->postq_lock, flags);
1449                 postq_index = pmu->postq_index;
1450                 pinbound_srb = (struct InBound_SRB *)&(pmu->post_qbuffer[postq_index & 0xFF]);
1451                 pinbound_srb->addressHigh = dma_addr_hi32(cdb_phyaddr);
1452                 pinbound_srb->addressLow = dma_addr_lo32(cdb_phyaddr);
1453                 pinbound_srb->length = ccb->arc_cdb_size >> 2;
1454                 arcmsr_cdb->msgContext = dma_addr_lo32(cdb_phyaddr);
1455                 toggle = postq_index & 0x4000;
1456                 index_stripped = postq_index + 1;
1457                 index_stripped &= (ARCMSR_MAX_ARC1214_POSTQUEUE - 1);
1458                 pmu->postq_index = index_stripped ? (index_stripped | toggle) :
1459                         (toggle ^ 0x4000);
1460                 writel(postq_index, pmu->inboundlist_write_pointer);
1461                 spin_unlock_irqrestore(&acb->postq_lock, flags);
1462                 break;
1463                 }
1464         }
1465 }
1466 
1467 static void arcmsr_hbaA_stop_bgrb(struct AdapterControlBlock *acb)
1468 {
1469         struct MessageUnit_A __iomem *reg = acb->pmuA;
1470         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1471         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1472         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
1473                 printk(KERN_NOTICE
1474                         "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
1475                         , acb->host->host_no);
1476         }
1477 }
1478 
1479 static void arcmsr_hbaB_stop_bgrb(struct AdapterControlBlock *acb)
1480 {
1481         struct MessageUnit_B *reg = acb->pmuB;
1482         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
1483         writel(ARCMSR_MESSAGE_STOP_BGRB, reg->drv2iop_doorbell);
1484 
1485         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
1486                 printk(KERN_NOTICE
1487                         "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
1488                         , acb->host->host_no);
1489         }
1490 }
1491 
1492 static void arcmsr_hbaC_stop_bgrb(struct AdapterControlBlock *pACB)
1493 {
1494         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1495         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1496         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, &reg->inbound_msgaddr0);
1497         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
1498         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
1499                 printk(KERN_NOTICE
1500                         "arcmsr%d: wait 'stop adapter background rebulid' timeout\n"
1501                         , pACB->host->host_no);
1502         }
1503         return;
1504 }
1505 
1506 static void arcmsr_hbaD_stop_bgrb(struct AdapterControlBlock *pACB)
1507 {
1508         struct MessageUnit_D *reg = pACB->pmuD;
1509 
1510         pACB->acb_flags &= ~ACB_F_MSG_START_BGRB;
1511         writel(ARCMSR_INBOUND_MESG0_STOP_BGRB, reg->inbound_msgaddr0);
1512         if (!arcmsr_hbaD_wait_msgint_ready(pACB))
1513                 pr_notice("arcmsr%d: wait 'stop adapter background rebulid' "
1514                         "timeout\n", pACB->host->host_no);
1515 }
1516 
1517 static void arcmsr_stop_adapter_bgrb(struct AdapterControlBlock *acb)
1518 {
1519         switch (acb->adapter_type) {
1520         case ACB_ADAPTER_TYPE_A: {
1521                 arcmsr_hbaA_stop_bgrb(acb);
1522                 }
1523                 break;
1524 
1525         case ACB_ADAPTER_TYPE_B: {
1526                 arcmsr_hbaB_stop_bgrb(acb);
1527                 }
1528                 break;
1529         case ACB_ADAPTER_TYPE_C: {
1530                 arcmsr_hbaC_stop_bgrb(acb);
1531                 }
1532                 break;
1533         case ACB_ADAPTER_TYPE_D:
1534                 arcmsr_hbaD_stop_bgrb(acb);
1535                 break;
1536         }
1537 }
1538 
1539 static void arcmsr_free_ccb_pool(struct AdapterControlBlock *acb)
1540 {
1541         dma_free_coherent(&acb->pdev->dev, acb->uncache_size, acb->dma_coherent, acb->dma_coherent_handle);
1542 }
1543 
1544 static void arcmsr_iop_message_read(struct AdapterControlBlock *acb)
1545 {
1546         switch (acb->adapter_type) {
1547         case ACB_ADAPTER_TYPE_A: {
1548                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1549                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
1550                 }
1551                 break;
1552 
1553         case ACB_ADAPTER_TYPE_B: {
1554                 struct MessageUnit_B *reg = acb->pmuB;
1555                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
1556                 }
1557                 break;
1558         case ACB_ADAPTER_TYPE_C: {
1559                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1560 
1561                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
1562                 }
1563                 break;
1564         case ACB_ADAPTER_TYPE_D: {
1565                 struct MessageUnit_D *reg = acb->pmuD;
1566                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
1567                         reg->inbound_doorbell);
1568                 }
1569                 break;
1570         }
1571 }
1572 
1573 static void arcmsr_iop_message_wrote(struct AdapterControlBlock *acb)
1574 {
1575         switch (acb->adapter_type) {
1576         case ACB_ADAPTER_TYPE_A: {
1577                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1578                 /*
1579                 ** push inbound doorbell tell iop, driver data write ok
1580                 ** and wait reply on next hwinterrupt for next Qbuffer post
1581                 */
1582                 writel(ARCMSR_INBOUND_DRIVER_DATA_WRITE_OK, &reg->inbound_doorbell);
1583                 }
1584                 break;
1585 
1586         case ACB_ADAPTER_TYPE_B: {
1587                 struct MessageUnit_B *reg = acb->pmuB;
1588                 /*
1589                 ** push inbound doorbell tell iop, driver data write ok
1590                 ** and wait reply on next hwinterrupt for next Qbuffer post
1591                 */
1592                 writel(ARCMSR_DRV2IOP_DATA_WRITE_OK, reg->drv2iop_doorbell);
1593                 }
1594                 break;
1595         case ACB_ADAPTER_TYPE_C: {
1596                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1597                 /*
1598                 ** push inbound doorbell tell iop, driver data write ok
1599                 ** and wait reply on next hwinterrupt for next Qbuffer post
1600                 */
1601                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_WRITE_OK, &reg->inbound_doorbell);
1602                 }
1603                 break;
1604         case ACB_ADAPTER_TYPE_D: {
1605                 struct MessageUnit_D *reg = acb->pmuD;
1606                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_IN_READY,
1607                         reg->inbound_doorbell);
1608                 }
1609                 break;
1610         }
1611 }
1612 
1613 struct QBUFFER __iomem *arcmsr_get_iop_rqbuffer(struct AdapterControlBlock *acb)
1614 {
1615         struct QBUFFER __iomem *qbuffer = NULL;
1616         switch (acb->adapter_type) {
1617 
1618         case ACB_ADAPTER_TYPE_A: {
1619                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1620                 qbuffer = (struct QBUFFER __iomem *)&reg->message_rbuffer;
1621                 }
1622                 break;
1623 
1624         case ACB_ADAPTER_TYPE_B: {
1625                 struct MessageUnit_B *reg = acb->pmuB;
1626                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1627                 }
1628                 break;
1629         case ACB_ADAPTER_TYPE_C: {
1630                 struct MessageUnit_C __iomem *phbcmu = acb->pmuC;
1631                 qbuffer = (struct QBUFFER __iomem *)&phbcmu->message_rbuffer;
1632                 }
1633                 break;
1634         case ACB_ADAPTER_TYPE_D: {
1635                 struct MessageUnit_D *reg = acb->pmuD;
1636                 qbuffer = (struct QBUFFER __iomem *)reg->message_rbuffer;
1637                 }
1638                 break;
1639         }
1640         return qbuffer;
1641 }
1642 
1643 static struct QBUFFER __iomem *arcmsr_get_iop_wqbuffer(struct AdapterControlBlock *acb)
1644 {
1645         struct QBUFFER __iomem *pqbuffer = NULL;
1646         switch (acb->adapter_type) {
1647 
1648         case ACB_ADAPTER_TYPE_A: {
1649                 struct MessageUnit_A __iomem *reg = acb->pmuA;
1650                 pqbuffer = (struct QBUFFER __iomem *) &reg->message_wbuffer;
1651                 }
1652                 break;
1653 
1654         case ACB_ADAPTER_TYPE_B: {
1655                 struct MessageUnit_B  *reg = acb->pmuB;
1656                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
1657                 }
1658                 break;
1659         case ACB_ADAPTER_TYPE_C: {
1660                 struct MessageUnit_C __iomem *reg = acb->pmuC;
1661                 pqbuffer = (struct QBUFFER __iomem *)&reg->message_wbuffer;
1662                 }
1663                 break;
1664         case ACB_ADAPTER_TYPE_D: {
1665                 struct MessageUnit_D *reg = acb->pmuD;
1666                 pqbuffer = (struct QBUFFER __iomem *)reg->message_wbuffer;
1667                 }
1668                 break;
1669         }
1670         return pqbuffer;
1671 }
1672 
1673 static uint32_t
1674 arcmsr_Read_iop_rqbuffer_in_DWORD(struct AdapterControlBlock *acb,
1675                 struct QBUFFER __iomem *prbuffer)
1676 {
1677         uint8_t *pQbuffer;
1678         uint8_t *buf1 = NULL;
1679         uint32_t __iomem *iop_data;
1680         uint32_t iop_len, data_len, *buf2 = NULL;
1681 
1682         iop_data = (uint32_t __iomem *)prbuffer->data;
1683         iop_len = readl(&prbuffer->data_len);
1684         if (iop_len > 0) {
1685                 buf1 = kmalloc(128, GFP_ATOMIC);
1686                 buf2 = (uint32_t *)buf1;
1687                 if (buf1 == NULL)
1688                         return 0;
1689                 data_len = iop_len;
1690                 while (data_len >= 4) {
1691                         *buf2++ = readl(iop_data);
1692                         iop_data++;
1693                         data_len -= 4;
1694                 }
1695                 if (data_len)
1696                         *buf2 = readl(iop_data);
1697                 buf2 = (uint32_t *)buf1;
1698         }
1699         while (iop_len > 0) {
1700                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
1701                 *pQbuffer = *buf1;
1702                 acb->rqbuf_putIndex++;
1703                 /* if last, index number set it to 0 */
1704                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
1705                 buf1++;
1706                 iop_len--;
1707         }
1708         kfree(buf2);
1709         /* let IOP know data has been read */
1710         arcmsr_iop_message_read(acb);
1711         return 1;
1712 }
1713 
1714 uint32_t
1715 arcmsr_Read_iop_rqbuffer_data(struct AdapterControlBlock *acb,
1716         struct QBUFFER __iomem *prbuffer) {
1717 
1718         uint8_t *pQbuffer;
1719         uint8_t __iomem *iop_data;
1720         uint32_t iop_len;
1721 
1722         if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D))
1723                 return arcmsr_Read_iop_rqbuffer_in_DWORD(acb, prbuffer);
1724         iop_data = (uint8_t __iomem *)prbuffer->data;
1725         iop_len = readl(&prbuffer->data_len);
1726         while (iop_len > 0) {
1727                 pQbuffer = &acb->rqbuffer[acb->rqbuf_putIndex];
1728                 *pQbuffer = readb(iop_data);
1729                 acb->rqbuf_putIndex++;
1730                 acb->rqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
1731                 iop_data++;
1732                 iop_len--;
1733         }
1734         arcmsr_iop_message_read(acb);
1735         return 1;
1736 }
1737 
1738 static void arcmsr_iop2drv_data_wrote_handle(struct AdapterControlBlock *acb)
1739 {
1740         unsigned long flags;
1741         struct QBUFFER __iomem  *prbuffer;
1742         int32_t buf_empty_len;
1743 
1744         spin_lock_irqsave(&acb->rqbuffer_lock, flags);
1745         prbuffer = arcmsr_get_iop_rqbuffer(acb);
1746         buf_empty_len = (acb->rqbuf_putIndex - acb->rqbuf_getIndex - 1) &
1747                 (ARCMSR_MAX_QBUFFER - 1);
1748         if (buf_empty_len >= readl(&prbuffer->data_len)) {
1749                 if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
1750                         acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1751         } else
1752                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
1753         spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
1754 }
1755 
1756 static void arcmsr_write_ioctldata2iop_in_DWORD(struct AdapterControlBlock *acb)
1757 {
1758         uint8_t *pQbuffer;
1759         struct QBUFFER __iomem *pwbuffer;
1760         uint8_t *buf1 = NULL;
1761         uint32_t __iomem *iop_data;
1762         uint32_t allxfer_len = 0, data_len, *buf2 = NULL, data;
1763 
1764         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1765                 buf1 = kmalloc(128, GFP_ATOMIC);
1766                 buf2 = (uint32_t *)buf1;
1767                 if (buf1 == NULL)
1768                         return;
1769 
1770                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1771                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1772                 iop_data = (uint32_t __iomem *)pwbuffer->data;
1773                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
1774                         && (allxfer_len < 124)) {
1775                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
1776                         *buf1 = *pQbuffer;
1777                         acb->wqbuf_getIndex++;
1778                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
1779                         buf1++;
1780                         allxfer_len++;
1781                 }
1782                 data_len = allxfer_len;
1783                 buf1 = (uint8_t *)buf2;
1784                 while (data_len >= 4) {
1785                         data = *buf2++;
1786                         writel(data, iop_data);
1787                         iop_data++;
1788                         data_len -= 4;
1789                 }
1790                 if (data_len) {
1791                         data = *buf2;
1792                         writel(data, iop_data);
1793                 }
1794                 writel(allxfer_len, &pwbuffer->data_len);
1795                 kfree(buf1);
1796                 arcmsr_iop_message_wrote(acb);
1797         }
1798 }
1799 
1800 void
1801 arcmsr_write_ioctldata2iop(struct AdapterControlBlock *acb)
1802 {
1803         uint8_t *pQbuffer;
1804         struct QBUFFER __iomem *pwbuffer;
1805         uint8_t __iomem *iop_data;
1806         int32_t allxfer_len = 0;
1807 
1808         if (acb->adapter_type & (ACB_ADAPTER_TYPE_C | ACB_ADAPTER_TYPE_D)) {
1809                 arcmsr_write_ioctldata2iop_in_DWORD(acb);
1810                 return;
1811         }
1812         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_READED) {
1813                 acb->acb_flags &= (~ACB_F_MESSAGE_WQBUFFER_READED);
1814                 pwbuffer = arcmsr_get_iop_wqbuffer(acb);
1815                 iop_data = (uint8_t __iomem *)pwbuffer->data;
1816                 while ((acb->wqbuf_getIndex != acb->wqbuf_putIndex)
1817                         && (allxfer_len < 124)) {
1818                         pQbuffer = &acb->wqbuffer[acb->wqbuf_getIndex];
1819                         writeb(*pQbuffer, iop_data);
1820                         acb->wqbuf_getIndex++;
1821                         acb->wqbuf_getIndex %= ARCMSR_MAX_QBUFFER;
1822                         iop_data++;
1823                         allxfer_len++;
1824                 }
1825                 writel(allxfer_len, &pwbuffer->data_len);
1826                 arcmsr_iop_message_wrote(acb);
1827         }
1828 }
1829 
1830 static void arcmsr_iop2drv_data_read_handle(struct AdapterControlBlock *acb)
1831 {
1832         unsigned long flags;
1833 
1834         spin_lock_irqsave(&acb->wqbuffer_lock, flags);
1835         acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_READED;
1836         if (acb->wqbuf_getIndex != acb->wqbuf_putIndex)
1837                 arcmsr_write_ioctldata2iop(acb);
1838         if (acb->wqbuf_getIndex == acb->wqbuf_putIndex)
1839                 acb->acb_flags |= ACB_F_MESSAGE_WQBUFFER_CLEARED;
1840         spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
1841 }
1842 
1843 static void arcmsr_hbaA_doorbell_isr(struct AdapterControlBlock *acb)
1844 {
1845         uint32_t outbound_doorbell;
1846         struct MessageUnit_A __iomem *reg = acb->pmuA;
1847         outbound_doorbell = readl(&reg->outbound_doorbell);
1848         do {
1849                 writel(outbound_doorbell, &reg->outbound_doorbell);
1850                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK)
1851                         arcmsr_iop2drv_data_wrote_handle(acb);
1852                 if (outbound_doorbell & ARCMSR_OUTBOUND_IOP331_DATA_READ_OK)
1853                         arcmsr_iop2drv_data_read_handle(acb);
1854                 outbound_doorbell = readl(&reg->outbound_doorbell);
1855         } while (outbound_doorbell & (ARCMSR_OUTBOUND_IOP331_DATA_WRITE_OK
1856                 | ARCMSR_OUTBOUND_IOP331_DATA_READ_OK));
1857 }
1858 static void arcmsr_hbaC_doorbell_isr(struct AdapterControlBlock *pACB)
1859 {
1860         uint32_t outbound_doorbell;
1861         struct MessageUnit_C __iomem *reg = pACB->pmuC;
1862         /*
1863         *******************************************************************
1864         **  Maybe here we need to check wrqbuffer_lock is lock or not
1865         **  DOORBELL: din! don!
1866         **  check if there are any mail need to pack from firmware
1867         *******************************************************************
1868         */
1869         outbound_doorbell = readl(&reg->outbound_doorbell);
1870         do {
1871                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
1872                 readl(&reg->outbound_doorbell_clear);
1873                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK)
1874                         arcmsr_iop2drv_data_wrote_handle(pACB);
1875                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK)
1876                         arcmsr_iop2drv_data_read_handle(pACB);
1877                 if (outbound_doorbell & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE)
1878                         arcmsr_hbaC_message_isr(pACB);
1879                 outbound_doorbell = readl(&reg->outbound_doorbell);
1880         } while (outbound_doorbell & (ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK
1881                 | ARCMSR_HBCMU_IOP2DRV_DATA_READ_OK
1882                 | ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE));
1883 }
1884 
1885 static void arcmsr_hbaD_doorbell_isr(struct AdapterControlBlock *pACB)
1886 {
1887         uint32_t outbound_doorbell;
1888         struct MessageUnit_D  *pmu = pACB->pmuD;
1889 
1890         outbound_doorbell = readl(pmu->outbound_doorbell);
1891         do {
1892                 writel(outbound_doorbell, pmu->outbound_doorbell);
1893                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE)
1894                         arcmsr_hbaD_message_isr(pACB);
1895                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK)
1896                         arcmsr_iop2drv_data_wrote_handle(pACB);
1897                 if (outbound_doorbell & ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK)
1898                         arcmsr_iop2drv_data_read_handle(pACB);
1899                 outbound_doorbell = readl(pmu->outbound_doorbell);
1900         } while (outbound_doorbell & (ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK
1901                 | ARCMSR_ARC1214_IOP2DRV_DATA_READ_OK
1902                 | ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE));
1903 }
1904 
1905 static void arcmsr_hbaA_postqueue_isr(struct AdapterControlBlock *acb)
1906 {
1907         uint32_t flag_ccb;
1908         struct MessageUnit_A __iomem *reg = acb->pmuA;
1909         struct ARCMSR_CDB *pARCMSR_CDB;
1910         struct CommandControlBlock *pCCB;
1911         bool error;
1912         while ((flag_ccb = readl(&reg->outbound_queueport)) != 0xFFFFFFFF) {
1913                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));/*frame must be 32 bytes aligned*/
1914                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1915                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1916                 arcmsr_drain_donequeue(acb, pCCB, error);
1917         }
1918 }
1919 static void arcmsr_hbaB_postqueue_isr(struct AdapterControlBlock *acb)
1920 {
1921         uint32_t index;
1922         uint32_t flag_ccb;
1923         struct MessageUnit_B *reg = acb->pmuB;
1924         struct ARCMSR_CDB *pARCMSR_CDB;
1925         struct CommandControlBlock *pCCB;
1926         bool error;
1927         index = reg->doneq_index;
1928         while ((flag_ccb = reg->done_qbuffer[index]) != 0) {
1929                 reg->done_qbuffer[index] = 0;
1930                 pARCMSR_CDB = (struct ARCMSR_CDB *)(acb->vir2phy_offset+(flag_ccb << 5));/*frame must be 32 bytes aligned*/
1931                 pCCB = container_of(pARCMSR_CDB, struct CommandControlBlock, arcmsr_cdb);
1932                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
1933                 arcmsr_drain_donequeue(acb, pCCB, error);
1934                 index++;
1935                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
1936                 reg->doneq_index = index;
1937         }
1938 }
1939 
1940 static void arcmsr_hbaC_postqueue_isr(struct AdapterControlBlock *acb)
1941 {
1942         struct MessageUnit_C __iomem *phbcmu;
1943         struct ARCMSR_CDB *arcmsr_cdb;
1944         struct CommandControlBlock *ccb;
1945         uint32_t flag_ccb, ccb_cdb_phy, throttling = 0;
1946         int error;
1947 
1948         phbcmu = acb->pmuC;
1949         /* areca cdb command done */
1950         /* Use correct offset and size for syncing */
1951 
1952         while ((flag_ccb = readl(&phbcmu->outbound_queueport_low)) !=
1953                         0xFFFFFFFF) {
1954                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
1955                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
1956                         + ccb_cdb_phy);
1957                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock,
1958                         arcmsr_cdb);
1959                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
1960                         ? true : false;
1961                 /* check if command done with no error */
1962                 arcmsr_drain_donequeue(acb, ccb, error);
1963                 throttling++;
1964                 if (throttling == ARCMSR_HBC_ISR_THROTTLING_LEVEL) {
1965                         writel(ARCMSR_HBCMU_DRV2IOP_POSTQUEUE_THROTTLING,
1966                                 &phbcmu->inbound_doorbell);
1967                         throttling = 0;
1968                 }
1969         }
1970 }
1971 
1972 static void arcmsr_hbaD_postqueue_isr(struct AdapterControlBlock *acb)
1973 {
1974         u32 outbound_write_pointer, doneq_index, index_stripped, toggle;
1975         uint32_t addressLow, ccb_cdb_phy;
1976         int error;
1977         struct MessageUnit_D  *pmu;
1978         struct ARCMSR_CDB *arcmsr_cdb;
1979         struct CommandControlBlock *ccb;
1980         unsigned long flags;
1981 
1982         spin_lock_irqsave(&acb->doneq_lock, flags);
1983         pmu = acb->pmuD;
1984         outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
1985         doneq_index = pmu->doneq_index;
1986         if ((doneq_index & 0xFFF) != (outbound_write_pointer & 0xFFF)) {
1987                 do {
1988                         toggle = doneq_index & 0x4000;
1989                         index_stripped = (doneq_index & 0xFFF) + 1;
1990                         index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
1991                         pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
1992                                 ((toggle ^ 0x4000) + 1);
1993                         doneq_index = pmu->doneq_index;
1994                         addressLow = pmu->done_qbuffer[doneq_index &
1995                                 0xFFF].addressLow;
1996                         ccb_cdb_phy = (addressLow & 0xFFFFFFF0);
1997                         arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset
1998                                 + ccb_cdb_phy);
1999                         ccb = container_of(arcmsr_cdb,
2000                                 struct CommandControlBlock, arcmsr_cdb);
2001                         error = (addressLow & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
2002                                 ? true : false;
2003                         arcmsr_drain_donequeue(acb, ccb, error);
2004                         writel(doneq_index, pmu->outboundlist_read_pointer);
2005                 } while ((doneq_index & 0xFFF) !=
2006                         (outbound_write_pointer & 0xFFF));
2007         }
2008         writel(ARCMSR_ARC1214_OUTBOUND_LIST_INTERRUPT_CLEAR,
2009                 pmu->outboundlist_interrupt_cause);
2010         readl(pmu->outboundlist_interrupt_cause);
2011         spin_unlock_irqrestore(&acb->doneq_lock, flags);
2012 }
2013 
2014 /*
2015 **********************************************************************************
2016 ** Handle a message interrupt
2017 **
2018 ** The only message interrupt we expect is in response to a query for the current adapter config.  
2019 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2020 **********************************************************************************
2021 */
2022 static void arcmsr_hbaA_message_isr(struct AdapterControlBlock *acb)
2023 {
2024         struct MessageUnit_A __iomem *reg  = acb->pmuA;
2025         /*clear interrupt and message state*/
2026         writel(ARCMSR_MU_OUTBOUND_MESSAGE0_INT, &reg->outbound_intstatus);
2027         schedule_work(&acb->arcmsr_do_message_isr_bh);
2028 }
2029 static void arcmsr_hbaB_message_isr(struct AdapterControlBlock *acb)
2030 {
2031         struct MessageUnit_B *reg  = acb->pmuB;
2032 
2033         /*clear interrupt and message state*/
2034         writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
2035         schedule_work(&acb->arcmsr_do_message_isr_bh);
2036 }
2037 /*
2038 **********************************************************************************
2039 ** Handle a message interrupt
2040 **
2041 ** The only message interrupt we expect is in response to a query for the
2042 ** current adapter config.
2043 ** We want this in order to compare the drivemap so that we can detect newly-attached drives.
2044 **********************************************************************************
2045 */
2046 static void arcmsr_hbaC_message_isr(struct AdapterControlBlock *acb)
2047 {
2048         struct MessageUnit_C __iomem *reg  = acb->pmuC;
2049         /*clear interrupt and message state*/
2050         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);
2051         schedule_work(&acb->arcmsr_do_message_isr_bh);
2052 }
2053 
2054 static void arcmsr_hbaD_message_isr(struct AdapterControlBlock *acb)
2055 {
2056         struct MessageUnit_D *reg  = acb->pmuD;
2057 
2058         writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE, reg->outbound_doorbell);
2059         readl(reg->outbound_doorbell);
2060         schedule_work(&acb->arcmsr_do_message_isr_bh);
2061 }
2062 
2063 static int arcmsr_hbaA_handle_isr(struct AdapterControlBlock *acb)
2064 {
2065         uint32_t outbound_intstatus;
2066         struct MessageUnit_A __iomem *reg = acb->pmuA;
2067         outbound_intstatus = readl(&reg->outbound_intstatus) &
2068                 acb->outbound_int_enable;
2069         if (!(outbound_intstatus & ARCMSR_MU_OUTBOUND_HANDLE_INT))
2070                 return IRQ_NONE;
2071         do {
2072                 writel(outbound_intstatus, &reg->outbound_intstatus);
2073                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_DOORBELL_INT)
2074                         arcmsr_hbaA_doorbell_isr(acb);
2075                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_POSTQUEUE_INT)
2076                         arcmsr_hbaA_postqueue_isr(acb);
2077                 if (outbound_intstatus & ARCMSR_MU_OUTBOUND_MESSAGE0_INT)
2078                         arcmsr_hbaA_message_isr(acb);
2079                 outbound_intstatus = readl(&reg->outbound_intstatus) &
2080                         acb->outbound_int_enable;
2081         } while (outbound_intstatus & (ARCMSR_MU_OUTBOUND_DOORBELL_INT
2082                 | ARCMSR_MU_OUTBOUND_POSTQUEUE_INT
2083                 | ARCMSR_MU_OUTBOUND_MESSAGE0_INT));
2084         return IRQ_HANDLED;
2085 }
2086 
2087 static int arcmsr_hbaB_handle_isr(struct AdapterControlBlock *acb)
2088 {
2089         uint32_t outbound_doorbell;
2090         struct MessageUnit_B *reg = acb->pmuB;
2091         outbound_doorbell = readl(reg->iop2drv_doorbell) &
2092                                 acb->outbound_int_enable;
2093         if (!outbound_doorbell)
2094                 return IRQ_NONE;
2095         do {
2096                 writel(~outbound_doorbell, reg->iop2drv_doorbell);
2097                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
2098                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_WRITE_OK)
2099                         arcmsr_iop2drv_data_wrote_handle(acb);
2100                 if (outbound_doorbell & ARCMSR_IOP2DRV_DATA_READ_OK)
2101                         arcmsr_iop2drv_data_read_handle(acb);
2102                 if (outbound_doorbell & ARCMSR_IOP2DRV_CDB_DONE)
2103                         arcmsr_hbaB_postqueue_isr(acb);
2104                 if (outbound_doorbell & ARCMSR_IOP2DRV_MESSAGE_CMD_DONE)
2105                         arcmsr_hbaB_message_isr(acb);
2106                 outbound_doorbell = readl(reg->iop2drv_doorbell) &
2107                         acb->outbound_int_enable;
2108         } while (outbound_doorbell & (ARCMSR_IOP2DRV_DATA_WRITE_OK
2109                 | ARCMSR_IOP2DRV_DATA_READ_OK
2110                 | ARCMSR_IOP2DRV_CDB_DONE
2111                 | ARCMSR_IOP2DRV_MESSAGE_CMD_DONE));
2112         return IRQ_HANDLED;
2113 }
2114 
2115 static int arcmsr_hbaC_handle_isr(struct AdapterControlBlock *pACB)
2116 {
2117         uint32_t host_interrupt_status;
2118         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
2119         /*
2120         *********************************************
2121         **   check outbound intstatus
2122         *********************************************
2123         */
2124         host_interrupt_status = readl(&phbcmu->host_int_status) &
2125                 (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2126                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR);
2127         if (!host_interrupt_status)
2128                 return IRQ_NONE;
2129         do {
2130                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR)
2131                         arcmsr_hbaC_doorbell_isr(pACB);
2132                 /* MU post queue interrupts*/
2133                 if (host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)
2134                         arcmsr_hbaC_postqueue_isr(pACB);
2135                 host_interrupt_status = readl(&phbcmu->host_int_status);
2136         } while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
2137                 ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
2138         return IRQ_HANDLED;
2139 }
2140 
2141 static irqreturn_t arcmsr_hbaD_handle_isr(struct AdapterControlBlock *pACB)
2142 {
2143         u32 host_interrupt_status;
2144         struct MessageUnit_D  *pmu = pACB->pmuD;
2145 
2146         host_interrupt_status = readl(pmu->host_int_status) &
2147                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2148                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR);
2149         if (!host_interrupt_status)
2150                 return IRQ_NONE;
2151         do {
2152                 /* MU post queue interrupts*/
2153                 if (host_interrupt_status &
2154                         ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR)
2155                         arcmsr_hbaD_postqueue_isr(pACB);
2156                 if (host_interrupt_status &
2157                         ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR)
2158                         arcmsr_hbaD_doorbell_isr(pACB);
2159                 host_interrupt_status = readl(pmu->host_int_status);
2160         } while (host_interrupt_status &
2161                 (ARCMSR_ARC1214_OUTBOUND_POSTQUEUE_ISR |
2162                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ISR));
2163         return IRQ_HANDLED;
2164 }
2165 
2166 static irqreturn_t arcmsr_interrupt(struct AdapterControlBlock *acb)
2167 {
2168         switch (acb->adapter_type) {
2169         case ACB_ADAPTER_TYPE_A:
2170                 return arcmsr_hbaA_handle_isr(acb);
2171                 break;
2172         case ACB_ADAPTER_TYPE_B:
2173                 return arcmsr_hbaB_handle_isr(acb);
2174                 break;
2175         case ACB_ADAPTER_TYPE_C:
2176                 return arcmsr_hbaC_handle_isr(acb);
2177         case ACB_ADAPTER_TYPE_D:
2178                 return arcmsr_hbaD_handle_isr(acb);
2179         default:
2180                 return IRQ_NONE;
2181         }
2182 }
2183 
2184 static void arcmsr_iop_parking(struct AdapterControlBlock *acb)
2185 {
2186         if (acb) {
2187                 /* stop adapter background rebuild */
2188                 if (acb->acb_flags & ACB_F_MSG_START_BGRB) {
2189                         uint32_t intmask_org;
2190                         acb->acb_flags &= ~ACB_F_MSG_START_BGRB;
2191                         intmask_org = arcmsr_disable_outbound_ints(acb);
2192                         arcmsr_stop_adapter_bgrb(acb);
2193                         arcmsr_flush_adapter_cache(acb);
2194                         arcmsr_enable_outbound_ints(acb, intmask_org);
2195                 }
2196         }
2197 }
2198 
2199 
2200 void arcmsr_clear_iop2drv_rqueue_buffer(struct AdapterControlBlock *acb)
2201 {
2202         uint32_t        i;
2203 
2204         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2205                 for (i = 0; i < 15; i++) {
2206                         if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2207                                 acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2208                                 acb->rqbuf_getIndex = 0;
2209                                 acb->rqbuf_putIndex = 0;
2210                                 arcmsr_iop_message_read(acb);
2211                                 mdelay(30);
2212                         } else if (acb->rqbuf_getIndex !=
2213                                    acb->rqbuf_putIndex) {
2214                                 acb->rqbuf_getIndex = 0;
2215                                 acb->rqbuf_putIndex = 0;
2216                                 mdelay(30);
2217                         } else
2218                                 break;
2219                 }
2220         }
2221 }
2222 
2223 static int arcmsr_iop_message_xfer(struct AdapterControlBlock *acb,
2224                 struct scsi_cmnd *cmd)
2225 {
2226         char *buffer;
2227         unsigned short use_sg;
2228         int retvalue = 0, transfer_len = 0;
2229         unsigned long flags;
2230         struct CMD_MESSAGE_FIELD *pcmdmessagefld;
2231         uint32_t controlcode = (uint32_t)cmd->cmnd[5] << 24 |
2232                 (uint32_t)cmd->cmnd[6] << 16 |
2233                 (uint32_t)cmd->cmnd[7] << 8 |
2234                 (uint32_t)cmd->cmnd[8];
2235         struct scatterlist *sg;
2236 
2237         use_sg = scsi_sg_count(cmd);
2238         sg = scsi_sglist(cmd);
2239         buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2240         if (use_sg > 1) {
2241                 retvalue = ARCMSR_MESSAGE_FAIL;
2242                 goto message_out;
2243         }
2244         transfer_len += sg->length;
2245         if (transfer_len > sizeof(struct CMD_MESSAGE_FIELD)) {
2246                 retvalue = ARCMSR_MESSAGE_FAIL;
2247                 pr_info("%s: ARCMSR_MESSAGE_FAIL!\n", __func__);
2248                 goto message_out;
2249         }
2250         pcmdmessagefld = (struct CMD_MESSAGE_FIELD *)buffer;
2251         switch (controlcode) {
2252         case ARCMSR_MESSAGE_READ_RQBUFFER: {
2253                 unsigned char *ver_addr;
2254                 uint8_t *ptmpQbuffer;
2255                 uint32_t allxfer_len = 0;
2256                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2257                 if (!ver_addr) {
2258                         retvalue = ARCMSR_MESSAGE_FAIL;
2259                         pr_info("%s: memory not enough!\n", __func__);
2260                         goto message_out;
2261                 }
2262                 ptmpQbuffer = ver_addr;
2263                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2264                 if (acb->rqbuf_getIndex != acb->rqbuf_putIndex) {
2265                         unsigned int tail = acb->rqbuf_getIndex;
2266                         unsigned int head = acb->rqbuf_putIndex;
2267                         unsigned int cnt_to_end = CIRC_CNT_TO_END(head, tail, ARCMSR_MAX_QBUFFER);
2268 
2269                         allxfer_len = CIRC_CNT(head, tail, ARCMSR_MAX_QBUFFER);
2270                         if (allxfer_len > ARCMSR_API_DATA_BUFLEN)
2271                                 allxfer_len = ARCMSR_API_DATA_BUFLEN;
2272 
2273                         if (allxfer_len <= cnt_to_end)
2274                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, allxfer_len);
2275                         else {
2276                                 memcpy(ptmpQbuffer, acb->rqbuffer + tail, cnt_to_end);
2277                                 memcpy(ptmpQbuffer + cnt_to_end, acb->rqbuffer, allxfer_len - cnt_to_end);
2278                         }
2279                         acb->rqbuf_getIndex = (acb->rqbuf_getIndex + allxfer_len) % ARCMSR_MAX_QBUFFER;
2280                 }
2281                 memcpy(pcmdmessagefld->messagedatabuffer, ver_addr,
2282                         allxfer_len);
2283                 if (acb->acb_flags & ACB_F_IOPDATA_OVERFLOW) {
2284                         struct QBUFFER __iomem *prbuffer;
2285                         acb->acb_flags &= ~ACB_F_IOPDATA_OVERFLOW;
2286                         prbuffer = arcmsr_get_iop_rqbuffer(acb);
2287                         if (arcmsr_Read_iop_rqbuffer_data(acb, prbuffer) == 0)
2288                                 acb->acb_flags |= ACB_F_IOPDATA_OVERFLOW;
2289                 }
2290                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2291                 kfree(ver_addr);
2292                 pcmdmessagefld->cmdmessage.Length = allxfer_len;
2293                 if (acb->fw_flag == FW_DEADLOCK)
2294                         pcmdmessagefld->cmdmessage.ReturnCode =
2295                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2296                 else
2297                         pcmdmessagefld->cmdmessage.ReturnCode =
2298                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2299                 break;
2300         }
2301         case ARCMSR_MESSAGE_WRITE_WQBUFFER: {
2302                 unsigned char *ver_addr;
2303                 int32_t user_len, cnt2end;
2304                 uint8_t *pQbuffer, *ptmpuserbuffer;
2305                 ver_addr = kmalloc(ARCMSR_API_DATA_BUFLEN, GFP_ATOMIC);
2306                 if (!ver_addr) {
2307                         retvalue = ARCMSR_MESSAGE_FAIL;
2308                         goto message_out;
2309                 }
2310                 ptmpuserbuffer = ver_addr;
2311                 user_len = pcmdmessagefld->cmdmessage.Length;
2312                 memcpy(ptmpuserbuffer,
2313                         pcmdmessagefld->messagedatabuffer, user_len);
2314                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2315                 if (acb->wqbuf_putIndex != acb->wqbuf_getIndex) {
2316                         struct SENSE_DATA *sensebuffer =
2317                                 (struct SENSE_DATA *)cmd->sense_buffer;
2318                         arcmsr_write_ioctldata2iop(acb);
2319                         /* has error report sensedata */
2320                         sensebuffer->ErrorCode = SCSI_SENSE_CURRENT_ERRORS;
2321                         sensebuffer->SenseKey = ILLEGAL_REQUEST;
2322                         sensebuffer->AdditionalSenseLength = 0x0A;
2323                         sensebuffer->AdditionalSenseCode = 0x20;
2324                         sensebuffer->Valid = 1;
2325                         retvalue = ARCMSR_MESSAGE_FAIL;
2326                 } else {
2327                         pQbuffer = &acb->wqbuffer[acb->wqbuf_putIndex];
2328                         cnt2end = ARCMSR_MAX_QBUFFER - acb->wqbuf_putIndex;
2329                         if (user_len > cnt2end) {
2330                                 memcpy(pQbuffer, ptmpuserbuffer, cnt2end);
2331                                 ptmpuserbuffer += cnt2end;
2332                                 user_len -= cnt2end;
2333                                 acb->wqbuf_putIndex = 0;
2334                                 pQbuffer = acb->wqbuffer;
2335                         }
2336                         memcpy(pQbuffer, ptmpuserbuffer, user_len);
2337                         acb->wqbuf_putIndex += user_len;
2338                         acb->wqbuf_putIndex %= ARCMSR_MAX_QBUFFER;
2339                         if (acb->acb_flags & ACB_F_MESSAGE_WQBUFFER_CLEARED) {
2340                                 acb->acb_flags &=
2341                                                 ~ACB_F_MESSAGE_WQBUFFER_CLEARED;
2342                                 arcmsr_write_ioctldata2iop(acb);
2343                         }
2344                 }
2345                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2346                 kfree(ver_addr);
2347                 if (acb->fw_flag == FW_DEADLOCK)
2348                         pcmdmessagefld->cmdmessage.ReturnCode =
2349                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2350                 else
2351                         pcmdmessagefld->cmdmessage.ReturnCode =
2352                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2353                 break;
2354         }
2355         case ARCMSR_MESSAGE_CLEAR_RQBUFFER: {
2356                 uint8_t *pQbuffer = acb->rqbuffer;
2357 
2358                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2359                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2360                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2361                 acb->rqbuf_getIndex = 0;
2362                 acb->rqbuf_putIndex = 0;
2363                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2364                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2365                 if (acb->fw_flag == FW_DEADLOCK)
2366                         pcmdmessagefld->cmdmessage.ReturnCode =
2367                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2368                 else
2369                         pcmdmessagefld->cmdmessage.ReturnCode =
2370                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2371                 break;
2372         }
2373         case ARCMSR_MESSAGE_CLEAR_WQBUFFER: {
2374                 uint8_t *pQbuffer = acb->wqbuffer;
2375                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2376                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2377                         ACB_F_MESSAGE_WQBUFFER_READED);
2378                 acb->wqbuf_getIndex = 0;
2379                 acb->wqbuf_putIndex = 0;
2380                 memset(pQbuffer, 0, ARCMSR_MAX_QBUFFER);
2381                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2382                 if (acb->fw_flag == FW_DEADLOCK)
2383                         pcmdmessagefld->cmdmessage.ReturnCode =
2384                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2385                 else
2386                         pcmdmessagefld->cmdmessage.ReturnCode =
2387                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2388                 break;
2389         }
2390         case ARCMSR_MESSAGE_CLEAR_ALLQBUFFER: {
2391                 uint8_t *pQbuffer;
2392                 arcmsr_clear_iop2drv_rqueue_buffer(acb);
2393                 spin_lock_irqsave(&acb->rqbuffer_lock, flags);
2394                 acb->acb_flags |= ACB_F_MESSAGE_RQBUFFER_CLEARED;
2395                 acb->rqbuf_getIndex = 0;
2396                 acb->rqbuf_putIndex = 0;
2397                 pQbuffer = acb->rqbuffer;
2398                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2399                 spin_unlock_irqrestore(&acb->rqbuffer_lock, flags);
2400                 spin_lock_irqsave(&acb->wqbuffer_lock, flags);
2401                 acb->acb_flags |= (ACB_F_MESSAGE_WQBUFFER_CLEARED |
2402                         ACB_F_MESSAGE_WQBUFFER_READED);
2403                 acb->wqbuf_getIndex = 0;
2404                 acb->wqbuf_putIndex = 0;
2405                 pQbuffer = acb->wqbuffer;
2406                 memset(pQbuffer, 0, sizeof(struct QBUFFER));
2407                 spin_unlock_irqrestore(&acb->wqbuffer_lock, flags);
2408                 if (acb->fw_flag == FW_DEADLOCK)
2409                         pcmdmessagefld->cmdmessage.ReturnCode =
2410                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2411                 else
2412                         pcmdmessagefld->cmdmessage.ReturnCode =
2413                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2414                 break;
2415         }
2416         case ARCMSR_MESSAGE_RETURN_CODE_3F: {
2417                 if (acb->fw_flag == FW_DEADLOCK)
2418                         pcmdmessagefld->cmdmessage.ReturnCode =
2419                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2420                 else
2421                         pcmdmessagefld->cmdmessage.ReturnCode =
2422                                 ARCMSR_MESSAGE_RETURNCODE_3F;
2423                 break;
2424         }
2425         case ARCMSR_MESSAGE_SAY_HELLO: {
2426                 int8_t *hello_string = "Hello! I am ARCMSR";
2427                 if (acb->fw_flag == FW_DEADLOCK)
2428                         pcmdmessagefld->cmdmessage.ReturnCode =
2429                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2430                 else
2431                         pcmdmessagefld->cmdmessage.ReturnCode =
2432                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2433                 memcpy(pcmdmessagefld->messagedatabuffer,
2434                         hello_string, (int16_t)strlen(hello_string));
2435                 break;
2436         }
2437         case ARCMSR_MESSAGE_SAY_GOODBYE: {
2438                 if (acb->fw_flag == FW_DEADLOCK)
2439                         pcmdmessagefld->cmdmessage.ReturnCode =
2440                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2441                 else
2442                         pcmdmessagefld->cmdmessage.ReturnCode =
2443                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2444                 arcmsr_iop_parking(acb);
2445                 break;
2446         }
2447         case ARCMSR_MESSAGE_FLUSH_ADAPTER_CACHE: {
2448                 if (acb->fw_flag == FW_DEADLOCK)
2449                         pcmdmessagefld->cmdmessage.ReturnCode =
2450                                 ARCMSR_MESSAGE_RETURNCODE_BUS_HANG_ON;
2451                 else
2452                         pcmdmessagefld->cmdmessage.ReturnCode =
2453                                 ARCMSR_MESSAGE_RETURNCODE_OK;
2454                 arcmsr_flush_adapter_cache(acb);
2455                 break;
2456         }
2457         default:
2458                 retvalue = ARCMSR_MESSAGE_FAIL;
2459                 pr_info("%s: unknown controlcode!\n", __func__);
2460         }
2461 message_out:
2462         if (use_sg) {
2463                 struct scatterlist *sg = scsi_sglist(cmd);
2464                 kunmap_atomic(buffer - sg->offset);
2465         }
2466         return retvalue;
2467 }
2468 
2469 static struct CommandControlBlock *arcmsr_get_freeccb(struct AdapterControlBlock *acb)
2470 {
2471         struct list_head *head = &acb->ccb_free_list;
2472         struct CommandControlBlock *ccb = NULL;
2473         unsigned long flags;
2474         spin_lock_irqsave(&acb->ccblist_lock, flags);
2475         if (!list_empty(head)) {
2476                 ccb = list_entry(head->next, struct CommandControlBlock, list);
2477                 list_del_init(&ccb->list);
2478         }else{
2479                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2480                 return NULL;
2481         }
2482         spin_unlock_irqrestore(&acb->ccblist_lock, flags);
2483         return ccb;
2484 }
2485 
2486 static void arcmsr_handle_virtual_command(struct AdapterControlBlock *acb,
2487                 struct scsi_cmnd *cmd)
2488 {
2489         switch (cmd->cmnd[0]) {
2490         case INQUIRY: {
2491                 unsigned char inqdata[36];
2492                 char *buffer;
2493                 struct scatterlist *sg;
2494 
2495                 if (cmd->device->lun) {
2496                         cmd->result = (DID_TIME_OUT << 16);
2497                         cmd->scsi_done(cmd);
2498                         return;
2499                 }
2500                 inqdata[0] = TYPE_PROCESSOR;
2501                 /* Periph Qualifier & Periph Dev Type */
2502                 inqdata[1] = 0;
2503                 /* rem media bit & Dev Type Modifier */
2504                 inqdata[2] = 0;
2505                 /* ISO, ECMA, & ANSI versions */
2506                 inqdata[4] = 31;
2507                 /* length of additional data */
2508                 strncpy(&inqdata[8], "Areca   ", 8);
2509                 /* Vendor Identification */
2510                 strncpy(&inqdata[16], "RAID controller ", 16);
2511                 /* Product Identification */
2512                 strncpy(&inqdata[32], "R001", 4); /* Product Revision */
2513 
2514                 sg = scsi_sglist(cmd);
2515                 buffer = kmap_atomic(sg_page(sg)) + sg->offset;
2516 
2517                 memcpy(buffer, inqdata, sizeof(inqdata));
2518                 sg = scsi_sglist(cmd);
2519                 kunmap_atomic(buffer - sg->offset);
2520 
2521                 cmd->scsi_done(cmd);
2522         }
2523         break;
2524         case WRITE_BUFFER:
2525         case READ_BUFFER: {
2526                 if (arcmsr_iop_message_xfer(acb, cmd))
2527                         cmd->result = (DID_ERROR << 16);
2528                 cmd->scsi_done(cmd);
2529         }
2530         break;
2531         default:
2532                 cmd->scsi_done(cmd);
2533         }
2534 }
2535 
2536 static int arcmsr_queue_command_lck(struct scsi_cmnd *cmd,
2537         void (* done)(struct scsi_cmnd *))
2538 {
2539         struct Scsi_Host *host = cmd->device->host;
2540         struct AdapterControlBlock *acb = (struct AdapterControlBlock *) host->hostdata;
2541         struct CommandControlBlock *ccb;
2542         int target = cmd->device->id;
2543         int lun = cmd->device->lun;
2544         uint8_t scsicmd = cmd->cmnd[0];
2545         cmd->scsi_done = done;
2546         cmd->host_scribble = NULL;
2547         cmd->result = 0;
2548         if ((scsicmd == SYNCHRONIZE_CACHE) ||(scsicmd == SEND_DIAGNOSTIC)){
2549                 if(acb->devstate[target][lun] == ARECA_RAID_GONE) {
2550                         cmd->result = (DID_NO_CONNECT << 16);
2551                 }
2552                 cmd->scsi_done(cmd);
2553                 return 0;
2554         }
2555         if (target == 16) {
2556                 /* virtual device for iop message transfer */
2557                 arcmsr_handle_virtual_command(acb, cmd);
2558                 return 0;
2559         }
2560         ccb = arcmsr_get_freeccb(acb);
2561         if (!ccb)
2562                 return SCSI_MLQUEUE_HOST_BUSY;
2563         if (arcmsr_build_ccb( acb, ccb, cmd ) == FAILED) {
2564                 cmd->result = (DID_ERROR << 16) | (RESERVATION_CONFLICT << 1);
2565                 cmd->scsi_done(cmd);
2566                 return 0;
2567         }
2568         arcmsr_post_ccb(acb, ccb);
2569         return 0;
2570 }
2571 
2572 static DEF_SCSI_QCMD(arcmsr_queue_command)
2573 
2574 static bool arcmsr_hbaA_get_config(struct AdapterControlBlock *acb)
2575 {
2576         struct MessageUnit_A __iomem *reg = acb->pmuA;
2577         char *acb_firm_model = acb->firm_model;
2578         char *acb_firm_version = acb->firm_version;
2579         char *acb_device_map = acb->device_map;
2580         char __iomem *iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);
2581         char __iomem *iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);
2582         char __iomem *iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);
2583         int count;
2584         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2585         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
2586                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2587                         miscellaneous data' timeout \n", acb->host->host_no);
2588                 return false;
2589         }
2590         count = 8;
2591         while (count){
2592                 *acb_firm_model = readb(iop_firm_model);
2593                 acb_firm_model++;
2594                 iop_firm_model++;
2595                 count--;
2596         }
2597 
2598         count = 16;
2599         while (count){
2600                 *acb_firm_version = readb(iop_firm_version);
2601                 acb_firm_version++;
2602                 iop_firm_version++;
2603                 count--;
2604         }
2605 
2606         count=16;
2607         while(count){
2608                 *acb_device_map = readb(iop_device_map);
2609                 acb_device_map++;
2610                 iop_device_map++;
2611                 count--;
2612         }
2613         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
2614                 acb->host->host_no,
2615                 acb->firm_model,
2616                 acb->firm_version);
2617         acb->signature = readl(&reg->message_rwbuffer[0]);
2618         acb->firm_request_len = readl(&reg->message_rwbuffer[1]);
2619         acb->firm_numbers_queue = readl(&reg->message_rwbuffer[2]);
2620         acb->firm_sdram_size = readl(&reg->message_rwbuffer[3]);
2621         acb->firm_hd_channels = readl(&reg->message_rwbuffer[4]);
2622         acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]);  /*firm_cfg_version,25,100-103*/
2623         return true;
2624 }
2625 static bool arcmsr_hbaB_get_config(struct AdapterControlBlock *acb)
2626 {
2627         struct MessageUnit_B *reg = acb->pmuB;
2628         struct pci_dev *pdev = acb->pdev;
2629         void *dma_coherent;
2630         dma_addr_t dma_coherent_handle;
2631         char *acb_firm_model = acb->firm_model;
2632         char *acb_firm_version = acb->firm_version;
2633         char *acb_device_map = acb->device_map;
2634         char __iomem *iop_firm_model;
2635         /*firm_model,15,60-67*/
2636         char __iomem *iop_firm_version;
2637         /*firm_version,17,68-83*/
2638         char __iomem *iop_device_map;
2639         /*firm_version,21,84-99*/
2640         int count;
2641 
2642         acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_B), 32);
2643         dma_coherent = dma_alloc_coherent(&pdev->dev, acb->roundup_ccbsize,
2644                         &dma_coherent_handle, GFP_KERNEL);
2645         if (!dma_coherent){
2646                 printk(KERN_NOTICE
2647                         "arcmsr%d: dma_alloc_coherent got error for hbb mu\n",
2648                         acb->host->host_no);
2649                 return false;
2650         }
2651         acb->dma_coherent_handle2 = dma_coherent_handle;
2652         acb->dma_coherent2 = dma_coherent;
2653         reg = (struct MessageUnit_B *)dma_coherent;
2654         acb->pmuB = reg;
2655         reg->drv2iop_doorbell= (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL);
2656         reg->drv2iop_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_DRV2IOP_DOORBELL_MASK);
2657         reg->iop2drv_doorbell = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL);
2658         reg->iop2drv_doorbell_mask = (uint32_t __iomem *)((unsigned long)acb->mem_base0 + ARCMSR_IOP2DRV_DOORBELL_MASK);
2659         reg->message_wbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_WBUFFER);
2660         reg->message_rbuffer =  (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RBUFFER);
2661         reg->message_rwbuffer = (uint32_t __iomem *)((unsigned long)acb->mem_base1 + ARCMSR_MESSAGE_RWBUFFER);
2662         iop_firm_model = (char __iomem *)(&reg->message_rwbuffer[15]);  /*firm_model,15,60-67*/
2663         iop_firm_version = (char __iomem *)(&reg->message_rwbuffer[17]);        /*firm_version,17,68-83*/
2664         iop_device_map = (char __iomem *)(&reg->message_rwbuffer[21]);  /*firm_version,21,84-99*/
2665 
2666         writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
2667         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
2668                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2669                         miscellaneous data' timeout \n", acb->host->host_no);
2670                 return false;
2671         }
2672         count = 8;
2673         while (count){
2674                 *acb_firm_model = readb(iop_firm_model);
2675                 acb_firm_model++;
2676                 iop_firm_model++;
2677                 count--;
2678         }
2679         count = 16;
2680         while (count){
2681                 *acb_firm_version = readb(iop_firm_version);
2682                 acb_firm_version++;
2683                 iop_firm_version++;
2684                 count--;
2685         }
2686 
2687         count = 16;
2688         while(count){
2689                 *acb_device_map = readb(iop_device_map);
2690                 acb_device_map++;
2691                 iop_device_map++;
2692                 count--;
2693         }
2694         
2695         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
2696                 acb->host->host_no,
2697                 acb->firm_model,
2698                 acb->firm_version);
2699 
2700         acb->signature = readl(&reg->message_rwbuffer[1]);
2701         /*firm_signature,1,00-03*/
2702         acb->firm_request_len = readl(&reg->message_rwbuffer[2]);
2703         /*firm_request_len,1,04-07*/
2704         acb->firm_numbers_queue = readl(&reg->message_rwbuffer[3]);
2705         /*firm_numbers_queue,2,08-11*/
2706         acb->firm_sdram_size = readl(&reg->message_rwbuffer[4]);
2707         /*firm_sdram_size,3,12-15*/
2708         acb->firm_hd_channels = readl(&reg->message_rwbuffer[5]);
2709         /*firm_ide_channels,4,16-19*/
2710         acb->firm_cfg_version = readl(&reg->message_rwbuffer[25]);  /*firm_cfg_version,25,100-103*/
2711         /*firm_ide_channels,4,16-19*/
2712         return true;
2713 }
2714 
2715 static bool arcmsr_hbaC_get_config(struct AdapterControlBlock *pACB)
2716 {
2717         uint32_t intmask_org, Index, firmware_state = 0;
2718         struct MessageUnit_C __iomem *reg = pACB->pmuC;
2719         char *acb_firm_model = pACB->firm_model;
2720         char *acb_firm_version = pACB->firm_version;
2721         char __iomem *iop_firm_model = (char __iomem *)(&reg->msgcode_rwbuffer[15]);    /*firm_model,15,60-67*/
2722         char __iomem *iop_firm_version = (char __iomem *)(&reg->msgcode_rwbuffer[17]);  /*firm_version,17,68-83*/
2723         int count;
2724         /* disable all outbound interrupt */
2725         intmask_org = readl(&reg->host_int_mask); /* disable outbound message0 int */
2726         writel(intmask_org|ARCMSR_HBCMU_ALL_INTMASKENABLE, &reg->host_int_mask);
2727         /* wait firmware ready */
2728         do {
2729                 firmware_state = readl(&reg->outbound_msgaddr1);
2730         } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
2731         /* post "get config" instruction */
2732         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
2733         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
2734         /* wait message ready */
2735         for (Index = 0; Index < 2000; Index++) {
2736                 if (readl(&reg->outbound_doorbell) & ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE) {
2737                         writel(ARCMSR_HBCMU_IOP2DRV_MESSAGE_CMD_DONE_DOORBELL_CLEAR, &reg->outbound_doorbell_clear);/*clear interrupt*/
2738                         break;
2739                 }
2740                 udelay(10);
2741         } /*max 1 seconds*/
2742         if (Index >= 2000) {
2743                 printk(KERN_NOTICE "arcmsr%d: wait 'get adapter firmware \
2744                         miscellaneous data' timeout \n", pACB->host->host_no);
2745                 return false;
2746         }
2747         count = 8;
2748         while (count) {
2749                 *acb_firm_model = readb(iop_firm_model);
2750                 acb_firm_model++;
2751                 iop_firm_model++;
2752                 count--;
2753         }
2754         count = 16;
2755         while (count) {
2756                 *acb_firm_version = readb(iop_firm_version);
2757                 acb_firm_version++;
2758                 iop_firm_version++;
2759                 count--;
2760         }
2761         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
2762                 pACB->host->host_no,
2763                 pACB->firm_model,
2764                 pACB->firm_version);
2765         pACB->firm_request_len = readl(&reg->msgcode_rwbuffer[1]);   /*firm_request_len,1,04-07*/
2766         pACB->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[2]); /*firm_numbers_queue,2,08-11*/
2767         pACB->firm_sdram_size = readl(&reg->msgcode_rwbuffer[3]);    /*firm_sdram_size,3,12-15*/
2768         pACB->firm_hd_channels = readl(&reg->msgcode_rwbuffer[4]);  /*firm_ide_channels,4,16-19*/
2769         pACB->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]);  /*firm_cfg_version,25,100-103*/
2770         /*all interrupt service will be enable at arcmsr_iop_init*/
2771         return true;
2772 }
2773 
2774 static bool arcmsr_hbaD_get_config(struct AdapterControlBlock *acb)
2775 {
2776         char *acb_firm_model = acb->firm_model;
2777         char *acb_firm_version = acb->firm_version;
2778         char *acb_device_map = acb->device_map;
2779         char __iomem *iop_firm_model;
2780         char __iomem *iop_firm_version;
2781         char __iomem *iop_device_map;
2782         u32 count;
2783         struct MessageUnit_D *reg;
2784         void *dma_coherent2;
2785         dma_addr_t dma_coherent_handle2;
2786         struct pci_dev *pdev = acb->pdev;
2787 
2788         acb->roundup_ccbsize = roundup(sizeof(struct MessageUnit_D), 32);
2789         dma_coherent2 = dma_alloc_coherent(&pdev->dev, acb->roundup_ccbsize,
2790                 &dma_coherent_handle2, GFP_KERNEL);
2791         if (!dma_coherent2) {
2792                 pr_notice("DMA allocation failed...\n");
2793                 return false;
2794         }
2795         memset(dma_coherent2, 0, acb->roundup_ccbsize);
2796         acb->dma_coherent_handle2 = dma_coherent_handle2;
2797         acb->dma_coherent2 = dma_coherent2;
2798         reg = (struct MessageUnit_D *)dma_coherent2;
2799         acb->pmuD = reg;
2800         reg->chip_id = acb->mem_base0 + ARCMSR_ARC1214_CHIP_ID;
2801         reg->cpu_mem_config = acb->mem_base0 +
2802                 ARCMSR_ARC1214_CPU_MEMORY_CONFIGURATION;
2803         reg->i2o_host_interrupt_mask = acb->mem_base0 +
2804                 ARCMSR_ARC1214_I2_HOST_INTERRUPT_MASK;
2805         reg->sample_at_reset = acb->mem_base0 + ARCMSR_ARC1214_SAMPLE_RESET;
2806         reg->reset_request = acb->mem_base0 + ARCMSR_ARC1214_RESET_REQUEST;
2807         reg->host_int_status = acb->mem_base0 +
2808                 ARCMSR_ARC1214_MAIN_INTERRUPT_STATUS;
2809         reg->pcief0_int_enable = acb->mem_base0 +
2810                 ARCMSR_ARC1214_PCIE_F0_INTERRUPT_ENABLE;
2811         reg->inbound_msgaddr0 = acb->mem_base0 +
2812                 ARCMSR_ARC1214_INBOUND_MESSAGE0;
2813         reg->inbound_msgaddr1 = acb->mem_base0 +
2814                 ARCMSR_ARC1214_INBOUND_MESSAGE1;
2815         reg->outbound_msgaddr0 = acb->mem_base0 +
2816                 ARCMSR_ARC1214_OUTBOUND_MESSAGE0;
2817         reg->outbound_msgaddr1 = acb->mem_base0 +
2818                 ARCMSR_ARC1214_OUTBOUND_MESSAGE1;
2819         reg->inbound_doorbell = acb->mem_base0 +
2820                 ARCMSR_ARC1214_INBOUND_DOORBELL;
2821         reg->outbound_doorbell = acb->mem_base0 +
2822                 ARCMSR_ARC1214_OUTBOUND_DOORBELL;
2823         reg->outbound_doorbell_enable = acb->mem_base0 +
2824                 ARCMSR_ARC1214_OUTBOUND_DOORBELL_ENABLE;
2825         reg->inboundlist_base_low = acb->mem_base0 +
2826                 ARCMSR_ARC1214_INBOUND_LIST_BASE_LOW;
2827         reg->inboundlist_base_high = acb->mem_base0 +
2828                 ARCMSR_ARC1214_INBOUND_LIST_BASE_HIGH;
2829         reg->inboundlist_write_pointer = acb->mem_base0 +
2830                 ARCMSR_ARC1214_INBOUND_LIST_WRITE_POINTER;
2831         reg->outboundlist_base_low = acb->mem_base0 +
2832                 ARCMSR_ARC1214_OUTBOUND_LIST_BASE_LOW;
2833         reg->outboundlist_base_high = acb->mem_base0 +
2834                 ARCMSR_ARC1214_OUTBOUND_LIST_BASE_HIGH;
2835         reg->outboundlist_copy_pointer = acb->mem_base0 +
2836                 ARCMSR_ARC1214_OUTBOUND_LIST_COPY_POINTER;
2837         reg->outboundlist_read_pointer = acb->mem_base0 +
2838                 ARCMSR_ARC1214_OUTBOUND_LIST_READ_POINTER;
2839         reg->outboundlist_interrupt_cause = acb->mem_base0 +
2840                 ARCMSR_ARC1214_OUTBOUND_INTERRUPT_CAUSE;
2841         reg->outboundlist_interrupt_enable = acb->mem_base0 +
2842                 ARCMSR_ARC1214_OUTBOUND_INTERRUPT_ENABLE;
2843         reg->message_wbuffer = acb->mem_base0 + ARCMSR_ARC1214_MESSAGE_WBUFFER;
2844         reg->message_rbuffer = acb->mem_base0 + ARCMSR_ARC1214_MESSAGE_RBUFFER;
2845         reg->msgcode_rwbuffer = acb->mem_base0 +
2846                 ARCMSR_ARC1214_MESSAGE_RWBUFFER;
2847         iop_firm_model = (char __iomem *)(&reg->msgcode_rwbuffer[15]);
2848         iop_firm_version = (char __iomem *)(&reg->msgcode_rwbuffer[17]);
2849         iop_device_map = (char __iomem *)(&reg->msgcode_rwbuffer[21]);
2850         if (readl(acb->pmuD->outbound_doorbell) &
2851                 ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE) {
2852                 writel(ARCMSR_ARC1214_IOP2DRV_MESSAGE_CMD_DONE,
2853                         acb->pmuD->outbound_doorbell);/*clear interrupt*/
2854         }
2855         /* post "get config" instruction */
2856         writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, reg->inbound_msgaddr0);
2857         /* wait message ready */
2858         if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
2859                 pr_notice("arcmsr%d: wait get adapter firmware "
2860                         "miscellaneous data timeout\n", acb->host->host_no);
2861                 dma_free_coherent(&acb->pdev->dev, acb->roundup_ccbsize,
2862                         acb->dma_coherent2, acb->dma_coherent_handle2);
2863                 return false;
2864         }
2865         count = 8;
2866         while (count) {
2867                 *acb_firm_model = readb(iop_firm_model);
2868                 acb_firm_model++;
2869                 iop_firm_model++;
2870                 count--;
2871         }
2872         count = 16;
2873         while (count) {
2874                 *acb_firm_version = readb(iop_firm_version);
2875                 acb_firm_version++;
2876                 iop_firm_version++;
2877                 count--;
2878         }
2879         count = 16;
2880         while (count) {
2881                 *acb_device_map = readb(iop_device_map);
2882                 acb_device_map++;
2883                 iop_device_map++;
2884                 count--;
2885         }
2886         acb->signature = readl(&reg->msgcode_rwbuffer[1]);
2887         /*firm_signature,1,00-03*/
2888         acb->firm_request_len = readl(&reg->msgcode_rwbuffer[2]);
2889         /*firm_request_len,1,04-07*/
2890         acb->firm_numbers_queue = readl(&reg->msgcode_rwbuffer[3]);
2891         /*firm_numbers_queue,2,08-11*/
2892         acb->firm_sdram_size = readl(&reg->msgcode_rwbuffer[4]);
2893         /*firm_sdram_size,3,12-15*/
2894         acb->firm_hd_channels = readl(&reg->msgcode_rwbuffer[5]);
2895         /*firm_hd_channels,4,16-19*/
2896         acb->firm_cfg_version = readl(&reg->msgcode_rwbuffer[25]);
2897         pr_notice("Areca RAID Controller%d: Model %s, F/W %s\n",
2898                 acb->host->host_no,
2899                 acb->firm_model,
2900                 acb->firm_version);
2901         return true;
2902 }
2903 
2904 static bool arcmsr_get_firmware_spec(struct AdapterControlBlock *acb)
2905 {
2906         bool rtn = false;
2907 
2908         switch (acb->adapter_type) {
2909         case ACB_ADAPTER_TYPE_A:
2910                 rtn = arcmsr_hbaA_get_config(acb);
2911                 break;
2912         case ACB_ADAPTER_TYPE_B:
2913                 rtn = arcmsr_hbaB_get_config(acb);
2914                 break;
2915         case ACB_ADAPTER_TYPE_C:
2916                 rtn = arcmsr_hbaC_get_config(acb);
2917                 break;
2918         case ACB_ADAPTER_TYPE_D:
2919                 rtn = arcmsr_hbaD_get_config(acb);
2920                 break;
2921         default:
2922                 break;
2923         }
2924         if (acb->firm_numbers_queue > ARCMSR_MAX_OUTSTANDING_CMD)
2925                 acb->maxOutstanding = ARCMSR_MAX_OUTSTANDING_CMD;
2926         else
2927                 acb->maxOutstanding = acb->firm_numbers_queue - 1;
2928         acb->host->can_queue = acb->maxOutstanding;
2929         return rtn;
2930 }
2931 
2932 static int arcmsr_hbaA_polling_ccbdone(struct AdapterControlBlock *acb,
2933         struct CommandControlBlock *poll_ccb)
2934 {
2935         struct MessageUnit_A __iomem *reg = acb->pmuA;
2936         struct CommandControlBlock *ccb;
2937         struct ARCMSR_CDB *arcmsr_cdb;
2938         uint32_t flag_ccb, outbound_intstatus, poll_ccb_done = 0, poll_count = 0;
2939         int rtn;
2940         bool error;
2941         polling_hba_ccb_retry:
2942         poll_count++;
2943         outbound_intstatus = readl(&reg->outbound_intstatus) & acb->outbound_int_enable;
2944         writel(outbound_intstatus, &reg->outbound_intstatus);/*clear interrupt*/
2945         while (1) {
2946                 if ((flag_ccb = readl(&reg->outbound_queueport)) == 0xFFFFFFFF) {
2947                         if (poll_ccb_done){
2948                                 rtn = SUCCESS;
2949                                 break;
2950                         }else {
2951                                 msleep(25);
2952                                 if (poll_count > 100){
2953                                         rtn = FAILED;
2954                                         break;
2955                                 }
2956                                 goto polling_hba_ccb_retry;
2957                         }
2958                 }
2959                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
2960                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
2961                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
2962                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
2963                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
2964                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
2965                                         " poll command abort successfully \n"
2966                                         , acb->host->host_no
2967                                         , ccb->pcmd->device->id
2968                                         , (u32)ccb->pcmd->device->lun
2969                                         , ccb);
2970                                 ccb->pcmd->result = DID_ABORT << 16;
2971                                 arcmsr_ccb_complete(ccb);
2972                                 continue;
2973                         }
2974                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
2975                                 " command done ccb = '0x%p'"
2976                                 "ccboutstandingcount = %d \n"
2977                                 , acb->host->host_no
2978                                 , ccb
2979                                 , atomic_read(&acb->ccboutstandingcount));
2980                         continue;
2981                 }
2982                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
2983                 arcmsr_report_ccb_state(acb, ccb, error);
2984         }
2985         return rtn;
2986 }
2987 
2988 static int arcmsr_hbaB_polling_ccbdone(struct AdapterControlBlock *acb,
2989                                         struct CommandControlBlock *poll_ccb)
2990 {
2991         struct MessageUnit_B *reg = acb->pmuB;
2992         struct ARCMSR_CDB *arcmsr_cdb;
2993         struct CommandControlBlock *ccb;
2994         uint32_t flag_ccb, poll_ccb_done = 0, poll_count = 0;
2995         int index, rtn;
2996         bool error;
2997         polling_hbb_ccb_retry:
2998 
2999         poll_count++;
3000         /* clear doorbell interrupt */
3001         writel(ARCMSR_DOORBELL_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3002         while(1){
3003                 index = reg->doneq_index;
3004                 flag_ccb = reg->done_qbuffer[index];
3005                 if (flag_ccb == 0) {
3006                         if (poll_ccb_done){
3007                                 rtn = SUCCESS;
3008                                 break;
3009                         }else {
3010                                 msleep(25);
3011                                 if (poll_count > 100){
3012                                         rtn = FAILED;
3013                                         break;
3014                                 }
3015                                 goto polling_hbb_ccb_retry;
3016                         }
3017                 }
3018                 reg->done_qbuffer[index] = 0;
3019                 index++;
3020                 /*if last index number set it to 0 */
3021                 index %= ARCMSR_MAX_HBB_POSTQUEUE;
3022                 reg->doneq_index = index;
3023                 /* check if command done with no error*/
3024                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + (flag_ccb << 5));
3025                 ccb = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3026                 poll_ccb_done |= (ccb == poll_ccb) ? 1 : 0;
3027                 if ((ccb->acb != acb) || (ccb->startdone != ARCMSR_CCB_START)) {
3028                         if ((ccb->startdone == ARCMSR_CCB_ABORTED) || (ccb == poll_ccb)) {
3029                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3030                                         " poll command abort successfully \n"
3031                                         ,acb->host->host_no
3032                                         ,ccb->pcmd->device->id
3033                                         ,(u32)ccb->pcmd->device->lun
3034                                         ,ccb);
3035                                 ccb->pcmd->result = DID_ABORT << 16;
3036                                 arcmsr_ccb_complete(ccb);
3037                                 continue;
3038                         }
3039                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3040                                 " command done ccb = '0x%p'"
3041                                 "ccboutstandingcount = %d \n"
3042                                 , acb->host->host_no
3043                                 , ccb
3044                                 , atomic_read(&acb->ccboutstandingcount));
3045                         continue;
3046                 } 
3047                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE0) ? true : false;
3048                 arcmsr_report_ccb_state(acb, ccb, error);
3049         }
3050         return rtn;
3051 }
3052 
3053 static int arcmsr_hbaC_polling_ccbdone(struct AdapterControlBlock *acb,
3054                 struct CommandControlBlock *poll_ccb)
3055 {
3056         struct MessageUnit_C __iomem *reg = acb->pmuC;
3057         uint32_t flag_ccb, ccb_cdb_phy;
3058         struct ARCMSR_CDB *arcmsr_cdb;
3059         bool error;
3060         struct CommandControlBlock *pCCB;
3061         uint32_t poll_ccb_done = 0, poll_count = 0;
3062         int rtn;
3063 polling_hbc_ccb_retry:
3064         poll_count++;
3065         while (1) {
3066                 if ((readl(&reg->host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) == 0) {
3067                         if (poll_ccb_done) {
3068                                 rtn = SUCCESS;
3069                                 break;
3070                         } else {
3071                                 msleep(25);
3072                                 if (poll_count > 100) {
3073                                         rtn = FAILED;
3074                                         break;
3075                                 }
3076                                 goto polling_hbc_ccb_retry;
3077                         }
3078                 }
3079                 flag_ccb = readl(&reg->outbound_queueport_low);
3080                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3081                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset + ccb_cdb_phy);/*frame must be 32 bytes aligned*/
3082                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock, arcmsr_cdb);
3083                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3084                 /* check ifcommand done with no error*/
3085                 if ((pCCB->acb != acb) || (pCCB->startdone != ARCMSR_CCB_START)) {
3086                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3087                                 printk(KERN_NOTICE "arcmsr%d: scsi id = %d lun = %d ccb = '0x%p'"
3088                                         " poll command abort successfully \n"
3089                                         , acb->host->host_no
3090                                         , pCCB->pcmd->device->id
3091                                         , (u32)pCCB->pcmd->device->lun
3092                                         , pCCB);
3093                                         pCCB->pcmd->result = DID_ABORT << 16;
3094                                         arcmsr_ccb_complete(pCCB);
3095                                 continue;
3096                         }
3097                         printk(KERN_NOTICE "arcmsr%d: polling get an illegal ccb"
3098                                 " command done ccb = '0x%p'"
3099                                 "ccboutstandingcount = %d \n"
3100                                 , acb->host->host_no
3101                                 , pCCB
3102                                 , atomic_read(&acb->ccboutstandingcount));
3103                         continue;
3104                 }
3105                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1) ? true : false;
3106                 arcmsr_report_ccb_state(acb, pCCB, error);
3107         }
3108         return rtn;
3109 }
3110 
3111 static int arcmsr_hbaD_polling_ccbdone(struct AdapterControlBlock *acb,
3112                                 struct CommandControlBlock *poll_ccb)
3113 {
3114         bool error;
3115         uint32_t poll_ccb_done = 0, poll_count = 0, flag_ccb, ccb_cdb_phy;
3116         int rtn, doneq_index, index_stripped, outbound_write_pointer, toggle;
3117         unsigned long flags;
3118         struct ARCMSR_CDB *arcmsr_cdb;
3119         struct CommandControlBlock *pCCB;
3120         struct MessageUnit_D *pmu = acb->pmuD;
3121 
3122 polling_hbaD_ccb_retry:
3123         poll_count++;
3124         while (1) {
3125                 spin_lock_irqsave(&acb->doneq_lock, flags);
3126                 outbound_write_pointer = pmu->done_qbuffer[0].addressLow + 1;
3127                 doneq_index = pmu->doneq_index;
3128                 if ((outbound_write_pointer & 0xFFF) == (doneq_index & 0xFFF)) {
3129                         spin_unlock_irqrestore(&acb->doneq_lock, flags);
3130                         if (poll_ccb_done) {
3131                                 rtn = SUCCESS;
3132                                 break;
3133                         } else {
3134                                 msleep(25);
3135                                 if (poll_count > 40) {
3136                                         rtn = FAILED;
3137                                         break;
3138                                 }
3139                                 goto polling_hbaD_ccb_retry;
3140                         }
3141                 }
3142                 toggle = doneq_index & 0x4000;
3143                 index_stripped = (doneq_index & 0xFFF) + 1;
3144                 index_stripped %= ARCMSR_MAX_ARC1214_DONEQUEUE;
3145                 pmu->doneq_index = index_stripped ? (index_stripped | toggle) :
3146                                 ((toggle ^ 0x4000) + 1);
3147                 doneq_index = pmu->doneq_index;
3148                 spin_unlock_irqrestore(&acb->doneq_lock, flags);
3149                 flag_ccb = pmu->done_qbuffer[doneq_index & 0xFFF].addressLow;
3150                 ccb_cdb_phy = (flag_ccb & 0xFFFFFFF0);
3151                 arcmsr_cdb = (struct ARCMSR_CDB *)(acb->vir2phy_offset +
3152                         ccb_cdb_phy);
3153                 pCCB = container_of(arcmsr_cdb, struct CommandControlBlock,
3154                         arcmsr_cdb);
3155                 poll_ccb_done |= (pCCB == poll_ccb) ? 1 : 0;
3156                 if ((pCCB->acb != acb) ||
3157                         (pCCB->startdone != ARCMSR_CCB_START)) {
3158                         if (pCCB->startdone == ARCMSR_CCB_ABORTED) {
3159                                 pr_notice("arcmsr%d: scsi id = %d "
3160                                         "lun = %d ccb = '0x%p' poll command "
3161                                         "abort successfully\n"
3162                                         , acb->host->host_no
3163                                         , pCCB->pcmd->device->id
3164                                         , (u32)pCCB->pcmd->device->lun
3165                                         , pCCB);
3166                                 pCCB->pcmd->result = DID_ABORT << 16;
3167                                 arcmsr_ccb_complete(pCCB);
3168                                 continue;
3169                         }
3170                         pr_notice("arcmsr%d: polling an illegal "
3171                                 "ccb command done ccb = '0x%p' "
3172                                 "ccboutstandingcount = %d\n"
3173                                 , acb->host->host_no
3174                                 , pCCB
3175                                 , atomic_read(&acb->ccboutstandingcount));
3176                         continue;
3177                 }
3178                 error = (flag_ccb & ARCMSR_CCBREPLY_FLAG_ERROR_MODE1)
3179                         ? true : false;
3180                 arcmsr_report_ccb_state(acb, pCCB, error);
3181         }
3182         return rtn;
3183 }
3184 
3185 static int arcmsr_polling_ccbdone(struct AdapterControlBlock *acb,
3186                                         struct CommandControlBlock *poll_ccb)
3187 {
3188         int rtn = 0;
3189         switch (acb->adapter_type) {
3190 
3191         case ACB_ADAPTER_TYPE_A: {
3192                 rtn = arcmsr_hbaA_polling_ccbdone(acb, poll_ccb);
3193                 }
3194                 break;
3195 
3196         case ACB_ADAPTER_TYPE_B: {
3197                 rtn = arcmsr_hbaB_polling_ccbdone(acb, poll_ccb);
3198                 }
3199                 break;
3200         case ACB_ADAPTER_TYPE_C: {
3201                 rtn = arcmsr_hbaC_polling_ccbdone(acb, poll_ccb);
3202                 }
3203                 break;
3204         case ACB_ADAPTER_TYPE_D:
3205                 rtn = arcmsr_hbaD_polling_ccbdone(acb, poll_ccb);
3206                 break;
3207         }
3208         return rtn;
3209 }
3210 
3211 static int arcmsr_iop_confirm(struct AdapterControlBlock *acb)
3212 {
3213         uint32_t cdb_phyaddr, cdb_phyaddr_hi32;
3214         dma_addr_t dma_coherent_handle;
3215 
3216         /*
3217         ********************************************************************
3218         ** here we need to tell iop 331 our freeccb.HighPart
3219         ** if freeccb.HighPart is not zero
3220         ********************************************************************
3221         */
3222         switch (acb->adapter_type) {
3223         case ACB_ADAPTER_TYPE_B:
3224         case ACB_ADAPTER_TYPE_D:
3225                 dma_coherent_handle = acb->dma_coherent_handle2;
3226                 break;
3227         default:
3228                 dma_coherent_handle = acb->dma_coherent_handle;
3229                 break;
3230         }
3231         cdb_phyaddr = lower_32_bits(dma_coherent_handle);
3232         cdb_phyaddr_hi32 = upper_32_bits(dma_coherent_handle);
3233         acb->cdb_phyaddr_hi32 = cdb_phyaddr_hi32;
3234         /*
3235         ***********************************************************************
3236         **    if adapter type B, set window of "post command Q"
3237         ***********************************************************************
3238         */
3239         switch (acb->adapter_type) {
3240 
3241         case ACB_ADAPTER_TYPE_A: {
3242                 if (cdb_phyaddr_hi32 != 0) {
3243                         struct MessageUnit_A __iomem *reg = acb->pmuA;
3244                         writel(ARCMSR_SIGNATURE_SET_CONFIG, \
3245                                                 &reg->message_rwbuffer[0]);
3246                         writel(cdb_phyaddr_hi32, &reg->message_rwbuffer[1]);
3247                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, \
3248                                                         &reg->inbound_msgaddr0);
3249                         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3250                                 printk(KERN_NOTICE "arcmsr%d: ""set ccb high \
3251                                 part physical address timeout\n",
3252                                 acb->host->host_no);
3253                                 return 1;
3254                         }
3255                 }
3256                 }
3257                 break;
3258 
3259         case ACB_ADAPTER_TYPE_B: {
3260                 uint32_t __iomem *rwbuffer;
3261 
3262                 struct MessageUnit_B *reg = acb->pmuB;
3263                 reg->postq_index = 0;
3264                 reg->doneq_index = 0;
3265                 writel(ARCMSR_MESSAGE_SET_POST_WINDOW, reg->drv2iop_doorbell);
3266                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3267                         printk(KERN_NOTICE "arcmsr%d:can not set diver mode\n", \
3268                                 acb->host->host_no);
3269                         return 1;
3270                 }
3271                 rwbuffer = reg->message_rwbuffer;
3272                 /* driver "set config" signature */
3273                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3274                 /* normal should be zero */
3275                 writel(cdb_phyaddr_hi32, rwbuffer++);
3276                 /* postQ size (256 + 8)*4        */
3277                 writel(cdb_phyaddr, rwbuffer++);
3278                 /* doneQ size (256 + 8)*4        */
3279                 writel(cdb_phyaddr + 1056, rwbuffer++);
3280                 /* ccb maxQ size must be --> [(256 + 8)*4]*/
3281                 writel(1056, rwbuffer);
3282 
3283                 writel(ARCMSR_MESSAGE_SET_CONFIG, reg->drv2iop_doorbell);
3284                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3285                         printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3286                         timeout \n",acb->host->host_no);
3287                         return 1;
3288                 }
3289                 writel(ARCMSR_MESSAGE_START_DRIVER_MODE, reg->drv2iop_doorbell);
3290                 if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3291                         pr_err("arcmsr%d: can't set driver mode.\n",
3292                                 acb->host->host_no);
3293                         return 1;
3294                 }
3295                 }
3296                 break;
3297         case ACB_ADAPTER_TYPE_C: {
3298                 if (cdb_phyaddr_hi32 != 0) {
3299                         struct MessageUnit_C __iomem *reg = acb->pmuC;
3300 
3301                         printk(KERN_NOTICE "arcmsr%d: cdb_phyaddr_hi32=0x%x\n",
3302                                         acb->adapter_index, cdb_phyaddr_hi32);
3303                         writel(ARCMSR_SIGNATURE_SET_CONFIG, &reg->msgcode_rwbuffer[0]);
3304                         writel(cdb_phyaddr_hi32, &reg->msgcode_rwbuffer[1]);
3305                         writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, &reg->inbound_msgaddr0);
3306                         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3307                         if (!arcmsr_hbaC_wait_msgint_ready(acb)) {
3308                                 printk(KERN_NOTICE "arcmsr%d: 'set command Q window' \
3309                                 timeout \n", acb->host->host_no);
3310                                 return 1;
3311                         }
3312                 }
3313                 }
3314                 break;
3315         case ACB_ADAPTER_TYPE_D: {
3316                 uint32_t __iomem *rwbuffer;
3317                 struct MessageUnit_D *reg = acb->pmuD;
3318                 reg->postq_index = 0;
3319                 reg->doneq_index = 0;
3320                 rwbuffer = reg->msgcode_rwbuffer;
3321                 writel(ARCMSR_SIGNATURE_SET_CONFIG, rwbuffer++);
3322                 writel(cdb_phyaddr_hi32, rwbuffer++);
3323                 writel(cdb_phyaddr, rwbuffer++);
3324                 writel(cdb_phyaddr + (ARCMSR_MAX_ARC1214_POSTQUEUE *
3325                         sizeof(struct InBound_SRB)), rwbuffer++);
3326                 writel(0x100, rwbuffer);
3327                 writel(ARCMSR_INBOUND_MESG0_SET_CONFIG, reg->inbound_msgaddr0);
3328                 if (!arcmsr_hbaD_wait_msgint_ready(acb)) {
3329                         pr_notice("arcmsr%d: 'set command Q window' timeout\n",
3330                                 acb->host->host_no);
3331                         return 1;
3332                 }
3333                 }
3334                 break;
3335         }
3336         return 0;
3337 }
3338 
3339 static void arcmsr_wait_firmware_ready(struct AdapterControlBlock *acb)
3340 {
3341         uint32_t firmware_state = 0;
3342         switch (acb->adapter_type) {
3343 
3344         case ACB_ADAPTER_TYPE_A: {
3345                 struct MessageUnit_A __iomem *reg = acb->pmuA;
3346                 do {
3347                         firmware_state = readl(&reg->outbound_msgaddr1);
3348                 } while ((firmware_state & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0);
3349                 }
3350                 break;
3351 
3352         case ACB_ADAPTER_TYPE_B: {
3353                 struct MessageUnit_B *reg = acb->pmuB;
3354                 do {
3355                         firmware_state = readl(reg->iop2drv_doorbell);
3356                 } while ((firmware_state & ARCMSR_MESSAGE_FIRMWARE_OK) == 0);
3357                 writel(ARCMSR_DRV2IOP_END_OF_INTERRUPT, reg->drv2iop_doorbell);
3358                 }
3359                 break;
3360         case ACB_ADAPTER_TYPE_C: {
3361                 struct MessageUnit_C __iomem *reg = acb->pmuC;
3362                 do {
3363                         firmware_state = readl(&reg->outbound_msgaddr1);
3364                 } while ((firmware_state & ARCMSR_HBCMU_MESSAGE_FIRMWARE_OK) == 0);
3365                 }
3366                 break;
3367         case ACB_ADAPTER_TYPE_D: {
3368                 struct MessageUnit_D *reg = acb->pmuD;
3369                 do {
3370                         firmware_state = readl(reg->outbound_msgaddr1);
3371                 } while ((firmware_state &
3372                         ARCMSR_ARC1214_MESSAGE_FIRMWARE_OK) == 0);
3373                 }
3374                 break;
3375         }
3376 }
3377 
3378 static void arcmsr_hbaA_request_device_map(struct AdapterControlBlock *acb)
3379 {
3380         struct MessageUnit_A __iomem *reg = acb->pmuA;
3381         if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
3382                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3383                 return;
3384         } else {
3385                 acb->fw_flag = FW_NORMAL;
3386                 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)){
3387                         atomic_set(&acb->rq_map_token, 16);
3388                 }
3389                 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
3390                 if (atomic_dec_and_test(&acb->rq_map_token)) {
3391                         mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3392                         return;
3393                 }
3394                 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3395                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3396         }
3397         return;
3398 }
3399 
3400 static void arcmsr_hbaB_request_device_map(struct AdapterControlBlock *acb)
3401 {
3402         struct MessageUnit_B *reg = acb->pmuB;
3403         if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0 ) || ((acb->acb_flags & ACB_F_ABORT) != 0 )){
3404                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3405                 return;
3406         } else {
3407                 acb->fw_flag = FW_NORMAL;
3408                 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
3409                         atomic_set(&acb->rq_map_token, 16);
3410                 }
3411                 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
3412                 if (atomic_dec_and_test(&acb->rq_map_token)) {
3413                         mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3414                         return;
3415                 }
3416                 writel(ARCMSR_MESSAGE_GET_CONFIG, reg->drv2iop_doorbell);
3417                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3418         }
3419         return;
3420 }
3421 
3422 static void arcmsr_hbaC_request_device_map(struct AdapterControlBlock *acb)
3423 {
3424         struct MessageUnit_C __iomem *reg = acb->pmuC;
3425         if (unlikely(atomic_read(&acb->rq_map_token) == 0) || ((acb->acb_flags & ACB_F_BUS_RESET) != 0) || ((acb->acb_flags & ACB_F_ABORT) != 0)) {
3426                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3427                 return;
3428         } else {
3429                 acb->fw_flag = FW_NORMAL;
3430                 if (atomic_read(&acb->ante_token_value) == atomic_read(&acb->rq_map_token)) {
3431                         atomic_set(&acb->rq_map_token, 16);
3432                 }
3433                 atomic_set(&acb->ante_token_value, atomic_read(&acb->rq_map_token));
3434                 if (atomic_dec_and_test(&acb->rq_map_token)) {
3435                         mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3436                         return;
3437                 }
3438                 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG, &reg->inbound_msgaddr0);
3439                 writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &reg->inbound_doorbell);
3440                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3441         }
3442         return;
3443 }
3444 
3445 static void arcmsr_hbaD_request_device_map(struct AdapterControlBlock *acb)
3446 {
3447         struct MessageUnit_D *reg = acb->pmuD;
3448 
3449         if (unlikely(atomic_read(&acb->rq_map_token) == 0) ||
3450                 ((acb->acb_flags & ACB_F_BUS_RESET) != 0) ||
3451                 ((acb->acb_flags & ACB_F_ABORT) != 0)) {
3452                 mod_timer(&acb->eternal_timer,
3453                         jiffies + msecs_to_jiffies(6 * HZ));
3454         } else {
3455                 acb->fw_flag = FW_NORMAL;
3456                 if (atomic_read(&acb->ante_token_value) ==
3457                         atomic_read(&acb->rq_map_token)) {
3458                         atomic_set(&acb->rq_map_token, 16);
3459                 }
3460                 atomic_set(&acb->ante_token_value,
3461                         atomic_read(&acb->rq_map_token));
3462                 if (atomic_dec_and_test(&acb->rq_map_token)) {
3463                         mod_timer(&acb->eternal_timer, jiffies +
3464                                 msecs_to_jiffies(6 * HZ));
3465                         return;
3466                 }
3467                 writel(ARCMSR_INBOUND_MESG0_GET_CONFIG,
3468                         reg->inbound_msgaddr0);
3469                 mod_timer(&acb->eternal_timer, jiffies +
3470                         msecs_to_jiffies(6 * HZ));
3471         }
3472 }
3473 
3474 static void arcmsr_request_device_map(unsigned long pacb)
3475 {
3476         struct AdapterControlBlock *acb = (struct AdapterControlBlock *)pacb;
3477         switch (acb->adapter_type) {
3478                 case ACB_ADAPTER_TYPE_A: {
3479                         arcmsr_hbaA_request_device_map(acb);
3480                 }
3481                 break;
3482                 case ACB_ADAPTER_TYPE_B: {
3483                         arcmsr_hbaB_request_device_map(acb);
3484                 }
3485                 break;
3486                 case ACB_ADAPTER_TYPE_C: {
3487                         arcmsr_hbaC_request_device_map(acb);
3488                 }
3489                 break;
3490                 case ACB_ADAPTER_TYPE_D:
3491                         arcmsr_hbaD_request_device_map(acb);
3492                 break;
3493         }
3494 }
3495 
3496 static void arcmsr_hbaA_start_bgrb(struct AdapterControlBlock *acb)
3497 {
3498         struct MessageUnit_A __iomem *reg = acb->pmuA;
3499         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3500         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &reg->inbound_msgaddr0);
3501         if (!arcmsr_hbaA_wait_msgint_ready(acb)) {
3502                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3503                                 rebulid' timeout \n", acb->host->host_no);
3504         }
3505 }
3506 
3507 static void arcmsr_hbaB_start_bgrb(struct AdapterControlBlock *acb)
3508 {
3509         struct MessageUnit_B *reg = acb->pmuB;
3510         acb->acb_flags |= ACB_F_MSG_START_BGRB;
3511         writel(ARCMSR_MESSAGE_START_BGRB, reg->drv2iop_doorbell);
3512         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3513                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3514                                 rebulid' timeout \n",acb->host->host_no);
3515         }
3516 }
3517 
3518 static void arcmsr_hbaC_start_bgrb(struct AdapterControlBlock *pACB)
3519 {
3520         struct MessageUnit_C __iomem *phbcmu = pACB->pmuC;
3521         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3522         writel(ARCMSR_INBOUND_MESG0_START_BGRB, &phbcmu->inbound_msgaddr0);
3523         writel(ARCMSR_HBCMU_DRV2IOP_MESSAGE_CMD_DONE, &phbcmu->inbound_doorbell);
3524         if (!arcmsr_hbaC_wait_msgint_ready(pACB)) {
3525                 printk(KERN_NOTICE "arcmsr%d: wait 'start adapter background \
3526                                 rebulid' timeout \n", pACB->host->host_no);
3527         }
3528         return;
3529 }
3530 
3531 static void arcmsr_hbaD_start_bgrb(struct AdapterControlBlock *pACB)
3532 {
3533         struct MessageUnit_D *pmu = pACB->pmuD;
3534 
3535         pACB->acb_flags |= ACB_F_MSG_START_BGRB;
3536         writel(ARCMSR_INBOUND_MESG0_START_BGRB, pmu->inbound_msgaddr0);
3537         if (!arcmsr_hbaD_wait_msgint_ready(pACB)) {
3538                 pr_notice("arcmsr%d: wait 'start adapter "
3539                         "background rebulid' timeout\n", pACB->host->host_no);
3540         }
3541 }
3542 
3543 static void arcmsr_start_adapter_bgrb(struct AdapterControlBlock *acb)
3544 {
3545         switch (acb->adapter_type) {
3546         case ACB_ADAPTER_TYPE_A:
3547                 arcmsr_hbaA_start_bgrb(acb);
3548                 break;
3549         case ACB_ADAPTER_TYPE_B:
3550                 arcmsr_hbaB_start_bgrb(acb);
3551                 break;
3552         case ACB_ADAPTER_TYPE_C:
3553                 arcmsr_hbaC_start_bgrb(acb);
3554                 break;
3555         case ACB_ADAPTER_TYPE_D:
3556                 arcmsr_hbaD_start_bgrb(acb);
3557                 break;
3558         }
3559 }
3560 
3561 static void arcmsr_clear_doorbell_queue_buffer(struct AdapterControlBlock *acb)
3562 {
3563         switch (acb->adapter_type) {
3564         case ACB_ADAPTER_TYPE_A: {
3565                 struct MessageUnit_A __iomem *reg = acb->pmuA;
3566                 uint32_t outbound_doorbell;
3567                 /* empty doorbell Qbuffer if door bell ringed */
3568                 outbound_doorbell = readl(&reg->outbound_doorbell);
3569                 /*clear doorbell interrupt */
3570                 writel(outbound_doorbell, &reg->outbound_doorbell);
3571                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
3572                 }
3573                 break;
3574 
3575         case ACB_ADAPTER_TYPE_B: {
3576                 struct MessageUnit_B *reg = acb->pmuB;
3577                 /*clear interrupt and message state*/
3578                 writel(ARCMSR_MESSAGE_INT_CLEAR_PATTERN, reg->iop2drv_doorbell);
3579                 writel(ARCMSR_DRV2IOP_DATA_READ_OK, reg->drv2iop_doorbell);
3580                 /* let IOP know data has been read */
3581                 }
3582                 break;
3583         case ACB_ADAPTER_TYPE_C: {
3584                 struct MessageUnit_C __iomem *reg = acb->pmuC;
3585                 uint32_t outbound_doorbell, i;
3586                 /* empty doorbell Qbuffer if door bell ringed */
3587                 outbound_doorbell = readl(&reg->outbound_doorbell);
3588                 writel(outbound_doorbell, &reg->outbound_doorbell_clear);
3589                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK, &reg->inbound_doorbell);
3590                 for (i = 0; i < 200; i++) {
3591                         msleep(20);
3592                         outbound_doorbell = readl(&reg->outbound_doorbell);
3593                         if (outbound_doorbell &
3594                                 ARCMSR_HBCMU_IOP2DRV_DATA_WRITE_OK) {
3595                                 writel(outbound_doorbell,
3596                                         &reg->outbound_doorbell_clear);
3597                                 writel(ARCMSR_HBCMU_DRV2IOP_DATA_READ_OK,
3598                                         &reg->inbound_doorbell);
3599                         } else
3600                                 break;
3601                 }
3602                 }
3603                 break;
3604         case ACB_ADAPTER_TYPE_D: {
3605                 struct MessageUnit_D *reg = acb->pmuD;
3606                 uint32_t outbound_doorbell, i;
3607                 /* empty doorbell Qbuffer if door bell ringed */
3608                 outbound_doorbell = readl(reg->outbound_doorbell);
3609                 writel(outbound_doorbell, reg->outbound_doorbell);
3610                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
3611                         reg->inbound_doorbell);
3612                 for (i = 0; i < 200; i++) {
3613                         msleep(20);
3614                         outbound_doorbell = readl(reg->outbound_doorbell);
3615                         if (outbound_doorbell &
3616                                 ARCMSR_ARC1214_IOP2DRV_DATA_WRITE_OK) {
3617                                 writel(outbound_doorbell,
3618                                         reg->outbound_doorbell);
3619                                 writel(ARCMSR_ARC1214_DRV2IOP_DATA_OUT_READ,
3620                                         reg->inbound_doorbell);
3621                         } else
3622                                 break;
3623                 }
3624                 }
3625                 break;
3626         }
3627 }
3628 
3629 static void arcmsr_enable_eoi_mode(struct AdapterControlBlock *acb)
3630 {
3631         switch (acb->adapter_type) {
3632         case ACB_ADAPTER_TYPE_A:
3633                 return;
3634         case ACB_ADAPTER_TYPE_B:
3635                 {
3636                         struct MessageUnit_B *reg = acb->pmuB;
3637                         writel(ARCMSR_MESSAGE_ACTIVE_EOI_MODE, reg->drv2iop_doorbell);
3638                         if (!arcmsr_hbaB_wait_msgint_ready(acb)) {
3639                                 printk(KERN_NOTICE "ARCMSR IOP enables EOI_MODE TIMEOUT");
3640                                 return;
3641                         }
3642                 }
3643                 break;
3644         case ACB_ADAPTER_TYPE_C:
3645                 return;
3646         }
3647         return;
3648 }
3649 
3650 static void arcmsr_hardware_reset(struct AdapterControlBlock *acb)
3651 {
3652         uint8_t value[64];
3653         int i, count = 0;
3654         struct MessageUnit_A __iomem *pmuA = acb->pmuA;
3655         struct MessageUnit_C __iomem *pmuC = acb->pmuC;
3656         struct MessageUnit_D *pmuD = acb->pmuD;
3657 
3658         /* backup pci config data */
3659         printk(KERN_NOTICE "arcmsr%d: executing hw bus reset .....\n", acb->host->host_no);
3660         for (i = 0; i < 64; i++) {
3661                 pci_read_config_byte(acb->pdev, i, &value[i]);
3662         }
3663         /* hardware reset signal */
3664         if ((acb->dev_id == 0x1680)) {
3665                 writel(ARCMSR_ARC1680_BUS_RESET, &pmuA->reserved1[0]);
3666         } else if ((acb->dev_id == 0x1880)) {
3667                 do {
3668                         count++;
3669                         writel(0xF, &pmuC->write_sequence);
3670                         writel(0x4, &pmuC->write_sequence);
3671                         writel(0xB, &pmuC->write_sequence);
3672                         writel(0x2, &pmuC->write_sequence);
3673                         writel(0x7, &pmuC->write_sequence);
3674                         writel(0xD, &pmuC->write_sequence);
3675                 } while (((readl(&pmuC->host_diagnostic) & ARCMSR_ARC1880_DiagWrite_ENABLE) == 0) && (count < 5));
3676                 writel(ARCMSR_ARC1880_RESET_ADAPTER, &pmuC->host_diagnostic);
3677         } else if ((acb->dev_id == 0x1214)) {
3678                 writel(0x20, pmuD->reset_request);
3679         } else {
3680                 pci_write_config_byte(acb->pdev, 0x84, 0x20);
3681         }
3682         msleep(2000);
3683         /* write back pci config data */
3684         for (i = 0; i < 64; i++) {
3685                 pci_write_config_byte(acb->pdev, i, value[i]);
3686         }
3687         msleep(1000);
3688         return;
3689 }
3690 static void arcmsr_iop_init(struct AdapterControlBlock *acb)
3691 {
3692         uint32_t intmask_org;
3693         /* disable all outbound interrupt */
3694         intmask_org = arcmsr_disable_outbound_ints(acb);
3695         arcmsr_wait_firmware_ready(acb);
3696         arcmsr_iop_confirm(acb);
3697         /*start background rebuild*/
3698         arcmsr_start_adapter_bgrb(acb);
3699         /* empty doorbell Qbuffer if door bell ringed */
3700         arcmsr_clear_doorbell_queue_buffer(acb);
3701         arcmsr_enable_eoi_mode(acb);
3702         /* enable outbound Post Queue,outbound doorbell Interrupt */
3703         arcmsr_enable_outbound_ints(acb, intmask_org);
3704         acb->acb_flags |= ACB_F_IOP_INITED;
3705 }
3706 
3707 static uint8_t arcmsr_iop_reset(struct AdapterControlBlock *acb)
3708 {
3709         struct CommandControlBlock *ccb;
3710         uint32_t intmask_org;
3711         uint8_t rtnval = 0x00;
3712         int i = 0;
3713         unsigned long flags;
3714 
3715         if (atomic_read(&acb->ccboutstandingcount) != 0) {
3716                 /* disable all outbound interrupt */
3717                 intmask_org = arcmsr_disable_outbound_ints(acb);
3718                 /* talk to iop 331 outstanding command aborted */
3719                 rtnval = arcmsr_abort_allcmd(acb);
3720                 /* clear all outbound posted Q */
3721                 arcmsr_done4abort_postqueue(acb);
3722                 for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3723                         ccb = acb->pccb_pool[i];
3724                         if (ccb->startdone == ARCMSR_CCB_START) {
3725                                 scsi_dma_unmap(ccb->pcmd);
3726                                 ccb->startdone = ARCMSR_CCB_DONE;
3727                                 ccb->ccb_flags = 0;
3728                                 spin_lock_irqsave(&acb->ccblist_lock, flags);
3729                                 list_add_tail(&ccb->list, &acb->ccb_free_list);
3730                                 spin_unlock_irqrestore(&acb->ccblist_lock, flags);
3731                         }
3732                 }
3733                 atomic_set(&acb->ccboutstandingcount, 0);
3734                 /* enable all outbound interrupt */
3735                 arcmsr_enable_outbound_ints(acb, intmask_org);
3736                 return rtnval;
3737         }
3738         return rtnval;
3739 }
3740 
3741 static int arcmsr_bus_reset(struct scsi_cmnd *cmd)
3742 {
3743         struct AdapterControlBlock *acb;
3744         uint32_t intmask_org, outbound_doorbell;
3745         int retry_count = 0;
3746         int rtn = FAILED;
3747         acb = (struct AdapterControlBlock *) cmd->device->host->hostdata;
3748         printk(KERN_ERR "arcmsr: executing bus reset eh.....num_resets = %d, num_aborts = %d \n", acb->num_resets, acb->num_aborts);
3749         acb->num_resets++;
3750 
3751         switch(acb->adapter_type){
3752                 case ACB_ADAPTER_TYPE_A:{
3753                         if (acb->acb_flags & ACB_F_BUS_RESET){
3754                                 long timeout;
3755                                 printk(KERN_ERR "arcmsr: there is an  bus reset eh proceeding.......\n");
3756                                 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
3757                                 if (timeout) {
3758                                         return SUCCESS;
3759                                 }
3760                         }
3761                         acb->acb_flags |= ACB_F_BUS_RESET;
3762                         if (!arcmsr_iop_reset(acb)) {
3763                                 struct MessageUnit_A __iomem *reg;
3764                                 reg = acb->pmuA;
3765                                 arcmsr_hardware_reset(acb);
3766                                 acb->acb_flags &= ~ACB_F_IOP_INITED;
3767 sleep_again:
3768                                 ssleep(ARCMSR_SLEEPTIME);
3769                                 if ((readl(&reg->outbound_msgaddr1) & ARCMSR_OUTBOUND_MESG1_FIRMWARE_OK) == 0) {
3770                                         printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
3771                                         if (retry_count > ARCMSR_RETRYCOUNT) {
3772                                                 acb->fw_flag = FW_DEADLOCK;
3773                                                 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
3774                                                 return FAILED;
3775                                         }
3776                                         retry_count++;
3777                                         goto sleep_again;
3778                                 }
3779                                 acb->acb_flags |= ACB_F_IOP_INITED;
3780                                 /* disable all outbound interrupt */
3781                                 intmask_org = arcmsr_disable_outbound_ints(acb);
3782                                 arcmsr_get_firmware_spec(acb);
3783                                 arcmsr_start_adapter_bgrb(acb);
3784                                 /* clear Qbuffer if door bell ringed */
3785                                 outbound_doorbell = readl(&reg->outbound_doorbell);
3786                                 writel(outbound_doorbell, &reg->outbound_doorbell); /*clear interrupt */
3787                                 writel(ARCMSR_INBOUND_DRIVER_DATA_READ_OK, &reg->inbound_doorbell);
3788                                 /* enable outbound Post Queue,outbound doorbell Interrupt */
3789                                 arcmsr_enable_outbound_ints(acb, intmask_org);
3790                                 atomic_set(&acb->rq_map_token, 16);
3791                                 atomic_set(&acb->ante_token_value, 16);
3792                                 acb->fw_flag = FW_NORMAL;
3793                                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3794                                 acb->acb_flags &= ~ACB_F_BUS_RESET;
3795                                 rtn = SUCCESS;
3796                                 printk(KERN_ERR "arcmsr: scsi  bus reset eh returns with success\n");
3797                         } else {
3798                                 acb->acb_flags &= ~ACB_F_BUS_RESET;
3799                                 atomic_set(&acb->rq_map_token, 16);
3800                                 atomic_set(&acb->ante_token_value, 16);
3801                                 acb->fw_flag = FW_NORMAL;
3802                                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
3803                                 rtn = SUCCESS;
3804                         }
3805                         break;
3806                 }
3807                 case ACB_ADAPTER_TYPE_B:{
3808                         acb->acb_flags |= ACB_F_BUS_RESET;
3809                         if (!arcmsr_iop_reset(acb)) {
3810                                 acb->acb_flags &= ~ACB_F_BUS_RESET;
3811                                 rtn = FAILED;
3812                         } else {
3813                                 acb->acb_flags &= ~ACB_F_BUS_RESET;
3814                                 atomic_set(&acb->rq_map_token, 16);
3815                                 atomic_set(&acb->ante_token_value, 16);
3816                                 acb->fw_flag = FW_NORMAL;
3817                                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3818                                 rtn = SUCCESS;
3819                         }
3820                         break;
3821                 }
3822                 case ACB_ADAPTER_TYPE_C:{
3823                         if (acb->acb_flags & ACB_F_BUS_RESET) {
3824                                 long timeout;
3825                                 printk(KERN_ERR "arcmsr: there is an bus reset eh proceeding.......\n");
3826                                 timeout = wait_event_timeout(wait_q, (acb->acb_flags & ACB_F_BUS_RESET) == 0, 220*HZ);
3827                                 if (timeout) {
3828                                         return SUCCESS;
3829                                 }
3830                         }
3831                         acb->acb_flags |= ACB_F_BUS_RESET;
3832                         if (!arcmsr_iop_reset(acb)) {
3833                                 struct MessageUnit_C __iomem *reg;
3834                                 reg = acb->pmuC;
3835                                 arcmsr_hardware_reset(acb);
3836                                 acb->acb_flags &= ~ACB_F_IOP_INITED;
3837 sleep:
3838                                 ssleep(ARCMSR_SLEEPTIME);
3839                                 if ((readl(&reg->host_diagnostic) & 0x04) != 0) {
3840                                         printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, retry=%d\n", acb->host->host_no, retry_count);
3841                                         if (retry_count > ARCMSR_RETRYCOUNT) {
3842                                                 acb->fw_flag = FW_DEADLOCK;
3843                                                 printk(KERN_ERR "arcmsr%d: waiting for hw bus reset return, RETRY TERMINATED!!\n", acb->host->host_no);
3844                                                 return FAILED;
3845                                         }
3846                                         retry_count++;
3847                                         goto sleep;
3848                                 }
3849                                 acb->acb_flags |= ACB_F_IOP_INITED;
3850                                 /* disable all outbound interrupt */
3851                                 intmask_org = arcmsr_disable_outbound_ints(acb);
3852                                 arcmsr_get_firmware_spec(acb);
3853                                 arcmsr_start_adapter_bgrb(acb);
3854                                 /* clear Qbuffer if door bell ringed */
3855                                 arcmsr_clear_doorbell_queue_buffer(acb);
3856                                 /* enable outbound Post Queue,outbound doorbell Interrupt */
3857                                 arcmsr_enable_outbound_ints(acb, intmask_org);
3858                                 atomic_set(&acb->rq_map_token, 16);
3859                                 atomic_set(&acb->ante_token_value, 16);
3860                                 acb->fw_flag = FW_NORMAL;
3861                                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6 * HZ));
3862                                 acb->acb_flags &= ~ACB_F_BUS_RESET;
3863                                 rtn = SUCCESS;
3864                                 printk(KERN_ERR "arcmsr: scsi bus reset eh returns with success\n");
3865                         } else {
3866                                 acb->acb_flags &= ~ACB_F_BUS_RESET;
3867                                 atomic_set(&acb->rq_map_token, 16);
3868                                 atomic_set(&acb->ante_token_value, 16);
3869                                 acb->fw_flag = FW_NORMAL;
3870                                 mod_timer(&acb->eternal_timer, jiffies + msecs_to_jiffies(6*HZ));
3871                                 rtn = SUCCESS;
3872                         }
3873                         break;
3874                 }
3875                 case ACB_ADAPTER_TYPE_D: {
3876                         if (acb->acb_flags & ACB_F_BUS_RESET) {
3877                                 long timeout;
3878                                 pr_notice("arcmsr: there is an bus reset"
3879                                         " eh proceeding.......\n");
3880                                 timeout = wait_event_timeout(wait_q, (acb->acb_flags
3881                                         & ACB_F_BUS_RESET) == 0, 220 * HZ);
3882                                 if (timeout)
3883                                         return SUCCESS;
3884                         }
3885                         acb->acb_flags |= ACB_F_BUS_RESET;
3886                         if (!arcmsr_iop_reset(acb)) {
3887                                 struct MessageUnit_D *reg;
3888                                 reg = acb->pmuD;
3889                                 arcmsr_hardware_reset(acb);
3890                                 acb->acb_flags &= ~ACB_F_IOP_INITED;
3891                         nap:
3892                                 ssleep(ARCMSR_SLEEPTIME);
3893                                 if ((readl(reg->sample_at_reset) & 0x80) != 0) {
3894                                         pr_err("arcmsr%d: waiting for "
3895                                                 "hw bus reset return, retry=%d\n",
3896                                                 acb->host->host_no, retry_count);
3897                                         if (retry_count > ARCMSR_RETRYCOUNT) {
3898                                                 acb->fw_flag = FW_DEADLOCK;
3899                                                 pr_err("arcmsr%d: waiting for hw bus"
3900                                                         " reset return, "
3901                                                         "RETRY TERMINATED!!\n",
3902                                                         acb->host->host_no);
3903                                                 return FAILED;
3904                                         }
3905                                         retry_count++;
3906                                         goto nap;
3907                                 }
3908                                 acb->acb_flags |= ACB_F_IOP_INITED;
3909                                 /* disable all outbound interrupt */
3910                                 intmask_org = arcmsr_disable_outbound_ints(acb);
3911                                 arcmsr_get_firmware_spec(acb);
3912                                 arcmsr_start_adapter_bgrb(acb);
3913                                 arcmsr_clear_doorbell_queue_buffer(acb);
3914                                 arcmsr_enable_outbound_ints(acb, intmask_org);
3915                                 atomic_set(&acb->rq_map_token, 16);
3916                                 atomic_set(&acb->ante_token_value, 16);
3917                                 acb->fw_flag = FW_NORMAL;
3918                                 mod_timer(&acb->eternal_timer,
3919                                         jiffies + msecs_to_jiffies(6 * HZ));
3920                                 acb->acb_flags &= ~ACB_F_BUS_RESET;
3921                                 rtn = SUCCESS;
3922                                 pr_err("arcmsr: scsi bus reset "
3923                                         "eh returns with success\n");
3924                         } else {
3925                                 acb->acb_flags &= ~ACB_F_BUS_RESET;
3926                                 atomic_set(&acb->rq_map_token, 16);
3927                                 atomic_set(&acb->ante_token_value, 16);
3928                                 acb->fw_flag = FW_NORMAL;
3929                                 mod_timer(&acb->eternal_timer,
3930                                         jiffies + msecs_to_jiffies(6 * HZ));
3931                                 rtn = SUCCESS;
3932                         }
3933                         break;
3934                 }
3935         }
3936         return rtn;
3937 }
3938 
3939 static int arcmsr_abort_one_cmd(struct AdapterControlBlock *acb,
3940                 struct CommandControlBlock *ccb)
3941 {
3942         int rtn;
3943         rtn = arcmsr_polling_ccbdone(acb, ccb);
3944         return rtn;
3945 }
3946 
3947 static int arcmsr_abort(struct scsi_cmnd *cmd)
3948 {
3949         struct AdapterControlBlock *acb =
3950                 (struct AdapterControlBlock *)cmd->device->host->hostdata;
3951         int i = 0;
3952         int rtn = FAILED;
3953         uint32_t intmask_org;
3954 
3955         printk(KERN_NOTICE
3956                 "arcmsr%d: abort device command of scsi id = %d lun = %d\n",
3957                 acb->host->host_no, cmd->device->id, (u32)cmd->device->lun);
3958         acb->acb_flags |= ACB_F_ABORT;
3959         acb->num_aborts++;
3960         /*
3961         ************************************************
3962         ** the all interrupt service routine is locked
3963         ** we need to handle it as soon as possible and exit
3964         ************************************************
3965         */
3966         if (!atomic_read(&acb->ccboutstandingcount)) {
3967                 acb->acb_flags &= ~ACB_F_ABORT;
3968                 return rtn;
3969         }
3970 
3971         intmask_org = arcmsr_disable_outbound_ints(acb);
3972         for (i = 0; i < ARCMSR_MAX_FREECCB_NUM; i++) {
3973                 struct CommandControlBlock *ccb = acb->pccb_pool[i];
3974                 if (ccb->startdone == ARCMSR_CCB_START && ccb->pcmd == cmd) {
3975                         ccb->startdone = ARCMSR_CCB_ABORTED;
3976                         rtn = arcmsr_abort_one_cmd(acb, ccb);
3977                         break;
3978                 }
3979         }
3980         acb->acb_flags &= ~ACB_F_ABORT;
3981         arcmsr_enable_outbound_ints(acb, intmask_org);
3982         return rtn;
3983 }
3984 
3985 static const char *arcmsr_info(struct Scsi_Host *host)
3986 {
3987         struct AdapterControlBlock *acb =
3988                 (struct AdapterControlBlock *) host->hostdata;
3989         static char buf[256];
3990         char *type;
3991         int raid6 = 1;
3992         switch (acb->pdev->device) {
3993         case PCI_DEVICE_ID_ARECA_1110:
3994         case PCI_DEVICE_ID_ARECA_1200:
3995         case PCI_DEVICE_ID_ARECA_1202:
3996         case PCI_DEVICE_ID_ARECA_1210:
3997                 raid6 = 0;
3998                 /*FALLTHRU*/
3999         case PCI_DEVICE_ID_ARECA_1120:
4000         case PCI_DEVICE_ID_ARECA_1130:
4001         case PCI_DEVICE_ID_ARECA_1160:
4002         case PCI_DEVICE_ID_ARECA_1170:
4003         case PCI_DEVICE_ID_ARECA_1201:
4004         case PCI_DEVICE_ID_ARECA_1220:
4005         case PCI_DEVICE_ID_ARECA_1230:
4006         case PCI_DEVICE_ID_ARECA_1260:
4007         case PCI_DEVICE_ID_ARECA_1270:
4008         case PCI_DEVICE_ID_ARECA_1280:
4009                 type = "SATA";
4010                 break;
4011         case PCI_DEVICE_ID_ARECA_1214:
4012         case PCI_DEVICE_ID_ARECA_1380:
4013         case PCI_DEVICE_ID_ARECA_1381:
4014         case PCI_DEVICE_ID_ARECA_1680:
4015         case PCI_DEVICE_ID_ARECA_1681:
4016         case PCI_DEVICE_ID_ARECA_1880:
4017                 type = "SAS/SATA";
4018                 break;
4019         default:
4020                 type = "unknown";
4021                 raid6 = 0;
4022                 break;
4023         }
4024         sprintf(buf, "Areca %s RAID Controller %s\narcmsr version %s\n",
4025                 type, raid6 ? "(RAID6 capable)" : "", ARCMSR_DRIVER_VERSION);
4026         return buf;
4027 }
4028 

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