Version:  2.0.40 2.2.26 2.4.37 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18

Linux/drivers/rtc/rtc-omap.c

  1 /*
  2  * TI OMAP1 Real Time Clock interface for Linux
  3  *
  4  * Copyright (C) 2003 MontaVista Software, Inc.
  5  * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6  *
  7  * Copyright (C) 2006 David Brownell (new RTC framework)
  8  *
  9  * This program is free software; you can redistribute it and/or
 10  * modify it under the terms of the GNU General Public License
 11  * as published by the Free Software Foundation; either version
 12  * 2 of the License, or (at your option) any later version.
 13  */
 14 
 15 #include <linux/kernel.h>
 16 #include <linux/init.h>
 17 #include <linux/module.h>
 18 #include <linux/ioport.h>
 19 #include <linux/delay.h>
 20 #include <linux/rtc.h>
 21 #include <linux/bcd.h>
 22 #include <linux/platform_device.h>
 23 #include <linux/of.h>
 24 #include <linux/of_device.h>
 25 #include <linux/pm_runtime.h>
 26 #include <linux/io.h>
 27 
 28 /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
 29  * with century-range alarm matching, driven by the 32kHz clock.
 30  *
 31  * The main user-visible ways it differs from PC RTCs are by omitting
 32  * "don't care" alarm fields and sub-second periodic IRQs, and having
 33  * an autoadjust mechanism to calibrate to the true oscillator rate.
 34  *
 35  * Board-specific wiring options include using split power mode with
 36  * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
 37  * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
 38  * low power modes) for OMAP1 boards (OMAP-L138 has this built into
 39  * the SoC). See the BOARD-SPECIFIC CUSTOMIZATION comment.
 40  */
 41 
 42 #define DRIVER_NAME                     "omap_rtc"
 43 
 44 #define OMAP_RTC_BASE                   0xfffb4800
 45 
 46 /* RTC registers */
 47 #define OMAP_RTC_SECONDS_REG            0x00
 48 #define OMAP_RTC_MINUTES_REG            0x04
 49 #define OMAP_RTC_HOURS_REG              0x08
 50 #define OMAP_RTC_DAYS_REG               0x0C
 51 #define OMAP_RTC_MONTHS_REG             0x10
 52 #define OMAP_RTC_YEARS_REG              0x14
 53 #define OMAP_RTC_WEEKS_REG              0x18
 54 
 55 #define OMAP_RTC_ALARM_SECONDS_REG      0x20
 56 #define OMAP_RTC_ALARM_MINUTES_REG      0x24
 57 #define OMAP_RTC_ALARM_HOURS_REG        0x28
 58 #define OMAP_RTC_ALARM_DAYS_REG         0x2c
 59 #define OMAP_RTC_ALARM_MONTHS_REG       0x30
 60 #define OMAP_RTC_ALARM_YEARS_REG        0x34
 61 
 62 #define OMAP_RTC_CTRL_REG               0x40
 63 #define OMAP_RTC_STATUS_REG             0x44
 64 #define OMAP_RTC_INTERRUPTS_REG         0x48
 65 
 66 #define OMAP_RTC_COMP_LSB_REG           0x4c
 67 #define OMAP_RTC_COMP_MSB_REG           0x50
 68 #define OMAP_RTC_OSC_REG                0x54
 69 
 70 #define OMAP_RTC_KICK0_REG              0x6c
 71 #define OMAP_RTC_KICK1_REG              0x70
 72 
 73 #define OMAP_RTC_IRQWAKEEN              0x7c
 74 
 75 /* OMAP_RTC_CTRL_REG bit fields: */
 76 #define OMAP_RTC_CTRL_SPLIT             BIT(7)
 77 #define OMAP_RTC_CTRL_DISABLE           BIT(6)
 78 #define OMAP_RTC_CTRL_SET_32_COUNTER    BIT(5)
 79 #define OMAP_RTC_CTRL_TEST              BIT(4)
 80 #define OMAP_RTC_CTRL_MODE_12_24        BIT(3)
 81 #define OMAP_RTC_CTRL_AUTO_COMP         BIT(2)
 82 #define OMAP_RTC_CTRL_ROUND_30S         BIT(1)
 83 #define OMAP_RTC_CTRL_STOP              BIT(0)
 84 
 85 /* OMAP_RTC_STATUS_REG bit fields: */
 86 #define OMAP_RTC_STATUS_POWER_UP        BIT(7)
 87 #define OMAP_RTC_STATUS_ALARM           BIT(6)
 88 #define OMAP_RTC_STATUS_1D_EVENT        BIT(5)
 89 #define OMAP_RTC_STATUS_1H_EVENT        BIT(4)
 90 #define OMAP_RTC_STATUS_1M_EVENT        BIT(3)
 91 #define OMAP_RTC_STATUS_1S_EVENT        BIT(2)
 92 #define OMAP_RTC_STATUS_RUN             BIT(1)
 93 #define OMAP_RTC_STATUS_BUSY            BIT(0)
 94 
 95 /* OMAP_RTC_INTERRUPTS_REG bit fields: */
 96 #define OMAP_RTC_INTERRUPTS_IT_ALARM    BIT(3)
 97 #define OMAP_RTC_INTERRUPTS_IT_TIMER    BIT(2)
 98 
 99 /* OMAP_RTC_OSC_REG bit fields: */
100 #define OMAP_RTC_OSC_32KCLK_EN          BIT(6)
101 
102 /* OMAP_RTC_IRQWAKEEN bit fields: */
103 #define OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN BIT(1)
104 
105 /* OMAP_RTC_KICKER values */
106 #define KICK0_VALUE                     0x83e70b13
107 #define KICK1_VALUE                     0x95a4f1e0
108 
109 #define OMAP_RTC_HAS_KICKER             BIT(0)
110 
111 /*
112  * Few RTC IP revisions has special WAKE-EN Register to enable Wakeup
113  * generation for event Alarm.
114  */
115 #define OMAP_RTC_HAS_IRQWAKEEN          BIT(1)
116 
117 /*
118  * Some RTC IP revisions (like those in AM335x and DRA7x) need
119  * the 32KHz clock to be explicitly enabled.
120  */
121 #define OMAP_RTC_HAS_32KCLK_EN          BIT(2)
122 
123 static void __iomem     *rtc_base;
124 
125 #define rtc_read(addr)          readb(rtc_base + (addr))
126 #define rtc_write(val, addr)    writeb(val, rtc_base + (addr))
127 
128 #define rtc_writel(val, addr)   writel(val, rtc_base + (addr))
129 
130 
131 /* we rely on the rtc framework to handle locking (rtc->ops_lock),
132  * so the only other requirement is that register accesses which
133  * require BUSY to be clear are made with IRQs locally disabled
134  */
135 static void rtc_wait_not_busy(void)
136 {
137         int     count = 0;
138         u8      status;
139 
140         /* BUSY may stay active for 1/32768 second (~30 usec) */
141         for (count = 0; count < 50; count++) {
142                 status = rtc_read(OMAP_RTC_STATUS_REG);
143                 if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
144                         break;
145                 udelay(1);
146         }
147         /* now we have ~15 usec to read/write various registers */
148 }
149 
150 static irqreturn_t rtc_irq(int irq, void *rtc)
151 {
152         unsigned long           events = 0;
153         u8                      irq_data;
154 
155         irq_data = rtc_read(OMAP_RTC_STATUS_REG);
156 
157         /* alarm irq? */
158         if (irq_data & OMAP_RTC_STATUS_ALARM) {
159                 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
160                 events |= RTC_IRQF | RTC_AF;
161         }
162 
163         /* 1/sec periodic/update irq? */
164         if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
165                 events |= RTC_IRQF | RTC_UF;
166 
167         rtc_update_irq(rtc, 1, events);
168 
169         return IRQ_HANDLED;
170 }
171 
172 static int omap_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
173 {
174         u8 reg, irqwake_reg = 0;
175         struct platform_device *pdev = to_platform_device(dev);
176         const struct platform_device_id *id_entry =
177                                         platform_get_device_id(pdev);
178 
179         local_irq_disable();
180         rtc_wait_not_busy();
181         reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
182         if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
183                 irqwake_reg = rtc_read(OMAP_RTC_IRQWAKEEN);
184 
185         if (enabled) {
186                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
187                 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
188         } else {
189                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
190                 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
191         }
192         rtc_wait_not_busy();
193         rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
194         if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
195                 rtc_write(irqwake_reg, OMAP_RTC_IRQWAKEEN);
196         local_irq_enable();
197 
198         return 0;
199 }
200 
201 /* this hardware doesn't support "don't care" alarm fields */
202 static int tm2bcd(struct rtc_time *tm)
203 {
204         if (rtc_valid_tm(tm) != 0)
205                 return -EINVAL;
206 
207         tm->tm_sec = bin2bcd(tm->tm_sec);
208         tm->tm_min = bin2bcd(tm->tm_min);
209         tm->tm_hour = bin2bcd(tm->tm_hour);
210         tm->tm_mday = bin2bcd(tm->tm_mday);
211 
212         tm->tm_mon = bin2bcd(tm->tm_mon + 1);
213 
214         /* epoch == 1900 */
215         if (tm->tm_year < 100 || tm->tm_year > 199)
216                 return -EINVAL;
217         tm->tm_year = bin2bcd(tm->tm_year - 100);
218 
219         return 0;
220 }
221 
222 static void bcd2tm(struct rtc_time *tm)
223 {
224         tm->tm_sec = bcd2bin(tm->tm_sec);
225         tm->tm_min = bcd2bin(tm->tm_min);
226         tm->tm_hour = bcd2bin(tm->tm_hour);
227         tm->tm_mday = bcd2bin(tm->tm_mday);
228         tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
229         /* epoch == 1900 */
230         tm->tm_year = bcd2bin(tm->tm_year) + 100;
231 }
232 
233 
234 static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
235 {
236         /* we don't report wday/yday/isdst ... */
237         local_irq_disable();
238         rtc_wait_not_busy();
239 
240         tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
241         tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
242         tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
243         tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
244         tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
245         tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
246 
247         local_irq_enable();
248 
249         bcd2tm(tm);
250         return 0;
251 }
252 
253 static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
254 {
255         if (tm2bcd(tm) < 0)
256                 return -EINVAL;
257         local_irq_disable();
258         rtc_wait_not_busy();
259 
260         rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
261         rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
262         rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
263         rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
264         rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
265         rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
266 
267         local_irq_enable();
268 
269         return 0;
270 }
271 
272 static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
273 {
274         local_irq_disable();
275         rtc_wait_not_busy();
276 
277         alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
278         alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
279         alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
280         alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
281         alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
282         alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
283 
284         local_irq_enable();
285 
286         bcd2tm(&alm->time);
287         alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
288                         & OMAP_RTC_INTERRUPTS_IT_ALARM);
289 
290         return 0;
291 }
292 
293 static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
294 {
295         u8 reg, irqwake_reg = 0;
296         struct platform_device *pdev = to_platform_device(dev);
297         const struct platform_device_id *id_entry =
298                                         platform_get_device_id(pdev);
299 
300         if (tm2bcd(&alm->time) < 0)
301                 return -EINVAL;
302 
303         local_irq_disable();
304         rtc_wait_not_busy();
305 
306         rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
307         rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
308         rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
309         rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
310         rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
311         rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
312 
313         reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
314         if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
315                 irqwake_reg = rtc_read(OMAP_RTC_IRQWAKEEN);
316 
317         if (alm->enabled) {
318                 reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
319                 irqwake_reg |= OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
320         } else {
321                 reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
322                 irqwake_reg &= ~OMAP_RTC_IRQWAKEEN_ALARM_WAKEEN;
323         }
324         rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
325         if (id_entry->driver_data & OMAP_RTC_HAS_IRQWAKEEN)
326                 rtc_write(irqwake_reg, OMAP_RTC_IRQWAKEEN);
327 
328         local_irq_enable();
329 
330         return 0;
331 }
332 
333 static struct rtc_class_ops omap_rtc_ops = {
334         .read_time      = omap_rtc_read_time,
335         .set_time       = omap_rtc_set_time,
336         .read_alarm     = omap_rtc_read_alarm,
337         .set_alarm      = omap_rtc_set_alarm,
338         .alarm_irq_enable = omap_rtc_alarm_irq_enable,
339 };
340 
341 static int omap_rtc_alarm;
342 static int omap_rtc_timer;
343 
344 #define OMAP_RTC_DATA_AM3352_IDX        1
345 #define OMAP_RTC_DATA_DA830_IDX         2
346 
347 static struct platform_device_id omap_rtc_devtype[] = {
348         {
349                 .name   = DRIVER_NAME,
350         },
351         [OMAP_RTC_DATA_AM3352_IDX] = {
352                 .name   = "am3352-rtc",
353                 .driver_data = OMAP_RTC_HAS_KICKER | OMAP_RTC_HAS_IRQWAKEEN |
354                                OMAP_RTC_HAS_32KCLK_EN,
355         },
356         [OMAP_RTC_DATA_DA830_IDX] = {
357                 .name   = "da830-rtc",
358                 .driver_data = OMAP_RTC_HAS_KICKER,
359         },
360         {},
361 };
362 MODULE_DEVICE_TABLE(platform, omap_rtc_devtype);
363 
364 static const struct of_device_id omap_rtc_of_match[] = {
365         {       .compatible     = "ti,da830-rtc",
366                 .data           = &omap_rtc_devtype[OMAP_RTC_DATA_DA830_IDX],
367         },
368         {       .compatible     = "ti,am3352-rtc",
369                 .data           = &omap_rtc_devtype[OMAP_RTC_DATA_AM3352_IDX],
370         },
371         {},
372 };
373 MODULE_DEVICE_TABLE(of, omap_rtc_of_match);
374 
375 static int __init omap_rtc_probe(struct platform_device *pdev)
376 {
377         struct resource         *res;
378         struct rtc_device       *rtc;
379         u8                      reg, new_ctrl;
380         const struct platform_device_id *id_entry;
381         const struct of_device_id *of_id;
382 
383         of_id = of_match_device(omap_rtc_of_match, &pdev->dev);
384         if (of_id)
385                 pdev->id_entry = of_id->data;
386 
387         id_entry = platform_get_device_id(pdev);
388         if (!id_entry) {
389                 dev_err(&pdev->dev, "no matching device entry\n");
390                 return -ENODEV;
391         }
392 
393         omap_rtc_timer = platform_get_irq(pdev, 0);
394         if (omap_rtc_timer <= 0) {
395                 pr_debug("%s: no update irq?\n", pdev->name);
396                 return -ENOENT;
397         }
398 
399         omap_rtc_alarm = platform_get_irq(pdev, 1);
400         if (omap_rtc_alarm <= 0) {
401                 pr_debug("%s: no alarm irq?\n", pdev->name);
402                 return -ENOENT;
403         }
404 
405         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
406         rtc_base = devm_ioremap_resource(&pdev->dev, res);
407         if (IS_ERR(rtc_base))
408                 return PTR_ERR(rtc_base);
409 
410         /* Enable the clock/module so that we can access the registers */
411         pm_runtime_enable(&pdev->dev);
412         pm_runtime_get_sync(&pdev->dev);
413 
414         if (id_entry->driver_data & OMAP_RTC_HAS_KICKER) {
415                 rtc_writel(KICK0_VALUE, OMAP_RTC_KICK0_REG);
416                 rtc_writel(KICK1_VALUE, OMAP_RTC_KICK1_REG);
417         }
418 
419         rtc = devm_rtc_device_register(&pdev->dev, pdev->name,
420                         &omap_rtc_ops, THIS_MODULE);
421         if (IS_ERR(rtc)) {
422                 pr_debug("%s: can't register RTC device, err %ld\n",
423                         pdev->name, PTR_ERR(rtc));
424                 goto fail0;
425         }
426         platform_set_drvdata(pdev, rtc);
427 
428         /* clear pending irqs, and set 1/second periodic,
429          * which we'll use instead of update irqs
430          */
431         rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
432 
433         /* enable RTC functional clock */
434         if (id_entry->driver_data & OMAP_RTC_HAS_32KCLK_EN)
435                 rtc_writel(OMAP_RTC_OSC_32KCLK_EN, OMAP_RTC_OSC_REG);
436 
437         /* clear old status */
438         reg = rtc_read(OMAP_RTC_STATUS_REG);
439         if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
440                 pr_info("%s: RTC power up reset detected\n",
441                         pdev->name);
442                 rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
443         }
444         if (reg & (u8) OMAP_RTC_STATUS_ALARM)
445                 rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
446 
447         /* handle periodic and alarm irqs */
448         if (devm_request_irq(&pdev->dev, omap_rtc_timer, rtc_irq, 0,
449                         dev_name(&rtc->dev), rtc)) {
450                 pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
451                         pdev->name, omap_rtc_timer);
452                 goto fail0;
453         }
454         if ((omap_rtc_timer != omap_rtc_alarm) &&
455                 (devm_request_irq(&pdev->dev, omap_rtc_alarm, rtc_irq, 0,
456                         dev_name(&rtc->dev), rtc))) {
457                 pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
458                         pdev->name, omap_rtc_alarm);
459                 goto fail0;
460         }
461 
462         /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
463         reg = rtc_read(OMAP_RTC_CTRL_REG);
464         if (reg & (u8) OMAP_RTC_CTRL_STOP)
465                 pr_info("%s: already running\n", pdev->name);
466 
467         /* force to 24 hour mode */
468         new_ctrl = reg & (OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
469         new_ctrl |= OMAP_RTC_CTRL_STOP;
470 
471         /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
472          *
473          *  - Device wake-up capability setting should come through chip
474          *    init logic. OMAP1 boards should initialize the "wakeup capable"
475          *    flag in the platform device if the board is wired right for
476          *    being woken up by RTC alarm. For OMAP-L138, this capability
477          *    is built into the SoC by the "Deep Sleep" capability.
478          *
479          *  - Boards wired so RTC_ON_nOFF is used as the reset signal,
480          *    rather than nPWRON_RESET, should forcibly enable split
481          *    power mode.  (Some chip errata report that RTC_CTRL_SPLIT
482          *    is write-only, and always reads as zero...)
483          */
484 
485         device_init_wakeup(&pdev->dev, true);
486 
487         if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
488                 pr_info("%s: split power mode\n", pdev->name);
489 
490         if (reg != new_ctrl)
491                 rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
492 
493         return 0;
494 
495 fail0:
496         if (id_entry->driver_data & OMAP_RTC_HAS_KICKER)
497                 rtc_writel(0, OMAP_RTC_KICK0_REG);
498         pm_runtime_put_sync(&pdev->dev);
499         pm_runtime_disable(&pdev->dev);
500         return -EIO;
501 }
502 
503 static int __exit omap_rtc_remove(struct platform_device *pdev)
504 {
505         const struct platform_device_id *id_entry =
506                                 platform_get_device_id(pdev);
507 
508         device_init_wakeup(&pdev->dev, 0);
509 
510         /* leave rtc running, but disable irqs */
511         rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
512 
513         if (id_entry->driver_data & OMAP_RTC_HAS_KICKER)
514                 rtc_writel(0, OMAP_RTC_KICK0_REG);
515 
516         /* Disable the clock/module */
517         pm_runtime_put_sync(&pdev->dev);
518         pm_runtime_disable(&pdev->dev);
519 
520         return 0;
521 }
522 
523 #ifdef CONFIG_PM_SLEEP
524 static u8 irqstat;
525 
526 static int omap_rtc_suspend(struct device *dev)
527 {
528         irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
529 
530         /* FIXME the RTC alarm is not currently acting as a wakeup event
531          * source on some platforms, and in fact this enable() call is just
532          * saving a flag that's never used...
533          */
534         if (device_may_wakeup(dev))
535                 enable_irq_wake(omap_rtc_alarm);
536         else
537                 rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
538 
539         /* Disable the clock/module */
540         pm_runtime_put_sync(dev);
541 
542         return 0;
543 }
544 
545 static int omap_rtc_resume(struct device *dev)
546 {
547         /* Enable the clock/module so that we can access the registers */
548         pm_runtime_get_sync(dev);
549 
550         if (device_may_wakeup(dev))
551                 disable_irq_wake(omap_rtc_alarm);
552         else
553                 rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
554 
555         return 0;
556 }
557 #endif
558 
559 static SIMPLE_DEV_PM_OPS(omap_rtc_pm_ops, omap_rtc_suspend, omap_rtc_resume);
560 
561 static void omap_rtc_shutdown(struct platform_device *pdev)
562 {
563         rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
564 }
565 
566 MODULE_ALIAS("platform:omap_rtc");
567 static struct platform_driver omap_rtc_driver = {
568         .remove         = __exit_p(omap_rtc_remove),
569         .shutdown       = omap_rtc_shutdown,
570         .driver         = {
571                 .name   = DRIVER_NAME,
572                 .owner  = THIS_MODULE,
573                 .pm     = &omap_rtc_pm_ops,
574                 .of_match_table = omap_rtc_of_match,
575         },
576         .id_table       = omap_rtc_devtype,
577 };
578 
579 module_platform_driver_probe(omap_rtc_driver, omap_rtc_probe);
580 
581 MODULE_AUTHOR("George G. Davis (and others)");
582 MODULE_LICENSE("GPL");
583 

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