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Linux/drivers/rtc/rtc-ds1307.c

  1 /*
  2  * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3  *
  4  *  Copyright (C) 2005 James Chapman (ds1337 core)
  5  *  Copyright (C) 2006 David Brownell
  6  *  Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7  *  Copyright (C) 2012 Bertrand Achard (nvram access fixes)
  8  *
  9  * This program is free software; you can redistribute it and/or modify
 10  * it under the terms of the GNU General Public License version 2 as
 11  * published by the Free Software Foundation.
 12  */
 13 
 14 #include <linux/bcd.h>
 15 #include <linux/i2c.h>
 16 #include <linux/init.h>
 17 #include <linux/module.h>
 18 #include <linux/rtc/ds1307.h>
 19 #include <linux/rtc.h>
 20 #include <linux/slab.h>
 21 #include <linux/string.h>
 22 #include <linux/hwmon.h>
 23 #include <linux/hwmon-sysfs.h>
 24 #include <linux/clk-provider.h>
 25 
 26 /*
 27  * We can't determine type by probing, but if we expect pre-Linux code
 28  * to have set the chip up as a clock (turning on the oscillator and
 29  * setting the date and time), Linux can ignore the non-clock features.
 30  * That's a natural job for a factory or repair bench.
 31  */
 32 enum ds_type {
 33         ds_1307,
 34         ds_1337,
 35         ds_1338,
 36         ds_1339,
 37         ds_1340,
 38         ds_1388,
 39         ds_3231,
 40         m41t00,
 41         mcp794xx,
 42         rx_8025,
 43         last_ds_type /* always last */
 44         /* rs5c372 too?  different address... */
 45 };
 46 
 47 
 48 /* RTC registers don't differ much, except for the century flag */
 49 #define DS1307_REG_SECS         0x00    /* 00-59 */
 50 #       define DS1307_BIT_CH            0x80
 51 #       define DS1340_BIT_nEOSC         0x80
 52 #       define MCP794XX_BIT_ST          0x80
 53 #define DS1307_REG_MIN          0x01    /* 00-59 */
 54 #define DS1307_REG_HOUR         0x02    /* 00-23, or 1-12{am,pm} */
 55 #       define DS1307_BIT_12HR          0x40    /* in REG_HOUR */
 56 #       define DS1307_BIT_PM            0x20    /* in REG_HOUR */
 57 #       define DS1340_BIT_CENTURY_EN    0x80    /* in REG_HOUR */
 58 #       define DS1340_BIT_CENTURY       0x40    /* in REG_HOUR */
 59 #define DS1307_REG_WDAY         0x03    /* 01-07 */
 60 #       define MCP794XX_BIT_VBATEN      0x08
 61 #define DS1307_REG_MDAY         0x04    /* 01-31 */
 62 #define DS1307_REG_MONTH        0x05    /* 01-12 */
 63 #       define DS1337_BIT_CENTURY       0x80    /* in REG_MONTH */
 64 #define DS1307_REG_YEAR         0x06    /* 00-99 */
 65 
 66 /*
 67  * Other registers (control, status, alarms, trickle charge, NVRAM, etc)
 68  * start at 7, and they differ a LOT. Only control and status matter for
 69  * basic RTC date and time functionality; be careful using them.
 70  */
 71 #define DS1307_REG_CONTROL      0x07            /* or ds1338 */
 72 #       define DS1307_BIT_OUT           0x80
 73 #       define DS1338_BIT_OSF           0x20
 74 #       define DS1307_BIT_SQWE          0x10
 75 #       define DS1307_BIT_RS1           0x02
 76 #       define DS1307_BIT_RS0           0x01
 77 #define DS1337_REG_CONTROL      0x0e
 78 #       define DS1337_BIT_nEOSC         0x80
 79 #       define DS1339_BIT_BBSQI         0x20
 80 #       define DS3231_BIT_BBSQW         0x40 /* same as BBSQI */
 81 #       define DS1337_BIT_RS2           0x10
 82 #       define DS1337_BIT_RS1           0x08
 83 #       define DS1337_BIT_INTCN         0x04
 84 #       define DS1337_BIT_A2IE          0x02
 85 #       define DS1337_BIT_A1IE          0x01
 86 #define DS1340_REG_CONTROL      0x07
 87 #       define DS1340_BIT_OUT           0x80
 88 #       define DS1340_BIT_FT            0x40
 89 #       define DS1340_BIT_CALIB_SIGN    0x20
 90 #       define DS1340_M_CALIBRATION     0x1f
 91 #define DS1340_REG_FLAG         0x09
 92 #       define DS1340_BIT_OSF           0x80
 93 #define DS1337_REG_STATUS       0x0f
 94 #       define DS1337_BIT_OSF           0x80
 95 #       define DS3231_BIT_EN32KHZ       0x08
 96 #       define DS1337_BIT_A2I           0x02
 97 #       define DS1337_BIT_A1I           0x01
 98 #define DS1339_REG_ALARM1_SECS  0x07
 99 
100 #define DS13XX_TRICKLE_CHARGER_MAGIC    0xa0
101 
102 #define RX8025_REG_CTRL1        0x0e
103 #       define RX8025_BIT_2412          0x20
104 #define RX8025_REG_CTRL2        0x0f
105 #       define RX8025_BIT_PON           0x10
106 #       define RX8025_BIT_VDET          0x40
107 #       define RX8025_BIT_XST           0x20
108 
109 
110 struct ds1307 {
111         u8                      offset; /* register's offset */
112         u8                      regs[11];
113         u16                     nvram_offset;
114         struct bin_attribute    *nvram;
115         enum ds_type            type;
116         unsigned long           flags;
117 #define HAS_NVRAM       0               /* bit 0 == sysfs file active */
118 #define HAS_ALARM       1               /* bit 1 == irq claimed */
119         struct i2c_client       *client;
120         struct rtc_device       *rtc;
121         s32 (*read_block_data)(const struct i2c_client *client, u8 command,
122                                u8 length, u8 *values);
123         s32 (*write_block_data)(const struct i2c_client *client, u8 command,
124                                 u8 length, const u8 *values);
125 #ifdef CONFIG_COMMON_CLK
126         struct clk_hw           clks[2];
127 #endif
128 };
129 
130 struct chip_desc {
131         unsigned                alarm:1;
132         u16                     nvram_offset;
133         u16                     nvram_size;
134         u16                     trickle_charger_reg;
135         u8                      trickle_charger_setup;
136         u8                      (*do_trickle_setup)(struct i2c_client *, uint32_t, bool);
137 };
138 
139 static u8 do_trickle_setup_ds1339(struct i2c_client *,
140                                   uint32_t ohms, bool diode);
141 
142 static struct chip_desc chips[last_ds_type] = {
143         [ds_1307] = {
144                 .nvram_offset   = 8,
145                 .nvram_size     = 56,
146         },
147         [ds_1337] = {
148                 .alarm          = 1,
149         },
150         [ds_1338] = {
151                 .nvram_offset   = 8,
152                 .nvram_size     = 56,
153         },
154         [ds_1339] = {
155                 .alarm          = 1,
156                 .trickle_charger_reg = 0x10,
157                 .do_trickle_setup = &do_trickle_setup_ds1339,
158         },
159         [ds_1340] = {
160                 .trickle_charger_reg = 0x08,
161         },
162         [ds_1388] = {
163                 .trickle_charger_reg = 0x0a,
164         },
165         [ds_3231] = {
166                 .alarm          = 1,
167         },
168         [mcp794xx] = {
169                 .alarm          = 1,
170                 /* this is battery backed SRAM */
171                 .nvram_offset   = 0x20,
172                 .nvram_size     = 0x40,
173         },
174 };
175 
176 static const struct i2c_device_id ds1307_id[] = {
177         { "ds1307", ds_1307 },
178         { "ds1337", ds_1337 },
179         { "ds1338", ds_1338 },
180         { "ds1339", ds_1339 },
181         { "ds1388", ds_1388 },
182         { "ds1340", ds_1340 },
183         { "ds3231", ds_3231 },
184         { "m41t00", m41t00 },
185         { "mcp7940x", mcp794xx },
186         { "mcp7941x", mcp794xx },
187         { "pt7c4338", ds_1307 },
188         { "rx8025", rx_8025 },
189         { "isl12057", ds_1337 },
190         { }
191 };
192 MODULE_DEVICE_TABLE(i2c, ds1307_id);
193 
194 /*----------------------------------------------------------------------*/
195 
196 #define BLOCK_DATA_MAX_TRIES 10
197 
198 static s32 ds1307_read_block_data_once(const struct i2c_client *client,
199                                        u8 command, u8 length, u8 *values)
200 {
201         s32 i, data;
202 
203         for (i = 0; i < length; i++) {
204                 data = i2c_smbus_read_byte_data(client, command + i);
205                 if (data < 0)
206                         return data;
207                 values[i] = data;
208         }
209         return i;
210 }
211 
212 static s32 ds1307_read_block_data(const struct i2c_client *client, u8 command,
213                                   u8 length, u8 *values)
214 {
215         u8 oldvalues[255];
216         s32 ret;
217         int tries = 0;
218 
219         dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
220         ret = ds1307_read_block_data_once(client, command, length, values);
221         if (ret < 0)
222                 return ret;
223         do {
224                 if (++tries > BLOCK_DATA_MAX_TRIES) {
225                         dev_err(&client->dev,
226                                 "ds1307_read_block_data failed\n");
227                         return -EIO;
228                 }
229                 memcpy(oldvalues, values, length);
230                 ret = ds1307_read_block_data_once(client, command, length,
231                                                   values);
232                 if (ret < 0)
233                         return ret;
234         } while (memcmp(oldvalues, values, length));
235         return length;
236 }
237 
238 static s32 ds1307_write_block_data(const struct i2c_client *client, u8 command,
239                                    u8 length, const u8 *values)
240 {
241         u8 currvalues[255];
242         int tries = 0;
243 
244         dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
245         do {
246                 s32 i, ret;
247 
248                 if (++tries > BLOCK_DATA_MAX_TRIES) {
249                         dev_err(&client->dev,
250                                 "ds1307_write_block_data failed\n");
251                         return -EIO;
252                 }
253                 for (i = 0; i < length; i++) {
254                         ret = i2c_smbus_write_byte_data(client, command + i,
255                                                         values[i]);
256                         if (ret < 0)
257                                 return ret;
258                 }
259                 ret = ds1307_read_block_data_once(client, command, length,
260                                                   currvalues);
261                 if (ret < 0)
262                         return ret;
263         } while (memcmp(currvalues, values, length));
264         return length;
265 }
266 
267 /*----------------------------------------------------------------------*/
268 
269 /* These RTC devices are not designed to be connected to a SMbus adapter.
270    SMbus limits block operations length to 32 bytes, whereas it's not
271    limited on I2C buses. As a result, accesses may exceed 32 bytes;
272    in that case, split them into smaller blocks */
273 
274 static s32 ds1307_native_smbus_write_block_data(const struct i2c_client *client,
275                                 u8 command, u8 length, const u8 *values)
276 {
277         u8 suboffset = 0;
278 
279         if (length <= I2C_SMBUS_BLOCK_MAX) {
280                 s32 retval = i2c_smbus_write_i2c_block_data(client,
281                                         command, length, values);
282                 if (retval < 0)
283                         return retval;
284                 return length;
285         }
286 
287         while (suboffset < length) {
288                 s32 retval = i2c_smbus_write_i2c_block_data(client,
289                                 command + suboffset,
290                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
291                                 values + suboffset);
292                 if (retval < 0)
293                         return retval;
294 
295                 suboffset += I2C_SMBUS_BLOCK_MAX;
296         }
297         return length;
298 }
299 
300 static s32 ds1307_native_smbus_read_block_data(const struct i2c_client *client,
301                                 u8 command, u8 length, u8 *values)
302 {
303         u8 suboffset = 0;
304 
305         if (length <= I2C_SMBUS_BLOCK_MAX)
306                 return i2c_smbus_read_i2c_block_data(client,
307                                         command, length, values);
308 
309         while (suboffset < length) {
310                 s32 retval = i2c_smbus_read_i2c_block_data(client,
311                                 command + suboffset,
312                                 min(I2C_SMBUS_BLOCK_MAX, length - suboffset),
313                                 values + suboffset);
314                 if (retval < 0)
315                         return retval;
316 
317                 suboffset += I2C_SMBUS_BLOCK_MAX;
318         }
319         return length;
320 }
321 
322 /*----------------------------------------------------------------------*/
323 
324 /*
325  * The ds1337 and ds1339 both have two alarms, but we only use the first
326  * one (with a "seconds" field).  For ds1337 we expect nINTA is our alarm
327  * signal; ds1339 chips have only one alarm signal.
328  */
329 static irqreturn_t ds1307_irq(int irq, void *dev_id)
330 {
331         struct i2c_client       *client = dev_id;
332         struct ds1307           *ds1307 = i2c_get_clientdata(client);
333         struct mutex            *lock = &ds1307->rtc->ops_lock;
334         int                     stat, control;
335 
336         mutex_lock(lock);
337         stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
338         if (stat < 0)
339                 goto out;
340 
341         if (stat & DS1337_BIT_A1I) {
342                 stat &= ~DS1337_BIT_A1I;
343                 i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
344 
345                 control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
346                 if (control < 0)
347                         goto out;
348 
349                 control &= ~DS1337_BIT_A1IE;
350                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
351 
352                 rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
353         }
354 
355 out:
356         mutex_unlock(lock);
357 
358         return IRQ_HANDLED;
359 }
360 
361 /*----------------------------------------------------------------------*/
362 
363 static int ds1307_get_time(struct device *dev, struct rtc_time *t)
364 {
365         struct ds1307   *ds1307 = dev_get_drvdata(dev);
366         int             tmp;
367 
368         /* read the RTC date and time registers all at once */
369         tmp = ds1307->read_block_data(ds1307->client,
370                 ds1307->offset, 7, ds1307->regs);
371         if (tmp != 7) {
372                 dev_err(dev, "%s error %d\n", "read", tmp);
373                 return -EIO;
374         }
375 
376         dev_dbg(dev, "%s: %7ph\n", "read", ds1307->regs);
377 
378         t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
379         t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
380         tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
381         t->tm_hour = bcd2bin(tmp);
382         t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
383         t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
384         tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
385         t->tm_mon = bcd2bin(tmp) - 1;
386         t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
387 
388 #ifdef CONFIG_RTC_DRV_DS1307_CENTURY
389         switch (ds1307->type) {
390         case ds_1337:
391         case ds_1339:
392         case ds_3231:
393                 if (ds1307->regs[DS1307_REG_MONTH] & DS1337_BIT_CENTURY)
394                         t->tm_year += 100;
395                 break;
396         case ds_1340:
397                 if (ds1307->regs[DS1307_REG_HOUR] & DS1340_BIT_CENTURY)
398                         t->tm_year += 100;
399                 break;
400         default:
401                 break;
402         }
403 #endif
404 
405         dev_dbg(dev, "%s secs=%d, mins=%d, "
406                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
407                 "read", t->tm_sec, t->tm_min,
408                 t->tm_hour, t->tm_mday,
409                 t->tm_mon, t->tm_year, t->tm_wday);
410 
411         /* initial clock setting can be undefined */
412         return rtc_valid_tm(t);
413 }
414 
415 static int ds1307_set_time(struct device *dev, struct rtc_time *t)
416 {
417         struct ds1307   *ds1307 = dev_get_drvdata(dev);
418         int             result;
419         int             tmp;
420         u8              *buf = ds1307->regs;
421 
422         dev_dbg(dev, "%s secs=%d, mins=%d, "
423                 "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
424                 "write", t->tm_sec, t->tm_min,
425                 t->tm_hour, t->tm_mday,
426                 t->tm_mon, t->tm_year, t->tm_wday);
427 
428 #ifdef CONFIG_RTC_DRV_DS1307_CENTURY
429         if (t->tm_year < 100)
430                 return -EINVAL;
431 
432         switch (ds1307->type) {
433         case ds_1337:
434         case ds_1339:
435         case ds_3231:
436         case ds_1340:
437                 if (t->tm_year > 299)
438                         return -EINVAL;
439         default:
440                 if (t->tm_year > 199)
441                         return -EINVAL;
442                 break;
443         }
444 #else
445         if (t->tm_year < 100 || t->tm_year > 199)
446                 return -EINVAL;
447 #endif
448 
449         buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
450         buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
451         buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
452         buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
453         buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
454         buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
455 
456         /* assume 20YY not 19YY */
457         tmp = t->tm_year - 100;
458         buf[DS1307_REG_YEAR] = bin2bcd(tmp);
459 
460         switch (ds1307->type) {
461         case ds_1337:
462         case ds_1339:
463         case ds_3231:
464                 if (t->tm_year > 199)
465                         buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
466                 break;
467         case ds_1340:
468                 buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN;
469                 if (t->tm_year > 199)
470                         buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY;
471                 break;
472         case mcp794xx:
473                 /*
474                  * these bits were cleared when preparing the date/time
475                  * values and need to be set again before writing the
476                  * buffer out to the device.
477                  */
478                 buf[DS1307_REG_SECS] |= MCP794XX_BIT_ST;
479                 buf[DS1307_REG_WDAY] |= MCP794XX_BIT_VBATEN;
480                 break;
481         default:
482                 break;
483         }
484 
485         dev_dbg(dev, "%s: %7ph\n", "write", buf);
486 
487         result = ds1307->write_block_data(ds1307->client,
488                 ds1307->offset, 7, buf);
489         if (result < 0) {
490                 dev_err(dev, "%s error %d\n", "write", result);
491                 return result;
492         }
493         return 0;
494 }
495 
496 static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
497 {
498         struct i2c_client       *client = to_i2c_client(dev);
499         struct ds1307           *ds1307 = i2c_get_clientdata(client);
500         int                     ret;
501 
502         if (!test_bit(HAS_ALARM, &ds1307->flags))
503                 return -EINVAL;
504 
505         /* read all ALARM1, ALARM2, and status registers at once */
506         ret = ds1307->read_block_data(client,
507                         DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
508         if (ret != 9) {
509                 dev_err(dev, "%s error %d\n", "alarm read", ret);
510                 return -EIO;
511         }
512 
513         dev_dbg(dev, "%s: %4ph, %3ph, %2ph\n", "alarm read",
514                 &ds1307->regs[0], &ds1307->regs[4], &ds1307->regs[7]);
515 
516         /*
517          * report alarm time (ALARM1); assume 24 hour and day-of-month modes,
518          * and that all four fields are checked matches
519          */
520         t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
521         t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
522         t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
523         t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
524 
525         /* ... and status */
526         t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
527         t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
528 
529         dev_dbg(dev, "%s secs=%d, mins=%d, "
530                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
531                 "alarm read", t->time.tm_sec, t->time.tm_min,
532                 t->time.tm_hour, t->time.tm_mday,
533                 t->enabled, t->pending);
534 
535         return 0;
536 }
537 
538 static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
539 {
540         struct i2c_client       *client = to_i2c_client(dev);
541         struct ds1307           *ds1307 = i2c_get_clientdata(client);
542         unsigned char           *buf = ds1307->regs;
543         u8                      control, status;
544         int                     ret;
545 
546         if (!test_bit(HAS_ALARM, &ds1307->flags))
547                 return -EINVAL;
548 
549         dev_dbg(dev, "%s secs=%d, mins=%d, "
550                 "hours=%d, mday=%d, enabled=%d, pending=%d\n",
551                 "alarm set", t->time.tm_sec, t->time.tm_min,
552                 t->time.tm_hour, t->time.tm_mday,
553                 t->enabled, t->pending);
554 
555         /* read current status of both alarms and the chip */
556         ret = ds1307->read_block_data(client,
557                         DS1339_REG_ALARM1_SECS, 9, buf);
558         if (ret != 9) {
559                 dev_err(dev, "%s error %d\n", "alarm write", ret);
560                 return -EIO;
561         }
562         control = ds1307->regs[7];
563         status = ds1307->regs[8];
564 
565         dev_dbg(dev, "%s: %4ph, %3ph, %02x %02x\n", "alarm set (old status)",
566                 &ds1307->regs[0], &ds1307->regs[4], control, status);
567 
568         /* set ALARM1, using 24 hour and day-of-month modes */
569         buf[0] = bin2bcd(t->time.tm_sec);
570         buf[1] = bin2bcd(t->time.tm_min);
571         buf[2] = bin2bcd(t->time.tm_hour);
572         buf[3] = bin2bcd(t->time.tm_mday);
573 
574         /* set ALARM2 to non-garbage */
575         buf[4] = 0;
576         buf[5] = 0;
577         buf[6] = 0;
578 
579         /* disable alarms */
580         buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
581         buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
582 
583         ret = ds1307->write_block_data(client,
584                         DS1339_REG_ALARM1_SECS, 9, buf);
585         if (ret < 0) {
586                 dev_err(dev, "can't set alarm time\n");
587                 return ret;
588         }
589 
590         /* optionally enable ALARM1 */
591         if (t->enabled) {
592                 dev_dbg(dev, "alarm IRQ armed\n");
593                 buf[7] |= DS1337_BIT_A1IE;      /* only ALARM1 is used */
594                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, buf[7]);
595         }
596 
597         return 0;
598 }
599 
600 static int ds1307_alarm_irq_enable(struct device *dev, unsigned int enabled)
601 {
602         struct i2c_client       *client = to_i2c_client(dev);
603         struct ds1307           *ds1307 = i2c_get_clientdata(client);
604         int                     ret;
605 
606         if (!test_bit(HAS_ALARM, &ds1307->flags))
607                 return -ENOTTY;
608 
609         ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
610         if (ret < 0)
611                 return ret;
612 
613         if (enabled)
614                 ret |= DS1337_BIT_A1IE;
615         else
616                 ret &= ~DS1337_BIT_A1IE;
617 
618         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, ret);
619         if (ret < 0)
620                 return ret;
621 
622         return 0;
623 }
624 
625 static const struct rtc_class_ops ds13xx_rtc_ops = {
626         .read_time      = ds1307_get_time,
627         .set_time       = ds1307_set_time,
628         .read_alarm     = ds1337_read_alarm,
629         .set_alarm      = ds1337_set_alarm,
630         .alarm_irq_enable = ds1307_alarm_irq_enable,
631 };
632 
633 /*----------------------------------------------------------------------*/
634 
635 /*
636  * Alarm support for mcp794xx devices.
637  */
638 
639 #define MCP794XX_REG_WEEKDAY            0x3
640 #define MCP794XX_REG_WEEKDAY_WDAY_MASK  0x7
641 #define MCP794XX_REG_CONTROL            0x07
642 #       define MCP794XX_BIT_ALM0_EN     0x10
643 #       define MCP794XX_BIT_ALM1_EN     0x20
644 #define MCP794XX_REG_ALARM0_BASE        0x0a
645 #define MCP794XX_REG_ALARM0_CTRL        0x0d
646 #define MCP794XX_REG_ALARM1_BASE        0x11
647 #define MCP794XX_REG_ALARM1_CTRL        0x14
648 #       define MCP794XX_BIT_ALMX_IF     (1 << 3)
649 #       define MCP794XX_BIT_ALMX_C0     (1 << 4)
650 #       define MCP794XX_BIT_ALMX_C1     (1 << 5)
651 #       define MCP794XX_BIT_ALMX_C2     (1 << 6)
652 #       define MCP794XX_BIT_ALMX_POL    (1 << 7)
653 #       define MCP794XX_MSK_ALMX_MATCH  (MCP794XX_BIT_ALMX_C0 | \
654                                          MCP794XX_BIT_ALMX_C1 | \
655                                          MCP794XX_BIT_ALMX_C2)
656 
657 static irqreturn_t mcp794xx_irq(int irq, void *dev_id)
658 {
659         struct i2c_client       *client = dev_id;
660         struct ds1307           *ds1307 = i2c_get_clientdata(client);
661         struct mutex            *lock = &ds1307->rtc->ops_lock;
662         int reg, ret;
663 
664         mutex_lock(lock);
665 
666         /* Check and clear alarm 0 interrupt flag. */
667         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_ALARM0_CTRL);
668         if (reg < 0)
669                 goto out;
670         if (!(reg & MCP794XX_BIT_ALMX_IF))
671                 goto out;
672         reg &= ~MCP794XX_BIT_ALMX_IF;
673         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_ALARM0_CTRL, reg);
674         if (ret < 0)
675                 goto out;
676 
677         /* Disable alarm 0. */
678         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
679         if (reg < 0)
680                 goto out;
681         reg &= ~MCP794XX_BIT_ALM0_EN;
682         ret = i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
683         if (ret < 0)
684                 goto out;
685 
686         rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
687 
688 out:
689         mutex_unlock(lock);
690 
691         return IRQ_HANDLED;
692 }
693 
694 static int mcp794xx_read_alarm(struct device *dev, struct rtc_wkalrm *t)
695 {
696         struct i2c_client *client = to_i2c_client(dev);
697         struct ds1307 *ds1307 = i2c_get_clientdata(client);
698         u8 *regs = ds1307->regs;
699         int ret;
700 
701         if (!test_bit(HAS_ALARM, &ds1307->flags))
702                 return -EINVAL;
703 
704         /* Read control and alarm 0 registers. */
705         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
706         if (ret < 0)
707                 return ret;
708 
709         t->enabled = !!(regs[0] & MCP794XX_BIT_ALM0_EN);
710 
711         /* Report alarm 0 time assuming 24-hour and day-of-month modes. */
712         t->time.tm_sec = bcd2bin(ds1307->regs[3] & 0x7f);
713         t->time.tm_min = bcd2bin(ds1307->regs[4] & 0x7f);
714         t->time.tm_hour = bcd2bin(ds1307->regs[5] & 0x3f);
715         t->time.tm_wday = bcd2bin(ds1307->regs[6] & 0x7) - 1;
716         t->time.tm_mday = bcd2bin(ds1307->regs[7] & 0x3f);
717         t->time.tm_mon = bcd2bin(ds1307->regs[8] & 0x1f) - 1;
718         t->time.tm_year = -1;
719         t->time.tm_yday = -1;
720         t->time.tm_isdst = -1;
721 
722         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
723                 "enabled=%d polarity=%d irq=%d match=%d\n", __func__,
724                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
725                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon, t->enabled,
726                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_POL),
727                 !!(ds1307->regs[6] & MCP794XX_BIT_ALMX_IF),
728                 (ds1307->regs[6] & MCP794XX_MSK_ALMX_MATCH) >> 4);
729 
730         return 0;
731 }
732 
733 static int mcp794xx_set_alarm(struct device *dev, struct rtc_wkalrm *t)
734 {
735         struct i2c_client *client = to_i2c_client(dev);
736         struct ds1307 *ds1307 = i2c_get_clientdata(client);
737         unsigned char *regs = ds1307->regs;
738         int ret;
739 
740         if (!test_bit(HAS_ALARM, &ds1307->flags))
741                 return -EINVAL;
742 
743         dev_dbg(dev, "%s, sec=%d min=%d hour=%d wday=%d mday=%d mon=%d "
744                 "enabled=%d pending=%d\n", __func__,
745                 t->time.tm_sec, t->time.tm_min, t->time.tm_hour,
746                 t->time.tm_wday, t->time.tm_mday, t->time.tm_mon,
747                 t->enabled, t->pending);
748 
749         /* Read control and alarm 0 registers. */
750         ret = ds1307->read_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
751         if (ret < 0)
752                 return ret;
753 
754         /* Set alarm 0, using 24-hour and day-of-month modes. */
755         regs[3] = bin2bcd(t->time.tm_sec);
756         regs[4] = bin2bcd(t->time.tm_min);
757         regs[5] = bin2bcd(t->time.tm_hour);
758         regs[6] = bin2bcd(t->time.tm_wday + 1);
759         regs[7] = bin2bcd(t->time.tm_mday);
760         regs[8] = bin2bcd(t->time.tm_mon + 1);
761 
762         /* Clear the alarm 0 interrupt flag. */
763         regs[6] &= ~MCP794XX_BIT_ALMX_IF;
764         /* Set alarm match: second, minute, hour, day, date, month. */
765         regs[6] |= MCP794XX_MSK_ALMX_MATCH;
766         /* Disable interrupt. We will not enable until completely programmed */
767         regs[0] &= ~MCP794XX_BIT_ALM0_EN;
768 
769         ret = ds1307->write_block_data(client, MCP794XX_REG_CONTROL, 10, regs);
770         if (ret < 0)
771                 return ret;
772 
773         if (!t->enabled)
774                 return 0;
775         regs[0] |= MCP794XX_BIT_ALM0_EN;
776         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, regs[0]);
777 }
778 
779 static int mcp794xx_alarm_irq_enable(struct device *dev, unsigned int enabled)
780 {
781         struct i2c_client *client = to_i2c_client(dev);
782         struct ds1307 *ds1307 = i2c_get_clientdata(client);
783         int reg;
784 
785         if (!test_bit(HAS_ALARM, &ds1307->flags))
786                 return -EINVAL;
787 
788         reg = i2c_smbus_read_byte_data(client, MCP794XX_REG_CONTROL);
789         if (reg < 0)
790                 return reg;
791 
792         if (enabled)
793                 reg |= MCP794XX_BIT_ALM0_EN;
794         else
795                 reg &= ~MCP794XX_BIT_ALM0_EN;
796 
797         return i2c_smbus_write_byte_data(client, MCP794XX_REG_CONTROL, reg);
798 }
799 
800 static const struct rtc_class_ops mcp794xx_rtc_ops = {
801         .read_time      = ds1307_get_time,
802         .set_time       = ds1307_set_time,
803         .read_alarm     = mcp794xx_read_alarm,
804         .set_alarm      = mcp794xx_set_alarm,
805         .alarm_irq_enable = mcp794xx_alarm_irq_enable,
806 };
807 
808 /*----------------------------------------------------------------------*/
809 
810 static ssize_t
811 ds1307_nvram_read(struct file *filp, struct kobject *kobj,
812                 struct bin_attribute *attr,
813                 char *buf, loff_t off, size_t count)
814 {
815         struct i2c_client       *client;
816         struct ds1307           *ds1307;
817         int                     result;
818 
819         client = kobj_to_i2c_client(kobj);
820         ds1307 = i2c_get_clientdata(client);
821 
822         result = ds1307->read_block_data(client, ds1307->nvram_offset + off,
823                                                                 count, buf);
824         if (result < 0)
825                 dev_err(&client->dev, "%s error %d\n", "nvram read", result);
826         return result;
827 }
828 
829 static ssize_t
830 ds1307_nvram_write(struct file *filp, struct kobject *kobj,
831                 struct bin_attribute *attr,
832                 char *buf, loff_t off, size_t count)
833 {
834         struct i2c_client       *client;
835         struct ds1307           *ds1307;
836         int                     result;
837 
838         client = kobj_to_i2c_client(kobj);
839         ds1307 = i2c_get_clientdata(client);
840 
841         result = ds1307->write_block_data(client, ds1307->nvram_offset + off,
842                                                                 count, buf);
843         if (result < 0) {
844                 dev_err(&client->dev, "%s error %d\n", "nvram write", result);
845                 return result;
846         }
847         return count;
848 }
849 
850 
851 /*----------------------------------------------------------------------*/
852 
853 static u8 do_trickle_setup_ds1339(struct i2c_client *client,
854                                   uint32_t ohms, bool diode)
855 {
856         u8 setup = (diode) ? DS1307_TRICKLE_CHARGER_DIODE :
857                 DS1307_TRICKLE_CHARGER_NO_DIODE;
858 
859         switch (ohms) {
860         case 250:
861                 setup |= DS1307_TRICKLE_CHARGER_250_OHM;
862                 break;
863         case 2000:
864                 setup |= DS1307_TRICKLE_CHARGER_2K_OHM;
865                 break;
866         case 4000:
867                 setup |= DS1307_TRICKLE_CHARGER_4K_OHM;
868                 break;
869         default:
870                 dev_warn(&client->dev,
871                          "Unsupported ohm value %u in dt\n", ohms);
872                 return 0;
873         }
874         return setup;
875 }
876 
877 static void ds1307_trickle_of_init(struct i2c_client *client,
878                                    struct chip_desc *chip)
879 {
880         uint32_t ohms = 0;
881         bool diode = true;
882 
883         if (!chip->do_trickle_setup)
884                 goto out;
885         if (of_property_read_u32(client->dev.of_node, "trickle-resistor-ohms" , &ohms))
886                 goto out;
887         if (of_property_read_bool(client->dev.of_node, "trickle-diode-disable"))
888                 diode = false;
889         chip->trickle_charger_setup = chip->do_trickle_setup(client,
890                                                              ohms, diode);
891 out:
892         return;
893 }
894 
895 /*----------------------------------------------------------------------*/
896 
897 #ifdef CONFIG_RTC_DRV_DS1307_HWMON
898 
899 /*
900  * Temperature sensor support for ds3231 devices.
901  */
902 
903 #define DS3231_REG_TEMPERATURE  0x11
904 
905 /*
906  * A user-initiated temperature conversion is not started by this function,
907  * so the temperature is updated once every 64 seconds.
908  */
909 static int ds3231_hwmon_read_temp(struct device *dev, s32 *mC)
910 {
911         struct ds1307 *ds1307 = dev_get_drvdata(dev);
912         u8 temp_buf[2];
913         s16 temp;
914         int ret;
915 
916         ret = ds1307->read_block_data(ds1307->client, DS3231_REG_TEMPERATURE,
917                                         sizeof(temp_buf), temp_buf);
918         if (ret < 0)
919                 return ret;
920         if (ret != sizeof(temp_buf))
921                 return -EIO;
922 
923         /*
924          * Temperature is represented as a 10-bit code with a resolution of
925          * 0.25 degree celsius and encoded in two's complement format.
926          */
927         temp = (temp_buf[0] << 8) | temp_buf[1];
928         temp >>= 6;
929         *mC = temp * 250;
930 
931         return 0;
932 }
933 
934 static ssize_t ds3231_hwmon_show_temp(struct device *dev,
935                                 struct device_attribute *attr, char *buf)
936 {
937         int ret;
938         s32 temp;
939 
940         ret = ds3231_hwmon_read_temp(dev, &temp);
941         if (ret)
942                 return ret;
943 
944         return sprintf(buf, "%d\n", temp);
945 }
946 static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, ds3231_hwmon_show_temp,
947                         NULL, 0);
948 
949 static struct attribute *ds3231_hwmon_attrs[] = {
950         &sensor_dev_attr_temp1_input.dev_attr.attr,
951         NULL,
952 };
953 ATTRIBUTE_GROUPS(ds3231_hwmon);
954 
955 static void ds1307_hwmon_register(struct ds1307 *ds1307)
956 {
957         struct device *dev;
958 
959         if (ds1307->type != ds_3231)
960                 return;
961 
962         dev = devm_hwmon_device_register_with_groups(&ds1307->client->dev,
963                                                 ds1307->client->name,
964                                                 ds1307, ds3231_hwmon_groups);
965         if (IS_ERR(dev)) {
966                 dev_warn(&ds1307->client->dev,
967                         "unable to register hwmon device %ld\n", PTR_ERR(dev));
968         }
969 }
970 
971 #else
972 
973 static void ds1307_hwmon_register(struct ds1307 *ds1307)
974 {
975 }
976 
977 #endif /* CONFIG_RTC_DRV_DS1307_HWMON */
978 
979 /*----------------------------------------------------------------------*/
980 
981 /*
982  * Square-wave output support for DS3231
983  * Datasheet: https://datasheets.maximintegrated.com/en/ds/DS3231.pdf
984  */
985 #ifdef CONFIG_COMMON_CLK
986 
987 enum {
988         DS3231_CLK_SQW = 0,
989         DS3231_CLK_32KHZ,
990 };
991 
992 #define clk_sqw_to_ds1307(clk)  \
993         container_of(clk, struct ds1307, clks[DS3231_CLK_SQW])
994 #define clk_32khz_to_ds1307(clk)        \
995         container_of(clk, struct ds1307, clks[DS3231_CLK_32KHZ])
996 
997 static int ds3231_clk_sqw_rates[] = {
998         1,
999         1024,
1000         4096,
1001         8192,
1002 };
1003 
1004 static int ds1337_write_control(struct ds1307 *ds1307, u8 mask, u8 value)
1005 {
1006         struct i2c_client *client = ds1307->client;
1007         struct mutex *lock = &ds1307->rtc->ops_lock;
1008         int control;
1009         int ret;
1010 
1011         mutex_lock(lock);
1012 
1013         control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
1014         if (control < 0) {
1015                 ret = control;
1016                 goto out;
1017         }
1018 
1019         control &= ~mask;
1020         control |= value;
1021 
1022         ret = i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
1023 out:
1024         mutex_unlock(lock);
1025 
1026         return ret;
1027 }
1028 
1029 static unsigned long ds3231_clk_sqw_recalc_rate(struct clk_hw *hw,
1030                                                 unsigned long parent_rate)
1031 {
1032         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1033         int control;
1034         int rate_sel = 0;
1035 
1036         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1037         if (control < 0)
1038                 return control;
1039         if (control & DS1337_BIT_RS1)
1040                 rate_sel += 1;
1041         if (control & DS1337_BIT_RS2)
1042                 rate_sel += 2;
1043 
1044         return ds3231_clk_sqw_rates[rate_sel];
1045 }
1046 
1047 static long ds3231_clk_sqw_round_rate(struct clk_hw *hw, unsigned long rate,
1048                                         unsigned long *prate)
1049 {
1050         int i;
1051 
1052         for (i = ARRAY_SIZE(ds3231_clk_sqw_rates) - 1; i >= 0; i--) {
1053                 if (ds3231_clk_sqw_rates[i] <= rate)
1054                         return ds3231_clk_sqw_rates[i];
1055         }
1056 
1057         return 0;
1058 }
1059 
1060 static int ds3231_clk_sqw_set_rate(struct clk_hw *hw, unsigned long rate,
1061                                         unsigned long parent_rate)
1062 {
1063         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1064         int control = 0;
1065         int rate_sel;
1066 
1067         for (rate_sel = 0; rate_sel < ARRAY_SIZE(ds3231_clk_sqw_rates);
1068                         rate_sel++) {
1069                 if (ds3231_clk_sqw_rates[rate_sel] == rate)
1070                         break;
1071         }
1072 
1073         if (rate_sel == ARRAY_SIZE(ds3231_clk_sqw_rates))
1074                 return -EINVAL;
1075 
1076         if (rate_sel & 1)
1077                 control |= DS1337_BIT_RS1;
1078         if (rate_sel & 2)
1079                 control |= DS1337_BIT_RS2;
1080 
1081         return ds1337_write_control(ds1307, DS1337_BIT_RS1 | DS1337_BIT_RS2,
1082                                 control);
1083 }
1084 
1085 static int ds3231_clk_sqw_prepare(struct clk_hw *hw)
1086 {
1087         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1088 
1089         return ds1337_write_control(ds1307, DS1337_BIT_INTCN, 0);
1090 }
1091 
1092 static void ds3231_clk_sqw_unprepare(struct clk_hw *hw)
1093 {
1094         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1095 
1096         ds1337_write_control(ds1307, DS1337_BIT_INTCN, DS1337_BIT_INTCN);
1097 }
1098 
1099 static int ds3231_clk_sqw_is_prepared(struct clk_hw *hw)
1100 {
1101         struct ds1307 *ds1307 = clk_sqw_to_ds1307(hw);
1102         int control;
1103 
1104         control = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_CONTROL);
1105         if (control < 0)
1106                 return control;
1107 
1108         return !(control & DS1337_BIT_INTCN);
1109 }
1110 
1111 static const struct clk_ops ds3231_clk_sqw_ops = {
1112         .prepare = ds3231_clk_sqw_prepare,
1113         .unprepare = ds3231_clk_sqw_unprepare,
1114         .is_prepared = ds3231_clk_sqw_is_prepared,
1115         .recalc_rate = ds3231_clk_sqw_recalc_rate,
1116         .round_rate = ds3231_clk_sqw_round_rate,
1117         .set_rate = ds3231_clk_sqw_set_rate,
1118 };
1119 
1120 static unsigned long ds3231_clk_32khz_recalc_rate(struct clk_hw *hw,
1121                                                 unsigned long parent_rate)
1122 {
1123         return 32768;
1124 }
1125 
1126 static int ds3231_clk_32khz_control(struct ds1307 *ds1307, bool enable)
1127 {
1128         struct i2c_client *client = ds1307->client;
1129         struct mutex *lock = &ds1307->rtc->ops_lock;
1130         int status;
1131         int ret;
1132 
1133         mutex_lock(lock);
1134 
1135         status = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
1136         if (status < 0) {
1137                 ret = status;
1138                 goto out;
1139         }
1140 
1141         if (enable)
1142                 status |= DS3231_BIT_EN32KHZ;
1143         else
1144                 status &= ~DS3231_BIT_EN32KHZ;
1145 
1146         ret = i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, status);
1147 out:
1148         mutex_unlock(lock);
1149 
1150         return ret;
1151 }
1152 
1153 static int ds3231_clk_32khz_prepare(struct clk_hw *hw)
1154 {
1155         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1156 
1157         return ds3231_clk_32khz_control(ds1307, true);
1158 }
1159 
1160 static void ds3231_clk_32khz_unprepare(struct clk_hw *hw)
1161 {
1162         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1163 
1164         ds3231_clk_32khz_control(ds1307, false);
1165 }
1166 
1167 static int ds3231_clk_32khz_is_prepared(struct clk_hw *hw)
1168 {
1169         struct ds1307 *ds1307 = clk_32khz_to_ds1307(hw);
1170         int status;
1171 
1172         status = i2c_smbus_read_byte_data(ds1307->client, DS1337_REG_STATUS);
1173         if (status < 0)
1174                 return status;
1175 
1176         return !!(status & DS3231_BIT_EN32KHZ);
1177 }
1178 
1179 static const struct clk_ops ds3231_clk_32khz_ops = {
1180         .prepare = ds3231_clk_32khz_prepare,
1181         .unprepare = ds3231_clk_32khz_unprepare,
1182         .is_prepared = ds3231_clk_32khz_is_prepared,
1183         .recalc_rate = ds3231_clk_32khz_recalc_rate,
1184 };
1185 
1186 static struct clk_init_data ds3231_clks_init[] = {
1187         [DS3231_CLK_SQW] = {
1188                 .name = "ds3231_clk_sqw",
1189                 .ops = &ds3231_clk_sqw_ops,
1190         },
1191         [DS3231_CLK_32KHZ] = {
1192                 .name = "ds3231_clk_32khz",
1193                 .ops = &ds3231_clk_32khz_ops,
1194         },
1195 };
1196 
1197 static int ds3231_clks_register(struct ds1307 *ds1307)
1198 {
1199         struct i2c_client *client = ds1307->client;
1200         struct device_node *node = client->dev.of_node;
1201         struct clk_onecell_data *onecell;
1202         int i;
1203 
1204         onecell = devm_kzalloc(&client->dev, sizeof(*onecell), GFP_KERNEL);
1205         if (!onecell)
1206                 return -ENOMEM;
1207 
1208         onecell->clk_num = ARRAY_SIZE(ds3231_clks_init);
1209         onecell->clks = devm_kcalloc(&client->dev, onecell->clk_num,
1210                                         sizeof(onecell->clks[0]), GFP_KERNEL);
1211         if (!onecell->clks)
1212                 return -ENOMEM;
1213 
1214         for (i = 0; i < ARRAY_SIZE(ds3231_clks_init); i++) {
1215                 struct clk_init_data init = ds3231_clks_init[i];
1216 
1217                 /*
1218                  * Interrupt signal due to alarm conditions and square-wave
1219                  * output share same pin, so don't initialize both.
1220                  */
1221                 if (i == DS3231_CLK_SQW && test_bit(HAS_ALARM, &ds1307->flags))
1222                         continue;
1223 
1224                 /* optional override of the clockname */
1225                 of_property_read_string_index(node, "clock-output-names", i,
1226                                                 &init.name);
1227                 ds1307->clks[i].init = &init;
1228 
1229                 onecell->clks[i] = devm_clk_register(&client->dev,
1230                                                         &ds1307->clks[i]);
1231                 if (IS_ERR(onecell->clks[i]))
1232                         return PTR_ERR(onecell->clks[i]);
1233         }
1234 
1235         if (!node)
1236                 return 0;
1237 
1238         of_clk_add_provider(node, of_clk_src_onecell_get, onecell);
1239 
1240         return 0;
1241 }
1242 
1243 static void ds1307_clks_register(struct ds1307 *ds1307)
1244 {
1245         int ret;
1246 
1247         if (ds1307->type != ds_3231)
1248                 return;
1249 
1250         ret = ds3231_clks_register(ds1307);
1251         if (ret) {
1252                 dev_warn(&ds1307->client->dev,
1253                         "unable to register clock device %d\n", ret);
1254         }
1255 }
1256 
1257 #else
1258 
1259 static void ds1307_clks_register(struct ds1307 *ds1307)
1260 {
1261 }
1262 
1263 #endif /* CONFIG_COMMON_CLK */
1264 
1265 static int ds1307_probe(struct i2c_client *client,
1266                         const struct i2c_device_id *id)
1267 {
1268         struct ds1307           *ds1307;
1269         int                     err = -ENODEV;
1270         int                     tmp, wday;
1271         struct chip_desc        *chip = &chips[id->driver_data];
1272         struct i2c_adapter      *adapter = to_i2c_adapter(client->dev.parent);
1273         bool                    want_irq = false;
1274         bool                    ds1307_can_wakeup_device = false;
1275         unsigned char           *buf;
1276         struct ds1307_platform_data *pdata = dev_get_platdata(&client->dev);
1277         struct rtc_time         tm;
1278         unsigned long           timestamp;
1279 
1280         irq_handler_t   irq_handler = ds1307_irq;
1281 
1282         static const int        bbsqi_bitpos[] = {
1283                 [ds_1337] = 0,
1284                 [ds_1339] = DS1339_BIT_BBSQI,
1285                 [ds_3231] = DS3231_BIT_BBSQW,
1286         };
1287         const struct rtc_class_ops *rtc_ops = &ds13xx_rtc_ops;
1288 
1289         if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
1290             && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
1291                 return -EIO;
1292 
1293         ds1307 = devm_kzalloc(&client->dev, sizeof(struct ds1307), GFP_KERNEL);
1294         if (!ds1307)
1295                 return -ENOMEM;
1296 
1297         i2c_set_clientdata(client, ds1307);
1298 
1299         ds1307->client  = client;
1300         ds1307->type    = id->driver_data;
1301 
1302         if (!pdata && client->dev.of_node)
1303                 ds1307_trickle_of_init(client, chip);
1304         else if (pdata && pdata->trickle_charger_setup)
1305                 chip->trickle_charger_setup = pdata->trickle_charger_setup;
1306 
1307         if (chip->trickle_charger_setup && chip->trickle_charger_reg) {
1308                 dev_dbg(&client->dev, "writing trickle charger info 0x%x to 0x%x\n",
1309                     DS13XX_TRICKLE_CHARGER_MAGIC | chip->trickle_charger_setup,
1310                     chip->trickle_charger_reg);
1311                 i2c_smbus_write_byte_data(client, chip->trickle_charger_reg,
1312                     DS13XX_TRICKLE_CHARGER_MAGIC |
1313                     chip->trickle_charger_setup);
1314         }
1315 
1316         buf = ds1307->regs;
1317         if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
1318                 ds1307->read_block_data = ds1307_native_smbus_read_block_data;
1319                 ds1307->write_block_data = ds1307_native_smbus_write_block_data;
1320         } else {
1321                 ds1307->read_block_data = ds1307_read_block_data;
1322                 ds1307->write_block_data = ds1307_write_block_data;
1323         }
1324 
1325 #ifdef CONFIG_OF
1326 /*
1327  * For devices with no IRQ directly connected to the SoC, the RTC chip
1328  * can be forced as a wakeup source by stating that explicitly in
1329  * the device's .dts file using the "wakeup-source" boolean property.
1330  * If the "wakeup-source" property is set, don't request an IRQ.
1331  * This will guarantee the 'wakealarm' sysfs entry is available on the device,
1332  * if supported by the RTC.
1333  */
1334         if (of_property_read_bool(client->dev.of_node, "wakeup-source")) {
1335                 ds1307_can_wakeup_device = true;
1336         }
1337         /* Intersil ISL12057 DT backward compatibility */
1338         if (of_property_read_bool(client->dev.of_node,
1339                                   "isil,irq2-can-wakeup-machine")) {
1340                 ds1307_can_wakeup_device = true;
1341         }
1342 #endif
1343 
1344         switch (ds1307->type) {
1345         case ds_1337:
1346         case ds_1339:
1347         case ds_3231:
1348                 /* get registers that the "rtc" read below won't read... */
1349                 tmp = ds1307->read_block_data(ds1307->client,
1350                                 DS1337_REG_CONTROL, 2, buf);
1351                 if (tmp != 2) {
1352                         dev_dbg(&client->dev, "read error %d\n", tmp);
1353                         err = -EIO;
1354                         goto exit;
1355                 }
1356 
1357                 /* oscillator off?  turn it on, so clock can tick. */
1358                 if (ds1307->regs[0] & DS1337_BIT_nEOSC)
1359                         ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
1360 
1361                 /*
1362                  * Using IRQ or defined as wakeup-source?
1363                  * Disable the square wave and both alarms.
1364                  * For some variants, be sure alarms can trigger when we're
1365                  * running on Vbackup (BBSQI/BBSQW)
1366                  */
1367                 if (chip->alarm && (ds1307->client->irq > 0 ||
1368                                                 ds1307_can_wakeup_device)) {
1369                         ds1307->regs[0] |= DS1337_BIT_INTCN
1370                                         | bbsqi_bitpos[ds1307->type];
1371                         ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
1372 
1373                         want_irq = true;
1374                 }
1375 
1376                 i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
1377                                                         ds1307->regs[0]);
1378 
1379                 /* oscillator fault?  clear flag, and warn */
1380                 if (ds1307->regs[1] & DS1337_BIT_OSF) {
1381                         i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
1382                                 ds1307->regs[1] & ~DS1337_BIT_OSF);
1383                         dev_warn(&client->dev, "SET TIME!\n");
1384                 }
1385                 break;
1386 
1387         case rx_8025:
1388                 tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1389                                 RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1390                 if (tmp != 2) {
1391                         dev_dbg(&client->dev, "read error %d\n", tmp);
1392                         err = -EIO;
1393                         goto exit;
1394                 }
1395 
1396                 /* oscillator off?  turn it on, so clock can tick. */
1397                 if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
1398                         ds1307->regs[1] |= RX8025_BIT_XST;
1399                         i2c_smbus_write_byte_data(client,
1400                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1401                                                   ds1307->regs[1]);
1402                         dev_warn(&client->dev,
1403                                  "oscillator stop detected - SET TIME!\n");
1404                 }
1405 
1406                 if (ds1307->regs[1] & RX8025_BIT_PON) {
1407                         ds1307->regs[1] &= ~RX8025_BIT_PON;
1408                         i2c_smbus_write_byte_data(client,
1409                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1410                                                   ds1307->regs[1]);
1411                         dev_warn(&client->dev, "power-on detected\n");
1412                 }
1413 
1414                 if (ds1307->regs[1] & RX8025_BIT_VDET) {
1415                         ds1307->regs[1] &= ~RX8025_BIT_VDET;
1416                         i2c_smbus_write_byte_data(client,
1417                                                   RX8025_REG_CTRL2 << 4 | 0x08,
1418                                                   ds1307->regs[1]);
1419                         dev_warn(&client->dev, "voltage drop detected\n");
1420                 }
1421 
1422                 /* make sure we are running in 24hour mode */
1423                 if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
1424                         u8 hour;
1425 
1426                         /* switch to 24 hour mode */
1427                         i2c_smbus_write_byte_data(client,
1428                                                   RX8025_REG_CTRL1 << 4 | 0x08,
1429                                                   ds1307->regs[0] |
1430                                                   RX8025_BIT_2412);
1431 
1432                         tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
1433                                         RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
1434                         if (tmp != 2) {
1435                                 dev_dbg(&client->dev, "read error %d\n", tmp);
1436                                 err = -EIO;
1437                                 goto exit;
1438                         }
1439 
1440                         /* correct hour */
1441                         hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
1442                         if (hour == 12)
1443                                 hour = 0;
1444                         if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1445                                 hour += 12;
1446 
1447                         i2c_smbus_write_byte_data(client,
1448                                                   DS1307_REG_HOUR << 4 | 0x08,
1449                                                   hour);
1450                 }
1451                 break;
1452         case ds_1388:
1453                 ds1307->offset = 1; /* Seconds starts at 1 */
1454                 break;
1455         case mcp794xx:
1456                 rtc_ops = &mcp794xx_rtc_ops;
1457                 if (ds1307->client->irq > 0 && chip->alarm) {
1458                         irq_handler = mcp794xx_irq;
1459                         want_irq = true;
1460                 }
1461                 break;
1462         default:
1463                 break;
1464         }
1465 
1466 read_rtc:
1467         /* read RTC registers */
1468         tmp = ds1307->read_block_data(ds1307->client, ds1307->offset, 8, buf);
1469         if (tmp != 8) {
1470                 dev_dbg(&client->dev, "read error %d\n", tmp);
1471                 err = -EIO;
1472                 goto exit;
1473         }
1474 
1475         /*
1476          * minimal sanity checking; some chips (like DS1340) don't
1477          * specify the extra bits as must-be-zero, but there are
1478          * still a few values that are clearly out-of-range.
1479          */
1480         tmp = ds1307->regs[DS1307_REG_SECS];
1481         switch (ds1307->type) {
1482         case ds_1307:
1483         case m41t00:
1484                 /* clock halted?  turn it on, so clock can tick. */
1485                 if (tmp & DS1307_BIT_CH) {
1486                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1487                         dev_warn(&client->dev, "SET TIME!\n");
1488                         goto read_rtc;
1489                 }
1490                 break;
1491         case ds_1338:
1492                 /* clock halted?  turn it on, so clock can tick. */
1493                 if (tmp & DS1307_BIT_CH)
1494                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1495 
1496                 /* oscillator fault?  clear flag, and warn */
1497                 if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
1498                         i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
1499                                         ds1307->regs[DS1307_REG_CONTROL]
1500                                         & ~DS1338_BIT_OSF);
1501                         dev_warn(&client->dev, "SET TIME!\n");
1502                         goto read_rtc;
1503                 }
1504                 break;
1505         case ds_1340:
1506                 /* clock halted?  turn it on, so clock can tick. */
1507                 if (tmp & DS1340_BIT_nEOSC)
1508                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
1509 
1510                 tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
1511                 if (tmp < 0) {
1512                         dev_dbg(&client->dev, "read error %d\n", tmp);
1513                         err = -EIO;
1514                         goto exit;
1515                 }
1516 
1517                 /* oscillator fault?  clear flag, and warn */
1518                 if (tmp & DS1340_BIT_OSF) {
1519                         i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
1520                         dev_warn(&client->dev, "SET TIME!\n");
1521                 }
1522                 break;
1523         case mcp794xx:
1524                 /* make sure that the backup battery is enabled */
1525                 if (!(ds1307->regs[DS1307_REG_WDAY] & MCP794XX_BIT_VBATEN)) {
1526                         i2c_smbus_write_byte_data(client, DS1307_REG_WDAY,
1527                                         ds1307->regs[DS1307_REG_WDAY]
1528                                         | MCP794XX_BIT_VBATEN);
1529                 }
1530 
1531                 /* clock halted?  turn it on, so clock can tick. */
1532                 if (!(tmp & MCP794XX_BIT_ST)) {
1533                         i2c_smbus_write_byte_data(client, DS1307_REG_SECS,
1534                                         MCP794XX_BIT_ST);
1535                         dev_warn(&client->dev, "SET TIME!\n");
1536                         goto read_rtc;
1537                 }
1538 
1539                 break;
1540         default:
1541                 break;
1542         }
1543 
1544         tmp = ds1307->regs[DS1307_REG_HOUR];
1545         switch (ds1307->type) {
1546         case ds_1340:
1547         case m41t00:
1548                 /*
1549                  * NOTE: ignores century bits; fix before deploying
1550                  * systems that will run through year 2100.
1551                  */
1552                 break;
1553         case rx_8025:
1554                 break;
1555         default:
1556                 if (!(tmp & DS1307_BIT_12HR))
1557                         break;
1558 
1559                 /*
1560                  * Be sure we're in 24 hour mode.  Multi-master systems
1561                  * take note...
1562                  */
1563                 tmp = bcd2bin(tmp & 0x1f);
1564                 if (tmp == 12)
1565                         tmp = 0;
1566                 if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
1567                         tmp += 12;
1568                 i2c_smbus_write_byte_data(client,
1569                                 ds1307->offset + DS1307_REG_HOUR,
1570                                 bin2bcd(tmp));
1571         }
1572 
1573         /*
1574          * Some IPs have weekday reset value = 0x1 which might not correct
1575          * hence compute the wday using the current date/month/year values
1576          */
1577         ds1307_get_time(&client->dev, &tm);
1578         wday = tm.tm_wday;
1579         timestamp = rtc_tm_to_time64(&tm);
1580         rtc_time64_to_tm(timestamp, &tm);
1581 
1582         /*
1583          * Check if reset wday is different from the computed wday
1584          * If different then set the wday which we computed using
1585          * timestamp
1586          */
1587         if (wday != tm.tm_wday) {
1588                 wday = i2c_smbus_read_byte_data(client, MCP794XX_REG_WEEKDAY);
1589                 wday = wday & ~MCP794XX_REG_WEEKDAY_WDAY_MASK;
1590                 wday = wday | (tm.tm_wday + 1);
1591                 i2c_smbus_write_byte_data(client, MCP794XX_REG_WEEKDAY, wday);
1592         }
1593 
1594         if (want_irq) {
1595                 device_set_wakeup_capable(&client->dev, true);
1596                 set_bit(HAS_ALARM, &ds1307->flags);
1597         }
1598         ds1307->rtc = devm_rtc_device_register(&client->dev, client->name,
1599                                 rtc_ops, THIS_MODULE);
1600         if (IS_ERR(ds1307->rtc)) {
1601                 return PTR_ERR(ds1307->rtc);
1602         }
1603 
1604         if (ds1307_can_wakeup_device && ds1307->client->irq <= 0) {
1605                 /* Disable request for an IRQ */
1606                 want_irq = false;
1607                 dev_info(&client->dev, "'wakeup-source' is set, request for an IRQ is disabled!\n");
1608                 /* We cannot support UIE mode if we do not have an IRQ line */
1609                 ds1307->rtc->uie_unsupported = 1;
1610         }
1611 
1612         if (want_irq) {
1613                 err = devm_request_threaded_irq(&client->dev,
1614                                                 client->irq, NULL, irq_handler,
1615                                                 IRQF_SHARED | IRQF_ONESHOT,
1616                                                 ds1307->rtc->name, client);
1617                 if (err) {
1618                         client->irq = 0;
1619                         device_set_wakeup_capable(&client->dev, false);
1620                         clear_bit(HAS_ALARM, &ds1307->flags);
1621                         dev_err(&client->dev, "unable to request IRQ!\n");
1622                 } else
1623                         dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
1624         }
1625 
1626         if (chip->nvram_size) {
1627 
1628                 ds1307->nvram = devm_kzalloc(&client->dev,
1629                                         sizeof(struct bin_attribute),
1630                                         GFP_KERNEL);
1631                 if (!ds1307->nvram) {
1632                         dev_err(&client->dev, "cannot allocate memory for nvram sysfs\n");
1633                 } else {
1634 
1635                         ds1307->nvram->attr.name = "nvram";
1636                         ds1307->nvram->attr.mode = S_IRUGO | S_IWUSR;
1637 
1638                         sysfs_bin_attr_init(ds1307->nvram);
1639 
1640                         ds1307->nvram->read = ds1307_nvram_read;
1641                         ds1307->nvram->write = ds1307_nvram_write;
1642                         ds1307->nvram->size = chip->nvram_size;
1643                         ds1307->nvram_offset = chip->nvram_offset;
1644 
1645                         err = sysfs_create_bin_file(&client->dev.kobj,
1646                                                     ds1307->nvram);
1647                         if (err) {
1648                                 dev_err(&client->dev,
1649                                         "unable to create sysfs file: %s\n",
1650                                         ds1307->nvram->attr.name);
1651                         } else {
1652                                 set_bit(HAS_NVRAM, &ds1307->flags);
1653                                 dev_info(&client->dev, "%zu bytes nvram\n",
1654                                          ds1307->nvram->size);
1655                         }
1656                 }
1657         }
1658 
1659         ds1307_hwmon_register(ds1307);
1660         ds1307_clks_register(ds1307);
1661 
1662         return 0;
1663 
1664 exit:
1665         return err;
1666 }
1667 
1668 static int ds1307_remove(struct i2c_client *client)
1669 {
1670         struct ds1307 *ds1307 = i2c_get_clientdata(client);
1671 
1672         if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
1673                 sysfs_remove_bin_file(&client->dev.kobj, ds1307->nvram);
1674 
1675         return 0;
1676 }
1677 
1678 static struct i2c_driver ds1307_driver = {
1679         .driver = {
1680                 .name   = "rtc-ds1307",
1681         },
1682         .probe          = ds1307_probe,
1683         .remove         = ds1307_remove,
1684         .id_table       = ds1307_id,
1685 };
1686 
1687 module_i2c_driver(ds1307_driver);
1688 
1689 MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
1690 MODULE_LICENSE("GPL");
1691 

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