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Linux/drivers/rtc/rtc-at91sam9.c

  1 /*
  2  * "RTT as Real Time Clock" driver for AT91SAM9 SoC family
  3  *
  4  * (C) 2007 Michel Benoit
  5  *
  6  * Based on rtc-at91rm9200.c by Rick Bronson
  7  *
  8  * This program is free software; you can redistribute it and/or
  9  * modify it under the terms of the GNU General Public License
 10  * as published by the Free Software Foundation; either version
 11  * 2 of the License, or (at your option) any later version.
 12  */
 13 
 14 #include <linux/module.h>
 15 #include <linux/kernel.h>
 16 #include <linux/platform_device.h>
 17 #include <linux/time.h>
 18 #include <linux/rtc.h>
 19 #include <linux/interrupt.h>
 20 #include <linux/ioctl.h>
 21 #include <linux/slab.h>
 22 #include <linux/platform_data/atmel.h>
 23 #include <linux/io.h>
 24 #include <linux/mfd/syscon.h>
 25 #include <linux/regmap.h>
 26 #include <linux/clk.h>
 27 
 28 /*
 29  * This driver uses two configurable hardware resources that live in the
 30  * AT91SAM9 backup power domain (intended to be powered at all times)
 31  * to implement the Real Time Clock interfaces
 32  *
 33  *  - A "Real-time Timer" (RTT) counts up in seconds from a base time.
 34  *    We can't assign the counter value (CRTV) ... but we can reset it.
 35  *
 36  *  - One of the "General Purpose Backup Registers" (GPBRs) holds the
 37  *    base time, normally an offset from the beginning of the POSIX
 38  *    epoch (1970-Jan-1 00:00:00 UTC).  Some systems also include the
 39  *    local timezone's offset.
 40  *
 41  * The RTC's value is the RTT counter plus that offset.  The RTC's alarm
 42  * is likewise a base (ALMV) plus that offset.
 43  *
 44  * Not all RTTs will be used as RTCs; some systems have multiple RTTs to
 45  * choose from, or a "real" RTC module.  All systems have multiple GPBR
 46  * registers available, likewise usable for more than "RTC" support.
 47  */
 48 
 49 #define AT91_RTT_MR             0x00                    /* Real-time Mode Register */
 50 #define AT91_RTT_RTPRES         (0xffff << 0)           /* Real-time Timer Prescaler Value */
 51 #define AT91_RTT_ALMIEN         (1 << 16)               /* Alarm Interrupt Enable */
 52 #define AT91_RTT_RTTINCIEN      (1 << 17)               /* Real Time Timer Increment Interrupt Enable */
 53 #define AT91_RTT_RTTRST         (1 << 18)               /* Real Time Timer Restart */
 54 
 55 #define AT91_RTT_AR             0x04                    /* Real-time Alarm Register */
 56 #define AT91_RTT_ALMV           (0xffffffff)            /* Alarm Value */
 57 
 58 #define AT91_RTT_VR             0x08                    /* Real-time Value Register */
 59 #define AT91_RTT_CRTV           (0xffffffff)            /* Current Real-time Value */
 60 
 61 #define AT91_RTT_SR             0x0c                    /* Real-time Status Register */
 62 #define AT91_RTT_ALMS           (1 << 0)                /* Real-time Alarm Status */
 63 #define AT91_RTT_RTTINC         (1 << 1)                /* Real-time Timer Increment */
 64 
 65 /*
 66  * We store ALARM_DISABLED in ALMV to record that no alarm is set.
 67  * It's also the reset value for that field.
 68  */
 69 #define ALARM_DISABLED  ((u32)~0)
 70 
 71 
 72 struct sam9_rtc {
 73         void __iomem            *rtt;
 74         struct rtc_device       *rtcdev;
 75         u32                     imr;
 76         struct regmap           *gpbr;
 77         unsigned int            gpbr_offset;
 78         int                     irq;
 79         struct clk              *sclk;
 80 };
 81 
 82 #define rtt_readl(rtc, field) \
 83         readl((rtc)->rtt + AT91_RTT_ ## field)
 84 #define rtt_writel(rtc, field, val) \
 85         writel((val), (rtc)->rtt + AT91_RTT_ ## field)
 86 
 87 static inline unsigned int gpbr_readl(struct sam9_rtc *rtc)
 88 {
 89         unsigned int val;
 90 
 91         regmap_read(rtc->gpbr, rtc->gpbr_offset, &val);
 92 
 93         return val;
 94 }
 95 
 96 static inline void gpbr_writel(struct sam9_rtc *rtc, unsigned int val)
 97 {
 98         regmap_write(rtc->gpbr, rtc->gpbr_offset, val);
 99 }
100 
101 /*
102  * Read current time and date in RTC
103  */
104 static int at91_rtc_readtime(struct device *dev, struct rtc_time *tm)
105 {
106         struct sam9_rtc *rtc = dev_get_drvdata(dev);
107         u32 secs, secs2;
108         u32 offset;
109 
110         /* read current time offset */
111         offset = gpbr_readl(rtc);
112         if (offset == 0)
113                 return -EILSEQ;
114 
115         /* reread the counter to help sync the two clock domains */
116         secs = rtt_readl(rtc, VR);
117         secs2 = rtt_readl(rtc, VR);
118         if (secs != secs2)
119                 secs = rtt_readl(rtc, VR);
120 
121         rtc_time_to_tm(offset + secs, tm);
122 
123         dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readtime",
124                 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
125                 tm->tm_hour, tm->tm_min, tm->tm_sec);
126 
127         return 0;
128 }
129 
130 /*
131  * Set current time and date in RTC
132  */
133 static int at91_rtc_settime(struct device *dev, struct rtc_time *tm)
134 {
135         struct sam9_rtc *rtc = dev_get_drvdata(dev);
136         int err;
137         u32 offset, alarm, mr;
138         unsigned long secs;
139 
140         dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "settime",
141                 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
142                 tm->tm_hour, tm->tm_min, tm->tm_sec);
143 
144         err = rtc_tm_to_time(tm, &secs);
145         if (err != 0)
146                 return err;
147 
148         mr = rtt_readl(rtc, MR);
149 
150         /* disable interrupts */
151         rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
152 
153         /* read current time offset */
154         offset = gpbr_readl(rtc);
155 
156         /* store the new base time in a battery backup register */
157         secs += 1;
158         gpbr_writel(rtc, secs);
159 
160         /* adjust the alarm time for the new base */
161         alarm = rtt_readl(rtc, AR);
162         if (alarm != ALARM_DISABLED) {
163                 if (offset > secs) {
164                         /* time jumped backwards, increase time until alarm */
165                         alarm += (offset - secs);
166                 } else if ((alarm + offset) > secs) {
167                         /* time jumped forwards, decrease time until alarm */
168                         alarm -= (secs - offset);
169                 } else {
170                         /* time jumped past the alarm, disable alarm */
171                         alarm = ALARM_DISABLED;
172                         mr &= ~AT91_RTT_ALMIEN;
173                 }
174                 rtt_writel(rtc, AR, alarm);
175         }
176 
177         /* reset the timer, and re-enable interrupts */
178         rtt_writel(rtc, MR, mr | AT91_RTT_RTTRST);
179 
180         return 0;
181 }
182 
183 static int at91_rtc_readalarm(struct device *dev, struct rtc_wkalrm *alrm)
184 {
185         struct sam9_rtc *rtc = dev_get_drvdata(dev);
186         struct rtc_time *tm = &alrm->time;
187         u32 alarm = rtt_readl(rtc, AR);
188         u32 offset;
189 
190         offset = gpbr_readl(rtc);
191         if (offset == 0)
192                 return -EILSEQ;
193 
194         memset(alrm, 0, sizeof(*alrm));
195         if (alarm != ALARM_DISABLED && offset != 0) {
196                 rtc_time_to_tm(offset + alarm, tm);
197 
198                 dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "readalarm",
199                         1900 + tm->tm_year, tm->tm_mon, tm->tm_mday,
200                         tm->tm_hour, tm->tm_min, tm->tm_sec);
201 
202                 if (rtt_readl(rtc, MR) & AT91_RTT_ALMIEN)
203                         alrm->enabled = 1;
204         }
205 
206         return 0;
207 }
208 
209 static int at91_rtc_setalarm(struct device *dev, struct rtc_wkalrm *alrm)
210 {
211         struct sam9_rtc *rtc = dev_get_drvdata(dev);
212         struct rtc_time *tm = &alrm->time;
213         unsigned long secs;
214         u32 offset;
215         u32 mr;
216         int err;
217 
218         err = rtc_tm_to_time(tm, &secs);
219         if (err != 0)
220                 return err;
221 
222         offset = gpbr_readl(rtc);
223         if (offset == 0) {
224                 /* time is not set */
225                 return -EILSEQ;
226         }
227         mr = rtt_readl(rtc, MR);
228         rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
229 
230         /* alarm in the past? finish and leave disabled */
231         if (secs <= offset) {
232                 rtt_writel(rtc, AR, ALARM_DISABLED);
233                 return 0;
234         }
235 
236         /* else set alarm and maybe enable it */
237         rtt_writel(rtc, AR, secs - offset);
238         if (alrm->enabled)
239                 rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
240 
241         dev_dbg(dev, "%s: %4d-%02d-%02d %02d:%02d:%02d\n", "setalarm",
242                 tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour,
243                 tm->tm_min, tm->tm_sec);
244 
245         return 0;
246 }
247 
248 static int at91_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
249 {
250         struct sam9_rtc *rtc = dev_get_drvdata(dev);
251         u32 mr = rtt_readl(rtc, MR);
252 
253         dev_dbg(dev, "alarm_irq_enable: enabled=%08x, mr %08x\n", enabled, mr);
254         if (enabled)
255                 rtt_writel(rtc, MR, mr | AT91_RTT_ALMIEN);
256         else
257                 rtt_writel(rtc, MR, mr & ~AT91_RTT_ALMIEN);
258         return 0;
259 }
260 
261 /*
262  * Provide additional RTC information in /proc/driver/rtc
263  */
264 static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
265 {
266         struct sam9_rtc *rtc = dev_get_drvdata(dev);
267         u32 mr = mr = rtt_readl(rtc, MR);
268 
269         seq_printf(seq, "update_IRQ\t: %s\n",
270                         (mr & AT91_RTT_RTTINCIEN) ? "yes" : "no");
271         return 0;
272 }
273 
274 /*
275  * IRQ handler for the RTC
276  */
277 static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
278 {
279         struct sam9_rtc *rtc = _rtc;
280         u32 sr, mr;
281         unsigned long events = 0;
282 
283         /* Shared interrupt may be for another device.  Note: reading
284          * SR clears it, so we must only read it in this irq handler!
285          */
286         mr = rtt_readl(rtc, MR) & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
287         sr = rtt_readl(rtc, SR) & (mr >> 16);
288         if (!sr)
289                 return IRQ_NONE;
290 
291         /* alarm status */
292         if (sr & AT91_RTT_ALMS)
293                 events |= (RTC_AF | RTC_IRQF);
294 
295         /* timer update/increment */
296         if (sr & AT91_RTT_RTTINC)
297                 events |= (RTC_UF | RTC_IRQF);
298 
299         rtc_update_irq(rtc->rtcdev, 1, events);
300 
301         pr_debug("%s: num=%ld, events=0x%02lx\n", __func__,
302                 events >> 8, events & 0x000000FF);
303 
304         return IRQ_HANDLED;
305 }
306 
307 static const struct rtc_class_ops at91_rtc_ops = {
308         .read_time      = at91_rtc_readtime,
309         .set_time       = at91_rtc_settime,
310         .read_alarm     = at91_rtc_readalarm,
311         .set_alarm      = at91_rtc_setalarm,
312         .proc           = at91_rtc_proc,
313         .alarm_irq_enable = at91_rtc_alarm_irq_enable,
314 };
315 
316 static struct regmap_config gpbr_regmap_config = {
317         .reg_bits = 32,
318         .val_bits = 32,
319         .reg_stride = 4,
320 };
321 
322 /*
323  * Initialize and install RTC driver
324  */
325 static int at91_rtc_probe(struct platform_device *pdev)
326 {
327         struct resource *r;
328         struct sam9_rtc *rtc;
329         int             ret, irq;
330         u32             mr;
331         unsigned int    sclk_rate;
332 
333         irq = platform_get_irq(pdev, 0);
334         if (irq < 0) {
335                 dev_err(&pdev->dev, "failed to get interrupt resource\n");
336                 return irq;
337         }
338 
339         rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL);
340         if (!rtc)
341                 return -ENOMEM;
342 
343         rtc->irq = irq;
344 
345         /* platform setup code should have handled this; sigh */
346         if (!device_can_wakeup(&pdev->dev))
347                 device_init_wakeup(&pdev->dev, 1);
348 
349         platform_set_drvdata(pdev, rtc);
350 
351         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
352         rtc->rtt = devm_ioremap_resource(&pdev->dev, r);
353         if (IS_ERR(rtc->rtt))
354                 return PTR_ERR(rtc->rtt);
355 
356         if (!pdev->dev.of_node) {
357                 /*
358                  * TODO: Remove this code chunk when removing non DT board
359                  * support. Remember to remove the gpbr_regmap_config
360                  * variable too.
361                  */
362                 void __iomem *gpbr;
363 
364                 r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
365                 gpbr = devm_ioremap_resource(&pdev->dev, r);
366                 if (IS_ERR(gpbr))
367                         return PTR_ERR(gpbr);
368 
369                 rtc->gpbr = regmap_init_mmio(NULL, gpbr,
370                                              &gpbr_regmap_config);
371         } else {
372                 struct of_phandle_args args;
373 
374                 ret = of_parse_phandle_with_fixed_args(pdev->dev.of_node,
375                                                 "atmel,rtt-rtc-time-reg", 1, 0,
376                                                 &args);
377                 if (ret)
378                         return ret;
379 
380                 rtc->gpbr = syscon_node_to_regmap(args.np);
381                 rtc->gpbr_offset = args.args[0];
382         }
383 
384         if (IS_ERR(rtc->gpbr)) {
385                 dev_err(&pdev->dev, "failed to retrieve gpbr regmap, aborting.\n");
386                 return -ENOMEM;
387         }
388 
389         rtc->sclk = devm_clk_get(&pdev->dev, NULL);
390         if (IS_ERR(rtc->sclk))
391                 return PTR_ERR(rtc->sclk);
392 
393         sclk_rate = clk_get_rate(rtc->sclk);
394         if (!sclk_rate || sclk_rate > AT91_RTT_RTPRES) {
395                 dev_err(&pdev->dev, "Invalid slow clock rate\n");
396                 return -EINVAL;
397         }
398 
399         ret = clk_prepare_enable(rtc->sclk);
400         if (ret) {
401                 dev_err(&pdev->dev, "Could not enable slow clock\n");
402                 return ret;
403         }
404 
405         mr = rtt_readl(rtc, MR);
406 
407         /* unless RTT is counting at 1 Hz, re-initialize it */
408         if ((mr & AT91_RTT_RTPRES) != sclk_rate) {
409                 mr = AT91_RTT_RTTRST | (sclk_rate & AT91_RTT_RTPRES);
410                 gpbr_writel(rtc, 0);
411         }
412 
413         /* disable all interrupts (same as on shutdown path) */
414         mr &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
415         rtt_writel(rtc, MR, mr);
416 
417         rtc->rtcdev = devm_rtc_device_register(&pdev->dev, pdev->name,
418                                         &at91_rtc_ops, THIS_MODULE);
419         if (IS_ERR(rtc->rtcdev))
420                 return PTR_ERR(rtc->rtcdev);
421 
422         /* register irq handler after we know what name we'll use */
423         ret = devm_request_irq(&pdev->dev, rtc->irq, at91_rtc_interrupt,
424                                 IRQF_SHARED, dev_name(&rtc->rtcdev->dev), rtc);
425         if (ret) {
426                 dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq);
427                 return ret;
428         }
429 
430         /* NOTE:  sam9260 rev A silicon has a ROM bug which resets the
431          * RTT on at least some reboots.  If you have that chip, you must
432          * initialize the time from some external source like a GPS, wall
433          * clock, discrete RTC, etc
434          */
435 
436         if (gpbr_readl(rtc) == 0)
437                 dev_warn(&pdev->dev, "%s: SET TIME!\n",
438                                 dev_name(&rtc->rtcdev->dev));
439 
440         return 0;
441 }
442 
443 /*
444  * Disable and remove the RTC driver
445  */
446 static int at91_rtc_remove(struct platform_device *pdev)
447 {
448         struct sam9_rtc *rtc = platform_get_drvdata(pdev);
449         u32             mr = rtt_readl(rtc, MR);
450 
451         /* disable all interrupts */
452         rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
453 
454         if (!IS_ERR(rtc->sclk))
455                 clk_disable_unprepare(rtc->sclk);
456 
457         return 0;
458 }
459 
460 static void at91_rtc_shutdown(struct platform_device *pdev)
461 {
462         struct sam9_rtc *rtc = platform_get_drvdata(pdev);
463         u32             mr = rtt_readl(rtc, MR);
464 
465         rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
466         rtt_writel(rtc, MR, mr & ~rtc->imr);
467 }
468 
469 #ifdef CONFIG_PM_SLEEP
470 
471 /* AT91SAM9 RTC Power management control */
472 
473 static int at91_rtc_suspend(struct device *dev)
474 {
475         struct sam9_rtc *rtc = dev_get_drvdata(dev);
476         u32             mr = rtt_readl(rtc, MR);
477 
478         /*
479          * This IRQ is shared with DBGU and other hardware which isn't
480          * necessarily a wakeup event source.
481          */
482         rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
483         if (rtc->imr) {
484                 if (device_may_wakeup(dev) && (mr & AT91_RTT_ALMIEN)) {
485                         enable_irq_wake(rtc->irq);
486                         /* don't let RTTINC cause wakeups */
487                         if (mr & AT91_RTT_RTTINCIEN)
488                                 rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
489                 } else
490                         rtt_writel(rtc, MR, mr & ~rtc->imr);
491         }
492 
493         return 0;
494 }
495 
496 static int at91_rtc_resume(struct device *dev)
497 {
498         struct sam9_rtc *rtc = dev_get_drvdata(dev);
499         u32             mr;
500 
501         if (rtc->imr) {
502                 if (device_may_wakeup(dev))
503                         disable_irq_wake(rtc->irq);
504                 mr = rtt_readl(rtc, MR);
505                 rtt_writel(rtc, MR, mr | rtc->imr);
506         }
507 
508         return 0;
509 }
510 #endif
511 
512 static SIMPLE_DEV_PM_OPS(at91_rtc_pm_ops, at91_rtc_suspend, at91_rtc_resume);
513 
514 #ifdef CONFIG_OF
515 static const struct of_device_id at91_rtc_dt_ids[] = {
516         { .compatible = "atmel,at91sam9260-rtt" },
517         { /* sentinel */ }
518 };
519 MODULE_DEVICE_TABLE(of, at91_rtc_dt_ids);
520 #endif
521 
522 static struct platform_driver at91_rtc_driver = {
523         .probe          = at91_rtc_probe,
524         .remove         = at91_rtc_remove,
525         .shutdown       = at91_rtc_shutdown,
526         .driver         = {
527                 .name   = "rtc-at91sam9",
528                 .pm     = &at91_rtc_pm_ops,
529                 .of_match_table = of_match_ptr(at91_rtc_dt_ids),
530         },
531 };
532 
533 module_platform_driver(at91_rtc_driver);
534 
535 MODULE_AUTHOR("Michel Benoit");
536 MODULE_DESCRIPTION("RTC driver for Atmel AT91SAM9x");
537 MODULE_LICENSE("GPL");
538 

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