Version:  2.0.40 2.2.26 2.4.37 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1

Linux/drivers/regulator/pfuze100-regulator.c

  1 /*
  2  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
  3  *
  4  * This program is free software; you can redistribute it and/or modify
  5  * it under the terms of the GNU General Public License as published by
  6  * the Free Software Foundation; either version 2 of the License, or
  7  * (at your option) any later version.
  8  *
  9  * This program is distributed in the hope that it will be useful,
 10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 12  * GNU General Public License for more details.
 13  *
 14  * You should have received a copy of the GNU General Public License
 15  * along with this program; if not, write to the Free Software
 16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 17  */
 18 #include <linux/kernel.h>
 19 #include <linux/module.h>
 20 #include <linux/init.h>
 21 #include <linux/err.h>
 22 #include <linux/of.h>
 23 #include <linux/of_device.h>
 24 #include <linux/regulator/of_regulator.h>
 25 #include <linux/platform_device.h>
 26 #include <linux/regulator/driver.h>
 27 #include <linux/regulator/machine.h>
 28 #include <linux/regulator/pfuze100.h>
 29 #include <linux/i2c.h>
 30 #include <linux/slab.h>
 31 #include <linux/regmap.h>
 32 
 33 #define PFUZE_NUMREGS           128
 34 #define PFUZE100_VOL_OFFSET     0
 35 #define PFUZE100_STANDBY_OFFSET 1
 36 #define PFUZE100_MODE_OFFSET    3
 37 #define PFUZE100_CONF_OFFSET    4
 38 
 39 #define PFUZE100_DEVICEID       0x0
 40 #define PFUZE100_REVID          0x3
 41 #define PFUZE100_FABID          0x4
 42 
 43 #define PFUZE100_SW1ABVOL       0x20
 44 #define PFUZE100_SW1CVOL        0x2e
 45 #define PFUZE100_SW2VOL         0x35
 46 #define PFUZE100_SW3AVOL        0x3c
 47 #define PFUZE100_SW3BVOL        0x43
 48 #define PFUZE100_SW4VOL         0x4a
 49 #define PFUZE100_SWBSTCON1      0x66
 50 #define PFUZE100_VREFDDRCON     0x6a
 51 #define PFUZE100_VSNVSVOL       0x6b
 52 #define PFUZE100_VGEN1VOL       0x6c
 53 #define PFUZE100_VGEN2VOL       0x6d
 54 #define PFUZE100_VGEN3VOL       0x6e
 55 #define PFUZE100_VGEN4VOL       0x6f
 56 #define PFUZE100_VGEN5VOL       0x70
 57 #define PFUZE100_VGEN6VOL       0x71
 58 
 59 enum chips { PFUZE100, PFUZE200, PFUZE3000 = 3 };
 60 
 61 struct pfuze_regulator {
 62         struct regulator_desc desc;
 63         unsigned char stby_reg;
 64         unsigned char stby_mask;
 65 };
 66 
 67 struct pfuze_chip {
 68         int     chip_id;
 69         struct regmap *regmap;
 70         struct device *dev;
 71         struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
 72         struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR];
 73 };
 74 
 75 static const int pfuze100_swbst[] = {
 76         5000000, 5050000, 5100000, 5150000,
 77 };
 78 
 79 static const int pfuze100_vsnvs[] = {
 80         1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
 81 };
 82 
 83 static const int pfuze3000_sw2lo[] = {
 84         1500000, 1550000, 1600000, 1650000, 1700000, 1750000, 1800000, 1850000,
 85 };
 86 
 87 static const int pfuze3000_sw2hi[] = {
 88         2500000, 2800000, 2850000, 3000000, 3100000, 3150000, 3200000, 3300000,
 89 };
 90 
 91 static const struct i2c_device_id pfuze_device_id[] = {
 92         {.name = "pfuze100", .driver_data = PFUZE100},
 93         {.name = "pfuze200", .driver_data = PFUZE200},
 94         {.name = "pfuze3000", .driver_data = PFUZE3000},
 95         { }
 96 };
 97 MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
 98 
 99 static const struct of_device_id pfuze_dt_ids[] = {
100         { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
101         { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
102         { .compatible = "fsl,pfuze3000", .data = (void *)PFUZE3000},
103         { }
104 };
105 MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
106 
107 static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
108 {
109         struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev);
110         int id = rdev_get_id(rdev);
111         unsigned int ramp_bits;
112         int ret;
113 
114         if (id < PFUZE100_SWBST) {
115                 ramp_delay = 12500 / ramp_delay;
116                 ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3);
117                 ret = regmap_update_bits(pfuze100->regmap,
118                                          rdev->desc->vsel_reg + 4,
119                                          0xc0, ramp_bits << 6);
120                 if (ret < 0)
121                         dev_err(pfuze100->dev, "ramp failed, err %d\n", ret);
122         } else
123                 ret = -EACCES;
124 
125         return ret;
126 }
127 
128 static struct regulator_ops pfuze100_ldo_regulator_ops = {
129         .enable = regulator_enable_regmap,
130         .disable = regulator_disable_regmap,
131         .is_enabled = regulator_is_enabled_regmap,
132         .list_voltage = regulator_list_voltage_linear,
133         .set_voltage_sel = regulator_set_voltage_sel_regmap,
134         .get_voltage_sel = regulator_get_voltage_sel_regmap,
135 };
136 
137 static struct regulator_ops pfuze100_fixed_regulator_ops = {
138         .enable = regulator_enable_regmap,
139         .disable = regulator_disable_regmap,
140         .is_enabled = regulator_is_enabled_regmap,
141         .list_voltage = regulator_list_voltage_linear,
142 };
143 
144 static struct regulator_ops pfuze100_sw_regulator_ops = {
145         .list_voltage = regulator_list_voltage_linear,
146         .set_voltage_sel = regulator_set_voltage_sel_regmap,
147         .get_voltage_sel = regulator_get_voltage_sel_regmap,
148         .set_voltage_time_sel = regulator_set_voltage_time_sel,
149         .set_ramp_delay = pfuze100_set_ramp_delay,
150 };
151 
152 static struct regulator_ops pfuze100_swb_regulator_ops = {
153         .enable = regulator_enable_regmap,
154         .disable = regulator_disable_regmap,
155         .list_voltage = regulator_list_voltage_table,
156         .map_voltage = regulator_map_voltage_ascend,
157         .set_voltage_sel = regulator_set_voltage_sel_regmap,
158         .get_voltage_sel = regulator_get_voltage_sel_regmap,
159 
160 };
161 
162 #define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \
163         [_chip ## _ ## _name] = {       \
164                 .desc = {       \
165                         .name = #_name, \
166                         .n_voltages = 1,        \
167                         .ops = &pfuze100_fixed_regulator_ops,   \
168                         .type = REGULATOR_VOLTAGE,      \
169                         .id = _chip ## _ ## _name,      \
170                         .owner = THIS_MODULE,   \
171                         .min_uV = (voltage),    \
172                         .enable_reg = (base),   \
173                         .enable_mask = 0x10,    \
174                 },      \
175         }
176 
177 #define PFUZE100_SW_REG(_chip, _name, base, min, max, step)     \
178         [_chip ## _ ## _name] = {       \
179                 .desc = {       \
180                         .name = #_name,\
181                         .n_voltages = ((max) - (min)) / (step) + 1,     \
182                         .ops = &pfuze100_sw_regulator_ops,      \
183                         .type = REGULATOR_VOLTAGE,      \
184                         .id = _chip ## _ ## _name,      \
185                         .owner = THIS_MODULE,   \
186                         .min_uV = (min),        \
187                         .uV_step = (step),      \
188                         .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
189                         .vsel_mask = 0x3f,      \
190                 },      \
191                 .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
192                 .stby_mask = 0x3f,      \
193         }
194 
195 #define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages)    \
196         [_chip ## _ ##  _name] = {      \
197                 .desc = {       \
198                         .name = #_name, \
199                         .n_voltages = ARRAY_SIZE(voltages),     \
200                         .ops = &pfuze100_swb_regulator_ops,     \
201                         .type = REGULATOR_VOLTAGE,      \
202                         .id = _chip ## _ ## _name,      \
203                         .owner = THIS_MODULE,   \
204                         .volt_table = voltages, \
205                         .vsel_reg = (base),     \
206                         .vsel_mask = (mask),    \
207                         .enable_reg = (base),   \
208                         .enable_mask = 0x48,    \
209                 },      \
210         }
211 
212 #define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step)   \
213         [_chip ## _ ## _name] = {       \
214                 .desc = {       \
215                         .name = #_name, \
216                         .n_voltages = ((max) - (min)) / (step) + 1,     \
217                         .ops = &pfuze100_ldo_regulator_ops,     \
218                         .type = REGULATOR_VOLTAGE,      \
219                         .id = _chip ## _ ## _name,      \
220                         .owner = THIS_MODULE,   \
221                         .min_uV = (min),        \
222                         .uV_step = (step),      \
223                         .vsel_reg = (base),     \
224                         .vsel_mask = 0xf,       \
225                         .enable_reg = (base),   \
226                         .enable_mask = 0x10,    \
227                 },      \
228                 .stby_reg = (base),     \
229                 .stby_mask = 0x20,      \
230         }
231 
232 #define PFUZE3000_VCC_REG(_chip, _name, base, min, max, step)   {       \
233         .desc = {       \
234                 .name = #_name, \
235                 .n_voltages = ((max) - (min)) / (step) + 1,     \
236                 .ops = &pfuze100_ldo_regulator_ops,     \
237                 .type = REGULATOR_VOLTAGE,      \
238                 .id = _chip ## _ ## _name,      \
239                 .owner = THIS_MODULE,   \
240                 .min_uV = (min),        \
241                 .uV_step = (step),      \
242                 .vsel_reg = (base),     \
243                 .vsel_mask = 0x3,       \
244                 .enable_reg = (base),   \
245                 .enable_mask = 0x10,    \
246         },      \
247         .stby_reg = (base),     \
248         .stby_mask = 0x20,      \
249 }
250 
251 
252 #define PFUZE3000_SW2_REG(_chip, _name, base, min, max, step)   {       \
253         .desc = {       \
254                 .name = #_name,\
255                 .n_voltages = ((max) - (min)) / (step) + 1,     \
256                 .ops = &pfuze100_sw_regulator_ops,      \
257                 .type = REGULATOR_VOLTAGE,      \
258                 .id = _chip ## _ ## _name,      \
259                 .owner = THIS_MODULE,   \
260                 .min_uV = (min),        \
261                 .uV_step = (step),      \
262                 .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
263                 .vsel_mask = 0x7,       \
264         },      \
265         .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
266         .stby_mask = 0x7,       \
267 }
268 
269 #define PFUZE3000_SW3_REG(_chip, _name, base, min, max, step)   {       \
270         .desc = {       \
271                 .name = #_name,\
272                 .n_voltages = ((max) - (min)) / (step) + 1,     \
273                 .ops = &pfuze100_sw_regulator_ops,      \
274                 .type = REGULATOR_VOLTAGE,      \
275                 .id = _chip ## _ ## _name,      \
276                 .owner = THIS_MODULE,   \
277                 .min_uV = (min),        \
278                 .uV_step = (step),      \
279                 .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
280                 .vsel_mask = 0xf,       \
281         },      \
282         .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
283         .stby_mask = 0xf,       \
284 }
285 
286 /* PFUZE100 */
287 static struct pfuze_regulator pfuze100_regulators[] = {
288         PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
289         PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
290         PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
291         PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
292         PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
293         PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
294         PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
295         PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
296         PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000),
297         PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
298         PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
299         PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
300         PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
301         PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
302         PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
303 };
304 
305 static struct pfuze_regulator pfuze200_regulators[] = {
306         PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
307         PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
308         PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
309         PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
310         PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
311         PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
312         PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000),
313         PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
314         PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
315         PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
316         PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
317         PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
318         PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
319 };
320 
321 static struct pfuze_regulator pfuze3000_regulators[] = {
322         PFUZE100_SW_REG(PFUZE3000, SW1A, PFUZE100_SW1ABVOL, 700000, 1475000, 25000),
323         PFUZE100_SW_REG(PFUZE3000, SW1B, PFUZE100_SW1CVOL, 700000, 1475000, 25000),
324         PFUZE100_SWB_REG(PFUZE3000, SW2, PFUZE100_SW2VOL, 0x7, pfuze3000_sw2lo),
325         PFUZE3000_SW3_REG(PFUZE3000, SW3, PFUZE100_SW3AVOL, 900000, 1650000, 50000),
326         PFUZE100_SWB_REG(PFUZE3000, SWBST, PFUZE100_SWBSTCON1, 0x3, pfuze100_swbst),
327         PFUZE100_SWB_REG(PFUZE3000, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
328         PFUZE100_FIXED_REG(PFUZE3000, VREFDDR, PFUZE100_VREFDDRCON, 750000),
329         PFUZE100_VGEN_REG(PFUZE3000, VLDO1, PFUZE100_VGEN1VOL, 1800000, 3300000, 100000),
330         PFUZE100_VGEN_REG(PFUZE3000, VLDO2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
331         PFUZE3000_VCC_REG(PFUZE3000, VCCSD, PFUZE100_VGEN3VOL, 2850000, 3300000, 150000),
332         PFUZE3000_VCC_REG(PFUZE3000, V33, PFUZE100_VGEN4VOL, 2850000, 3300000, 150000),
333         PFUZE100_VGEN_REG(PFUZE3000, VLDO3, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
334         PFUZE100_VGEN_REG(PFUZE3000, VLDO4, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
335 };
336 
337 static struct pfuze_regulator *pfuze_regulators;
338 
339 #ifdef CONFIG_OF
340 /* PFUZE100 */
341 static struct of_regulator_match pfuze100_matches[] = {
342         { .name = "sw1ab",      },
343         { .name = "sw1c",       },
344         { .name = "sw2",        },
345         { .name = "sw3a",       },
346         { .name = "sw3b",       },
347         { .name = "sw4",        },
348         { .name = "swbst",      },
349         { .name = "vsnvs",      },
350         { .name = "vrefddr",    },
351         { .name = "vgen1",      },
352         { .name = "vgen2",      },
353         { .name = "vgen3",      },
354         { .name = "vgen4",      },
355         { .name = "vgen5",      },
356         { .name = "vgen6",      },
357 };
358 
359 /* PFUZE200 */
360 static struct of_regulator_match pfuze200_matches[] = {
361 
362         { .name = "sw1ab",      },
363         { .name = "sw2",        },
364         { .name = "sw3a",       },
365         { .name = "sw3b",       },
366         { .name = "swbst",      },
367         { .name = "vsnvs",      },
368         { .name = "vrefddr",    },
369         { .name = "vgen1",      },
370         { .name = "vgen2",      },
371         { .name = "vgen3",      },
372         { .name = "vgen4",      },
373         { .name = "vgen5",      },
374         { .name = "vgen6",      },
375 };
376 
377 /* PFUZE3000 */
378 static struct of_regulator_match pfuze3000_matches[] = {
379 
380         { .name = "sw1a",       },
381         { .name = "sw1b",       },
382         { .name = "sw2",        },
383         { .name = "sw3",        },
384         { .name = "swbst",      },
385         { .name = "vsnvs",      },
386         { .name = "vrefddr",    },
387         { .name = "vldo1",      },
388         { .name = "vldo2",      },
389         { .name = "vccsd",      },
390         { .name = "v33",        },
391         { .name = "vldo3",      },
392         { .name = "vldo4",      },
393 };
394 
395 static struct of_regulator_match *pfuze_matches;
396 
397 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
398 {
399         struct device *dev = chip->dev;
400         struct device_node *np, *parent;
401         int ret;
402 
403         np = of_node_get(dev->of_node);
404         if (!np)
405                 return -EINVAL;
406 
407         parent = of_get_child_by_name(np, "regulators");
408         if (!parent) {
409                 dev_err(dev, "regulators node not found\n");
410                 return -EINVAL;
411         }
412 
413         switch (chip->chip_id) {
414         case PFUZE3000:
415                 pfuze_matches = pfuze3000_matches;
416                 ret = of_regulator_match(dev, parent, pfuze3000_matches,
417                                          ARRAY_SIZE(pfuze3000_matches));
418                 break;
419         case PFUZE200:
420                 pfuze_matches = pfuze200_matches;
421                 ret = of_regulator_match(dev, parent, pfuze200_matches,
422                                          ARRAY_SIZE(pfuze200_matches));
423                 break;
424 
425         case PFUZE100:
426         default:
427                 pfuze_matches = pfuze100_matches;
428                 ret = of_regulator_match(dev, parent, pfuze100_matches,
429                                          ARRAY_SIZE(pfuze100_matches));
430                 break;
431         }
432 
433         of_node_put(parent);
434         if (ret < 0) {
435                 dev_err(dev, "Error parsing regulator init data: %d\n",
436                         ret);
437                 return ret;
438         }
439 
440         return 0;
441 }
442 
443 static inline struct regulator_init_data *match_init_data(int index)
444 {
445         return pfuze_matches[index].init_data;
446 }
447 
448 static inline struct device_node *match_of_node(int index)
449 {
450         return pfuze_matches[index].of_node;
451 }
452 #else
453 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
454 {
455         return 0;
456 }
457 
458 static inline struct regulator_init_data *match_init_data(int index)
459 {
460         return NULL;
461 }
462 
463 static inline struct device_node *match_of_node(int index)
464 {
465         return NULL;
466 }
467 #endif
468 
469 static int pfuze_identify(struct pfuze_chip *pfuze_chip)
470 {
471         unsigned int value;
472         int ret;
473 
474         ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value);
475         if (ret)
476                 return ret;
477 
478         if (((value & 0x0f) == 0x8) && (pfuze_chip->chip_id == PFUZE100)) {
479                 /*
480                  * Freescale misprogrammed 1-3% of parts prior to week 8 of 2013
481                  * as ID=8 in PFUZE100
482                  */
483                 dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
484         } else if ((value & 0x0f) != pfuze_chip->chip_id &&
485                    (value & 0xf0) >> 4 != pfuze_chip->chip_id) {
486                 /* device id NOT match with your setting */
487                 dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
488                 return -ENODEV;
489         }
490 
491         ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
492         if (ret)
493                 return ret;
494         dev_info(pfuze_chip->dev,
495                  "Full layer: %x, Metal layer: %x\n",
496                  (value & 0xf0) >> 4, value & 0x0f);
497 
498         ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value);
499         if (ret)
500                 return ret;
501         dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n",
502                  (value & 0xc) >> 2, value & 0x3);
503 
504         return 0;
505 }
506 
507 static const struct regmap_config pfuze_regmap_config = {
508         .reg_bits = 8,
509         .val_bits = 8,
510         .max_register = PFUZE_NUMREGS - 1,
511         .cache_type = REGCACHE_RBTREE,
512 };
513 
514 static int pfuze100_regulator_probe(struct i2c_client *client,
515                                     const struct i2c_device_id *id)
516 {
517         struct pfuze_chip *pfuze_chip;
518         struct pfuze_regulator_platform_data *pdata =
519             dev_get_platdata(&client->dev);
520         struct regulator_config config = { };
521         int i, ret;
522         const struct of_device_id *match;
523         u32 regulator_num;
524         u32 sw_check_start, sw_check_end, sw_hi = 0x40;
525 
526         pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
527                         GFP_KERNEL);
528         if (!pfuze_chip)
529                 return -ENOMEM;
530 
531         if (client->dev.of_node) {
532                 match = of_match_device(of_match_ptr(pfuze_dt_ids),
533                                 &client->dev);
534                 if (!match) {
535                         dev_err(&client->dev, "Error: No device match found\n");
536                         return -ENODEV;
537                 }
538                 pfuze_chip->chip_id = (int)(long)match->data;
539         } else if (id) {
540                 pfuze_chip->chip_id = id->driver_data;
541         } else {
542                 dev_err(&client->dev, "No dts match or id table match found\n");
543                 return -ENODEV;
544         }
545 
546         i2c_set_clientdata(client, pfuze_chip);
547         pfuze_chip->dev = &client->dev;
548 
549         pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
550         if (IS_ERR(pfuze_chip->regmap)) {
551                 ret = PTR_ERR(pfuze_chip->regmap);
552                 dev_err(&client->dev,
553                         "regmap allocation failed with err %d\n", ret);
554                 return ret;
555         }
556 
557         ret = pfuze_identify(pfuze_chip);
558         if (ret) {
559                 dev_err(&client->dev, "unrecognized pfuze chip ID!\n");
560                 return ret;
561         }
562 
563         /* use the right regulators after identify the right device */
564         switch (pfuze_chip->chip_id) {
565         case PFUZE3000:
566                 pfuze_regulators = pfuze3000_regulators;
567                 regulator_num = ARRAY_SIZE(pfuze3000_regulators);
568                 sw_check_start = PFUZE3000_SW2;
569                 sw_check_end = PFUZE3000_SW2;
570                 sw_hi = 1 << 3;
571                 break;
572         case PFUZE200:
573                 pfuze_regulators = pfuze200_regulators;
574                 regulator_num = ARRAY_SIZE(pfuze200_regulators);
575                 sw_check_start = PFUZE200_SW2;
576                 sw_check_end = PFUZE200_SW3B;
577                 break;
578         case PFUZE100:
579         default:
580                 pfuze_regulators = pfuze100_regulators;
581                 regulator_num = ARRAY_SIZE(pfuze100_regulators);
582                 sw_check_start = PFUZE100_SW2;
583                 sw_check_end = PFUZE100_SW4;
584                 break;
585         }
586         dev_info(&client->dev, "pfuze%s found.\n",
587                 (pfuze_chip->chip_id == PFUZE100) ? "100" :
588                 ((pfuze_chip->chip_id == PFUZE200) ? "200" : "3000"));
589 
590         memcpy(pfuze_chip->regulator_descs, pfuze_regulators,
591                 sizeof(pfuze_chip->regulator_descs));
592 
593         ret = pfuze_parse_regulators_dt(pfuze_chip);
594         if (ret)
595                 return ret;
596 
597         for (i = 0; i < regulator_num; i++) {
598                 struct regulator_init_data *init_data;
599                 struct regulator_desc *desc;
600                 int val;
601 
602                 desc = &pfuze_chip->regulator_descs[i].desc;
603 
604                 if (pdata)
605                         init_data = pdata->init_data[i];
606                 else
607                         init_data = match_init_data(i);
608 
609                 /* SW2~SW4 high bit check and modify the voltage value table */
610                 if (i >= sw_check_start && i <= sw_check_end) {
611                         regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
612                         if (val & sw_hi) {
613                                 if (pfuze_chip->chip_id == PFUZE3000) {
614                                         desc->volt_table = pfuze3000_sw2hi;
615                                         desc->n_voltages = ARRAY_SIZE(pfuze3000_sw2hi);
616                                 } else {
617                                         desc->min_uV = 800000;
618                                         desc->uV_step = 50000;
619                                         desc->n_voltages = 51;
620                                 }
621                         }
622                 }
623 
624                 config.dev = &client->dev;
625                 config.init_data = init_data;
626                 config.driver_data = pfuze_chip;
627                 config.of_node = match_of_node(i);
628                 config.ena_gpio = -EINVAL;
629 
630                 pfuze_chip->regulators[i] =
631                         devm_regulator_register(&client->dev, desc, &config);
632                 if (IS_ERR(pfuze_chip->regulators[i])) {
633                         dev_err(&client->dev, "register regulator%s failed\n",
634                                 pfuze_regulators[i].desc.name);
635                         return PTR_ERR(pfuze_chip->regulators[i]);
636                 }
637         }
638 
639         return 0;
640 }
641 
642 static struct i2c_driver pfuze_driver = {
643         .id_table = pfuze_device_id,
644         .driver = {
645                 .name = "pfuze100-regulator",
646                 .owner = THIS_MODULE,
647                 .of_match_table = pfuze_dt_ids,
648         },
649         .probe = pfuze100_regulator_probe,
650 };
651 module_i2c_driver(pfuze_driver);
652 
653 MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
654 MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/PFUZE200 PMIC");
655 MODULE_LICENSE("GPL v2");
656 MODULE_ALIAS("i2c:pfuze100-regulator");
657 

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