Version:  2.0.40 2.2.26 2.4.37 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17

Linux/drivers/regulator/pfuze100-regulator.c

  1 /*
  2  * Copyright (C) 2011-2013 Freescale Semiconductor, Inc. All Rights Reserved.
  3  *
  4  * This program is free software; you can redistribute it and/or modify
  5  * it under the terms of the GNU General Public License as published by
  6  * the Free Software Foundation; either version 2 of the License, or
  7  * (at your option) any later version.
  8  *
  9  * This program is distributed in the hope that it will be useful,
 10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 12  * GNU General Public License for more details.
 13  *
 14  * You should have received a copy of the GNU General Public License
 15  * along with this program; if not, write to the Free Software
 16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
 17  */
 18 #include <linux/kernel.h>
 19 #include <linux/module.h>
 20 #include <linux/init.h>
 21 #include <linux/err.h>
 22 #include <linux/of.h>
 23 #include <linux/of_device.h>
 24 #include <linux/regulator/of_regulator.h>
 25 #include <linux/platform_device.h>
 26 #include <linux/regulator/driver.h>
 27 #include <linux/regulator/machine.h>
 28 #include <linux/regulator/pfuze100.h>
 29 #include <linux/i2c.h>
 30 #include <linux/slab.h>
 31 #include <linux/regmap.h>
 32 
 33 #define PFUZE_NUMREGS           128
 34 #define PFUZE100_VOL_OFFSET     0
 35 #define PFUZE100_STANDBY_OFFSET 1
 36 #define PFUZE100_MODE_OFFSET    3
 37 #define PFUZE100_CONF_OFFSET    4
 38 
 39 #define PFUZE100_DEVICEID       0x0
 40 #define PFUZE100_REVID          0x3
 41 #define PFUZE100_FABID          0x4
 42 
 43 #define PFUZE100_SW1ABVOL       0x20
 44 #define PFUZE100_SW1CVOL        0x2e
 45 #define PFUZE100_SW2VOL         0x35
 46 #define PFUZE100_SW3AVOL        0x3c
 47 #define PFUZE100_SW3BVOL        0x43
 48 #define PFUZE100_SW4VOL         0x4a
 49 #define PFUZE100_SWBSTCON1      0x66
 50 #define PFUZE100_VREFDDRCON     0x6a
 51 #define PFUZE100_VSNVSVOL       0x6b
 52 #define PFUZE100_VGEN1VOL       0x6c
 53 #define PFUZE100_VGEN2VOL       0x6d
 54 #define PFUZE100_VGEN3VOL       0x6e
 55 #define PFUZE100_VGEN4VOL       0x6f
 56 #define PFUZE100_VGEN5VOL       0x70
 57 #define PFUZE100_VGEN6VOL       0x71
 58 
 59 enum chips { PFUZE100, PFUZE200 };
 60 
 61 struct pfuze_regulator {
 62         struct regulator_desc desc;
 63         unsigned char stby_reg;
 64         unsigned char stby_mask;
 65 };
 66 
 67 struct pfuze_chip {
 68         int     chip_id;
 69         struct regmap *regmap;
 70         struct device *dev;
 71         struct pfuze_regulator regulator_descs[PFUZE100_MAX_REGULATOR];
 72         struct regulator_dev *regulators[PFUZE100_MAX_REGULATOR];
 73 };
 74 
 75 static const int pfuze100_swbst[] = {
 76         5000000, 5050000, 5100000, 5150000,
 77 };
 78 
 79 static const int pfuze100_vsnvs[] = {
 80         1000000, 1100000, 1200000, 1300000, 1500000, 1800000, 3000000,
 81 };
 82 
 83 static const struct i2c_device_id pfuze_device_id[] = {
 84         {.name = "pfuze100", .driver_data = PFUZE100},
 85         {.name = "pfuze200", .driver_data = PFUZE200},
 86         { }
 87 };
 88 MODULE_DEVICE_TABLE(i2c, pfuze_device_id);
 89 
 90 static const struct of_device_id pfuze_dt_ids[] = {
 91         { .compatible = "fsl,pfuze100", .data = (void *)PFUZE100},
 92         { .compatible = "fsl,pfuze200", .data = (void *)PFUZE200},
 93         { }
 94 };
 95 MODULE_DEVICE_TABLE(of, pfuze_dt_ids);
 96 
 97 static int pfuze100_set_ramp_delay(struct regulator_dev *rdev, int ramp_delay)
 98 {
 99         struct pfuze_chip *pfuze100 = rdev_get_drvdata(rdev);
100         int id = rdev_get_id(rdev);
101         unsigned int ramp_bits;
102         int ret;
103 
104         if (id < PFUZE100_SWBST) {
105                 ramp_delay = 12500 / ramp_delay;
106                 ramp_bits = (ramp_delay >> 1) - (ramp_delay >> 3);
107                 ret = regmap_update_bits(pfuze100->regmap,
108                                          rdev->desc->vsel_reg + 4,
109                                          0xc0, ramp_bits << 6);
110                 if (ret < 0)
111                         dev_err(pfuze100->dev, "ramp failed, err %d\n", ret);
112         } else
113                 ret = -EACCES;
114 
115         return ret;
116 }
117 
118 static struct regulator_ops pfuze100_ldo_regulator_ops = {
119         .enable = regulator_enable_regmap,
120         .disable = regulator_disable_regmap,
121         .is_enabled = regulator_is_enabled_regmap,
122         .list_voltage = regulator_list_voltage_linear,
123         .set_voltage_sel = regulator_set_voltage_sel_regmap,
124         .get_voltage_sel = regulator_get_voltage_sel_regmap,
125 };
126 
127 static struct regulator_ops pfuze100_fixed_regulator_ops = {
128         .enable = regulator_enable_regmap,
129         .disable = regulator_disable_regmap,
130         .is_enabled = regulator_is_enabled_regmap,
131         .list_voltage = regulator_list_voltage_linear,
132 };
133 
134 static struct regulator_ops pfuze100_sw_regulator_ops = {
135         .list_voltage = regulator_list_voltage_linear,
136         .set_voltage_sel = regulator_set_voltage_sel_regmap,
137         .get_voltage_sel = regulator_get_voltage_sel_regmap,
138         .set_voltage_time_sel = regulator_set_voltage_time_sel,
139         .set_ramp_delay = pfuze100_set_ramp_delay,
140 };
141 
142 static struct regulator_ops pfuze100_swb_regulator_ops = {
143         .enable = regulator_enable_regmap,
144         .disable = regulator_disable_regmap,
145         .list_voltage = regulator_list_voltage_table,
146         .map_voltage = regulator_map_voltage_ascend,
147         .set_voltage_sel = regulator_set_voltage_sel_regmap,
148         .get_voltage_sel = regulator_get_voltage_sel_regmap,
149 
150 };
151 
152 #define PFUZE100_FIXED_REG(_chip, _name, base, voltage) \
153         [_chip ## _ ## _name] = {       \
154                 .desc = {       \
155                         .name = #_name, \
156                         .n_voltages = 1,        \
157                         .ops = &pfuze100_fixed_regulator_ops,   \
158                         .type = REGULATOR_VOLTAGE,      \
159                         .id = _chip ## _ ## _name,      \
160                         .owner = THIS_MODULE,   \
161                         .min_uV = (voltage),    \
162                         .enable_reg = (base),   \
163                         .enable_mask = 0x10,    \
164                 },      \
165         }
166 
167 #define PFUZE100_SW_REG(_chip, _name, base, min, max, step)     \
168         [_chip ## _ ## _name] = {       \
169                 .desc = {       \
170                         .name = #_name,\
171                         .n_voltages = ((max) - (min)) / (step) + 1,     \
172                         .ops = &pfuze100_sw_regulator_ops,      \
173                         .type = REGULATOR_VOLTAGE,      \
174                         .id = _chip ## _ ## _name,      \
175                         .owner = THIS_MODULE,   \
176                         .min_uV = (min),        \
177                         .uV_step = (step),      \
178                         .vsel_reg = (base) + PFUZE100_VOL_OFFSET,       \
179                         .vsel_mask = 0x3f,      \
180                 },      \
181                 .stby_reg = (base) + PFUZE100_STANDBY_OFFSET,   \
182                 .stby_mask = 0x3f,      \
183         }
184 
185 #define PFUZE100_SWB_REG(_chip, _name, base, mask, voltages)    \
186         [_chip ## _ ##  _name] = {      \
187                 .desc = {       \
188                         .name = #_name, \
189                         .n_voltages = ARRAY_SIZE(voltages),     \
190                         .ops = &pfuze100_swb_regulator_ops,     \
191                         .type = REGULATOR_VOLTAGE,      \
192                         .id = _chip ## _ ## _name,      \
193                         .owner = THIS_MODULE,   \
194                         .volt_table = voltages, \
195                         .vsel_reg = (base),     \
196                         .vsel_mask = (mask),    \
197                         .enable_reg = (base),   \
198                         .enable_mask = 0x48,    \
199                 },      \
200         }
201 
202 #define PFUZE100_VGEN_REG(_chip, _name, base, min, max, step)   \
203         [_chip ## _ ## _name] = {       \
204                 .desc = {       \
205                         .name = #_name, \
206                         .n_voltages = ((max) - (min)) / (step) + 1,     \
207                         .ops = &pfuze100_ldo_regulator_ops,     \
208                         .type = REGULATOR_VOLTAGE,      \
209                         .id = _chip ## _ ## _name,      \
210                         .owner = THIS_MODULE,   \
211                         .min_uV = (min),        \
212                         .uV_step = (step),      \
213                         .vsel_reg = (base),     \
214                         .vsel_mask = 0xf,       \
215                         .enable_reg = (base),   \
216                         .enable_mask = 0x10,    \
217                 },      \
218                 .stby_reg = (base),     \
219                 .stby_mask = 0x20,      \
220         }
221 
222 /* PFUZE100 */
223 static struct pfuze_regulator pfuze100_regulators[] = {
224         PFUZE100_SW_REG(PFUZE100, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
225         PFUZE100_SW_REG(PFUZE100, SW1C, PFUZE100_SW1CVOL, 300000, 1875000, 25000),
226         PFUZE100_SW_REG(PFUZE100, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
227         PFUZE100_SW_REG(PFUZE100, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
228         PFUZE100_SW_REG(PFUZE100, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
229         PFUZE100_SW_REG(PFUZE100, SW4, PFUZE100_SW4VOL, 400000, 1975000, 25000),
230         PFUZE100_SWB_REG(PFUZE100, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
231         PFUZE100_SWB_REG(PFUZE100, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
232         PFUZE100_FIXED_REG(PFUZE100, VREFDDR, PFUZE100_VREFDDRCON, 750000),
233         PFUZE100_VGEN_REG(PFUZE100, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
234         PFUZE100_VGEN_REG(PFUZE100, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
235         PFUZE100_VGEN_REG(PFUZE100, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
236         PFUZE100_VGEN_REG(PFUZE100, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
237         PFUZE100_VGEN_REG(PFUZE100, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
238         PFUZE100_VGEN_REG(PFUZE100, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
239 };
240 
241 static struct pfuze_regulator pfuze200_regulators[] = {
242         PFUZE100_SW_REG(PFUZE200, SW1AB, PFUZE100_SW1ABVOL, 300000, 1875000, 25000),
243         PFUZE100_SW_REG(PFUZE200, SW2, PFUZE100_SW2VOL, 400000, 1975000, 25000),
244         PFUZE100_SW_REG(PFUZE200, SW3A, PFUZE100_SW3AVOL, 400000, 1975000, 25000),
245         PFUZE100_SW_REG(PFUZE200, SW3B, PFUZE100_SW3BVOL, 400000, 1975000, 25000),
246         PFUZE100_SWB_REG(PFUZE200, SWBST, PFUZE100_SWBSTCON1, 0x3 , pfuze100_swbst),
247         PFUZE100_SWB_REG(PFUZE200, VSNVS, PFUZE100_VSNVSVOL, 0x7, pfuze100_vsnvs),
248         PFUZE100_FIXED_REG(PFUZE200, VREFDDR, PFUZE100_VREFDDRCON, 750000),
249         PFUZE100_VGEN_REG(PFUZE200, VGEN1, PFUZE100_VGEN1VOL, 800000, 1550000, 50000),
250         PFUZE100_VGEN_REG(PFUZE200, VGEN2, PFUZE100_VGEN2VOL, 800000, 1550000, 50000),
251         PFUZE100_VGEN_REG(PFUZE200, VGEN3, PFUZE100_VGEN3VOL, 1800000, 3300000, 100000),
252         PFUZE100_VGEN_REG(PFUZE200, VGEN4, PFUZE100_VGEN4VOL, 1800000, 3300000, 100000),
253         PFUZE100_VGEN_REG(PFUZE200, VGEN5, PFUZE100_VGEN5VOL, 1800000, 3300000, 100000),
254         PFUZE100_VGEN_REG(PFUZE200, VGEN6, PFUZE100_VGEN6VOL, 1800000, 3300000, 100000),
255 };
256 
257 static struct pfuze_regulator *pfuze_regulators;
258 
259 #ifdef CONFIG_OF
260 /* PFUZE100 */
261 static struct of_regulator_match pfuze100_matches[] = {
262         { .name = "sw1ab",      },
263         { .name = "sw1c",       },
264         { .name = "sw2",        },
265         { .name = "sw3a",       },
266         { .name = "sw3b",       },
267         { .name = "sw4",        },
268         { .name = "swbst",      },
269         { .name = "vsnvs",      },
270         { .name = "vrefddr",    },
271         { .name = "vgen1",      },
272         { .name = "vgen2",      },
273         { .name = "vgen3",      },
274         { .name = "vgen4",      },
275         { .name = "vgen5",      },
276         { .name = "vgen6",      },
277 };
278 
279 /* PFUZE200 */
280 static struct of_regulator_match pfuze200_matches[] = {
281 
282         { .name = "sw1ab",      },
283         { .name = "sw2",        },
284         { .name = "sw3a",       },
285         { .name = "sw3b",       },
286         { .name = "swbst",      },
287         { .name = "vsnvs",      },
288         { .name = "vrefddr",    },
289         { .name = "vgen1",      },
290         { .name = "vgen2",      },
291         { .name = "vgen3",      },
292         { .name = "vgen4",      },
293         { .name = "vgen5",      },
294         { .name = "vgen6",      },
295 };
296 
297 static struct of_regulator_match *pfuze_matches;
298 
299 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
300 {
301         struct device *dev = chip->dev;
302         struct device_node *np, *parent;
303         int ret;
304 
305         np = of_node_get(dev->of_node);
306         if (!np)
307                 return -EINVAL;
308 
309         parent = of_get_child_by_name(np, "regulators");
310         if (!parent) {
311                 dev_err(dev, "regulators node not found\n");
312                 return -EINVAL;
313         }
314 
315         switch (chip->chip_id) {
316         case PFUZE200:
317                 pfuze_matches = pfuze200_matches;
318                 ret = of_regulator_match(dev, parent, pfuze200_matches,
319                                          ARRAY_SIZE(pfuze200_matches));
320                 break;
321 
322         case PFUZE100:
323         default:
324                 pfuze_matches = pfuze100_matches;
325                 ret = of_regulator_match(dev, parent, pfuze100_matches,
326                                          ARRAY_SIZE(pfuze100_matches));
327                 break;
328         }
329 
330         of_node_put(parent);
331         if (ret < 0) {
332                 dev_err(dev, "Error parsing regulator init data: %d\n",
333                         ret);
334                 return ret;
335         }
336 
337         return 0;
338 }
339 
340 static inline struct regulator_init_data *match_init_data(int index)
341 {
342         return pfuze_matches[index].init_data;
343 }
344 
345 static inline struct device_node *match_of_node(int index)
346 {
347         return pfuze_matches[index].of_node;
348 }
349 #else
350 static int pfuze_parse_regulators_dt(struct pfuze_chip *chip)
351 {
352         return 0;
353 }
354 
355 static inline struct regulator_init_data *match_init_data(int index)
356 {
357         return NULL;
358 }
359 
360 static inline struct device_node *match_of_node(int index)
361 {
362         return NULL;
363 }
364 #endif
365 
366 static int pfuze_identify(struct pfuze_chip *pfuze_chip)
367 {
368         unsigned int value;
369         int ret;
370 
371         ret = regmap_read(pfuze_chip->regmap, PFUZE100_DEVICEID, &value);
372         if (ret)
373                 return ret;
374 
375         if (((value & 0x0f) == 0x8) && (pfuze_chip->chip_id == PFUZE100)) {
376                 /*
377                  * Freescale misprogrammed 1-3% of parts prior to week 8 of 2013
378                  * as ID=8 in PFUZE100
379                  */
380                 dev_info(pfuze_chip->dev, "Assuming misprogrammed ID=0x8");
381         } else if ((value & 0x0f) != pfuze_chip->chip_id) {
382                 /* device id NOT match with your setting */
383                 dev_warn(pfuze_chip->dev, "Illegal ID: %x\n", value);
384                 return -ENODEV;
385         }
386 
387         ret = regmap_read(pfuze_chip->regmap, PFUZE100_REVID, &value);
388         if (ret)
389                 return ret;
390         dev_info(pfuze_chip->dev,
391                  "Full layer: %x, Metal layer: %x\n",
392                  (value & 0xf0) >> 4, value & 0x0f);
393 
394         ret = regmap_read(pfuze_chip->regmap, PFUZE100_FABID, &value);
395         if (ret)
396                 return ret;
397         dev_info(pfuze_chip->dev, "FAB: %x, FIN: %x\n",
398                  (value & 0xc) >> 2, value & 0x3);
399 
400         return 0;
401 }
402 
403 static const struct regmap_config pfuze_regmap_config = {
404         .reg_bits = 8,
405         .val_bits = 8,
406         .max_register = PFUZE_NUMREGS - 1,
407         .cache_type = REGCACHE_RBTREE,
408 };
409 
410 static int pfuze100_regulator_probe(struct i2c_client *client,
411                                     const struct i2c_device_id *id)
412 {
413         struct pfuze_chip *pfuze_chip;
414         struct pfuze_regulator_platform_data *pdata =
415             dev_get_platdata(&client->dev);
416         struct regulator_config config = { };
417         int i, ret;
418         const struct of_device_id *match;
419         u32 regulator_num;
420         u32 sw_check_start, sw_check_end;
421 
422         pfuze_chip = devm_kzalloc(&client->dev, sizeof(*pfuze_chip),
423                         GFP_KERNEL);
424         if (!pfuze_chip)
425                 return -ENOMEM;
426 
427         if (client->dev.of_node) {
428                 match = of_match_device(of_match_ptr(pfuze_dt_ids),
429                                 &client->dev);
430                 if (!match) {
431                         dev_err(&client->dev, "Error: No device match found\n");
432                         return -ENODEV;
433                 }
434                 pfuze_chip->chip_id = (int)(long)match->data;
435         } else if (id) {
436                 pfuze_chip->chip_id = id->driver_data;
437         } else {
438                 dev_err(&client->dev, "No dts match or id table match found\n");
439                 return -ENODEV;
440         }
441 
442         i2c_set_clientdata(client, pfuze_chip);
443         pfuze_chip->dev = &client->dev;
444 
445         pfuze_chip->regmap = devm_regmap_init_i2c(client, &pfuze_regmap_config);
446         if (IS_ERR(pfuze_chip->regmap)) {
447                 ret = PTR_ERR(pfuze_chip->regmap);
448                 dev_err(&client->dev,
449                         "regmap allocation failed with err %d\n", ret);
450                 return ret;
451         }
452 
453         ret = pfuze_identify(pfuze_chip);
454         if (ret) {
455                 dev_err(&client->dev, "unrecognized pfuze chip ID!\n");
456                 return ret;
457         }
458 
459         /* use the right regulators after identify the right device */
460         switch (pfuze_chip->chip_id) {
461         case PFUZE200:
462                 pfuze_regulators = pfuze200_regulators;
463                 regulator_num = ARRAY_SIZE(pfuze200_regulators);
464                 sw_check_start = PFUZE200_SW2;
465                 sw_check_end = PFUZE200_SW3B;
466                 break;
467 
468         case PFUZE100:
469         default:
470                 pfuze_regulators = pfuze100_regulators;
471                 regulator_num = ARRAY_SIZE(pfuze100_regulators);
472                 sw_check_start = PFUZE100_SW2;
473                 sw_check_end = PFUZE100_SW4;
474                 break;
475         }
476         dev_info(&client->dev, "pfuze%s found.\n",
477                 (pfuze_chip->chip_id == PFUZE100) ? "100" : "200");
478 
479         memcpy(pfuze_chip->regulator_descs, pfuze_regulators,
480                 sizeof(pfuze_chip->regulator_descs));
481 
482         ret = pfuze_parse_regulators_dt(pfuze_chip);
483         if (ret)
484                 return ret;
485 
486         for (i = 0; i < regulator_num; i++) {
487                 struct regulator_init_data *init_data;
488                 struct regulator_desc *desc;
489                 int val;
490 
491                 desc = &pfuze_chip->regulator_descs[i].desc;
492 
493                 if (pdata)
494                         init_data = pdata->init_data[i];
495                 else
496                         init_data = match_init_data(i);
497 
498                 /* SW2~SW4 high bit check and modify the voltage value table */
499                 if (i >= sw_check_start && i <= sw_check_end) {
500                         regmap_read(pfuze_chip->regmap, desc->vsel_reg, &val);
501                         if (val & 0x40) {
502                                 desc->min_uV = 800000;
503                                 desc->uV_step = 50000;
504                                 desc->n_voltages = 51;
505                         }
506                 }
507 
508                 config.dev = &client->dev;
509                 config.init_data = init_data;
510                 config.driver_data = pfuze_chip;
511                 config.of_node = match_of_node(i);
512                 config.ena_gpio = -EINVAL;
513 
514                 pfuze_chip->regulators[i] =
515                         devm_regulator_register(&client->dev, desc, &config);
516                 if (IS_ERR(pfuze_chip->regulators[i])) {
517                         dev_err(&client->dev, "register regulator%s failed\n",
518                                 pfuze_regulators[i].desc.name);
519                         return PTR_ERR(pfuze_chip->regulators[i]);
520                 }
521         }
522 
523         return 0;
524 }
525 
526 static struct i2c_driver pfuze_driver = {
527         .id_table = pfuze_device_id,
528         .driver = {
529                 .name = "pfuze100-regulator",
530                 .owner = THIS_MODULE,
531                 .of_match_table = pfuze_dt_ids,
532         },
533         .probe = pfuze100_regulator_probe,
534 };
535 module_i2c_driver(pfuze_driver);
536 
537 MODULE_AUTHOR("Robin Gong <b38343@freescale.com>");
538 MODULE_DESCRIPTION("Regulator Driver for Freescale PFUZE100/PFUZE200 PMIC");
539 MODULE_LICENSE("GPL v2");
540 MODULE_ALIAS("i2c:pfuze100-regulator");
541 

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