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Linux/drivers/regulator/anatop-regulator.c

  1 /*
  2  * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved.
  3  */
  4 
  5 /*
  6  * This program is free software; you can redistribute it and/or modify
  7  * it under the terms of the GNU General Public License as published by
  8  * the Free Software Foundation; either version 2 of the License, or
  9  * (at your option) any later version.
 10 
 11  * This program is distributed in the hope that it will be useful,
 12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 14  * GNU General Public License for more details.
 15 
 16  * You should have received a copy of the GNU General Public License along
 17  * with this program; if not, write to the Free Software Foundation, Inc.,
 18  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
 19  */
 20 
 21 #include <linux/slab.h>
 22 #include <linux/device.h>
 23 #include <linux/module.h>
 24 #include <linux/mfd/syscon.h>
 25 #include <linux/err.h>
 26 #include <linux/io.h>
 27 #include <linux/platform_device.h>
 28 #include <linux/of.h>
 29 #include <linux/of_address.h>
 30 #include <linux/regmap.h>
 31 #include <linux/regulator/driver.h>
 32 #include <linux/regulator/of_regulator.h>
 33 
 34 #define LDO_RAMP_UP_UNIT_IN_CYCLES      64 /* 64 cycles per step */
 35 #define LDO_RAMP_UP_FREQ_IN_MHZ         24 /* cycle based on 24M OSC */
 36 
 37 #define LDO_POWER_GATE                  0x00
 38 #define LDO_FET_FULL_ON                 0x1f
 39 
 40 struct anatop_regulator {
 41         const char *name;
 42         u32 control_reg;
 43         struct regmap *anatop;
 44         int vol_bit_shift;
 45         int vol_bit_width;
 46         u32 delay_reg;
 47         int delay_bit_shift;
 48         int delay_bit_width;
 49         int min_bit_val;
 50         int min_voltage;
 51         int max_voltage;
 52         struct regulator_desc rdesc;
 53         struct regulator_init_data *initdata;
 54         bool bypass;
 55         int sel;
 56 };
 57 
 58 static int anatop_regmap_set_voltage_time_sel(struct regulator_dev *reg,
 59         unsigned int old_sel,
 60         unsigned int new_sel)
 61 {
 62         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 63         u32 val;
 64         int ret = 0;
 65 
 66         /* check whether need to care about LDO ramp up speed */
 67         if (anatop_reg->delay_bit_width && new_sel > old_sel) {
 68                 /*
 69                  * the delay for LDO ramp up time is
 70                  * based on the register setting, we need
 71                  * to calculate how many steps LDO need to
 72                  * ramp up, and how much delay needed. (us)
 73                  */
 74                 regmap_read(anatop_reg->anatop, anatop_reg->delay_reg, &val);
 75                 val = (val >> anatop_reg->delay_bit_shift) &
 76                         ((1 << anatop_reg->delay_bit_width) - 1);
 77                 ret = (new_sel - old_sel) * (LDO_RAMP_UP_UNIT_IN_CYCLES <<
 78                         val) / LDO_RAMP_UP_FREQ_IN_MHZ + 1;
 79         }
 80 
 81         return ret;
 82 }
 83 
 84 static int anatop_regmap_enable(struct regulator_dev *reg)
 85 {
 86         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
 87         int sel;
 88 
 89         sel = anatop_reg->bypass ? LDO_FET_FULL_ON : anatop_reg->sel;
 90         return regulator_set_voltage_sel_regmap(reg, sel);
 91 }
 92 
 93 static int anatop_regmap_disable(struct regulator_dev *reg)
 94 {
 95         return regulator_set_voltage_sel_regmap(reg, LDO_POWER_GATE);
 96 }
 97 
 98 static int anatop_regmap_is_enabled(struct regulator_dev *reg)
 99 {
100         return regulator_get_voltage_sel_regmap(reg) != LDO_POWER_GATE;
101 }
102 
103 static int anatop_regmap_core_set_voltage_sel(struct regulator_dev *reg,
104                                               unsigned selector)
105 {
106         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
107         int ret;
108 
109         if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg)) {
110                 anatop_reg->sel = selector;
111                 return 0;
112         }
113 
114         ret = regulator_set_voltage_sel_regmap(reg, selector);
115         if (!ret)
116                 anatop_reg->sel = selector;
117         return ret;
118 }
119 
120 static int anatop_regmap_core_get_voltage_sel(struct regulator_dev *reg)
121 {
122         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
123 
124         if (anatop_reg->bypass || !anatop_regmap_is_enabled(reg))
125                 return anatop_reg->sel;
126 
127         return regulator_get_voltage_sel_regmap(reg);
128 }
129 
130 static int anatop_regmap_get_bypass(struct regulator_dev *reg, bool *enable)
131 {
132         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
133         int sel;
134 
135         sel = regulator_get_voltage_sel_regmap(reg);
136         if (sel == LDO_FET_FULL_ON)
137                 WARN_ON(!anatop_reg->bypass);
138         else if (sel != LDO_POWER_GATE)
139                 WARN_ON(anatop_reg->bypass);
140 
141         *enable = anatop_reg->bypass;
142         return 0;
143 }
144 
145 static int anatop_regmap_set_bypass(struct regulator_dev *reg, bool enable)
146 {
147         struct anatop_regulator *anatop_reg = rdev_get_drvdata(reg);
148         int sel;
149 
150         if (enable == anatop_reg->bypass)
151                 return 0;
152 
153         sel = enable ? LDO_FET_FULL_ON : anatop_reg->sel;
154         anatop_reg->bypass = enable;
155 
156         return regulator_set_voltage_sel_regmap(reg, sel);
157 }
158 
159 static struct regulator_ops anatop_rops = {
160         .set_voltage_sel = regulator_set_voltage_sel_regmap,
161         .get_voltage_sel = regulator_get_voltage_sel_regmap,
162         .list_voltage = regulator_list_voltage_linear,
163         .map_voltage = regulator_map_voltage_linear,
164 };
165 
166 static struct regulator_ops anatop_core_rops = {
167         .enable = anatop_regmap_enable,
168         .disable = anatop_regmap_disable,
169         .is_enabled = anatop_regmap_is_enabled,
170         .set_voltage_sel = anatop_regmap_core_set_voltage_sel,
171         .set_voltage_time_sel = anatop_regmap_set_voltage_time_sel,
172         .get_voltage_sel = anatop_regmap_core_get_voltage_sel,
173         .list_voltage = regulator_list_voltage_linear,
174         .map_voltage = regulator_map_voltage_linear,
175         .get_bypass = anatop_regmap_get_bypass,
176         .set_bypass = anatop_regmap_set_bypass,
177 };
178 
179 static int anatop_regulator_probe(struct platform_device *pdev)
180 {
181         struct device *dev = &pdev->dev;
182         struct device_node *np = dev->of_node;
183         struct device_node *anatop_np;
184         struct regulator_desc *rdesc;
185         struct regulator_dev *rdev;
186         struct anatop_regulator *sreg;
187         struct regulator_init_data *initdata;
188         struct regulator_config config = { };
189         int ret = 0;
190         u32 val;
191 
192         initdata = of_get_regulator_init_data(dev, np);
193         sreg = devm_kzalloc(dev, sizeof(*sreg), GFP_KERNEL);
194         if (!sreg)
195                 return -ENOMEM;
196         sreg->initdata = initdata;
197         sreg->name = of_get_property(np, "regulator-name", NULL);
198         rdesc = &sreg->rdesc;
199         rdesc->name = sreg->name;
200         rdesc->type = REGULATOR_VOLTAGE;
201         rdesc->owner = THIS_MODULE;
202 
203         anatop_np = of_get_parent(np);
204         if (!anatop_np)
205                 return -ENODEV;
206         sreg->anatop = syscon_node_to_regmap(anatop_np);
207         of_node_put(anatop_np);
208         if (IS_ERR(sreg->anatop))
209                 return PTR_ERR(sreg->anatop);
210 
211         ret = of_property_read_u32(np, "anatop-reg-offset",
212                                    &sreg->control_reg);
213         if (ret) {
214                 dev_err(dev, "no anatop-reg-offset property set\n");
215                 return ret;
216         }
217         ret = of_property_read_u32(np, "anatop-vol-bit-width",
218                                    &sreg->vol_bit_width);
219         if (ret) {
220                 dev_err(dev, "no anatop-vol-bit-width property set\n");
221                 return ret;
222         }
223         ret = of_property_read_u32(np, "anatop-vol-bit-shift",
224                                    &sreg->vol_bit_shift);
225         if (ret) {
226                 dev_err(dev, "no anatop-vol-bit-shift property set\n");
227                 return ret;
228         }
229         ret = of_property_read_u32(np, "anatop-min-bit-val",
230                                    &sreg->min_bit_val);
231         if (ret) {
232                 dev_err(dev, "no anatop-min-bit-val property set\n");
233                 return ret;
234         }
235         ret = of_property_read_u32(np, "anatop-min-voltage",
236                                    &sreg->min_voltage);
237         if (ret) {
238                 dev_err(dev, "no anatop-min-voltage property set\n");
239                 return ret;
240         }
241         ret = of_property_read_u32(np, "anatop-max-voltage",
242                                    &sreg->max_voltage);
243         if (ret) {
244                 dev_err(dev, "no anatop-max-voltage property set\n");
245                 return ret;
246         }
247 
248         /* read LDO ramp up setting, only for core reg */
249         of_property_read_u32(np, "anatop-delay-reg-offset",
250                              &sreg->delay_reg);
251         of_property_read_u32(np, "anatop-delay-bit-width",
252                              &sreg->delay_bit_width);
253         of_property_read_u32(np, "anatop-delay-bit-shift",
254                              &sreg->delay_bit_shift);
255 
256         rdesc->n_voltages = (sreg->max_voltage - sreg->min_voltage) / 25000 + 1
257                             + sreg->min_bit_val;
258         rdesc->min_uV = sreg->min_voltage;
259         rdesc->uV_step = 25000;
260         rdesc->linear_min_sel = sreg->min_bit_val;
261         rdesc->vsel_reg = sreg->control_reg;
262         rdesc->vsel_mask = ((1 << sreg->vol_bit_width) - 1) <<
263                            sreg->vol_bit_shift;
264 
265         config.dev = &pdev->dev;
266         config.init_data = initdata;
267         config.driver_data = sreg;
268         config.of_node = pdev->dev.of_node;
269         config.regmap = sreg->anatop;
270 
271         /* Only core regulators have the ramp up delay configuration. */
272         if (sreg->control_reg && sreg->delay_bit_width) {
273                 rdesc->ops = &anatop_core_rops;
274 
275                 ret = regmap_read(config.regmap, rdesc->vsel_reg, &val);
276                 if (ret) {
277                         dev_err(dev, "failed to read initial state\n");
278                         return ret;
279                 }
280 
281                 sreg->sel = (val & rdesc->vsel_mask) >> sreg->vol_bit_shift;
282                 if (sreg->sel == LDO_FET_FULL_ON) {
283                         sreg->sel = 0;
284                         sreg->bypass = true;
285                 }
286         } else {
287                 rdesc->ops = &anatop_rops;
288         }
289 
290         /* register regulator */
291         rdev = devm_regulator_register(dev, rdesc, &config);
292         if (IS_ERR(rdev)) {
293                 dev_err(dev, "failed to register %s\n",
294                         rdesc->name);
295                 return PTR_ERR(rdev);
296         }
297 
298         platform_set_drvdata(pdev, rdev);
299 
300         return 0;
301 }
302 
303 static const struct of_device_id of_anatop_regulator_match_tbl[] = {
304         { .compatible = "fsl,anatop-regulator", },
305         { /* end */ }
306 };
307 
308 static struct platform_driver anatop_regulator_driver = {
309         .driver = {
310                 .name   = "anatop_regulator",
311                 .owner  = THIS_MODULE,
312                 .of_match_table = of_anatop_regulator_match_tbl,
313         },
314         .probe  = anatop_regulator_probe,
315 };
316 
317 static int __init anatop_regulator_init(void)
318 {
319         return platform_driver_register(&anatop_regulator_driver);
320 }
321 postcore_initcall(anatop_regulator_init);
322 
323 static void __exit anatop_regulator_exit(void)
324 {
325         platform_driver_unregister(&anatop_regulator_driver);
326 }
327 module_exit(anatop_regulator_exit);
328 
329 MODULE_AUTHOR("Nancy Chen <Nancy.Chen@freescale.com>");
330 MODULE_AUTHOR("Ying-Chun Liu (PaulLiu) <paul.liu@linaro.org>");
331 MODULE_DESCRIPTION("ANATOP Regulator driver");
332 MODULE_LICENSE("GPL v2");
333 MODULE_ALIAS("platform:anatop_regulator");
334 

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