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Linux/drivers/pwm/pwm-lpc32xx.c

  1 /*
  2  * Copyright 2012 Alexandre Pereira da Silva <aletes.xgr@gmail.com>
  3  *
  4  * This program is free software; you can redistribute it and/or modify
  5  * it under the terms of the GNU General Public License as published by
  6  * the Free Software Foundation; version 2.
  7  *
  8  */
  9 
 10 #include <linux/clk.h>
 11 #include <linux/err.h>
 12 #include <linux/io.h>
 13 #include <linux/kernel.h>
 14 #include <linux/module.h>
 15 #include <linux/of.h>
 16 #include <linux/of_address.h>
 17 #include <linux/platform_device.h>
 18 #include <linux/pwm.h>
 19 #include <linux/slab.h>
 20 
 21 struct lpc32xx_pwm_chip {
 22         struct pwm_chip chip;
 23         struct clk *clk;
 24         void __iomem *base;
 25 };
 26 
 27 #define PWM_ENABLE      BIT(31)
 28 
 29 #define to_lpc32xx_pwm_chip(_chip) \
 30         container_of(_chip, struct lpc32xx_pwm_chip, chip)
 31 
 32 static int lpc32xx_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
 33                               int duty_ns, int period_ns)
 34 {
 35         struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
 36         unsigned long long c;
 37         int period_cycles, duty_cycles;
 38         u32 val;
 39         c = clk_get_rate(lpc32xx->clk);
 40 
 41         /* The highest acceptable divisor is 256, which is represented by 0 */
 42         period_cycles = div64_u64(c * period_ns,
 43                                (unsigned long long)NSEC_PER_SEC * 256);
 44         if (!period_cycles || period_cycles > 256)
 45                 return -ERANGE;
 46         if (period_cycles == 256)
 47                 period_cycles = 0;
 48 
 49         /* Compute 256 x #duty/period value and care for corner cases */
 50         duty_cycles = div64_u64((unsigned long long)(period_ns - duty_ns) * 256,
 51                                 period_ns);
 52         if (!duty_cycles)
 53                 duty_cycles = 1;
 54         if (duty_cycles > 255)
 55                 duty_cycles = 255;
 56 
 57         val = readl(lpc32xx->base + (pwm->hwpwm << 2));
 58         val &= ~0xFFFF;
 59         val |= (period_cycles << 8) | duty_cycles;
 60         writel(val, lpc32xx->base + (pwm->hwpwm << 2));
 61 
 62         return 0;
 63 }
 64 
 65 static int lpc32xx_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
 66 {
 67         struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
 68         u32 val;
 69         int ret;
 70 
 71         ret = clk_prepare_enable(lpc32xx->clk);
 72         if (ret)
 73                 return ret;
 74 
 75         val = readl(lpc32xx->base + (pwm->hwpwm << 2));
 76         val |= PWM_ENABLE;
 77         writel(val, lpc32xx->base + (pwm->hwpwm << 2));
 78 
 79         return 0;
 80 }
 81 
 82 static void lpc32xx_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
 83 {
 84         struct lpc32xx_pwm_chip *lpc32xx = to_lpc32xx_pwm_chip(chip);
 85         u32 val;
 86 
 87         val = readl(lpc32xx->base + (pwm->hwpwm << 2));
 88         val &= ~PWM_ENABLE;
 89         writel(val, lpc32xx->base + (pwm->hwpwm << 2));
 90 
 91         clk_disable_unprepare(lpc32xx->clk);
 92 }
 93 
 94 static const struct pwm_ops lpc32xx_pwm_ops = {
 95         .config = lpc32xx_pwm_config,
 96         .enable = lpc32xx_pwm_enable,
 97         .disable = lpc32xx_pwm_disable,
 98         .owner = THIS_MODULE,
 99 };
100 
101 static int lpc32xx_pwm_probe(struct platform_device *pdev)
102 {
103         struct lpc32xx_pwm_chip *lpc32xx;
104         struct resource *res;
105         int ret;
106 
107         lpc32xx = devm_kzalloc(&pdev->dev, sizeof(*lpc32xx), GFP_KERNEL);
108         if (!lpc32xx)
109                 return -ENOMEM;
110 
111         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
112         lpc32xx->base = devm_ioremap_resource(&pdev->dev, res);
113         if (IS_ERR(lpc32xx->base))
114                 return PTR_ERR(lpc32xx->base);
115 
116         lpc32xx->clk = devm_clk_get(&pdev->dev, NULL);
117         if (IS_ERR(lpc32xx->clk))
118                 return PTR_ERR(lpc32xx->clk);
119 
120         lpc32xx->chip.dev = &pdev->dev;
121         lpc32xx->chip.ops = &lpc32xx_pwm_ops;
122         lpc32xx->chip.npwm = 1;
123         lpc32xx->chip.base = -1;
124 
125         ret = pwmchip_add(&lpc32xx->chip);
126         if (ret < 0) {
127                 dev_err(&pdev->dev, "failed to add PWM chip, error %d\n", ret);
128                 return ret;
129         }
130 
131         platform_set_drvdata(pdev, lpc32xx);
132 
133         return 0;
134 }
135 
136 static int lpc32xx_pwm_remove(struct platform_device *pdev)
137 {
138         struct lpc32xx_pwm_chip *lpc32xx = platform_get_drvdata(pdev);
139         unsigned int i;
140 
141         for (i = 0; i < lpc32xx->chip.npwm; i++)
142                 pwm_disable(&lpc32xx->chip.pwms[i]);
143 
144         return pwmchip_remove(&lpc32xx->chip);
145 }
146 
147 static const struct of_device_id lpc32xx_pwm_dt_ids[] = {
148         { .compatible = "nxp,lpc3220-pwm", },
149         { /* sentinel */ }
150 };
151 MODULE_DEVICE_TABLE(of, lpc32xx_pwm_dt_ids);
152 
153 static struct platform_driver lpc32xx_pwm_driver = {
154         .driver = {
155                 .name = "lpc32xx-pwm",
156                 .of_match_table = lpc32xx_pwm_dt_ids,
157         },
158         .probe = lpc32xx_pwm_probe,
159         .remove = lpc32xx_pwm_remove,
160 };
161 module_platform_driver(lpc32xx_pwm_driver);
162 
163 MODULE_ALIAS("platform:lpc32xx-pwm");
164 MODULE_AUTHOR("Alexandre Pereira da Silva <aletes.xgr@gmail.com>");
165 MODULE_DESCRIPTION("LPC32XX PWM Driver");
166 MODULE_LICENSE("GPL v2");
167 

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