Version:  2.0.40 2.2.26 2.4.37 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 4.10

Linux/drivers/pcmcia/m32r_pcc.c

  1 /*
  2  *  drivers/pcmcia/m32r_pcc.c
  3  *
  4  *  Device driver for the PCMCIA functionality of M32R.
  5  *
  6  *  Copyright (c) 2001, 2002, 2003, 2004
  7  *    Hiroyuki Kondo, Naoto Sugai, Hayato Fujiwara
  8  */
  9 
 10 #include <linux/module.h>
 11 #include <linux/moduleparam.h>
 12 #include <linux/init.h>
 13 #include <linux/types.h>
 14 #include <linux/fcntl.h>
 15 #include <linux/string.h>
 16 #include <linux/kernel.h>
 17 #include <linux/errno.h>
 18 #include <linux/timer.h>
 19 #include <linux/ioport.h>
 20 #include <linux/delay.h>
 21 #include <linux/workqueue.h>
 22 #include <linux/interrupt.h>
 23 #include <linux/platform_device.h>
 24 #include <linux/bitops.h>
 25 #include <asm/irq.h>
 26 #include <asm/io.h>
 27 #include <asm/addrspace.h>
 28 
 29 #include <pcmcia/ss.h>
 30 
 31 /* XXX: should be moved into asm/irq.h */
 32 #define PCC0_IRQ 24
 33 #define PCC1_IRQ 25
 34 
 35 #include "m32r_pcc.h"
 36 
 37 #define CHAOS_PCC_DEBUG
 38 #ifdef CHAOS_PCC_DEBUG
 39         static volatile u_short dummy_readbuf;
 40 #endif
 41 
 42 #define PCC_DEBUG_DBEX
 43 
 44 
 45 /* Poll status interval -- 0 means default to interrupt */
 46 static int poll_interval = 0;
 47 
 48 typedef enum pcc_space { as_none = 0, as_comm, as_attr, as_io } pcc_as_t;
 49 
 50 typedef struct pcc_socket {
 51         u_short                 type, flags;
 52         struct pcmcia_socket    socket;
 53         unsigned int            number;
 54         unsigned int            ioaddr;
 55         u_long                  mapaddr;
 56         u_long                  base;   /* PCC register base */
 57         u_char                  cs_irq, intr;
 58         pccard_io_map           io_map[MAX_IO_WIN];
 59         pccard_mem_map          mem_map[MAX_WIN];
 60         u_char                  io_win;
 61         u_char                  mem_win;
 62         pcc_as_t                current_space;
 63         u_char                  last_iodbex;
 64 #ifdef CHAOS_PCC_DEBUG
 65         u_char                  last_iosize;
 66 #endif
 67 #ifdef CONFIG_PROC_FS
 68         struct proc_dir_entry *proc;
 69 #endif
 70 } pcc_socket_t;
 71 
 72 static int pcc_sockets = 0;
 73 static pcc_socket_t socket[M32R_MAX_PCC] = {
 74         { 0, }, /* ... */
 75 };
 76 
 77 /*====================================================================*/
 78 
 79 static unsigned int pcc_get(u_short, unsigned int);
 80 static void pcc_set(u_short, unsigned int , unsigned int );
 81 
 82 static DEFINE_SPINLOCK(pcc_lock);
 83 
 84 void pcc_iorw(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int wr, int flag)
 85 {
 86         u_long addr;
 87         u_long flags;
 88         int need_ex;
 89 #ifdef PCC_DEBUG_DBEX
 90         int _dbex;
 91 #endif
 92         pcc_socket_t *t = &socket[sock];
 93 #ifdef CHAOS_PCC_DEBUG
 94         int map_changed = 0;
 95 #endif
 96 
 97         /* Need lock ? */
 98         spin_lock_irqsave(&pcc_lock, flags);
 99 
100         /*
101          * Check if need dbex
102          */
103         need_ex = (size > 1 && flag == 0) ? PCMOD_DBEX : 0;
104 #ifdef PCC_DEBUG_DBEX
105         _dbex = need_ex;
106         need_ex = 0;
107 #endif
108 
109         /*
110          * calculate access address
111          */
112         addr = t->mapaddr + port - t->ioaddr + KSEG1; /* XXX */
113 
114         /*
115          * Check current mapping
116          */
117         if (t->current_space != as_io || t->last_iodbex != need_ex) {
118 
119                 u_long cbsz;
120 
121                 /*
122                  * Disable first
123                  */
124                 pcc_set(sock, PCCR, 0);
125 
126                 /*
127                  * Set mode and io address
128                  */
129                 cbsz = (t->flags & MAP_16BIT) ? 0 : PCMOD_CBSZ;
130                 pcc_set(sock, PCMOD, PCMOD_AS_IO | cbsz | need_ex);
131                 pcc_set(sock, PCADR, addr & 0x1ff00000);
132 
133                 /*
134                  * Enable and read it
135                  */
136                 pcc_set(sock, PCCR, 1);
137 
138 #ifdef CHAOS_PCC_DEBUG
139 #if 0
140                 map_changed = (t->current_space == as_attr && size == 2); /* XXX */
141 #else
142                 map_changed = 1;
143 #endif
144 #endif
145                 t->current_space = as_io;
146         }
147 
148         /*
149          * access to IO space
150          */
151         if (size == 1) {
152                 /* Byte */
153                 unsigned char *bp = (unsigned char *)buf;
154 
155 #ifdef CHAOS_DEBUG
156                 if (map_changed) {
157                         dummy_readbuf = readb(addr);
158                 }
159 #endif
160                 if (wr) {
161                         /* write Byte */
162                         while (nmemb--) {
163                                 writeb(*bp++, addr);
164                         }
165                 } else {
166                         /* read Byte */
167                         while (nmemb--) {
168                         *bp++ = readb(addr);
169                         }
170                 }
171         } else {
172                 /* Word */
173                 unsigned short *bp = (unsigned short *)buf;
174 
175 #ifdef CHAOS_PCC_DEBUG
176                 if (map_changed) {
177                         dummy_readbuf = readw(addr);
178                 }
179 #endif
180                 if (wr) {
181                         /* write Word */
182                         while (nmemb--) {
183 #ifdef PCC_DEBUG_DBEX
184                                 if (_dbex) {
185                                         unsigned char *cp = (unsigned char *)bp;
186                                         unsigned short tmp;
187                                         tmp = cp[1] << 8 | cp[0];
188                                         writew(tmp, addr);
189                                         bp++;
190                                 } else
191 #endif
192                                 writew(*bp++, addr);
193                 }
194             } else {
195                 /* read Word */
196                 while (nmemb--) {
197 #ifdef  PCC_DEBUG_DBEX
198                                 if (_dbex) {
199                                         unsigned char *cp = (unsigned char *)bp;
200                                         unsigned short tmp;
201                                         tmp = readw(addr);
202                                         cp[0] = tmp & 0xff;
203                                         cp[1] = (tmp >> 8) & 0xff;
204                                         bp++;
205                                 } else
206 #endif
207                                 *bp++ = readw(addr);
208                 }
209             }
210         }
211 
212 #if 1
213         /* addr is no longer used */
214         if ((addr = pcc_get(sock, PCIRC)) & PCIRC_BWERR) {
215           printk("m32r_pcc: BWERR detected : port 0x%04lx : iosize %dbit\n",
216                          port, size * 8);
217           pcc_set(sock, PCIRC, addr);
218         }
219 #endif
220         /*
221          * save state
222          */
223         t->last_iosize = size;
224         t->last_iodbex = need_ex;
225 
226         /* Need lock ? */
227 
228         spin_unlock_irqrestore(&pcc_lock,flags);
229 
230         return;
231 }
232 
233 void pcc_ioread(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
234         pcc_iorw(sock, port, buf, size, nmemb, 0, flag);
235 }
236 
237 void pcc_iowrite(int sock, unsigned long port, void *buf, size_t size, size_t nmemb, int flag) {
238     pcc_iorw(sock, port, buf, size, nmemb, 1, flag);
239 }
240 
241 /*====================================================================*/
242 
243 #define IS_REGISTERED           0x2000
244 #define IS_ALIVE                0x8000
245 
246 typedef struct pcc_t {
247         char                    *name;
248         u_short                 flags;
249 } pcc_t;
250 
251 static pcc_t pcc[] = {
252         { "xnux2", 0 }, { "xnux2", 0 },
253 };
254 
255 static irqreturn_t pcc_interrupt(int, void *);
256 
257 /*====================================================================*/
258 
259 static struct timer_list poll_timer;
260 
261 static unsigned int pcc_get(u_short sock, unsigned int reg)
262 {
263         return inl(socket[sock].base + reg);
264 }
265 
266 
267 static void pcc_set(u_short sock, unsigned int reg, unsigned int data)
268 {
269         outl(data, socket[sock].base + reg);
270 }
271 
272 /*======================================================================
273 
274         See if a card is present, powered up, in IO mode, and already
275         bound to a (non PC Card) Linux driver.  We leave these alone.
276 
277         We make an exception for cards that seem to be serial devices.
278 
279 ======================================================================*/
280 
281 static int __init is_alive(u_short sock)
282 {
283         unsigned int stat;
284         unsigned int f;
285 
286         stat = pcc_get(sock, PCIRC);
287         f = (stat & (PCIRC_CDIN1 | PCIRC_CDIN2)) >> 16;
288         if(!f){
289                 printk("m32r_pcc: No Card is detected at socket %d : stat = 0x%08x\n",stat,sock);
290                 return 0;
291         }
292         if(f!=3)
293                 printk("m32r_pcc: Insertion fail (%.8x) at socket %d\n",stat,sock);
294         else
295                 printk("m32r_pcc: Card is Inserted at socket %d(%.8x)\n",sock,stat);
296         return 0;
297 }
298 
299 static int add_pcc_socket(ulong base, int irq, ulong mapaddr,
300                           unsigned int ioaddr)
301 {
302         pcc_socket_t *t = &socket[pcc_sockets];
303         int err;
304 
305         /* add sockets */
306         t->ioaddr = ioaddr;
307         t->mapaddr = mapaddr;
308         t->base = base;
309 #ifdef CHAOS_PCC_DEBUG
310         t->flags = MAP_16BIT;
311 #else
312         t->flags = 0;
313 #endif
314         if (is_alive(pcc_sockets))
315                 t->flags |= IS_ALIVE;
316 
317         /* add pcc */
318         if (t->base > 0) {
319                 request_region(t->base, 0x20, "m32r-pcc");
320         }
321 
322         printk(KERN_INFO "  %s ", pcc[pcc_sockets].name);
323         printk("pcc at 0x%08lx\n", t->base);
324 
325         /* Update socket interrupt information, capabilities */
326         t->socket.features |= (SS_CAP_PCCARD | SS_CAP_STATIC_MAP);
327         t->socket.map_size = M32R_PCC_MAPSIZE;
328         t->socket.io_offset = ioaddr;   /* use for io access offset */
329         t->socket.irq_mask = 0;
330         t->socket.pci_irq = 2 + pcc_sockets; /* XXX */
331 
332         err = request_irq(irq, pcc_interrupt, 0, "m32r-pcc", pcc_interrupt);
333         if (err) {
334                 if (t->base > 0)
335                         release_region(t->base, 0x20);
336                 return err;
337         }
338 
339         pcc_sockets++;
340 
341         return 0;
342 }
343 
344 
345 /*====================================================================*/
346 
347 static irqreturn_t pcc_interrupt(int irq, void *dev)
348 {
349         int i, j, irc;
350         u_int events, active;
351         int handled = 0;
352 
353         pr_debug("m32r_pcc: pcc_interrupt(%d)\n", irq);
354 
355         for (j = 0; j < 20; j++) {
356                 active = 0;
357                 for (i = 0; i < pcc_sockets; i++) {
358                         if ((socket[i].cs_irq != irq) &&
359                                 (socket[i].socket.pci_irq != irq))
360                                 continue;
361                         handled = 1;
362                         irc = pcc_get(i, PCIRC);
363                         irc >>=16;
364                         pr_debug("m32r_pcc: interrupt: socket %d pcirc 0x%02x ",
365                                 i, irc);
366                         if (!irc)
367                                 continue;
368 
369                         events = (irc) ? SS_DETECT : 0;
370                         events |= (pcc_get(i,PCCR) & PCCR_PCEN) ? SS_READY : 0;
371                         pr_debug("m32r_pcc: event 0x%02x\n", events);
372 
373                         if (events)
374                                 pcmcia_parse_events(&socket[i].socket, events);
375 
376                         active |= events;
377                         active = 0;
378                 }
379                 if (!active) break;
380         }
381         if (j == 20)
382                 printk(KERN_NOTICE "m32r-pcc: infinite loop in interrupt handler\n");
383 
384         pr_debug("m32r_pcc: interrupt done\n");
385 
386         return IRQ_RETVAL(handled);
387 } /* pcc_interrupt */
388 
389 static void pcc_interrupt_wrapper(u_long data)
390 {
391         pcc_interrupt(0, NULL);
392         init_timer(&poll_timer);
393         poll_timer.expires = jiffies + poll_interval;
394         add_timer(&poll_timer);
395 }
396 
397 /*====================================================================*/
398 
399 static int _pcc_get_status(u_short sock, u_int *value)
400 {
401         u_int status;
402 
403         status = pcc_get(sock,PCIRC);
404         *value = ((status & PCIRC_CDIN1) && (status & PCIRC_CDIN2))
405                 ? SS_DETECT : 0;
406 
407         status = pcc_get(sock,PCCR);
408 
409 #if 0
410         *value |= (status & PCCR_PCEN) ? SS_READY : 0;
411 #else
412         *value |= SS_READY; /* XXX: always */
413 #endif
414 
415         status = pcc_get(sock,PCCSIGCR);
416         *value |= (status & PCCSIGCR_VEN) ? SS_POWERON : 0;
417 
418         pr_debug("m32r_pcc: GetStatus(%d) = %#4.4x\n", sock, *value);
419         return 0;
420 } /* _get_status */
421 
422 /*====================================================================*/
423 
424 static int _pcc_set_socket(u_short sock, socket_state_t *state)
425 {
426         u_long reg = 0;
427 
428         pr_debug("m32r_pcc: SetSocket(%d, flags %#3.3x, Vcc %d, Vpp %d, "
429                   "io_irq %d, csc_mask %#2.2x)", sock, state->flags,
430                   state->Vcc, state->Vpp, state->io_irq, state->csc_mask);
431 
432         if (state->Vcc) {
433                 /*
434                  * 5V only
435                  */
436                 if (state->Vcc == 50) {
437                         reg |= PCCSIGCR_VEN;
438                 } else {
439                         return -EINVAL;
440                 }
441         }
442 
443         if (state->flags & SS_RESET) {
444                 pr_debug("m32r_pcc: :RESET\n");
445                 reg |= PCCSIGCR_CRST;
446         }
447         if (state->flags & SS_OUTPUT_ENA){
448                 pr_debug("m32r_pcc: :OUTPUT_ENA\n");
449                 /* bit clear */
450         } else {
451                 reg |= PCCSIGCR_SEN;
452         }
453 
454         pcc_set(sock,PCCSIGCR,reg);
455 
456         if(state->flags & SS_IOCARD){
457                 pr_debug("m32r_pcc: :IOCARD");
458         }
459         if (state->flags & SS_PWR_AUTO) {
460                 pr_debug("m32r_pcc: :PWR_AUTO");
461         }
462         if (state->csc_mask & SS_DETECT)
463                 pr_debug("m32r_pcc: :csc-SS_DETECT");
464         if (state->flags & SS_IOCARD) {
465                 if (state->csc_mask & SS_STSCHG)
466                         pr_debug("m32r_pcc: :STSCHG");
467         } else {
468                 if (state->csc_mask & SS_BATDEAD)
469                         pr_debug("m32r_pcc: :BATDEAD");
470                 if (state->csc_mask & SS_BATWARN)
471                         pr_debug("m32r_pcc: :BATWARN");
472                 if (state->csc_mask & SS_READY)
473                         pr_debug("m32r_pcc: :READY");
474         }
475         pr_debug("m32r_pcc: \n");
476         return 0;
477 } /* _set_socket */
478 
479 /*====================================================================*/
480 
481 static int _pcc_set_io_map(u_short sock, struct pccard_io_map *io)
482 {
483         u_char map;
484 
485         pr_debug("m32r_pcc: SetIOMap(%d, %d, %#2.2x, %d ns, "
486                   "%#llx-%#llx)\n", sock, io->map, io->flags,
487                   io->speed, (unsigned long long)io->start,
488                   (unsigned long long)io->stop);
489         map = io->map;
490 
491         return 0;
492 } /* _set_io_map */
493 
494 /*====================================================================*/
495 
496 static int _pcc_set_mem_map(u_short sock, struct pccard_mem_map *mem)
497 {
498 
499         u_char map = mem->map;
500         u_long mode;
501         u_long addr;
502         pcc_socket_t *t = &socket[sock];
503 #ifdef CHAOS_PCC_DEBUG
504 #if 0
505         pcc_as_t last = t->current_space;
506 #endif
507 #endif
508 
509         pr_debug("m32r_pcc: SetMemMap(%d, %d, %#2.2x, %d ns, "
510                  "%#llx,  %#x)\n", sock, map, mem->flags,
511                  mem->speed, (unsigned long long)mem->static_start,
512                  mem->card_start);
513 
514         /*
515          * sanity check
516          */
517         if ((map > MAX_WIN) || (mem->card_start > 0x3ffffff)){
518                 return -EINVAL;
519         }
520 
521         /*
522          * de-activate
523          */
524         if ((mem->flags & MAP_ACTIVE) == 0) {
525                 t->current_space = as_none;
526                 return 0;
527         }
528 
529         /*
530          * Disable first
531          */
532         pcc_set(sock, PCCR, 0);
533 
534         /*
535          * Set mode
536          */
537         if (mem->flags & MAP_ATTRIB) {
538                 mode = PCMOD_AS_ATTRIB | PCMOD_CBSZ;
539                 t->current_space = as_attr;
540         } else {
541                 mode = 0; /* common memory */
542                 t->current_space = as_comm;
543         }
544         pcc_set(sock, PCMOD, mode);
545 
546         /*
547          * Set address
548          */
549         addr = t->mapaddr + (mem->card_start & M32R_PCC_MAPMASK);
550         pcc_set(sock, PCADR, addr);
551 
552         mem->static_start = addr + mem->card_start;
553 
554         /*
555          * Enable again
556          */
557         pcc_set(sock, PCCR, 1);
558 
559 #ifdef CHAOS_PCC_DEBUG
560 #if 0
561         if (last != as_attr) {
562 #else
563         if (1) {
564 #endif
565                 dummy_readbuf = *(u_char *)(addr + KSEG1);
566         }
567 #endif
568 
569         return 0;
570 
571 } /* _set_mem_map */
572 
573 #if 0 /* driver model ordering issue */
574 /*======================================================================
575 
576         Routines for accessing socket information and register dumps via
577         /proc/bus/pccard/...
578 
579 ======================================================================*/
580 
581 static ssize_t show_info(struct class_device *class_dev, char *buf)
582 {
583         pcc_socket_t *s = container_of(class_dev, struct pcc_socket,
584                 socket.dev);
585 
586         return sprintf(buf, "type:     %s\nbase addr:    0x%08lx\n",
587                 pcc[s->type].name, s->base);
588 }
589 
590 static ssize_t show_exca(struct class_device *class_dev, char *buf)
591 {
592         /* FIXME */
593 
594         return 0;
595 }
596 
597 static CLASS_DEVICE_ATTR(info, S_IRUGO, show_info, NULL);
598 static CLASS_DEVICE_ATTR(exca, S_IRUGO, show_exca, NULL);
599 #endif
600 
601 /*====================================================================*/
602 
603 /* this is horribly ugly... proper locking needs to be done here at
604  * some time... */
605 #define LOCKED(x) do {                                  \
606         int retval;                                     \
607         unsigned long flags;                            \
608         spin_lock_irqsave(&pcc_lock, flags);            \
609         retval = x;                                     \
610         spin_unlock_irqrestore(&pcc_lock, flags);       \
611         return retval;                                  \
612 } while (0)
613 
614 
615 static int pcc_get_status(struct pcmcia_socket *s, u_int *value)
616 {
617         unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
618 
619         if (socket[sock].flags & IS_ALIVE) {
620                 *value = 0;
621                 return -EINVAL;
622         }
623         LOCKED(_pcc_get_status(sock, value));
624 }
625 
626 static int pcc_set_socket(struct pcmcia_socket *s, socket_state_t *state)
627 {
628         unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
629 
630         if (socket[sock].flags & IS_ALIVE)
631                 return -EINVAL;
632 
633         LOCKED(_pcc_set_socket(sock, state));
634 }
635 
636 static int pcc_set_io_map(struct pcmcia_socket *s, struct pccard_io_map *io)
637 {
638         unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
639 
640         if (socket[sock].flags & IS_ALIVE)
641                 return -EINVAL;
642         LOCKED(_pcc_set_io_map(sock, io));
643 }
644 
645 static int pcc_set_mem_map(struct pcmcia_socket *s, struct pccard_mem_map *mem)
646 {
647         unsigned int sock = container_of(s, struct pcc_socket, socket)->number;
648 
649         if (socket[sock].flags & IS_ALIVE)
650                 return -EINVAL;
651         LOCKED(_pcc_set_mem_map(sock, mem));
652 }
653 
654 static int pcc_init(struct pcmcia_socket *s)
655 {
656         pr_debug("m32r_pcc: init call\n");
657         return 0;
658 }
659 
660 static struct pccard_operations pcc_operations = {
661         .init                   = pcc_init,
662         .get_status             = pcc_get_status,
663         .set_socket             = pcc_set_socket,
664         .set_io_map             = pcc_set_io_map,
665         .set_mem_map            = pcc_set_mem_map,
666 };
667 
668 /*====================================================================*/
669 
670 static struct platform_driver pcc_driver = {
671         .driver = {
672                 .name           = "pcc",
673         },
674 };
675 
676 static struct platform_device pcc_device = {
677         .name = "pcc",
678         .id = 0,
679 };
680 
681 /*====================================================================*/
682 
683 static int __init init_m32r_pcc(void)
684 {
685         int i, ret;
686 
687         ret = platform_driver_register(&pcc_driver);
688         if (ret)
689                 return ret;
690 
691         ret = platform_device_register(&pcc_device);
692         if (ret)
693                 goto unreg_driv;
694 
695         printk(KERN_INFO "m32r PCC probe:\n");
696 
697         pcc_sockets = 0;
698 
699         ret = add_pcc_socket(M32R_PCC0_BASE, PCC0_IRQ, M32R_PCC0_MAPBASE,
700                              0x1000);
701         if (ret)
702                 goto unreg_dev;
703 
704 #ifdef CONFIG_M32RPCC_SLOT2
705         ret = add_pcc_socket(M32R_PCC1_BASE, PCC1_IRQ, M32R_PCC1_MAPBASE,
706                              0x2000);
707         if (ret)
708                 goto unreg_dev;
709 #endif
710 
711         if (pcc_sockets == 0) {
712                 printk("socket is not found.\n");
713                 ret = -ENODEV;
714                 goto unreg_dev;
715         }
716 
717         /* Set up interrupt handler(s) */
718 
719         for (i = 0 ; i < pcc_sockets ; i++) {
720                 socket[i].socket.dev.parent = &pcc_device.dev;
721                 socket[i].socket.ops = &pcc_operations;
722                 socket[i].socket.resource_ops = &pccard_static_ops;
723                 socket[i].socket.owner = THIS_MODULE;
724                 socket[i].number = i;
725                 ret = pcmcia_register_socket(&socket[i].socket);
726                 if (!ret)
727                         socket[i].flags |= IS_REGISTERED;
728         }
729 
730         /* Finally, schedule a polling interrupt */
731         if (poll_interval != 0) {
732                 poll_timer.function = pcc_interrupt_wrapper;
733                 poll_timer.data = 0;
734                 init_timer(&poll_timer);
735                 poll_timer.expires = jiffies + poll_interval;
736                 add_timer(&poll_timer);
737         }
738 
739         return 0;
740 
741 unreg_dev:
742         platform_device_unregister(&pcc_device);
743 unreg_driv:
744         platform_driver_unregister(&pcc_driver);
745         return ret;
746 } /* init_m32r_pcc */
747 
748 static void __exit exit_m32r_pcc(void)
749 {
750         int i;
751 
752         for (i = 0; i < pcc_sockets; i++)
753                 if (socket[i].flags & IS_REGISTERED)
754                         pcmcia_unregister_socket(&socket[i].socket);
755 
756         platform_device_unregister(&pcc_device);
757         if (poll_interval != 0)
758                 del_timer_sync(&poll_timer);
759 
760         platform_driver_unregister(&pcc_driver);
761 } /* exit_m32r_pcc */
762 
763 module_init(init_m32r_pcc);
764 module_exit(exit_m32r_pcc);
765 MODULE_LICENSE("Dual MPL/GPL");
766 /*====================================================================*/
767 

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