Version:  2.6.34 2.6.35 2.6.36 2.6.37 2.6.38 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14

Linux/drivers/net/wireless/rtl818x/rtl8187/dev.c

  1 /*
  2  * Linux device driver for RTL8187
  3  *
  4  * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
  5  * Copyright 2007 Andrea Merello <andrea.merello@gmail.com>
  6  *
  7  * Based on the r8187 driver, which is:
  8  * Copyright 2005 Andrea Merello <andrea.merello@gmail.com>, et al.
  9  *
 10  * The driver was extended to the RTL8187B in 2008 by:
 11  *      Herton Ronaldo Krzesinski <herton@mandriva.com.br>
 12  *      Hin-Tak Leung <htl10@users.sourceforge.net>
 13  *      Larry Finger <Larry.Finger@lwfinger.net>
 14  *
 15  * Magic delays and register offsets below are taken from the original
 16  * r8187 driver sources.  Thanks to Realtek for their support!
 17  *
 18  * This program is free software; you can redistribute it and/or modify
 19  * it under the terms of the GNU General Public License version 2 as
 20  * published by the Free Software Foundation.
 21  */
 22 
 23 #include <linux/usb.h>
 24 #include <linux/slab.h>
 25 #include <linux/delay.h>
 26 #include <linux/etherdevice.h>
 27 #include <linux/eeprom_93cx6.h>
 28 #include <linux/module.h>
 29 #include <net/mac80211.h>
 30 
 31 #include "rtl8187.h"
 32 #include "rtl8225.h"
 33 #ifdef CONFIG_RTL8187_LEDS
 34 #include "leds.h"
 35 #endif
 36 #include "rfkill.h"
 37 
 38 MODULE_AUTHOR("Michael Wu <flamingice@sourmilk.net>");
 39 MODULE_AUTHOR("Andrea Merello <andrea.merello@gmail.com>");
 40 MODULE_AUTHOR("Herton Ronaldo Krzesinski <herton@mandriva.com.br>");
 41 MODULE_AUTHOR("Hin-Tak Leung <htl10@users.sourceforge.net>");
 42 MODULE_AUTHOR("Larry Finger <Larry.Finger@lwfinger.net>");
 43 MODULE_DESCRIPTION("RTL8187/RTL8187B USB wireless driver");
 44 MODULE_LICENSE("GPL");
 45 
 46 static struct usb_device_id rtl8187_table[] = {
 47         /* Asus */
 48         {USB_DEVICE(0x0b05, 0x171d), .driver_info = DEVICE_RTL8187},
 49         /* Belkin */
 50         {USB_DEVICE(0x050d, 0x705e), .driver_info = DEVICE_RTL8187B},
 51         /* Realtek */
 52         {USB_DEVICE(0x0bda, 0x8187), .driver_info = DEVICE_RTL8187},
 53         {USB_DEVICE(0x0bda, 0x8189), .driver_info = DEVICE_RTL8187B},
 54         {USB_DEVICE(0x0bda, 0x8197), .driver_info = DEVICE_RTL8187B},
 55         {USB_DEVICE(0x0bda, 0x8198), .driver_info = DEVICE_RTL8187B},
 56         /* Surecom */
 57         {USB_DEVICE(0x0769, 0x11F2), .driver_info = DEVICE_RTL8187},
 58         /* Logitech */
 59         {USB_DEVICE(0x0789, 0x010C), .driver_info = DEVICE_RTL8187},
 60         /* Netgear */
 61         {USB_DEVICE(0x0846, 0x6100), .driver_info = DEVICE_RTL8187},
 62         {USB_DEVICE(0x0846, 0x6a00), .driver_info = DEVICE_RTL8187},
 63         {USB_DEVICE(0x0846, 0x4260), .driver_info = DEVICE_RTL8187B},
 64         /* HP */
 65         {USB_DEVICE(0x03f0, 0xca02), .driver_info = DEVICE_RTL8187},
 66         /* Sitecom */
 67         {USB_DEVICE(0x0df6, 0x000d), .driver_info = DEVICE_RTL8187},
 68         {USB_DEVICE(0x0df6, 0x0028), .driver_info = DEVICE_RTL8187B},
 69         {USB_DEVICE(0x0df6, 0x0029), .driver_info = DEVICE_RTL8187B},
 70         /* Sphairon Access Systems GmbH */
 71         {USB_DEVICE(0x114B, 0x0150), .driver_info = DEVICE_RTL8187},
 72         /* Dick Smith Electronics */
 73         {USB_DEVICE(0x1371, 0x9401), .driver_info = DEVICE_RTL8187},
 74         /* Abocom */
 75         {USB_DEVICE(0x13d1, 0xabe6), .driver_info = DEVICE_RTL8187},
 76         /* Qcom */
 77         {USB_DEVICE(0x18E8, 0x6232), .driver_info = DEVICE_RTL8187},
 78         /* AirLive */
 79         {USB_DEVICE(0x1b75, 0x8187), .driver_info = DEVICE_RTL8187},
 80         /* Linksys */
 81         {USB_DEVICE(0x1737, 0x0073), .driver_info = DEVICE_RTL8187B},
 82         {}
 83 };
 84 
 85 MODULE_DEVICE_TABLE(usb, rtl8187_table);
 86 
 87 static const struct ieee80211_rate rtl818x_rates[] = {
 88         { .bitrate = 10, .hw_value = 0, },
 89         { .bitrate = 20, .hw_value = 1, },
 90         { .bitrate = 55, .hw_value = 2, },
 91         { .bitrate = 110, .hw_value = 3, },
 92         { .bitrate = 60, .hw_value = 4, },
 93         { .bitrate = 90, .hw_value = 5, },
 94         { .bitrate = 120, .hw_value = 6, },
 95         { .bitrate = 180, .hw_value = 7, },
 96         { .bitrate = 240, .hw_value = 8, },
 97         { .bitrate = 360, .hw_value = 9, },
 98         { .bitrate = 480, .hw_value = 10, },
 99         { .bitrate = 540, .hw_value = 11, },
100 };
101 
102 static const struct ieee80211_channel rtl818x_channels[] = {
103         { .center_freq = 2412 },
104         { .center_freq = 2417 },
105         { .center_freq = 2422 },
106         { .center_freq = 2427 },
107         { .center_freq = 2432 },
108         { .center_freq = 2437 },
109         { .center_freq = 2442 },
110         { .center_freq = 2447 },
111         { .center_freq = 2452 },
112         { .center_freq = 2457 },
113         { .center_freq = 2462 },
114         { .center_freq = 2467 },
115         { .center_freq = 2472 },
116         { .center_freq = 2484 },
117 };
118 
119 static void rtl8187_iowrite_async_cb(struct urb *urb)
120 {
121         kfree(urb->context);
122 }
123 
124 static void rtl8187_iowrite_async(struct rtl8187_priv *priv, __le16 addr,
125                                   void *data, u16 len)
126 {
127         struct usb_ctrlrequest *dr;
128         struct urb *urb;
129         struct rtl8187_async_write_data {
130                 u8 data[4];
131                 struct usb_ctrlrequest dr;
132         } *buf;
133         int rc;
134 
135         buf = kmalloc(sizeof(*buf), GFP_ATOMIC);
136         if (!buf)
137                 return;
138 
139         urb = usb_alloc_urb(0, GFP_ATOMIC);
140         if (!urb) {
141                 kfree(buf);
142                 return;
143         }
144 
145         dr = &buf->dr;
146 
147         dr->bRequestType = RTL8187_REQT_WRITE;
148         dr->bRequest = RTL8187_REQ_SET_REG;
149         dr->wValue = addr;
150         dr->wIndex = 0;
151         dr->wLength = cpu_to_le16(len);
152 
153         memcpy(buf, data, len);
154 
155         usb_fill_control_urb(urb, priv->udev, usb_sndctrlpipe(priv->udev, 0),
156                              (unsigned char *)dr, buf, len,
157                              rtl8187_iowrite_async_cb, buf);
158         usb_anchor_urb(urb, &priv->anchored);
159         rc = usb_submit_urb(urb, GFP_ATOMIC);
160         if (rc < 0) {
161                 kfree(buf);
162                 usb_unanchor_urb(urb);
163         }
164         usb_free_urb(urb);
165 }
166 
167 static inline void rtl818x_iowrite32_async(struct rtl8187_priv *priv,
168                                            __le32 *addr, u32 val)
169 {
170         __le32 buf = cpu_to_le32(val);
171 
172         rtl8187_iowrite_async(priv, cpu_to_le16((unsigned long)addr),
173                               &buf, sizeof(buf));
174 }
175 
176 void rtl8187_write_phy(struct ieee80211_hw *dev, u8 addr, u32 data)
177 {
178         struct rtl8187_priv *priv = dev->priv;
179 
180         data <<= 8;
181         data |= addr | 0x80;
182 
183         rtl818x_iowrite8(priv, &priv->map->PHY[3], (data >> 24) & 0xFF);
184         rtl818x_iowrite8(priv, &priv->map->PHY[2], (data >> 16) & 0xFF);
185         rtl818x_iowrite8(priv, &priv->map->PHY[1], (data >> 8) & 0xFF);
186         rtl818x_iowrite8(priv, &priv->map->PHY[0], data & 0xFF);
187 }
188 
189 static void rtl8187_tx_cb(struct urb *urb)
190 {
191         struct sk_buff *skb = (struct sk_buff *)urb->context;
192         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
193         struct ieee80211_hw *hw = info->rate_driver_data[0];
194         struct rtl8187_priv *priv = hw->priv;
195 
196         skb_pull(skb, priv->is_rtl8187b ? sizeof(struct rtl8187b_tx_hdr) :
197                                           sizeof(struct rtl8187_tx_hdr));
198         ieee80211_tx_info_clear_status(info);
199 
200         if (!(urb->status) && !(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
201                 if (priv->is_rtl8187b) {
202                         skb_queue_tail(&priv->b_tx_status.queue, skb);
203 
204                         /* queue is "full", discard last items */
205                         while (skb_queue_len(&priv->b_tx_status.queue) > 5) {
206                                 struct sk_buff *old_skb;
207 
208                                 dev_dbg(&priv->udev->dev,
209                                         "transmit status queue full\n");
210 
211                                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
212                                 ieee80211_tx_status_irqsafe(hw, old_skb);
213                         }
214                         return;
215                 } else {
216                         info->flags |= IEEE80211_TX_STAT_ACK;
217                 }
218         }
219         if (priv->is_rtl8187b)
220                 ieee80211_tx_status_irqsafe(hw, skb);
221         else {
222                 /* Retry information for the RTI8187 is only available by
223                  * reading a register in the device. We are in interrupt mode
224                  * here, thus queue the skb and finish on a work queue. */
225                 skb_queue_tail(&priv->b_tx_status.queue, skb);
226                 ieee80211_queue_delayed_work(hw, &priv->work, 0);
227         }
228 }
229 
230 static void rtl8187_tx(struct ieee80211_hw *dev,
231                        struct ieee80211_tx_control *control,
232                        struct sk_buff *skb)
233 {
234         struct rtl8187_priv *priv = dev->priv;
235         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
236         struct ieee80211_hdr *tx_hdr =  (struct ieee80211_hdr *)(skb->data);
237         unsigned int ep;
238         void *buf;
239         struct urb *urb;
240         __le16 rts_dur = 0;
241         u32 flags;
242         int rc;
243 
244         urb = usb_alloc_urb(0, GFP_ATOMIC);
245         if (!urb) {
246                 kfree_skb(skb);
247                 return;
248         }
249 
250         flags = skb->len;
251         flags |= RTL818X_TX_DESC_FLAG_NO_ENC;
252 
253         flags |= ieee80211_get_tx_rate(dev, info)->hw_value << 24;
254         if (ieee80211_has_morefrags(tx_hdr->frame_control))
255                 flags |= RTL818X_TX_DESC_FLAG_MOREFRAG;
256         if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
257                 flags |= RTL818X_TX_DESC_FLAG_RTS;
258                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
259                 rts_dur = ieee80211_rts_duration(dev, priv->vif,
260                                                  skb->len, info);
261         } else if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
262                 flags |= RTL818X_TX_DESC_FLAG_CTS;
263                 flags |= ieee80211_get_rts_cts_rate(dev, info)->hw_value << 19;
264         }
265 
266         if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
267                 if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
268                         priv->seqno += 0x10;
269                 tx_hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
270                 tx_hdr->seq_ctrl |= cpu_to_le16(priv->seqno);
271         }
272 
273         if (!priv->is_rtl8187b) {
274                 struct rtl8187_tx_hdr *hdr =
275                         (struct rtl8187_tx_hdr *)skb_push(skb, sizeof(*hdr));
276                 hdr->flags = cpu_to_le32(flags);
277                 hdr->len = 0;
278                 hdr->rts_duration = rts_dur;
279                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
280                 buf = hdr;
281 
282                 ep = 2;
283         } else {
284                 /* fc needs to be calculated before skb_push() */
285                 unsigned int epmap[4] = { 6, 7, 5, 4 };
286                 u16 fc = le16_to_cpu(tx_hdr->frame_control);
287 
288                 struct rtl8187b_tx_hdr *hdr =
289                         (struct rtl8187b_tx_hdr *)skb_push(skb, sizeof(*hdr));
290                 struct ieee80211_rate *txrate =
291                         ieee80211_get_tx_rate(dev, info);
292                 memset(hdr, 0, sizeof(*hdr));
293                 hdr->flags = cpu_to_le32(flags);
294                 hdr->rts_duration = rts_dur;
295                 hdr->retry = cpu_to_le32((info->control.rates[0].count - 1) << 8);
296                 hdr->tx_duration =
297                         ieee80211_generic_frame_duration(dev, priv->vif,
298                                                          info->band,
299                                                          skb->len, txrate);
300                 buf = hdr;
301 
302                 if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
303                         ep = 12;
304                 else
305                         ep = epmap[skb_get_queue_mapping(skb)];
306         }
307 
308         info->rate_driver_data[0] = dev;
309         info->rate_driver_data[1] = urb;
310 
311         usb_fill_bulk_urb(urb, priv->udev, usb_sndbulkpipe(priv->udev, ep),
312                           buf, skb->len, rtl8187_tx_cb, skb);
313         urb->transfer_flags |= URB_ZERO_PACKET;
314         usb_anchor_urb(urb, &priv->anchored);
315         rc = usb_submit_urb(urb, GFP_ATOMIC);
316         if (rc < 0) {
317                 usb_unanchor_urb(urb);
318                 kfree_skb(skb);
319         }
320         usb_free_urb(urb);
321 }
322 
323 static void rtl8187_rx_cb(struct urb *urb)
324 {
325         struct sk_buff *skb = (struct sk_buff *)urb->context;
326         struct rtl8187_rx_info *info = (struct rtl8187_rx_info *)skb->cb;
327         struct ieee80211_hw *dev = info->dev;
328         struct rtl8187_priv *priv = dev->priv;
329         struct ieee80211_rx_status rx_status = { 0 };
330         int rate, signal;
331         u32 flags;
332         unsigned long f;
333 
334         spin_lock_irqsave(&priv->rx_queue.lock, f);
335         __skb_unlink(skb, &priv->rx_queue);
336         spin_unlock_irqrestore(&priv->rx_queue.lock, f);
337         skb_put(skb, urb->actual_length);
338 
339         if (unlikely(urb->status)) {
340                 dev_kfree_skb_irq(skb);
341                 return;
342         }
343 
344         if (!priv->is_rtl8187b) {
345                 struct rtl8187_rx_hdr *hdr =
346                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
347                 flags = le32_to_cpu(hdr->flags);
348                 /* As with the RTL8187B below, the AGC is used to calculate
349                  * signal strength. In this case, the scaling
350                  * constants are derived from the output of p54usb.
351                  */
352                 signal = -4 - ((27 * hdr->agc) >> 6);
353                 rx_status.antenna = (hdr->signal >> 7) & 1;
354                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
355         } else {
356                 struct rtl8187b_rx_hdr *hdr =
357                         (typeof(hdr))(skb_tail_pointer(skb) - sizeof(*hdr));
358                 /* The Realtek datasheet for the RTL8187B shows that the RX
359                  * header contains the following quantities: signal quality,
360                  * RSSI, AGC, the received power in dB, and the measured SNR.
361                  * In testing, none of these quantities show qualitative
362                  * agreement with AP signal strength, except for the AGC,
363                  * which is inversely proportional to the strength of the
364                  * signal. In the following, the signal strength
365                  * is derived from the AGC. The arbitrary scaling constants
366                  * are chosen to make the results close to the values obtained
367                  * for a BCM4312 using b43 as the driver. The noise is ignored
368                  * for now.
369                  */
370                 flags = le32_to_cpu(hdr->flags);
371                 signal = 14 - hdr->agc / 2;
372                 rx_status.antenna = (hdr->rssi >> 7) & 1;
373                 rx_status.mactime = le64_to_cpu(hdr->mac_time);
374         }
375 
376         rx_status.signal = signal;
377         priv->signal = signal;
378         rate = (flags >> 20) & 0xF;
379         skb_trim(skb, flags & 0x0FFF);
380         rx_status.rate_idx = rate;
381         rx_status.freq = dev->conf.chandef.chan->center_freq;
382         rx_status.band = dev->conf.chandef.chan->band;
383         rx_status.flag |= RX_FLAG_MACTIME_START;
384         if (flags & RTL818X_RX_DESC_FLAG_CRC32_ERR)
385                 rx_status.flag |= RX_FLAG_FAILED_FCS_CRC;
386         memcpy(IEEE80211_SKB_RXCB(skb), &rx_status, sizeof(rx_status));
387         ieee80211_rx_irqsafe(dev, skb);
388 
389         skb = dev_alloc_skb(RTL8187_MAX_RX);
390         if (unlikely(!skb)) {
391                 /* TODO check rx queue length and refill *somewhere* */
392                 return;
393         }
394 
395         info = (struct rtl8187_rx_info *)skb->cb;
396         info->urb = urb;
397         info->dev = dev;
398         urb->transfer_buffer = skb_tail_pointer(skb);
399         urb->context = skb;
400         skb_queue_tail(&priv->rx_queue, skb);
401 
402         usb_anchor_urb(urb, &priv->anchored);
403         if (usb_submit_urb(urb, GFP_ATOMIC)) {
404                 usb_unanchor_urb(urb);
405                 skb_unlink(skb, &priv->rx_queue);
406                 dev_kfree_skb_irq(skb);
407         }
408 }
409 
410 static int rtl8187_init_urbs(struct ieee80211_hw *dev)
411 {
412         struct rtl8187_priv *priv = dev->priv;
413         struct urb *entry = NULL;
414         struct sk_buff *skb;
415         struct rtl8187_rx_info *info;
416         int ret = 0;
417 
418         while (skb_queue_len(&priv->rx_queue) < 32) {
419                 skb = __dev_alloc_skb(RTL8187_MAX_RX, GFP_KERNEL);
420                 if (!skb) {
421                         ret = -ENOMEM;
422                         goto err;
423                 }
424                 entry = usb_alloc_urb(0, GFP_KERNEL);
425                 if (!entry) {
426                         ret = -ENOMEM;
427                         goto err;
428                 }
429                 usb_fill_bulk_urb(entry, priv->udev,
430                                   usb_rcvbulkpipe(priv->udev,
431                                   priv->is_rtl8187b ? 3 : 1),
432                                   skb_tail_pointer(skb),
433                                   RTL8187_MAX_RX, rtl8187_rx_cb, skb);
434                 info = (struct rtl8187_rx_info *)skb->cb;
435                 info->urb = entry;
436                 info->dev = dev;
437                 skb_queue_tail(&priv->rx_queue, skb);
438                 usb_anchor_urb(entry, &priv->anchored);
439                 ret = usb_submit_urb(entry, GFP_KERNEL);
440                 usb_put_urb(entry);
441                 if (ret) {
442                         skb_unlink(skb, &priv->rx_queue);
443                         usb_unanchor_urb(entry);
444                         goto err;
445                 }
446         }
447         return ret;
448 
449 err:
450         kfree_skb(skb);
451         usb_kill_anchored_urbs(&priv->anchored);
452         return ret;
453 }
454 
455 static void rtl8187b_status_cb(struct urb *urb)
456 {
457         struct ieee80211_hw *hw = (struct ieee80211_hw *)urb->context;
458         struct rtl8187_priv *priv = hw->priv;
459         u64 val;
460         unsigned int cmd_type;
461 
462         if (unlikely(urb->status))
463                 return;
464 
465         /*
466          * Read from status buffer:
467          *
468          * bits [30:31] = cmd type:
469          * - 0 indicates tx beacon interrupt
470          * - 1 indicates tx close descriptor
471          *
472          * In the case of tx beacon interrupt:
473          * [0:9] = Last Beacon CW
474          * [10:29] = reserved
475          * [30:31] = 00b
476          * [32:63] = Last Beacon TSF
477          *
478          * If it's tx close descriptor:
479          * [0:7] = Packet Retry Count
480          * [8:14] = RTS Retry Count
481          * [15] = TOK
482          * [16:27] = Sequence No
483          * [28] = LS
484          * [29] = FS
485          * [30:31] = 01b
486          * [32:47] = unused (reserved?)
487          * [48:63] = MAC Used Time
488          */
489         val = le64_to_cpu(priv->b_tx_status.buf);
490 
491         cmd_type = (val >> 30) & 0x3;
492         if (cmd_type == 1) {
493                 unsigned int pkt_rc, seq_no;
494                 bool tok;
495                 struct sk_buff *skb;
496                 struct ieee80211_hdr *ieee80211hdr;
497                 unsigned long flags;
498 
499                 pkt_rc = val & 0xFF;
500                 tok = val & (1 << 15);
501                 seq_no = (val >> 16) & 0xFFF;
502 
503                 spin_lock_irqsave(&priv->b_tx_status.queue.lock, flags);
504                 skb_queue_reverse_walk(&priv->b_tx_status.queue, skb) {
505                         ieee80211hdr = (struct ieee80211_hdr *)skb->data;
506 
507                         /*
508                          * While testing, it was discovered that the seq_no
509                          * doesn't actually contains the sequence number.
510                          * Instead of returning just the 12 bits of sequence
511                          * number, hardware is returning entire sequence control
512                          * (fragment number plus sequence number) in a 12 bit
513                          * only field overflowing after some time. As a
514                          * workaround, just consider the lower bits, and expect
515                          * it's unlikely we wrongly ack some sent data
516                          */
517                         if ((le16_to_cpu(ieee80211hdr->seq_ctrl)
518                             & 0xFFF) == seq_no)
519                                 break;
520                 }
521                 if (skb != (struct sk_buff *) &priv->b_tx_status.queue) {
522                         struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
523 
524                         __skb_unlink(skb, &priv->b_tx_status.queue);
525                         if (tok)
526                                 info->flags |= IEEE80211_TX_STAT_ACK;
527                         info->status.rates[0].count = pkt_rc + 1;
528 
529                         ieee80211_tx_status_irqsafe(hw, skb);
530                 }
531                 spin_unlock_irqrestore(&priv->b_tx_status.queue.lock, flags);
532         }
533 
534         usb_anchor_urb(urb, &priv->anchored);
535         if (usb_submit_urb(urb, GFP_ATOMIC))
536                 usb_unanchor_urb(urb);
537 }
538 
539 static int rtl8187b_init_status_urb(struct ieee80211_hw *dev)
540 {
541         struct rtl8187_priv *priv = dev->priv;
542         struct urb *entry;
543         int ret = 0;
544 
545         entry = usb_alloc_urb(0, GFP_KERNEL);
546         if (!entry)
547                 return -ENOMEM;
548 
549         usb_fill_bulk_urb(entry, priv->udev, usb_rcvbulkpipe(priv->udev, 9),
550                           &priv->b_tx_status.buf, sizeof(priv->b_tx_status.buf),
551                           rtl8187b_status_cb, dev);
552 
553         usb_anchor_urb(entry, &priv->anchored);
554         ret = usb_submit_urb(entry, GFP_KERNEL);
555         if (ret)
556                 usb_unanchor_urb(entry);
557         usb_free_urb(entry);
558 
559         return ret;
560 }
561 
562 static void rtl8187_set_anaparam(struct rtl8187_priv *priv, bool rfon)
563 {
564         u32 anaparam, anaparam2;
565         u8 anaparam3, reg;
566 
567         if (!priv->is_rtl8187b) {
568                 if (rfon) {
569                         anaparam = RTL8187_RTL8225_ANAPARAM_ON;
570                         anaparam2 = RTL8187_RTL8225_ANAPARAM2_ON;
571                 } else {
572                         anaparam = RTL8187_RTL8225_ANAPARAM_OFF;
573                         anaparam2 = RTL8187_RTL8225_ANAPARAM2_OFF;
574                 }
575         } else {
576                 if (rfon) {
577                         anaparam = RTL8187B_RTL8225_ANAPARAM_ON;
578                         anaparam2 = RTL8187B_RTL8225_ANAPARAM2_ON;
579                         anaparam3 = RTL8187B_RTL8225_ANAPARAM3_ON;
580                 } else {
581                         anaparam = RTL8187B_RTL8225_ANAPARAM_OFF;
582                         anaparam2 = RTL8187B_RTL8225_ANAPARAM2_OFF;
583                         anaparam3 = RTL8187B_RTL8225_ANAPARAM3_OFF;
584                 }
585         }
586 
587         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
588                          RTL818X_EEPROM_CMD_CONFIG);
589         reg = rtl818x_ioread8(priv, &priv->map->CONFIG3);
590         reg |= RTL818X_CONFIG3_ANAPARAM_WRITE;
591         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
592         rtl818x_iowrite32(priv, &priv->map->ANAPARAM, anaparam);
593         rtl818x_iowrite32(priv, &priv->map->ANAPARAM2, anaparam2);
594         if (priv->is_rtl8187b)
595                 rtl818x_iowrite8(priv, &priv->map->ANAPARAM3, anaparam3);
596         reg &= ~RTL818X_CONFIG3_ANAPARAM_WRITE;
597         rtl818x_iowrite8(priv, &priv->map->CONFIG3, reg);
598         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
599                          RTL818X_EEPROM_CMD_NORMAL);
600 }
601 
602 static int rtl8187_cmd_reset(struct ieee80211_hw *dev)
603 {
604         struct rtl8187_priv *priv = dev->priv;
605         u8 reg;
606         int i;
607 
608         reg = rtl818x_ioread8(priv, &priv->map->CMD);
609         reg &= (1 << 1);
610         reg |= RTL818X_CMD_RESET;
611         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
612 
613         i = 10;
614         do {
615                 msleep(2);
616                 if (!(rtl818x_ioread8(priv, &priv->map->CMD) &
617                       RTL818X_CMD_RESET))
618                         break;
619         } while (--i);
620 
621         if (!i) {
622                 wiphy_err(dev->wiphy, "Reset timeout!\n");
623                 return -ETIMEDOUT;
624         }
625 
626         /* reload registers from eeprom */
627         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_LOAD);
628 
629         i = 10;
630         do {
631                 msleep(4);
632                 if (!(rtl818x_ioread8(priv, &priv->map->EEPROM_CMD) &
633                       RTL818X_EEPROM_CMD_CONFIG))
634                         break;
635         } while (--i);
636 
637         if (!i) {
638                 wiphy_err(dev->wiphy, "eeprom reset timeout!\n");
639                 return -ETIMEDOUT;
640         }
641 
642         return 0;
643 }
644 
645 static int rtl8187_init_hw(struct ieee80211_hw *dev)
646 {
647         struct rtl8187_priv *priv = dev->priv;
648         u8 reg;
649         int res;
650 
651         /* reset */
652         rtl8187_set_anaparam(priv, true);
653 
654         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
655 
656         msleep(200);
657         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x10);
658         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x11);
659         rtl818x_iowrite8(priv, (u8 *)0xFE18, 0x00);
660         msleep(200);
661 
662         res = rtl8187_cmd_reset(dev);
663         if (res)
664                 return res;
665 
666         rtl8187_set_anaparam(priv, true);
667 
668         /* setup card */
669         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
670         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
671 
672         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
673         rtl818x_iowrite8(priv, &priv->map->GPIO0, 1);
674         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
675 
676         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
677 
678         rtl818x_iowrite16(priv, (__le16 *)0xFFF4, 0xFFFF);
679         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
680         reg &= 0x3F;
681         reg |= 0x80;
682         rtl818x_iowrite8(priv, &priv->map->CONFIG1, reg);
683 
684         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
685 
686         rtl818x_iowrite32(priv, &priv->map->INT_TIMEOUT, 0);
687         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
688         rtl818x_iowrite8(priv, &priv->map->RATE_FALLBACK, 0);
689 
690         // TODO: set RESP_RATE and BRSR properly
691         rtl818x_iowrite8(priv, &priv->map->RESP_RATE, (8 << 4) | 0);
692         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
693 
694         /* host_usb_init */
695         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0);
696         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0);
697         reg = rtl818x_ioread8(priv, (u8 *)0xFE53);
698         rtl818x_iowrite8(priv, (u8 *)0xFE53, reg | (1 << 7));
699         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, (4 << 8));
700         rtl818x_iowrite8(priv, &priv->map->GPIO0, 0x20);
701         rtl818x_iowrite8(priv, &priv->map->GP_ENABLE, 0);
702         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x80);
703         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x80);
704         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x80);
705         msleep(100);
706 
707         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x000a8008);
708         rtl818x_iowrite16(priv, &priv->map->BRSR, 0xFFFF);
709         rtl818x_iowrite32(priv, &priv->map->RF_PARA, 0x00100044);
710         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
711                          RTL818X_EEPROM_CMD_CONFIG);
712         rtl818x_iowrite8(priv, &priv->map->CONFIG3, 0x44);
713         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
714                          RTL818X_EEPROM_CMD_NORMAL);
715         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FF7);
716         msleep(100);
717 
718         priv->rf->init(dev);
719 
720         rtl818x_iowrite16(priv, &priv->map->BRSR, 0x01F3);
721         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
722         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
723         rtl818x_iowrite16(priv, (__le16 *)0xFFFE, 0x10);
724         rtl818x_iowrite8(priv, &priv->map->TALLY_SEL, 0x80);
725         rtl818x_iowrite8(priv, (u8 *)0xFFFF, 0x60);
726         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
727 
728         return 0;
729 }
730 
731 static const u8 rtl8187b_reg_table[][3] = {
732         {0xF0, 0x32, 0}, {0xF1, 0x32, 0}, {0xF2, 0x00, 0}, {0xF3, 0x00, 0},
733         {0xF4, 0x32, 0}, {0xF5, 0x43, 0}, {0xF6, 0x00, 0}, {0xF7, 0x00, 0},
734         {0xF8, 0x46, 0}, {0xF9, 0xA4, 0}, {0xFA, 0x00, 0}, {0xFB, 0x00, 0},
735         {0xFC, 0x96, 0}, {0xFD, 0xA4, 0}, {0xFE, 0x00, 0}, {0xFF, 0x00, 0},
736 
737         {0x58, 0x4B, 1}, {0x59, 0x00, 1}, {0x5A, 0x4B, 1}, {0x5B, 0x00, 1},
738         {0x60, 0x4B, 1}, {0x61, 0x09, 1}, {0x62, 0x4B, 1}, {0x63, 0x09, 1},
739         {0xCE, 0x0F, 1}, {0xCF, 0x00, 1}, {0xF0, 0x4E, 1}, {0xF1, 0x01, 1},
740         {0xF2, 0x02, 1}, {0xF3, 0x03, 1}, {0xF4, 0x04, 1}, {0xF5, 0x05, 1},
741         {0xF6, 0x06, 1}, {0xF7, 0x07, 1}, {0xF8, 0x08, 1},
742 
743         {0x4E, 0x00, 2}, {0x0C, 0x04, 2}, {0x21, 0x61, 2}, {0x22, 0x68, 2},
744         {0x23, 0x6F, 2}, {0x24, 0x76, 2}, {0x25, 0x7D, 2}, {0x26, 0x84, 2},
745         {0x27, 0x8D, 2}, {0x4D, 0x08, 2}, {0x50, 0x05, 2}, {0x51, 0xF5, 2},
746         {0x52, 0x04, 2}, {0x53, 0xA0, 2}, {0x54, 0x1F, 2}, {0x55, 0x23, 2},
747         {0x56, 0x45, 2}, {0x57, 0x67, 2}, {0x58, 0x08, 2}, {0x59, 0x08, 2},
748         {0x5A, 0x08, 2}, {0x5B, 0x08, 2}, {0x60, 0x08, 2}, {0x61, 0x08, 2},
749         {0x62, 0x08, 2}, {0x63, 0x08, 2}, {0x64, 0xCF, 2},
750 
751         {0x5B, 0x40, 0}, {0x84, 0x88, 0}, {0x85, 0x24, 0}, {0x88, 0x54, 0},
752         {0x8B, 0xB8, 0}, {0x8C, 0x07, 0}, {0x8D, 0x00, 0}, {0x94, 0x1B, 0},
753         {0x95, 0x12, 0}, {0x96, 0x00, 0}, {0x97, 0x06, 0}, {0x9D, 0x1A, 0},
754         {0x9F, 0x10, 0}, {0xB4, 0x22, 0}, {0xBE, 0x80, 0}, {0xDB, 0x00, 0},
755         {0xEE, 0x00, 0}, {0x4C, 0x00, 2},
756 
757         {0x9F, 0x00, 3}, {0x8C, 0x01, 0}, {0x8D, 0x10, 0}, {0x8E, 0x08, 0},
758         {0x8F, 0x00, 0}
759 };
760 
761 static int rtl8187b_init_hw(struct ieee80211_hw *dev)
762 {
763         struct rtl8187_priv *priv = dev->priv;
764         int res, i;
765         u8 reg;
766 
767         rtl8187_set_anaparam(priv, true);
768 
769         /* Reset PLL sequence on 8187B. Realtek note: reduces power
770          * consumption about 30 mA */
771         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0x10);
772         reg = rtl818x_ioread8(priv, (u8 *)0xFF62);
773         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg & ~(1 << 5));
774         rtl818x_iowrite8(priv, (u8 *)0xFF62, reg | (1 << 5));
775 
776         res = rtl8187_cmd_reset(dev);
777         if (res)
778                 return res;
779 
780         rtl8187_set_anaparam(priv, true);
781 
782         /* BRSR (Basic Rate Set Register) on 8187B looks to be the same as
783          * RESP_RATE on 8187L in Realtek sources: each bit should be each
784          * one of the 12 rates, all are enabled */
785         rtl818x_iowrite16(priv, (__le16 *)0xFF34, 0x0FFF);
786 
787         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
788         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
789         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
790 
791         /* Auto Rate Fallback Register (ARFR): 1M-54M setting */
792         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFE0, 0x0FFF, 1);
793         rtl818x_iowrite8_idx(priv, (u8 *)0xFFE2, 0x00, 1);
794 
795         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFD4, 0xFFFF, 1);
796 
797         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
798                          RTL818X_EEPROM_CMD_CONFIG);
799         reg = rtl818x_ioread8(priv, &priv->map->CONFIG1);
800         rtl818x_iowrite8(priv, &priv->map->CONFIG1, (reg & 0x3F) | 0x80);
801         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD,
802                          RTL818X_EEPROM_CMD_NORMAL);
803 
804         rtl818x_iowrite8(priv, &priv->map->WPA_CONF, 0);
805         for (i = 0; i < ARRAY_SIZE(rtl8187b_reg_table); i++) {
806                 rtl818x_iowrite8_idx(priv,
807                                      (u8 *)(uintptr_t)
808                                      (rtl8187b_reg_table[i][0] | 0xFF00),
809                                      rtl8187b_reg_table[i][1],
810                                      rtl8187b_reg_table[i][2]);
811         }
812 
813         rtl818x_iowrite16(priv, &priv->map->TID_AC_MAP, 0xFA50);
814         rtl818x_iowrite16(priv, &priv->map->INT_MIG, 0);
815 
816         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF0, 0, 1);
817         rtl818x_iowrite32_idx(priv, (__le32 *)0xFFF4, 0, 1);
818         rtl818x_iowrite8_idx(priv, (u8 *)0xFFF8, 0, 1);
819 
820         rtl818x_iowrite32(priv, &priv->map->RF_TIMING, 0x00004001);
821 
822         /* RFSW_CTRL register */
823         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x569A, 2);
824 
825         rtl818x_iowrite16(priv, &priv->map->RFPinsOutput, 0x0480);
826         rtl818x_iowrite16(priv, &priv->map->RFPinsSelect, 0x2488);
827         rtl818x_iowrite16(priv, &priv->map->RFPinsEnable, 0x1FFF);
828         msleep(100);
829 
830         priv->rf->init(dev);
831 
832         reg = RTL818X_CMD_TX_ENABLE | RTL818X_CMD_RX_ENABLE;
833         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
834         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
835 
836         rtl818x_iowrite8(priv, (u8 *)0xFE41, 0xF4);
837         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x00);
838         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
839         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
840         rtl818x_iowrite8(priv, (u8 *)0xFE40, 0x0F);
841         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x00);
842         rtl818x_iowrite8(priv, (u8 *)0xFE42, 0x01);
843 
844         reg = rtl818x_ioread8(priv, (u8 *)0xFFDB);
845         rtl818x_iowrite8(priv, (u8 *)0xFFDB, reg | (1 << 2));
846         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF72, 0x59FA, 3);
847         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF74, 0x59D2, 3);
848         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF76, 0x59D2, 3);
849         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF78, 0x19FA, 3);
850         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7A, 0x19FA, 3);
851         rtl818x_iowrite16_idx(priv, (__le16 *)0xFF7C, 0x00D0, 3);
852         rtl818x_iowrite8(priv, (u8 *)0xFF61, 0);
853         rtl818x_iowrite8_idx(priv, (u8 *)0xFF80, 0x0F, 1);
854         rtl818x_iowrite8_idx(priv, (u8 *)0xFF83, 0x03, 1);
855         rtl818x_iowrite8(priv, (u8 *)0xFFDA, 0x10);
856         rtl818x_iowrite8_idx(priv, (u8 *)0xFF4D, 0x08, 2);
857 
858         rtl818x_iowrite32(priv, &priv->map->HSSI_PARA, 0x0600321B);
859 
860         rtl818x_iowrite16_idx(priv, (__le16 *)0xFFEC, 0x0800, 1);
861 
862         priv->slot_time = 0x9;
863         priv->aifsn[0] = 2; /* AIFSN[AC_VO] */
864         priv->aifsn[1] = 2; /* AIFSN[AC_VI] */
865         priv->aifsn[2] = 7; /* AIFSN[AC_BK] */
866         priv->aifsn[3] = 3; /* AIFSN[AC_BE] */
867         rtl818x_iowrite8(priv, &priv->map->ACM_CONTROL, 0);
868 
869         /* ENEDCA flag must always be set, transmit issues? */
870         rtl818x_iowrite8(priv, &priv->map->MSR, RTL818X_MSR_ENEDCA);
871 
872         return 0;
873 }
874 
875 static void rtl8187_work(struct work_struct *work)
876 {
877         /* The RTL8187 returns the retry count through register 0xFFFA. In
878          * addition, it appears to be a cumulative retry count, not the
879          * value for the current TX packet. When multiple TX entries are
880          * waiting in the queue, the retry count will be the total for all.
881          * The "error" may matter for purposes of rate setting, but there is
882          * no other choice with this hardware.
883          */
884         struct rtl8187_priv *priv = container_of(work, struct rtl8187_priv,
885                                     work.work);
886         struct ieee80211_tx_info *info;
887         struct ieee80211_hw *dev = priv->dev;
888         static u16 retry;
889         u16 tmp;
890         u16 avg_retry;
891         int length;
892 
893         mutex_lock(&priv->conf_mutex);
894         tmp = rtl818x_ioread16(priv, (__le16 *)0xFFFA);
895         length = skb_queue_len(&priv->b_tx_status.queue);
896         if (unlikely(!length))
897                 length = 1;
898         if (unlikely(tmp < retry))
899                 tmp = retry;
900         avg_retry = (tmp - retry) / length;
901         while (skb_queue_len(&priv->b_tx_status.queue) > 0) {
902                 struct sk_buff *old_skb;
903 
904                 old_skb = skb_dequeue(&priv->b_tx_status.queue);
905                 info = IEEE80211_SKB_CB(old_skb);
906                 info->status.rates[0].count = avg_retry + 1;
907                 if (info->status.rates[0].count > RETRY_COUNT)
908                         info->flags &= ~IEEE80211_TX_STAT_ACK;
909                 ieee80211_tx_status_irqsafe(dev, old_skb);
910         }
911         retry = tmp;
912         mutex_unlock(&priv->conf_mutex);
913 }
914 
915 static int rtl8187_start(struct ieee80211_hw *dev)
916 {
917         struct rtl8187_priv *priv = dev->priv;
918         u32 reg;
919         int ret;
920 
921         mutex_lock(&priv->conf_mutex);
922 
923         ret = (!priv->is_rtl8187b) ? rtl8187_init_hw(dev) :
924                                      rtl8187b_init_hw(dev);
925         if (ret)
926                 goto rtl8187_start_exit;
927 
928         init_usb_anchor(&priv->anchored);
929         priv->dev = dev;
930 
931         if (priv->is_rtl8187b) {
932                 reg = RTL818X_RX_CONF_MGMT |
933                       RTL818X_RX_CONF_DATA |
934                       RTL818X_RX_CONF_BROADCAST |
935                       RTL818X_RX_CONF_NICMAC |
936                       RTL818X_RX_CONF_BSSID |
937                       (7 << 13 /* RX FIFO threshold NONE */) |
938                       (7 << 10 /* MAX RX DMA */) |
939                       RTL818X_RX_CONF_RX_AUTORESETPHY |
940                       RTL818X_RX_CONF_ONLYERLPKT |
941                       RTL818X_RX_CONF_MULTICAST;
942                 priv->rx_conf = reg;
943                 rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
944 
945                 reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
946                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
947                 reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
948                 reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
949                 rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
950 
951                 rtl818x_iowrite32(priv, &priv->map->TX_CONF,
952                                   RTL818X_TX_CONF_HW_SEQNUM |
953                                   RTL818X_TX_CONF_DISREQQSIZE |
954                                   (RETRY_COUNT << 8  /* short retry limit */) |
955                                   (RETRY_COUNT << 0  /* long retry limit */) |
956                                   (7 << 21 /* MAX TX DMA */));
957                 ret = rtl8187_init_urbs(dev);
958                 if (ret)
959                         goto rtl8187_start_exit;
960                 ret = rtl8187b_init_status_urb(dev);
961                 if (ret)
962                         usb_kill_anchored_urbs(&priv->anchored);
963                 goto rtl8187_start_exit;
964         }
965 
966         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0xFFFF);
967 
968         rtl818x_iowrite32(priv, &priv->map->MAR[0], ~0);
969         rtl818x_iowrite32(priv, &priv->map->MAR[1], ~0);
970 
971         ret = rtl8187_init_urbs(dev);
972         if (ret)
973                 goto rtl8187_start_exit;
974 
975         reg = RTL818X_RX_CONF_ONLYERLPKT |
976               RTL818X_RX_CONF_RX_AUTORESETPHY |
977               RTL818X_RX_CONF_BSSID |
978               RTL818X_RX_CONF_MGMT |
979               RTL818X_RX_CONF_DATA |
980               (7 << 13 /* RX FIFO threshold NONE */) |
981               (7 << 10 /* MAX RX DMA */) |
982               RTL818X_RX_CONF_BROADCAST |
983               RTL818X_RX_CONF_NICMAC;
984 
985         priv->rx_conf = reg;
986         rtl818x_iowrite32(priv, &priv->map->RX_CONF, reg);
987 
988         reg = rtl818x_ioread8(priv, &priv->map->CW_CONF);
989         reg &= ~RTL818X_CW_CONF_PERPACKET_CW_SHIFT;
990         reg |= RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT;
991         rtl818x_iowrite8(priv, &priv->map->CW_CONF, reg);
992 
993         reg = rtl818x_ioread8(priv, &priv->map->TX_AGC_CTL);
994         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT;
995         reg &= ~RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT;
996         reg &= ~RTL818X_TX_AGC_CTL_FEEDBACK_ANT;
997         rtl818x_iowrite8(priv, &priv->map->TX_AGC_CTL, reg);
998 
999         reg  = RTL818X_TX_CONF_CW_MIN |
1000                (7 << 21 /* MAX TX DMA */) |
1001                RTL818X_TX_CONF_NO_ICV;
1002         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1003 
1004         reg = rtl818x_ioread8(priv, &priv->map->CMD);
1005         reg |= RTL818X_CMD_TX_ENABLE;
1006         reg |= RTL818X_CMD_RX_ENABLE;
1007         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1008         INIT_DELAYED_WORK(&priv->work, rtl8187_work);
1009 
1010 rtl8187_start_exit:
1011         mutex_unlock(&priv->conf_mutex);
1012         return ret;
1013 }
1014 
1015 static void rtl8187_stop(struct ieee80211_hw *dev)
1016 {
1017         struct rtl8187_priv *priv = dev->priv;
1018         struct sk_buff *skb;
1019         u32 reg;
1020 
1021         mutex_lock(&priv->conf_mutex);
1022         rtl818x_iowrite16(priv, &priv->map->INT_MASK, 0);
1023 
1024         reg = rtl818x_ioread8(priv, &priv->map->CMD);
1025         reg &= ~RTL818X_CMD_TX_ENABLE;
1026         reg &= ~RTL818X_CMD_RX_ENABLE;
1027         rtl818x_iowrite8(priv, &priv->map->CMD, reg);
1028 
1029         priv->rf->stop(dev);
1030         rtl8187_set_anaparam(priv, false);
1031 
1032         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1033         reg = rtl818x_ioread8(priv, &priv->map->CONFIG4);
1034         rtl818x_iowrite8(priv, &priv->map->CONFIG4, reg | RTL818X_CONFIG4_VCOOFF);
1035         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1036 
1037         while ((skb = skb_dequeue(&priv->b_tx_status.queue)))
1038                 dev_kfree_skb_any(skb);
1039 
1040         usb_kill_anchored_urbs(&priv->anchored);
1041         mutex_unlock(&priv->conf_mutex);
1042 
1043         if (!priv->is_rtl8187b)
1044                 cancel_delayed_work_sync(&priv->work);
1045 }
1046 
1047 static u64 rtl8187_get_tsf(struct ieee80211_hw *dev, struct ieee80211_vif *vif)
1048 {
1049         struct rtl8187_priv *priv = dev->priv;
1050 
1051         return rtl818x_ioread32(priv, &priv->map->TSFT[0]) |
1052                (u64)(rtl818x_ioread32(priv, &priv->map->TSFT[1])) << 32;
1053 }
1054 
1055 
1056 static void rtl8187_beacon_work(struct work_struct *work)
1057 {
1058         struct rtl8187_vif *vif_priv =
1059                 container_of(work, struct rtl8187_vif, beacon_work.work);
1060         struct ieee80211_vif *vif =
1061                 container_of((void *)vif_priv, struct ieee80211_vif, drv_priv);
1062         struct ieee80211_hw *dev = vif_priv->dev;
1063         struct ieee80211_mgmt *mgmt;
1064         struct sk_buff *skb;
1065 
1066         /* don't overflow the tx ring */
1067         if (ieee80211_queue_stopped(dev, 0))
1068                 goto resched;
1069 
1070         /* grab a fresh beacon */
1071         skb = ieee80211_beacon_get(dev, vif);
1072         if (!skb)
1073                 goto resched;
1074 
1075         /*
1076          * update beacon timestamp w/ TSF value
1077          * TODO: make hardware update beacon timestamp
1078          */
1079         mgmt = (struct ieee80211_mgmt *)skb->data;
1080         mgmt->u.beacon.timestamp = cpu_to_le64(rtl8187_get_tsf(dev, vif));
1081 
1082         /* TODO: use actual beacon queue */
1083         skb_set_queue_mapping(skb, 0);
1084 
1085         rtl8187_tx(dev, NULL, skb);
1086 
1087 resched:
1088         /*
1089          * schedule next beacon
1090          * TODO: use hardware support for beacon timing
1091          */
1092         schedule_delayed_work(&vif_priv->beacon_work,
1093                         usecs_to_jiffies(1024 * vif->bss_conf.beacon_int));
1094 }
1095 
1096 
1097 static int rtl8187_add_interface(struct ieee80211_hw *dev,
1098                                  struct ieee80211_vif *vif)
1099 {
1100         struct rtl8187_priv *priv = dev->priv;
1101         struct rtl8187_vif *vif_priv;
1102         int i;
1103         int ret = -EOPNOTSUPP;
1104 
1105         mutex_lock(&priv->conf_mutex);
1106         if (priv->vif)
1107                 goto exit;
1108 
1109         switch (vif->type) {
1110         case NL80211_IFTYPE_STATION:
1111         case NL80211_IFTYPE_ADHOC:
1112                 break;
1113         default:
1114                 goto exit;
1115         }
1116 
1117         ret = 0;
1118         priv->vif = vif;
1119 
1120         /* Initialize driver private area */
1121         vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1122         vif_priv->dev = dev;
1123         INIT_DELAYED_WORK(&vif_priv->beacon_work, rtl8187_beacon_work);
1124         vif_priv->enable_beacon = false;
1125 
1126 
1127         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1128         for (i = 0; i < ETH_ALEN; i++)
1129                 rtl818x_iowrite8(priv, &priv->map->MAC[i],
1130                                  ((u8 *)vif->addr)[i]);
1131         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1132 
1133 exit:
1134         mutex_unlock(&priv->conf_mutex);
1135         return ret;
1136 }
1137 
1138 static void rtl8187_remove_interface(struct ieee80211_hw *dev,
1139                                      struct ieee80211_vif *vif)
1140 {
1141         struct rtl8187_priv *priv = dev->priv;
1142         mutex_lock(&priv->conf_mutex);
1143         priv->vif = NULL;
1144         mutex_unlock(&priv->conf_mutex);
1145 }
1146 
1147 static int rtl8187_config(struct ieee80211_hw *dev, u32 changed)
1148 {
1149         struct rtl8187_priv *priv = dev->priv;
1150         struct ieee80211_conf *conf = &dev->conf;
1151         u32 reg;
1152 
1153         mutex_lock(&priv->conf_mutex);
1154         reg = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1155         /* Enable TX loopback on MAC level to avoid TX during channel
1156          * changes, as this has be seen to causes problems and the
1157          * card will stop work until next reset
1158          */
1159         rtl818x_iowrite32(priv, &priv->map->TX_CONF,
1160                           reg | RTL818X_TX_CONF_LOOPBACK_MAC);
1161         priv->rf->set_chan(dev, conf);
1162         msleep(10);
1163         rtl818x_iowrite32(priv, &priv->map->TX_CONF, reg);
1164 
1165         rtl818x_iowrite16(priv, &priv->map->ATIM_WND, 2);
1166         rtl818x_iowrite16(priv, &priv->map->ATIMTR_INTERVAL, 100);
1167         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL, 100);
1168         rtl818x_iowrite16(priv, &priv->map->BEACON_INTERVAL_TIME, 100);
1169         mutex_unlock(&priv->conf_mutex);
1170         return 0;
1171 }
1172 
1173 /*
1174  * With 8187B, AC_*_PARAM clashes with FEMR definition in struct rtl818x_csr for
1175  * example. Thus we have to use raw values for AC_*_PARAM register addresses.
1176  */
1177 static __le32 *rtl8187b_ac_addr[4] = {
1178         (__le32 *) 0xFFF0, /* AC_VO */
1179         (__le32 *) 0xFFF4, /* AC_VI */
1180         (__le32 *) 0xFFFC, /* AC_BK */
1181         (__le32 *) 0xFFF8, /* AC_BE */
1182 };
1183 
1184 #define SIFS_TIME 0xa
1185 
1186 static void rtl8187_conf_erp(struct rtl8187_priv *priv, bool use_short_slot,
1187                              bool use_short_preamble)
1188 {
1189         if (priv->is_rtl8187b) {
1190                 u8 difs, eifs;
1191                 u16 ack_timeout;
1192                 int queue;
1193 
1194                 if (use_short_slot) {
1195                         priv->slot_time = 0x9;
1196                         difs = 0x1c;
1197                         eifs = 0x53;
1198                 } else {
1199                         priv->slot_time = 0x14;
1200                         difs = 0x32;
1201                         eifs = 0x5b;
1202                 }
1203                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1204                 rtl818x_iowrite8(priv, &priv->map->SLOT, priv->slot_time);
1205                 rtl818x_iowrite8(priv, &priv->map->DIFS, difs);
1206 
1207                 /*
1208                  * BRSR+1 on 8187B is in fact EIFS register
1209                  * Value in units of 4 us
1210                  */
1211                 rtl818x_iowrite8(priv, (u8 *)&priv->map->BRSR + 1, eifs);
1212 
1213                 /*
1214                  * For 8187B, CARRIER_SENSE_COUNTER is in fact ack timeout
1215                  * register. In units of 4 us like eifs register
1216                  * ack_timeout = ack duration + plcp + difs + preamble
1217                  */
1218                 ack_timeout = 112 + 48 + difs;
1219                 if (use_short_preamble)
1220                         ack_timeout += 72;
1221                 else
1222                         ack_timeout += 144;
1223                 rtl818x_iowrite8(priv, &priv->map->CARRIER_SENSE_COUNTER,
1224                                  DIV_ROUND_UP(ack_timeout, 4));
1225 
1226                 for (queue = 0; queue < 4; queue++)
1227                         rtl818x_iowrite8(priv, (u8 *) rtl8187b_ac_addr[queue],
1228                                          priv->aifsn[queue] * priv->slot_time +
1229                                          SIFS_TIME);
1230         } else {
1231                 rtl818x_iowrite8(priv, &priv->map->SIFS, 0x22);
1232                 if (use_short_slot) {
1233                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x9);
1234                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x14);
1235                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x14);
1236                 } else {
1237                         rtl818x_iowrite8(priv, &priv->map->SLOT, 0x14);
1238                         rtl818x_iowrite8(priv, &priv->map->DIFS, 0x24);
1239                         rtl818x_iowrite8(priv, &priv->map->EIFS, 91 - 0x24);
1240                 }
1241         }
1242 }
1243 
1244 static void rtl8187_bss_info_changed(struct ieee80211_hw *dev,
1245                                      struct ieee80211_vif *vif,
1246                                      struct ieee80211_bss_conf *info,
1247                                      u32 changed)
1248 {
1249         struct rtl8187_priv *priv = dev->priv;
1250         struct rtl8187_vif *vif_priv;
1251         int i;
1252         u8 reg;
1253 
1254         vif_priv = (struct rtl8187_vif *)&vif->drv_priv;
1255 
1256         if (changed & BSS_CHANGED_BSSID) {
1257                 mutex_lock(&priv->conf_mutex);
1258                 for (i = 0; i < ETH_ALEN; i++)
1259                         rtl818x_iowrite8(priv, &priv->map->BSSID[i],
1260                                          info->bssid[i]);
1261 
1262                 if (priv->is_rtl8187b)
1263                         reg = RTL818X_MSR_ENEDCA;
1264                 else
1265                         reg = 0;
1266 
1267                 if (is_valid_ether_addr(info->bssid)) {
1268                         if (vif->type == NL80211_IFTYPE_ADHOC)
1269                                 reg |= RTL818X_MSR_ADHOC;
1270                         else
1271                                 reg |= RTL818X_MSR_INFRA;
1272                 }
1273                 else
1274                         reg |= RTL818X_MSR_NO_LINK;
1275 
1276                 rtl818x_iowrite8(priv, &priv->map->MSR, reg);
1277 
1278                 mutex_unlock(&priv->conf_mutex);
1279         }
1280 
1281         if (changed & (BSS_CHANGED_ERP_SLOT | BSS_CHANGED_ERP_PREAMBLE))
1282                 rtl8187_conf_erp(priv, info->use_short_slot,
1283                                  info->use_short_preamble);
1284 
1285         if (changed & BSS_CHANGED_BEACON_ENABLED)
1286                 vif_priv->enable_beacon = info->enable_beacon;
1287 
1288         if (changed & (BSS_CHANGED_BEACON_ENABLED | BSS_CHANGED_BEACON)) {
1289                 cancel_delayed_work_sync(&vif_priv->beacon_work);
1290                 if (vif_priv->enable_beacon)
1291                         schedule_work(&vif_priv->beacon_work.work);
1292         }
1293 
1294 }
1295 
1296 static u64 rtl8187_prepare_multicast(struct ieee80211_hw *dev,
1297                                      struct netdev_hw_addr_list *mc_list)
1298 {
1299         return netdev_hw_addr_list_count(mc_list);
1300 }
1301 
1302 static void rtl8187_configure_filter(struct ieee80211_hw *dev,
1303                                      unsigned int changed_flags,
1304                                      unsigned int *total_flags,
1305                                      u64 multicast)
1306 {
1307         struct rtl8187_priv *priv = dev->priv;
1308 
1309         if (changed_flags & FIF_FCSFAIL)
1310                 priv->rx_conf ^= RTL818X_RX_CONF_FCS;
1311         if (changed_flags & FIF_CONTROL)
1312                 priv->rx_conf ^= RTL818X_RX_CONF_CTRL;
1313         if (changed_flags & FIF_OTHER_BSS)
1314                 priv->rx_conf ^= RTL818X_RX_CONF_MONITOR;
1315         if (*total_flags & FIF_ALLMULTI || multicast > 0)
1316                 priv->rx_conf |= RTL818X_RX_CONF_MULTICAST;
1317         else
1318                 priv->rx_conf &= ~RTL818X_RX_CONF_MULTICAST;
1319 
1320         *total_flags = 0;
1321 
1322         if (priv->rx_conf & RTL818X_RX_CONF_FCS)
1323                 *total_flags |= FIF_FCSFAIL;
1324         if (priv->rx_conf & RTL818X_RX_CONF_CTRL)
1325                 *total_flags |= FIF_CONTROL;
1326         if (priv->rx_conf & RTL818X_RX_CONF_MONITOR)
1327                 *total_flags |= FIF_OTHER_BSS;
1328         if (priv->rx_conf & RTL818X_RX_CONF_MULTICAST)
1329                 *total_flags |= FIF_ALLMULTI;
1330 
1331         rtl818x_iowrite32_async(priv, &priv->map->RX_CONF, priv->rx_conf);
1332 }
1333 
1334 static int rtl8187_conf_tx(struct ieee80211_hw *dev,
1335                            struct ieee80211_vif *vif, u16 queue,
1336                            const struct ieee80211_tx_queue_params *params)
1337 {
1338         struct rtl8187_priv *priv = dev->priv;
1339         u8 cw_min, cw_max;
1340 
1341         if (queue > 3)
1342                 return -EINVAL;
1343 
1344         cw_min = fls(params->cw_min);
1345         cw_max = fls(params->cw_max);
1346 
1347         if (priv->is_rtl8187b) {
1348                 priv->aifsn[queue] = params->aifs;
1349 
1350                 /*
1351                  * This is the structure of AC_*_PARAM registers in 8187B:
1352                  * - TXOP limit field, bit offset = 16
1353                  * - ECWmax, bit offset = 12
1354                  * - ECWmin, bit offset = 8
1355                  * - AIFS, bit offset = 0
1356                  */
1357                 rtl818x_iowrite32(priv, rtl8187b_ac_addr[queue],
1358                                   (params->txop << 16) | (cw_max << 12) |
1359                                   (cw_min << 8) | (params->aifs *
1360                                   priv->slot_time + SIFS_TIME));
1361         } else {
1362                 if (queue != 0)
1363                         return -EINVAL;
1364 
1365                 rtl818x_iowrite8(priv, &priv->map->CW_VAL,
1366                                  cw_min | (cw_max << 4));
1367         }
1368         return 0;
1369 }
1370 
1371 
1372 static const struct ieee80211_ops rtl8187_ops = {
1373         .tx                     = rtl8187_tx,
1374         .start                  = rtl8187_start,
1375         .stop                   = rtl8187_stop,
1376         .add_interface          = rtl8187_add_interface,
1377         .remove_interface       = rtl8187_remove_interface,
1378         .config                 = rtl8187_config,
1379         .bss_info_changed       = rtl8187_bss_info_changed,
1380         .prepare_multicast      = rtl8187_prepare_multicast,
1381         .configure_filter       = rtl8187_configure_filter,
1382         .conf_tx                = rtl8187_conf_tx,
1383         .rfkill_poll            = rtl8187_rfkill_poll,
1384         .get_tsf                = rtl8187_get_tsf,
1385 };
1386 
1387 static void rtl8187_eeprom_register_read(struct eeprom_93cx6 *eeprom)
1388 {
1389         struct ieee80211_hw *dev = eeprom->data;
1390         struct rtl8187_priv *priv = dev->priv;
1391         u8 reg = rtl818x_ioread8(priv, &priv->map->EEPROM_CMD);
1392 
1393         eeprom->reg_data_in = reg & RTL818X_EEPROM_CMD_WRITE;
1394         eeprom->reg_data_out = reg & RTL818X_EEPROM_CMD_READ;
1395         eeprom->reg_data_clock = reg & RTL818X_EEPROM_CMD_CK;
1396         eeprom->reg_chip_select = reg & RTL818X_EEPROM_CMD_CS;
1397 }
1398 
1399 static void rtl8187_eeprom_register_write(struct eeprom_93cx6 *eeprom)
1400 {
1401         struct ieee80211_hw *dev = eeprom->data;
1402         struct rtl8187_priv *priv = dev->priv;
1403         u8 reg = RTL818X_EEPROM_CMD_PROGRAM;
1404 
1405         if (eeprom->reg_data_in)
1406                 reg |= RTL818X_EEPROM_CMD_WRITE;
1407         if (eeprom->reg_data_out)
1408                 reg |= RTL818X_EEPROM_CMD_READ;
1409         if (eeprom->reg_data_clock)
1410                 reg |= RTL818X_EEPROM_CMD_CK;
1411         if (eeprom->reg_chip_select)
1412                 reg |= RTL818X_EEPROM_CMD_CS;
1413 
1414         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, reg);
1415         udelay(10);
1416 }
1417 
1418 static int rtl8187_probe(struct usb_interface *intf,
1419                                    const struct usb_device_id *id)
1420 {
1421         struct usb_device *udev = interface_to_usbdev(intf);
1422         struct ieee80211_hw *dev;
1423         struct rtl8187_priv *priv;
1424         struct eeprom_93cx6 eeprom;
1425         struct ieee80211_channel *channel;
1426         const char *chip_name;
1427         u16 txpwr, reg;
1428         u16 product_id = le16_to_cpu(udev->descriptor.idProduct);
1429         int err, i;
1430         u8 mac_addr[ETH_ALEN];
1431 
1432         dev = ieee80211_alloc_hw(sizeof(*priv), &rtl8187_ops);
1433         if (!dev) {
1434                 printk(KERN_ERR "rtl8187: ieee80211 alloc failed\n");
1435                 return -ENOMEM;
1436         }
1437 
1438         priv = dev->priv;
1439         priv->is_rtl8187b = (id->driver_info == DEVICE_RTL8187B);
1440 
1441         /* allocate "DMA aware" buffer for register accesses */
1442         priv->io_dmabuf = kmalloc(sizeof(*priv->io_dmabuf), GFP_KERNEL);
1443         if (!priv->io_dmabuf) {
1444                 err = -ENOMEM;
1445                 goto err_free_dev;
1446         }
1447         mutex_init(&priv->io_mutex);
1448 
1449         SET_IEEE80211_DEV(dev, &intf->dev);
1450         usb_set_intfdata(intf, dev);
1451         priv->udev = udev;
1452 
1453         usb_get_dev(udev);
1454 
1455         skb_queue_head_init(&priv->rx_queue);
1456 
1457         BUILD_BUG_ON(sizeof(priv->channels) != sizeof(rtl818x_channels));
1458         BUILD_BUG_ON(sizeof(priv->rates) != sizeof(rtl818x_rates));
1459 
1460         memcpy(priv->channels, rtl818x_channels, sizeof(rtl818x_channels));
1461         memcpy(priv->rates, rtl818x_rates, sizeof(rtl818x_rates));
1462         priv->map = (struct rtl818x_csr *)0xFF00;
1463 
1464         priv->band.band = IEEE80211_BAND_2GHZ;
1465         priv->band.channels = priv->channels;
1466         priv->band.n_channels = ARRAY_SIZE(rtl818x_channels);
1467         priv->band.bitrates = priv->rates;
1468         priv->band.n_bitrates = ARRAY_SIZE(rtl818x_rates);
1469         dev->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
1470 
1471 
1472         dev->flags = IEEE80211_HW_HOST_BROADCAST_PS_BUFFERING |
1473                      IEEE80211_HW_SIGNAL_DBM |
1474                      IEEE80211_HW_RX_INCLUDES_FCS;
1475         /* Initialize rate-control variables */
1476         dev->max_rates = 1;
1477         dev->max_rate_tries = RETRY_COUNT;
1478 
1479         eeprom.data = dev;
1480         eeprom.register_read = rtl8187_eeprom_register_read;
1481         eeprom.register_write = rtl8187_eeprom_register_write;
1482         if (rtl818x_ioread32(priv, &priv->map->RX_CONF) & (1 << 6))
1483                 eeprom.width = PCI_EEPROM_WIDTH_93C66;
1484         else
1485                 eeprom.width = PCI_EEPROM_WIDTH_93C46;
1486 
1487         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_CONFIG);
1488         udelay(10);
1489 
1490         eeprom_93cx6_multiread(&eeprom, RTL8187_EEPROM_MAC_ADDR,
1491                                (__le16 __force *)mac_addr, 3);
1492         if (!is_valid_ether_addr(mac_addr)) {
1493                 printk(KERN_WARNING "rtl8187: Invalid hwaddr! Using randomly "
1494                        "generated MAC address\n");
1495                 eth_random_addr(mac_addr);
1496         }
1497         SET_IEEE80211_PERM_ADDR(dev, mac_addr);
1498 
1499         channel = priv->channels;
1500         for (i = 0; i < 3; i++) {
1501                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_1 + i,
1502                                   &txpwr);
1503                 (*channel++).hw_value = txpwr & 0xFF;
1504                 (*channel++).hw_value = txpwr >> 8;
1505         }
1506         for (i = 0; i < 2; i++) {
1507                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_4 + i,
1508                                   &txpwr);
1509                 (*channel++).hw_value = txpwr & 0xFF;
1510                 (*channel++).hw_value = txpwr >> 8;
1511         }
1512 
1513         eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_BASE,
1514                           &priv->txpwr_base);
1515 
1516         reg = rtl818x_ioread8(priv, &priv->map->PGSELECT) & ~1;
1517         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg | 1);
1518         /* 0 means asic B-cut, we should use SW 3 wire
1519          * bit-by-bit banging for radio. 1 means we can use
1520          * USB specific request to write radio registers */
1521         priv->asic_rev = rtl818x_ioread8(priv, (u8 *)0xFFFE) & 0x3;
1522         rtl818x_iowrite8(priv, &priv->map->PGSELECT, reg);
1523         rtl818x_iowrite8(priv, &priv->map->EEPROM_CMD, RTL818X_EEPROM_CMD_NORMAL);
1524 
1525         if (!priv->is_rtl8187b) {
1526                 u32 reg32;
1527                 reg32 = rtl818x_ioread32(priv, &priv->map->TX_CONF);
1528                 reg32 &= RTL818X_TX_CONF_HWVER_MASK;
1529                 switch (reg32) {
1530                 case RTL818X_TX_CONF_R8187vD_B:
1531                         /* Some RTL8187B devices have a USB ID of 0x8187
1532                          * detect them here */
1533                         chip_name = "RTL8187BvB(early)";
1534                         priv->is_rtl8187b = 1;
1535                         priv->hw_rev = RTL8187BvB;
1536                         break;
1537                 case RTL818X_TX_CONF_R8187vD:
1538                         chip_name = "RTL8187vD";
1539                         break;
1540                 default:
1541                         chip_name = "RTL8187vB (default)";
1542                 }
1543        } else {
1544                 /*
1545                  * Force USB request to write radio registers for 8187B, Realtek
1546                  * only uses it in their sources
1547                  */
1548                 /*if (priv->asic_rev == 0) {
1549                         printk(KERN_WARNING "rtl8187: Forcing use of USB "
1550                                "requests to write to radio registers\n");
1551                         priv->asic_rev = 1;
1552                 }*/
1553                 switch (rtl818x_ioread8(priv, (u8 *)0xFFE1)) {
1554                 case RTL818X_R8187B_B:
1555                         chip_name = "RTL8187BvB";
1556                         priv->hw_rev = RTL8187BvB;
1557                         break;
1558                 case RTL818X_R8187B_D:
1559                         chip_name = "RTL8187BvD";
1560                         priv->hw_rev = RTL8187BvD;
1561                         break;
1562                 case RTL818X_R8187B_E:
1563                         chip_name = "RTL8187BvE";
1564                         priv->hw_rev = RTL8187BvE;
1565                         break;
1566                 default:
1567                         chip_name = "RTL8187BvB (default)";
1568                         priv->hw_rev = RTL8187BvB;
1569                 }
1570         }
1571 
1572         if (!priv->is_rtl8187b) {
1573                 for (i = 0; i < 2; i++) {
1574                         eeprom_93cx6_read(&eeprom,
1575                                           RTL8187_EEPROM_TXPWR_CHAN_6 + i,
1576                                           &txpwr);
1577                         (*channel++).hw_value = txpwr & 0xFF;
1578                         (*channel++).hw_value = txpwr >> 8;
1579                 }
1580         } else {
1581                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_TXPWR_CHAN_6,
1582                                   &txpwr);
1583                 (*channel++).hw_value = txpwr & 0xFF;
1584 
1585                 eeprom_93cx6_read(&eeprom, 0x0A, &txpwr);
1586                 (*channel++).hw_value = txpwr & 0xFF;
1587 
1588                 eeprom_93cx6_read(&eeprom, 0x1C, &txpwr);
1589                 (*channel++).hw_value = txpwr & 0xFF;
1590                 (*channel++).hw_value = txpwr >> 8;
1591         }
1592         /* Handle the differing rfkill GPIO bit in different models */
1593         priv->rfkill_mask = RFKILL_MASK_8187_89_97;
1594         if (product_id == 0x8197 || product_id == 0x8198) {
1595                 eeprom_93cx6_read(&eeprom, RTL8187_EEPROM_SELECT_GPIO, &reg);
1596                 if (reg & 0xFF00)
1597                         priv->rfkill_mask = RFKILL_MASK_8198;
1598         }
1599         dev->vif_data_size = sizeof(struct rtl8187_vif);
1600         dev->wiphy->interface_modes = BIT(NL80211_IFTYPE_STATION) |
1601                                       BIT(NL80211_IFTYPE_ADHOC) ;
1602 
1603         if ((id->driver_info == DEVICE_RTL8187) && priv->is_rtl8187b)
1604                 printk(KERN_INFO "rtl8187: inconsistency between id with OEM"
1605                        " info!\n");
1606 
1607         priv->rf = rtl8187_detect_rf(dev);
1608         dev->extra_tx_headroom = (!priv->is_rtl8187b) ?
1609                                   sizeof(struct rtl8187_tx_hdr) :
1610                                   sizeof(struct rtl8187b_tx_hdr);
1611         if (!priv->is_rtl8187b)
1612                 dev->queues = 1;
1613         else
1614                 dev->queues = 4;
1615 
1616         err = ieee80211_register_hw(dev);
1617         if (err) {
1618                 printk(KERN_ERR "rtl8187: Cannot register device\n");
1619                 goto err_free_dmabuf;
1620         }
1621         mutex_init(&priv->conf_mutex);
1622         skb_queue_head_init(&priv->b_tx_status.queue);
1623 
1624         wiphy_info(dev->wiphy, "hwaddr %pM, %s V%d + %s, rfkill mask %d\n",
1625                    mac_addr, chip_name, priv->asic_rev, priv->rf->name,
1626                    priv->rfkill_mask);
1627 
1628 #ifdef CONFIG_RTL8187_LEDS
1629         eeprom_93cx6_read(&eeprom, 0x3F, &reg);
1630         reg &= 0xFF;
1631         rtl8187_leds_init(dev, reg);
1632 #endif
1633         rtl8187_rfkill_init(dev);
1634 
1635         return 0;
1636 
1637  err_free_dmabuf:
1638         kfree(priv->io_dmabuf);
1639  err_free_dev:
1640         ieee80211_free_hw(dev);
1641         usb_set_intfdata(intf, NULL);
1642         usb_put_dev(udev);
1643         return err;
1644 }
1645 
1646 static void rtl8187_disconnect(struct usb_interface *intf)
1647 {
1648         struct ieee80211_hw *dev = usb_get_intfdata(intf);
1649         struct rtl8187_priv *priv;
1650 
1651         if (!dev)
1652                 return;
1653 
1654 #ifdef CONFIG_RTL8187_LEDS
1655         rtl8187_leds_exit(dev);
1656 #endif
1657         rtl8187_rfkill_exit(dev);
1658         ieee80211_unregister_hw(dev);
1659 
1660         priv = dev->priv;
1661         usb_reset_device(priv->udev);
1662         usb_put_dev(interface_to_usbdev(intf));
1663         kfree(priv->io_dmabuf);
1664         ieee80211_free_hw(dev);
1665 }
1666 
1667 static struct usb_driver rtl8187_driver = {
1668         .name           = KBUILD_MODNAME,
1669         .id_table       = rtl8187_table,
1670         .probe          = rtl8187_probe,
1671         .disconnect     = rtl8187_disconnect,
1672         .disable_hub_initiated_lpm = 1,
1673 };
1674 
1675 module_usb_driver(rtl8187_driver);
1676 

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