Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/net/wan/wanxl.c

  1 /*
  2  * wanXL serial card driver for Linux
  3  * host part
  4  *
  5  * Copyright (C) 2003 Krzysztof Halasa <khc@pm.waw.pl>
  6  *
  7  * This program is free software; you can redistribute it and/or modify it
  8  * under the terms of version 2 of the GNU General Public License
  9  * as published by the Free Software Foundation.
 10  *
 11  * Status:
 12  *   - Only DTE (external clock) support with NRZ and NRZI encodings
 13  *   - wanXL100 will require minor driver modifications, no access to hw
 14  */
 15 
 16 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 17 
 18 #include <linux/module.h>
 19 #include <linux/kernel.h>
 20 #include <linux/slab.h>
 21 #include <linux/sched.h>
 22 #include <linux/types.h>
 23 #include <linux/fcntl.h>
 24 #include <linux/string.h>
 25 #include <linux/errno.h>
 26 #include <linux/init.h>
 27 #include <linux/interrupt.h>
 28 #include <linux/ioport.h>
 29 #include <linux/netdevice.h>
 30 #include <linux/hdlc.h>
 31 #include <linux/pci.h>
 32 #include <linux/dma-mapping.h>
 33 #include <linux/delay.h>
 34 #include <asm/io.h>
 35 
 36 #include "wanxl.h"
 37 
 38 static const char* version = "wanXL serial card driver version: 0.48";
 39 
 40 #define PLX_CTL_RESET   0x40000000 /* adapter reset */
 41 
 42 #undef DEBUG_PKT
 43 #undef DEBUG_PCI
 44 
 45 /* MAILBOX #1 - PUTS COMMANDS */
 46 #define MBX1_CMD_ABORTJ 0x85000000 /* Abort and Jump */
 47 #ifdef __LITTLE_ENDIAN
 48 #define MBX1_CMD_BSWAP  0x8C000001 /* little-endian Byte Swap Mode */
 49 #else
 50 #define MBX1_CMD_BSWAP  0x8C000000 /* big-endian Byte Swap Mode */
 51 #endif
 52 
 53 /* MAILBOX #2 - DRAM SIZE */
 54 #define MBX2_MEMSZ_MASK 0xFFFF0000 /* PUTS Memory Size Register mask */
 55 
 56 
 57 typedef struct {
 58         struct net_device *dev;
 59         struct card_t *card;
 60         spinlock_t lock;        /* for wanxl_xmit */
 61         int node;               /* physical port #0 - 3 */
 62         unsigned int clock_type;
 63         int tx_in, tx_out;
 64         struct sk_buff *tx_skbs[TX_BUFFERS];
 65 }port_t;
 66 
 67 
 68 typedef struct {
 69         desc_t rx_descs[RX_QUEUE_LENGTH];
 70         port_status_t port_status[4];
 71 }card_status_t;
 72 
 73 
 74 typedef struct card_t {
 75         int n_ports;            /* 1, 2 or 4 ports */
 76         u8 irq;
 77 
 78         u8 __iomem *plx;        /* PLX PCI9060 virtual base address */
 79         struct pci_dev *pdev;   /* for pci_name(pdev) */
 80         int rx_in;
 81         struct sk_buff *rx_skbs[RX_QUEUE_LENGTH];
 82         card_status_t *status;  /* shared between host and card */
 83         dma_addr_t status_address;
 84         port_t ports[0];        /* 1 - 4 port_t structures follow */
 85 }card_t;
 86 
 87 
 88 
 89 static inline port_t* dev_to_port(struct net_device *dev)
 90 {
 91         return (port_t *)dev_to_hdlc(dev)->priv;
 92 }
 93 
 94 
 95 static inline port_status_t* get_status(port_t *port)
 96 {
 97         return &port->card->status->port_status[port->node];
 98 }
 99 
100 
101 #ifdef DEBUG_PCI
102 static inline dma_addr_t pci_map_single_debug(struct pci_dev *pdev, void *ptr,
103                                               size_t size, int direction)
104 {
105         dma_addr_t addr = pci_map_single(pdev, ptr, size, direction);
106         if (addr + size > 0x100000000LL)
107                 pr_crit("%s: pci_map_single() returned memory at 0x%llx!\n",
108                         pci_name(pdev), (unsigned long long)addr);
109         return addr;
110 }
111 
112 #undef pci_map_single
113 #define pci_map_single pci_map_single_debug
114 #endif
115 
116 
117 /* Cable and/or personality module change interrupt service */
118 static inline void wanxl_cable_intr(port_t *port)
119 {
120         u32 value = get_status(port)->cable;
121         int valid = 1;
122         const char *cable, *pm, *dte = "", *dsr = "", *dcd = "";
123 
124         switch(value & 0x7) {
125         case STATUS_CABLE_V35: cable = "V.35"; break;
126         case STATUS_CABLE_X21: cable = "X.21"; break;
127         case STATUS_CABLE_V24: cable = "V.24"; break;
128         case STATUS_CABLE_EIA530: cable = "EIA530"; break;
129         case STATUS_CABLE_NONE: cable = "no"; break;
130         default: cable = "invalid";
131         }
132 
133         switch((value >> STATUS_CABLE_PM_SHIFT) & 0x7) {
134         case STATUS_CABLE_V35: pm = "V.35"; break;
135         case STATUS_CABLE_X21: pm = "X.21"; break;
136         case STATUS_CABLE_V24: pm = "V.24"; break;
137         case STATUS_CABLE_EIA530: pm = "EIA530"; break;
138         case STATUS_CABLE_NONE: pm = "no personality"; valid = 0; break;
139         default: pm = "invalid personality"; valid = 0;
140         }
141 
142         if (valid) {
143                 if ((value & 7) == ((value >> STATUS_CABLE_PM_SHIFT) & 7)) {
144                         dsr = (value & STATUS_CABLE_DSR) ? ", DSR ON" :
145                                 ", DSR off";
146                         dcd = (value & STATUS_CABLE_DCD) ? ", carrier ON" :
147                                 ", carrier off";
148                 }
149                 dte = (value & STATUS_CABLE_DCE) ? " DCE" : " DTE";
150         }
151         netdev_info(port->dev, "%s%s module, %s cable%s%s\n",
152                     pm, dte, cable, dsr, dcd);
153 
154         if (value & STATUS_CABLE_DCD)
155                 netif_carrier_on(port->dev);
156         else
157                 netif_carrier_off(port->dev);
158 }
159 
160 
161 
162 /* Transmit complete interrupt service */
163 static inline void wanxl_tx_intr(port_t *port)
164 {
165         struct net_device *dev = port->dev;
166         while (1) {
167                 desc_t *desc = &get_status(port)->tx_descs[port->tx_in];
168                 struct sk_buff *skb = port->tx_skbs[port->tx_in];
169 
170                 switch (desc->stat) {
171                 case PACKET_FULL:
172                 case PACKET_EMPTY:
173                         netif_wake_queue(dev);
174                         return;
175 
176                 case PACKET_UNDERRUN:
177                         dev->stats.tx_errors++;
178                         dev->stats.tx_fifo_errors++;
179                         break;
180 
181                 default:
182                         dev->stats.tx_packets++;
183                         dev->stats.tx_bytes += skb->len;
184                 }
185                 desc->stat = PACKET_EMPTY; /* Free descriptor */
186                 pci_unmap_single(port->card->pdev, desc->address, skb->len,
187                                  PCI_DMA_TODEVICE);
188                 dev_kfree_skb_irq(skb);
189                 port->tx_in = (port->tx_in + 1) % TX_BUFFERS;
190         }
191 }
192 
193 
194 
195 /* Receive complete interrupt service */
196 static inline void wanxl_rx_intr(card_t *card)
197 {
198         desc_t *desc;
199         while (desc = &card->status->rx_descs[card->rx_in],
200                desc->stat != PACKET_EMPTY) {
201                 if ((desc->stat & PACKET_PORT_MASK) > card->n_ports)
202                         pr_crit("%s: received packet for nonexistent port\n",
203                                 pci_name(card->pdev));
204                 else {
205                         struct sk_buff *skb = card->rx_skbs[card->rx_in];
206                         port_t *port = &card->ports[desc->stat &
207                                                     PACKET_PORT_MASK];
208                         struct net_device *dev = port->dev;
209 
210                         if (!skb)
211                                 dev->stats.rx_dropped++;
212                         else {
213                                 pci_unmap_single(card->pdev, desc->address,
214                                                  BUFFER_LENGTH,
215                                                  PCI_DMA_FROMDEVICE);
216                                 skb_put(skb, desc->length);
217 
218 #ifdef DEBUG_PKT
219                                 printk(KERN_DEBUG "%s RX(%i):", dev->name,
220                                        skb->len);
221                                 debug_frame(skb);
222 #endif
223                                 dev->stats.rx_packets++;
224                                 dev->stats.rx_bytes += skb->len;
225                                 skb->protocol = hdlc_type_trans(skb, dev);
226                                 netif_rx(skb);
227                                 skb = NULL;
228                         }
229 
230                         if (!skb) {
231                                 skb = dev_alloc_skb(BUFFER_LENGTH);
232                                 desc->address = skb ?
233                                         pci_map_single(card->pdev, skb->data,
234                                                        BUFFER_LENGTH,
235                                                        PCI_DMA_FROMDEVICE) : 0;
236                                 card->rx_skbs[card->rx_in] = skb;
237                         }
238                 }
239                 desc->stat = PACKET_EMPTY; /* Free descriptor */
240                 card->rx_in = (card->rx_in + 1) % RX_QUEUE_LENGTH;
241         }
242 }
243 
244 
245 
246 static irqreturn_t wanxl_intr(int irq, void* dev_id)
247 {
248         card_t *card = dev_id;
249         int i;
250         u32 stat;
251         int handled = 0;
252 
253 
254         while((stat = readl(card->plx + PLX_DOORBELL_FROM_CARD)) != 0) {
255                 handled = 1;
256                 writel(stat, card->plx + PLX_DOORBELL_FROM_CARD);
257 
258                 for (i = 0; i < card->n_ports; i++) {
259                         if (stat & (1 << (DOORBELL_FROM_CARD_TX_0 + i)))
260                                 wanxl_tx_intr(&card->ports[i]);
261                         if (stat & (1 << (DOORBELL_FROM_CARD_CABLE_0 + i)))
262                                 wanxl_cable_intr(&card->ports[i]);
263                 }
264                 if (stat & (1 << DOORBELL_FROM_CARD_RX))
265                         wanxl_rx_intr(card);
266         }
267 
268         return IRQ_RETVAL(handled);
269 }
270 
271 
272 
273 static netdev_tx_t wanxl_xmit(struct sk_buff *skb, struct net_device *dev)
274 {
275         port_t *port = dev_to_port(dev);
276         desc_t *desc;
277 
278         spin_lock(&port->lock);
279 
280         desc = &get_status(port)->tx_descs[port->tx_out];
281         if (desc->stat != PACKET_EMPTY) {
282                 /* should never happen - previous xmit should stop queue */
283 #ifdef DEBUG_PKT
284                 printk(KERN_DEBUG "%s: transmitter buffer full\n", dev->name);
285 #endif
286                 netif_stop_queue(dev);
287                 spin_unlock(&port->lock);
288                 return NETDEV_TX_BUSY;       /* request packet to be queued */
289         }
290 
291 #ifdef DEBUG_PKT
292         printk(KERN_DEBUG "%s TX(%i):", dev->name, skb->len);
293         debug_frame(skb);
294 #endif
295 
296         port->tx_skbs[port->tx_out] = skb;
297         desc->address = pci_map_single(port->card->pdev, skb->data, skb->len,
298                                        PCI_DMA_TODEVICE);
299         desc->length = skb->len;
300         desc->stat = PACKET_FULL;
301         writel(1 << (DOORBELL_TO_CARD_TX_0 + port->node),
302                port->card->plx + PLX_DOORBELL_TO_CARD);
303 
304         port->tx_out = (port->tx_out + 1) % TX_BUFFERS;
305 
306         if (get_status(port)->tx_descs[port->tx_out].stat != PACKET_EMPTY) {
307                 netif_stop_queue(dev);
308 #ifdef DEBUG_PKT
309                 printk(KERN_DEBUG "%s: transmitter buffer full\n", dev->name);
310 #endif
311         }
312 
313         spin_unlock(&port->lock);
314         return NETDEV_TX_OK;
315 }
316 
317 
318 
319 static int wanxl_attach(struct net_device *dev, unsigned short encoding,
320                         unsigned short parity)
321 {
322         port_t *port = dev_to_port(dev);
323 
324         if (encoding != ENCODING_NRZ &&
325             encoding != ENCODING_NRZI)
326                 return -EINVAL;
327 
328         if (parity != PARITY_NONE &&
329             parity != PARITY_CRC32_PR1_CCITT &&
330             parity != PARITY_CRC16_PR1_CCITT &&
331             parity != PARITY_CRC32_PR0_CCITT &&
332             parity != PARITY_CRC16_PR0_CCITT)
333                 return -EINVAL;
334 
335         get_status(port)->encoding = encoding;
336         get_status(port)->parity = parity;
337         return 0;
338 }
339 
340 
341 
342 static int wanxl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
343 {
344         const size_t size = sizeof(sync_serial_settings);
345         sync_serial_settings line;
346         port_t *port = dev_to_port(dev);
347 
348         if (cmd != SIOCWANDEV)
349                 return hdlc_ioctl(dev, ifr, cmd);
350 
351         switch (ifr->ifr_settings.type) {
352         case IF_GET_IFACE:
353                 ifr->ifr_settings.type = IF_IFACE_SYNC_SERIAL;
354                 if (ifr->ifr_settings.size < size) {
355                         ifr->ifr_settings.size = size; /* data size wanted */
356                         return -ENOBUFS;
357                 }
358                 memset(&line, 0, sizeof(line));
359                 line.clock_type = get_status(port)->clocking;
360                 line.clock_rate = 0;
361                 line.loopback = 0;
362 
363                 if (copy_to_user(ifr->ifr_settings.ifs_ifsu.sync, &line, size))
364                         return -EFAULT;
365                 return 0;
366 
367         case IF_IFACE_SYNC_SERIAL:
368                 if (!capable(CAP_NET_ADMIN))
369                         return -EPERM;
370                 if (dev->flags & IFF_UP)
371                         return -EBUSY;
372 
373                 if (copy_from_user(&line, ifr->ifr_settings.ifs_ifsu.sync,
374                                    size))
375                         return -EFAULT;
376 
377                 if (line.clock_type != CLOCK_EXT &&
378                     line.clock_type != CLOCK_TXFROMRX)
379                         return -EINVAL; /* No such clock setting */
380 
381                 if (line.loopback != 0)
382                         return -EINVAL;
383 
384                 get_status(port)->clocking = line.clock_type;
385                 return 0;
386 
387         default:
388                 return hdlc_ioctl(dev, ifr, cmd);
389         }
390 }
391 
392 
393 
394 static int wanxl_open(struct net_device *dev)
395 {
396         port_t *port = dev_to_port(dev);
397         u8 __iomem *dbr = port->card->plx + PLX_DOORBELL_TO_CARD;
398         unsigned long timeout;
399         int i;
400 
401         if (get_status(port)->open) {
402                 netdev_err(dev, "port already open\n");
403                 return -EIO;
404         }
405         if ((i = hdlc_open(dev)) != 0)
406                 return i;
407 
408         port->tx_in = port->tx_out = 0;
409         for (i = 0; i < TX_BUFFERS; i++)
410                 get_status(port)->tx_descs[i].stat = PACKET_EMPTY;
411         /* signal the card */
412         writel(1 << (DOORBELL_TO_CARD_OPEN_0 + port->node), dbr);
413 
414         timeout = jiffies + HZ;
415         do {
416                 if (get_status(port)->open) {
417                         netif_start_queue(dev);
418                         return 0;
419                 }
420         } while (time_after(timeout, jiffies));
421 
422         netdev_err(dev, "unable to open port\n");
423         /* ask the card to close the port, should it be still alive */
424         writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node), dbr);
425         return -EFAULT;
426 }
427 
428 
429 
430 static int wanxl_close(struct net_device *dev)
431 {
432         port_t *port = dev_to_port(dev);
433         unsigned long timeout;
434         int i;
435 
436         hdlc_close(dev);
437         /* signal the card */
438         writel(1 << (DOORBELL_TO_CARD_CLOSE_0 + port->node),
439                port->card->plx + PLX_DOORBELL_TO_CARD);
440 
441         timeout = jiffies + HZ;
442         do {
443                 if (!get_status(port)->open)
444                         break;
445         } while (time_after(timeout, jiffies));
446 
447         if (get_status(port)->open)
448                 netdev_err(dev, "unable to close port\n");
449 
450         netif_stop_queue(dev);
451 
452         for (i = 0; i < TX_BUFFERS; i++) {
453                 desc_t *desc = &get_status(port)->tx_descs[i];
454 
455                 if (desc->stat != PACKET_EMPTY) {
456                         desc->stat = PACKET_EMPTY;
457                         pci_unmap_single(port->card->pdev, desc->address,
458                                          port->tx_skbs[i]->len,
459                                          PCI_DMA_TODEVICE);
460                         dev_kfree_skb(port->tx_skbs[i]);
461                 }
462         }
463         return 0;
464 }
465 
466 
467 
468 static struct net_device_stats *wanxl_get_stats(struct net_device *dev)
469 {
470         port_t *port = dev_to_port(dev);
471 
472         dev->stats.rx_over_errors = get_status(port)->rx_overruns;
473         dev->stats.rx_frame_errors = get_status(port)->rx_frame_errors;
474         dev->stats.rx_errors = dev->stats.rx_over_errors +
475                 dev->stats.rx_frame_errors;
476         return &dev->stats;
477 }
478 
479 
480 
481 static int wanxl_puts_command(card_t *card, u32 cmd)
482 {
483         unsigned long timeout = jiffies + 5 * HZ;
484 
485         writel(cmd, card->plx + PLX_MAILBOX_1);
486         do {
487                 if (readl(card->plx + PLX_MAILBOX_1) == 0)
488                         return 0;
489 
490                 schedule();
491         }while (time_after(timeout, jiffies));
492 
493         return -1;
494 }
495 
496 
497 
498 static void wanxl_reset(card_t *card)
499 {
500         u32 old_value = readl(card->plx + PLX_CONTROL) & ~PLX_CTL_RESET;
501 
502         writel(0x80, card->plx + PLX_MAILBOX_0);
503         writel(old_value | PLX_CTL_RESET, card->plx + PLX_CONTROL);
504         readl(card->plx + PLX_CONTROL); /* wait for posted write */
505         udelay(1);
506         writel(old_value, card->plx + PLX_CONTROL);
507         readl(card->plx + PLX_CONTROL); /* wait for posted write */
508 }
509 
510 
511 
512 static void wanxl_pci_remove_one(struct pci_dev *pdev)
513 {
514         card_t *card = pci_get_drvdata(pdev);
515         int i;
516 
517         for (i = 0; i < card->n_ports; i++) {
518                 unregister_hdlc_device(card->ports[i].dev);
519                 free_netdev(card->ports[i].dev);
520         }
521 
522         /* unregister and free all host resources */
523         if (card->irq)
524                 free_irq(card->irq, card);
525 
526         wanxl_reset(card);
527 
528         for (i = 0; i < RX_QUEUE_LENGTH; i++)
529                 if (card->rx_skbs[i]) {
530                         pci_unmap_single(card->pdev,
531                                          card->status->rx_descs[i].address,
532                                          BUFFER_LENGTH, PCI_DMA_FROMDEVICE);
533                         dev_kfree_skb(card->rx_skbs[i]);
534                 }
535 
536         if (card->plx)
537                 iounmap(card->plx);
538 
539         if (card->status)
540                 pci_free_consistent(pdev, sizeof(card_status_t),
541                                     card->status, card->status_address);
542 
543         pci_release_regions(pdev);
544         pci_disable_device(pdev);
545         kfree(card);
546 }
547 
548 
549 #include "wanxlfw.inc"
550 
551 static const struct net_device_ops wanxl_ops = {
552         .ndo_open       = wanxl_open,
553         .ndo_stop       = wanxl_close,
554         .ndo_change_mtu = hdlc_change_mtu,
555         .ndo_start_xmit = hdlc_start_xmit,
556         .ndo_do_ioctl   = wanxl_ioctl,
557         .ndo_get_stats  = wanxl_get_stats,
558 };
559 
560 static int wanxl_pci_init_one(struct pci_dev *pdev,
561                               const struct pci_device_id *ent)
562 {
563         card_t *card;
564         u32 ramsize, stat;
565         unsigned long timeout;
566         u32 plx_phy;            /* PLX PCI base address */
567         u32 mem_phy;            /* memory PCI base addr */
568         u8 __iomem *mem;        /* memory virtual base addr */
569         int i, ports, alloc_size;
570 
571 #ifndef MODULE
572         pr_info_once("%s\n", version);
573 #endif
574 
575         i = pci_enable_device(pdev);
576         if (i)
577                 return i;
578 
579         /* QUICC can only access first 256 MB of host RAM directly,
580            but PLX9060 DMA does 32-bits for actual packet data transfers */
581 
582         /* FIXME when PCI/DMA subsystems are fixed.
583            We set both dma_mask and consistent_dma_mask to 28 bits
584            and pray pci_alloc_consistent() will use this info. It should
585            work on most platforms */
586         if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(28)) ||
587             pci_set_dma_mask(pdev, DMA_BIT_MASK(28))) {
588                 pr_err("No usable DMA configuration\n");
589                 return -EIO;
590         }
591 
592         i = pci_request_regions(pdev, "wanXL");
593         if (i) {
594                 pci_disable_device(pdev);
595                 return i;
596         }
597 
598         switch (pdev->device) {
599         case PCI_DEVICE_ID_SBE_WANXL100: ports = 1; break;
600         case PCI_DEVICE_ID_SBE_WANXL200: ports = 2; break;
601         default: ports = 4;
602         }
603 
604         alloc_size = sizeof(card_t) + ports * sizeof(port_t);
605         card = kzalloc(alloc_size, GFP_KERNEL);
606         if (card == NULL) {
607                 pci_release_regions(pdev);
608                 pci_disable_device(pdev);
609                 return -ENOBUFS;
610         }
611 
612         pci_set_drvdata(pdev, card);
613         card->pdev = pdev;
614 
615         card->status = pci_alloc_consistent(pdev, sizeof(card_status_t),
616                                             &card->status_address);
617         if (card->status == NULL) {
618                 wanxl_pci_remove_one(pdev);
619                 return -ENOBUFS;
620         }
621 
622 #ifdef DEBUG_PCI
623         printk(KERN_DEBUG "wanXL %s: pci_alloc_consistent() returned memory"
624                " at 0x%LX\n", pci_name(pdev),
625                (unsigned long long)card->status_address);
626 #endif
627 
628         /* FIXME when PCI/DMA subsystems are fixed.
629            We set both dma_mask and consistent_dma_mask back to 32 bits
630            to indicate the card can do 32-bit DMA addressing */
631         if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) ||
632             pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) {
633                 pr_err("No usable DMA configuration\n");
634                 wanxl_pci_remove_one(pdev);
635                 return -EIO;
636         }
637 
638         /* set up PLX mapping */
639         plx_phy = pci_resource_start(pdev, 0);
640 
641         card->plx = ioremap_nocache(plx_phy, 0x70);
642         if (!card->plx) {
643                 pr_err("ioremap() failed\n");
644                 wanxl_pci_remove_one(pdev);
645                 return -EFAULT;
646         }
647 
648 #if RESET_WHILE_LOADING
649         wanxl_reset(card);
650 #endif
651 
652         timeout = jiffies + 20 * HZ;
653         while ((stat = readl(card->plx + PLX_MAILBOX_0)) != 0) {
654                 if (time_before(timeout, jiffies)) {
655                         pr_warn("%s: timeout waiting for PUTS to complete\n",
656                                 pci_name(pdev));
657                         wanxl_pci_remove_one(pdev);
658                         return -ENODEV;
659                 }
660 
661                 switch(stat & 0xC0) {
662                 case 0x00:      /* hmm - PUTS completed with non-zero code? */
663                 case 0x80:      /* PUTS still testing the hardware */
664                         break;
665 
666                 default:
667                         pr_warn("%s: PUTS test 0x%X failed\n",
668                                 pci_name(pdev), stat & 0x30);
669                         wanxl_pci_remove_one(pdev);
670                         return -ENODEV;
671                 }
672 
673                 schedule();
674         }
675 
676         /* get on-board memory size (PUTS detects no more than 4 MB) */
677         ramsize = readl(card->plx + PLX_MAILBOX_2) & MBX2_MEMSZ_MASK;
678 
679         /* set up on-board RAM mapping */
680         mem_phy = pci_resource_start(pdev, 2);
681 
682 
683         /* sanity check the board's reported memory size */
684         if (ramsize < BUFFERS_ADDR +
685             (TX_BUFFERS + RX_BUFFERS) * BUFFER_LENGTH * ports) {
686                 pr_warn("%s: no enough on-board RAM (%u bytes detected, %u bytes required)\n",
687                         pci_name(pdev), ramsize,
688                         BUFFERS_ADDR +
689                         (TX_BUFFERS + RX_BUFFERS) * BUFFER_LENGTH * ports);
690                 wanxl_pci_remove_one(pdev);
691                 return -ENODEV;
692         }
693 
694         if (wanxl_puts_command(card, MBX1_CMD_BSWAP)) {
695                 pr_warn("%s: unable to Set Byte Swap Mode\n", pci_name(pdev));
696                 wanxl_pci_remove_one(pdev);
697                 return -ENODEV;
698         }
699 
700         for (i = 0; i < RX_QUEUE_LENGTH; i++) {
701                 struct sk_buff *skb = dev_alloc_skb(BUFFER_LENGTH);
702                 card->rx_skbs[i] = skb;
703                 if (skb)
704                         card->status->rx_descs[i].address =
705                                 pci_map_single(card->pdev, skb->data,
706                                                BUFFER_LENGTH,
707                                                PCI_DMA_FROMDEVICE);
708         }
709 
710         mem = ioremap_nocache(mem_phy, PDM_OFFSET + sizeof(firmware));
711         if (!mem) {
712                 pr_err("ioremap() failed\n");
713                 wanxl_pci_remove_one(pdev);
714                 return -EFAULT;
715         }
716 
717         for (i = 0; i < sizeof(firmware); i += 4)
718                 writel(ntohl(*(__be32*)(firmware + i)), mem + PDM_OFFSET + i);
719 
720         for (i = 0; i < ports; i++)
721                 writel(card->status_address +
722                        (void *)&card->status->port_status[i] -
723                        (void *)card->status, mem + PDM_OFFSET + 4 + i * 4);
724         writel(card->status_address, mem + PDM_OFFSET + 20);
725         writel(PDM_OFFSET, mem);
726         iounmap(mem);
727 
728         writel(0, card->plx + PLX_MAILBOX_5);
729 
730         if (wanxl_puts_command(card, MBX1_CMD_ABORTJ)) {
731                 pr_warn("%s: unable to Abort and Jump\n", pci_name(pdev));
732                 wanxl_pci_remove_one(pdev);
733                 return -ENODEV;
734         }
735 
736         stat = 0;
737         timeout = jiffies + 5 * HZ;
738         do {
739                 if ((stat = readl(card->plx + PLX_MAILBOX_5)) != 0)
740                         break;
741                 schedule();
742         }while (time_after(timeout, jiffies));
743 
744         if (!stat) {
745                 pr_warn("%s: timeout while initializing card firmware\n",
746                         pci_name(pdev));
747                 wanxl_pci_remove_one(pdev);
748                 return -ENODEV;
749         }
750 
751 #if DETECT_RAM
752         ramsize = stat;
753 #endif
754 
755         pr_info("%s: at 0x%X, %u KB of RAM at 0x%X, irq %u\n",
756                 pci_name(pdev), plx_phy, ramsize / 1024, mem_phy, pdev->irq);
757 
758         /* Allocate IRQ */
759         if (request_irq(pdev->irq, wanxl_intr, IRQF_SHARED, "wanXL", card)) {
760                 pr_warn("%s: could not allocate IRQ%i\n",
761                         pci_name(pdev), pdev->irq);
762                 wanxl_pci_remove_one(pdev);
763                 return -EBUSY;
764         }
765         card->irq = pdev->irq;
766 
767         for (i = 0; i < ports; i++) {
768                 hdlc_device *hdlc;
769                 port_t *port = &card->ports[i];
770                 struct net_device *dev = alloc_hdlcdev(port);
771                 if (!dev) {
772                         pr_err("%s: unable to allocate memory\n",
773                                pci_name(pdev));
774                         wanxl_pci_remove_one(pdev);
775                         return -ENOMEM;
776                 }
777 
778                 port->dev = dev;
779                 hdlc = dev_to_hdlc(dev);
780                 spin_lock_init(&port->lock);
781                 dev->tx_queue_len = 50;
782                 dev->netdev_ops = &wanxl_ops;
783                 hdlc->attach = wanxl_attach;
784                 hdlc->xmit = wanxl_xmit;
785                 port->card = card;
786                 port->node = i;
787                 get_status(port)->clocking = CLOCK_EXT;
788                 if (register_hdlc_device(dev)) {
789                         pr_err("%s: unable to register hdlc device\n",
790                                pci_name(pdev));
791                         free_netdev(dev);
792                         wanxl_pci_remove_one(pdev);
793                         return -ENOBUFS;
794                 }
795                 card->n_ports++;
796         }
797 
798         pr_info("%s: port", pci_name(pdev));
799         for (i = 0; i < ports; i++)
800                 pr_cont("%s #%i: %s",
801                         i ? "," : "", i, card->ports[i].dev->name);
802         pr_cont("\n");
803 
804         for (i = 0; i < ports; i++)
805                 wanxl_cable_intr(&card->ports[i]); /* get carrier status etc.*/
806 
807         return 0;
808 }
809 
810 static DEFINE_PCI_DEVICE_TABLE(wanxl_pci_tbl) = {
811         { PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_SBE_WANXL100, PCI_ANY_ID,
812           PCI_ANY_ID, 0, 0, 0 },
813         { PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_SBE_WANXL200, PCI_ANY_ID,
814           PCI_ANY_ID, 0, 0, 0 },
815         { PCI_VENDOR_ID_SBE, PCI_DEVICE_ID_SBE_WANXL400, PCI_ANY_ID,
816           PCI_ANY_ID, 0, 0, 0 },
817         { 0, }
818 };
819 
820 
821 static struct pci_driver wanxl_pci_driver = {
822         .name           = "wanXL",
823         .id_table       = wanxl_pci_tbl,
824         .probe          = wanxl_pci_init_one,
825         .remove         = wanxl_pci_remove_one,
826 };
827 
828 
829 static int __init wanxl_init_module(void)
830 {
831 #ifdef MODULE
832         pr_info("%s\n", version);
833 #endif
834         return pci_register_driver(&wanxl_pci_driver);
835 }
836 
837 static void __exit wanxl_cleanup_module(void)
838 {
839         pci_unregister_driver(&wanxl_pci_driver);
840 }
841 
842 
843 MODULE_AUTHOR("Krzysztof Halasa <khc@pm.waw.pl>");
844 MODULE_DESCRIPTION("SBE Inc. wanXL serial port driver");
845 MODULE_LICENSE("GPL v2");
846 MODULE_DEVICE_TABLE(pci, wanxl_pci_tbl);
847 
848 module_init(wanxl_init_module);
849 module_exit(wanxl_cleanup_module);
850 

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