Version:  2.0.40 2.2.26 2.4.37 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1

Linux/drivers/net/vmxnet3/vmxnet3_drv.c

  1 /*
  2  * Linux driver for VMware's vmxnet3 ethernet NIC.
  3  *
  4  * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
  5  *
  6  * This program is free software; you can redistribute it and/or modify it
  7  * under the terms of the GNU General Public License as published by the
  8  * Free Software Foundation; version 2 of the License and no later version.
  9  *
 10  * This program is distributed in the hope that it will be useful, but
 11  * WITHOUT ANY WARRANTY; without even the implied warranty of
 12  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 13  * NON INFRINGEMENT. See the GNU General Public License for more
 14  * details.
 15  *
 16  * You should have received a copy of the GNU General Public License
 17  * along with this program; if not, write to the Free Software
 18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 19  *
 20  * The full GNU General Public License is included in this distribution in
 21  * the file called "COPYING".
 22  *
 23  * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
 24  *
 25  */
 26 
 27 #include <linux/module.h>
 28 #include <net/ip6_checksum.h>
 29 
 30 #include "vmxnet3_int.h"
 31 
 32 char vmxnet3_driver_name[] = "vmxnet3";
 33 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
 34 
 35 /*
 36  * PCI Device ID Table
 37  * Last entry must be all 0s
 38  */
 39 static const struct pci_device_id vmxnet3_pciid_table[] = {
 40         {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
 41         {0}
 42 };
 43 
 44 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
 45 
 46 static int enable_mq = 1;
 47 
 48 static void
 49 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
 50 
 51 /*
 52  *    Enable/Disable the given intr
 53  */
 54 static void
 55 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
 56 {
 57         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
 58 }
 59 
 60 
 61 static void
 62 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
 63 {
 64         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
 65 }
 66 
 67 
 68 /*
 69  *    Enable/Disable all intrs used by the device
 70  */
 71 static void
 72 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
 73 {
 74         int i;
 75 
 76         for (i = 0; i < adapter->intr.num_intrs; i++)
 77                 vmxnet3_enable_intr(adapter, i);
 78         adapter->shared->devRead.intrConf.intrCtrl &=
 79                                         cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
 80 }
 81 
 82 
 83 static void
 84 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
 85 {
 86         int i;
 87 
 88         adapter->shared->devRead.intrConf.intrCtrl |=
 89                                         cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
 90         for (i = 0; i < adapter->intr.num_intrs; i++)
 91                 vmxnet3_disable_intr(adapter, i);
 92 }
 93 
 94 
 95 static void
 96 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
 97 {
 98         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
 99 }
100 
101 
102 static bool
103 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
104 {
105         return tq->stopped;
106 }
107 
108 
109 static void
110 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
111 {
112         tq->stopped = false;
113         netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue);
114 }
115 
116 
117 static void
118 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
119 {
120         tq->stopped = false;
121         netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue));
122 }
123 
124 
125 static void
126 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
127 {
128         tq->stopped = true;
129         tq->num_stop++;
130         netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue));
131 }
132 
133 
134 /*
135  * Check the link state. This may start or stop the tx queue.
136  */
137 static void
138 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
139 {
140         u32 ret;
141         int i;
142         unsigned long flags;
143 
144         spin_lock_irqsave(&adapter->cmd_lock, flags);
145         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
146         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
147         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
148 
149         adapter->link_speed = ret >> 16;
150         if (ret & 1) { /* Link is up. */
151                 netdev_info(adapter->netdev, "NIC Link is Up %d Mbps\n",
152                             adapter->link_speed);
153                 netif_carrier_on(adapter->netdev);
154 
155                 if (affectTxQueue) {
156                         for (i = 0; i < adapter->num_tx_queues; i++)
157                                 vmxnet3_tq_start(&adapter->tx_queue[i],
158                                                  adapter);
159                 }
160         } else {
161                 netdev_info(adapter->netdev, "NIC Link is Down\n");
162                 netif_carrier_off(adapter->netdev);
163 
164                 if (affectTxQueue) {
165                         for (i = 0; i < adapter->num_tx_queues; i++)
166                                 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter);
167                 }
168         }
169 }
170 
171 static void
172 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
173 {
174         int i;
175         unsigned long flags;
176         u32 events = le32_to_cpu(adapter->shared->ecr);
177         if (!events)
178                 return;
179 
180         vmxnet3_ack_events(adapter, events);
181 
182         /* Check if link state has changed */
183         if (events & VMXNET3_ECR_LINK)
184                 vmxnet3_check_link(adapter, true);
185 
186         /* Check if there is an error on xmit/recv queues */
187         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
188                 spin_lock_irqsave(&adapter->cmd_lock, flags);
189                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
190                                        VMXNET3_CMD_GET_QUEUE_STATUS);
191                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
192 
193                 for (i = 0; i < adapter->num_tx_queues; i++)
194                         if (adapter->tqd_start[i].status.stopped)
195                                 dev_err(&adapter->netdev->dev,
196                                         "%s: tq[%d] error 0x%x\n",
197                                         adapter->netdev->name, i, le32_to_cpu(
198                                         adapter->tqd_start[i].status.error));
199                 for (i = 0; i < adapter->num_rx_queues; i++)
200                         if (adapter->rqd_start[i].status.stopped)
201                                 dev_err(&adapter->netdev->dev,
202                                         "%s: rq[%d] error 0x%x\n",
203                                         adapter->netdev->name, i,
204                                         adapter->rqd_start[i].status.error);
205 
206                 schedule_work(&adapter->work);
207         }
208 }
209 
210 #ifdef __BIG_ENDIAN_BITFIELD
211 /*
212  * The device expects the bitfields in shared structures to be written in
213  * little endian. When CPU is big endian, the following routines are used to
214  * correctly read and write into ABI.
215  * The general technique used here is : double word bitfields are defined in
216  * opposite order for big endian architecture. Then before reading them in
217  * driver the complete double word is translated using le32_to_cpu. Similarly
218  * After the driver writes into bitfields, cpu_to_le32 is used to translate the
219  * double words into required format.
220  * In order to avoid touching bits in shared structure more than once, temporary
221  * descriptors are used. These are passed as srcDesc to following functions.
222  */
223 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
224                                 struct Vmxnet3_RxDesc *dstDesc)
225 {
226         u32 *src = (u32 *)srcDesc + 2;
227         u32 *dst = (u32 *)dstDesc + 2;
228         dstDesc->addr = le64_to_cpu(srcDesc->addr);
229         *dst = le32_to_cpu(*src);
230         dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
231 }
232 
233 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
234                                struct Vmxnet3_TxDesc *dstDesc)
235 {
236         int i;
237         u32 *src = (u32 *)(srcDesc + 1);
238         u32 *dst = (u32 *)(dstDesc + 1);
239 
240         /* Working backwards so that the gen bit is set at the end. */
241         for (i = 2; i > 0; i--) {
242                 src--;
243                 dst--;
244                 *dst = cpu_to_le32(*src);
245         }
246 }
247 
248 
249 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
250                                 struct Vmxnet3_RxCompDesc *dstDesc)
251 {
252         int i = 0;
253         u32 *src = (u32 *)srcDesc;
254         u32 *dst = (u32 *)dstDesc;
255         for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
256                 *dst = le32_to_cpu(*src);
257                 src++;
258                 dst++;
259         }
260 }
261 
262 
263 /* Used to read bitfield values from double words. */
264 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
265 {
266         u32 temp = le32_to_cpu(*bitfield);
267         u32 mask = ((1 << size) - 1) << pos;
268         temp &= mask;
269         temp >>= pos;
270         return temp;
271 }
272 
273 
274 
275 #endif  /* __BIG_ENDIAN_BITFIELD */
276 
277 #ifdef __BIG_ENDIAN_BITFIELD
278 
279 #   define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
280                         txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
281                         VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
282 #   define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
283                         txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
284                         VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
285 #   define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
286                         VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
287                         VMXNET3_TCD_GEN_SIZE)
288 #   define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
289                         VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
290 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
291                         (dstrcd) = (tmp); \
292                         vmxnet3_RxCompToCPU((rcd), (tmp)); \
293                 } while (0)
294 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
295                         (dstrxd) = (tmp); \
296                         vmxnet3_RxDescToCPU((rxd), (tmp)); \
297                 } while (0)
298 
299 #else
300 
301 #   define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
302 #   define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
303 #   define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
304 #   define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
305 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
306 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
307 
308 #endif /* __BIG_ENDIAN_BITFIELD  */
309 
310 
311 static void
312 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
313                      struct pci_dev *pdev)
314 {
315         if (tbi->map_type == VMXNET3_MAP_SINGLE)
316                 dma_unmap_single(&pdev->dev, tbi->dma_addr, tbi->len,
317                                  PCI_DMA_TODEVICE);
318         else if (tbi->map_type == VMXNET3_MAP_PAGE)
319                 dma_unmap_page(&pdev->dev, tbi->dma_addr, tbi->len,
320                                PCI_DMA_TODEVICE);
321         else
322                 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
323 
324         tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
325 }
326 
327 
328 static int
329 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
330                   struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
331 {
332         struct sk_buff *skb;
333         int entries = 0;
334 
335         /* no out of order completion */
336         BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
337         BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
338 
339         skb = tq->buf_info[eop_idx].skb;
340         BUG_ON(skb == NULL);
341         tq->buf_info[eop_idx].skb = NULL;
342 
343         VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
344 
345         while (tq->tx_ring.next2comp != eop_idx) {
346                 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
347                                      pdev);
348 
349                 /* update next2comp w/o tx_lock. Since we are marking more,
350                  * instead of less, tx ring entries avail, the worst case is
351                  * that the tx routine incorrectly re-queues a pkt due to
352                  * insufficient tx ring entries.
353                  */
354                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
355                 entries++;
356         }
357 
358         dev_kfree_skb_any(skb);
359         return entries;
360 }
361 
362 
363 static int
364 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
365                         struct vmxnet3_adapter *adapter)
366 {
367         int completed = 0;
368         union Vmxnet3_GenericDesc *gdesc;
369 
370         gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
371         while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
372                 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
373                                                &gdesc->tcd), tq, adapter->pdev,
374                                                adapter);
375 
376                 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
377                 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
378         }
379 
380         if (completed) {
381                 spin_lock(&tq->tx_lock);
382                 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
383                              vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
384                              VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
385                              netif_carrier_ok(adapter->netdev))) {
386                         vmxnet3_tq_wake(tq, adapter);
387                 }
388                 spin_unlock(&tq->tx_lock);
389         }
390         return completed;
391 }
392 
393 
394 static void
395 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
396                    struct vmxnet3_adapter *adapter)
397 {
398         int i;
399 
400         while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
401                 struct vmxnet3_tx_buf_info *tbi;
402 
403                 tbi = tq->buf_info + tq->tx_ring.next2comp;
404 
405                 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
406                 if (tbi->skb) {
407                         dev_kfree_skb_any(tbi->skb);
408                         tbi->skb = NULL;
409                 }
410                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
411         }
412 
413         /* sanity check, verify all buffers are indeed unmapped and freed */
414         for (i = 0; i < tq->tx_ring.size; i++) {
415                 BUG_ON(tq->buf_info[i].skb != NULL ||
416                        tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
417         }
418 
419         tq->tx_ring.gen = VMXNET3_INIT_GEN;
420         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
421 
422         tq->comp_ring.gen = VMXNET3_INIT_GEN;
423         tq->comp_ring.next2proc = 0;
424 }
425 
426 
427 static void
428 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
429                    struct vmxnet3_adapter *adapter)
430 {
431         if (tq->tx_ring.base) {
432                 dma_free_coherent(&adapter->pdev->dev, tq->tx_ring.size *
433                                   sizeof(struct Vmxnet3_TxDesc),
434                                   tq->tx_ring.base, tq->tx_ring.basePA);
435                 tq->tx_ring.base = NULL;
436         }
437         if (tq->data_ring.base) {
438                 dma_free_coherent(&adapter->pdev->dev, tq->data_ring.size *
439                                   sizeof(struct Vmxnet3_TxDataDesc),
440                                   tq->data_ring.base, tq->data_ring.basePA);
441                 tq->data_ring.base = NULL;
442         }
443         if (tq->comp_ring.base) {
444                 dma_free_coherent(&adapter->pdev->dev, tq->comp_ring.size *
445                                   sizeof(struct Vmxnet3_TxCompDesc),
446                                   tq->comp_ring.base, tq->comp_ring.basePA);
447                 tq->comp_ring.base = NULL;
448         }
449         if (tq->buf_info) {
450                 dma_free_coherent(&adapter->pdev->dev,
451                                   tq->tx_ring.size * sizeof(tq->buf_info[0]),
452                                   tq->buf_info, tq->buf_info_pa);
453                 tq->buf_info = NULL;
454         }
455 }
456 
457 
458 /* Destroy all tx queues */
459 void
460 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter)
461 {
462         int i;
463 
464         for (i = 0; i < adapter->num_tx_queues; i++)
465                 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter);
466 }
467 
468 
469 static void
470 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
471                 struct vmxnet3_adapter *adapter)
472 {
473         int i;
474 
475         /* reset the tx ring contents to 0 and reset the tx ring states */
476         memset(tq->tx_ring.base, 0, tq->tx_ring.size *
477                sizeof(struct Vmxnet3_TxDesc));
478         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
479         tq->tx_ring.gen = VMXNET3_INIT_GEN;
480 
481         memset(tq->data_ring.base, 0, tq->data_ring.size *
482                sizeof(struct Vmxnet3_TxDataDesc));
483 
484         /* reset the tx comp ring contents to 0 and reset comp ring states */
485         memset(tq->comp_ring.base, 0, tq->comp_ring.size *
486                sizeof(struct Vmxnet3_TxCompDesc));
487         tq->comp_ring.next2proc = 0;
488         tq->comp_ring.gen = VMXNET3_INIT_GEN;
489 
490         /* reset the bookkeeping data */
491         memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
492         for (i = 0; i < tq->tx_ring.size; i++)
493                 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
494 
495         /* stats are not reset */
496 }
497 
498 
499 static int
500 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
501                   struct vmxnet3_adapter *adapter)
502 {
503         size_t sz;
504 
505         BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
506                tq->comp_ring.base || tq->buf_info);
507 
508         tq->tx_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
509                         tq->tx_ring.size * sizeof(struct Vmxnet3_TxDesc),
510                         &tq->tx_ring.basePA, GFP_KERNEL);
511         if (!tq->tx_ring.base) {
512                 netdev_err(adapter->netdev, "failed to allocate tx ring\n");
513                 goto err;
514         }
515 
516         tq->data_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
517                         tq->data_ring.size * sizeof(struct Vmxnet3_TxDataDesc),
518                         &tq->data_ring.basePA, GFP_KERNEL);
519         if (!tq->data_ring.base) {
520                 netdev_err(adapter->netdev, "failed to allocate data ring\n");
521                 goto err;
522         }
523 
524         tq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
525                         tq->comp_ring.size * sizeof(struct Vmxnet3_TxCompDesc),
526                         &tq->comp_ring.basePA, GFP_KERNEL);
527         if (!tq->comp_ring.base) {
528                 netdev_err(adapter->netdev, "failed to allocate tx comp ring\n");
529                 goto err;
530         }
531 
532         sz = tq->tx_ring.size * sizeof(tq->buf_info[0]);
533         tq->buf_info = dma_zalloc_coherent(&adapter->pdev->dev, sz,
534                                            &tq->buf_info_pa, GFP_KERNEL);
535         if (!tq->buf_info)
536                 goto err;
537 
538         return 0;
539 
540 err:
541         vmxnet3_tq_destroy(tq, adapter);
542         return -ENOMEM;
543 }
544 
545 static void
546 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter)
547 {
548         int i;
549 
550         for (i = 0; i < adapter->num_tx_queues; i++)
551                 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter);
552 }
553 
554 /*
555  *    starting from ring->next2fill, allocate rx buffers for the given ring
556  *    of the rx queue and update the rx desc. stop after @num_to_alloc buffers
557  *    are allocated or allocation fails
558  */
559 
560 static int
561 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
562                         int num_to_alloc, struct vmxnet3_adapter *adapter)
563 {
564         int num_allocated = 0;
565         struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
566         struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
567         u32 val;
568 
569         while (num_allocated <= num_to_alloc) {
570                 struct vmxnet3_rx_buf_info *rbi;
571                 union Vmxnet3_GenericDesc *gd;
572 
573                 rbi = rbi_base + ring->next2fill;
574                 gd = ring->base + ring->next2fill;
575 
576                 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
577                         if (rbi->skb == NULL) {
578                                 rbi->skb = __netdev_alloc_skb_ip_align(adapter->netdev,
579                                                                        rbi->len,
580                                                                        GFP_KERNEL);
581                                 if (unlikely(rbi->skb == NULL)) {
582                                         rq->stats.rx_buf_alloc_failure++;
583                                         break;
584                                 }
585 
586                                 rbi->dma_addr = dma_map_single(
587                                                 &adapter->pdev->dev,
588                                                 rbi->skb->data, rbi->len,
589                                                 PCI_DMA_FROMDEVICE);
590                         } else {
591                                 /* rx buffer skipped by the device */
592                         }
593                         val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
594                 } else {
595                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
596                                rbi->len  != PAGE_SIZE);
597 
598                         if (rbi->page == NULL) {
599                                 rbi->page = alloc_page(GFP_ATOMIC);
600                                 if (unlikely(rbi->page == NULL)) {
601                                         rq->stats.rx_buf_alloc_failure++;
602                                         break;
603                                 }
604                                 rbi->dma_addr = dma_map_page(
605                                                 &adapter->pdev->dev,
606                                                 rbi->page, 0, PAGE_SIZE,
607                                                 PCI_DMA_FROMDEVICE);
608                         } else {
609                                 /* rx buffers skipped by the device */
610                         }
611                         val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
612                 }
613 
614                 BUG_ON(rbi->dma_addr == 0);
615                 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
616                 gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT)
617                                            | val | rbi->len);
618 
619                 /* Fill the last buffer but dont mark it ready, or else the
620                  * device will think that the queue is full */
621                 if (num_allocated == num_to_alloc)
622                         break;
623 
624                 gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT);
625                 num_allocated++;
626                 vmxnet3_cmd_ring_adv_next2fill(ring);
627         }
628 
629         netdev_dbg(adapter->netdev,
630                 "alloc_rx_buf: %d allocated, next2fill %u, next2comp %u\n",
631                 num_allocated, ring->next2fill, ring->next2comp);
632 
633         /* so that the device can distinguish a full ring and an empty ring */
634         BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
635 
636         return num_allocated;
637 }
638 
639 
640 static void
641 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
642                     struct vmxnet3_rx_buf_info *rbi)
643 {
644         struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
645                 skb_shinfo(skb)->nr_frags;
646 
647         BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
648 
649         __skb_frag_set_page(frag, rbi->page);
650         frag->page_offset = 0;
651         skb_frag_size_set(frag, rcd->len);
652         skb->data_len += rcd->len;
653         skb->truesize += PAGE_SIZE;
654         skb_shinfo(skb)->nr_frags++;
655 }
656 
657 
658 static void
659 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
660                 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
661                 struct vmxnet3_adapter *adapter)
662 {
663         u32 dw2, len;
664         unsigned long buf_offset;
665         int i;
666         union Vmxnet3_GenericDesc *gdesc;
667         struct vmxnet3_tx_buf_info *tbi = NULL;
668 
669         BUG_ON(ctx->copy_size > skb_headlen(skb));
670 
671         /* use the previous gen bit for the SOP desc */
672         dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
673 
674         ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
675         gdesc = ctx->sop_txd; /* both loops below can be skipped */
676 
677         /* no need to map the buffer if headers are copied */
678         if (ctx->copy_size) {
679                 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
680                                         tq->tx_ring.next2fill *
681                                         sizeof(struct Vmxnet3_TxDataDesc));
682                 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
683                 ctx->sop_txd->dword[3] = 0;
684 
685                 tbi = tq->buf_info + tq->tx_ring.next2fill;
686                 tbi->map_type = VMXNET3_MAP_NONE;
687 
688                 netdev_dbg(adapter->netdev,
689                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
690                         tq->tx_ring.next2fill,
691                         le64_to_cpu(ctx->sop_txd->txd.addr),
692                         ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
693                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
694 
695                 /* use the right gen for non-SOP desc */
696                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
697         }
698 
699         /* linear part can use multiple tx desc if it's big */
700         len = skb_headlen(skb) - ctx->copy_size;
701         buf_offset = ctx->copy_size;
702         while (len) {
703                 u32 buf_size;
704 
705                 if (len < VMXNET3_MAX_TX_BUF_SIZE) {
706                         buf_size = len;
707                         dw2 |= len;
708                 } else {
709                         buf_size = VMXNET3_MAX_TX_BUF_SIZE;
710                         /* spec says that for TxDesc.len, 0 == 2^14 */
711                 }
712 
713                 tbi = tq->buf_info + tq->tx_ring.next2fill;
714                 tbi->map_type = VMXNET3_MAP_SINGLE;
715                 tbi->dma_addr = dma_map_single(&adapter->pdev->dev,
716                                 skb->data + buf_offset, buf_size,
717                                 PCI_DMA_TODEVICE);
718 
719                 tbi->len = buf_size;
720 
721                 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
722                 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
723 
724                 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
725                 gdesc->dword[2] = cpu_to_le32(dw2);
726                 gdesc->dword[3] = 0;
727 
728                 netdev_dbg(adapter->netdev,
729                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
730                         tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
731                         le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
732                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
733                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
734 
735                 len -= buf_size;
736                 buf_offset += buf_size;
737         }
738 
739         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
740                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
741                 u32 buf_size;
742 
743                 buf_offset = 0;
744                 len = skb_frag_size(frag);
745                 while (len) {
746                         tbi = tq->buf_info + tq->tx_ring.next2fill;
747                         if (len < VMXNET3_MAX_TX_BUF_SIZE) {
748                                 buf_size = len;
749                                 dw2 |= len;
750                         } else {
751                                 buf_size = VMXNET3_MAX_TX_BUF_SIZE;
752                                 /* spec says that for TxDesc.len, 0 == 2^14 */
753                         }
754                         tbi->map_type = VMXNET3_MAP_PAGE;
755                         tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag,
756                                                          buf_offset, buf_size,
757                                                          DMA_TO_DEVICE);
758 
759                         tbi->len = buf_size;
760 
761                         gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
762                         BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
763 
764                         gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
765                         gdesc->dword[2] = cpu_to_le32(dw2);
766                         gdesc->dword[3] = 0;
767 
768                         netdev_dbg(adapter->netdev,
769                                 "txd[%u]: 0x%llx %u %u\n",
770                                 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
771                                 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
772                         vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
773                         dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
774 
775                         len -= buf_size;
776                         buf_offset += buf_size;
777                 }
778         }
779 
780         ctx->eop_txd = gdesc;
781 
782         /* set the last buf_info for the pkt */
783         tbi->skb = skb;
784         tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
785 }
786 
787 
788 /* Init all tx queues */
789 static void
790 vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter)
791 {
792         int i;
793 
794         for (i = 0; i < adapter->num_tx_queues; i++)
795                 vmxnet3_tq_init(&adapter->tx_queue[i], adapter);
796 }
797 
798 
799 /*
800  *    parse and copy relevant protocol headers:
801  *      For a tso pkt, relevant headers are L2/3/4 including options
802  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
803  *      if it's a TCP/UDP pkt
804  *
805  * Returns:
806  *    -1:  error happens during parsing
807  *     0:  protocol headers parsed, but too big to be copied
808  *     1:  protocol headers parsed and copied
809  *
810  * Other effects:
811  *    1. related *ctx fields are updated.
812  *    2. ctx->copy_size is # of bytes copied
813  *    3. the portion copied is guaranteed to be in the linear part
814  *
815  */
816 static int
817 vmxnet3_parse_and_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
818                            struct vmxnet3_tx_ctx *ctx,
819                            struct vmxnet3_adapter *adapter)
820 {
821         struct Vmxnet3_TxDataDesc *tdd;
822         u8 protocol = 0;
823 
824         if (ctx->mss) { /* TSO */
825                 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
826                 ctx->l4_hdr_size = tcp_hdrlen(skb);
827                 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
828         } else {
829                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
830                         ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
831 
832                         if (ctx->ipv4) {
833                                 const struct iphdr *iph = ip_hdr(skb);
834 
835                                 protocol = iph->protocol;
836                         } else if (ctx->ipv6) {
837                                 const struct ipv6hdr *ipv6h = ipv6_hdr(skb);
838 
839                                 protocol = ipv6h->nexthdr;
840                         }
841 
842                         switch (protocol) {
843                         case IPPROTO_TCP:
844                                 ctx->l4_hdr_size = tcp_hdrlen(skb);
845                                 break;
846                         case IPPROTO_UDP:
847                                 ctx->l4_hdr_size = sizeof(struct udphdr);
848                                 break;
849                         default:
850                                 ctx->l4_hdr_size = 0;
851                                 break;
852                         }
853 
854                         ctx->copy_size = min(ctx->eth_ip_hdr_size +
855                                          ctx->l4_hdr_size, skb->len);
856                 } else {
857                         ctx->eth_ip_hdr_size = 0;
858                         ctx->l4_hdr_size = 0;
859                         /* copy as much as allowed */
860                         ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
861                                              , skb_headlen(skb));
862                 }
863 
864                 /* make sure headers are accessible directly */
865                 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
866                         goto err;
867         }
868 
869         if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
870                 tq->stats.oversized_hdr++;
871                 ctx->copy_size = 0;
872                 return 0;
873         }
874 
875         tdd = tq->data_ring.base + tq->tx_ring.next2fill;
876 
877         memcpy(tdd->data, skb->data, ctx->copy_size);
878         netdev_dbg(adapter->netdev,
879                 "copy %u bytes to dataRing[%u]\n",
880                 ctx->copy_size, tq->tx_ring.next2fill);
881         return 1;
882 
883 err:
884         return -1;
885 }
886 
887 
888 static void
889 vmxnet3_prepare_tso(struct sk_buff *skb,
890                     struct vmxnet3_tx_ctx *ctx)
891 {
892         struct tcphdr *tcph = tcp_hdr(skb);
893 
894         if (ctx->ipv4) {
895                 struct iphdr *iph = ip_hdr(skb);
896 
897                 iph->check = 0;
898                 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
899                                                  IPPROTO_TCP, 0);
900         } else if (ctx->ipv6) {
901                 struct ipv6hdr *iph = ipv6_hdr(skb);
902 
903                 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
904                                                IPPROTO_TCP, 0);
905         }
906 }
907 
908 static int txd_estimate(const struct sk_buff *skb)
909 {
910         int count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
911         int i;
912 
913         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
914                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
915 
916                 count += VMXNET3_TXD_NEEDED(skb_frag_size(frag));
917         }
918         return count;
919 }
920 
921 /*
922  * Transmits a pkt thru a given tq
923  * Returns:
924  *    NETDEV_TX_OK:      descriptors are setup successfully
925  *    NETDEV_TX_OK:      error occurred, the pkt is dropped
926  *    NETDEV_TX_BUSY:    tx ring is full, queue is stopped
927  *
928  * Side-effects:
929  *    1. tx ring may be changed
930  *    2. tq stats may be updated accordingly
931  *    3. shared->txNumDeferred may be updated
932  */
933 
934 static int
935 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
936                 struct vmxnet3_adapter *adapter, struct net_device *netdev)
937 {
938         int ret;
939         u32 count;
940         unsigned long flags;
941         struct vmxnet3_tx_ctx ctx;
942         union Vmxnet3_GenericDesc *gdesc;
943 #ifdef __BIG_ENDIAN_BITFIELD
944         /* Use temporary descriptor to avoid touching bits multiple times */
945         union Vmxnet3_GenericDesc tempTxDesc;
946 #endif
947 
948         count = txd_estimate(skb);
949 
950         ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP));
951         ctx.ipv6 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IPV6));
952 
953         ctx.mss = skb_shinfo(skb)->gso_size;
954         if (ctx.mss) {
955                 if (skb_header_cloned(skb)) {
956                         if (unlikely(pskb_expand_head(skb, 0, 0,
957                                                       GFP_ATOMIC) != 0)) {
958                                 tq->stats.drop_tso++;
959                                 goto drop_pkt;
960                         }
961                         tq->stats.copy_skb_header++;
962                 }
963                 vmxnet3_prepare_tso(skb, &ctx);
964         } else {
965                 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
966 
967                         /* non-tso pkts must not use more than
968                          * VMXNET3_MAX_TXD_PER_PKT entries
969                          */
970                         if (skb_linearize(skb) != 0) {
971                                 tq->stats.drop_too_many_frags++;
972                                 goto drop_pkt;
973                         }
974                         tq->stats.linearized++;
975 
976                         /* recalculate the # of descriptors to use */
977                         count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
978                 }
979         }
980 
981         spin_lock_irqsave(&tq->tx_lock, flags);
982 
983         if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
984                 tq->stats.tx_ring_full++;
985                 netdev_dbg(adapter->netdev,
986                         "tx queue stopped on %s, next2comp %u"
987                         " next2fill %u\n", adapter->netdev->name,
988                         tq->tx_ring.next2comp, tq->tx_ring.next2fill);
989 
990                 vmxnet3_tq_stop(tq, adapter);
991                 spin_unlock_irqrestore(&tq->tx_lock, flags);
992                 return NETDEV_TX_BUSY;
993         }
994 
995 
996         ret = vmxnet3_parse_and_copy_hdr(skb, tq, &ctx, adapter);
997         if (ret >= 0) {
998                 BUG_ON(ret <= 0 && ctx.copy_size != 0);
999                 /* hdrs parsed, check against other limits */
1000                 if (ctx.mss) {
1001                         if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
1002                                      VMXNET3_MAX_TX_BUF_SIZE)) {
1003                                 goto hdr_too_big;
1004                         }
1005                 } else {
1006                         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1007                                 if (unlikely(ctx.eth_ip_hdr_size +
1008                                              skb->csum_offset >
1009                                              VMXNET3_MAX_CSUM_OFFSET)) {
1010                                         goto hdr_too_big;
1011                                 }
1012                         }
1013                 }
1014         } else {
1015                 tq->stats.drop_hdr_inspect_err++;
1016                 goto unlock_drop_pkt;
1017         }
1018 
1019         /* fill tx descs related to addr & len */
1020         vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter);
1021 
1022         /* setup the EOP desc */
1023         ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
1024 
1025         /* setup the SOP desc */
1026 #ifdef __BIG_ENDIAN_BITFIELD
1027         gdesc = &tempTxDesc;
1028         gdesc->dword[2] = ctx.sop_txd->dword[2];
1029         gdesc->dword[3] = ctx.sop_txd->dword[3];
1030 #else
1031         gdesc = ctx.sop_txd;
1032 #endif
1033         if (ctx.mss) {
1034                 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
1035                 gdesc->txd.om = VMXNET3_OM_TSO;
1036                 gdesc->txd.msscof = ctx.mss;
1037                 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
1038                              gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
1039         } else {
1040                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1041                         gdesc->txd.hlen = ctx.eth_ip_hdr_size;
1042                         gdesc->txd.om = VMXNET3_OM_CSUM;
1043                         gdesc->txd.msscof = ctx.eth_ip_hdr_size +
1044                                             skb->csum_offset;
1045                 } else {
1046                         gdesc->txd.om = 0;
1047                         gdesc->txd.msscof = 0;
1048                 }
1049                 le32_add_cpu(&tq->shared->txNumDeferred, 1);
1050         }
1051 
1052         if (skb_vlan_tag_present(skb)) {
1053                 gdesc->txd.ti = 1;
1054                 gdesc->txd.tci = skb_vlan_tag_get(skb);
1055         }
1056 
1057         /* finally flips the GEN bit of the SOP desc. */
1058         gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
1059                                                   VMXNET3_TXD_GEN);
1060 #ifdef __BIG_ENDIAN_BITFIELD
1061         /* Finished updating in bitfields of Tx Desc, so write them in original
1062          * place.
1063          */
1064         vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
1065                            (struct Vmxnet3_TxDesc *)ctx.sop_txd);
1066         gdesc = ctx.sop_txd;
1067 #endif
1068         netdev_dbg(adapter->netdev,
1069                 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
1070                 (u32)(ctx.sop_txd -
1071                 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
1072                 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
1073 
1074         spin_unlock_irqrestore(&tq->tx_lock, flags);
1075 
1076         if (le32_to_cpu(tq->shared->txNumDeferred) >=
1077                                         le32_to_cpu(tq->shared->txThreshold)) {
1078                 tq->shared->txNumDeferred = 0;
1079                 VMXNET3_WRITE_BAR0_REG(adapter,
1080                                        VMXNET3_REG_TXPROD + tq->qid * 8,
1081                                        tq->tx_ring.next2fill);
1082         }
1083 
1084         return NETDEV_TX_OK;
1085 
1086 hdr_too_big:
1087         tq->stats.drop_oversized_hdr++;
1088 unlock_drop_pkt:
1089         spin_unlock_irqrestore(&tq->tx_lock, flags);
1090 drop_pkt:
1091         tq->stats.drop_total++;
1092         dev_kfree_skb_any(skb);
1093         return NETDEV_TX_OK;
1094 }
1095 
1096 
1097 static netdev_tx_t
1098 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1099 {
1100         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1101 
1102         BUG_ON(skb->queue_mapping > adapter->num_tx_queues);
1103         return vmxnet3_tq_xmit(skb,
1104                                &adapter->tx_queue[skb->queue_mapping],
1105                                adapter, netdev);
1106 }
1107 
1108 
1109 static void
1110 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1111                 struct sk_buff *skb,
1112                 union Vmxnet3_GenericDesc *gdesc)
1113 {
1114         if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) {
1115                 /* typical case: TCP/UDP over IP and both csums are correct */
1116                 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) ==
1117                                                         VMXNET3_RCD_CSUM_OK) {
1118                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1119                         BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1120                         BUG_ON(!(gdesc->rcd.v4  || gdesc->rcd.v6));
1121                         BUG_ON(gdesc->rcd.frg);
1122                 } else {
1123                         if (gdesc->rcd.csum) {
1124                                 skb->csum = htons(gdesc->rcd.csum);
1125                                 skb->ip_summed = CHECKSUM_PARTIAL;
1126                         } else {
1127                                 skb_checksum_none_assert(skb);
1128                         }
1129                 }
1130         } else {
1131                 skb_checksum_none_assert(skb);
1132         }
1133 }
1134 
1135 
1136 static void
1137 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1138                  struct vmxnet3_rx_ctx *ctx,  struct vmxnet3_adapter *adapter)
1139 {
1140         rq->stats.drop_err++;
1141         if (!rcd->fcs)
1142                 rq->stats.drop_fcs++;
1143 
1144         rq->stats.drop_total++;
1145 
1146         /*
1147          * We do not unmap and chain the rx buffer to the skb.
1148          * We basically pretend this buffer is not used and will be recycled
1149          * by vmxnet3_rq_alloc_rx_buf()
1150          */
1151 
1152         /*
1153          * ctx->skb may be NULL if this is the first and the only one
1154          * desc for the pkt
1155          */
1156         if (ctx->skb)
1157                 dev_kfree_skb_irq(ctx->skb);
1158 
1159         ctx->skb = NULL;
1160 }
1161 
1162 
1163 static int
1164 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1165                        struct vmxnet3_adapter *adapter, int quota)
1166 {
1167         static const u32 rxprod_reg[2] = {
1168                 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2
1169         };
1170         u32 num_rxd = 0;
1171         bool skip_page_frags = false;
1172         struct Vmxnet3_RxCompDesc *rcd;
1173         struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1174 #ifdef __BIG_ENDIAN_BITFIELD
1175         struct Vmxnet3_RxDesc rxCmdDesc;
1176         struct Vmxnet3_RxCompDesc rxComp;
1177 #endif
1178         vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1179                           &rxComp);
1180         while (rcd->gen == rq->comp_ring.gen) {
1181                 struct vmxnet3_rx_buf_info *rbi;
1182                 struct sk_buff *skb, *new_skb = NULL;
1183                 struct page *new_page = NULL;
1184                 int num_to_alloc;
1185                 struct Vmxnet3_RxDesc *rxd;
1186                 u32 idx, ring_idx;
1187                 struct vmxnet3_cmd_ring *ring = NULL;
1188                 if (num_rxd >= quota) {
1189                         /* we may stop even before we see the EOP desc of
1190                          * the current pkt
1191                          */
1192                         break;
1193                 }
1194                 num_rxd++;
1195                 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2);
1196                 idx = rcd->rxdIdx;
1197                 ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1;
1198                 ring = rq->rx_ring + ring_idx;
1199                 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1200                                   &rxCmdDesc);
1201                 rbi = rq->buf_info[ring_idx] + idx;
1202 
1203                 BUG_ON(rxd->addr != rbi->dma_addr ||
1204                        rxd->len != rbi->len);
1205 
1206                 if (unlikely(rcd->eop && rcd->err)) {
1207                         vmxnet3_rx_error(rq, rcd, ctx, adapter);
1208                         goto rcd_done;
1209                 }
1210 
1211                 if (rcd->sop) { /* first buf of the pkt */
1212                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1213                                rcd->rqID != rq->qid);
1214 
1215                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1216                         BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1217 
1218                         if (unlikely(rcd->len == 0)) {
1219                                 /* Pretend the rx buffer is skipped. */
1220                                 BUG_ON(!(rcd->sop && rcd->eop));
1221                                 netdev_dbg(adapter->netdev,
1222                                         "rxRing[%u][%u] 0 length\n",
1223                                         ring_idx, idx);
1224                                 goto rcd_done;
1225                         }
1226 
1227                         skip_page_frags = false;
1228                         ctx->skb = rbi->skb;
1229                         new_skb = netdev_alloc_skb_ip_align(adapter->netdev,
1230                                                             rbi->len);
1231                         if (new_skb == NULL) {
1232                                 /* Skb allocation failed, do not handover this
1233                                  * skb to stack. Reuse it. Drop the existing pkt
1234                                  */
1235                                 rq->stats.rx_buf_alloc_failure++;
1236                                 ctx->skb = NULL;
1237                                 rq->stats.drop_total++;
1238                                 skip_page_frags = true;
1239                                 goto rcd_done;
1240                         }
1241 
1242                         dma_unmap_single(&adapter->pdev->dev, rbi->dma_addr,
1243                                          rbi->len,
1244                                          PCI_DMA_FROMDEVICE);
1245 
1246 #ifdef VMXNET3_RSS
1247                         if (rcd->rssType != VMXNET3_RCD_RSS_TYPE_NONE &&
1248                             (adapter->netdev->features & NETIF_F_RXHASH))
1249                                 skb_set_hash(ctx->skb,
1250                                              le32_to_cpu(rcd->rssHash),
1251                                              PKT_HASH_TYPE_L3);
1252 #endif
1253                         skb_put(ctx->skb, rcd->len);
1254 
1255                         /* Immediate refill */
1256                         rbi->skb = new_skb;
1257                         rbi->dma_addr = dma_map_single(&adapter->pdev->dev,
1258                                                        rbi->skb->data, rbi->len,
1259                                                        PCI_DMA_FROMDEVICE);
1260                         rxd->addr = cpu_to_le64(rbi->dma_addr);
1261                         rxd->len = rbi->len;
1262 
1263                 } else {
1264                         BUG_ON(ctx->skb == NULL && !skip_page_frags);
1265 
1266                         /* non SOP buffer must be type 1 in most cases */
1267                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE);
1268                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1269 
1270                         /* If an sop buffer was dropped, skip all
1271                          * following non-sop fragments. They will be reused.
1272                          */
1273                         if (skip_page_frags)
1274                                 goto rcd_done;
1275 
1276                         new_page = alloc_page(GFP_ATOMIC);
1277                         if (unlikely(new_page == NULL)) {
1278                                 /* Replacement page frag could not be allocated.
1279                                  * Reuse this page. Drop the pkt and free the
1280                                  * skb which contained this page as a frag. Skip
1281                                  * processing all the following non-sop frags.
1282                                  */
1283                                 rq->stats.rx_buf_alloc_failure++;
1284                                 dev_kfree_skb(ctx->skb);
1285                                 ctx->skb = NULL;
1286                                 skip_page_frags = true;
1287                                 goto rcd_done;
1288                         }
1289 
1290                         if (rcd->len) {
1291                                 dma_unmap_page(&adapter->pdev->dev,
1292                                                rbi->dma_addr, rbi->len,
1293                                                PCI_DMA_FROMDEVICE);
1294 
1295                                 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1296                         }
1297 
1298                         /* Immediate refill */
1299                         rbi->page = new_page;
1300                         rbi->dma_addr = dma_map_page(&adapter->pdev->dev,
1301                                                      rbi->page,
1302                                                      0, PAGE_SIZE,
1303                                                      PCI_DMA_FROMDEVICE);
1304                         rxd->addr = cpu_to_le64(rbi->dma_addr);
1305                         rxd->len = rbi->len;
1306                 }
1307 
1308 
1309                 skb = ctx->skb;
1310                 if (rcd->eop) {
1311                         skb->len += skb->data_len;
1312 
1313                         vmxnet3_rx_csum(adapter, skb,
1314                                         (union Vmxnet3_GenericDesc *)rcd);
1315                         skb->protocol = eth_type_trans(skb, adapter->netdev);
1316 
1317                         if (unlikely(rcd->ts))
1318                                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rcd->tci);
1319 
1320                         if (adapter->netdev->features & NETIF_F_LRO)
1321                                 netif_receive_skb(skb);
1322                         else
1323                                 napi_gro_receive(&rq->napi, skb);
1324 
1325                         ctx->skb = NULL;
1326                 }
1327 
1328 rcd_done:
1329                 /* device may have skipped some rx descs */
1330                 ring->next2comp = idx;
1331                 num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring);
1332                 ring = rq->rx_ring + ring_idx;
1333                 while (num_to_alloc) {
1334                         vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd,
1335                                           &rxCmdDesc);
1336                         BUG_ON(!rxd->addr);
1337 
1338                         /* Recv desc is ready to be used by the device */
1339                         rxd->gen = ring->gen;
1340                         vmxnet3_cmd_ring_adv_next2fill(ring);
1341                         num_to_alloc--;
1342                 }
1343 
1344                 /* if needed, update the register */
1345                 if (unlikely(rq->shared->updateRxProd)) {
1346                         VMXNET3_WRITE_BAR0_REG(adapter,
1347                                                rxprod_reg[ring_idx] + rq->qid * 8,
1348                                                ring->next2fill);
1349                 }
1350 
1351                 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1352                 vmxnet3_getRxComp(rcd,
1353                                   &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1354         }
1355 
1356         return num_rxd;
1357 }
1358 
1359 
1360 static void
1361 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1362                    struct vmxnet3_adapter *adapter)
1363 {
1364         u32 i, ring_idx;
1365         struct Vmxnet3_RxDesc *rxd;
1366 
1367         for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1368                 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1369 #ifdef __BIG_ENDIAN_BITFIELD
1370                         struct Vmxnet3_RxDesc rxDesc;
1371 #endif
1372                         vmxnet3_getRxDesc(rxd,
1373                                 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1374 
1375                         if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1376                                         rq->buf_info[ring_idx][i].skb) {
1377                                 dma_unmap_single(&adapter->pdev->dev, rxd->addr,
1378                                                  rxd->len, PCI_DMA_FROMDEVICE);
1379                                 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1380                                 rq->buf_info[ring_idx][i].skb = NULL;
1381                         } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1382                                         rq->buf_info[ring_idx][i].page) {
1383                                 dma_unmap_page(&adapter->pdev->dev, rxd->addr,
1384                                                rxd->len, PCI_DMA_FROMDEVICE);
1385                                 put_page(rq->buf_info[ring_idx][i].page);
1386                                 rq->buf_info[ring_idx][i].page = NULL;
1387                         }
1388                 }
1389 
1390                 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1391                 rq->rx_ring[ring_idx].next2fill =
1392                                         rq->rx_ring[ring_idx].next2comp = 0;
1393         }
1394 
1395         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1396         rq->comp_ring.next2proc = 0;
1397 }
1398 
1399 
1400 static void
1401 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter)
1402 {
1403         int i;
1404 
1405         for (i = 0; i < adapter->num_rx_queues; i++)
1406                 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter);
1407 }
1408 
1409 
1410 static void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1411                                struct vmxnet3_adapter *adapter)
1412 {
1413         int i;
1414         int j;
1415 
1416         /* all rx buffers must have already been freed */
1417         for (i = 0; i < 2; i++) {
1418                 if (rq->buf_info[i]) {
1419                         for (j = 0; j < rq->rx_ring[i].size; j++)
1420                                 BUG_ON(rq->buf_info[i][j].page != NULL);
1421                 }
1422         }
1423 
1424 
1425         for (i = 0; i < 2; i++) {
1426                 if (rq->rx_ring[i].base) {
1427                         dma_free_coherent(&adapter->pdev->dev,
1428                                           rq->rx_ring[i].size
1429                                           * sizeof(struct Vmxnet3_RxDesc),
1430                                           rq->rx_ring[i].base,
1431                                           rq->rx_ring[i].basePA);
1432                         rq->rx_ring[i].base = NULL;
1433                 }
1434                 rq->buf_info[i] = NULL;
1435         }
1436 
1437         if (rq->comp_ring.base) {
1438                 dma_free_coherent(&adapter->pdev->dev, rq->comp_ring.size
1439                                   * sizeof(struct Vmxnet3_RxCompDesc),
1440                                   rq->comp_ring.base, rq->comp_ring.basePA);
1441                 rq->comp_ring.base = NULL;
1442         }
1443 
1444         if (rq->buf_info[0]) {
1445                 size_t sz = sizeof(struct vmxnet3_rx_buf_info) *
1446                         (rq->rx_ring[0].size + rq->rx_ring[1].size);
1447                 dma_free_coherent(&adapter->pdev->dev, sz, rq->buf_info[0],
1448                                   rq->buf_info_pa);
1449         }
1450 }
1451 
1452 
1453 static int
1454 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1455                 struct vmxnet3_adapter  *adapter)
1456 {
1457         int i;
1458 
1459         /* initialize buf_info */
1460         for (i = 0; i < rq->rx_ring[0].size; i++) {
1461 
1462                 /* 1st buf for a pkt is skbuff */
1463                 if (i % adapter->rx_buf_per_pkt == 0) {
1464                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1465                         rq->buf_info[0][i].len = adapter->skb_buf_size;
1466                 } else { /* subsequent bufs for a pkt is frag */
1467                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1468                         rq->buf_info[0][i].len = PAGE_SIZE;
1469                 }
1470         }
1471         for (i = 0; i < rq->rx_ring[1].size; i++) {
1472                 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1473                 rq->buf_info[1][i].len = PAGE_SIZE;
1474         }
1475 
1476         /* reset internal state and allocate buffers for both rings */
1477         for (i = 0; i < 2; i++) {
1478                 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1479 
1480                 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1481                        sizeof(struct Vmxnet3_RxDesc));
1482                 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1483         }
1484         if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1485                                     adapter) == 0) {
1486                 /* at least has 1 rx buffer for the 1st ring */
1487                 return -ENOMEM;
1488         }
1489         vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1490 
1491         /* reset the comp ring */
1492         rq->comp_ring.next2proc = 0;
1493         memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1494                sizeof(struct Vmxnet3_RxCompDesc));
1495         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1496 
1497         /* reset rxctx */
1498         rq->rx_ctx.skb = NULL;
1499 
1500         /* stats are not reset */
1501         return 0;
1502 }
1503 
1504 
1505 static int
1506 vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter)
1507 {
1508         int i, err = 0;
1509 
1510         for (i = 0; i < adapter->num_rx_queues; i++) {
1511                 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter);
1512                 if (unlikely(err)) {
1513                         dev_err(&adapter->netdev->dev, "%s: failed to "
1514                                 "initialize rx queue%i\n",
1515                                 adapter->netdev->name, i);
1516                         break;
1517                 }
1518         }
1519         return err;
1520 
1521 }
1522 
1523 
1524 static int
1525 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1526 {
1527         int i;
1528         size_t sz;
1529         struct vmxnet3_rx_buf_info *bi;
1530 
1531         for (i = 0; i < 2; i++) {
1532 
1533                 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1534                 rq->rx_ring[i].base = dma_alloc_coherent(
1535                                                 &adapter->pdev->dev, sz,
1536                                                 &rq->rx_ring[i].basePA,
1537                                                 GFP_KERNEL);
1538                 if (!rq->rx_ring[i].base) {
1539                         netdev_err(adapter->netdev,
1540                                    "failed to allocate rx ring %d\n", i);
1541                         goto err;
1542                 }
1543         }
1544 
1545         sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1546         rq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev, sz,
1547                                                 &rq->comp_ring.basePA,
1548                                                 GFP_KERNEL);
1549         if (!rq->comp_ring.base) {
1550                 netdev_err(adapter->netdev, "failed to allocate rx comp ring\n");
1551                 goto err;
1552         }
1553 
1554         sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1555                                                    rq->rx_ring[1].size);
1556         bi = dma_zalloc_coherent(&adapter->pdev->dev, sz, &rq->buf_info_pa,
1557                                  GFP_KERNEL);
1558         if (!bi)
1559                 goto err;
1560 
1561         rq->buf_info[0] = bi;
1562         rq->buf_info[1] = bi + rq->rx_ring[0].size;
1563 
1564         return 0;
1565 
1566 err:
1567         vmxnet3_rq_destroy(rq, adapter);
1568         return -ENOMEM;
1569 }
1570 
1571 
1572 static int
1573 vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter)
1574 {
1575         int i, err = 0;
1576 
1577         for (i = 0; i < adapter->num_rx_queues; i++) {
1578                 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter);
1579                 if (unlikely(err)) {
1580                         dev_err(&adapter->netdev->dev,
1581                                 "%s: failed to create rx queue%i\n",
1582                                 adapter->netdev->name, i);
1583                         goto err_out;
1584                 }
1585         }
1586         return err;
1587 err_out:
1588         vmxnet3_rq_destroy_all(adapter);
1589         return err;
1590 
1591 }
1592 
1593 /* Multiple queue aware polling function for tx and rx */
1594 
1595 static int
1596 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1597 {
1598         int rcd_done = 0, i;
1599         if (unlikely(adapter->shared->ecr))
1600                 vmxnet3_process_events(adapter);
1601         for (i = 0; i < adapter->num_tx_queues; i++)
1602                 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter);
1603 
1604         for (i = 0; i < adapter->num_rx_queues; i++)
1605                 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i],
1606                                                    adapter, budget);
1607         return rcd_done;
1608 }
1609 
1610 
1611 static int
1612 vmxnet3_poll(struct napi_struct *napi, int budget)
1613 {
1614         struct vmxnet3_rx_queue *rx_queue = container_of(napi,
1615                                           struct vmxnet3_rx_queue, napi);
1616         int rxd_done;
1617 
1618         rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget);
1619 
1620         if (rxd_done < budget) {
1621                 napi_complete(napi);
1622                 vmxnet3_enable_all_intrs(rx_queue->adapter);
1623         }
1624         return rxd_done;
1625 }
1626 
1627 /*
1628  * NAPI polling function for MSI-X mode with multiple Rx queues
1629  * Returns the # of the NAPI credit consumed (# of rx descriptors processed)
1630  */
1631 
1632 static int
1633 vmxnet3_poll_rx_only(struct napi_struct *napi, int budget)
1634 {
1635         struct vmxnet3_rx_queue *rq = container_of(napi,
1636                                                 struct vmxnet3_rx_queue, napi);
1637         struct vmxnet3_adapter *adapter = rq->adapter;
1638         int rxd_done;
1639 
1640         /* When sharing interrupt with corresponding tx queue, process
1641          * tx completions in that queue as well
1642          */
1643         if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) {
1644                 struct vmxnet3_tx_queue *tq =
1645                                 &adapter->tx_queue[rq - adapter->rx_queue];
1646                 vmxnet3_tq_tx_complete(tq, adapter);
1647         }
1648 
1649         rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget);
1650 
1651         if (rxd_done < budget) {
1652                 napi_complete(napi);
1653                 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx);
1654         }
1655         return rxd_done;
1656 }
1657 
1658 
1659 #ifdef CONFIG_PCI_MSI
1660 
1661 /*
1662  * Handle completion interrupts on tx queues
1663  * Returns whether or not the intr is handled
1664  */
1665 
1666 static irqreturn_t
1667 vmxnet3_msix_tx(int irq, void *data)
1668 {
1669         struct vmxnet3_tx_queue *tq = data;
1670         struct vmxnet3_adapter *adapter = tq->adapter;
1671 
1672         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1673                 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx);
1674 
1675         /* Handle the case where only one irq is allocate for all tx queues */
1676         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1677                 int i;
1678                 for (i = 0; i < adapter->num_tx_queues; i++) {
1679                         struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i];
1680                         vmxnet3_tq_tx_complete(txq, adapter);
1681                 }
1682         } else {
1683                 vmxnet3_tq_tx_complete(tq, adapter);
1684         }
1685         vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx);
1686 
1687         return IRQ_HANDLED;
1688 }
1689 
1690 
1691 /*
1692  * Handle completion interrupts on rx queues. Returns whether or not the
1693  * intr is handled
1694  */
1695 
1696 static irqreturn_t
1697 vmxnet3_msix_rx(int irq, void *data)
1698 {
1699         struct vmxnet3_rx_queue *rq = data;
1700         struct vmxnet3_adapter *adapter = rq->adapter;
1701 
1702         /* disable intr if needed */
1703         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1704                 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx);
1705         napi_schedule(&rq->napi);
1706 
1707         return IRQ_HANDLED;
1708 }
1709 
1710 /*
1711  *----------------------------------------------------------------------------
1712  *
1713  * vmxnet3_msix_event --
1714  *
1715  *    vmxnet3 msix event intr handler
1716  *
1717  * Result:
1718  *    whether or not the intr is handled
1719  *
1720  *----------------------------------------------------------------------------
1721  */
1722 
1723 static irqreturn_t
1724 vmxnet3_msix_event(int irq, void *data)
1725 {
1726         struct net_device *dev = data;
1727         struct vmxnet3_adapter *adapter = netdev_priv(dev);
1728 
1729         /* disable intr if needed */
1730         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1731                 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx);
1732 
1733         if (adapter->shared->ecr)
1734                 vmxnet3_process_events(adapter);
1735 
1736         vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx);
1737 
1738         return IRQ_HANDLED;
1739 }
1740 
1741 #endif /* CONFIG_PCI_MSI  */
1742 
1743 
1744 /* Interrupt handler for vmxnet3  */
1745 static irqreturn_t
1746 vmxnet3_intr(int irq, void *dev_id)
1747 {
1748         struct net_device *dev = dev_id;
1749         struct vmxnet3_adapter *adapter = netdev_priv(dev);
1750 
1751         if (adapter->intr.type == VMXNET3_IT_INTX) {
1752                 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1753                 if (unlikely(icr == 0))
1754                         /* not ours */
1755                         return IRQ_NONE;
1756         }
1757 
1758 
1759         /* disable intr if needed */
1760         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1761                 vmxnet3_disable_all_intrs(adapter);
1762 
1763         napi_schedule(&adapter->rx_queue[0].napi);
1764 
1765         return IRQ_HANDLED;
1766 }
1767 
1768 #ifdef CONFIG_NET_POLL_CONTROLLER
1769 
1770 /* netpoll callback. */
1771 static void
1772 vmxnet3_netpoll(struct net_device *netdev)
1773 {
1774         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1775 
1776         switch (adapter->intr.type) {
1777 #ifdef CONFIG_PCI_MSI
1778         case VMXNET3_IT_MSIX: {
1779                 int i;
1780                 for (i = 0; i < adapter->num_rx_queues; i++)
1781                         vmxnet3_msix_rx(0, &adapter->rx_queue[i]);
1782                 break;
1783         }
1784 #endif
1785         case VMXNET3_IT_MSI:
1786         default:
1787                 vmxnet3_intr(0, adapter->netdev);
1788                 break;
1789         }
1790 
1791 }
1792 #endif  /* CONFIG_NET_POLL_CONTROLLER */
1793 
1794 static int
1795 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1796 {
1797         struct vmxnet3_intr *intr = &adapter->intr;
1798         int err = 0, i;
1799         int vector = 0;
1800 
1801 #ifdef CONFIG_PCI_MSI
1802         if (adapter->intr.type == VMXNET3_IT_MSIX) {
1803                 for (i = 0; i < adapter->num_tx_queues; i++) {
1804                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
1805                                 sprintf(adapter->tx_queue[i].name, "%s-tx-%d",
1806                                         adapter->netdev->name, vector);
1807                                 err = request_irq(
1808                                               intr->msix_entries[vector].vector,
1809                                               vmxnet3_msix_tx, 0,
1810                                               adapter->tx_queue[i].name,
1811                                               &adapter->tx_queue[i]);
1812                         } else {
1813                                 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d",
1814                                         adapter->netdev->name, vector);
1815                         }
1816                         if (err) {
1817                                 dev_err(&adapter->netdev->dev,
1818                                         "Failed to request irq for MSIX, %s, "
1819                                         "error %d\n",
1820                                         adapter->tx_queue[i].name, err);
1821                                 return err;
1822                         }
1823 
1824                         /* Handle the case where only 1 MSIx was allocated for
1825                          * all tx queues */
1826                         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1827                                 for (; i < adapter->num_tx_queues; i++)
1828                                         adapter->tx_queue[i].comp_ring.intr_idx
1829                                                                 = vector;
1830                                 vector++;
1831                                 break;
1832                         } else {
1833                                 adapter->tx_queue[i].comp_ring.intr_idx
1834                                                                 = vector++;
1835                         }
1836                 }
1837                 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE)
1838                         vector = 0;
1839 
1840                 for (i = 0; i < adapter->num_rx_queues; i++) {
1841                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE)
1842                                 sprintf(adapter->rx_queue[i].name, "%s-rx-%d",
1843                                         adapter->netdev->name, vector);
1844                         else
1845                                 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d",
1846                                         adapter->netdev->name, vector);
1847                         err = request_irq(intr->msix_entries[vector].vector,
1848                                           vmxnet3_msix_rx, 0,
1849                                           adapter->rx_queue[i].name,
1850                                           &(adapter->rx_queue[i]));
1851                         if (err) {
1852                                 netdev_err(adapter->netdev,
1853                                            "Failed to request irq for MSIX, "
1854                                            "%s, error %d\n",
1855                                            adapter->rx_queue[i].name, err);
1856                                 return err;
1857                         }
1858 
1859                         adapter->rx_queue[i].comp_ring.intr_idx = vector++;
1860                 }
1861 
1862                 sprintf(intr->event_msi_vector_name, "%s-event-%d",
1863                         adapter->netdev->name, vector);
1864                 err = request_irq(intr->msix_entries[vector].vector,
1865                                   vmxnet3_msix_event, 0,
1866                                   intr->event_msi_vector_name, adapter->netdev);
1867                 intr->event_intr_idx = vector;
1868 
1869         } else if (intr->type == VMXNET3_IT_MSI) {
1870                 adapter->num_rx_queues = 1;
1871                 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
1872                                   adapter->netdev->name, adapter->netdev);
1873         } else {
1874 #endif
1875                 adapter->num_rx_queues = 1;
1876                 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
1877                                   IRQF_SHARED, adapter->netdev->name,
1878                                   adapter->netdev);
1879 #ifdef CONFIG_PCI_MSI
1880         }
1881 #endif
1882         intr->num_intrs = vector + 1;
1883         if (err) {
1884                 netdev_err(adapter->netdev,
1885                            "Failed to request irq (intr type:%d), error %d\n",
1886                            intr->type, err);
1887         } else {
1888                 /* Number of rx queues will not change after this */
1889                 for (i = 0; i < adapter->num_rx_queues; i++) {
1890                         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
1891                         rq->qid = i;
1892                         rq->qid2 = i + adapter->num_rx_queues;
1893                 }
1894 
1895 
1896 
1897                 /* init our intr settings */
1898                 for (i = 0; i < intr->num_intrs; i++)
1899                         intr->mod_levels[i] = UPT1_IML_ADAPTIVE;
1900                 if (adapter->intr.type != VMXNET3_IT_MSIX) {
1901                         adapter->intr.event_intr_idx = 0;
1902                         for (i = 0; i < adapter->num_tx_queues; i++)
1903                                 adapter->tx_queue[i].comp_ring.intr_idx = 0;
1904                         adapter->rx_queue[0].comp_ring.intr_idx = 0;
1905                 }
1906 
1907                 netdev_info(adapter->netdev,
1908                             "intr type %u, mode %u, %u vectors allocated\n",
1909                             intr->type, intr->mask_mode, intr->num_intrs);
1910         }
1911 
1912         return err;
1913 }
1914 
1915 
1916 static void
1917 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
1918 {
1919         struct vmxnet3_intr *intr = &adapter->intr;
1920         BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0);
1921 
1922         switch (intr->type) {
1923 #ifdef CONFIG_PCI_MSI
1924         case VMXNET3_IT_MSIX:
1925         {
1926                 int i, vector = 0;
1927 
1928                 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
1929                         for (i = 0; i < adapter->num_tx_queues; i++) {
1930                                 free_irq(intr->msix_entries[vector++].vector,
1931                                          &(adapter->tx_queue[i]));
1932                                 if (adapter->share_intr == VMXNET3_INTR_TXSHARE)
1933                                         break;
1934                         }
1935                 }
1936 
1937                 for (i = 0; i < adapter->num_rx_queues; i++) {
1938                         free_irq(intr->msix_entries[vector++].vector,
1939                                  &(adapter->rx_queue[i]));
1940                 }
1941 
1942                 free_irq(intr->msix_entries[vector].vector,
1943                          adapter->netdev);
1944                 BUG_ON(vector >= intr->num_intrs);
1945                 break;
1946         }
1947 #endif
1948         case VMXNET3_IT_MSI:
1949                 free_irq(adapter->pdev->irq, adapter->netdev);
1950                 break;
1951         case VMXNET3_IT_INTX:
1952                 free_irq(adapter->pdev->irq, adapter->netdev);
1953                 break;
1954         default:
1955                 BUG();
1956         }
1957 }
1958 
1959 
1960 static void
1961 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
1962 {
1963         u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1964         u16 vid;
1965 
1966         /* allow untagged pkts */
1967         VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
1968 
1969         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
1970                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1971 }
1972 
1973 
1974 static int
1975 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
1976 {
1977         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1978 
1979         if (!(netdev->flags & IFF_PROMISC)) {
1980                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
1981                 unsigned long flags;
1982 
1983                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
1984                 spin_lock_irqsave(&adapter->cmd_lock, flags);
1985                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
1986                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
1987                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
1988         }
1989 
1990         set_bit(vid, adapter->active_vlans);
1991 
1992         return 0;
1993 }
1994 
1995 
1996 static int
1997 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
1998 {
1999         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2000 
2001         if (!(netdev->flags & IFF_PROMISC)) {
2002                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2003                 unsigned long flags;
2004 
2005                 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
2006                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2007                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2008                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2009                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2010         }
2011 
2012         clear_bit(vid, adapter->active_vlans);
2013 
2014         return 0;
2015 }
2016 
2017 
2018 static u8 *
2019 vmxnet3_copy_mc(struct net_device *netdev)
2020 {
2021         u8 *buf = NULL;
2022         u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
2023 
2024         /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
2025         if (sz <= 0xffff) {
2026                 /* We may be called with BH disabled */
2027                 buf = kmalloc(sz, GFP_ATOMIC);
2028                 if (buf) {
2029                         struct netdev_hw_addr *ha;
2030                         int i = 0;
2031 
2032                         netdev_for_each_mc_addr(ha, netdev)
2033                                 memcpy(buf + i++ * ETH_ALEN, ha->addr,
2034                                        ETH_ALEN);
2035                 }
2036         }
2037         return buf;
2038 }
2039 
2040 
2041 static void
2042 vmxnet3_set_mc(struct net_device *netdev)
2043 {
2044         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2045         unsigned long flags;
2046         struct Vmxnet3_RxFilterConf *rxConf =
2047                                         &adapter->shared->devRead.rxFilterConf;
2048         u8 *new_table = NULL;
2049         dma_addr_t new_table_pa = 0;
2050         u32 new_mode = VMXNET3_RXM_UCAST;
2051 
2052         if (netdev->flags & IFF_PROMISC) {
2053                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2054                 memset(vfTable, 0, VMXNET3_VFT_SIZE * sizeof(*vfTable));
2055 
2056                 new_mode |= VMXNET3_RXM_PROMISC;
2057         } else {
2058                 vmxnet3_restore_vlan(adapter);
2059         }
2060 
2061         if (netdev->flags & IFF_BROADCAST)
2062                 new_mode |= VMXNET3_RXM_BCAST;
2063 
2064         if (netdev->flags & IFF_ALLMULTI)
2065                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2066         else
2067                 if (!netdev_mc_empty(netdev)) {
2068                         new_table = vmxnet3_copy_mc(netdev);
2069                         if (new_table) {
2070                                 rxConf->mfTableLen = cpu_to_le16(
2071                                         netdev_mc_count(netdev) * ETH_ALEN);
2072                                 new_table_pa = dma_map_single(
2073                                                         &adapter->pdev->dev,
2074                                                         new_table,
2075                                                         rxConf->mfTableLen,
2076                                                         PCI_DMA_TODEVICE);
2077                         }
2078 
2079                         if (new_table_pa) {
2080                                 new_mode |= VMXNET3_RXM_MCAST;
2081                                 rxConf->mfTablePA = cpu_to_le64(new_table_pa);
2082                         } else {
2083                                 netdev_info(netdev,
2084                                             "failed to copy mcast list, setting ALL_MULTI\n");
2085                                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2086                         }
2087                 }
2088 
2089         if (!(new_mode & VMXNET3_RXM_MCAST)) {
2090                 rxConf->mfTableLen = 0;
2091                 rxConf->mfTablePA = 0;
2092         }
2093 
2094         spin_lock_irqsave(&adapter->cmd_lock, flags);
2095         if (new_mode != rxConf->rxMode) {
2096                 rxConf->rxMode = cpu_to_le32(new_mode);
2097                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2098                                        VMXNET3_CMD_UPDATE_RX_MODE);
2099                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2100                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2101         }
2102 
2103         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2104                                VMXNET3_CMD_UPDATE_MAC_FILTERS);
2105         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2106 
2107         if (new_table_pa)
2108                 dma_unmap_single(&adapter->pdev->dev, new_table_pa,
2109                                  rxConf->mfTableLen, PCI_DMA_TODEVICE);
2110         kfree(new_table);
2111 }
2112 
2113 void
2114 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter)
2115 {
2116         int i;
2117 
2118         for (i = 0; i < adapter->num_rx_queues; i++)
2119                 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter);
2120 }
2121 
2122 
2123 /*
2124  *   Set up driver_shared based on settings in adapter.
2125  */
2126 
2127 static void
2128 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2129 {
2130         struct Vmxnet3_DriverShared *shared = adapter->shared;
2131         struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
2132         struct Vmxnet3_TxQueueConf *tqc;
2133         struct Vmxnet3_RxQueueConf *rqc;
2134         int i;
2135 
2136         memset(shared, 0, sizeof(*shared));
2137 
2138         /* driver settings */
2139         shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
2140         devRead->misc.driverInfo.version = cpu_to_le32(
2141                                                 VMXNET3_DRIVER_VERSION_NUM);
2142         devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
2143                                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
2144         devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
2145         *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
2146                                 *((u32 *)&devRead->misc.driverInfo.gos));
2147         devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
2148         devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
2149 
2150         devRead->misc.ddPA = cpu_to_le64(adapter->adapter_pa);
2151         devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
2152 
2153         /* set up feature flags */
2154         if (adapter->netdev->features & NETIF_F_RXCSUM)
2155                 devRead->misc.uptFeatures |= UPT1_F_RXCSUM;
2156 
2157         if (adapter->netdev->features & NETIF_F_LRO) {
2158                 devRead->misc.uptFeatures |= UPT1_F_LRO;
2159                 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2160         }
2161         if (adapter->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2162                 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2163 
2164         devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2165         devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
2166         devRead->misc.queueDescLen = cpu_to_le32(
2167                 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
2168                 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc));
2169 
2170         /* tx queue settings */
2171         devRead->misc.numTxQueues =  adapter->num_tx_queues;
2172         for (i = 0; i < adapter->num_tx_queues; i++) {
2173                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2174                 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL);
2175                 tqc = &adapter->tqd_start[i].conf;
2176                 tqc->txRingBasePA   = cpu_to_le64(tq->tx_ring.basePA);
2177                 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA);
2178                 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA);
2179                 tqc->ddPA           = cpu_to_le64(tq->buf_info_pa);
2180                 tqc->txRingSize     = cpu_to_le32(tq->tx_ring.size);
2181                 tqc->dataRingSize   = cpu_to_le32(tq->data_ring.size);
2182                 tqc->compRingSize   = cpu_to_le32(tq->comp_ring.size);
2183                 tqc->ddLen          = cpu_to_le32(
2184                                         sizeof(struct vmxnet3_tx_buf_info) *
2185                                         tqc->txRingSize);
2186                 tqc->intrIdx        = tq->comp_ring.intr_idx;
2187         }
2188 
2189         /* rx queue settings */
2190         devRead->misc.numRxQueues = adapter->num_rx_queues;
2191         for (i = 0; i < adapter->num_rx_queues; i++) {
2192                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2193                 rqc = &adapter->rqd_start[i].conf;
2194                 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA);
2195                 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA);
2196                 rqc->compRingBasePA  = cpu_to_le64(rq->comp_ring.basePA);
2197                 rqc->ddPA            = cpu_to_le64(rq->buf_info_pa);
2198                 rqc->rxRingSize[0]   = cpu_to_le32(rq->rx_ring[0].size);
2199                 rqc->rxRingSize[1]   = cpu_to_le32(rq->rx_ring[1].size);
2200                 rqc->compRingSize    = cpu_to_le32(rq->comp_ring.size);
2201                 rqc->ddLen           = cpu_to_le32(
2202                                         sizeof(struct vmxnet3_rx_buf_info) *
2203                                         (rqc->rxRingSize[0] +
2204                                          rqc->rxRingSize[1]));
2205                 rqc->intrIdx         = rq->comp_ring.intr_idx;
2206         }
2207 
2208 #ifdef VMXNET3_RSS
2209         memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf));
2210 
2211         if (adapter->rss) {
2212                 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
2213 
2214                 devRead->misc.uptFeatures |= UPT1_F_RSS;
2215                 devRead->misc.numRxQueues = adapter->num_rx_queues;
2216                 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 |
2217                                     UPT1_RSS_HASH_TYPE_IPV4 |
2218                                     UPT1_RSS_HASH_TYPE_TCP_IPV6 |
2219                                     UPT1_RSS_HASH_TYPE_IPV6;
2220                 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ;
2221                 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE;
2222                 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE;
2223                 netdev_rss_key_fill(rssConf->hashKey, sizeof(rssConf->hashKey));
2224 
2225                 for (i = 0; i < rssConf->indTableSize; i++)
2226                         rssConf->indTable[i] = ethtool_rxfh_indir_default(
2227                                 i, adapter->num_rx_queues);
2228 
2229                 devRead->rssConfDesc.confVer = 1;
2230                 devRead->rssConfDesc.confLen = cpu_to_le32(sizeof(*rssConf));
2231                 devRead->rssConfDesc.confPA =
2232                         cpu_to_le64(adapter->rss_conf_pa);
2233         }
2234 
2235 #endif /* VMXNET3_RSS */
2236 
2237         /* intr settings */
2238         devRead->intrConf.autoMask = adapter->intr.mask_mode ==
2239                                      VMXNET3_IMM_AUTO;
2240         devRead->intrConf.numIntrs = adapter->intr.num_intrs;
2241         for (i = 0; i < adapter->intr.num_intrs; i++)
2242                 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
2243 
2244         devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
2245         devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
2246 
2247         /* rx filter settings */
2248         devRead->rxFilterConf.rxMode = 0;
2249         vmxnet3_restore_vlan(adapter);
2250         vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
2251 
2252         /* the rest are already zeroed */
2253 }
2254 
2255 
2256 int
2257 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2258 {
2259         int err, i;
2260         u32 ret;
2261         unsigned long flags;
2262 
2263         netdev_dbg(adapter->netdev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2264                 " ring sizes %u %u %u\n", adapter->netdev->name,
2265                 adapter->skb_buf_size, adapter->rx_buf_per_pkt,
2266                 adapter->tx_queue[0].tx_ring.size,
2267                 adapter->rx_queue[0].rx_ring[0].size,
2268                 adapter->rx_queue[0].rx_ring[1].size);
2269 
2270         vmxnet3_tq_init_all(adapter);
2271         err = vmxnet3_rq_init_all(adapter);
2272         if (err) {
2273                 netdev_err(adapter->netdev,
2274                            "Failed to init rx queue error %d\n", err);
2275                 goto rq_err;
2276         }
2277 
2278         err = vmxnet3_request_irqs(adapter);
2279         if (err) {
2280                 netdev_err(adapter->netdev,
2281                            "Failed to setup irq for error %d\n", err);
2282                 goto irq_err;
2283         }
2284 
2285         vmxnet3_setup_driver_shared(adapter);
2286 
2287         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
2288                                adapter->shared_pa));
2289         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2290                                adapter->shared_pa));
2291         spin_lock_irqsave(&adapter->cmd_lock, flags);
2292         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2293                                VMXNET3_CMD_ACTIVATE_DEV);
2294         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2295         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2296 
2297         if (ret != 0) {
2298                 netdev_err(adapter->netdev,
2299                            "Failed to activate dev: error %u\n", ret);
2300                 err = -EINVAL;
2301                 goto activate_err;
2302         }
2303 
2304         for (i = 0; i < adapter->num_rx_queues; i++) {
2305                 VMXNET3_WRITE_BAR0_REG(adapter,
2306                                 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN,
2307                                 adapter->rx_queue[i].rx_ring[0].next2fill);
2308                 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 +
2309                                 (i * VMXNET3_REG_ALIGN)),
2310                                 adapter->rx_queue[i].rx_ring[1].next2fill);
2311         }
2312 
2313         /* Apply the rx filter settins last. */
2314         vmxnet3_set_mc(adapter->netdev);
2315 
2316         /*
2317          * Check link state when first activating device. It will start the
2318          * tx queue if the link is up.
2319          */
2320         vmxnet3_check_link(adapter, true);
2321         for (i = 0; i < adapter->num_rx_queues; i++)
2322                 napi_enable(&adapter->rx_queue[i].napi);
2323         vmxnet3_enable_all_intrs(adapter);
2324         clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2325         return 0;
2326 
2327 activate_err:
2328         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
2329         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
2330         vmxnet3_free_irqs(adapter);
2331 irq_err:
2332 rq_err:
2333         /* free up buffers we allocated */
2334         vmxnet3_rq_cleanup_all(adapter);
2335         return err;
2336 }
2337 
2338 
2339 void
2340 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2341 {
2342         unsigned long flags;
2343         spin_lock_irqsave(&adapter->cmd_lock, flags);
2344         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2345         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2346 }
2347 
2348 
2349 int
2350 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2351 {
2352         int i;
2353         unsigned long flags;
2354         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2355                 return 0;
2356 
2357 
2358         spin_lock_irqsave(&adapter->cmd_lock, flags);
2359         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2360                                VMXNET3_CMD_QUIESCE_DEV);
2361         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2362         vmxnet3_disable_all_intrs(adapter);
2363 
2364         for (i = 0; i < adapter->num_rx_queues; i++)
2365                 napi_disable(&adapter->rx_queue[i].napi);
2366         netif_tx_disable(adapter->netdev);
2367         adapter->link_speed = 0;
2368         netif_carrier_off(adapter->netdev);
2369 
2370         vmxnet3_tq_cleanup_all(adapter);
2371         vmxnet3_rq_cleanup_all(adapter);
2372         vmxnet3_free_irqs(adapter);
2373         return 0;
2374 }
2375 
2376 
2377 static void
2378 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2379 {
2380         u32 tmp;
2381 
2382         tmp = *(u32 *)mac;
2383         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
2384 
2385         tmp = (mac[5] << 8) | mac[4];
2386         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
2387 }
2388 
2389 
2390 static int
2391 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
2392 {
2393         struct sockaddr *addr = p;
2394         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2395 
2396         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2397         vmxnet3_write_mac_addr(adapter, addr->sa_data);
2398 
2399         return 0;
2400 }
2401 
2402 
2403 /* ==================== initialization and cleanup routines ============ */
2404 
2405 static int
2406 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
2407 {
2408         int err;
2409         unsigned long mmio_start, mmio_len;
2410         struct pci_dev *pdev = adapter->pdev;
2411 
2412         err = pci_enable_device(pdev);
2413         if (err) {
2414                 dev_err(&pdev->dev, "Failed to enable adapter: error %d\n", err);
2415                 return err;
2416         }
2417 
2418         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
2419                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
2420                         dev_err(&pdev->dev,
2421                                 "pci_set_consistent_dma_mask failed\n");
2422                         err = -EIO;
2423                         goto err_set_mask;
2424                 }
2425                 *dma64 = true;
2426         } else {
2427                 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
2428                         dev_err(&pdev->dev,
2429                                 "pci_set_dma_mask failed\n");
2430                         err = -EIO;
2431                         goto err_set_mask;
2432                 }
2433                 *dma64 = false;
2434         }
2435 
2436         err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2437                                            vmxnet3_driver_name);
2438         if (err) {
2439                 dev_err(&pdev->dev,
2440                         "Failed to request region for adapter: error %d\n", err);
2441                 goto err_set_mask;
2442         }
2443 
2444         pci_set_master(pdev);
2445 
2446         mmio_start = pci_resource_start(pdev, 0);
2447         mmio_len = pci_resource_len(pdev, 0);
2448         adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2449         if (!adapter->hw_addr0) {
2450                 dev_err(&pdev->dev, "Failed to map bar0\n");
2451                 err = -EIO;
2452                 goto err_ioremap;
2453         }
2454 
2455         mmio_start = pci_resource_start(pdev, 1);
2456         mmio_len = pci_resource_len(pdev, 1);
2457         adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2458         if (!adapter->hw_addr1) {
2459                 dev_err(&pdev->dev, "Failed to map bar1\n");
2460                 err = -EIO;
2461                 goto err_bar1;
2462         }
2463         return 0;
2464 
2465 err_bar1:
2466         iounmap(adapter->hw_addr0);
2467 err_ioremap:
2468         pci_release_selected_regions(pdev, (1 << 2) - 1);
2469 err_set_mask:
2470         pci_disable_device(pdev);
2471         return err;
2472 }
2473 
2474 
2475 static void
2476 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2477 {
2478         BUG_ON(!adapter->pdev);
2479 
2480         iounmap(adapter->hw_addr0);
2481         iounmap(adapter->hw_addr1);
2482         pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2483         pci_disable_device(adapter->pdev);
2484 }
2485 
2486 
2487 static void
2488 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2489 {
2490         size_t sz, i, ring0_size, ring1_size, comp_size;
2491         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0];
2492 
2493 
2494         if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2495                                     VMXNET3_MAX_ETH_HDR_SIZE) {
2496                 adapter->skb_buf_size = adapter->netdev->mtu +
2497                                         VMXNET3_MAX_ETH_HDR_SIZE;
2498                 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2499                         adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2500 
2501                 adapter->rx_buf_per_pkt = 1;
2502         } else {
2503                 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2504                 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2505                                             VMXNET3_MAX_ETH_HDR_SIZE;
2506                 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2507         }
2508 
2509         /*
2510          * for simplicity, force the ring0 size to be a multiple of
2511          * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2512          */
2513         sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2514         ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2515         ring0_size = (ring0_size + sz - 1) / sz * sz;
2516         ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
2517                            sz * sz);
2518         ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2519         ring1_size = (ring1_size + sz - 1) / sz * sz;
2520         ring1_size = min_t(u32, ring1_size, VMXNET3_RX_RING2_MAX_SIZE /
2521                            sz * sz);
2522         comp_size = ring0_size + ring1_size;
2523 
2524         for (i = 0; i < adapter->num_rx_queues; i++) {
2525                 rq = &adapter->rx_queue[i];
2526                 rq->rx_ring[0].size = ring0_size;
2527                 rq->rx_ring[1].size = ring1_size;
2528                 rq->comp_ring.size = comp_size;
2529         }
2530 }
2531 
2532 
2533 int
2534 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2535                       u32 rx_ring_size, u32 rx_ring2_size)
2536 {
2537         int err = 0, i;
2538 
2539         for (i = 0; i < adapter->num_tx_queues; i++) {
2540                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2541                 tq->tx_ring.size   = tx_ring_size;
2542                 tq->data_ring.size = tx_ring_size;
2543                 tq->comp_ring.size = tx_ring_size;
2544                 tq->shared = &adapter->tqd_start[i].ctrl;
2545                 tq->stopped = true;
2546                 tq->adapter = adapter;
2547                 tq->qid = i;
2548                 err = vmxnet3_tq_create(tq, adapter);
2549                 /*
2550                  * Too late to change num_tx_queues. We cannot do away with
2551                  * lesser number of queues than what we asked for
2552                  */
2553                 if (err)
2554                         goto queue_err;
2555         }
2556 
2557         adapter->rx_queue[0].rx_ring[0].size = rx_ring_size;
2558         adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size;
2559         vmxnet3_adjust_rx_ring_size(adapter);
2560         for (i = 0; i < adapter->num_rx_queues; i++) {
2561                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2562                 /* qid and qid2 for rx queues will be assigned later when num
2563                  * of rx queues is finalized after allocating intrs */
2564                 rq->shared = &adapter->rqd_start[i].ctrl;
2565                 rq->adapter = adapter;
2566                 err = vmxnet3_rq_create(rq, adapter);
2567                 if (err) {
2568                         if (i == 0) {
2569                                 netdev_err(adapter->netdev,
2570                                            "Could not allocate any rx queues. "
2571                                            "Aborting.\n");
2572                                 goto queue_err;
2573                         } else {
2574                                 netdev_info(adapter->netdev,
2575                                             "Number of rx queues changed "
2576                                             "to : %d.\n", i);
2577                                 adapter->num_rx_queues = i;
2578                                 err = 0;
2579                                 break;
2580                         }
2581                 }
2582         }
2583         return err;
2584 queue_err:
2585         vmxnet3_tq_destroy_all(adapter);
2586         return err;
2587 }
2588 
2589 static int
2590 vmxnet3_open(struct net_device *netdev)
2591 {
2592         struct vmxnet3_adapter *adapter;
2593         int err, i;
2594 
2595         adapter = netdev_priv(netdev);
2596 
2597         for (i = 0; i < adapter->num_tx_queues; i++)
2598                 spin_lock_init(&adapter->tx_queue[i].tx_lock);
2599 
2600         err = vmxnet3_create_queues(adapter, adapter->tx_ring_size,
2601                                     adapter->rx_ring_size,
2602                                     adapter->rx_ring2_size);
2603         if (err)
2604                 goto queue_err;
2605 
2606         err = vmxnet3_activate_dev(adapter);
2607         if (err)
2608                 goto activate_err;
2609 
2610         return 0;
2611 
2612 activate_err:
2613         vmxnet3_rq_destroy_all(adapter);
2614         vmxnet3_tq_destroy_all(adapter);
2615 queue_err:
2616         return err;
2617 }
2618 
2619 
2620 static int
2621 vmxnet3_close(struct net_device *netdev)
2622 {
2623         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2624 
2625         /*
2626          * Reset_work may be in the middle of resetting the device, wait for its
2627          * completion.
2628          */
2629         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2630                 msleep(1);
2631 
2632         vmxnet3_quiesce_dev(adapter);
2633 
2634         vmxnet3_rq_destroy_all(adapter);
2635         vmxnet3_tq_destroy_all(adapter);
2636 
2637         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2638 
2639 
2640         return 0;
2641 }
2642 
2643 
2644 void
2645 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2646 {
2647         int i;
2648 
2649         /*
2650          * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2651          * vmxnet3_close() will deadlock.
2652          */
2653         BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2654 
2655         /* we need to enable NAPI, otherwise dev_close will deadlock */
2656         for (i = 0; i < adapter->num_rx_queues; i++)
2657                 napi_enable(&adapter->rx_queue[i].napi);
2658         dev_close(adapter->netdev);
2659 }
2660 
2661 
2662 static int
2663 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2664 {
2665         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2666         int err = 0;
2667 
2668         if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2669                 return -EINVAL;
2670 
2671         netdev->mtu = new_mtu;
2672 
2673         /*
2674          * Reset_work may be in the middle of resetting the device, wait for its
2675          * completion.
2676          */
2677         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2678                 msleep(1);
2679 
2680         if (netif_running(netdev)) {
2681                 vmxnet3_quiesce_dev(adapter);
2682                 vmxnet3_reset_dev(adapter);
2683 
2684                 /* we need to re-create the rx queue based on the new mtu */
2685                 vmxnet3_rq_destroy_all(adapter);
2686                 vmxnet3_adjust_rx_ring_size(adapter);
2687                 err = vmxnet3_rq_create_all(adapter);
2688                 if (err) {
2689                         netdev_err(netdev,
2690                                    "failed to re-create rx queues, "
2691                                    " error %d. Closing it.\n", err);
2692                         goto out;
2693                 }
2694 
2695                 err = vmxnet3_activate_dev(adapter);
2696                 if (err) {
2697                         netdev_err(netdev,
2698                                    "failed to re-activate, error %d. "
2699                                    "Closing it\n", err);
2700                         goto out;
2701                 }
2702         }
2703 
2704 out:
2705         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2706         if (err)
2707                 vmxnet3_force_close(adapter);
2708 
2709         return err;
2710 }
2711 
2712 
2713 static void
2714 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2715 {
2716         struct net_device *netdev = adapter->netdev;
2717 
2718         netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
2719                 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_TX |
2720                 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_TSO | NETIF_F_TSO6 |
2721                 NETIF_F_LRO;
2722         if (dma64)
2723                 netdev->hw_features |= NETIF_F_HIGHDMA;
2724         netdev->vlan_features = netdev->hw_features &
2725                                 ~(NETIF_F_HW_VLAN_CTAG_TX |
2726                                   NETIF_F_HW_VLAN_CTAG_RX);
2727         netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
2728 }
2729 
2730 
2731 static void
2732 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2733 {
2734         u32 tmp;
2735 
2736         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2737         *(u32 *)mac = tmp;
2738 
2739         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2740         mac[4] = tmp & 0xff;
2741         mac[5] = (tmp >> 8) & 0xff;
2742 }
2743 
2744 #ifdef CONFIG_PCI_MSI
2745 
2746 /*
2747  * Enable MSIx vectors.
2748  * Returns :
2749  *      VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required
2750  *       were enabled.
2751  *      number of vectors which were enabled otherwise (this number is greater
2752  *       than VMXNET3_LINUX_MIN_MSIX_VECT)
2753  */
2754 
2755 static int
2756 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, int nvec)
2757 {
2758         int ret = pci_enable_msix_range(adapter->pdev,
2759                                         adapter->intr.msix_entries, nvec, nvec);
2760 
2761         if (ret == -ENOSPC && nvec > VMXNET3_LINUX_MIN_MSIX_VECT) {
2762                 dev_err(&adapter->netdev->dev,
2763                         "Failed to enable %d MSI-X, trying %d\n",
2764                         nvec, VMXNET3_LINUX_MIN_MSIX_VECT);
2765 
2766                 ret = pci_enable_msix_range(adapter->pdev,
2767                                             adapter->intr.msix_entries,
2768                                             VMXNET3_LINUX_MIN_MSIX_VECT,
2769                                             VMXNET3_LINUX_MIN_MSIX_VECT);
2770         }
2771 
2772         if (ret < 0) {
2773                 dev_err(&adapter->netdev->dev,
2774                         "Failed to enable MSI-X, error: %d\n", ret);
2775         }
2776 
2777         return ret;
2778 }
2779 
2780 
2781 #endif /* CONFIG_PCI_MSI */
2782 
2783 static void
2784 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2785 {
2786         u32 cfg;
2787         unsigned long flags;
2788 
2789         /* intr settings */
2790         spin_lock_irqsave(&adapter->cmd_lock, flags);
2791         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2792                                VMXNET3_CMD_GET_CONF_INTR);
2793         cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2794         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2795         adapter->intr.type = cfg & 0x3;
2796         adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2797 
2798         if (adapter->intr.type == VMXNET3_IT_AUTO) {
2799                 adapter->intr.type = VMXNET3_IT_MSIX;
2800         }
2801 
2802 #ifdef CONFIG_PCI_MSI
2803         if (adapter->intr.type == VMXNET3_IT_MSIX) {
2804                 int i, nvec;
2805 
2806                 nvec  = adapter->share_intr == VMXNET3_INTR_TXSHARE ?
2807                         1 : adapter->num_tx_queues;
2808                 nvec += adapter->share_intr == VMXNET3_INTR_BUDDYSHARE ?
2809                         0 : adapter->num_rx_queues;
2810                 nvec += 1;      /* for link event */
2811                 nvec = nvec > VMXNET3_LINUX_MIN_MSIX_VECT ?
2812                        nvec : VMXNET3_LINUX_MIN_MSIX_VECT;
2813 
2814                 for (i = 0; i < nvec; i++)
2815                         adapter->intr.msix_entries[i].entry = i;
2816 
2817                 nvec = vmxnet3_acquire_msix_vectors(adapter, nvec);
2818                 if (nvec < 0)
2819                         goto msix_err;
2820 
2821                 /* If we cannot allocate one MSIx vector per queue
2822                  * then limit the number of rx queues to 1
2823                  */
2824                 if (nvec == VMXNET3_LINUX_MIN_MSIX_VECT) {
2825                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
2826                             || adapter->num_rx_queues != 1) {
2827                                 adapter->share_intr = VMXNET3_INTR_TXSHARE;
2828                                 netdev_err(adapter->netdev,
2829                                            "Number of rx queues : 1\n");
2830                                 adapter->num_rx_queues = 1;
2831                         }
2832                 }
2833 
2834                 adapter->intr.num_intrs = nvec;
2835                 return;
2836 
2837 msix_err:
2838                 /* If we cannot allocate MSIx vectors use only one rx queue */
2839                 dev_info(&adapter->pdev->dev,
2840                          "Failed to enable MSI-X, error %d. "
2841                          "Limiting #rx queues to 1, try MSI.\n", nvec);
2842 
2843                 adapter->intr.type = VMXNET3_IT_MSI;
2844         }
2845 
2846         if (adapter->intr.type == VMXNET3_IT_MSI) {
2847                 if (!pci_enable_msi(adapter->pdev)) {
2848                         adapter->num_rx_queues = 1;
2849                         adapter->intr.num_intrs = 1;
2850                         return;
2851                 }
2852         }
2853 #endif /* CONFIG_PCI_MSI */
2854 
2855         adapter->num_rx_queues = 1;
2856         dev_info(&adapter->netdev->dev,
2857                  "Using INTx interrupt, #Rx queues: 1.\n");
2858         adapter->intr.type = VMXNET3_IT_INTX;
2859 
2860         /* INT-X related setting */
2861         adapter->intr.num_intrs = 1;
2862 }
2863 
2864 
2865 static void
2866 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
2867 {
2868         if (adapter->intr.type == VMXNET3_IT_MSIX)
2869                 pci_disable_msix(adapter->pdev);
2870         else if (adapter->intr.type == VMXNET3_IT_MSI)
2871                 pci_disable_msi(adapter->pdev);
2872         else
2873                 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
2874 }
2875 
2876 
2877 static void
2878 vmxnet3_tx_timeout(struct net_device *netdev)
2879 {
2880         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2881         adapter->tx_timeout_count++;
2882 
2883         netdev_err(adapter->netdev, "tx hang\n");
2884         schedule_work(&adapter->work);
2885         netif_wake_queue(adapter->netdev);
2886 }
2887 
2888 
2889 static void
2890 vmxnet3_reset_work(struct work_struct *data)
2891 {
2892         struct vmxnet3_adapter *adapter;
2893 
2894         adapter = container_of(data, struct vmxnet3_adapter, work);
2895 
2896         /* if another thread is resetting the device, no need to proceed */
2897         if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2898                 return;
2899 
2900         /* if the device is closed, we must leave it alone */
2901         rtnl_lock();
2902         if (netif_running(adapter->netdev)) {
2903                 netdev_notice(adapter->netdev, "resetting\n");
2904                 vmxnet3_quiesce_dev(adapter);
2905                 vmxnet3_reset_dev(adapter);
2906                 vmxnet3_activate_dev(adapter);
2907         } else {
2908                 netdev_info(adapter->netdev, "already closed\n");
2909         }
2910         rtnl_unlock();
2911 
2912         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2913 }
2914 
2915 
2916 static int
2917 vmxnet3_probe_device(struct pci_dev *pdev,
2918                      const struct pci_device_id *id)
2919 {
2920         static const struct net_device_ops vmxnet3_netdev_ops = {
2921                 .ndo_open = vmxnet3_open,
2922                 .ndo_stop = vmxnet3_close,
2923                 .ndo_start_xmit = vmxnet3_xmit_frame,
2924                 .ndo_set_mac_address = vmxnet3_set_mac_addr,
2925                 .ndo_change_mtu = vmxnet3_change_mtu,
2926                 .ndo_set_features = vmxnet3_set_features,
2927                 .ndo_get_stats64 = vmxnet3_get_stats64,
2928                 .ndo_tx_timeout = vmxnet3_tx_timeout,
2929                 .ndo_set_rx_mode = vmxnet3_set_mc,
2930                 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
2931                 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
2932 #ifdef CONFIG_NET_POLL_CONTROLLER
2933                 .ndo_poll_controller = vmxnet3_netpoll,
2934 #endif
2935         };
2936         int err;
2937         bool dma64 = false; /* stupid gcc */
2938         u32 ver;
2939         struct net_device *netdev;
2940         struct vmxnet3_adapter *adapter;
2941         u8 mac[ETH_ALEN];
2942         int size;
2943         int num_tx_queues;
2944         int num_rx_queues;
2945 
2946         if (!pci_msi_enabled())
2947                 enable_mq = 0;
2948 
2949 #ifdef VMXNET3_RSS
2950         if (enable_mq)
2951                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
2952                                     (int)num_online_cpus());
2953         else
2954 #endif
2955                 num_rx_queues = 1;
2956         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
2957 
2958         if (enable_mq)
2959                 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES,
2960                                     (int)num_online_cpus());
2961         else
2962                 num_tx_queues = 1;
2963 
2964         num_tx_queues = rounddown_pow_of_two(num_tx_queues);
2965         netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter),
2966                                    max(num_tx_queues, num_rx_queues));
2967         dev_info(&pdev->dev,
2968                  "# of Tx queues : %d, # of Rx queues : %d\n",
2969                  num_tx_queues, num_rx_queues);
2970 
2971         if (!netdev)
2972                 return -ENOMEM;
2973 
2974         pci_set_drvdata(pdev, netdev);
2975         adapter = netdev_priv(netdev);
2976         adapter->netdev = netdev;
2977         adapter->pdev = pdev;
2978 
2979         adapter->tx_ring_size = VMXNET3_DEF_TX_RING_SIZE;
2980         adapter->rx_ring_size = VMXNET3_DEF_RX_RING_SIZE;
2981         adapter->rx_ring2_size = VMXNET3_DEF_RX_RING2_SIZE;
2982 
2983         spin_lock_init(&adapter->cmd_lock);
2984         adapter->adapter_pa = dma_map_single(&adapter->pdev->dev, adapter,
2985                                              sizeof(struct vmxnet3_adapter),
2986                                              PCI_DMA_TODEVICE);
2987         adapter->shared = dma_alloc_coherent(
2988                                 &adapter->pdev->dev,
2989                                 sizeof(struct Vmxnet3_DriverShared),
2990                                 &adapter->shared_pa, GFP_KERNEL);
2991         if (!adapter->shared) {
2992                 dev_err(&pdev->dev, "Failed to allocate memory\n");
2993                 err = -ENOMEM;
2994                 goto err_alloc_shared;
2995         }
2996 
2997         adapter->num_rx_queues = num_rx_queues;
2998         adapter->num_tx_queues = num_tx_queues;
2999         adapter->rx_buf_per_pkt = 1;
3000 
3001         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3002         size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues;
3003         adapter->tqd_start = dma_alloc_coherent(&adapter->pdev->dev, size,
3004                                                 &adapter->queue_desc_pa,
3005                                                 GFP_KERNEL);
3006 
3007         if (!adapter->tqd_start) {
3008                 dev_err(&pdev->dev, "Failed to allocate memory\n");
3009                 err = -ENOMEM;
3010                 goto err_alloc_queue_desc;
3011         }
3012         adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start +
3013                                                             adapter->num_tx_queues);
3014 
3015         adapter->pm_conf = dma_alloc_coherent(&adapter->pdev->dev,
3016                                               sizeof(struct Vmxnet3_PMConf),
3017                                               &adapter->pm_conf_pa,
3018                                               GFP_KERNEL);
3019         if (adapter->pm_conf == NULL) {
3020                 err = -ENOMEM;
3021                 goto err_alloc_pm;
3022         }
3023 
3024 #ifdef VMXNET3_RSS
3025 
3026         adapter->rss_conf = dma_alloc_coherent(&adapter->pdev->dev,
3027                                                sizeof(struct UPT1_RSSConf),
3028                                                &adapter->rss_conf_pa,
3029                                                GFP_KERNEL);
3030         if (adapter->rss_conf == NULL) {
3031                 err = -ENOMEM;
3032                 goto err_alloc_rss;
3033         }
3034 #endif /* VMXNET3_RSS */
3035 
3036         err = vmxnet3_alloc_pci_resources(adapter, &dma64);
3037         if (err < 0)
3038                 goto err_alloc_pci;
3039 
3040         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
3041         if (ver & 1) {
3042                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
3043         } else {
3044                 dev_err(&pdev->dev,
3045                         "Incompatible h/w version (0x%x) for adapter\n", ver);
3046                 err = -EBUSY;
3047                 goto err_ver;
3048         }
3049 
3050         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
3051         if (ver & 1) {
3052                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
3053         } else {
3054                 dev_err(&pdev->dev,
3055                         "Incompatible upt version (0x%x) for adapter\n", ver);
3056                 err = -EBUSY;
3057                 goto err_ver;
3058         }
3059 
3060         SET_NETDEV_DEV(netdev, &pdev->dev);
3061         vmxnet3_declare_features(adapter, dma64);
3062 
3063         if (adapter->num_tx_queues == adapter->num_rx_queues)
3064                 adapter->share_intr = VMXNET3_INTR_BUDDYSHARE;
3065         else
3066                 adapter->share_intr = VMXNET3_INTR_DONTSHARE;
3067 
3068         vmxnet3_alloc_intr_resources(adapter);
3069 
3070 #ifdef VMXNET3_RSS
3071         if (adapter->num_rx_queues > 1 &&
3072             adapter->intr.type == VMXNET3_IT_MSIX) {
3073                 adapter->rss = true;
3074                 netdev->hw_features |= NETIF_F_RXHASH;
3075                 netdev->features |= NETIF_F_RXHASH;
3076                 dev_dbg(&pdev->dev, "RSS is enabled.\n");
3077         } else {
3078                 adapter->rss = false;
3079         }
3080 #endif
3081 
3082         vmxnet3_read_mac_addr(adapter, mac);
3083         memcpy(netdev->dev_addr,  mac, netdev->addr_len);
3084 
3085         netdev->netdev_ops = &vmxnet3_netdev_ops;
3086         vmxnet3_set_ethtool_ops(netdev);
3087         netdev->watchdog_timeo = 5 * HZ;
3088 
3089         INIT_WORK(&adapter->work, vmxnet3_reset_work);
3090         set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
3091 
3092         if (adapter->intr.type == VMXNET3_IT_MSIX) {
3093                 int i;
3094                 for (i = 0; i < adapter->num_rx_queues; i++) {
3095                         netif_napi_add(adapter->netdev,
3096                                        &adapter->rx_queue[i].napi,
3097                                        vmxnet3_poll_rx_only, 64);
3098                 }
3099         } else {
3100                 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi,
3101                                vmxnet3_poll, 64);
3102         }
3103 
3104         netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
3105         netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues);
3106 
3107         netif_carrier_off(netdev);
3108         err = register_netdev(netdev);
3109 
3110         if (err) {
3111                 dev_err(&pdev->dev, "Failed to register adapter\n");
3112                 goto err_register;
3113         }
3114 
3115         vmxnet3_check_link(adapter, false);
3116         return 0;
3117 
3118 err_register:
3119         vmxnet3_free_intr_resources(adapter);
3120 err_ver:
3121         vmxnet3_free_pci_resources(adapter);
3122 err_alloc_pci:
3123 #ifdef VMXNET3_RSS
3124         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3125                           adapter->rss_conf, adapter->rss_conf_pa);
3126 err_alloc_rss:
3127 #endif
3128         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3129                           adapter->pm_conf, adapter->pm_conf_pa);
3130 err_alloc_pm:
3131         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3132                           adapter->queue_desc_pa);
3133 err_alloc_queue_desc:
3134         dma_free_coherent(&adapter->pdev->dev,
3135                           sizeof(struct Vmxnet3_DriverShared),
3136                           adapter->shared, adapter->shared_pa);
3137 err_alloc_shared:
3138         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3139                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3140         free_netdev(netdev);
3141         return err;
3142 }
3143 
3144 
3145 static void
3146 vmxnet3_remove_device(struct pci_dev *pdev)
3147 {
3148         struct net_device *netdev = pci_get_drvdata(pdev);
3149         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3150         int size = 0;
3151         int num_rx_queues;
3152 
3153 #ifdef VMXNET3_RSS
3154         if (enable_mq)
3155                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3156                                     (int)num_online_cpus());
3157         else
3158 #endif
3159                 num_rx_queues = 1;
3160         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3161 
3162         cancel_work_sync(&adapter->work);
3163 
3164         unregister_netdev(netdev);
3165 
3166         vmxnet3_free_intr_resources(adapter);
3167         vmxnet3_free_pci_resources(adapter);
3168 #ifdef VMXNET3_RSS
3169         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3170                           adapter->rss_conf, adapter->rss_conf_pa);
3171 #endif
3172         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3173                           adapter->pm_conf, adapter->pm_conf_pa);
3174 
3175         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3176         size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues;
3177         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3178                           adapter->queue_desc_pa);
3179         dma_free_coherent(&adapter->pdev->dev,
3180                           sizeof(struct Vmxnet3_DriverShared),
3181                           adapter->shared, adapter->shared_pa);
3182         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3183                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3184         free_netdev(netdev);
3185 }
3186 
3187 
3188 #ifdef CONFIG_PM
3189 
3190 static int
3191 vmxnet3_suspend(struct device *device)
3192 {
3193         struct pci_dev *pdev = to_pci_dev(device);
3194         struct net_device *netdev = pci_get_drvdata(pdev);
3195         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3196         struct Vmxnet3_PMConf *pmConf;
3197         struct ethhdr *ehdr;
3198         struct arphdr *ahdr;
3199         u8 *arpreq;
3200         struct in_device *in_dev;
3201         struct in_ifaddr *ifa;
3202         unsigned long flags;
3203         int i = 0;
3204 
3205         if (!netif_running(netdev))
3206                 return 0;
3207 
3208         for (i = 0; i < adapter->num_rx_queues; i++)
3209                 napi_disable(&adapter->rx_queue[i].napi);
3210 
3211         vmxnet3_disable_all_intrs(adapter);
3212         vmxnet3_free_irqs(adapter);
3213         vmxnet3_free_intr_resources(adapter);
3214 
3215         netif_device_detach(netdev);
3216         netif_tx_stop_all_queues(netdev);
3217 
3218         /* Create wake-up filters. */
3219         pmConf = adapter->pm_conf;
3220         memset(pmConf, 0, sizeof(*pmConf));
3221 
3222         if (adapter->wol & WAKE_UCAST) {
3223                 pmConf->filters[i].patternSize = ETH_ALEN;
3224                 pmConf->filters[i].maskSize = 1;
3225                 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
3226                 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
3227 
3228                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3229                 i++;
3230         }
3231 
3232         if (adapter->wol & WAKE_ARP) {
3233                 in_dev = in_dev_get(netdev);
3234                 if (!in_dev)
3235                         goto skip_arp;
3236 
3237                 ifa = (struct in_ifaddr *)in_dev->ifa_list;
3238                 if (!ifa)
3239                         goto skip_arp;
3240 
3241                 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
3242                         sizeof(struct arphdr) +         /* ARP header */
3243                         2 * ETH_ALEN +          /* 2 Ethernet addresses*/
3244                         2 * sizeof(u32);        /*2 IPv4 addresses */
3245                 pmConf->filters[i].maskSize =
3246                         (pmConf->filters[i].patternSize - 1) / 8 + 1;
3247 
3248                 /* ETH_P_ARP in Ethernet header. */
3249                 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
3250                 ehdr->h_proto = htons(ETH_P_ARP);
3251 
3252                 /* ARPOP_REQUEST in ARP header. */
3253                 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
3254                 ahdr->ar_op = htons(ARPOP_REQUEST);
3255                 arpreq = (u8 *)(ahdr + 1);
3256 
3257                 /* The Unicast IPv4 address in 'tip' field. */
3258                 arpreq += 2 * ETH_ALEN + sizeof(u32);
3259                 *(u32 *)arpreq = ifa->ifa_address;
3260 
3261                 /* The mask for the relevant bits. */
3262                 pmConf->filters[i].mask[0] = 0x00;
3263                 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
3264                 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
3265                 pmConf->filters[i].mask[3] = 0x00;
3266                 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
3267                 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
3268                 in_dev_put(in_dev);
3269 
3270                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3271                 i++;
3272         }
3273 
3274 skip_arp:
3275         if (adapter->wol & WAKE_MAGIC)
3276                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC;
3277 
3278         pmConf->numFilters = i;
3279 
3280         adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3281         adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3282                                                                   *pmConf));
3283         adapter->shared->devRead.pmConfDesc.confPA =
3284                 cpu_to_le64(adapter->pm_conf_pa);
3285 
3286         spin_lock_irqsave(&adapter->cmd_lock, flags);
3287         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3288                                VMXNET3_CMD_UPDATE_PMCFG);
3289         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3290 
3291         pci_save_state(pdev);
3292         pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
3293                         adapter->wol);
3294         pci_disable_device(pdev);
3295         pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
3296 
3297         return 0;
3298 }
3299 
3300 
3301 static int
3302 vmxnet3_resume(struct device *device)
3303 {
3304         int err;
3305         unsigned long flags;
3306         struct pci_dev *pdev = to_pci_dev(device);
3307         struct net_device *netdev = pci_get_drvdata(pdev);
3308         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3309 
3310         if (!netif_running(netdev))
3311                 return 0;
3312 
3313         pci_set_power_state(pdev, PCI_D0);
3314         pci_restore_state(pdev);
3315         err = pci_enable_device_mem(pdev);
3316         if (err != 0)
3317                 return err;
3318 
3319         pci_enable_wake(pdev, PCI_D0, 0);
3320 
3321         vmxnet3_alloc_intr_resources(adapter);
3322 
3323         /* During hibernate and suspend, device has to be reinitialized as the
3324          * device state need not be preserved.
3325          */
3326 
3327         /* Need not check adapter state as other reset tasks cannot run during
3328          * device resume.
3329          */
3330         spin_lock_irqsave(&adapter->cmd_lock, flags);
3331         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3332                                VMXNET3_CMD_QUIESCE_DEV);
3333         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3334         vmxnet3_tq_cleanup_all(adapter);
3335         vmxnet3_rq_cleanup_all(adapter);
3336 
3337         vmxnet3_reset_dev(adapter);
3338         err = vmxnet3_activate_dev(adapter);
3339         if (err != 0) {
3340                 netdev_err(netdev,
3341                            "failed to re-activate on resume, error: %d", err);
3342                 vmxnet3_force_close(adapter);
3343                 return err;
3344         }
3345         netif_device_attach(netdev);
3346 
3347         return 0;
3348 }
3349 
3350 static const struct dev_pm_ops vmxnet3_pm_ops = {
3351         .suspend = vmxnet3_suspend,
3352         .resume = vmxnet3_resume,
3353         .freeze = vmxnet3_suspend,
3354         .restore = vmxnet3_resume,
3355 };
3356 #endif
3357 
3358 static struct pci_driver vmxnet3_driver = {
3359         .name           = vmxnet3_driver_name,
3360         .id_table       = vmxnet3_pciid_table,
3361         .probe          = vmxnet3_probe_device,
3362         .remove         = vmxnet3_remove_device,
3363 #ifdef CONFIG_PM
3364         .driver.pm      = &vmxnet3_pm_ops,
3365 #endif
3366 };
3367 
3368 
3369 static int __init
3370 vmxnet3_init_module(void)
3371 {
3372         pr_info("%s - version %s\n", VMXNET3_DRIVER_DESC,
3373                 VMXNET3_DRIVER_VERSION_REPORT);
3374         return pci_register_driver(&vmxnet3_driver);
3375 }
3376 
3377 module_init(vmxnet3_init_module);
3378 
3379 
3380 static void
3381 vmxnet3_exit_module(void)
3382 {
3383         pci_unregister_driver(&vmxnet3_driver);
3384 }
3385 
3386 module_exit(vmxnet3_exit_module);
3387 
3388 MODULE_AUTHOR("VMware, Inc.");
3389 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
3390 MODULE_LICENSE("GPL v2");
3391 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);
3392 

This page was automatically generated by LXR 0.3.1 (source).  •  Linux is a registered trademark of Linus Torvalds  •  Contact us