Version:  2.0.40 2.2.26 2.4.37 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5

Linux/drivers/net/vmxnet3/vmxnet3_drv.c

  1 /*
  2  * Linux driver for VMware's vmxnet3 ethernet NIC.
  3  *
  4  * Copyright (C) 2008-2009, VMware, Inc. All Rights Reserved.
  5  *
  6  * This program is free software; you can redistribute it and/or modify it
  7  * under the terms of the GNU General Public License as published by the
  8  * Free Software Foundation; version 2 of the License and no later version.
  9  *
 10  * This program is distributed in the hope that it will be useful, but
 11  * WITHOUT ANY WARRANTY; without even the implied warranty of
 12  * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 13  * NON INFRINGEMENT. See the GNU General Public License for more
 14  * details.
 15  *
 16  * You should have received a copy of the GNU General Public License
 17  * along with this program; if not, write to the Free Software
 18  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
 19  *
 20  * The full GNU General Public License is included in this distribution in
 21  * the file called "COPYING".
 22  *
 23  * Maintained by: Shreyas Bhatewara <pv-drivers@vmware.com>
 24  *
 25  */
 26 
 27 #include <linux/module.h>
 28 #include <net/ip6_checksum.h>
 29 
 30 #include "vmxnet3_int.h"
 31 
 32 char vmxnet3_driver_name[] = "vmxnet3";
 33 #define VMXNET3_DRIVER_DESC "VMware vmxnet3 virtual NIC driver"
 34 
 35 /*
 36  * PCI Device ID Table
 37  * Last entry must be all 0s
 38  */
 39 static const struct pci_device_id vmxnet3_pciid_table[] = {
 40         {PCI_VDEVICE(VMWARE, PCI_DEVICE_ID_VMWARE_VMXNET3)},
 41         {0}
 42 };
 43 
 44 MODULE_DEVICE_TABLE(pci, vmxnet3_pciid_table);
 45 
 46 static int enable_mq = 1;
 47 
 48 static void
 49 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac);
 50 
 51 /*
 52  *    Enable/Disable the given intr
 53  */
 54 static void
 55 vmxnet3_enable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
 56 {
 57         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 0);
 58 }
 59 
 60 
 61 static void
 62 vmxnet3_disable_intr(struct vmxnet3_adapter *adapter, unsigned intr_idx)
 63 {
 64         VMXNET3_WRITE_BAR0_REG(adapter, VMXNET3_REG_IMR + intr_idx * 8, 1);
 65 }
 66 
 67 
 68 /*
 69  *    Enable/Disable all intrs used by the device
 70  */
 71 static void
 72 vmxnet3_enable_all_intrs(struct vmxnet3_adapter *adapter)
 73 {
 74         int i;
 75 
 76         for (i = 0; i < adapter->intr.num_intrs; i++)
 77                 vmxnet3_enable_intr(adapter, i);
 78         adapter->shared->devRead.intrConf.intrCtrl &=
 79                                         cpu_to_le32(~VMXNET3_IC_DISABLE_ALL);
 80 }
 81 
 82 
 83 static void
 84 vmxnet3_disable_all_intrs(struct vmxnet3_adapter *adapter)
 85 {
 86         int i;
 87 
 88         adapter->shared->devRead.intrConf.intrCtrl |=
 89                                         cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
 90         for (i = 0; i < adapter->intr.num_intrs; i++)
 91                 vmxnet3_disable_intr(adapter, i);
 92 }
 93 
 94 
 95 static void
 96 vmxnet3_ack_events(struct vmxnet3_adapter *adapter, u32 events)
 97 {
 98         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_ECR, events);
 99 }
100 
101 
102 static bool
103 vmxnet3_tq_stopped(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
104 {
105         return tq->stopped;
106 }
107 
108 
109 static void
110 vmxnet3_tq_start(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
111 {
112         tq->stopped = false;
113         netif_start_subqueue(adapter->netdev, tq - adapter->tx_queue);
114 }
115 
116 
117 static void
118 vmxnet3_tq_wake(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
119 {
120         tq->stopped = false;
121         netif_wake_subqueue(adapter->netdev, (tq - adapter->tx_queue));
122 }
123 
124 
125 static void
126 vmxnet3_tq_stop(struct vmxnet3_tx_queue *tq, struct vmxnet3_adapter *adapter)
127 {
128         tq->stopped = true;
129         tq->num_stop++;
130         netif_stop_subqueue(adapter->netdev, (tq - adapter->tx_queue));
131 }
132 
133 
134 /*
135  * Check the link state. This may start or stop the tx queue.
136  */
137 static void
138 vmxnet3_check_link(struct vmxnet3_adapter *adapter, bool affectTxQueue)
139 {
140         u32 ret;
141         int i;
142         unsigned long flags;
143 
144         spin_lock_irqsave(&adapter->cmd_lock, flags);
145         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_GET_LINK);
146         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
147         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
148 
149         adapter->link_speed = ret >> 16;
150         if (ret & 1) { /* Link is up. */
151                 netdev_info(adapter->netdev, "NIC Link is Up %d Mbps\n",
152                             adapter->link_speed);
153                 netif_carrier_on(adapter->netdev);
154 
155                 if (affectTxQueue) {
156                         for (i = 0; i < adapter->num_tx_queues; i++)
157                                 vmxnet3_tq_start(&adapter->tx_queue[i],
158                                                  adapter);
159                 }
160         } else {
161                 netdev_info(adapter->netdev, "NIC Link is Down\n");
162                 netif_carrier_off(adapter->netdev);
163 
164                 if (affectTxQueue) {
165                         for (i = 0; i < adapter->num_tx_queues; i++)
166                                 vmxnet3_tq_stop(&adapter->tx_queue[i], adapter);
167                 }
168         }
169 }
170 
171 static void
172 vmxnet3_process_events(struct vmxnet3_adapter *adapter)
173 {
174         int i;
175         unsigned long flags;
176         u32 events = le32_to_cpu(adapter->shared->ecr);
177         if (!events)
178                 return;
179 
180         vmxnet3_ack_events(adapter, events);
181 
182         /* Check if link state has changed */
183         if (events & VMXNET3_ECR_LINK)
184                 vmxnet3_check_link(adapter, true);
185 
186         /* Check if there is an error on xmit/recv queues */
187         if (events & (VMXNET3_ECR_TQERR | VMXNET3_ECR_RQERR)) {
188                 spin_lock_irqsave(&adapter->cmd_lock, flags);
189                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
190                                        VMXNET3_CMD_GET_QUEUE_STATUS);
191                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
192 
193                 for (i = 0; i < adapter->num_tx_queues; i++)
194                         if (adapter->tqd_start[i].status.stopped)
195                                 dev_err(&adapter->netdev->dev,
196                                         "%s: tq[%d] error 0x%x\n",
197                                         adapter->netdev->name, i, le32_to_cpu(
198                                         adapter->tqd_start[i].status.error));
199                 for (i = 0; i < adapter->num_rx_queues; i++)
200                         if (adapter->rqd_start[i].status.stopped)
201                                 dev_err(&adapter->netdev->dev,
202                                         "%s: rq[%d] error 0x%x\n",
203                                         adapter->netdev->name, i,
204                                         adapter->rqd_start[i].status.error);
205 
206                 schedule_work(&adapter->work);
207         }
208 }
209 
210 #ifdef __BIG_ENDIAN_BITFIELD
211 /*
212  * The device expects the bitfields in shared structures to be written in
213  * little endian. When CPU is big endian, the following routines are used to
214  * correctly read and write into ABI.
215  * The general technique used here is : double word bitfields are defined in
216  * opposite order for big endian architecture. Then before reading them in
217  * driver the complete double word is translated using le32_to_cpu. Similarly
218  * After the driver writes into bitfields, cpu_to_le32 is used to translate the
219  * double words into required format.
220  * In order to avoid touching bits in shared structure more than once, temporary
221  * descriptors are used. These are passed as srcDesc to following functions.
222  */
223 static void vmxnet3_RxDescToCPU(const struct Vmxnet3_RxDesc *srcDesc,
224                                 struct Vmxnet3_RxDesc *dstDesc)
225 {
226         u32 *src = (u32 *)srcDesc + 2;
227         u32 *dst = (u32 *)dstDesc + 2;
228         dstDesc->addr = le64_to_cpu(srcDesc->addr);
229         *dst = le32_to_cpu(*src);
230         dstDesc->ext1 = le32_to_cpu(srcDesc->ext1);
231 }
232 
233 static void vmxnet3_TxDescToLe(const struct Vmxnet3_TxDesc *srcDesc,
234                                struct Vmxnet3_TxDesc *dstDesc)
235 {
236         int i;
237         u32 *src = (u32 *)(srcDesc + 1);
238         u32 *dst = (u32 *)(dstDesc + 1);
239 
240         /* Working backwards so that the gen bit is set at the end. */
241         for (i = 2; i > 0; i--) {
242                 src--;
243                 dst--;
244                 *dst = cpu_to_le32(*src);
245         }
246 }
247 
248 
249 static void vmxnet3_RxCompToCPU(const struct Vmxnet3_RxCompDesc *srcDesc,
250                                 struct Vmxnet3_RxCompDesc *dstDesc)
251 {
252         int i = 0;
253         u32 *src = (u32 *)srcDesc;
254         u32 *dst = (u32 *)dstDesc;
255         for (i = 0; i < sizeof(struct Vmxnet3_RxCompDesc) / sizeof(u32); i++) {
256                 *dst = le32_to_cpu(*src);
257                 src++;
258                 dst++;
259         }
260 }
261 
262 
263 /* Used to read bitfield values from double words. */
264 static u32 get_bitfield32(const __le32 *bitfield, u32 pos, u32 size)
265 {
266         u32 temp = le32_to_cpu(*bitfield);
267         u32 mask = ((1 << size) - 1) << pos;
268         temp &= mask;
269         temp >>= pos;
270         return temp;
271 }
272 
273 
274 
275 #endif  /* __BIG_ENDIAN_BITFIELD */
276 
277 #ifdef __BIG_ENDIAN_BITFIELD
278 
279 #   define VMXNET3_TXDESC_GET_GEN(txdesc) get_bitfield32(((const __le32 *) \
280                         txdesc) + VMXNET3_TXD_GEN_DWORD_SHIFT, \
281                         VMXNET3_TXD_GEN_SHIFT, VMXNET3_TXD_GEN_SIZE)
282 #   define VMXNET3_TXDESC_GET_EOP(txdesc) get_bitfield32(((const __le32 *) \
283                         txdesc) + VMXNET3_TXD_EOP_DWORD_SHIFT, \
284                         VMXNET3_TXD_EOP_SHIFT, VMXNET3_TXD_EOP_SIZE)
285 #   define VMXNET3_TCD_GET_GEN(tcd) get_bitfield32(((const __le32 *)tcd) + \
286                         VMXNET3_TCD_GEN_DWORD_SHIFT, VMXNET3_TCD_GEN_SHIFT, \
287                         VMXNET3_TCD_GEN_SIZE)
288 #   define VMXNET3_TCD_GET_TXIDX(tcd) get_bitfield32((const __le32 *)tcd, \
289                         VMXNET3_TCD_TXIDX_SHIFT, VMXNET3_TCD_TXIDX_SIZE)
290 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) do { \
291                         (dstrcd) = (tmp); \
292                         vmxnet3_RxCompToCPU((rcd), (tmp)); \
293                 } while (0)
294 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) do { \
295                         (dstrxd) = (tmp); \
296                         vmxnet3_RxDescToCPU((rxd), (tmp)); \
297                 } while (0)
298 
299 #else
300 
301 #   define VMXNET3_TXDESC_GET_GEN(txdesc) ((txdesc)->gen)
302 #   define VMXNET3_TXDESC_GET_EOP(txdesc) ((txdesc)->eop)
303 #   define VMXNET3_TCD_GET_GEN(tcd) ((tcd)->gen)
304 #   define VMXNET3_TCD_GET_TXIDX(tcd) ((tcd)->txdIdx)
305 #   define vmxnet3_getRxComp(dstrcd, rcd, tmp) (dstrcd) = (rcd)
306 #   define vmxnet3_getRxDesc(dstrxd, rxd, tmp) (dstrxd) = (rxd)
307 
308 #endif /* __BIG_ENDIAN_BITFIELD  */
309 
310 
311 static void
312 vmxnet3_unmap_tx_buf(struct vmxnet3_tx_buf_info *tbi,
313                      struct pci_dev *pdev)
314 {
315         if (tbi->map_type == VMXNET3_MAP_SINGLE)
316                 dma_unmap_single(&pdev->dev, tbi->dma_addr, tbi->len,
317                                  PCI_DMA_TODEVICE);
318         else if (tbi->map_type == VMXNET3_MAP_PAGE)
319                 dma_unmap_page(&pdev->dev, tbi->dma_addr, tbi->len,
320                                PCI_DMA_TODEVICE);
321         else
322                 BUG_ON(tbi->map_type != VMXNET3_MAP_NONE);
323 
324         tbi->map_type = VMXNET3_MAP_NONE; /* to help debugging */
325 }
326 
327 
328 static int
329 vmxnet3_unmap_pkt(u32 eop_idx, struct vmxnet3_tx_queue *tq,
330                   struct pci_dev *pdev, struct vmxnet3_adapter *adapter)
331 {
332         struct sk_buff *skb;
333         int entries = 0;
334 
335         /* no out of order completion */
336         BUG_ON(tq->buf_info[eop_idx].sop_idx != tq->tx_ring.next2comp);
337         BUG_ON(VMXNET3_TXDESC_GET_EOP(&(tq->tx_ring.base[eop_idx].txd)) != 1);
338 
339         skb = tq->buf_info[eop_idx].skb;
340         BUG_ON(skb == NULL);
341         tq->buf_info[eop_idx].skb = NULL;
342 
343         VMXNET3_INC_RING_IDX_ONLY(eop_idx, tq->tx_ring.size);
344 
345         while (tq->tx_ring.next2comp != eop_idx) {
346                 vmxnet3_unmap_tx_buf(tq->buf_info + tq->tx_ring.next2comp,
347                                      pdev);
348 
349                 /* update next2comp w/o tx_lock. Since we are marking more,
350                  * instead of less, tx ring entries avail, the worst case is
351                  * that the tx routine incorrectly re-queues a pkt due to
352                  * insufficient tx ring entries.
353                  */
354                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
355                 entries++;
356         }
357 
358         dev_kfree_skb_any(skb);
359         return entries;
360 }
361 
362 
363 static int
364 vmxnet3_tq_tx_complete(struct vmxnet3_tx_queue *tq,
365                         struct vmxnet3_adapter *adapter)
366 {
367         int completed = 0;
368         union Vmxnet3_GenericDesc *gdesc;
369 
370         gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
371         while (VMXNET3_TCD_GET_GEN(&gdesc->tcd) == tq->comp_ring.gen) {
372                 completed += vmxnet3_unmap_pkt(VMXNET3_TCD_GET_TXIDX(
373                                                &gdesc->tcd), tq, adapter->pdev,
374                                                adapter);
375 
376                 vmxnet3_comp_ring_adv_next2proc(&tq->comp_ring);
377                 gdesc = tq->comp_ring.base + tq->comp_ring.next2proc;
378         }
379 
380         if (completed) {
381                 spin_lock(&tq->tx_lock);
382                 if (unlikely(vmxnet3_tq_stopped(tq, adapter) &&
383                              vmxnet3_cmd_ring_desc_avail(&tq->tx_ring) >
384                              VMXNET3_WAKE_QUEUE_THRESHOLD(tq) &&
385                              netif_carrier_ok(adapter->netdev))) {
386                         vmxnet3_tq_wake(tq, adapter);
387                 }
388                 spin_unlock(&tq->tx_lock);
389         }
390         return completed;
391 }
392 
393 
394 static void
395 vmxnet3_tq_cleanup(struct vmxnet3_tx_queue *tq,
396                    struct vmxnet3_adapter *adapter)
397 {
398         int i;
399 
400         while (tq->tx_ring.next2comp != tq->tx_ring.next2fill) {
401                 struct vmxnet3_tx_buf_info *tbi;
402 
403                 tbi = tq->buf_info + tq->tx_ring.next2comp;
404 
405                 vmxnet3_unmap_tx_buf(tbi, adapter->pdev);
406                 if (tbi->skb) {
407                         dev_kfree_skb_any(tbi->skb);
408                         tbi->skb = NULL;
409                 }
410                 vmxnet3_cmd_ring_adv_next2comp(&tq->tx_ring);
411         }
412 
413         /* sanity check, verify all buffers are indeed unmapped and freed */
414         for (i = 0; i < tq->tx_ring.size; i++) {
415                 BUG_ON(tq->buf_info[i].skb != NULL ||
416                        tq->buf_info[i].map_type != VMXNET3_MAP_NONE);
417         }
418 
419         tq->tx_ring.gen = VMXNET3_INIT_GEN;
420         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
421 
422         tq->comp_ring.gen = VMXNET3_INIT_GEN;
423         tq->comp_ring.next2proc = 0;
424 }
425 
426 
427 static void
428 vmxnet3_tq_destroy(struct vmxnet3_tx_queue *tq,
429                    struct vmxnet3_adapter *adapter)
430 {
431         if (tq->tx_ring.base) {
432                 dma_free_coherent(&adapter->pdev->dev, tq->tx_ring.size *
433                                   sizeof(struct Vmxnet3_TxDesc),
434                                   tq->tx_ring.base, tq->tx_ring.basePA);
435                 tq->tx_ring.base = NULL;
436         }
437         if (tq->data_ring.base) {
438                 dma_free_coherent(&adapter->pdev->dev, tq->data_ring.size *
439                                   sizeof(struct Vmxnet3_TxDataDesc),
440                                   tq->data_ring.base, tq->data_ring.basePA);
441                 tq->data_ring.base = NULL;
442         }
443         if (tq->comp_ring.base) {
444                 dma_free_coherent(&adapter->pdev->dev, tq->comp_ring.size *
445                                   sizeof(struct Vmxnet3_TxCompDesc),
446                                   tq->comp_ring.base, tq->comp_ring.basePA);
447                 tq->comp_ring.base = NULL;
448         }
449         if (tq->buf_info) {
450                 dma_free_coherent(&adapter->pdev->dev,
451                                   tq->tx_ring.size * sizeof(tq->buf_info[0]),
452                                   tq->buf_info, tq->buf_info_pa);
453                 tq->buf_info = NULL;
454         }
455 }
456 
457 
458 /* Destroy all tx queues */
459 void
460 vmxnet3_tq_destroy_all(struct vmxnet3_adapter *adapter)
461 {
462         int i;
463 
464         for (i = 0; i < adapter->num_tx_queues; i++)
465                 vmxnet3_tq_destroy(&adapter->tx_queue[i], adapter);
466 }
467 
468 
469 static void
470 vmxnet3_tq_init(struct vmxnet3_tx_queue *tq,
471                 struct vmxnet3_adapter *adapter)
472 {
473         int i;
474 
475         /* reset the tx ring contents to 0 and reset the tx ring states */
476         memset(tq->tx_ring.base, 0, tq->tx_ring.size *
477                sizeof(struct Vmxnet3_TxDesc));
478         tq->tx_ring.next2fill = tq->tx_ring.next2comp = 0;
479         tq->tx_ring.gen = VMXNET3_INIT_GEN;
480 
481         memset(tq->data_ring.base, 0, tq->data_ring.size *
482                sizeof(struct Vmxnet3_TxDataDesc));
483 
484         /* reset the tx comp ring contents to 0 and reset comp ring states */
485         memset(tq->comp_ring.base, 0, tq->comp_ring.size *
486                sizeof(struct Vmxnet3_TxCompDesc));
487         tq->comp_ring.next2proc = 0;
488         tq->comp_ring.gen = VMXNET3_INIT_GEN;
489 
490         /* reset the bookkeeping data */
491         memset(tq->buf_info, 0, sizeof(tq->buf_info[0]) * tq->tx_ring.size);
492         for (i = 0; i < tq->tx_ring.size; i++)
493                 tq->buf_info[i].map_type = VMXNET3_MAP_NONE;
494 
495         /* stats are not reset */
496 }
497 
498 
499 static int
500 vmxnet3_tq_create(struct vmxnet3_tx_queue *tq,
501                   struct vmxnet3_adapter *adapter)
502 {
503         size_t sz;
504 
505         BUG_ON(tq->tx_ring.base || tq->data_ring.base ||
506                tq->comp_ring.base || tq->buf_info);
507 
508         tq->tx_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
509                         tq->tx_ring.size * sizeof(struct Vmxnet3_TxDesc),
510                         &tq->tx_ring.basePA, GFP_KERNEL);
511         if (!tq->tx_ring.base) {
512                 netdev_err(adapter->netdev, "failed to allocate tx ring\n");
513                 goto err;
514         }
515 
516         tq->data_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
517                         tq->data_ring.size * sizeof(struct Vmxnet3_TxDataDesc),
518                         &tq->data_ring.basePA, GFP_KERNEL);
519         if (!tq->data_ring.base) {
520                 netdev_err(adapter->netdev, "failed to allocate data ring\n");
521                 goto err;
522         }
523 
524         tq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev,
525                         tq->comp_ring.size * sizeof(struct Vmxnet3_TxCompDesc),
526                         &tq->comp_ring.basePA, GFP_KERNEL);
527         if (!tq->comp_ring.base) {
528                 netdev_err(adapter->netdev, "failed to allocate tx comp ring\n");
529                 goto err;
530         }
531 
532         sz = tq->tx_ring.size * sizeof(tq->buf_info[0]);
533         tq->buf_info = dma_zalloc_coherent(&adapter->pdev->dev, sz,
534                                            &tq->buf_info_pa, GFP_KERNEL);
535         if (!tq->buf_info)
536                 goto err;
537 
538         return 0;
539 
540 err:
541         vmxnet3_tq_destroy(tq, adapter);
542         return -ENOMEM;
543 }
544 
545 static void
546 vmxnet3_tq_cleanup_all(struct vmxnet3_adapter *adapter)
547 {
548         int i;
549 
550         for (i = 0; i < adapter->num_tx_queues; i++)
551                 vmxnet3_tq_cleanup(&adapter->tx_queue[i], adapter);
552 }
553 
554 /*
555  *    starting from ring->next2fill, allocate rx buffers for the given ring
556  *    of the rx queue and update the rx desc. stop after @num_to_alloc buffers
557  *    are allocated or allocation fails
558  */
559 
560 static int
561 vmxnet3_rq_alloc_rx_buf(struct vmxnet3_rx_queue *rq, u32 ring_idx,
562                         int num_to_alloc, struct vmxnet3_adapter *adapter)
563 {
564         int num_allocated = 0;
565         struct vmxnet3_rx_buf_info *rbi_base = rq->buf_info[ring_idx];
566         struct vmxnet3_cmd_ring *ring = &rq->rx_ring[ring_idx];
567         u32 val;
568 
569         while (num_allocated <= num_to_alloc) {
570                 struct vmxnet3_rx_buf_info *rbi;
571                 union Vmxnet3_GenericDesc *gd;
572 
573                 rbi = rbi_base + ring->next2fill;
574                 gd = ring->base + ring->next2fill;
575 
576                 if (rbi->buf_type == VMXNET3_RX_BUF_SKB) {
577                         if (rbi->skb == NULL) {
578                                 rbi->skb = __netdev_alloc_skb_ip_align(adapter->netdev,
579                                                                        rbi->len,
580                                                                        GFP_KERNEL);
581                                 if (unlikely(rbi->skb == NULL)) {
582                                         rq->stats.rx_buf_alloc_failure++;
583                                         break;
584                                 }
585 
586                                 rbi->dma_addr = dma_map_single(
587                                                 &adapter->pdev->dev,
588                                                 rbi->skb->data, rbi->len,
589                                                 PCI_DMA_FROMDEVICE);
590                                 if (dma_mapping_error(&adapter->pdev->dev,
591                                                       rbi->dma_addr)) {
592                                         dev_kfree_skb_any(rbi->skb);
593                                         rq->stats.rx_buf_alloc_failure++;
594                                         break;
595                                 }
596                         } else {
597                                 /* rx buffer skipped by the device */
598                         }
599                         val = VMXNET3_RXD_BTYPE_HEAD << VMXNET3_RXD_BTYPE_SHIFT;
600                 } else {
601                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE ||
602                                rbi->len  != PAGE_SIZE);
603 
604                         if (rbi->page == NULL) {
605                                 rbi->page = alloc_page(GFP_ATOMIC);
606                                 if (unlikely(rbi->page == NULL)) {
607                                         rq->stats.rx_buf_alloc_failure++;
608                                         break;
609                                 }
610                                 rbi->dma_addr = dma_map_page(
611                                                 &adapter->pdev->dev,
612                                                 rbi->page, 0, PAGE_SIZE,
613                                                 PCI_DMA_FROMDEVICE);
614                                 if (dma_mapping_error(&adapter->pdev->dev,
615                                                       rbi->dma_addr)) {
616                                         put_page(rbi->page);
617                                         rq->stats.rx_buf_alloc_failure++;
618                                         break;
619                                 }
620                         } else {
621                                 /* rx buffers skipped by the device */
622                         }
623                         val = VMXNET3_RXD_BTYPE_BODY << VMXNET3_RXD_BTYPE_SHIFT;
624                 }
625 
626                 gd->rxd.addr = cpu_to_le64(rbi->dma_addr);
627                 gd->dword[2] = cpu_to_le32((!ring->gen << VMXNET3_RXD_GEN_SHIFT)
628                                            | val | rbi->len);
629 
630                 /* Fill the last buffer but dont mark it ready, or else the
631                  * device will think that the queue is full */
632                 if (num_allocated == num_to_alloc)
633                         break;
634 
635                 gd->dword[2] |= cpu_to_le32(ring->gen << VMXNET3_RXD_GEN_SHIFT);
636                 num_allocated++;
637                 vmxnet3_cmd_ring_adv_next2fill(ring);
638         }
639 
640         netdev_dbg(adapter->netdev,
641                 "alloc_rx_buf: %d allocated, next2fill %u, next2comp %u\n",
642                 num_allocated, ring->next2fill, ring->next2comp);
643 
644         /* so that the device can distinguish a full ring and an empty ring */
645         BUG_ON(num_allocated != 0 && ring->next2fill == ring->next2comp);
646 
647         return num_allocated;
648 }
649 
650 
651 static void
652 vmxnet3_append_frag(struct sk_buff *skb, struct Vmxnet3_RxCompDesc *rcd,
653                     struct vmxnet3_rx_buf_info *rbi)
654 {
655         struct skb_frag_struct *frag = skb_shinfo(skb)->frags +
656                 skb_shinfo(skb)->nr_frags;
657 
658         BUG_ON(skb_shinfo(skb)->nr_frags >= MAX_SKB_FRAGS);
659 
660         __skb_frag_set_page(frag, rbi->page);
661         frag->page_offset = 0;
662         skb_frag_size_set(frag, rcd->len);
663         skb->data_len += rcd->len;
664         skb->truesize += PAGE_SIZE;
665         skb_shinfo(skb)->nr_frags++;
666 }
667 
668 
669 static int
670 vmxnet3_map_pkt(struct sk_buff *skb, struct vmxnet3_tx_ctx *ctx,
671                 struct vmxnet3_tx_queue *tq, struct pci_dev *pdev,
672                 struct vmxnet3_adapter *adapter)
673 {
674         u32 dw2, len;
675         unsigned long buf_offset;
676         int i;
677         union Vmxnet3_GenericDesc *gdesc;
678         struct vmxnet3_tx_buf_info *tbi = NULL;
679 
680         BUG_ON(ctx->copy_size > skb_headlen(skb));
681 
682         /* use the previous gen bit for the SOP desc */
683         dw2 = (tq->tx_ring.gen ^ 0x1) << VMXNET3_TXD_GEN_SHIFT;
684 
685         ctx->sop_txd = tq->tx_ring.base + tq->tx_ring.next2fill;
686         gdesc = ctx->sop_txd; /* both loops below can be skipped */
687 
688         /* no need to map the buffer if headers are copied */
689         if (ctx->copy_size) {
690                 ctx->sop_txd->txd.addr = cpu_to_le64(tq->data_ring.basePA +
691                                         tq->tx_ring.next2fill *
692                                         sizeof(struct Vmxnet3_TxDataDesc));
693                 ctx->sop_txd->dword[2] = cpu_to_le32(dw2 | ctx->copy_size);
694                 ctx->sop_txd->dword[3] = 0;
695 
696                 tbi = tq->buf_info + tq->tx_ring.next2fill;
697                 tbi->map_type = VMXNET3_MAP_NONE;
698 
699                 netdev_dbg(adapter->netdev,
700                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
701                         tq->tx_ring.next2fill,
702                         le64_to_cpu(ctx->sop_txd->txd.addr),
703                         ctx->sop_txd->dword[2], ctx->sop_txd->dword[3]);
704                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
705 
706                 /* use the right gen for non-SOP desc */
707                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
708         }
709 
710         /* linear part can use multiple tx desc if it's big */
711         len = skb_headlen(skb) - ctx->copy_size;
712         buf_offset = ctx->copy_size;
713         while (len) {
714                 u32 buf_size;
715 
716                 if (len < VMXNET3_MAX_TX_BUF_SIZE) {
717                         buf_size = len;
718                         dw2 |= len;
719                 } else {
720                         buf_size = VMXNET3_MAX_TX_BUF_SIZE;
721                         /* spec says that for TxDesc.len, 0 == 2^14 */
722                 }
723 
724                 tbi = tq->buf_info + tq->tx_ring.next2fill;
725                 tbi->map_type = VMXNET3_MAP_SINGLE;
726                 tbi->dma_addr = dma_map_single(&adapter->pdev->dev,
727                                 skb->data + buf_offset, buf_size,
728                                 PCI_DMA_TODEVICE);
729                 if (dma_mapping_error(&adapter->pdev->dev, tbi->dma_addr))
730                         return -EFAULT;
731 
732                 tbi->len = buf_size;
733 
734                 gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
735                 BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
736 
737                 gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
738                 gdesc->dword[2] = cpu_to_le32(dw2);
739                 gdesc->dword[3] = 0;
740 
741                 netdev_dbg(adapter->netdev,
742                         "txd[%u]: 0x%Lx 0x%x 0x%x\n",
743                         tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
744                         le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
745                 vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
746                 dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
747 
748                 len -= buf_size;
749                 buf_offset += buf_size;
750         }
751 
752         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
753                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
754                 u32 buf_size;
755 
756                 buf_offset = 0;
757                 len = skb_frag_size(frag);
758                 while (len) {
759                         tbi = tq->buf_info + tq->tx_ring.next2fill;
760                         if (len < VMXNET3_MAX_TX_BUF_SIZE) {
761                                 buf_size = len;
762                                 dw2 |= len;
763                         } else {
764                                 buf_size = VMXNET3_MAX_TX_BUF_SIZE;
765                                 /* spec says that for TxDesc.len, 0 == 2^14 */
766                         }
767                         tbi->map_type = VMXNET3_MAP_PAGE;
768                         tbi->dma_addr = skb_frag_dma_map(&adapter->pdev->dev, frag,
769                                                          buf_offset, buf_size,
770                                                          DMA_TO_DEVICE);
771                         if (dma_mapping_error(&adapter->pdev->dev, tbi->dma_addr))
772                                 return -EFAULT;
773 
774                         tbi->len = buf_size;
775 
776                         gdesc = tq->tx_ring.base + tq->tx_ring.next2fill;
777                         BUG_ON(gdesc->txd.gen == tq->tx_ring.gen);
778 
779                         gdesc->txd.addr = cpu_to_le64(tbi->dma_addr);
780                         gdesc->dword[2] = cpu_to_le32(dw2);
781                         gdesc->dword[3] = 0;
782 
783                         netdev_dbg(adapter->netdev,
784                                 "txd[%u]: 0x%llx %u %u\n",
785                                 tq->tx_ring.next2fill, le64_to_cpu(gdesc->txd.addr),
786                                 le32_to_cpu(gdesc->dword[2]), gdesc->dword[3]);
787                         vmxnet3_cmd_ring_adv_next2fill(&tq->tx_ring);
788                         dw2 = tq->tx_ring.gen << VMXNET3_TXD_GEN_SHIFT;
789 
790                         len -= buf_size;
791                         buf_offset += buf_size;
792                 }
793         }
794 
795         ctx->eop_txd = gdesc;
796 
797         /* set the last buf_info for the pkt */
798         tbi->skb = skb;
799         tbi->sop_idx = ctx->sop_txd - tq->tx_ring.base;
800 
801         return 0;
802 }
803 
804 
805 /* Init all tx queues */
806 static void
807 vmxnet3_tq_init_all(struct vmxnet3_adapter *adapter)
808 {
809         int i;
810 
811         for (i = 0; i < adapter->num_tx_queues; i++)
812                 vmxnet3_tq_init(&adapter->tx_queue[i], adapter);
813 }
814 
815 
816 /*
817  *    parse relevant protocol headers:
818  *      For a tso pkt, relevant headers are L2/3/4 including options
819  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
820  *      if it's a TCP/UDP pkt
821  *
822  * Returns:
823  *    -1:  error happens during parsing
824  *     0:  protocol headers parsed, but too big to be copied
825  *     1:  protocol headers parsed and copied
826  *
827  * Other effects:
828  *    1. related *ctx fields are updated.
829  *    2. ctx->copy_size is # of bytes copied
830  *    3. the portion to be copied is guaranteed to be in the linear part
831  *
832  */
833 static int
834 vmxnet3_parse_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
835                   struct vmxnet3_tx_ctx *ctx,
836                   struct vmxnet3_adapter *adapter)
837 {
838         u8 protocol = 0;
839 
840         if (ctx->mss) { /* TSO */
841                 ctx->eth_ip_hdr_size = skb_transport_offset(skb);
842                 ctx->l4_hdr_size = tcp_hdrlen(skb);
843                 ctx->copy_size = ctx->eth_ip_hdr_size + ctx->l4_hdr_size;
844         } else {
845                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
846                         ctx->eth_ip_hdr_size = skb_checksum_start_offset(skb);
847 
848                         if (ctx->ipv4) {
849                                 const struct iphdr *iph = ip_hdr(skb);
850 
851                                 protocol = iph->protocol;
852                         } else if (ctx->ipv6) {
853                                 const struct ipv6hdr *ipv6h = ipv6_hdr(skb);
854 
855                                 protocol = ipv6h->nexthdr;
856                         }
857 
858                         switch (protocol) {
859                         case IPPROTO_TCP:
860                                 ctx->l4_hdr_size = tcp_hdrlen(skb);
861                                 break;
862                         case IPPROTO_UDP:
863                                 ctx->l4_hdr_size = sizeof(struct udphdr);
864                                 break;
865                         default:
866                                 ctx->l4_hdr_size = 0;
867                                 break;
868                         }
869 
870                         ctx->copy_size = min(ctx->eth_ip_hdr_size +
871                                          ctx->l4_hdr_size, skb->len);
872                 } else {
873                         ctx->eth_ip_hdr_size = 0;
874                         ctx->l4_hdr_size = 0;
875                         /* copy as much as allowed */
876                         ctx->copy_size = min((unsigned int)VMXNET3_HDR_COPY_SIZE
877                                              , skb_headlen(skb));
878                 }
879 
880                 if (skb->len <= VMXNET3_HDR_COPY_SIZE)
881                         ctx->copy_size = skb->len;
882 
883                 /* make sure headers are accessible directly */
884                 if (unlikely(!pskb_may_pull(skb, ctx->copy_size)))
885                         goto err;
886         }
887 
888         if (unlikely(ctx->copy_size > VMXNET3_HDR_COPY_SIZE)) {
889                 tq->stats.oversized_hdr++;
890                 ctx->copy_size = 0;
891                 return 0;
892         }
893 
894         return 1;
895 err:
896         return -1;
897 }
898 
899 /*
900  *    copy relevant protocol headers to the transmit ring:
901  *      For a tso pkt, relevant headers are L2/3/4 including options
902  *      For a pkt requesting csum offloading, they are L2/3 and may include L4
903  *      if it's a TCP/UDP pkt
904  *
905  *
906  *    Note that this requires that vmxnet3_parse_hdr be called first to set the
907  *      appropriate bits in ctx first
908  */
909 static void
910 vmxnet3_copy_hdr(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
911                  struct vmxnet3_tx_ctx *ctx,
912                  struct vmxnet3_adapter *adapter)
913 {
914         struct Vmxnet3_TxDataDesc *tdd;
915 
916         tdd = tq->data_ring.base + tq->tx_ring.next2fill;
917 
918         memcpy(tdd->data, skb->data, ctx->copy_size);
919         netdev_dbg(adapter->netdev,
920                 "copy %u bytes to dataRing[%u]\n",
921                 ctx->copy_size, tq->tx_ring.next2fill);
922 }
923 
924 
925 static void
926 vmxnet3_prepare_tso(struct sk_buff *skb,
927                     struct vmxnet3_tx_ctx *ctx)
928 {
929         struct tcphdr *tcph = tcp_hdr(skb);
930 
931         if (ctx->ipv4) {
932                 struct iphdr *iph = ip_hdr(skb);
933 
934                 iph->check = 0;
935                 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 0,
936                                                  IPPROTO_TCP, 0);
937         } else if (ctx->ipv6) {
938                 struct ipv6hdr *iph = ipv6_hdr(skb);
939 
940                 tcph->check = ~csum_ipv6_magic(&iph->saddr, &iph->daddr, 0,
941                                                IPPROTO_TCP, 0);
942         }
943 }
944 
945 static int txd_estimate(const struct sk_buff *skb)
946 {
947         int count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
948         int i;
949 
950         for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
951                 const struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
952 
953                 count += VMXNET3_TXD_NEEDED(skb_frag_size(frag));
954         }
955         return count;
956 }
957 
958 /*
959  * Transmits a pkt thru a given tq
960  * Returns:
961  *    NETDEV_TX_OK:      descriptors are setup successfully
962  *    NETDEV_TX_OK:      error occurred, the pkt is dropped
963  *    NETDEV_TX_BUSY:    tx ring is full, queue is stopped
964  *
965  * Side-effects:
966  *    1. tx ring may be changed
967  *    2. tq stats may be updated accordingly
968  *    3. shared->txNumDeferred may be updated
969  */
970 
971 static int
972 vmxnet3_tq_xmit(struct sk_buff *skb, struct vmxnet3_tx_queue *tq,
973                 struct vmxnet3_adapter *adapter, struct net_device *netdev)
974 {
975         int ret;
976         u32 count;
977         unsigned long flags;
978         struct vmxnet3_tx_ctx ctx;
979         union Vmxnet3_GenericDesc *gdesc;
980 #ifdef __BIG_ENDIAN_BITFIELD
981         /* Use temporary descriptor to avoid touching bits multiple times */
982         union Vmxnet3_GenericDesc tempTxDesc;
983 #endif
984 
985         count = txd_estimate(skb);
986 
987         ctx.ipv4 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IP));
988         ctx.ipv6 = (vlan_get_protocol(skb) == cpu_to_be16(ETH_P_IPV6));
989 
990         ctx.mss = skb_shinfo(skb)->gso_size;
991         if (ctx.mss) {
992                 if (skb_header_cloned(skb)) {
993                         if (unlikely(pskb_expand_head(skb, 0, 0,
994                                                       GFP_ATOMIC) != 0)) {
995                                 tq->stats.drop_tso++;
996                                 goto drop_pkt;
997                         }
998                         tq->stats.copy_skb_header++;
999                 }
1000                 vmxnet3_prepare_tso(skb, &ctx);
1001         } else {
1002                 if (unlikely(count > VMXNET3_MAX_TXD_PER_PKT)) {
1003 
1004                         /* non-tso pkts must not use more than
1005                          * VMXNET3_MAX_TXD_PER_PKT entries
1006                          */
1007                         if (skb_linearize(skb) != 0) {
1008                                 tq->stats.drop_too_many_frags++;
1009                                 goto drop_pkt;
1010                         }
1011                         tq->stats.linearized++;
1012 
1013                         /* recalculate the # of descriptors to use */
1014                         count = VMXNET3_TXD_NEEDED(skb_headlen(skb)) + 1;
1015                 }
1016         }
1017 
1018         ret = vmxnet3_parse_hdr(skb, tq, &ctx, adapter);
1019         if (ret >= 0) {
1020                 BUG_ON(ret <= 0 && ctx.copy_size != 0);
1021                 /* hdrs parsed, check against other limits */
1022                 if (ctx.mss) {
1023                         if (unlikely(ctx.eth_ip_hdr_size + ctx.l4_hdr_size >
1024                                      VMXNET3_MAX_TX_BUF_SIZE)) {
1025                                 goto hdr_too_big;
1026                         }
1027                 } else {
1028                         if (skb->ip_summed == CHECKSUM_PARTIAL) {
1029                                 if (unlikely(ctx.eth_ip_hdr_size +
1030                                              skb->csum_offset >
1031                                              VMXNET3_MAX_CSUM_OFFSET)) {
1032                                         goto hdr_too_big;
1033                                 }
1034                         }
1035                 }
1036         } else {
1037                 tq->stats.drop_hdr_inspect_err++;
1038                 goto drop_pkt;
1039         }
1040 
1041         spin_lock_irqsave(&tq->tx_lock, flags);
1042 
1043         if (count > vmxnet3_cmd_ring_desc_avail(&tq->tx_ring)) {
1044                 tq->stats.tx_ring_full++;
1045                 netdev_dbg(adapter->netdev,
1046                         "tx queue stopped on %s, next2comp %u"
1047                         " next2fill %u\n", adapter->netdev->name,
1048                         tq->tx_ring.next2comp, tq->tx_ring.next2fill);
1049 
1050                 vmxnet3_tq_stop(tq, adapter);
1051                 spin_unlock_irqrestore(&tq->tx_lock, flags);
1052                 return NETDEV_TX_BUSY;
1053         }
1054 
1055 
1056         vmxnet3_copy_hdr(skb, tq, &ctx, adapter);
1057 
1058         /* fill tx descs related to addr & len */
1059         if (vmxnet3_map_pkt(skb, &ctx, tq, adapter->pdev, adapter))
1060                 goto unlock_drop_pkt;
1061 
1062         /* setup the EOP desc */
1063         ctx.eop_txd->dword[3] = cpu_to_le32(VMXNET3_TXD_CQ | VMXNET3_TXD_EOP);
1064 
1065         /* setup the SOP desc */
1066 #ifdef __BIG_ENDIAN_BITFIELD
1067         gdesc = &tempTxDesc;
1068         gdesc->dword[2] = ctx.sop_txd->dword[2];
1069         gdesc->dword[3] = ctx.sop_txd->dword[3];
1070 #else
1071         gdesc = ctx.sop_txd;
1072 #endif
1073         if (ctx.mss) {
1074                 gdesc->txd.hlen = ctx.eth_ip_hdr_size + ctx.l4_hdr_size;
1075                 gdesc->txd.om = VMXNET3_OM_TSO;
1076                 gdesc->txd.msscof = ctx.mss;
1077                 le32_add_cpu(&tq->shared->txNumDeferred, (skb->len -
1078                              gdesc->txd.hlen + ctx.mss - 1) / ctx.mss);
1079         } else {
1080                 if (skb->ip_summed == CHECKSUM_PARTIAL) {
1081                         gdesc->txd.hlen = ctx.eth_ip_hdr_size;
1082                         gdesc->txd.om = VMXNET3_OM_CSUM;
1083                         gdesc->txd.msscof = ctx.eth_ip_hdr_size +
1084                                             skb->csum_offset;
1085                 } else {
1086                         gdesc->txd.om = 0;
1087                         gdesc->txd.msscof = 0;
1088                 }
1089                 le32_add_cpu(&tq->shared->txNumDeferred, 1);
1090         }
1091 
1092         if (skb_vlan_tag_present(skb)) {
1093                 gdesc->txd.ti = 1;
1094                 gdesc->txd.tci = skb_vlan_tag_get(skb);
1095         }
1096 
1097         /* finally flips the GEN bit of the SOP desc. */
1098         gdesc->dword[2] = cpu_to_le32(le32_to_cpu(gdesc->dword[2]) ^
1099                                                   VMXNET3_TXD_GEN);
1100 #ifdef __BIG_ENDIAN_BITFIELD
1101         /* Finished updating in bitfields of Tx Desc, so write them in original
1102          * place.
1103          */
1104         vmxnet3_TxDescToLe((struct Vmxnet3_TxDesc *)gdesc,
1105                            (struct Vmxnet3_TxDesc *)ctx.sop_txd);
1106         gdesc = ctx.sop_txd;
1107 #endif
1108         netdev_dbg(adapter->netdev,
1109                 "txd[%u]: SOP 0x%Lx 0x%x 0x%x\n",
1110                 (u32)(ctx.sop_txd -
1111                 tq->tx_ring.base), le64_to_cpu(gdesc->txd.addr),
1112                 le32_to_cpu(gdesc->dword[2]), le32_to_cpu(gdesc->dword[3]));
1113 
1114         spin_unlock_irqrestore(&tq->tx_lock, flags);
1115 
1116         if (le32_to_cpu(tq->shared->txNumDeferred) >=
1117                                         le32_to_cpu(tq->shared->txThreshold)) {
1118                 tq->shared->txNumDeferred = 0;
1119                 VMXNET3_WRITE_BAR0_REG(adapter,
1120                                        VMXNET3_REG_TXPROD + tq->qid * 8,
1121                                        tq->tx_ring.next2fill);
1122         }
1123 
1124         return NETDEV_TX_OK;
1125 
1126 hdr_too_big:
1127         tq->stats.drop_oversized_hdr++;
1128 unlock_drop_pkt:
1129         spin_unlock_irqrestore(&tq->tx_lock, flags);
1130 drop_pkt:
1131         tq->stats.drop_total++;
1132         dev_kfree_skb_any(skb);
1133         return NETDEV_TX_OK;
1134 }
1135 
1136 
1137 static netdev_tx_t
1138 vmxnet3_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
1139 {
1140         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1141 
1142         BUG_ON(skb->queue_mapping > adapter->num_tx_queues);
1143         return vmxnet3_tq_xmit(skb,
1144                                &adapter->tx_queue[skb->queue_mapping],
1145                                adapter, netdev);
1146 }
1147 
1148 
1149 static void
1150 vmxnet3_rx_csum(struct vmxnet3_adapter *adapter,
1151                 struct sk_buff *skb,
1152                 union Vmxnet3_GenericDesc *gdesc)
1153 {
1154         if (!gdesc->rcd.cnc && adapter->netdev->features & NETIF_F_RXCSUM) {
1155                 /* typical case: TCP/UDP over IP and both csums are correct */
1156                 if ((le32_to_cpu(gdesc->dword[3]) & VMXNET3_RCD_CSUM_OK) ==
1157                                                         VMXNET3_RCD_CSUM_OK) {
1158                         skb->ip_summed = CHECKSUM_UNNECESSARY;
1159                         BUG_ON(!(gdesc->rcd.tcp || gdesc->rcd.udp));
1160                         BUG_ON(!(gdesc->rcd.v4  || gdesc->rcd.v6));
1161                         BUG_ON(gdesc->rcd.frg);
1162                 } else {
1163                         if (gdesc->rcd.csum) {
1164                                 skb->csum = htons(gdesc->rcd.csum);
1165                                 skb->ip_summed = CHECKSUM_PARTIAL;
1166                         } else {
1167                                 skb_checksum_none_assert(skb);
1168                         }
1169                 }
1170         } else {
1171                 skb_checksum_none_assert(skb);
1172         }
1173 }
1174 
1175 
1176 static void
1177 vmxnet3_rx_error(struct vmxnet3_rx_queue *rq, struct Vmxnet3_RxCompDesc *rcd,
1178                  struct vmxnet3_rx_ctx *ctx,  struct vmxnet3_adapter *adapter)
1179 {
1180         rq->stats.drop_err++;
1181         if (!rcd->fcs)
1182                 rq->stats.drop_fcs++;
1183 
1184         rq->stats.drop_total++;
1185 
1186         /*
1187          * We do not unmap and chain the rx buffer to the skb.
1188          * We basically pretend this buffer is not used and will be recycled
1189          * by vmxnet3_rq_alloc_rx_buf()
1190          */
1191 
1192         /*
1193          * ctx->skb may be NULL if this is the first and the only one
1194          * desc for the pkt
1195          */
1196         if (ctx->skb)
1197                 dev_kfree_skb_irq(ctx->skb);
1198 
1199         ctx->skb = NULL;
1200 }
1201 
1202 
1203 static u32
1204 vmxnet3_get_hdr_len(struct vmxnet3_adapter *adapter, struct sk_buff *skb,
1205                     union Vmxnet3_GenericDesc *gdesc)
1206 {
1207         u32 hlen, maplen;
1208         union {
1209                 void *ptr;
1210                 struct ethhdr *eth;
1211                 struct iphdr *ipv4;
1212                 struct ipv6hdr *ipv6;
1213                 struct tcphdr *tcp;
1214         } hdr;
1215         BUG_ON(gdesc->rcd.tcp == 0);
1216 
1217         maplen = skb_headlen(skb);
1218         if (unlikely(sizeof(struct iphdr) + sizeof(struct tcphdr) > maplen))
1219                 return 0;
1220 
1221         hdr.eth = eth_hdr(skb);
1222         if (gdesc->rcd.v4) {
1223                 BUG_ON(hdr.eth->h_proto != htons(ETH_P_IP));
1224                 hdr.ptr += sizeof(struct ethhdr);
1225                 BUG_ON(hdr.ipv4->protocol != IPPROTO_TCP);
1226                 hlen = hdr.ipv4->ihl << 2;
1227                 hdr.ptr += hdr.ipv4->ihl << 2;
1228         } else if (gdesc->rcd.v6) {
1229                 BUG_ON(hdr.eth->h_proto != htons(ETH_P_IPV6));
1230                 hdr.ptr += sizeof(struct ethhdr);
1231                 /* Use an estimated value, since we also need to handle
1232                  * TSO case.
1233                  */
1234                 if (hdr.ipv6->nexthdr != IPPROTO_TCP)
1235                         return sizeof(struct ipv6hdr) + sizeof(struct tcphdr);
1236                 hlen = sizeof(struct ipv6hdr);
1237                 hdr.ptr += sizeof(struct ipv6hdr);
1238         } else {
1239                 /* Non-IP pkt, dont estimate header length */
1240                 return 0;
1241         }
1242 
1243         if (hlen + sizeof(struct tcphdr) > maplen)
1244                 return 0;
1245 
1246         return (hlen + (hdr.tcp->doff << 2));
1247 }
1248 
1249 static int
1250 vmxnet3_rq_rx_complete(struct vmxnet3_rx_queue *rq,
1251                        struct vmxnet3_adapter *adapter, int quota)
1252 {
1253         static const u32 rxprod_reg[2] = {
1254                 VMXNET3_REG_RXPROD, VMXNET3_REG_RXPROD2
1255         };
1256         u32 num_pkts = 0;
1257         bool skip_page_frags = false;
1258         struct Vmxnet3_RxCompDesc *rcd;
1259         struct vmxnet3_rx_ctx *ctx = &rq->rx_ctx;
1260         u16 segCnt = 0, mss = 0;
1261 #ifdef __BIG_ENDIAN_BITFIELD
1262         struct Vmxnet3_RxDesc rxCmdDesc;
1263         struct Vmxnet3_RxCompDesc rxComp;
1264 #endif
1265         vmxnet3_getRxComp(rcd, &rq->comp_ring.base[rq->comp_ring.next2proc].rcd,
1266                           &rxComp);
1267         while (rcd->gen == rq->comp_ring.gen) {
1268                 struct vmxnet3_rx_buf_info *rbi;
1269                 struct sk_buff *skb, *new_skb = NULL;
1270                 struct page *new_page = NULL;
1271                 dma_addr_t new_dma_addr;
1272                 int num_to_alloc;
1273                 struct Vmxnet3_RxDesc *rxd;
1274                 u32 idx, ring_idx;
1275                 struct vmxnet3_cmd_ring *ring = NULL;
1276                 if (num_pkts >= quota) {
1277                         /* we may stop even before we see the EOP desc of
1278                          * the current pkt
1279                          */
1280                         break;
1281                 }
1282                 BUG_ON(rcd->rqID != rq->qid && rcd->rqID != rq->qid2);
1283                 idx = rcd->rxdIdx;
1284                 ring_idx = rcd->rqID < adapter->num_rx_queues ? 0 : 1;
1285                 ring = rq->rx_ring + ring_idx;
1286                 vmxnet3_getRxDesc(rxd, &rq->rx_ring[ring_idx].base[idx].rxd,
1287                                   &rxCmdDesc);
1288                 rbi = rq->buf_info[ring_idx] + idx;
1289 
1290                 BUG_ON(rxd->addr != rbi->dma_addr ||
1291                        rxd->len != rbi->len);
1292 
1293                 if (unlikely(rcd->eop && rcd->err)) {
1294                         vmxnet3_rx_error(rq, rcd, ctx, adapter);
1295                         goto rcd_done;
1296                 }
1297 
1298                 if (rcd->sop) { /* first buf of the pkt */
1299                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_HEAD ||
1300                                rcd->rqID != rq->qid);
1301 
1302                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_SKB);
1303                         BUG_ON(ctx->skb != NULL || rbi->skb == NULL);
1304 
1305                         if (unlikely(rcd->len == 0)) {
1306                                 /* Pretend the rx buffer is skipped. */
1307                                 BUG_ON(!(rcd->sop && rcd->eop));
1308                                 netdev_dbg(adapter->netdev,
1309                                         "rxRing[%u][%u] 0 length\n",
1310                                         ring_idx, idx);
1311                                 goto rcd_done;
1312                         }
1313 
1314                         skip_page_frags = false;
1315                         ctx->skb = rbi->skb;
1316                         new_skb = netdev_alloc_skb_ip_align(adapter->netdev,
1317                                                             rbi->len);
1318                         if (new_skb == NULL) {
1319                                 /* Skb allocation failed, do not handover this
1320                                  * skb to stack. Reuse it. Drop the existing pkt
1321                                  */
1322                                 rq->stats.rx_buf_alloc_failure++;
1323                                 ctx->skb = NULL;
1324                                 rq->stats.drop_total++;
1325                                 skip_page_frags = true;
1326                                 goto rcd_done;
1327                         }
1328                         new_dma_addr = dma_map_single(&adapter->pdev->dev,
1329                                                       new_skb->data, rbi->len,
1330                                                       PCI_DMA_FROMDEVICE);
1331                         if (dma_mapping_error(&adapter->pdev->dev,
1332                                               new_dma_addr)) {
1333                                 dev_kfree_skb(new_skb);
1334                                 /* Skb allocation failed, do not handover this
1335                                  * skb to stack. Reuse it. Drop the existing pkt
1336                                  */
1337                                 rq->stats.rx_buf_alloc_failure++;
1338                                 ctx->skb = NULL;
1339                                 rq->stats.drop_total++;
1340                                 skip_page_frags = true;
1341                                 goto rcd_done;
1342                         }
1343 
1344                         dma_unmap_single(&adapter->pdev->dev, rbi->dma_addr,
1345                                          rbi->len,
1346                                          PCI_DMA_FROMDEVICE);
1347 
1348 #ifdef VMXNET3_RSS
1349                         if (rcd->rssType != VMXNET3_RCD_RSS_TYPE_NONE &&
1350                             (adapter->netdev->features & NETIF_F_RXHASH))
1351                                 skb_set_hash(ctx->skb,
1352                                              le32_to_cpu(rcd->rssHash),
1353                                              PKT_HASH_TYPE_L3);
1354 #endif
1355                         skb_put(ctx->skb, rcd->len);
1356 
1357                         /* Immediate refill */
1358                         rbi->skb = new_skb;
1359                         rbi->dma_addr = new_dma_addr;
1360                         rxd->addr = cpu_to_le64(rbi->dma_addr);
1361                         rxd->len = rbi->len;
1362                         if (adapter->version == 2 &&
1363                             rcd->type == VMXNET3_CDTYPE_RXCOMP_LRO) {
1364                                 struct Vmxnet3_RxCompDescExt *rcdlro;
1365                                 rcdlro = (struct Vmxnet3_RxCompDescExt *)rcd;
1366 
1367                                 segCnt = rcdlro->segCnt;
1368                                 BUG_ON(segCnt <= 1);
1369                                 mss = rcdlro->mss;
1370                                 if (unlikely(segCnt <= 1))
1371                                         segCnt = 0;
1372                         } else {
1373                                 segCnt = 0;
1374                         }
1375                 } else {
1376                         BUG_ON(ctx->skb == NULL && !skip_page_frags);
1377 
1378                         /* non SOP buffer must be type 1 in most cases */
1379                         BUG_ON(rbi->buf_type != VMXNET3_RX_BUF_PAGE);
1380                         BUG_ON(rxd->btype != VMXNET3_RXD_BTYPE_BODY);
1381 
1382                         /* If an sop buffer was dropped, skip all
1383                          * following non-sop fragments. They will be reused.
1384                          */
1385                         if (skip_page_frags)
1386                                 goto rcd_done;
1387 
1388                         if (rcd->len) {
1389                                 new_page = alloc_page(GFP_ATOMIC);
1390                                 /* Replacement page frag could not be allocated.
1391                                  * Reuse this page. Drop the pkt and free the
1392                                  * skb which contained this page as a frag. Skip
1393                                  * processing all the following non-sop frags.
1394                                  */
1395                                 if (unlikely(!new_page)) {
1396                                         rq->stats.rx_buf_alloc_failure++;
1397                                         dev_kfree_skb(ctx->skb);
1398                                         ctx->skb = NULL;
1399                                         skip_page_frags = true;
1400                                         goto rcd_done;
1401                                 }
1402                                 new_dma_addr = dma_map_page(&adapter->pdev->dev,
1403                                                             new_page,
1404                                                             0, PAGE_SIZE,
1405                                                             PCI_DMA_FROMDEVICE);
1406                                 if (dma_mapping_error(&adapter->pdev->dev,
1407                                                       new_dma_addr)) {
1408                                         put_page(new_page);
1409                                         rq->stats.rx_buf_alloc_failure++;
1410                                         dev_kfree_skb(ctx->skb);
1411                                         ctx->skb = NULL;
1412                                         skip_page_frags = true;
1413                                         goto rcd_done;
1414                                 }
1415 
1416                                 dma_unmap_page(&adapter->pdev->dev,
1417                                                rbi->dma_addr, rbi->len,
1418                                                PCI_DMA_FROMDEVICE);
1419 
1420                                 vmxnet3_append_frag(ctx->skb, rcd, rbi);
1421 
1422                                 /* Immediate refill */
1423                                 rbi->page = new_page;
1424                                 rbi->dma_addr = new_dma_addr;
1425                                 rxd->addr = cpu_to_le64(rbi->dma_addr);
1426                                 rxd->len = rbi->len;
1427                         }
1428                 }
1429 
1430 
1431                 skb = ctx->skb;
1432                 if (rcd->eop) {
1433                         u32 mtu = adapter->netdev->mtu;
1434                         skb->len += skb->data_len;
1435 
1436                         vmxnet3_rx_csum(adapter, skb,
1437                                         (union Vmxnet3_GenericDesc *)rcd);
1438                         skb->protocol = eth_type_trans(skb, adapter->netdev);
1439                         if (!rcd->tcp || !adapter->lro)
1440                                 goto not_lro;
1441 
1442                         if (segCnt != 0 && mss != 0) {
1443                                 skb_shinfo(skb)->gso_type = rcd->v4 ?
1444                                         SKB_GSO_TCPV4 : SKB_GSO_TCPV6;
1445                                 skb_shinfo(skb)->gso_size = mss;
1446                                 skb_shinfo(skb)->gso_segs = segCnt;
1447                         } else if (segCnt != 0 || skb->len > mtu) {
1448                                 u32 hlen;
1449 
1450                                 hlen = vmxnet3_get_hdr_len(adapter, skb,
1451                                         (union Vmxnet3_GenericDesc *)rcd);
1452                                 if (hlen == 0)
1453                                         goto not_lro;
1454 
1455                                 skb_shinfo(skb)->gso_type =
1456                                         rcd->v4 ? SKB_GSO_TCPV4 : SKB_GSO_TCPV6;
1457                                 if (segCnt != 0) {
1458                                         skb_shinfo(skb)->gso_segs = segCnt;
1459                                         skb_shinfo(skb)->gso_size =
1460                                                 DIV_ROUND_UP(skb->len -
1461                                                         hlen, segCnt);
1462                                 } else {
1463                                         skb_shinfo(skb)->gso_size = mtu - hlen;
1464                                 }
1465                         }
1466 not_lro:
1467                         if (unlikely(rcd->ts))
1468                                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), rcd->tci);
1469 
1470                         if (adapter->netdev->features & NETIF_F_LRO)
1471                                 netif_receive_skb(skb);
1472                         else
1473                                 napi_gro_receive(&rq->napi, skb);
1474 
1475                         ctx->skb = NULL;
1476                         num_pkts++;
1477                 }
1478 
1479 rcd_done:
1480                 /* device may have skipped some rx descs */
1481                 ring->next2comp = idx;
1482                 num_to_alloc = vmxnet3_cmd_ring_desc_avail(ring);
1483                 ring = rq->rx_ring + ring_idx;
1484                 while (num_to_alloc) {
1485                         vmxnet3_getRxDesc(rxd, &ring->base[ring->next2fill].rxd,
1486                                           &rxCmdDesc);
1487                         BUG_ON(!rxd->addr);
1488 
1489                         /* Recv desc is ready to be used by the device */
1490                         rxd->gen = ring->gen;
1491                         vmxnet3_cmd_ring_adv_next2fill(ring);
1492                         num_to_alloc--;
1493                 }
1494 
1495                 /* if needed, update the register */
1496                 if (unlikely(rq->shared->updateRxProd)) {
1497                         VMXNET3_WRITE_BAR0_REG(adapter,
1498                                                rxprod_reg[ring_idx] + rq->qid * 8,
1499                                                ring->next2fill);
1500                 }
1501 
1502                 vmxnet3_comp_ring_adv_next2proc(&rq->comp_ring);
1503                 vmxnet3_getRxComp(rcd,
1504                                   &rq->comp_ring.base[rq->comp_ring.next2proc].rcd, &rxComp);
1505         }
1506 
1507         return num_pkts;
1508 }
1509 
1510 
1511 static void
1512 vmxnet3_rq_cleanup(struct vmxnet3_rx_queue *rq,
1513                    struct vmxnet3_adapter *adapter)
1514 {
1515         u32 i, ring_idx;
1516         struct Vmxnet3_RxDesc *rxd;
1517 
1518         for (ring_idx = 0; ring_idx < 2; ring_idx++) {
1519                 for (i = 0; i < rq->rx_ring[ring_idx].size; i++) {
1520 #ifdef __BIG_ENDIAN_BITFIELD
1521                         struct Vmxnet3_RxDesc rxDesc;
1522 #endif
1523                         vmxnet3_getRxDesc(rxd,
1524                                 &rq->rx_ring[ring_idx].base[i].rxd, &rxDesc);
1525 
1526                         if (rxd->btype == VMXNET3_RXD_BTYPE_HEAD &&
1527                                         rq->buf_info[ring_idx][i].skb) {
1528                                 dma_unmap_single(&adapter->pdev->dev, rxd->addr,
1529                                                  rxd->len, PCI_DMA_FROMDEVICE);
1530                                 dev_kfree_skb(rq->buf_info[ring_idx][i].skb);
1531                                 rq->buf_info[ring_idx][i].skb = NULL;
1532                         } else if (rxd->btype == VMXNET3_RXD_BTYPE_BODY &&
1533                                         rq->buf_info[ring_idx][i].page) {
1534                                 dma_unmap_page(&adapter->pdev->dev, rxd->addr,
1535                                                rxd->len, PCI_DMA_FROMDEVICE);
1536                                 put_page(rq->buf_info[ring_idx][i].page);
1537                                 rq->buf_info[ring_idx][i].page = NULL;
1538                         }
1539                 }
1540 
1541                 rq->rx_ring[ring_idx].gen = VMXNET3_INIT_GEN;
1542                 rq->rx_ring[ring_idx].next2fill =
1543                                         rq->rx_ring[ring_idx].next2comp = 0;
1544         }
1545 
1546         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1547         rq->comp_ring.next2proc = 0;
1548 }
1549 
1550 
1551 static void
1552 vmxnet3_rq_cleanup_all(struct vmxnet3_adapter *adapter)
1553 {
1554         int i;
1555 
1556         for (i = 0; i < adapter->num_rx_queues; i++)
1557                 vmxnet3_rq_cleanup(&adapter->rx_queue[i], adapter);
1558 }
1559 
1560 
1561 static void vmxnet3_rq_destroy(struct vmxnet3_rx_queue *rq,
1562                                struct vmxnet3_adapter *adapter)
1563 {
1564         int i;
1565         int j;
1566 
1567         /* all rx buffers must have already been freed */
1568         for (i = 0; i < 2; i++) {
1569                 if (rq->buf_info[i]) {
1570                         for (j = 0; j < rq->rx_ring[i].size; j++)
1571                                 BUG_ON(rq->buf_info[i][j].page != NULL);
1572                 }
1573         }
1574 
1575 
1576         for (i = 0; i < 2; i++) {
1577                 if (rq->rx_ring[i].base) {
1578                         dma_free_coherent(&adapter->pdev->dev,
1579                                           rq->rx_ring[i].size
1580                                           * sizeof(struct Vmxnet3_RxDesc),
1581                                           rq->rx_ring[i].base,
1582                                           rq->rx_ring[i].basePA);
1583                         rq->rx_ring[i].base = NULL;
1584                 }
1585                 rq->buf_info[i] = NULL;
1586         }
1587 
1588         if (rq->comp_ring.base) {
1589                 dma_free_coherent(&adapter->pdev->dev, rq->comp_ring.size
1590                                   * sizeof(struct Vmxnet3_RxCompDesc),
1591                                   rq->comp_ring.base, rq->comp_ring.basePA);
1592                 rq->comp_ring.base = NULL;
1593         }
1594 
1595         if (rq->buf_info[0]) {
1596                 size_t sz = sizeof(struct vmxnet3_rx_buf_info) *
1597                         (rq->rx_ring[0].size + rq->rx_ring[1].size);
1598                 dma_free_coherent(&adapter->pdev->dev, sz, rq->buf_info[0],
1599                                   rq->buf_info_pa);
1600         }
1601 }
1602 
1603 
1604 static int
1605 vmxnet3_rq_init(struct vmxnet3_rx_queue *rq,
1606                 struct vmxnet3_adapter  *adapter)
1607 {
1608         int i;
1609 
1610         /* initialize buf_info */
1611         for (i = 0; i < rq->rx_ring[0].size; i++) {
1612 
1613                 /* 1st buf for a pkt is skbuff */
1614                 if (i % adapter->rx_buf_per_pkt == 0) {
1615                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_SKB;
1616                         rq->buf_info[0][i].len = adapter->skb_buf_size;
1617                 } else { /* subsequent bufs for a pkt is frag */
1618                         rq->buf_info[0][i].buf_type = VMXNET3_RX_BUF_PAGE;
1619                         rq->buf_info[0][i].len = PAGE_SIZE;
1620                 }
1621         }
1622         for (i = 0; i < rq->rx_ring[1].size; i++) {
1623                 rq->buf_info[1][i].buf_type = VMXNET3_RX_BUF_PAGE;
1624                 rq->buf_info[1][i].len = PAGE_SIZE;
1625         }
1626 
1627         /* reset internal state and allocate buffers for both rings */
1628         for (i = 0; i < 2; i++) {
1629                 rq->rx_ring[i].next2fill = rq->rx_ring[i].next2comp = 0;
1630 
1631                 memset(rq->rx_ring[i].base, 0, rq->rx_ring[i].size *
1632                        sizeof(struct Vmxnet3_RxDesc));
1633                 rq->rx_ring[i].gen = VMXNET3_INIT_GEN;
1634         }
1635         if (vmxnet3_rq_alloc_rx_buf(rq, 0, rq->rx_ring[0].size - 1,
1636                                     adapter) == 0) {
1637                 /* at least has 1 rx buffer for the 1st ring */
1638                 return -ENOMEM;
1639         }
1640         vmxnet3_rq_alloc_rx_buf(rq, 1, rq->rx_ring[1].size - 1, adapter);
1641 
1642         /* reset the comp ring */
1643         rq->comp_ring.next2proc = 0;
1644         memset(rq->comp_ring.base, 0, rq->comp_ring.size *
1645                sizeof(struct Vmxnet3_RxCompDesc));
1646         rq->comp_ring.gen = VMXNET3_INIT_GEN;
1647 
1648         /* reset rxctx */
1649         rq->rx_ctx.skb = NULL;
1650 
1651         /* stats are not reset */
1652         return 0;
1653 }
1654 
1655 
1656 static int
1657 vmxnet3_rq_init_all(struct vmxnet3_adapter *adapter)
1658 {
1659         int i, err = 0;
1660 
1661         for (i = 0; i < adapter->num_rx_queues; i++) {
1662                 err = vmxnet3_rq_init(&adapter->rx_queue[i], adapter);
1663                 if (unlikely(err)) {
1664                         dev_err(&adapter->netdev->dev, "%s: failed to "
1665                                 "initialize rx queue%i\n",
1666                                 adapter->netdev->name, i);
1667                         break;
1668                 }
1669         }
1670         return err;
1671 
1672 }
1673 
1674 
1675 static int
1676 vmxnet3_rq_create(struct vmxnet3_rx_queue *rq, struct vmxnet3_adapter *adapter)
1677 {
1678         int i;
1679         size_t sz;
1680         struct vmxnet3_rx_buf_info *bi;
1681 
1682         for (i = 0; i < 2; i++) {
1683 
1684                 sz = rq->rx_ring[i].size * sizeof(struct Vmxnet3_RxDesc);
1685                 rq->rx_ring[i].base = dma_alloc_coherent(
1686                                                 &adapter->pdev->dev, sz,
1687                                                 &rq->rx_ring[i].basePA,
1688                                                 GFP_KERNEL);
1689                 if (!rq->rx_ring[i].base) {
1690                         netdev_err(adapter->netdev,
1691                                    "failed to allocate rx ring %d\n", i);
1692                         goto err;
1693                 }
1694         }
1695 
1696         sz = rq->comp_ring.size * sizeof(struct Vmxnet3_RxCompDesc);
1697         rq->comp_ring.base = dma_alloc_coherent(&adapter->pdev->dev, sz,
1698                                                 &rq->comp_ring.basePA,
1699                                                 GFP_KERNEL);
1700         if (!rq->comp_ring.base) {
1701                 netdev_err(adapter->netdev, "failed to allocate rx comp ring\n");
1702                 goto err;
1703         }
1704 
1705         sz = sizeof(struct vmxnet3_rx_buf_info) * (rq->rx_ring[0].size +
1706                                                    rq->rx_ring[1].size);
1707         bi = dma_zalloc_coherent(&adapter->pdev->dev, sz, &rq->buf_info_pa,
1708                                  GFP_KERNEL);
1709         if (!bi)
1710                 goto err;
1711 
1712         rq->buf_info[0] = bi;
1713         rq->buf_info[1] = bi + rq->rx_ring[0].size;
1714 
1715         return 0;
1716 
1717 err:
1718         vmxnet3_rq_destroy(rq, adapter);
1719         return -ENOMEM;
1720 }
1721 
1722 
1723 static int
1724 vmxnet3_rq_create_all(struct vmxnet3_adapter *adapter)
1725 {
1726         int i, err = 0;
1727 
1728         for (i = 0; i < adapter->num_rx_queues; i++) {
1729                 err = vmxnet3_rq_create(&adapter->rx_queue[i], adapter);
1730                 if (unlikely(err)) {
1731                         dev_err(&adapter->netdev->dev,
1732                                 "%s: failed to create rx queue%i\n",
1733                                 adapter->netdev->name, i);
1734                         goto err_out;
1735                 }
1736         }
1737         return err;
1738 err_out:
1739         vmxnet3_rq_destroy_all(adapter);
1740         return err;
1741 
1742 }
1743 
1744 /* Multiple queue aware polling function for tx and rx */
1745 
1746 static int
1747 vmxnet3_do_poll(struct vmxnet3_adapter *adapter, int budget)
1748 {
1749         int rcd_done = 0, i;
1750         if (unlikely(adapter->shared->ecr))
1751                 vmxnet3_process_events(adapter);
1752         for (i = 0; i < adapter->num_tx_queues; i++)
1753                 vmxnet3_tq_tx_complete(&adapter->tx_queue[i], adapter);
1754 
1755         for (i = 0; i < adapter->num_rx_queues; i++)
1756                 rcd_done += vmxnet3_rq_rx_complete(&adapter->rx_queue[i],
1757                                                    adapter, budget);
1758         return rcd_done;
1759 }
1760 
1761 
1762 static int
1763 vmxnet3_poll(struct napi_struct *napi, int budget)
1764 {
1765         struct vmxnet3_rx_queue *rx_queue = container_of(napi,
1766                                           struct vmxnet3_rx_queue, napi);
1767         int rxd_done;
1768 
1769         rxd_done = vmxnet3_do_poll(rx_queue->adapter, budget);
1770 
1771         if (rxd_done < budget) {
1772                 napi_complete(napi);
1773                 vmxnet3_enable_all_intrs(rx_queue->adapter);
1774         }
1775         return rxd_done;
1776 }
1777 
1778 /*
1779  * NAPI polling function for MSI-X mode with multiple Rx queues
1780  * Returns the # of the NAPI credit consumed (# of rx descriptors processed)
1781  */
1782 
1783 static int
1784 vmxnet3_poll_rx_only(struct napi_struct *napi, int budget)
1785 {
1786         struct vmxnet3_rx_queue *rq = container_of(napi,
1787                                                 struct vmxnet3_rx_queue, napi);
1788         struct vmxnet3_adapter *adapter = rq->adapter;
1789         int rxd_done;
1790 
1791         /* When sharing interrupt with corresponding tx queue, process
1792          * tx completions in that queue as well
1793          */
1794         if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE) {
1795                 struct vmxnet3_tx_queue *tq =
1796                                 &adapter->tx_queue[rq - adapter->rx_queue];
1797                 vmxnet3_tq_tx_complete(tq, adapter);
1798         }
1799 
1800         rxd_done = vmxnet3_rq_rx_complete(rq, adapter, budget);
1801 
1802         if (rxd_done < budget) {
1803                 napi_complete(napi);
1804                 vmxnet3_enable_intr(adapter, rq->comp_ring.intr_idx);
1805         }
1806         return rxd_done;
1807 }
1808 
1809 
1810 #ifdef CONFIG_PCI_MSI
1811 
1812 /*
1813  * Handle completion interrupts on tx queues
1814  * Returns whether or not the intr is handled
1815  */
1816 
1817 static irqreturn_t
1818 vmxnet3_msix_tx(int irq, void *data)
1819 {
1820         struct vmxnet3_tx_queue *tq = data;
1821         struct vmxnet3_adapter *adapter = tq->adapter;
1822 
1823         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1824                 vmxnet3_disable_intr(adapter, tq->comp_ring.intr_idx);
1825 
1826         /* Handle the case where only one irq is allocate for all tx queues */
1827         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1828                 int i;
1829                 for (i = 0; i < adapter->num_tx_queues; i++) {
1830                         struct vmxnet3_tx_queue *txq = &adapter->tx_queue[i];
1831                         vmxnet3_tq_tx_complete(txq, adapter);
1832                 }
1833         } else {
1834                 vmxnet3_tq_tx_complete(tq, adapter);
1835         }
1836         vmxnet3_enable_intr(adapter, tq->comp_ring.intr_idx);
1837 
1838         return IRQ_HANDLED;
1839 }
1840 
1841 
1842 /*
1843  * Handle completion interrupts on rx queues. Returns whether or not the
1844  * intr is handled
1845  */
1846 
1847 static irqreturn_t
1848 vmxnet3_msix_rx(int irq, void *data)
1849 {
1850         struct vmxnet3_rx_queue *rq = data;
1851         struct vmxnet3_adapter *adapter = rq->adapter;
1852 
1853         /* disable intr if needed */
1854         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1855                 vmxnet3_disable_intr(adapter, rq->comp_ring.intr_idx);
1856         napi_schedule(&rq->napi);
1857 
1858         return IRQ_HANDLED;
1859 }
1860 
1861 /*
1862  *----------------------------------------------------------------------------
1863  *
1864  * vmxnet3_msix_event --
1865  *
1866  *    vmxnet3 msix event intr handler
1867  *
1868  * Result:
1869  *    whether or not the intr is handled
1870  *
1871  *----------------------------------------------------------------------------
1872  */
1873 
1874 static irqreturn_t
1875 vmxnet3_msix_event(int irq, void *data)
1876 {
1877         struct net_device *dev = data;
1878         struct vmxnet3_adapter *adapter = netdev_priv(dev);
1879 
1880         /* disable intr if needed */
1881         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1882                 vmxnet3_disable_intr(adapter, adapter->intr.event_intr_idx);
1883 
1884         if (adapter->shared->ecr)
1885                 vmxnet3_process_events(adapter);
1886 
1887         vmxnet3_enable_intr(adapter, adapter->intr.event_intr_idx);
1888 
1889         return IRQ_HANDLED;
1890 }
1891 
1892 #endif /* CONFIG_PCI_MSI  */
1893 
1894 
1895 /* Interrupt handler for vmxnet3  */
1896 static irqreturn_t
1897 vmxnet3_intr(int irq, void *dev_id)
1898 {
1899         struct net_device *dev = dev_id;
1900         struct vmxnet3_adapter *adapter = netdev_priv(dev);
1901 
1902         if (adapter->intr.type == VMXNET3_IT_INTX) {
1903                 u32 icr = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_ICR);
1904                 if (unlikely(icr == 0))
1905                         /* not ours */
1906                         return IRQ_NONE;
1907         }
1908 
1909 
1910         /* disable intr if needed */
1911         if (adapter->intr.mask_mode == VMXNET3_IMM_ACTIVE)
1912                 vmxnet3_disable_all_intrs(adapter);
1913 
1914         napi_schedule(&adapter->rx_queue[0].napi);
1915 
1916         return IRQ_HANDLED;
1917 }
1918 
1919 #ifdef CONFIG_NET_POLL_CONTROLLER
1920 
1921 /* netpoll callback. */
1922 static void
1923 vmxnet3_netpoll(struct net_device *netdev)
1924 {
1925         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
1926 
1927         switch (adapter->intr.type) {
1928 #ifdef CONFIG_PCI_MSI
1929         case VMXNET3_IT_MSIX: {
1930                 int i;
1931                 for (i = 0; i < adapter->num_rx_queues; i++)
1932                         vmxnet3_msix_rx(0, &adapter->rx_queue[i]);
1933                 break;
1934         }
1935 #endif
1936         case VMXNET3_IT_MSI:
1937         default:
1938                 vmxnet3_intr(0, adapter->netdev);
1939                 break;
1940         }
1941 
1942 }
1943 #endif  /* CONFIG_NET_POLL_CONTROLLER */
1944 
1945 static int
1946 vmxnet3_request_irqs(struct vmxnet3_adapter *adapter)
1947 {
1948         struct vmxnet3_intr *intr = &adapter->intr;
1949         int err = 0, i;
1950         int vector = 0;
1951 
1952 #ifdef CONFIG_PCI_MSI
1953         if (adapter->intr.type == VMXNET3_IT_MSIX) {
1954                 for (i = 0; i < adapter->num_tx_queues; i++) {
1955                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
1956                                 sprintf(adapter->tx_queue[i].name, "%s-tx-%d",
1957                                         adapter->netdev->name, vector);
1958                                 err = request_irq(
1959                                               intr->msix_entries[vector].vector,
1960                                               vmxnet3_msix_tx, 0,
1961                                               adapter->tx_queue[i].name,
1962                                               &adapter->tx_queue[i]);
1963                         } else {
1964                                 sprintf(adapter->tx_queue[i].name, "%s-rxtx-%d",
1965                                         adapter->netdev->name, vector);
1966                         }
1967                         if (err) {
1968                                 dev_err(&adapter->netdev->dev,
1969                                         "Failed to request irq for MSIX, %s, "
1970                                         "error %d\n",
1971                                         adapter->tx_queue[i].name, err);
1972                                 return err;
1973                         }
1974 
1975                         /* Handle the case where only 1 MSIx was allocated for
1976                          * all tx queues */
1977                         if (adapter->share_intr == VMXNET3_INTR_TXSHARE) {
1978                                 for (; i < adapter->num_tx_queues; i++)
1979                                         adapter->tx_queue[i].comp_ring.intr_idx
1980                                                                 = vector;
1981                                 vector++;
1982                                 break;
1983                         } else {
1984                                 adapter->tx_queue[i].comp_ring.intr_idx
1985                                                                 = vector++;
1986                         }
1987                 }
1988                 if (adapter->share_intr == VMXNET3_INTR_BUDDYSHARE)
1989                         vector = 0;
1990 
1991                 for (i = 0; i < adapter->num_rx_queues; i++) {
1992                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE)
1993                                 sprintf(adapter->rx_queue[i].name, "%s-rx-%d",
1994                                         adapter->netdev->name, vector);
1995                         else
1996                                 sprintf(adapter->rx_queue[i].name, "%s-rxtx-%d",
1997                                         adapter->netdev->name, vector);
1998                         err = request_irq(intr->msix_entries[vector].vector,
1999                                           vmxnet3_msix_rx, 0,
2000                                           adapter->rx_queue[i].name,
2001                                           &(adapter->rx_queue[i]));
2002                         if (err) {
2003                                 netdev_err(adapter->netdev,
2004                                            "Failed to request irq for MSIX, "
2005                                            "%s, error %d\n",
2006                                            adapter->rx_queue[i].name, err);
2007                                 return err;
2008                         }
2009 
2010                         adapter->rx_queue[i].comp_ring.intr_idx = vector++;
2011                 }
2012 
2013                 sprintf(intr->event_msi_vector_name, "%s-event-%d",
2014                         adapter->netdev->name, vector);
2015                 err = request_irq(intr->msix_entries[vector].vector,
2016                                   vmxnet3_msix_event, 0,
2017                                   intr->event_msi_vector_name, adapter->netdev);
2018                 intr->event_intr_idx = vector;
2019 
2020         } else if (intr->type == VMXNET3_IT_MSI) {
2021                 adapter->num_rx_queues = 1;
2022                 err = request_irq(adapter->pdev->irq, vmxnet3_intr, 0,
2023                                   adapter->netdev->name, adapter->netdev);
2024         } else {
2025 #endif
2026                 adapter->num_rx_queues = 1;
2027                 err = request_irq(adapter->pdev->irq, vmxnet3_intr,
2028                                   IRQF_SHARED, adapter->netdev->name,
2029                                   adapter->netdev);
2030 #ifdef CONFIG_PCI_MSI
2031         }
2032 #endif
2033         intr->num_intrs = vector + 1;
2034         if (err) {
2035                 netdev_err(adapter->netdev,
2036                            "Failed to request irq (intr type:%d), error %d\n",
2037                            intr->type, err);
2038         } else {
2039                 /* Number of rx queues will not change after this */
2040                 for (i = 0; i < adapter->num_rx_queues; i++) {
2041                         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2042                         rq->qid = i;
2043                         rq->qid2 = i + adapter->num_rx_queues;
2044                 }
2045 
2046 
2047 
2048                 /* init our intr settings */
2049                 for (i = 0; i < intr->num_intrs; i++)
2050                         intr->mod_levels[i] = UPT1_IML_ADAPTIVE;
2051                 if (adapter->intr.type != VMXNET3_IT_MSIX) {
2052                         adapter->intr.event_intr_idx = 0;
2053                         for (i = 0; i < adapter->num_tx_queues; i++)
2054                                 adapter->tx_queue[i].comp_ring.intr_idx = 0;
2055                         adapter->rx_queue[0].comp_ring.intr_idx = 0;
2056                 }
2057 
2058                 netdev_info(adapter->netdev,
2059                             "intr type %u, mode %u, %u vectors allocated\n",
2060                             intr->type, intr->mask_mode, intr->num_intrs);
2061         }
2062 
2063         return err;
2064 }
2065 
2066 
2067 static void
2068 vmxnet3_free_irqs(struct vmxnet3_adapter *adapter)
2069 {
2070         struct vmxnet3_intr *intr = &adapter->intr;
2071         BUG_ON(intr->type == VMXNET3_IT_AUTO || intr->num_intrs <= 0);
2072 
2073         switch (intr->type) {
2074 #ifdef CONFIG_PCI_MSI
2075         case VMXNET3_IT_MSIX:
2076         {
2077                 int i, vector = 0;
2078 
2079                 if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE) {
2080                         for (i = 0; i < adapter->num_tx_queues; i++) {
2081                                 free_irq(intr->msix_entries[vector++].vector,
2082                                          &(adapter->tx_queue[i]));
2083                                 if (adapter->share_intr == VMXNET3_INTR_TXSHARE)
2084                                         break;
2085                         }
2086                 }
2087 
2088                 for (i = 0; i < adapter->num_rx_queues; i++) {
2089                         free_irq(intr->msix_entries[vector++].vector,
2090                                  &(adapter->rx_queue[i]));
2091                 }
2092 
2093                 free_irq(intr->msix_entries[vector].vector,
2094                          adapter->netdev);
2095                 BUG_ON(vector >= intr->num_intrs);
2096                 break;
2097         }
2098 #endif
2099         case VMXNET3_IT_MSI:
2100                 free_irq(adapter->pdev->irq, adapter->netdev);
2101                 break;
2102         case VMXNET3_IT_INTX:
2103                 free_irq(adapter->pdev->irq, adapter->netdev);
2104                 break;
2105         default:
2106                 BUG();
2107         }
2108 }
2109 
2110 
2111 static void
2112 vmxnet3_restore_vlan(struct vmxnet3_adapter *adapter)
2113 {
2114         u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2115         u16 vid;
2116 
2117         /* allow untagged pkts */
2118         VMXNET3_SET_VFTABLE_ENTRY(vfTable, 0);
2119 
2120         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2121                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
2122 }
2123 
2124 
2125 static int
2126 vmxnet3_vlan_rx_add_vid(struct net_device *netdev, __be16 proto, u16 vid)
2127 {
2128         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2129 
2130         if (!(netdev->flags & IFF_PROMISC)) {
2131                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2132                 unsigned long flags;
2133 
2134                 VMXNET3_SET_VFTABLE_ENTRY(vfTable, vid);
2135                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2136                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2137                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2138                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2139         }
2140 
2141         set_bit(vid, adapter->active_vlans);
2142 
2143         return 0;
2144 }
2145 
2146 
2147 static int
2148 vmxnet3_vlan_rx_kill_vid(struct net_device *netdev, __be16 proto, u16 vid)
2149 {
2150         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2151 
2152         if (!(netdev->flags & IFF_PROMISC)) {
2153                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2154                 unsigned long flags;
2155 
2156                 VMXNET3_CLEAR_VFTABLE_ENTRY(vfTable, vid);
2157                 spin_lock_irqsave(&adapter->cmd_lock, flags);
2158                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2159                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2160                 spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2161         }
2162 
2163         clear_bit(vid, adapter->active_vlans);
2164 
2165         return 0;
2166 }
2167 
2168 
2169 static u8 *
2170 vmxnet3_copy_mc(struct net_device *netdev)
2171 {
2172         u8 *buf = NULL;
2173         u32 sz = netdev_mc_count(netdev) * ETH_ALEN;
2174 
2175         /* struct Vmxnet3_RxFilterConf.mfTableLen is u16. */
2176         if (sz <= 0xffff) {
2177                 /* We may be called with BH disabled */
2178                 buf = kmalloc(sz, GFP_ATOMIC);
2179                 if (buf) {
2180                         struct netdev_hw_addr *ha;
2181                         int i = 0;
2182 
2183                         netdev_for_each_mc_addr(ha, netdev)
2184                                 memcpy(buf + i++ * ETH_ALEN, ha->addr,
2185                                        ETH_ALEN);
2186                 }
2187         }
2188         return buf;
2189 }
2190 
2191 
2192 static void
2193 vmxnet3_set_mc(struct net_device *netdev)
2194 {
2195         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2196         unsigned long flags;
2197         struct Vmxnet3_RxFilterConf *rxConf =
2198                                         &adapter->shared->devRead.rxFilterConf;
2199         u8 *new_table = NULL;
2200         dma_addr_t new_table_pa = 0;
2201         u32 new_mode = VMXNET3_RXM_UCAST;
2202 
2203         if (netdev->flags & IFF_PROMISC) {
2204                 u32 *vfTable = adapter->shared->devRead.rxFilterConf.vfTable;
2205                 memset(vfTable, 0, VMXNET3_VFT_SIZE * sizeof(*vfTable));
2206 
2207                 new_mode |= VMXNET3_RXM_PROMISC;
2208         } else {
2209                 vmxnet3_restore_vlan(adapter);
2210         }
2211 
2212         if (netdev->flags & IFF_BROADCAST)
2213                 new_mode |= VMXNET3_RXM_BCAST;
2214 
2215         if (netdev->flags & IFF_ALLMULTI)
2216                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2217         else
2218                 if (!netdev_mc_empty(netdev)) {
2219                         new_table = vmxnet3_copy_mc(netdev);
2220                         if (new_table) {
2221                                 size_t sz = netdev_mc_count(netdev) * ETH_ALEN;
2222 
2223                                 rxConf->mfTableLen = cpu_to_le16(sz);
2224                                 new_table_pa = dma_map_single(
2225                                                         &adapter->pdev->dev,
2226                                                         new_table,
2227                                                         sz,
2228                                                         PCI_DMA_TODEVICE);
2229                         }
2230 
2231                         if (!dma_mapping_error(&adapter->pdev->dev,
2232                                                new_table_pa)) {
2233                                 new_mode |= VMXNET3_RXM_MCAST;
2234                                 rxConf->mfTablePA = cpu_to_le64(new_table_pa);
2235                         } else {
2236                                 netdev_info(netdev,
2237                                             "failed to copy mcast list, setting ALL_MULTI\n");
2238                                 new_mode |= VMXNET3_RXM_ALL_MULTI;
2239                         }
2240                 }
2241 
2242         if (!(new_mode & VMXNET3_RXM_MCAST)) {
2243                 rxConf->mfTableLen = 0;
2244                 rxConf->mfTablePA = 0;
2245         }
2246 
2247         spin_lock_irqsave(&adapter->cmd_lock, flags);
2248         if (new_mode != rxConf->rxMode) {
2249                 rxConf->rxMode = cpu_to_le32(new_mode);
2250                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2251                                        VMXNET3_CMD_UPDATE_RX_MODE);
2252                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2253                                        VMXNET3_CMD_UPDATE_VLAN_FILTERS);
2254         }
2255 
2256         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2257                                VMXNET3_CMD_UPDATE_MAC_FILTERS);
2258         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2259 
2260         if (new_table_pa)
2261                 dma_unmap_single(&adapter->pdev->dev, new_table_pa,
2262                                  rxConf->mfTableLen, PCI_DMA_TODEVICE);
2263         kfree(new_table);
2264 }
2265 
2266 void
2267 vmxnet3_rq_destroy_all(struct vmxnet3_adapter *adapter)
2268 {
2269         int i;
2270 
2271         for (i = 0; i < adapter->num_rx_queues; i++)
2272                 vmxnet3_rq_destroy(&adapter->rx_queue[i], adapter);
2273 }
2274 
2275 
2276 /*
2277  *   Set up driver_shared based on settings in adapter.
2278  */
2279 
2280 static void
2281 vmxnet3_setup_driver_shared(struct vmxnet3_adapter *adapter)
2282 {
2283         struct Vmxnet3_DriverShared *shared = adapter->shared;
2284         struct Vmxnet3_DSDevRead *devRead = &shared->devRead;
2285         struct Vmxnet3_TxQueueConf *tqc;
2286         struct Vmxnet3_RxQueueConf *rqc;
2287         int i;
2288 
2289         memset(shared, 0, sizeof(*shared));
2290 
2291         /* driver settings */
2292         shared->magic = cpu_to_le32(VMXNET3_REV1_MAGIC);
2293         devRead->misc.driverInfo.version = cpu_to_le32(
2294                                                 VMXNET3_DRIVER_VERSION_NUM);
2295         devRead->misc.driverInfo.gos.gosBits = (sizeof(void *) == 4 ?
2296                                 VMXNET3_GOS_BITS_32 : VMXNET3_GOS_BITS_64);
2297         devRead->misc.driverInfo.gos.gosType = VMXNET3_GOS_TYPE_LINUX;
2298         *((u32 *)&devRead->misc.driverInfo.gos) = cpu_to_le32(
2299                                 *((u32 *)&devRead->misc.driverInfo.gos));
2300         devRead->misc.driverInfo.vmxnet3RevSpt = cpu_to_le32(1);
2301         devRead->misc.driverInfo.uptVerSpt = cpu_to_le32(1);
2302 
2303         devRead->misc.ddPA = cpu_to_le64(adapter->adapter_pa);
2304         devRead->misc.ddLen = cpu_to_le32(sizeof(struct vmxnet3_adapter));
2305 
2306         /* set up feature flags */
2307         if (adapter->netdev->features & NETIF_F_RXCSUM)
2308                 devRead->misc.uptFeatures |= UPT1_F_RXCSUM;
2309 
2310         if (adapter->netdev->features & NETIF_F_LRO) {
2311                 devRead->misc.uptFeatures |= UPT1_F_LRO;
2312                 devRead->misc.maxNumRxSG = cpu_to_le16(1 + MAX_SKB_FRAGS);
2313         }
2314         if (adapter->netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
2315                 devRead->misc.uptFeatures |= UPT1_F_RXVLAN;
2316 
2317         devRead->misc.mtu = cpu_to_le32(adapter->netdev->mtu);
2318         devRead->misc.queueDescPA = cpu_to_le64(adapter->queue_desc_pa);
2319         devRead->misc.queueDescLen = cpu_to_le32(
2320                 adapter->num_tx_queues * sizeof(struct Vmxnet3_TxQueueDesc) +
2321                 adapter->num_rx_queues * sizeof(struct Vmxnet3_RxQueueDesc));
2322 
2323         /* tx queue settings */
2324         devRead->misc.numTxQueues =  adapter->num_tx_queues;
2325         for (i = 0; i < adapter->num_tx_queues; i++) {
2326                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2327                 BUG_ON(adapter->tx_queue[i].tx_ring.base == NULL);
2328                 tqc = &adapter->tqd_start[i].conf;
2329                 tqc->txRingBasePA   = cpu_to_le64(tq->tx_ring.basePA);
2330                 tqc->dataRingBasePA = cpu_to_le64(tq->data_ring.basePA);
2331                 tqc->compRingBasePA = cpu_to_le64(tq->comp_ring.basePA);
2332                 tqc->ddPA           = cpu_to_le64(tq->buf_info_pa);
2333                 tqc->txRingSize     = cpu_to_le32(tq->tx_ring.size);
2334                 tqc->dataRingSize   = cpu_to_le32(tq->data_ring.size);
2335                 tqc->compRingSize   = cpu_to_le32(tq->comp_ring.size);
2336                 tqc->ddLen          = cpu_to_le32(
2337                                         sizeof(struct vmxnet3_tx_buf_info) *
2338                                         tqc->txRingSize);
2339                 tqc->intrIdx        = tq->comp_ring.intr_idx;
2340         }
2341 
2342         /* rx queue settings */
2343         devRead->misc.numRxQueues = adapter->num_rx_queues;
2344         for (i = 0; i < adapter->num_rx_queues; i++) {
2345                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2346                 rqc = &adapter->rqd_start[i].conf;
2347                 rqc->rxRingBasePA[0] = cpu_to_le64(rq->rx_ring[0].basePA);
2348                 rqc->rxRingBasePA[1] = cpu_to_le64(rq->rx_ring[1].basePA);
2349                 rqc->compRingBasePA  = cpu_to_le64(rq->comp_ring.basePA);
2350                 rqc->ddPA            = cpu_to_le64(rq->buf_info_pa);
2351                 rqc->rxRingSize[0]   = cpu_to_le32(rq->rx_ring[0].size);
2352                 rqc->rxRingSize[1]   = cpu_to_le32(rq->rx_ring[1].size);
2353                 rqc->compRingSize    = cpu_to_le32(rq->comp_ring.size);
2354                 rqc->ddLen           = cpu_to_le32(
2355                                         sizeof(struct vmxnet3_rx_buf_info) *
2356                                         (rqc->rxRingSize[0] +
2357                                          rqc->rxRingSize[1]));
2358                 rqc->intrIdx         = rq->comp_ring.intr_idx;
2359         }
2360 
2361 #ifdef VMXNET3_RSS
2362         memset(adapter->rss_conf, 0, sizeof(*adapter->rss_conf));
2363 
2364         if (adapter->rss) {
2365                 struct UPT1_RSSConf *rssConf = adapter->rss_conf;
2366 
2367                 devRead->misc.uptFeatures |= UPT1_F_RSS;
2368                 devRead->misc.numRxQueues = adapter->num_rx_queues;
2369                 rssConf->hashType = UPT1_RSS_HASH_TYPE_TCP_IPV4 |
2370                                     UPT1_RSS_HASH_TYPE_IPV4 |
2371                                     UPT1_RSS_HASH_TYPE_TCP_IPV6 |
2372                                     UPT1_RSS_HASH_TYPE_IPV6;
2373                 rssConf->hashFunc = UPT1_RSS_HASH_FUNC_TOEPLITZ;
2374                 rssConf->hashKeySize = UPT1_RSS_MAX_KEY_SIZE;
2375                 rssConf->indTableSize = VMXNET3_RSS_IND_TABLE_SIZE;
2376                 netdev_rss_key_fill(rssConf->hashKey, sizeof(rssConf->hashKey));
2377 
2378                 for (i = 0; i < rssConf->indTableSize; i++)
2379                         rssConf->indTable[i] = ethtool_rxfh_indir_default(
2380                                 i, adapter->num_rx_queues);
2381 
2382                 devRead->rssConfDesc.confVer = 1;
2383                 devRead->rssConfDesc.confLen = cpu_to_le32(sizeof(*rssConf));
2384                 devRead->rssConfDesc.confPA =
2385                         cpu_to_le64(adapter->rss_conf_pa);
2386         }
2387 
2388 #endif /* VMXNET3_RSS */
2389 
2390         /* intr settings */
2391         devRead->intrConf.autoMask = adapter->intr.mask_mode ==
2392                                      VMXNET3_IMM_AUTO;
2393         devRead->intrConf.numIntrs = adapter->intr.num_intrs;
2394         for (i = 0; i < adapter->intr.num_intrs; i++)
2395                 devRead->intrConf.modLevels[i] = adapter->intr.mod_levels[i];
2396 
2397         devRead->intrConf.eventIntrIdx = adapter->intr.event_intr_idx;
2398         devRead->intrConf.intrCtrl |= cpu_to_le32(VMXNET3_IC_DISABLE_ALL);
2399 
2400         /* rx filter settings */
2401         devRead->rxFilterConf.rxMode = 0;
2402         vmxnet3_restore_vlan(adapter);
2403         vmxnet3_write_mac_addr(adapter, adapter->netdev->dev_addr);
2404 
2405         /* the rest are already zeroed */
2406 }
2407 
2408 
2409 int
2410 vmxnet3_activate_dev(struct vmxnet3_adapter *adapter)
2411 {
2412         int err, i;
2413         u32 ret;
2414         unsigned long flags;
2415 
2416         netdev_dbg(adapter->netdev, "%s: skb_buf_size %d, rx_buf_per_pkt %d,"
2417                 " ring sizes %u %u %u\n", adapter->netdev->name,
2418                 adapter->skb_buf_size, adapter->rx_buf_per_pkt,
2419                 adapter->tx_queue[0].tx_ring.size,
2420                 adapter->rx_queue[0].rx_ring[0].size,
2421                 adapter->rx_queue[0].rx_ring[1].size);
2422 
2423         vmxnet3_tq_init_all(adapter);
2424         err = vmxnet3_rq_init_all(adapter);
2425         if (err) {
2426                 netdev_err(adapter->netdev,
2427                            "Failed to init rx queue error %d\n", err);
2428                 goto rq_err;
2429         }
2430 
2431         err = vmxnet3_request_irqs(adapter);
2432         if (err) {
2433                 netdev_err(adapter->netdev,
2434                            "Failed to setup irq for error %d\n", err);
2435                 goto irq_err;
2436         }
2437 
2438         vmxnet3_setup_driver_shared(adapter);
2439 
2440         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, VMXNET3_GET_ADDR_LO(
2441                                adapter->shared_pa));
2442         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, VMXNET3_GET_ADDR_HI(
2443                                adapter->shared_pa));
2444         spin_lock_irqsave(&adapter->cmd_lock, flags);
2445         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2446                                VMXNET3_CMD_ACTIVATE_DEV);
2447         ret = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2448         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2449 
2450         if (ret != 0) {
2451                 netdev_err(adapter->netdev,
2452                            "Failed to activate dev: error %u\n", ret);
2453                 err = -EINVAL;
2454                 goto activate_err;
2455         }
2456 
2457         for (i = 0; i < adapter->num_rx_queues; i++) {
2458                 VMXNET3_WRITE_BAR0_REG(adapter,
2459                                 VMXNET3_REG_RXPROD + i * VMXNET3_REG_ALIGN,
2460                                 adapter->rx_queue[i].rx_ring[0].next2fill);
2461                 VMXNET3_WRITE_BAR0_REG(adapter, (VMXNET3_REG_RXPROD2 +
2462                                 (i * VMXNET3_REG_ALIGN)),
2463                                 adapter->rx_queue[i].rx_ring[1].next2fill);
2464         }
2465 
2466         /* Apply the rx filter settins last. */
2467         vmxnet3_set_mc(adapter->netdev);
2468 
2469         /*
2470          * Check link state when first activating device. It will start the
2471          * tx queue if the link is up.
2472          */
2473         vmxnet3_check_link(adapter, true);
2474         for (i = 0; i < adapter->num_rx_queues; i++)
2475                 napi_enable(&adapter->rx_queue[i].napi);
2476         vmxnet3_enable_all_intrs(adapter);
2477         clear_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
2478         return 0;
2479 
2480 activate_err:
2481         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAL, 0);
2482         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_DSAH, 0);
2483         vmxnet3_free_irqs(adapter);
2484 irq_err:
2485 rq_err:
2486         /* free up buffers we allocated */
2487         vmxnet3_rq_cleanup_all(adapter);
2488         return err;
2489 }
2490 
2491 
2492 void
2493 vmxnet3_reset_dev(struct vmxnet3_adapter *adapter)
2494 {
2495         unsigned long flags;
2496         spin_lock_irqsave(&adapter->cmd_lock, flags);
2497         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD, VMXNET3_CMD_RESET_DEV);
2498         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2499 }
2500 
2501 
2502 int
2503 vmxnet3_quiesce_dev(struct vmxnet3_adapter *adapter)
2504 {
2505         int i;
2506         unsigned long flags;
2507         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state))
2508                 return 0;
2509 
2510 
2511         spin_lock_irqsave(&adapter->cmd_lock, flags);
2512         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2513                                VMXNET3_CMD_QUIESCE_DEV);
2514         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2515         vmxnet3_disable_all_intrs(adapter);
2516 
2517         for (i = 0; i < adapter->num_rx_queues; i++)
2518                 napi_disable(&adapter->rx_queue[i].napi);
2519         netif_tx_disable(adapter->netdev);
2520         adapter->link_speed = 0;
2521         netif_carrier_off(adapter->netdev);
2522 
2523         vmxnet3_tq_cleanup_all(adapter);
2524         vmxnet3_rq_cleanup_all(adapter);
2525         vmxnet3_free_irqs(adapter);
2526         return 0;
2527 }
2528 
2529 
2530 static void
2531 vmxnet3_write_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2532 {
2533         u32 tmp;
2534 
2535         tmp = *(u32 *)mac;
2536         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACL, tmp);
2537 
2538         tmp = (mac[5] << 8) | mac[4];
2539         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_MACH, tmp);
2540 }
2541 
2542 
2543 static int
2544 vmxnet3_set_mac_addr(struct net_device *netdev, void *p)
2545 {
2546         struct sockaddr *addr = p;
2547         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2548 
2549         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
2550         vmxnet3_write_mac_addr(adapter, addr->sa_data);
2551 
2552         return 0;
2553 }
2554 
2555 
2556 /* ==================== initialization and cleanup routines ============ */
2557 
2558 static int
2559 vmxnet3_alloc_pci_resources(struct vmxnet3_adapter *adapter, bool *dma64)
2560 {
2561         int err;
2562         unsigned long mmio_start, mmio_len;
2563         struct pci_dev *pdev = adapter->pdev;
2564 
2565         err = pci_enable_device(pdev);
2566         if (err) {
2567                 dev_err(&pdev->dev, "Failed to enable adapter: error %d\n", err);
2568                 return err;
2569         }
2570 
2571         if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) == 0) {
2572                 if (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) {
2573                         dev_err(&pdev->dev,
2574                                 "pci_set_consistent_dma_mask failed\n");
2575                         err = -EIO;
2576                         goto err_set_mask;
2577                 }
2578                 *dma64 = true;
2579         } else {
2580                 if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) {
2581                         dev_err(&pdev->dev,
2582                                 "pci_set_dma_mask failed\n");
2583                         err = -EIO;
2584                         goto err_set_mask;
2585                 }
2586                 *dma64 = false;
2587         }
2588 
2589         err = pci_request_selected_regions(pdev, (1 << 2) - 1,
2590                                            vmxnet3_driver_name);
2591         if (err) {
2592                 dev_err(&pdev->dev,
2593                         "Failed to request region for adapter: error %d\n", err);
2594                 goto err_set_mask;
2595         }
2596 
2597         pci_set_master(pdev);
2598 
2599         mmio_start = pci_resource_start(pdev, 0);
2600         mmio_len = pci_resource_len(pdev, 0);
2601         adapter->hw_addr0 = ioremap(mmio_start, mmio_len);
2602         if (!adapter->hw_addr0) {
2603                 dev_err(&pdev->dev, "Failed to map bar0\n");
2604                 err = -EIO;
2605                 goto err_ioremap;
2606         }
2607 
2608         mmio_start = pci_resource_start(pdev, 1);
2609         mmio_len = pci_resource_len(pdev, 1);
2610         adapter->hw_addr1 = ioremap(mmio_start, mmio_len);
2611         if (!adapter->hw_addr1) {
2612                 dev_err(&pdev->dev, "Failed to map bar1\n");
2613                 err = -EIO;
2614                 goto err_bar1;
2615         }
2616         return 0;
2617 
2618 err_bar1:
2619         iounmap(adapter->hw_addr0);
2620 err_ioremap:
2621         pci_release_selected_regions(pdev, (1 << 2) - 1);
2622 err_set_mask:
2623         pci_disable_device(pdev);
2624         return err;
2625 }
2626 
2627 
2628 static void
2629 vmxnet3_free_pci_resources(struct vmxnet3_adapter *adapter)
2630 {
2631         BUG_ON(!adapter->pdev);
2632 
2633         iounmap(adapter->hw_addr0);
2634         iounmap(adapter->hw_addr1);
2635         pci_release_selected_regions(adapter->pdev, (1 << 2) - 1);
2636         pci_disable_device(adapter->pdev);
2637 }
2638 
2639 
2640 static void
2641 vmxnet3_adjust_rx_ring_size(struct vmxnet3_adapter *adapter)
2642 {
2643         size_t sz, i, ring0_size, ring1_size, comp_size;
2644         struct vmxnet3_rx_queue *rq = &adapter->rx_queue[0];
2645 
2646 
2647         if (adapter->netdev->mtu <= VMXNET3_MAX_SKB_BUF_SIZE -
2648                                     VMXNET3_MAX_ETH_HDR_SIZE) {
2649                 adapter->skb_buf_size = adapter->netdev->mtu +
2650                                         VMXNET3_MAX_ETH_HDR_SIZE;
2651                 if (adapter->skb_buf_size < VMXNET3_MIN_T0_BUF_SIZE)
2652                         adapter->skb_buf_size = VMXNET3_MIN_T0_BUF_SIZE;
2653 
2654                 adapter->rx_buf_per_pkt = 1;
2655         } else {
2656                 adapter->skb_buf_size = VMXNET3_MAX_SKB_BUF_SIZE;
2657                 sz = adapter->netdev->mtu - VMXNET3_MAX_SKB_BUF_SIZE +
2658                                             VMXNET3_MAX_ETH_HDR_SIZE;
2659                 adapter->rx_buf_per_pkt = 1 + (sz + PAGE_SIZE - 1) / PAGE_SIZE;
2660         }
2661 
2662         /*
2663          * for simplicity, force the ring0 size to be a multiple of
2664          * rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN
2665          */
2666         sz = adapter->rx_buf_per_pkt * VMXNET3_RING_SIZE_ALIGN;
2667         ring0_size = adapter->rx_queue[0].rx_ring[0].size;
2668         ring0_size = (ring0_size + sz - 1) / sz * sz;
2669         ring0_size = min_t(u32, ring0_size, VMXNET3_RX_RING_MAX_SIZE /
2670                            sz * sz);
2671         ring1_size = adapter->rx_queue[0].rx_ring[1].size;
2672         ring1_size = (ring1_size + sz - 1) / sz * sz;
2673         ring1_size = min_t(u32, ring1_size, VMXNET3_RX_RING2_MAX_SIZE /
2674                            sz * sz);
2675         comp_size = ring0_size + ring1_size;
2676 
2677         for (i = 0; i < adapter->num_rx_queues; i++) {
2678                 rq = &adapter->rx_queue[i];
2679                 rq->rx_ring[0].size = ring0_size;
2680                 rq->rx_ring[1].size = ring1_size;
2681                 rq->comp_ring.size = comp_size;
2682         }
2683 }
2684 
2685 
2686 int
2687 vmxnet3_create_queues(struct vmxnet3_adapter *adapter, u32 tx_ring_size,
2688                       u32 rx_ring_size, u32 rx_ring2_size)
2689 {
2690         int err = 0, i;
2691 
2692         for (i = 0; i < adapter->num_tx_queues; i++) {
2693                 struct vmxnet3_tx_queue *tq = &adapter->tx_queue[i];
2694                 tq->tx_ring.size   = tx_ring_size;
2695                 tq->data_ring.size = tx_ring_size;
2696                 tq->comp_ring.size = tx_ring_size;
2697                 tq->shared = &adapter->tqd_start[i].ctrl;
2698                 tq->stopped = true;
2699                 tq->adapter = adapter;
2700                 tq->qid = i;
2701                 err = vmxnet3_tq_create(tq, adapter);
2702                 /*
2703                  * Too late to change num_tx_queues. We cannot do away with
2704                  * lesser number of queues than what we asked for
2705                  */
2706                 if (err)
2707                         goto queue_err;
2708         }
2709 
2710         adapter->rx_queue[0].rx_ring[0].size = rx_ring_size;
2711         adapter->rx_queue[0].rx_ring[1].size = rx_ring2_size;
2712         vmxnet3_adjust_rx_ring_size(adapter);
2713         for (i = 0; i < adapter->num_rx_queues; i++) {
2714                 struct vmxnet3_rx_queue *rq = &adapter->rx_queue[i];
2715                 /* qid and qid2 for rx queues will be assigned later when num
2716                  * of rx queues is finalized after allocating intrs */
2717                 rq->shared = &adapter->rqd_start[i].ctrl;
2718                 rq->adapter = adapter;
2719                 err = vmxnet3_rq_create(rq, adapter);
2720                 if (err) {
2721                         if (i == 0) {
2722                                 netdev_err(adapter->netdev,
2723                                            "Could not allocate any rx queues. "
2724                                            "Aborting.\n");
2725                                 goto queue_err;
2726                         } else {
2727                                 netdev_info(adapter->netdev,
2728                                             "Number of rx queues changed "
2729                                             "to : %d.\n", i);
2730                                 adapter->num_rx_queues = i;
2731                                 err = 0;
2732                                 break;
2733                         }
2734                 }
2735         }
2736         return err;
2737 queue_err:
2738         vmxnet3_tq_destroy_all(adapter);
2739         return err;
2740 }
2741 
2742 static int
2743 vmxnet3_open(struct net_device *netdev)
2744 {
2745         struct vmxnet3_adapter *adapter;
2746         int err, i;
2747 
2748         adapter = netdev_priv(netdev);
2749 
2750         for (i = 0; i < adapter->num_tx_queues; i++)
2751                 spin_lock_init(&adapter->tx_queue[i].tx_lock);
2752 
2753         err = vmxnet3_create_queues(adapter, adapter->tx_ring_size,
2754                                     adapter->rx_ring_size,
2755                                     adapter->rx_ring2_size);
2756         if (err)
2757                 goto queue_err;
2758 
2759         err = vmxnet3_activate_dev(adapter);
2760         if (err)
2761                 goto activate_err;
2762 
2763         return 0;
2764 
2765 activate_err:
2766         vmxnet3_rq_destroy_all(adapter);
2767         vmxnet3_tq_destroy_all(adapter);
2768 queue_err:
2769         return err;
2770 }
2771 
2772 
2773 static int
2774 vmxnet3_close(struct net_device *netdev)
2775 {
2776         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2777 
2778         /*
2779          * Reset_work may be in the middle of resetting the device, wait for its
2780          * completion.
2781          */
2782         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2783                 msleep(1);
2784 
2785         vmxnet3_quiesce_dev(adapter);
2786 
2787         vmxnet3_rq_destroy_all(adapter);
2788         vmxnet3_tq_destroy_all(adapter);
2789 
2790         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2791 
2792 
2793         return 0;
2794 }
2795 
2796 
2797 void
2798 vmxnet3_force_close(struct vmxnet3_adapter *adapter)
2799 {
2800         int i;
2801 
2802         /*
2803          * we must clear VMXNET3_STATE_BIT_RESETTING, otherwise
2804          * vmxnet3_close() will deadlock.
2805          */
2806         BUG_ON(test_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state));
2807 
2808         /* we need to enable NAPI, otherwise dev_close will deadlock */
2809         for (i = 0; i < adapter->num_rx_queues; i++)
2810                 napi_enable(&adapter->rx_queue[i].napi);
2811         dev_close(adapter->netdev);
2812 }
2813 
2814 
2815 static int
2816 vmxnet3_change_mtu(struct net_device *netdev, int new_mtu)
2817 {
2818         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
2819         int err = 0;
2820 
2821         if (new_mtu < VMXNET3_MIN_MTU || new_mtu > VMXNET3_MAX_MTU)
2822                 return -EINVAL;
2823 
2824         netdev->mtu = new_mtu;
2825 
2826         /*
2827          * Reset_work may be in the middle of resetting the device, wait for its
2828          * completion.
2829          */
2830         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
2831                 msleep(1);
2832 
2833         if (netif_running(netdev)) {
2834                 vmxnet3_quiesce_dev(adapter);
2835                 vmxnet3_reset_dev(adapter);
2836 
2837                 /* we need to re-create the rx queue based on the new mtu */
2838                 vmxnet3_rq_destroy_all(adapter);
2839                 vmxnet3_adjust_rx_ring_size(adapter);
2840                 err = vmxnet3_rq_create_all(adapter);
2841                 if (err) {
2842                         netdev_err(netdev,
2843                                    "failed to re-create rx queues, "
2844                                    " error %d. Closing it.\n", err);
2845                         goto out;
2846                 }
2847 
2848                 err = vmxnet3_activate_dev(adapter);
2849                 if (err) {
2850                         netdev_err(netdev,
2851                                    "failed to re-activate, error %d. "
2852                                    "Closing it\n", err);
2853                         goto out;
2854                 }
2855         }
2856 
2857 out:
2858         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
2859         if (err)
2860                 vmxnet3_force_close(adapter);
2861 
2862         return err;
2863 }
2864 
2865 
2866 static void
2867 vmxnet3_declare_features(struct vmxnet3_adapter *adapter, bool dma64)
2868 {
2869         struct net_device *netdev = adapter->netdev;
2870 
2871         netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM |
2872                 NETIF_F_HW_CSUM | NETIF_F_HW_VLAN_CTAG_TX |
2873                 NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_TSO | NETIF_F_TSO6 |
2874                 NETIF_F_LRO;
2875         if (dma64)
2876                 netdev->hw_features |= NETIF_F_HIGHDMA;
2877         netdev->vlan_features = netdev->hw_features &
2878                                 ~(NETIF_F_HW_VLAN_CTAG_TX |
2879                                   NETIF_F_HW_VLAN_CTAG_RX);
2880         netdev->features = netdev->hw_features | NETIF_F_HW_VLAN_CTAG_FILTER;
2881 }
2882 
2883 
2884 static void
2885 vmxnet3_read_mac_addr(struct vmxnet3_adapter *adapter, u8 *mac)
2886 {
2887         u32 tmp;
2888 
2889         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACL);
2890         *(u32 *)mac = tmp;
2891 
2892         tmp = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_MACH);
2893         mac[4] = tmp & 0xff;
2894         mac[5] = (tmp >> 8) & 0xff;
2895 }
2896 
2897 #ifdef CONFIG_PCI_MSI
2898 
2899 /*
2900  * Enable MSIx vectors.
2901  * Returns :
2902  *      VMXNET3_LINUX_MIN_MSIX_VECT when only minimum number of vectors required
2903  *       were enabled.
2904  *      number of vectors which were enabled otherwise (this number is greater
2905  *       than VMXNET3_LINUX_MIN_MSIX_VECT)
2906  */
2907 
2908 static int
2909 vmxnet3_acquire_msix_vectors(struct vmxnet3_adapter *adapter, int nvec)
2910 {
2911         int ret = pci_enable_msix_range(adapter->pdev,
2912                                         adapter->intr.msix_entries, nvec, nvec);
2913 
2914         if (ret == -ENOSPC && nvec > VMXNET3_LINUX_MIN_MSIX_VECT) {
2915                 dev_err(&adapter->netdev->dev,
2916                         "Failed to enable %d MSI-X, trying %d\n",
2917                         nvec, VMXNET3_LINUX_MIN_MSIX_VECT);
2918 
2919                 ret = pci_enable_msix_range(adapter->pdev,
2920                                             adapter->intr.msix_entries,
2921                                             VMXNET3_LINUX_MIN_MSIX_VECT,
2922                                             VMXNET3_LINUX_MIN_MSIX_VECT);
2923         }
2924 
2925         if (ret < 0) {
2926                 dev_err(&adapter->netdev->dev,
2927                         "Failed to enable MSI-X, error: %d\n", ret);
2928         }
2929 
2930         return ret;
2931 }
2932 
2933 
2934 #endif /* CONFIG_PCI_MSI */
2935 
2936 static void
2937 vmxnet3_alloc_intr_resources(struct vmxnet3_adapter *adapter)
2938 {
2939         u32 cfg;
2940         unsigned long flags;
2941 
2942         /* intr settings */
2943         spin_lock_irqsave(&adapter->cmd_lock, flags);
2944         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
2945                                VMXNET3_CMD_GET_CONF_INTR);
2946         cfg = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_CMD);
2947         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
2948         adapter->intr.type = cfg & 0x3;
2949         adapter->intr.mask_mode = (cfg >> 2) & 0x3;
2950 
2951         if (adapter->intr.type == VMXNET3_IT_AUTO) {
2952                 adapter->intr.type = VMXNET3_IT_MSIX;
2953         }
2954 
2955 #ifdef CONFIG_PCI_MSI
2956         if (adapter->intr.type == VMXNET3_IT_MSIX) {
2957                 int i, nvec;
2958 
2959                 nvec  = adapter->share_intr == VMXNET3_INTR_TXSHARE ?
2960                         1 : adapter->num_tx_queues;
2961                 nvec += adapter->share_intr == VMXNET3_INTR_BUDDYSHARE ?
2962                         0 : adapter->num_rx_queues;
2963                 nvec += 1;      /* for link event */
2964                 nvec = nvec > VMXNET3_LINUX_MIN_MSIX_VECT ?
2965                        nvec : VMXNET3_LINUX_MIN_MSIX_VECT;
2966 
2967                 for (i = 0; i < nvec; i++)
2968                         adapter->intr.msix_entries[i].entry = i;
2969 
2970                 nvec = vmxnet3_acquire_msix_vectors(adapter, nvec);
2971                 if (nvec < 0)
2972                         goto msix_err;
2973 
2974                 /* If we cannot allocate one MSIx vector per queue
2975                  * then limit the number of rx queues to 1
2976                  */
2977                 if (nvec == VMXNET3_LINUX_MIN_MSIX_VECT) {
2978                         if (adapter->share_intr != VMXNET3_INTR_BUDDYSHARE
2979                             || adapter->num_rx_queues != 1) {
2980                                 adapter->share_intr = VMXNET3_INTR_TXSHARE;
2981                                 netdev_err(adapter->netdev,
2982                                            "Number of rx queues : 1\n");
2983                                 adapter->num_rx_queues = 1;
2984                         }
2985                 }
2986 
2987                 adapter->intr.num_intrs = nvec;
2988                 return;
2989 
2990 msix_err:
2991                 /* If we cannot allocate MSIx vectors use only one rx queue */
2992                 dev_info(&adapter->pdev->dev,
2993                          "Failed to enable MSI-X, error %d. "
2994                          "Limiting #rx queues to 1, try MSI.\n", nvec);
2995 
2996                 adapter->intr.type = VMXNET3_IT_MSI;
2997         }
2998 
2999         if (adapter->intr.type == VMXNET3_IT_MSI) {
3000                 if (!pci_enable_msi(adapter->pdev)) {
3001                         adapter->num_rx_queues = 1;
3002                         adapter->intr.num_intrs = 1;
3003                         return;
3004                 }
3005         }
3006 #endif /* CONFIG_PCI_MSI */
3007 
3008         adapter->num_rx_queues = 1;
3009         dev_info(&adapter->netdev->dev,
3010                  "Using INTx interrupt, #Rx queues: 1.\n");
3011         adapter->intr.type = VMXNET3_IT_INTX;
3012 
3013         /* INT-X related setting */
3014         adapter->intr.num_intrs = 1;
3015 }
3016 
3017 
3018 static void
3019 vmxnet3_free_intr_resources(struct vmxnet3_adapter *adapter)
3020 {
3021         if (adapter->intr.type == VMXNET3_IT_MSIX)
3022                 pci_disable_msix(adapter->pdev);
3023         else if (adapter->intr.type == VMXNET3_IT_MSI)
3024                 pci_disable_msi(adapter->pdev);
3025         else
3026                 BUG_ON(adapter->intr.type != VMXNET3_IT_INTX);
3027 }
3028 
3029 
3030 static void
3031 vmxnet3_tx_timeout(struct net_device *netdev)
3032 {
3033         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3034         adapter->tx_timeout_count++;
3035 
3036         netdev_err(adapter->netdev, "tx hang\n");
3037         schedule_work(&adapter->work);
3038         netif_wake_queue(adapter->netdev);
3039 }
3040 
3041 
3042 static void
3043 vmxnet3_reset_work(struct work_struct *data)
3044 {
3045         struct vmxnet3_adapter *adapter;
3046 
3047         adapter = container_of(data, struct vmxnet3_adapter, work);
3048 
3049         /* if another thread is resetting the device, no need to proceed */
3050         if (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3051                 return;
3052 
3053         /* if the device is closed, we must leave it alone */
3054         rtnl_lock();
3055         if (netif_running(adapter->netdev)) {
3056                 netdev_notice(adapter->netdev, "resetting\n");
3057                 vmxnet3_quiesce_dev(adapter);
3058                 vmxnet3_reset_dev(adapter);
3059                 vmxnet3_activate_dev(adapter);
3060         } else {
3061                 netdev_info(adapter->netdev, "already closed\n");
3062         }
3063         rtnl_unlock();
3064 
3065         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3066 }
3067 
3068 
3069 static int
3070 vmxnet3_probe_device(struct pci_dev *pdev,
3071                      const struct pci_device_id *id)
3072 {
3073         static const struct net_device_ops vmxnet3_netdev_ops = {
3074                 .ndo_open = vmxnet3_open,
3075                 .ndo_stop = vmxnet3_close,
3076                 .ndo_start_xmit = vmxnet3_xmit_frame,
3077                 .ndo_set_mac_address = vmxnet3_set_mac_addr,
3078                 .ndo_change_mtu = vmxnet3_change_mtu,
3079                 .ndo_set_features = vmxnet3_set_features,
3080                 .ndo_get_stats64 = vmxnet3_get_stats64,
3081                 .ndo_tx_timeout = vmxnet3_tx_timeout,
3082                 .ndo_set_rx_mode = vmxnet3_set_mc,
3083                 .ndo_vlan_rx_add_vid = vmxnet3_vlan_rx_add_vid,
3084                 .ndo_vlan_rx_kill_vid = vmxnet3_vlan_rx_kill_vid,
3085 #ifdef CONFIG_NET_POLL_CONTROLLER
3086                 .ndo_poll_controller = vmxnet3_netpoll,
3087 #endif
3088         };
3089         int err;
3090         bool dma64 = false; /* stupid gcc */
3091         u32 ver;
3092         struct net_device *netdev;
3093         struct vmxnet3_adapter *adapter;
3094         u8 mac[ETH_ALEN];
3095         int size;
3096         int num_tx_queues;
3097         int num_rx_queues;
3098 
3099         if (!pci_msi_enabled())
3100                 enable_mq = 0;
3101 
3102 #ifdef VMXNET3_RSS
3103         if (enable_mq)
3104                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3105                                     (int)num_online_cpus());
3106         else
3107 #endif
3108                 num_rx_queues = 1;
3109         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3110 
3111         if (enable_mq)
3112                 num_tx_queues = min(VMXNET3_DEVICE_MAX_TX_QUEUES,
3113                                     (int)num_online_cpus());
3114         else
3115                 num_tx_queues = 1;
3116 
3117         num_tx_queues = rounddown_pow_of_two(num_tx_queues);
3118         netdev = alloc_etherdev_mq(sizeof(struct vmxnet3_adapter),
3119                                    max(num_tx_queues, num_rx_queues));
3120         dev_info(&pdev->dev,
3121                  "# of Tx queues : %d, # of Rx queues : %d\n",
3122                  num_tx_queues, num_rx_queues);
3123 
3124         if (!netdev)
3125                 return -ENOMEM;
3126 
3127         pci_set_drvdata(pdev, netdev);
3128         adapter = netdev_priv(netdev);
3129         adapter->netdev = netdev;
3130         adapter->pdev = pdev;
3131 
3132         adapter->tx_ring_size = VMXNET3_DEF_TX_RING_SIZE;
3133         adapter->rx_ring_size = VMXNET3_DEF_RX_RING_SIZE;
3134         adapter->rx_ring2_size = VMXNET3_DEF_RX_RING2_SIZE;
3135 
3136         spin_lock_init(&adapter->cmd_lock);
3137         adapter->adapter_pa = dma_map_single(&adapter->pdev->dev, adapter,
3138                                              sizeof(struct vmxnet3_adapter),
3139                                              PCI_DMA_TODEVICE);
3140         if (dma_mapping_error(&adapter->pdev->dev, adapter->adapter_pa)) {
3141                 dev_err(&pdev->dev, "Failed to map dma\n");
3142                 err = -EFAULT;
3143                 goto err_dma_map;
3144         }
3145         adapter->shared = dma_alloc_coherent(
3146                                 &adapter->pdev->dev,
3147                                 sizeof(struct Vmxnet3_DriverShared),
3148                                 &adapter->shared_pa, GFP_KERNEL);
3149         if (!adapter->shared) {
3150                 dev_err(&pdev->dev, "Failed to allocate memory\n");
3151                 err = -ENOMEM;
3152                 goto err_alloc_shared;
3153         }
3154 
3155         adapter->num_rx_queues = num_rx_queues;
3156         adapter->num_tx_queues = num_tx_queues;
3157         adapter->rx_buf_per_pkt = 1;
3158 
3159         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3160         size += sizeof(struct Vmxnet3_RxQueueDesc) * adapter->num_rx_queues;
3161         adapter->tqd_start = dma_alloc_coherent(&adapter->pdev->dev, size,
3162                                                 &adapter->queue_desc_pa,
3163                                                 GFP_KERNEL);
3164 
3165         if (!adapter->tqd_start) {
3166                 dev_err(&pdev->dev, "Failed to allocate memory\n");
3167                 err = -ENOMEM;
3168                 goto err_alloc_queue_desc;
3169         }
3170         adapter->rqd_start = (struct Vmxnet3_RxQueueDesc *)(adapter->tqd_start +
3171                                                             adapter->num_tx_queues);
3172 
3173         adapter->pm_conf = dma_alloc_coherent(&adapter->pdev->dev,
3174                                               sizeof(struct Vmxnet3_PMConf),
3175                                               &adapter->pm_conf_pa,
3176                                               GFP_KERNEL);
3177         if (adapter->pm_conf == NULL) {
3178                 err = -ENOMEM;
3179                 goto err_alloc_pm;
3180         }
3181 
3182 #ifdef VMXNET3_RSS
3183 
3184         adapter->rss_conf = dma_alloc_coherent(&adapter->pdev->dev,
3185                                                sizeof(struct UPT1_RSSConf),
3186                                                &adapter->rss_conf_pa,
3187                                                GFP_KERNEL);
3188         if (adapter->rss_conf == NULL) {
3189                 err = -ENOMEM;
3190                 goto err_alloc_rss;
3191         }
3192 #endif /* VMXNET3_RSS */
3193 
3194         err = vmxnet3_alloc_pci_resources(adapter, &dma64);
3195         if (err < 0)
3196                 goto err_alloc_pci;
3197 
3198         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_VRRS);
3199         if (ver & 2) {
3200                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 2);
3201                 adapter->version = 2;
3202         } else if (ver & 1) {
3203                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_VRRS, 1);
3204                 adapter->version = 1;
3205         } else {
3206                 dev_err(&pdev->dev,
3207                         "Incompatible h/w version (0x%x) for adapter\n", ver);
3208                 err = -EBUSY;
3209                 goto err_ver;
3210         }
3211         dev_dbg(&pdev->dev, "Using device version %d\n", adapter->version);
3212 
3213         ver = VMXNET3_READ_BAR1_REG(adapter, VMXNET3_REG_UVRS);
3214         if (ver & 1) {
3215                 VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_UVRS, 1);
3216         } else {
3217                 dev_err(&pdev->dev,
3218                         "Incompatible upt version (0x%x) for adapter\n", ver);
3219                 err = -EBUSY;
3220                 goto err_ver;
3221         }
3222 
3223         SET_NETDEV_DEV(netdev, &pdev->dev);
3224         vmxnet3_declare_features(adapter, dma64);
3225 
3226         if (adapter->num_tx_queues == adapter->num_rx_queues)
3227                 adapter->share_intr = VMXNET3_INTR_BUDDYSHARE;
3228         else
3229                 adapter->share_intr = VMXNET3_INTR_DONTSHARE;
3230 
3231         vmxnet3_alloc_intr_resources(adapter);
3232 
3233 #ifdef VMXNET3_RSS
3234         if (adapter->num_rx_queues > 1 &&
3235             adapter->intr.type == VMXNET3_IT_MSIX) {
3236                 adapter->rss = true;
3237                 netdev->hw_features |= NETIF_F_RXHASH;
3238                 netdev->features |= NETIF_F_RXHASH;
3239                 dev_dbg(&pdev->dev, "RSS is enabled.\n");
3240         } else {
3241                 adapter->rss = false;
3242         }
3243 #endif
3244 
3245         vmxnet3_read_mac_addr(adapter, mac);
3246         memcpy(netdev->dev_addr,  mac, netdev->addr_len);
3247 
3248         netdev->netdev_ops = &vmxnet3_netdev_ops;
3249         vmxnet3_set_ethtool_ops(netdev);
3250         netdev->watchdog_timeo = 5 * HZ;
3251 
3252         INIT_WORK(&adapter->work, vmxnet3_reset_work);
3253         set_bit(VMXNET3_STATE_BIT_QUIESCED, &adapter->state);
3254 
3255         if (adapter->intr.type == VMXNET3_IT_MSIX) {
3256                 int i;
3257                 for (i = 0; i < adapter->num_rx_queues; i++) {
3258                         netif_napi_add(adapter->netdev,
3259                                        &adapter->rx_queue[i].napi,
3260                                        vmxnet3_poll_rx_only, 64);
3261                 }
3262         } else {
3263                 netif_napi_add(adapter->netdev, &adapter->rx_queue[0].napi,
3264                                vmxnet3_poll, 64);
3265         }
3266 
3267         netif_set_real_num_tx_queues(adapter->netdev, adapter->num_tx_queues);
3268         netif_set_real_num_rx_queues(adapter->netdev, adapter->num_rx_queues);
3269 
3270         netif_carrier_off(netdev);
3271         err = register_netdev(netdev);
3272 
3273         if (err) {
3274                 dev_err(&pdev->dev, "Failed to register adapter\n");
3275                 goto err_register;
3276         }
3277 
3278         vmxnet3_check_link(adapter, false);
3279         return 0;
3280 
3281 err_register:
3282         vmxnet3_free_intr_resources(adapter);
3283 err_ver:
3284         vmxnet3_free_pci_resources(adapter);
3285 err_alloc_pci:
3286 #ifdef VMXNET3_RSS
3287         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3288                           adapter->rss_conf, adapter->rss_conf_pa);
3289 err_alloc_rss:
3290 #endif
3291         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3292                           adapter->pm_conf, adapter->pm_conf_pa);
3293 err_alloc_pm:
3294         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3295                           adapter->queue_desc_pa);
3296 err_alloc_queue_desc:
3297         dma_free_coherent(&adapter->pdev->dev,
3298                           sizeof(struct Vmxnet3_DriverShared),
3299                           adapter->shared, adapter->shared_pa);
3300 err_alloc_shared:
3301         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3302                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3303 err_dma_map:
3304         free_netdev(netdev);
3305         return err;
3306 }
3307 
3308 
3309 static void
3310 vmxnet3_remove_device(struct pci_dev *pdev)
3311 {
3312         struct net_device *netdev = pci_get_drvdata(pdev);
3313         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3314         int size = 0;
3315         int num_rx_queues;
3316 
3317 #ifdef VMXNET3_RSS
3318         if (enable_mq)
3319                 num_rx_queues = min(VMXNET3_DEVICE_MAX_RX_QUEUES,
3320                                     (int)num_online_cpus());
3321         else
3322 #endif
3323                 num_rx_queues = 1;
3324         num_rx_queues = rounddown_pow_of_two(num_rx_queues);
3325 
3326         cancel_work_sync(&adapter->work);
3327 
3328         unregister_netdev(netdev);
3329 
3330         vmxnet3_free_intr_resources(adapter);
3331         vmxnet3_free_pci_resources(adapter);
3332 #ifdef VMXNET3_RSS
3333         dma_free_coherent(&adapter->pdev->dev, sizeof(struct UPT1_RSSConf),
3334                           adapter->rss_conf, adapter->rss_conf_pa);
3335 #endif
3336         dma_free_coherent(&adapter->pdev->dev, sizeof(struct Vmxnet3_PMConf),
3337                           adapter->pm_conf, adapter->pm_conf_pa);
3338 
3339         size = sizeof(struct Vmxnet3_TxQueueDesc) * adapter->num_tx_queues;
3340         size += sizeof(struct Vmxnet3_RxQueueDesc) * num_rx_queues;
3341         dma_free_coherent(&adapter->pdev->dev, size, adapter->tqd_start,
3342                           adapter->queue_desc_pa);
3343         dma_free_coherent(&adapter->pdev->dev,
3344                           sizeof(struct Vmxnet3_DriverShared),
3345                           adapter->shared, adapter->shared_pa);
3346         dma_unmap_single(&adapter->pdev->dev, adapter->adapter_pa,
3347                          sizeof(struct vmxnet3_adapter), PCI_DMA_TODEVICE);
3348         free_netdev(netdev);
3349 }
3350 
3351 static void vmxnet3_shutdown_device(struct pci_dev *pdev)
3352 {
3353         struct net_device *netdev = pci_get_drvdata(pdev);
3354         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3355         unsigned long flags;
3356 
3357         /* Reset_work may be in the middle of resetting the device, wait for its
3358          * completion.
3359          */
3360         while (test_and_set_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state))
3361                 msleep(1);
3362 
3363         if (test_and_set_bit(VMXNET3_STATE_BIT_QUIESCED,
3364                              &adapter->state)) {
3365                 clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3366                 return;
3367         }
3368         spin_lock_irqsave(&adapter->cmd_lock, flags);
3369         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3370                                VMXNET3_CMD_QUIESCE_DEV);
3371         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3372         vmxnet3_disable_all_intrs(adapter);
3373 
3374         clear_bit(VMXNET3_STATE_BIT_RESETTING, &adapter->state);
3375 }
3376 
3377 
3378 #ifdef CONFIG_PM
3379 
3380 static int
3381 vmxnet3_suspend(struct device *device)
3382 {
3383         struct pci_dev *pdev = to_pci_dev(device);
3384         struct net_device *netdev = pci_get_drvdata(pdev);
3385         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3386         struct Vmxnet3_PMConf *pmConf;
3387         struct ethhdr *ehdr;
3388         struct arphdr *ahdr;
3389         u8 *arpreq;
3390         struct in_device *in_dev;
3391         struct in_ifaddr *ifa;
3392         unsigned long flags;
3393         int i = 0;
3394 
3395         if (!netif_running(netdev))
3396                 return 0;
3397 
3398         for (i = 0; i < adapter->num_rx_queues; i++)
3399                 napi_disable(&adapter->rx_queue[i].napi);
3400 
3401         vmxnet3_disable_all_intrs(adapter);
3402         vmxnet3_free_irqs(adapter);
3403         vmxnet3_free_intr_resources(adapter);
3404 
3405         netif_device_detach(netdev);
3406         netif_tx_stop_all_queues(netdev);
3407 
3408         /* Create wake-up filters. */
3409         pmConf = adapter->pm_conf;
3410         memset(pmConf, 0, sizeof(*pmConf));
3411 
3412         if (adapter->wol & WAKE_UCAST) {
3413                 pmConf->filters[i].patternSize = ETH_ALEN;
3414                 pmConf->filters[i].maskSize = 1;
3415                 memcpy(pmConf->filters[i].pattern, netdev->dev_addr, ETH_ALEN);
3416                 pmConf->filters[i].mask[0] = 0x3F; /* LSB ETH_ALEN bits */
3417 
3418                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3419                 i++;
3420         }
3421 
3422         if (adapter->wol & WAKE_ARP) {
3423                 in_dev = in_dev_get(netdev);
3424                 if (!in_dev)
3425                         goto skip_arp;
3426 
3427                 ifa = (struct in_ifaddr *)in_dev->ifa_list;
3428                 if (!ifa)
3429                         goto skip_arp;
3430 
3431                 pmConf->filters[i].patternSize = ETH_HLEN + /* Ethernet header*/
3432                         sizeof(struct arphdr) +         /* ARP header */
3433                         2 * ETH_ALEN +          /* 2 Ethernet addresses*/
3434                         2 * sizeof(u32);        /*2 IPv4 addresses */
3435                 pmConf->filters[i].maskSize =
3436                         (pmConf->filters[i].patternSize - 1) / 8 + 1;
3437 
3438                 /* ETH_P_ARP in Ethernet header. */
3439                 ehdr = (struct ethhdr *)pmConf->filters[i].pattern;
3440                 ehdr->h_proto = htons(ETH_P_ARP);
3441 
3442                 /* ARPOP_REQUEST in ARP header. */
3443                 ahdr = (struct arphdr *)&pmConf->filters[i].pattern[ETH_HLEN];
3444                 ahdr->ar_op = htons(ARPOP_REQUEST);
3445                 arpreq = (u8 *)(ahdr + 1);
3446 
3447                 /* The Unicast IPv4 address in 'tip' field. */
3448                 arpreq += 2 * ETH_ALEN + sizeof(u32);
3449                 *(u32 *)arpreq = ifa->ifa_address;
3450 
3451                 /* The mask for the relevant bits. */
3452                 pmConf->filters[i].mask[0] = 0x00;
3453                 pmConf->filters[i].mask[1] = 0x30; /* ETH_P_ARP */
3454                 pmConf->filters[i].mask[2] = 0x30; /* ARPOP_REQUEST */
3455                 pmConf->filters[i].mask[3] = 0x00;
3456                 pmConf->filters[i].mask[4] = 0xC0; /* IPv4 TIP */
3457                 pmConf->filters[i].mask[5] = 0x03; /* IPv4 TIP */
3458                 in_dev_put(in_dev);
3459 
3460                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_FILTER;
3461                 i++;
3462         }
3463 
3464 skip_arp:
3465         if (adapter->wol & WAKE_MAGIC)
3466                 pmConf->wakeUpEvents |= VMXNET3_PM_WAKEUP_MAGIC;
3467 
3468         pmConf->numFilters = i;
3469 
3470         adapter->shared->devRead.pmConfDesc.confVer = cpu_to_le32(1);
3471         adapter->shared->devRead.pmConfDesc.confLen = cpu_to_le32(sizeof(
3472                                                                   *pmConf));
3473         adapter->shared->devRead.pmConfDesc.confPA =
3474                 cpu_to_le64(adapter->pm_conf_pa);
3475 
3476         spin_lock_irqsave(&adapter->cmd_lock, flags);
3477         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3478                                VMXNET3_CMD_UPDATE_PMCFG);
3479         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3480 
3481         pci_save_state(pdev);
3482         pci_enable_wake(pdev, pci_choose_state(pdev, PMSG_SUSPEND),
3483                         adapter->wol);
3484         pci_disable_device(pdev);
3485         pci_set_power_state(pdev, pci_choose_state(pdev, PMSG_SUSPEND));
3486 
3487         return 0;
3488 }
3489 
3490 
3491 static int
3492 vmxnet3_resume(struct device *device)
3493 {
3494         int err;
3495         unsigned long flags;
3496         struct pci_dev *pdev = to_pci_dev(device);
3497         struct net_device *netdev = pci_get_drvdata(pdev);
3498         struct vmxnet3_adapter *adapter = netdev_priv(netdev);
3499 
3500         if (!netif_running(netdev))
3501                 return 0;
3502 
3503         pci_set_power_state(pdev, PCI_D0);
3504         pci_restore_state(pdev);
3505         err = pci_enable_device_mem(pdev);
3506         if (err != 0)
3507                 return err;
3508 
3509         pci_enable_wake(pdev, PCI_D0, 0);
3510 
3511         vmxnet3_alloc_intr_resources(adapter);
3512 
3513         /* During hibernate and suspend, device has to be reinitialized as the
3514          * device state need not be preserved.
3515          */
3516 
3517         /* Need not check adapter state as other reset tasks cannot run during
3518          * device resume.
3519          */
3520         spin_lock_irqsave(&adapter->cmd_lock, flags);
3521         VMXNET3_WRITE_BAR1_REG(adapter, VMXNET3_REG_CMD,
3522                                VMXNET3_CMD_QUIESCE_DEV);
3523         spin_unlock_irqrestore(&adapter->cmd_lock, flags);
3524         vmxnet3_tq_cleanup_all(adapter);
3525         vmxnet3_rq_cleanup_all(adapter);
3526 
3527         vmxnet3_reset_dev(adapter);
3528         err = vmxnet3_activate_dev(adapter);
3529         if (err != 0) {
3530                 netdev_err(netdev,
3531                            "failed to re-activate on resume, error: %d", err);
3532                 vmxnet3_force_close(adapter);
3533                 return err;
3534         }
3535         netif_device_attach(netdev);
3536 
3537         return 0;
3538 }
3539 
3540 static const struct dev_pm_ops vmxnet3_pm_ops = {
3541         .suspend = vmxnet3_suspend,
3542         .resume = vmxnet3_resume,
3543         .freeze = vmxnet3_suspend,
3544         .restore = vmxnet3_resume,
3545 };
3546 #endif
3547 
3548 static struct pci_driver vmxnet3_driver = {
3549         .name           = vmxnet3_driver_name,
3550         .id_table       = vmxnet3_pciid_table,
3551         .probe          = vmxnet3_probe_device,
3552         .remove         = vmxnet3_remove_device,
3553         .shutdown       = vmxnet3_shutdown_device,
3554 #ifdef CONFIG_PM
3555         .driver.pm      = &vmxnet3_pm_ops,
3556 #endif
3557 };
3558 
3559 
3560 static int __init
3561 vmxnet3_init_module(void)
3562 {
3563         pr_info("%s - version %s\n", VMXNET3_DRIVER_DESC,
3564                 VMXNET3_DRIVER_VERSION_REPORT);
3565         return pci_register_driver(&vmxnet3_driver);
3566 }
3567 
3568 module_init(vmxnet3_init_module);
3569 
3570 
3571 static void
3572 vmxnet3_exit_module(void)
3573 {
3574         pci_unregister_driver(&vmxnet3_driver);
3575 }
3576 
3577 module_exit(vmxnet3_exit_module);
3578 
3579 MODULE_AUTHOR("VMware, Inc.");
3580 MODULE_DESCRIPTION(VMXNET3_DRIVER_DESC);
3581 MODULE_LICENSE("GPL v2");
3582 MODULE_VERSION(VMXNET3_DRIVER_VERSION_STRING);
3583 

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