Version:  2.0.40 2.2.26 2.4.37 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1

Linux/drivers/net/usb/r8152.c

  1 /*
  2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
  3  *
  4  * This program is free software; you can redistribute it and/or
  5  * modify it under the terms of the GNU General Public License
  6  * version 2 as published by the Free Software Foundation.
  7  *
  8  */
  9 
 10 #include <linux/signal.h>
 11 #include <linux/slab.h>
 12 #include <linux/module.h>
 13 #include <linux/netdevice.h>
 14 #include <linux/etherdevice.h>
 15 #include <linux/mii.h>
 16 #include <linux/ethtool.h>
 17 #include <linux/usb.h>
 18 #include <linux/crc32.h>
 19 #include <linux/if_vlan.h>
 20 #include <linux/uaccess.h>
 21 #include <linux/list.h>
 22 #include <linux/ip.h>
 23 #include <linux/ipv6.h>
 24 #include <net/ip6_checksum.h>
 25 #include <uapi/linux/mdio.h>
 26 #include <linux/mdio.h>
 27 #include <linux/usb/cdc.h>
 28 
 29 /* Version Information */
 30 #define DRIVER_VERSION "v1.08.0 (2015/01/13)"
 31 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
 32 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
 33 #define MODULENAME "r8152"
 34 
 35 #define R8152_PHY_ID            32
 36 
 37 #define PLA_IDR                 0xc000
 38 #define PLA_RCR                 0xc010
 39 #define PLA_RMS                 0xc016
 40 #define PLA_RXFIFO_CTRL0        0xc0a0
 41 #define PLA_RXFIFO_CTRL1        0xc0a4
 42 #define PLA_RXFIFO_CTRL2        0xc0a8
 43 #define PLA_DMY_REG0            0xc0b0
 44 #define PLA_FMC                 0xc0b4
 45 #define PLA_CFG_WOL             0xc0b6
 46 #define PLA_TEREDO_CFG          0xc0bc
 47 #define PLA_MAR                 0xcd00
 48 #define PLA_BACKUP              0xd000
 49 #define PAL_BDC_CR              0xd1a0
 50 #define PLA_TEREDO_TIMER        0xd2cc
 51 #define PLA_REALWOW_TIMER       0xd2e8
 52 #define PLA_LEDSEL              0xdd90
 53 #define PLA_LED_FEATURE         0xdd92
 54 #define PLA_PHYAR               0xde00
 55 #define PLA_BOOT_CTRL           0xe004
 56 #define PLA_GPHY_INTR_IMR       0xe022
 57 #define PLA_EEE_CR              0xe040
 58 #define PLA_EEEP_CR             0xe080
 59 #define PLA_MAC_PWR_CTRL        0xe0c0
 60 #define PLA_MAC_PWR_CTRL2       0xe0ca
 61 #define PLA_MAC_PWR_CTRL3       0xe0cc
 62 #define PLA_MAC_PWR_CTRL4       0xe0ce
 63 #define PLA_WDT6_CTRL           0xe428
 64 #define PLA_TCR0                0xe610
 65 #define PLA_TCR1                0xe612
 66 #define PLA_MTPS                0xe615
 67 #define PLA_TXFIFO_CTRL         0xe618
 68 #define PLA_RSTTALLY            0xe800
 69 #define PLA_CR                  0xe813
 70 #define PLA_CRWECR              0xe81c
 71 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
 72 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
 73 #define PLA_CONFIG5             0xe822
 74 #define PLA_PHY_PWR             0xe84c
 75 #define PLA_OOB_CTRL            0xe84f
 76 #define PLA_CPCR                0xe854
 77 #define PLA_MISC_0              0xe858
 78 #define PLA_MISC_1              0xe85a
 79 #define PLA_OCP_GPHY_BASE       0xe86c
 80 #define PLA_TALLYCNT            0xe890
 81 #define PLA_SFF_STS_7           0xe8de
 82 #define PLA_PHYSTATUS           0xe908
 83 #define PLA_BP_BA               0xfc26
 84 #define PLA_BP_0                0xfc28
 85 #define PLA_BP_1                0xfc2a
 86 #define PLA_BP_2                0xfc2c
 87 #define PLA_BP_3                0xfc2e
 88 #define PLA_BP_4                0xfc30
 89 #define PLA_BP_5                0xfc32
 90 #define PLA_BP_6                0xfc34
 91 #define PLA_BP_7                0xfc36
 92 #define PLA_BP_EN               0xfc38
 93 
 94 #define USB_USB2PHY             0xb41e
 95 #define USB_SSPHYLINK2          0xb428
 96 #define USB_U2P3_CTRL           0xb460
 97 #define USB_CSR_DUMMY1          0xb464
 98 #define USB_CSR_DUMMY2          0xb466
 99 #define USB_DEV_STAT            0xb808
100 #define USB_CONNECT_TIMER       0xcbf8
101 #define USB_BURST_SIZE          0xcfc0
102 #define USB_USB_CTRL            0xd406
103 #define USB_PHY_CTRL            0xd408
104 #define USB_TX_AGG              0xd40a
105 #define USB_RX_BUF_TH           0xd40c
106 #define USB_USB_TIMER           0xd428
107 #define USB_RX_EARLY_TIMEOUT    0xd42c
108 #define USB_RX_EARLY_SIZE       0xd42e
109 #define USB_PM_CTRL_STATUS      0xd432
110 #define USB_TX_DMA              0xd434
111 #define USB_TOLERANCE           0xd490
112 #define USB_LPM_CTRL            0xd41a
113 #define USB_UPS_CTRL            0xd800
114 #define USB_MISC_0              0xd81a
115 #define USB_POWER_CUT           0xd80a
116 #define USB_AFE_CTRL2           0xd824
117 #define USB_WDT11_CTRL          0xe43c
118 #define USB_BP_BA               0xfc26
119 #define USB_BP_0                0xfc28
120 #define USB_BP_1                0xfc2a
121 #define USB_BP_2                0xfc2c
122 #define USB_BP_3                0xfc2e
123 #define USB_BP_4                0xfc30
124 #define USB_BP_5                0xfc32
125 #define USB_BP_6                0xfc34
126 #define USB_BP_7                0xfc36
127 #define USB_BP_EN               0xfc38
128 
129 /* OCP Registers */
130 #define OCP_ALDPS_CONFIG        0x2010
131 #define OCP_EEE_CONFIG1         0x2080
132 #define OCP_EEE_CONFIG2         0x2092
133 #define OCP_EEE_CONFIG3         0x2094
134 #define OCP_BASE_MII            0xa400
135 #define OCP_EEE_AR              0xa41a
136 #define OCP_EEE_DATA            0xa41c
137 #define OCP_PHY_STATUS          0xa420
138 #define OCP_POWER_CFG           0xa430
139 #define OCP_EEE_CFG             0xa432
140 #define OCP_SRAM_ADDR           0xa436
141 #define OCP_SRAM_DATA           0xa438
142 #define OCP_DOWN_SPEED          0xa442
143 #define OCP_EEE_ABLE            0xa5c4
144 #define OCP_EEE_ADV             0xa5d0
145 #define OCP_EEE_LPABLE          0xa5d2
146 #define OCP_ADC_CFG             0xbc06
147 
148 /* SRAM Register */
149 #define SRAM_LPF_CFG            0x8012
150 #define SRAM_10M_AMP1           0x8080
151 #define SRAM_10M_AMP2           0x8082
152 #define SRAM_IMPEDANCE          0x8084
153 
154 /* PLA_RCR */
155 #define RCR_AAP                 0x00000001
156 #define RCR_APM                 0x00000002
157 #define RCR_AM                  0x00000004
158 #define RCR_AB                  0x00000008
159 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
160 
161 /* PLA_RXFIFO_CTRL0 */
162 #define RXFIFO_THR1_NORMAL      0x00080002
163 #define RXFIFO_THR1_OOB         0x01800003
164 
165 /* PLA_RXFIFO_CTRL1 */
166 #define RXFIFO_THR2_FULL        0x00000060
167 #define RXFIFO_THR2_HIGH        0x00000038
168 #define RXFIFO_THR2_OOB         0x0000004a
169 #define RXFIFO_THR2_NORMAL      0x00a0
170 
171 /* PLA_RXFIFO_CTRL2 */
172 #define RXFIFO_THR3_FULL        0x00000078
173 #define RXFIFO_THR3_HIGH        0x00000048
174 #define RXFIFO_THR3_OOB         0x0000005a
175 #define RXFIFO_THR3_NORMAL      0x0110
176 
177 /* PLA_TXFIFO_CTRL */
178 #define TXFIFO_THR_NORMAL       0x00400008
179 #define TXFIFO_THR_NORMAL2      0x01000008
180 
181 /* PLA_DMY_REG0 */
182 #define ECM_ALDPS               0x0002
183 
184 /* PLA_FMC */
185 #define FMC_FCR_MCU_EN          0x0001
186 
187 /* PLA_EEEP_CR */
188 #define EEEP_CR_EEEP_TX         0x0002
189 
190 /* PLA_WDT6_CTRL */
191 #define WDT6_SET_MODE           0x0010
192 
193 /* PLA_TCR0 */
194 #define TCR0_TX_EMPTY           0x0800
195 #define TCR0_AUTO_FIFO          0x0080
196 
197 /* PLA_TCR1 */
198 #define VERSION_MASK            0x7cf0
199 
200 /* PLA_MTPS */
201 #define MTPS_JUMBO              (12 * 1024 / 64)
202 #define MTPS_DEFAULT            (6 * 1024 / 64)
203 
204 /* PLA_RSTTALLY */
205 #define TALLY_RESET             0x0001
206 
207 /* PLA_CR */
208 #define CR_RST                  0x10
209 #define CR_RE                   0x08
210 #define CR_TE                   0x04
211 
212 /* PLA_CRWECR */
213 #define CRWECR_NORAML           0x00
214 #define CRWECR_CONFIG           0xc0
215 
216 /* PLA_OOB_CTRL */
217 #define NOW_IS_OOB              0x80
218 #define TXFIFO_EMPTY            0x20
219 #define RXFIFO_EMPTY            0x10
220 #define LINK_LIST_READY         0x02
221 #define DIS_MCU_CLROOB          0x01
222 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
223 
224 /* PLA_MISC_1 */
225 #define RXDY_GATED_EN           0x0008
226 
227 /* PLA_SFF_STS_7 */
228 #define RE_INIT_LL              0x8000
229 #define MCU_BORW_EN             0x4000
230 
231 /* PLA_CPCR */
232 #define CPCR_RX_VLAN            0x0040
233 
234 /* PLA_CFG_WOL */
235 #define MAGIC_EN                0x0001
236 
237 /* PLA_TEREDO_CFG */
238 #define TEREDO_SEL              0x8000
239 #define TEREDO_WAKE_MASK        0x7f00
240 #define TEREDO_RS_EVENT_MASK    0x00fe
241 #define OOB_TEREDO_EN           0x0001
242 
243 /* PAL_BDC_CR */
244 #define ALDPS_PROXY_MODE        0x0001
245 
246 /* PLA_CONFIG34 */
247 #define LINK_ON_WAKE_EN         0x0010
248 #define LINK_OFF_WAKE_EN        0x0008
249 
250 /* PLA_CONFIG5 */
251 #define BWF_EN                  0x0040
252 #define MWF_EN                  0x0020
253 #define UWF_EN                  0x0010
254 #define LAN_WAKE_EN             0x0002
255 
256 /* PLA_LED_FEATURE */
257 #define LED_MODE_MASK           0x0700
258 
259 /* PLA_PHY_PWR */
260 #define TX_10M_IDLE_EN          0x0080
261 #define PFM_PWM_SWITCH          0x0040
262 
263 /* PLA_MAC_PWR_CTRL */
264 #define D3_CLK_GATED_EN         0x00004000
265 #define MCU_CLK_RATIO           0x07010f07
266 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
267 #define ALDPS_SPDWN_RATIO       0x0f87
268 
269 /* PLA_MAC_PWR_CTRL2 */
270 #define EEE_SPDWN_RATIO         0x8007
271 
272 /* PLA_MAC_PWR_CTRL3 */
273 #define PKT_AVAIL_SPDWN_EN      0x0100
274 #define SUSPEND_SPDWN_EN        0x0004
275 #define U1U2_SPDWN_EN           0x0002
276 #define L1_SPDWN_EN             0x0001
277 
278 /* PLA_MAC_PWR_CTRL4 */
279 #define PWRSAVE_SPDWN_EN        0x1000
280 #define RXDV_SPDWN_EN           0x0800
281 #define TX10MIDLE_EN            0x0100
282 #define TP100_SPDWN_EN          0x0020
283 #define TP500_SPDWN_EN          0x0010
284 #define TP1000_SPDWN_EN         0x0008
285 #define EEE_SPDWN_EN            0x0001
286 
287 /* PLA_GPHY_INTR_IMR */
288 #define GPHY_STS_MSK            0x0001
289 #define SPEED_DOWN_MSK          0x0002
290 #define SPDWN_RXDV_MSK          0x0004
291 #define SPDWN_LINKCHG_MSK       0x0008
292 
293 /* PLA_PHYAR */
294 #define PHYAR_FLAG              0x80000000
295 
296 /* PLA_EEE_CR */
297 #define EEE_RX_EN               0x0001
298 #define EEE_TX_EN               0x0002
299 
300 /* PLA_BOOT_CTRL */
301 #define AUTOLOAD_DONE           0x0002
302 
303 /* USB_USB2PHY */
304 #define USB2PHY_SUSPEND         0x0001
305 #define USB2PHY_L1              0x0002
306 
307 /* USB_SSPHYLINK2 */
308 #define pwd_dn_scale_mask       0x3ffe
309 #define pwd_dn_scale(x)         ((x) << 1)
310 
311 /* USB_CSR_DUMMY1 */
312 #define DYNAMIC_BURST           0x0001
313 
314 /* USB_CSR_DUMMY2 */
315 #define EP4_FULL_FC             0x0001
316 
317 /* USB_DEV_STAT */
318 #define STAT_SPEED_MASK         0x0006
319 #define STAT_SPEED_HIGH         0x0000
320 #define STAT_SPEED_FULL         0x0002
321 
322 /* USB_TX_AGG */
323 #define TX_AGG_MAX_THRESHOLD    0x03
324 
325 /* USB_RX_BUF_TH */
326 #define RX_THR_SUPPER           0x0c350180
327 #define RX_THR_HIGH             0x7a120180
328 #define RX_THR_SLOW             0xffff0180
329 
330 /* USB_TX_DMA */
331 #define TEST_MODE_DISABLE       0x00000001
332 #define TX_SIZE_ADJUST1         0x00000100
333 
334 /* USB_UPS_CTRL */
335 #define POWER_CUT               0x0100
336 
337 /* USB_PM_CTRL_STATUS */
338 #define RESUME_INDICATE         0x0001
339 
340 /* USB_USB_CTRL */
341 #define RX_AGG_DISABLE          0x0010
342 
343 /* USB_U2P3_CTRL */
344 #define U2P3_ENABLE             0x0001
345 
346 /* USB_POWER_CUT */
347 #define PWR_EN                  0x0001
348 #define PHASE2_EN               0x0008
349 
350 /* USB_MISC_0 */
351 #define PCUT_STATUS             0x0001
352 
353 /* USB_RX_EARLY_TIMEOUT */
354 #define COALESCE_SUPER           85000U
355 #define COALESCE_HIGH           250000U
356 #define COALESCE_SLOW           524280U
357 
358 /* USB_WDT11_CTRL */
359 #define TIMER11_EN              0x0001
360 
361 /* USB_LPM_CTRL */
362 /* bit 4 ~ 5: fifo empty boundary */
363 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
364 /* bit 2 ~ 3: LMP timer */
365 #define LPM_TIMER_MASK          0x0c
366 #define LPM_TIMER_500MS         0x04    /* 500 ms */
367 #define LPM_TIMER_500US         0x0c    /* 500 us */
368 #define ROK_EXIT_LPM            0x02
369 
370 /* USB_AFE_CTRL2 */
371 #define SEN_VAL_MASK            0xf800
372 #define SEN_VAL_NORMAL          0xa000
373 #define SEL_RXIDLE              0x0100
374 
375 /* OCP_ALDPS_CONFIG */
376 #define ENPWRSAVE               0x8000
377 #define ENPDNPS                 0x0200
378 #define LINKENA                 0x0100
379 #define DIS_SDSAVE              0x0010
380 
381 /* OCP_PHY_STATUS */
382 #define PHY_STAT_MASK           0x0007
383 #define PHY_STAT_LAN_ON         3
384 #define PHY_STAT_PWRDN          5
385 
386 /* OCP_POWER_CFG */
387 #define EEE_CLKDIV_EN           0x8000
388 #define EN_ALDPS                0x0004
389 #define EN_10M_PLLOFF           0x0001
390 
391 /* OCP_EEE_CONFIG1 */
392 #define RG_TXLPI_MSK_HFDUP      0x8000
393 #define RG_MATCLR_EN            0x4000
394 #define EEE_10_CAP              0x2000
395 #define EEE_NWAY_EN             0x1000
396 #define TX_QUIET_EN             0x0200
397 #define RX_QUIET_EN             0x0100
398 #define sd_rise_time_mask       0x0070
399 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
400 #define RG_RXLPI_MSK_HFDUP      0x0008
401 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
402 
403 /* OCP_EEE_CONFIG2 */
404 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
405 #define RG_DACQUIET_EN          0x0400
406 #define RG_LDVQUIET_EN          0x0200
407 #define RG_CKRSEL               0x0020
408 #define RG_EEEPRG_EN            0x0010
409 
410 /* OCP_EEE_CONFIG3 */
411 #define fast_snr_mask           0xff80
412 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
413 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
414 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
415 
416 /* OCP_EEE_AR */
417 /* bit[15:14] function */
418 #define FUN_ADDR                0x0000
419 #define FUN_DATA                0x4000
420 /* bit[4:0] device addr */
421 
422 /* OCP_EEE_CFG */
423 #define CTAP_SHORT_EN           0x0040
424 #define EEE10_EN                0x0010
425 
426 /* OCP_DOWN_SPEED */
427 #define EN_10M_BGOFF            0x0080
428 
429 /* OCP_ADC_CFG */
430 #define CKADSEL_L               0x0100
431 #define ADC_EN                  0x0080
432 #define EN_EMI_L                0x0040
433 
434 /* SRAM_LPF_CFG */
435 #define LPF_AUTO_TUNE           0x8000
436 
437 /* SRAM_10M_AMP1 */
438 #define GDAC_IB_UPALL           0x0008
439 
440 /* SRAM_10M_AMP2 */
441 #define AMP_DN                  0x0200
442 
443 /* SRAM_IMPEDANCE */
444 #define RX_DRIVING_MASK         0x6000
445 
446 enum rtl_register_content {
447         _1000bps        = 0x10,
448         _100bps         = 0x08,
449         _10bps          = 0x04,
450         LINK_STATUS     = 0x02,
451         FULL_DUP        = 0x01,
452 };
453 
454 #define RTL8152_MAX_TX          4
455 #define RTL8152_MAX_RX          10
456 #define INTBUFSIZE              2
457 #define CRC_SIZE                4
458 #define TX_ALIGN                4
459 #define RX_ALIGN                8
460 
461 #define INTR_LINK               0x0004
462 
463 #define RTL8152_REQT_READ       0xc0
464 #define RTL8152_REQT_WRITE      0x40
465 #define RTL8152_REQ_GET_REGS    0x05
466 #define RTL8152_REQ_SET_REGS    0x05
467 
468 #define BYTE_EN_DWORD           0xff
469 #define BYTE_EN_WORD            0x33
470 #define BYTE_EN_BYTE            0x11
471 #define BYTE_EN_SIX_BYTES       0x3f
472 #define BYTE_EN_START_MASK      0x0f
473 #define BYTE_EN_END_MASK        0xf0
474 
475 #define RTL8153_MAX_PACKET      9216 /* 9K */
476 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
477 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
478 #define RTL8153_RMS             RTL8153_MAX_PACKET
479 #define RTL8152_TX_TIMEOUT      (5 * HZ)
480 #define RTL8152_NAPI_WEIGHT     64
481 
482 /* rtl8152 flags */
483 enum rtl8152_flags {
484         RTL8152_UNPLUG = 0,
485         RTL8152_SET_RX_MODE,
486         WORK_ENABLE,
487         RTL8152_LINK_CHG,
488         SELECTIVE_SUSPEND,
489         PHY_RESET,
490         SCHEDULE_NAPI,
491 };
492 
493 /* Define these values to match your device */
494 #define VENDOR_ID_REALTEK               0x0bda
495 #define VENDOR_ID_SAMSUNG               0x04e8
496 #define VENDOR_ID_LENOVO                0x17ef
497 
498 #define MCU_TYPE_PLA                    0x0100
499 #define MCU_TYPE_USB                    0x0000
500 
501 struct tally_counter {
502         __le64  tx_packets;
503         __le64  rx_packets;
504         __le64  tx_errors;
505         __le32  rx_errors;
506         __le16  rx_missed;
507         __le16  align_errors;
508         __le32  tx_one_collision;
509         __le32  tx_multi_collision;
510         __le64  rx_unicast;
511         __le64  rx_broadcast;
512         __le32  rx_multicast;
513         __le16  tx_aborted;
514         __le16  tx_underrun;
515 };
516 
517 struct rx_desc {
518         __le32 opts1;
519 #define RX_LEN_MASK                     0x7fff
520 
521         __le32 opts2;
522 #define RD_UDP_CS                       BIT(23)
523 #define RD_TCP_CS                       BIT(22)
524 #define RD_IPV6_CS                      BIT(20)
525 #define RD_IPV4_CS                      BIT(19)
526 
527         __le32 opts3;
528 #define IPF                             BIT(23) /* IP checksum fail */
529 #define UDPF                            BIT(22) /* UDP checksum fail */
530 #define TCPF                            BIT(21) /* TCP checksum fail */
531 #define RX_VLAN_TAG                     BIT(16)
532 
533         __le32 opts4;
534         __le32 opts5;
535         __le32 opts6;
536 };
537 
538 struct tx_desc {
539         __le32 opts1;
540 #define TX_FS                   BIT(31) /* First segment of a packet */
541 #define TX_LS                   BIT(30) /* Final segment of a packet */
542 #define GTSENDV4                BIT(28)
543 #define GTSENDV6                BIT(27)
544 #define GTTCPHO_SHIFT           18
545 #define GTTCPHO_MAX             0x7fU
546 #define TX_LEN_MAX              0x3ffffU
547 
548         __le32 opts2;
549 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
550 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
551 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
552 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
553 #define MSS_SHIFT               17
554 #define MSS_MAX                 0x7ffU
555 #define TCPHO_SHIFT             17
556 #define TCPHO_MAX               0x7ffU
557 #define TX_VLAN_TAG             BIT(16)
558 };
559 
560 struct r8152;
561 
562 struct rx_agg {
563         struct list_head list;
564         struct urb *urb;
565         struct r8152 *context;
566         void *buffer;
567         void *head;
568 };
569 
570 struct tx_agg {
571         struct list_head list;
572         struct urb *urb;
573         struct r8152 *context;
574         void *buffer;
575         void *head;
576         u32 skb_num;
577         u32 skb_len;
578 };
579 
580 struct r8152 {
581         unsigned long flags;
582         struct usb_device *udev;
583         struct napi_struct napi;
584         struct usb_interface *intf;
585         struct net_device *netdev;
586         struct urb *intr_urb;
587         struct tx_agg tx_info[RTL8152_MAX_TX];
588         struct rx_agg rx_info[RTL8152_MAX_RX];
589         struct list_head rx_done, tx_free;
590         struct sk_buff_head tx_queue, rx_queue;
591         spinlock_t rx_lock, tx_lock;
592         struct delayed_work schedule;
593         struct mii_if_info mii;
594         struct mutex control;   /* use for hw setting */
595 
596         struct rtl_ops {
597                 void (*init)(struct r8152 *);
598                 int (*enable)(struct r8152 *);
599                 void (*disable)(struct r8152 *);
600                 void (*up)(struct r8152 *);
601                 void (*down)(struct r8152 *);
602                 void (*unload)(struct r8152 *);
603                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
604                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
605         } rtl_ops;
606 
607         int intr_interval;
608         u32 saved_wolopts;
609         u32 msg_enable;
610         u32 tx_qlen;
611         u32 coalesce;
612         u16 ocp_base;
613         u8 *intr_buff;
614         u8 version;
615 };
616 
617 enum rtl_version {
618         RTL_VER_UNKNOWN = 0,
619         RTL_VER_01,
620         RTL_VER_02,
621         RTL_VER_03,
622         RTL_VER_04,
623         RTL_VER_05,
624         RTL_VER_MAX
625 };
626 
627 enum tx_csum_stat {
628         TX_CSUM_SUCCESS = 0,
629         TX_CSUM_TSO,
630         TX_CSUM_NONE
631 };
632 
633 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
634  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
635  */
636 static const int multicast_filter_limit = 32;
637 static unsigned int agg_buf_sz = 16384;
638 
639 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
640                                  VLAN_ETH_HLEN - VLAN_HLEN)
641 
642 static
643 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
644 {
645         int ret;
646         void *tmp;
647 
648         tmp = kmalloc(size, GFP_KERNEL);
649         if (!tmp)
650                 return -ENOMEM;
651 
652         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
653                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
654                               value, index, tmp, size, 500);
655 
656         memcpy(data, tmp, size);
657         kfree(tmp);
658 
659         return ret;
660 }
661 
662 static
663 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
664 {
665         int ret;
666         void *tmp;
667 
668         tmp = kmemdup(data, size, GFP_KERNEL);
669         if (!tmp)
670                 return -ENOMEM;
671 
672         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
673                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
674                               value, index, tmp, size, 500);
675 
676         kfree(tmp);
677 
678         return ret;
679 }
680 
681 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
682                             void *data, u16 type)
683 {
684         u16 limit = 64;
685         int ret = 0;
686 
687         if (test_bit(RTL8152_UNPLUG, &tp->flags))
688                 return -ENODEV;
689 
690         /* both size and indix must be 4 bytes align */
691         if ((size & 3) || !size || (index & 3) || !data)
692                 return -EPERM;
693 
694         if ((u32)index + (u32)size > 0xffff)
695                 return -EPERM;
696 
697         while (size) {
698                 if (size > limit) {
699                         ret = get_registers(tp, index, type, limit, data);
700                         if (ret < 0)
701                                 break;
702 
703                         index += limit;
704                         data += limit;
705                         size -= limit;
706                 } else {
707                         ret = get_registers(tp, index, type, size, data);
708                         if (ret < 0)
709                                 break;
710 
711                         index += size;
712                         data += size;
713                         size = 0;
714                         break;
715                 }
716         }
717 
718         if (ret == -ENODEV)
719                 set_bit(RTL8152_UNPLUG, &tp->flags);
720 
721         return ret;
722 }
723 
724 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
725                              u16 size, void *data, u16 type)
726 {
727         int ret;
728         u16 byteen_start, byteen_end, byen;
729         u16 limit = 512;
730 
731         if (test_bit(RTL8152_UNPLUG, &tp->flags))
732                 return -ENODEV;
733 
734         /* both size and indix must be 4 bytes align */
735         if ((size & 3) || !size || (index & 3) || !data)
736                 return -EPERM;
737 
738         if ((u32)index + (u32)size > 0xffff)
739                 return -EPERM;
740 
741         byteen_start = byteen & BYTE_EN_START_MASK;
742         byteen_end = byteen & BYTE_EN_END_MASK;
743 
744         byen = byteen_start | (byteen_start << 4);
745         ret = set_registers(tp, index, type | byen, 4, data);
746         if (ret < 0)
747                 goto error1;
748 
749         index += 4;
750         data += 4;
751         size -= 4;
752 
753         if (size) {
754                 size -= 4;
755 
756                 while (size) {
757                         if (size > limit) {
758                                 ret = set_registers(tp, index,
759                                                     type | BYTE_EN_DWORD,
760                                                     limit, data);
761                                 if (ret < 0)
762                                         goto error1;
763 
764                                 index += limit;
765                                 data += limit;
766                                 size -= limit;
767                         } else {
768                                 ret = set_registers(tp, index,
769                                                     type | BYTE_EN_DWORD,
770                                                     size, data);
771                                 if (ret < 0)
772                                         goto error1;
773 
774                                 index += size;
775                                 data += size;
776                                 size = 0;
777                                 break;
778                         }
779                 }
780 
781                 byen = byteen_end | (byteen_end >> 4);
782                 ret = set_registers(tp, index, type | byen, 4, data);
783                 if (ret < 0)
784                         goto error1;
785         }
786 
787 error1:
788         if (ret == -ENODEV)
789                 set_bit(RTL8152_UNPLUG, &tp->flags);
790 
791         return ret;
792 }
793 
794 static inline
795 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
796 {
797         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
798 }
799 
800 static inline
801 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
802 {
803         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
804 }
805 
806 static inline
807 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
808 {
809         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
810 }
811 
812 static inline
813 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
814 {
815         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
816 }
817 
818 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
819 {
820         __le32 data;
821 
822         generic_ocp_read(tp, index, sizeof(data), &data, type);
823 
824         return __le32_to_cpu(data);
825 }
826 
827 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
828 {
829         __le32 tmp = __cpu_to_le32(data);
830 
831         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
832 }
833 
834 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
835 {
836         u32 data;
837         __le32 tmp;
838         u8 shift = index & 2;
839 
840         index &= ~3;
841 
842         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
843 
844         data = __le32_to_cpu(tmp);
845         data >>= (shift * 8);
846         data &= 0xffff;
847 
848         return (u16)data;
849 }
850 
851 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
852 {
853         u32 mask = 0xffff;
854         __le32 tmp;
855         u16 byen = BYTE_EN_WORD;
856         u8 shift = index & 2;
857 
858         data &= mask;
859 
860         if (index & 2) {
861                 byen <<= shift;
862                 mask <<= (shift * 8);
863                 data <<= (shift * 8);
864                 index &= ~3;
865         }
866 
867         tmp = __cpu_to_le32(data);
868 
869         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
870 }
871 
872 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
873 {
874         u32 data;
875         __le32 tmp;
876         u8 shift = index & 3;
877 
878         index &= ~3;
879 
880         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
881 
882         data = __le32_to_cpu(tmp);
883         data >>= (shift * 8);
884         data &= 0xff;
885 
886         return (u8)data;
887 }
888 
889 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
890 {
891         u32 mask = 0xff;
892         __le32 tmp;
893         u16 byen = BYTE_EN_BYTE;
894         u8 shift = index & 3;
895 
896         data &= mask;
897 
898         if (index & 3) {
899                 byen <<= shift;
900                 mask <<= (shift * 8);
901                 data <<= (shift * 8);
902                 index &= ~3;
903         }
904 
905         tmp = __cpu_to_le32(data);
906 
907         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
908 }
909 
910 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
911 {
912         u16 ocp_base, ocp_index;
913 
914         ocp_base = addr & 0xf000;
915         if (ocp_base != tp->ocp_base) {
916                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
917                 tp->ocp_base = ocp_base;
918         }
919 
920         ocp_index = (addr & 0x0fff) | 0xb000;
921         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
922 }
923 
924 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
925 {
926         u16 ocp_base, ocp_index;
927 
928         ocp_base = addr & 0xf000;
929         if (ocp_base != tp->ocp_base) {
930                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
931                 tp->ocp_base = ocp_base;
932         }
933 
934         ocp_index = (addr & 0x0fff) | 0xb000;
935         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
936 }
937 
938 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
939 {
940         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
941 }
942 
943 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
944 {
945         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
946 }
947 
948 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
949 {
950         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
951         ocp_reg_write(tp, OCP_SRAM_DATA, data);
952 }
953 
954 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
955 {
956         struct r8152 *tp = netdev_priv(netdev);
957         int ret;
958 
959         if (test_bit(RTL8152_UNPLUG, &tp->flags))
960                 return -ENODEV;
961 
962         if (phy_id != R8152_PHY_ID)
963                 return -EINVAL;
964 
965         ret = r8152_mdio_read(tp, reg);
966 
967         return ret;
968 }
969 
970 static
971 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
972 {
973         struct r8152 *tp = netdev_priv(netdev);
974 
975         if (test_bit(RTL8152_UNPLUG, &tp->flags))
976                 return;
977 
978         if (phy_id != R8152_PHY_ID)
979                 return;
980 
981         r8152_mdio_write(tp, reg, val);
982 }
983 
984 static int
985 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
986 
987 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
988 {
989         struct r8152 *tp = netdev_priv(netdev);
990         struct sockaddr *addr = p;
991         int ret = -EADDRNOTAVAIL;
992 
993         if (!is_valid_ether_addr(addr->sa_data))
994                 goto out1;
995 
996         ret = usb_autopm_get_interface(tp->intf);
997         if (ret < 0)
998                 goto out1;
999 
1000         mutex_lock(&tp->control);
1001 
1002         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1003 
1004         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1005         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1006         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1007 
1008         mutex_unlock(&tp->control);
1009 
1010         usb_autopm_put_interface(tp->intf);
1011 out1:
1012         return ret;
1013 }
1014 
1015 static int set_ethernet_addr(struct r8152 *tp)
1016 {
1017         struct net_device *dev = tp->netdev;
1018         struct sockaddr sa;
1019         int ret;
1020 
1021         if (tp->version == RTL_VER_01)
1022                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1023         else
1024                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1025 
1026         if (ret < 0) {
1027                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1028         } else if (!is_valid_ether_addr(sa.sa_data)) {
1029                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1030                           sa.sa_data);
1031                 eth_hw_addr_random(dev);
1032                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1033                 ret = rtl8152_set_mac_address(dev, &sa);
1034                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1035                            sa.sa_data);
1036         } else {
1037                 if (tp->version == RTL_VER_01)
1038                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1039                 else
1040                         ret = rtl8152_set_mac_address(dev, &sa);
1041         }
1042 
1043         return ret;
1044 }
1045 
1046 static void read_bulk_callback(struct urb *urb)
1047 {
1048         struct net_device *netdev;
1049         int status = urb->status;
1050         struct rx_agg *agg;
1051         struct r8152 *tp;
1052 
1053         agg = urb->context;
1054         if (!agg)
1055                 return;
1056 
1057         tp = agg->context;
1058         if (!tp)
1059                 return;
1060 
1061         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1062                 return;
1063 
1064         if (!test_bit(WORK_ENABLE, &tp->flags))
1065                 return;
1066 
1067         netdev = tp->netdev;
1068 
1069         /* When link down, the driver would cancel all bulks. */
1070         /* This avoid the re-submitting bulk */
1071         if (!netif_carrier_ok(netdev))
1072                 return;
1073 
1074         usb_mark_last_busy(tp->udev);
1075 
1076         switch (status) {
1077         case 0:
1078                 if (urb->actual_length < ETH_ZLEN)
1079                         break;
1080 
1081                 spin_lock(&tp->rx_lock);
1082                 list_add_tail(&agg->list, &tp->rx_done);
1083                 spin_unlock(&tp->rx_lock);
1084                 napi_schedule(&tp->napi);
1085                 return;
1086         case -ESHUTDOWN:
1087                 set_bit(RTL8152_UNPLUG, &tp->flags);
1088                 netif_device_detach(tp->netdev);
1089                 return;
1090         case -ENOENT:
1091                 return; /* the urb is in unlink state */
1092         case -ETIME:
1093                 if (net_ratelimit())
1094                         netdev_warn(netdev, "maybe reset is needed?\n");
1095                 break;
1096         default:
1097                 if (net_ratelimit())
1098                         netdev_warn(netdev, "Rx status %d\n", status);
1099                 break;
1100         }
1101 
1102         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1103 }
1104 
1105 static void write_bulk_callback(struct urb *urb)
1106 {
1107         struct net_device_stats *stats;
1108         struct net_device *netdev;
1109         struct tx_agg *agg;
1110         struct r8152 *tp;
1111         int status = urb->status;
1112 
1113         agg = urb->context;
1114         if (!agg)
1115                 return;
1116 
1117         tp = agg->context;
1118         if (!tp)
1119                 return;
1120 
1121         netdev = tp->netdev;
1122         stats = &netdev->stats;
1123         if (status) {
1124                 if (net_ratelimit())
1125                         netdev_warn(netdev, "Tx status %d\n", status);
1126                 stats->tx_errors += agg->skb_num;
1127         } else {
1128                 stats->tx_packets += agg->skb_num;
1129                 stats->tx_bytes += agg->skb_len;
1130         }
1131 
1132         spin_lock(&tp->tx_lock);
1133         list_add_tail(&agg->list, &tp->tx_free);
1134         spin_unlock(&tp->tx_lock);
1135 
1136         usb_autopm_put_interface_async(tp->intf);
1137 
1138         if (!netif_carrier_ok(netdev))
1139                 return;
1140 
1141         if (!test_bit(WORK_ENABLE, &tp->flags))
1142                 return;
1143 
1144         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1145                 return;
1146 
1147         if (!skb_queue_empty(&tp->tx_queue))
1148                 napi_schedule(&tp->napi);
1149 }
1150 
1151 static void intr_callback(struct urb *urb)
1152 {
1153         struct r8152 *tp;
1154         __le16 *d;
1155         int status = urb->status;
1156         int res;
1157 
1158         tp = urb->context;
1159         if (!tp)
1160                 return;
1161 
1162         if (!test_bit(WORK_ENABLE, &tp->flags))
1163                 return;
1164 
1165         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1166                 return;
1167 
1168         switch (status) {
1169         case 0:                 /* success */
1170                 break;
1171         case -ECONNRESET:       /* unlink */
1172         case -ESHUTDOWN:
1173                 netif_device_detach(tp->netdev);
1174         case -ENOENT:
1175         case -EPROTO:
1176                 netif_info(tp, intr, tp->netdev,
1177                            "Stop submitting intr, status %d\n", status);
1178                 return;
1179         case -EOVERFLOW:
1180                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1181                 goto resubmit;
1182         /* -EPIPE:  should clear the halt */
1183         default:
1184                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1185                 goto resubmit;
1186         }
1187 
1188         d = urb->transfer_buffer;
1189         if (INTR_LINK & __le16_to_cpu(d[0])) {
1190                 if (!netif_carrier_ok(tp->netdev)) {
1191                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1192                         schedule_delayed_work(&tp->schedule, 0);
1193                 }
1194         } else {
1195                 if (netif_carrier_ok(tp->netdev)) {
1196                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1197                         schedule_delayed_work(&tp->schedule, 0);
1198                 }
1199         }
1200 
1201 resubmit:
1202         res = usb_submit_urb(urb, GFP_ATOMIC);
1203         if (res == -ENODEV) {
1204                 set_bit(RTL8152_UNPLUG, &tp->flags);
1205                 netif_device_detach(tp->netdev);
1206         } else if (res) {
1207                 netif_err(tp, intr, tp->netdev,
1208                           "can't resubmit intr, status %d\n", res);
1209         }
1210 }
1211 
1212 static inline void *rx_agg_align(void *data)
1213 {
1214         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1215 }
1216 
1217 static inline void *tx_agg_align(void *data)
1218 {
1219         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1220 }
1221 
1222 static void free_all_mem(struct r8152 *tp)
1223 {
1224         int i;
1225 
1226         for (i = 0; i < RTL8152_MAX_RX; i++) {
1227                 usb_free_urb(tp->rx_info[i].urb);
1228                 tp->rx_info[i].urb = NULL;
1229 
1230                 kfree(tp->rx_info[i].buffer);
1231                 tp->rx_info[i].buffer = NULL;
1232                 tp->rx_info[i].head = NULL;
1233         }
1234 
1235         for (i = 0; i < RTL8152_MAX_TX; i++) {
1236                 usb_free_urb(tp->tx_info[i].urb);
1237                 tp->tx_info[i].urb = NULL;
1238 
1239                 kfree(tp->tx_info[i].buffer);
1240                 tp->tx_info[i].buffer = NULL;
1241                 tp->tx_info[i].head = NULL;
1242         }
1243 
1244         usb_free_urb(tp->intr_urb);
1245         tp->intr_urb = NULL;
1246 
1247         kfree(tp->intr_buff);
1248         tp->intr_buff = NULL;
1249 }
1250 
1251 static int alloc_all_mem(struct r8152 *tp)
1252 {
1253         struct net_device *netdev = tp->netdev;
1254         struct usb_interface *intf = tp->intf;
1255         struct usb_host_interface *alt = intf->cur_altsetting;
1256         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1257         struct urb *urb;
1258         int node, i;
1259         u8 *buf;
1260 
1261         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1262 
1263         spin_lock_init(&tp->rx_lock);
1264         spin_lock_init(&tp->tx_lock);
1265         INIT_LIST_HEAD(&tp->tx_free);
1266         skb_queue_head_init(&tp->tx_queue);
1267         skb_queue_head_init(&tp->rx_queue);
1268 
1269         for (i = 0; i < RTL8152_MAX_RX; i++) {
1270                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1271                 if (!buf)
1272                         goto err1;
1273 
1274                 if (buf != rx_agg_align(buf)) {
1275                         kfree(buf);
1276                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1277                                            node);
1278                         if (!buf)
1279                                 goto err1;
1280                 }
1281 
1282                 urb = usb_alloc_urb(0, GFP_KERNEL);
1283                 if (!urb) {
1284                         kfree(buf);
1285                         goto err1;
1286                 }
1287 
1288                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1289                 tp->rx_info[i].context = tp;
1290                 tp->rx_info[i].urb = urb;
1291                 tp->rx_info[i].buffer = buf;
1292                 tp->rx_info[i].head = rx_agg_align(buf);
1293         }
1294 
1295         for (i = 0; i < RTL8152_MAX_TX; i++) {
1296                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1297                 if (!buf)
1298                         goto err1;
1299 
1300                 if (buf != tx_agg_align(buf)) {
1301                         kfree(buf);
1302                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1303                                            node);
1304                         if (!buf)
1305                                 goto err1;
1306                 }
1307 
1308                 urb = usb_alloc_urb(0, GFP_KERNEL);
1309                 if (!urb) {
1310                         kfree(buf);
1311                         goto err1;
1312                 }
1313 
1314                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1315                 tp->tx_info[i].context = tp;
1316                 tp->tx_info[i].urb = urb;
1317                 tp->tx_info[i].buffer = buf;
1318                 tp->tx_info[i].head = tx_agg_align(buf);
1319 
1320                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1321         }
1322 
1323         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1324         if (!tp->intr_urb)
1325                 goto err1;
1326 
1327         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1328         if (!tp->intr_buff)
1329                 goto err1;
1330 
1331         tp->intr_interval = (int)ep_intr->desc.bInterval;
1332         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1333                          tp->intr_buff, INTBUFSIZE, intr_callback,
1334                          tp, tp->intr_interval);
1335 
1336         return 0;
1337 
1338 err1:
1339         free_all_mem(tp);
1340         return -ENOMEM;
1341 }
1342 
1343 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1344 {
1345         struct tx_agg *agg = NULL;
1346         unsigned long flags;
1347 
1348         if (list_empty(&tp->tx_free))
1349                 return NULL;
1350 
1351         spin_lock_irqsave(&tp->tx_lock, flags);
1352         if (!list_empty(&tp->tx_free)) {
1353                 struct list_head *cursor;
1354 
1355                 cursor = tp->tx_free.next;
1356                 list_del_init(cursor);
1357                 agg = list_entry(cursor, struct tx_agg, list);
1358         }
1359         spin_unlock_irqrestore(&tp->tx_lock, flags);
1360 
1361         return agg;
1362 }
1363 
1364 /* r8152_csum_workaround()
1365  * The hw limites the value the transport offset. When the offset is out of the
1366  * range, calculate the checksum by sw.
1367  */
1368 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1369                                   struct sk_buff_head *list)
1370 {
1371         if (skb_shinfo(skb)->gso_size) {
1372                 netdev_features_t features = tp->netdev->features;
1373                 struct sk_buff_head seg_list;
1374                 struct sk_buff *segs, *nskb;
1375 
1376                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1377                 segs = skb_gso_segment(skb, features);
1378                 if (IS_ERR(segs) || !segs)
1379                         goto drop;
1380 
1381                 __skb_queue_head_init(&seg_list);
1382 
1383                 do {
1384                         nskb = segs;
1385                         segs = segs->next;
1386                         nskb->next = NULL;
1387                         __skb_queue_tail(&seg_list, nskb);
1388                 } while (segs);
1389 
1390                 skb_queue_splice(&seg_list, list);
1391                 dev_kfree_skb(skb);
1392         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1393                 if (skb_checksum_help(skb) < 0)
1394                         goto drop;
1395 
1396                 __skb_queue_head(list, skb);
1397         } else {
1398                 struct net_device_stats *stats;
1399 
1400 drop:
1401                 stats = &tp->netdev->stats;
1402                 stats->tx_dropped++;
1403                 dev_kfree_skb(skb);
1404         }
1405 }
1406 
1407 /* msdn_giant_send_check()
1408  * According to the document of microsoft, the TCP Pseudo Header excludes the
1409  * packet length for IPv6 TCP large packets.
1410  */
1411 static int msdn_giant_send_check(struct sk_buff *skb)
1412 {
1413         const struct ipv6hdr *ipv6h;
1414         struct tcphdr *th;
1415         int ret;
1416 
1417         ret = skb_cow_head(skb, 0);
1418         if (ret)
1419                 return ret;
1420 
1421         ipv6h = ipv6_hdr(skb);
1422         th = tcp_hdr(skb);
1423 
1424         th->check = 0;
1425         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1426 
1427         return ret;
1428 }
1429 
1430 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1431 {
1432         if (skb_vlan_tag_present(skb)) {
1433                 u32 opts2;
1434 
1435                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1436                 desc->opts2 |= cpu_to_le32(opts2);
1437         }
1438 }
1439 
1440 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1441 {
1442         u32 opts2 = le32_to_cpu(desc->opts2);
1443 
1444         if (opts2 & RX_VLAN_TAG)
1445                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1446                                        swab16(opts2 & 0xffff));
1447 }
1448 
1449 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1450                          struct sk_buff *skb, u32 len, u32 transport_offset)
1451 {
1452         u32 mss = skb_shinfo(skb)->gso_size;
1453         u32 opts1, opts2 = 0;
1454         int ret = TX_CSUM_SUCCESS;
1455 
1456         WARN_ON_ONCE(len > TX_LEN_MAX);
1457 
1458         opts1 = len | TX_FS | TX_LS;
1459 
1460         if (mss) {
1461                 if (transport_offset > GTTCPHO_MAX) {
1462                         netif_warn(tp, tx_err, tp->netdev,
1463                                    "Invalid transport offset 0x%x for TSO\n",
1464                                    transport_offset);
1465                         ret = TX_CSUM_TSO;
1466                         goto unavailable;
1467                 }
1468 
1469                 switch (vlan_get_protocol(skb)) {
1470                 case htons(ETH_P_IP):
1471                         opts1 |= GTSENDV4;
1472                         break;
1473 
1474                 case htons(ETH_P_IPV6):
1475                         if (msdn_giant_send_check(skb)) {
1476                                 ret = TX_CSUM_TSO;
1477                                 goto unavailable;
1478                         }
1479                         opts1 |= GTSENDV6;
1480                         break;
1481 
1482                 default:
1483                         WARN_ON_ONCE(1);
1484                         break;
1485                 }
1486 
1487                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1488                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1489         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1490                 u8 ip_protocol;
1491 
1492                 if (transport_offset > TCPHO_MAX) {
1493                         netif_warn(tp, tx_err, tp->netdev,
1494                                    "Invalid transport offset 0x%x\n",
1495                                    transport_offset);
1496                         ret = TX_CSUM_NONE;
1497                         goto unavailable;
1498                 }
1499 
1500                 switch (vlan_get_protocol(skb)) {
1501                 case htons(ETH_P_IP):
1502                         opts2 |= IPV4_CS;
1503                         ip_protocol = ip_hdr(skb)->protocol;
1504                         break;
1505 
1506                 case htons(ETH_P_IPV6):
1507                         opts2 |= IPV6_CS;
1508                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1509                         break;
1510 
1511                 default:
1512                         ip_protocol = IPPROTO_RAW;
1513                         break;
1514                 }
1515 
1516                 if (ip_protocol == IPPROTO_TCP)
1517                         opts2 |= TCP_CS;
1518                 else if (ip_protocol == IPPROTO_UDP)
1519                         opts2 |= UDP_CS;
1520                 else
1521                         WARN_ON_ONCE(1);
1522 
1523                 opts2 |= transport_offset << TCPHO_SHIFT;
1524         }
1525 
1526         desc->opts2 = cpu_to_le32(opts2);
1527         desc->opts1 = cpu_to_le32(opts1);
1528 
1529 unavailable:
1530         return ret;
1531 }
1532 
1533 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1534 {
1535         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1536         int remain, ret;
1537         u8 *tx_data;
1538 
1539         __skb_queue_head_init(&skb_head);
1540         spin_lock(&tx_queue->lock);
1541         skb_queue_splice_init(tx_queue, &skb_head);
1542         spin_unlock(&tx_queue->lock);
1543 
1544         tx_data = agg->head;
1545         agg->skb_num = 0;
1546         agg->skb_len = 0;
1547         remain = agg_buf_sz;
1548 
1549         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1550                 struct tx_desc *tx_desc;
1551                 struct sk_buff *skb;
1552                 unsigned int len;
1553                 u32 offset;
1554 
1555                 skb = __skb_dequeue(&skb_head);
1556                 if (!skb)
1557                         break;
1558 
1559                 len = skb->len + sizeof(*tx_desc);
1560 
1561                 if (len > remain) {
1562                         __skb_queue_head(&skb_head, skb);
1563                         break;
1564                 }
1565 
1566                 tx_data = tx_agg_align(tx_data);
1567                 tx_desc = (struct tx_desc *)tx_data;
1568 
1569                 offset = (u32)skb_transport_offset(skb);
1570 
1571                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1572                         r8152_csum_workaround(tp, skb, &skb_head);
1573                         continue;
1574                 }
1575 
1576                 rtl_tx_vlan_tag(tx_desc, skb);
1577 
1578                 tx_data += sizeof(*tx_desc);
1579 
1580                 len = skb->len;
1581                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1582                         struct net_device_stats *stats = &tp->netdev->stats;
1583 
1584                         stats->tx_dropped++;
1585                         dev_kfree_skb_any(skb);
1586                         tx_data -= sizeof(*tx_desc);
1587                         continue;
1588                 }
1589 
1590                 tx_data += len;
1591                 agg->skb_len += len;
1592                 agg->skb_num++;
1593 
1594                 dev_kfree_skb_any(skb);
1595 
1596                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1597         }
1598 
1599         if (!skb_queue_empty(&skb_head)) {
1600                 spin_lock(&tx_queue->lock);
1601                 skb_queue_splice(&skb_head, tx_queue);
1602                 spin_unlock(&tx_queue->lock);
1603         }
1604 
1605         netif_tx_lock(tp->netdev);
1606 
1607         if (netif_queue_stopped(tp->netdev) &&
1608             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1609                 netif_wake_queue(tp->netdev);
1610 
1611         netif_tx_unlock(tp->netdev);
1612 
1613         ret = usb_autopm_get_interface_async(tp->intf);
1614         if (ret < 0)
1615                 goto out_tx_fill;
1616 
1617         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1618                           agg->head, (int)(tx_data - (u8 *)agg->head),
1619                           (usb_complete_t)write_bulk_callback, agg);
1620 
1621         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1622         if (ret < 0)
1623                 usb_autopm_put_interface_async(tp->intf);
1624 
1625 out_tx_fill:
1626         return ret;
1627 }
1628 
1629 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1630 {
1631         u8 checksum = CHECKSUM_NONE;
1632         u32 opts2, opts3;
1633 
1634         if (tp->version == RTL_VER_01)
1635                 goto return_result;
1636 
1637         opts2 = le32_to_cpu(rx_desc->opts2);
1638         opts3 = le32_to_cpu(rx_desc->opts3);
1639 
1640         if (opts2 & RD_IPV4_CS) {
1641                 if (opts3 & IPF)
1642                         checksum = CHECKSUM_NONE;
1643                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1644                         checksum = CHECKSUM_NONE;
1645                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1646                         checksum = CHECKSUM_NONE;
1647                 else
1648                         checksum = CHECKSUM_UNNECESSARY;
1649         } else if (RD_IPV6_CS) {
1650                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1651                         checksum = CHECKSUM_UNNECESSARY;
1652                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1653                         checksum = CHECKSUM_UNNECESSARY;
1654         }
1655 
1656 return_result:
1657         return checksum;
1658 }
1659 
1660 static int rx_bottom(struct r8152 *tp, int budget)
1661 {
1662         unsigned long flags;
1663         struct list_head *cursor, *next, rx_queue;
1664         int ret = 0, work_done = 0;
1665 
1666         if (!skb_queue_empty(&tp->rx_queue)) {
1667                 while (work_done < budget) {
1668                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1669                         struct net_device *netdev = tp->netdev;
1670                         struct net_device_stats *stats = &netdev->stats;
1671                         unsigned int pkt_len;
1672 
1673                         if (!skb)
1674                                 break;
1675 
1676                         pkt_len = skb->len;
1677                         napi_gro_receive(&tp->napi, skb);
1678                         work_done++;
1679                         stats->rx_packets++;
1680                         stats->rx_bytes += pkt_len;
1681                 }
1682         }
1683 
1684         if (list_empty(&tp->rx_done))
1685                 goto out1;
1686 
1687         INIT_LIST_HEAD(&rx_queue);
1688         spin_lock_irqsave(&tp->rx_lock, flags);
1689         list_splice_init(&tp->rx_done, &rx_queue);
1690         spin_unlock_irqrestore(&tp->rx_lock, flags);
1691 
1692         list_for_each_safe(cursor, next, &rx_queue) {
1693                 struct rx_desc *rx_desc;
1694                 struct rx_agg *agg;
1695                 int len_used = 0;
1696                 struct urb *urb;
1697                 u8 *rx_data;
1698 
1699                 list_del_init(cursor);
1700 
1701                 agg = list_entry(cursor, struct rx_agg, list);
1702                 urb = agg->urb;
1703                 if (urb->actual_length < ETH_ZLEN)
1704                         goto submit;
1705 
1706                 rx_desc = agg->head;
1707                 rx_data = agg->head;
1708                 len_used += sizeof(struct rx_desc);
1709 
1710                 while (urb->actual_length > len_used) {
1711                         struct net_device *netdev = tp->netdev;
1712                         struct net_device_stats *stats = &netdev->stats;
1713                         unsigned int pkt_len;
1714                         struct sk_buff *skb;
1715 
1716                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1717                         if (pkt_len < ETH_ZLEN)
1718                                 break;
1719 
1720                         len_used += pkt_len;
1721                         if (urb->actual_length < len_used)
1722                                 break;
1723 
1724                         pkt_len -= CRC_SIZE;
1725                         rx_data += sizeof(struct rx_desc);
1726 
1727                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1728                         if (!skb) {
1729                                 stats->rx_dropped++;
1730                                 goto find_next_rx;
1731                         }
1732 
1733                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1734                         memcpy(skb->data, rx_data, pkt_len);
1735                         skb_put(skb, pkt_len);
1736                         skb->protocol = eth_type_trans(skb, netdev);
1737                         rtl_rx_vlan_tag(rx_desc, skb);
1738                         if (work_done < budget) {
1739                                 napi_gro_receive(&tp->napi, skb);
1740                                 work_done++;
1741                                 stats->rx_packets++;
1742                                 stats->rx_bytes += pkt_len;
1743                         } else {
1744                                 __skb_queue_tail(&tp->rx_queue, skb);
1745                         }
1746 
1747 find_next_rx:
1748                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1749                         rx_desc = (struct rx_desc *)rx_data;
1750                         len_used = (int)(rx_data - (u8 *)agg->head);
1751                         len_used += sizeof(struct rx_desc);
1752                 }
1753 
1754 submit:
1755                 if (!ret) {
1756                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1757                 } else {
1758                         urb->actual_length = 0;
1759                         list_add_tail(&agg->list, next);
1760                 }
1761         }
1762 
1763         if (!list_empty(&rx_queue)) {
1764                 spin_lock_irqsave(&tp->rx_lock, flags);
1765                 list_splice_tail(&rx_queue, &tp->rx_done);
1766                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1767         }
1768 
1769 out1:
1770         return work_done;
1771 }
1772 
1773 static void tx_bottom(struct r8152 *tp)
1774 {
1775         int res;
1776 
1777         do {
1778                 struct tx_agg *agg;
1779 
1780                 if (skb_queue_empty(&tp->tx_queue))
1781                         break;
1782 
1783                 agg = r8152_get_tx_agg(tp);
1784                 if (!agg)
1785                         break;
1786 
1787                 res = r8152_tx_agg_fill(tp, agg);
1788                 if (res) {
1789                         struct net_device *netdev = tp->netdev;
1790 
1791                         if (res == -ENODEV) {
1792                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1793                                 netif_device_detach(netdev);
1794                         } else {
1795                                 struct net_device_stats *stats = &netdev->stats;
1796                                 unsigned long flags;
1797 
1798                                 netif_warn(tp, tx_err, netdev,
1799                                            "failed tx_urb %d\n", res);
1800                                 stats->tx_dropped += agg->skb_num;
1801 
1802                                 spin_lock_irqsave(&tp->tx_lock, flags);
1803                                 list_add_tail(&agg->list, &tp->tx_free);
1804                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1805                         }
1806                 }
1807         } while (res == 0);
1808 }
1809 
1810 static void bottom_half(struct r8152 *tp)
1811 {
1812         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1813                 return;
1814 
1815         if (!test_bit(WORK_ENABLE, &tp->flags))
1816                 return;
1817 
1818         /* When link down, the driver would cancel all bulks. */
1819         /* This avoid the re-submitting bulk */
1820         if (!netif_carrier_ok(tp->netdev))
1821                 return;
1822 
1823         clear_bit(SCHEDULE_NAPI, &tp->flags);
1824 
1825         tx_bottom(tp);
1826 }
1827 
1828 static int r8152_poll(struct napi_struct *napi, int budget)
1829 {
1830         struct r8152 *tp = container_of(napi, struct r8152, napi);
1831         int work_done;
1832 
1833         work_done = rx_bottom(tp, budget);
1834         bottom_half(tp);
1835 
1836         if (work_done < budget) {
1837                 napi_complete(napi);
1838                 if (!list_empty(&tp->rx_done))
1839                         napi_schedule(napi);
1840         }
1841 
1842         return work_done;
1843 }
1844 
1845 static
1846 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1847 {
1848         int ret;
1849 
1850         /* The rx would be stopped, so skip submitting */
1851         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1852             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1853                 return 0;
1854 
1855         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1856                           agg->head, agg_buf_sz,
1857                           (usb_complete_t)read_bulk_callback, agg);
1858 
1859         ret = usb_submit_urb(agg->urb, mem_flags);
1860         if (ret == -ENODEV) {
1861                 set_bit(RTL8152_UNPLUG, &tp->flags);
1862                 netif_device_detach(tp->netdev);
1863         } else if (ret) {
1864                 struct urb *urb = agg->urb;
1865                 unsigned long flags;
1866 
1867                 urb->actual_length = 0;
1868                 spin_lock_irqsave(&tp->rx_lock, flags);
1869                 list_add_tail(&agg->list, &tp->rx_done);
1870                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1871 
1872                 netif_err(tp, rx_err, tp->netdev,
1873                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1874 
1875                 napi_schedule(&tp->napi);
1876         }
1877 
1878         return ret;
1879 }
1880 
1881 static void rtl_drop_queued_tx(struct r8152 *tp)
1882 {
1883         struct net_device_stats *stats = &tp->netdev->stats;
1884         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1885         struct sk_buff *skb;
1886 
1887         if (skb_queue_empty(tx_queue))
1888                 return;
1889 
1890         __skb_queue_head_init(&skb_head);
1891         spin_lock_bh(&tx_queue->lock);
1892         skb_queue_splice_init(tx_queue, &skb_head);
1893         spin_unlock_bh(&tx_queue->lock);
1894 
1895         while ((skb = __skb_dequeue(&skb_head))) {
1896                 dev_kfree_skb(skb);
1897                 stats->tx_dropped++;
1898         }
1899 }
1900 
1901 static void rtl8152_tx_timeout(struct net_device *netdev)
1902 {
1903         struct r8152 *tp = netdev_priv(netdev);
1904         int i;
1905 
1906         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1907         for (i = 0; i < RTL8152_MAX_TX; i++)
1908                 usb_unlink_urb(tp->tx_info[i].urb);
1909 }
1910 
1911 static void rtl8152_set_rx_mode(struct net_device *netdev)
1912 {
1913         struct r8152 *tp = netdev_priv(netdev);
1914 
1915         if (netif_carrier_ok(netdev)) {
1916                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1917                 schedule_delayed_work(&tp->schedule, 0);
1918         }
1919 }
1920 
1921 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1922 {
1923         struct r8152 *tp = netdev_priv(netdev);
1924         u32 mc_filter[2];       /* Multicast hash filter */
1925         __le32 tmp[2];
1926         u32 ocp_data;
1927 
1928         clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1929         netif_stop_queue(netdev);
1930         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1931         ocp_data &= ~RCR_ACPT_ALL;
1932         ocp_data |= RCR_AB | RCR_APM;
1933 
1934         if (netdev->flags & IFF_PROMISC) {
1935                 /* Unconditionally log net taps. */
1936                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1937                 ocp_data |= RCR_AM | RCR_AAP;
1938                 mc_filter[1] = 0xffffffff;
1939                 mc_filter[0] = 0xffffffff;
1940         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1941                    (netdev->flags & IFF_ALLMULTI)) {
1942                 /* Too many to filter perfectly -- accept all multicasts. */
1943                 ocp_data |= RCR_AM;
1944                 mc_filter[1] = 0xffffffff;
1945                 mc_filter[0] = 0xffffffff;
1946         } else {
1947                 struct netdev_hw_addr *ha;
1948 
1949                 mc_filter[1] = 0;
1950                 mc_filter[0] = 0;
1951                 netdev_for_each_mc_addr(ha, netdev) {
1952                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1953 
1954                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1955                         ocp_data |= RCR_AM;
1956                 }
1957         }
1958 
1959         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1960         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1961 
1962         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1963         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1964         netif_wake_queue(netdev);
1965 }
1966 
1967 static netdev_features_t
1968 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1969                        netdev_features_t features)
1970 {
1971         u32 mss = skb_shinfo(skb)->gso_size;
1972         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1973         int offset = skb_transport_offset(skb);
1974 
1975         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1976                 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
1977         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1978                 features &= ~NETIF_F_GSO_MASK;
1979 
1980         return features;
1981 }
1982 
1983 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1984                                       struct net_device *netdev)
1985 {
1986         struct r8152 *tp = netdev_priv(netdev);
1987 
1988         skb_tx_timestamp(skb);
1989 
1990         skb_queue_tail(&tp->tx_queue, skb);
1991 
1992         if (!list_empty(&tp->tx_free)) {
1993                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1994                         set_bit(SCHEDULE_NAPI, &tp->flags);
1995                         schedule_delayed_work(&tp->schedule, 0);
1996                 } else {
1997                         usb_mark_last_busy(tp->udev);
1998                         napi_schedule(&tp->napi);
1999                 }
2000         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2001                 netif_stop_queue(netdev);
2002         }
2003 
2004         return NETDEV_TX_OK;
2005 }
2006 
2007 static void r8152b_reset_packet_filter(struct r8152 *tp)
2008 {
2009         u32     ocp_data;
2010 
2011         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2012         ocp_data &= ~FMC_FCR_MCU_EN;
2013         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2014         ocp_data |= FMC_FCR_MCU_EN;
2015         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2016 }
2017 
2018 static void rtl8152_nic_reset(struct r8152 *tp)
2019 {
2020         int     i;
2021 
2022         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2023 
2024         for (i = 0; i < 1000; i++) {
2025                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2026                         break;
2027                 usleep_range(100, 400);
2028         }
2029 }
2030 
2031 static void set_tx_qlen(struct r8152 *tp)
2032 {
2033         struct net_device *netdev = tp->netdev;
2034 
2035         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2036                                     sizeof(struct tx_desc));
2037 }
2038 
2039 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2040 {
2041         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2042 }
2043 
2044 static void rtl_set_eee_plus(struct r8152 *tp)
2045 {
2046         u32 ocp_data;
2047         u8 speed;
2048 
2049         speed = rtl8152_get_speed(tp);
2050         if (speed & _10bps) {
2051                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2052                 ocp_data |= EEEP_CR_EEEP_TX;
2053                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2054         } else {
2055                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2056                 ocp_data &= ~EEEP_CR_EEEP_TX;
2057                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2058         }
2059 }
2060 
2061 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2062 {
2063         u32 ocp_data;
2064 
2065         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2066         if (enable)
2067                 ocp_data |= RXDY_GATED_EN;
2068         else
2069                 ocp_data &= ~RXDY_GATED_EN;
2070         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2071 }
2072 
2073 static int rtl_start_rx(struct r8152 *tp)
2074 {
2075         int i, ret = 0;
2076 
2077         napi_disable(&tp->napi);
2078         INIT_LIST_HEAD(&tp->rx_done);
2079         for (i = 0; i < RTL8152_MAX_RX; i++) {
2080                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2081                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2082                 if (ret)
2083                         break;
2084         }
2085         napi_enable(&tp->napi);
2086 
2087         if (ret && ++i < RTL8152_MAX_RX) {
2088                 struct list_head rx_queue;
2089                 unsigned long flags;
2090 
2091                 INIT_LIST_HEAD(&rx_queue);
2092 
2093                 do {
2094                         struct rx_agg *agg = &tp->rx_info[i++];
2095                         struct urb *urb = agg->urb;
2096 
2097                         urb->actual_length = 0;
2098                         list_add_tail(&agg->list, &rx_queue);
2099                 } while (i < RTL8152_MAX_RX);
2100 
2101                 spin_lock_irqsave(&tp->rx_lock, flags);
2102                 list_splice_tail(&rx_queue, &tp->rx_done);
2103                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2104         }
2105 
2106         return ret;
2107 }
2108 
2109 static int rtl_stop_rx(struct r8152 *tp)
2110 {
2111         int i;
2112 
2113         for (i = 0; i < RTL8152_MAX_RX; i++)
2114                 usb_kill_urb(tp->rx_info[i].urb);
2115 
2116         while (!skb_queue_empty(&tp->rx_queue))
2117                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2118 
2119         return 0;
2120 }
2121 
2122 static int rtl_enable(struct r8152 *tp)
2123 {
2124         u32 ocp_data;
2125 
2126         r8152b_reset_packet_filter(tp);
2127 
2128         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2129         ocp_data |= CR_RE | CR_TE;
2130         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2131 
2132         rxdy_gated_en(tp, false);
2133 
2134         return 0;
2135 }
2136 
2137 static int rtl8152_enable(struct r8152 *tp)
2138 {
2139         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2140                 return -ENODEV;
2141 
2142         set_tx_qlen(tp);
2143         rtl_set_eee_plus(tp);
2144 
2145         return rtl_enable(tp);
2146 }
2147 
2148 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2149 {
2150         u32 ocp_data = tp->coalesce / 8;
2151 
2152         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2153 }
2154 
2155 static void r8153_set_rx_early_size(struct r8152 *tp)
2156 {
2157         u32 mtu = tp->netdev->mtu;
2158         u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2159 
2160         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2161 }
2162 
2163 static int rtl8153_enable(struct r8152 *tp)
2164 {
2165         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2166                 return -ENODEV;
2167 
2168         set_tx_qlen(tp);
2169         rtl_set_eee_plus(tp);
2170         r8153_set_rx_early_timeout(tp);
2171         r8153_set_rx_early_size(tp);
2172 
2173         return rtl_enable(tp);
2174 }
2175 
2176 static void rtl_disable(struct r8152 *tp)
2177 {
2178         u32 ocp_data;
2179         int i;
2180 
2181         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2182                 rtl_drop_queued_tx(tp);
2183                 return;
2184         }
2185 
2186         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2187         ocp_data &= ~RCR_ACPT_ALL;
2188         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2189 
2190         rtl_drop_queued_tx(tp);
2191 
2192         for (i = 0; i < RTL8152_MAX_TX; i++)
2193                 usb_kill_urb(tp->tx_info[i].urb);
2194 
2195         rxdy_gated_en(tp, true);
2196 
2197         for (i = 0; i < 1000; i++) {
2198                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2199                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2200                         break;
2201                 usleep_range(1000, 2000);
2202         }
2203 
2204         for (i = 0; i < 1000; i++) {
2205                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2206                         break;
2207                 usleep_range(1000, 2000);
2208         }
2209 
2210         rtl_stop_rx(tp);
2211 
2212         rtl8152_nic_reset(tp);
2213 }
2214 
2215 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2216 {
2217         u32 ocp_data;
2218 
2219         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2220         if (enable)
2221                 ocp_data |= POWER_CUT;
2222         else
2223                 ocp_data &= ~POWER_CUT;
2224         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2225 
2226         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2227         ocp_data &= ~RESUME_INDICATE;
2228         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2229 }
2230 
2231 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2232 {
2233         u32 ocp_data;
2234 
2235         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2236         if (enable)
2237                 ocp_data |= CPCR_RX_VLAN;
2238         else
2239                 ocp_data &= ~CPCR_RX_VLAN;
2240         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2241 }
2242 
2243 static int rtl8152_set_features(struct net_device *dev,
2244                                 netdev_features_t features)
2245 {
2246         netdev_features_t changed = features ^ dev->features;
2247         struct r8152 *tp = netdev_priv(dev);
2248         int ret;
2249 
2250         ret = usb_autopm_get_interface(tp->intf);
2251         if (ret < 0)
2252                 goto out;
2253 
2254         mutex_lock(&tp->control);
2255 
2256         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2257                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2258                         rtl_rx_vlan_en(tp, true);
2259                 else
2260                         rtl_rx_vlan_en(tp, false);
2261         }
2262 
2263         mutex_unlock(&tp->control);
2264 
2265         usb_autopm_put_interface(tp->intf);
2266 
2267 out:
2268         return ret;
2269 }
2270 
2271 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2272 
2273 static u32 __rtl_get_wol(struct r8152 *tp)
2274 {
2275         u32 ocp_data;
2276         u32 wolopts = 0;
2277 
2278         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2279         if (!(ocp_data & LAN_WAKE_EN))
2280                 return 0;
2281 
2282         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2283         if (ocp_data & LINK_ON_WAKE_EN)
2284                 wolopts |= WAKE_PHY;
2285 
2286         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2287         if (ocp_data & UWF_EN)
2288                 wolopts |= WAKE_UCAST;
2289         if (ocp_data & BWF_EN)
2290                 wolopts |= WAKE_BCAST;
2291         if (ocp_data & MWF_EN)
2292                 wolopts |= WAKE_MCAST;
2293 
2294         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2295         if (ocp_data & MAGIC_EN)
2296                 wolopts |= WAKE_MAGIC;
2297 
2298         return wolopts;
2299 }
2300 
2301 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2302 {
2303         u32 ocp_data;
2304 
2305         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2306 
2307         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2308         ocp_data &= ~LINK_ON_WAKE_EN;
2309         if (wolopts & WAKE_PHY)
2310                 ocp_data |= LINK_ON_WAKE_EN;
2311         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2312 
2313         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2314         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2315         if (wolopts & WAKE_UCAST)
2316                 ocp_data |= UWF_EN;
2317         if (wolopts & WAKE_BCAST)
2318                 ocp_data |= BWF_EN;
2319         if (wolopts & WAKE_MCAST)
2320                 ocp_data |= MWF_EN;
2321         if (wolopts & WAKE_ANY)
2322                 ocp_data |= LAN_WAKE_EN;
2323         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2324 
2325         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2326 
2327         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2328         ocp_data &= ~MAGIC_EN;
2329         if (wolopts & WAKE_MAGIC)
2330                 ocp_data |= MAGIC_EN;
2331         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2332 
2333         if (wolopts & WAKE_ANY)
2334                 device_set_wakeup_enable(&tp->udev->dev, true);
2335         else
2336                 device_set_wakeup_enable(&tp->udev->dev, false);
2337 }
2338 
2339 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2340 {
2341         if (enable) {
2342                 u32 ocp_data;
2343 
2344                 __rtl_set_wol(tp, WAKE_ANY);
2345 
2346                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2347 
2348                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2349                 ocp_data |= LINK_OFF_WAKE_EN;
2350                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2351 
2352                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2353         } else {
2354                 __rtl_set_wol(tp, tp->saved_wolopts);
2355         }
2356 }
2357 
2358 static void rtl_phy_reset(struct r8152 *tp)
2359 {
2360         u16 data;
2361         int i;
2362 
2363         clear_bit(PHY_RESET, &tp->flags);
2364 
2365         data = r8152_mdio_read(tp, MII_BMCR);
2366 
2367         /* don't reset again before the previous one complete */
2368         if (data & BMCR_RESET)
2369                 return;
2370 
2371         data |= BMCR_RESET;
2372         r8152_mdio_write(tp, MII_BMCR, data);
2373 
2374         for (i = 0; i < 50; i++) {
2375                 msleep(20);
2376                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2377                         break;
2378         }
2379 }
2380 
2381 static void r8153_teredo_off(struct r8152 *tp)
2382 {
2383         u32 ocp_data;
2384 
2385         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2386         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2387         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2388 
2389         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2390         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2391         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2392 }
2393 
2394 static void r8152b_disable_aldps(struct r8152 *tp)
2395 {
2396         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2397         msleep(20);
2398 }
2399 
2400 static inline void r8152b_enable_aldps(struct r8152 *tp)
2401 {
2402         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2403                                             LINKENA | DIS_SDSAVE);
2404 }
2405 
2406 static void rtl8152_disable(struct r8152 *tp)
2407 {
2408         r8152b_disable_aldps(tp);
2409         rtl_disable(tp);
2410         r8152b_enable_aldps(tp);
2411 }
2412 
2413 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2414 {
2415         u16 data;
2416 
2417         data = r8152_mdio_read(tp, MII_BMCR);
2418         if (data & BMCR_PDOWN) {
2419                 data &= ~BMCR_PDOWN;
2420                 r8152_mdio_write(tp, MII_BMCR, data);
2421         }
2422 
2423         set_bit(PHY_RESET, &tp->flags);
2424 }
2425 
2426 static void r8152b_exit_oob(struct r8152 *tp)
2427 {
2428         u32 ocp_data;
2429         int i;
2430 
2431         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2432         ocp_data &= ~RCR_ACPT_ALL;
2433         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2434 
2435         rxdy_gated_en(tp, true);
2436         r8153_teredo_off(tp);
2437         r8152b_hw_phy_cfg(tp);
2438 
2439         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2440         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2441 
2442         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2443         ocp_data &= ~NOW_IS_OOB;
2444         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2445 
2446         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2447         ocp_data &= ~MCU_BORW_EN;
2448         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2449 
2450         for (i = 0; i < 1000; i++) {
2451                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2452                 if (ocp_data & LINK_LIST_READY)
2453                         break;
2454                 usleep_range(1000, 2000);
2455         }
2456 
2457         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2458         ocp_data |= RE_INIT_LL;
2459         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2460 
2461         for (i = 0; i < 1000; i++) {
2462                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2463                 if (ocp_data & LINK_LIST_READY)
2464                         break;
2465                 usleep_range(1000, 2000);
2466         }
2467 
2468         rtl8152_nic_reset(tp);
2469 
2470         /* rx share fifo credit full threshold */
2471         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2472 
2473         if (tp->udev->speed == USB_SPEED_FULL ||
2474             tp->udev->speed == USB_SPEED_LOW) {
2475                 /* rx share fifo credit near full threshold */
2476                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2477                                 RXFIFO_THR2_FULL);
2478                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2479                                 RXFIFO_THR3_FULL);
2480         } else {
2481                 /* rx share fifo credit near full threshold */
2482                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2483                                 RXFIFO_THR2_HIGH);
2484                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2485                                 RXFIFO_THR3_HIGH);
2486         }
2487 
2488         /* TX share fifo free credit full threshold */
2489         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2490 
2491         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2492         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2493         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2494                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2495 
2496         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2497 
2498         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2499 
2500         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2501         ocp_data |= TCR0_AUTO_FIFO;
2502         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2503 }
2504 
2505 static void r8152b_enter_oob(struct r8152 *tp)
2506 {
2507         u32 ocp_data;
2508         int i;
2509 
2510         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2511         ocp_data &= ~NOW_IS_OOB;
2512         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2513 
2514         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2515         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2516         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2517 
2518         rtl_disable(tp);
2519 
2520         for (i = 0; i < 1000; i++) {
2521                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2522                 if (ocp_data & LINK_LIST_READY)
2523                         break;
2524                 usleep_range(1000, 2000);
2525         }
2526 
2527         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2528         ocp_data |= RE_INIT_LL;
2529         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2530 
2531         for (i = 0; i < 1000; i++) {
2532                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2533                 if (ocp_data & LINK_LIST_READY)
2534                         break;
2535                 usleep_range(1000, 2000);
2536         }
2537 
2538         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2539 
2540         rtl_rx_vlan_en(tp, true);
2541 
2542         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2543         ocp_data |= ALDPS_PROXY_MODE;
2544         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2545 
2546         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2547         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2548         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2549 
2550         rxdy_gated_en(tp, false);
2551 
2552         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2553         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2554         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2555 }
2556 
2557 static void r8153_hw_phy_cfg(struct r8152 *tp)
2558 {
2559         u32 ocp_data;
2560         u16 data;
2561 
2562         ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2563         data = r8152_mdio_read(tp, MII_BMCR);
2564         if (data & BMCR_PDOWN) {
2565                 data &= ~BMCR_PDOWN;
2566                 r8152_mdio_write(tp, MII_BMCR, data);
2567         }
2568 
2569         if (tp->version == RTL_VER_03) {
2570                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2571                 data &= ~CTAP_SHORT_EN;
2572                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2573         }
2574 
2575         data = ocp_reg_read(tp, OCP_POWER_CFG);
2576         data |= EEE_CLKDIV_EN;
2577         ocp_reg_write(tp, OCP_POWER_CFG, data);
2578 
2579         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2580         data |= EN_10M_BGOFF;
2581         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2582         data = ocp_reg_read(tp, OCP_POWER_CFG);
2583         data |= EN_10M_PLLOFF;
2584         ocp_reg_write(tp, OCP_POWER_CFG, data);
2585         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2586 
2587         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2588         ocp_data |= PFM_PWM_SWITCH;
2589         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2590 
2591         /* Enable LPF corner auto tune */
2592         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2593 
2594         /* Adjust 10M Amplitude */
2595         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2596         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2597 
2598         set_bit(PHY_RESET, &tp->flags);
2599 }
2600 
2601 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2602 {
2603         u8 u1u2[8];
2604 
2605         if (enable)
2606                 memset(u1u2, 0xff, sizeof(u1u2));
2607         else
2608                 memset(u1u2, 0x00, sizeof(u1u2));
2609 
2610         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2611 }
2612 
2613 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2614 {
2615         u32 ocp_data;
2616 
2617         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2618         if (enable)
2619                 ocp_data |= U2P3_ENABLE;
2620         else
2621                 ocp_data &= ~U2P3_ENABLE;
2622         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2623 }
2624 
2625 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2626 {
2627         u32 ocp_data;
2628 
2629         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2630         if (enable)
2631                 ocp_data |= PWR_EN | PHASE2_EN;
2632         else
2633                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2634         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2635 
2636         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2637         ocp_data &= ~PCUT_STATUS;
2638         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2639 }
2640 
2641 static void r8153_first_init(struct r8152 *tp)
2642 {
2643         u32 ocp_data;
2644         int i;
2645 
2646         rxdy_gated_en(tp, true);
2647         r8153_teredo_off(tp);
2648 
2649         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2650         ocp_data &= ~RCR_ACPT_ALL;
2651         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2652 
2653         r8153_hw_phy_cfg(tp);
2654 
2655         rtl8152_nic_reset(tp);
2656 
2657         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2658         ocp_data &= ~NOW_IS_OOB;
2659         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2660 
2661         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2662         ocp_data &= ~MCU_BORW_EN;
2663         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2664 
2665         for (i = 0; i < 1000; i++) {
2666                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2667                 if (ocp_data & LINK_LIST_READY)
2668                         break;
2669                 usleep_range(1000, 2000);
2670         }
2671 
2672         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2673         ocp_data |= RE_INIT_LL;
2674         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2675 
2676         for (i = 0; i < 1000; i++) {
2677                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2678                 if (ocp_data & LINK_LIST_READY)
2679                         break;
2680                 usleep_range(1000, 2000);
2681         }
2682 
2683         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2684 
2685         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2686         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2687 
2688         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2689         ocp_data |= TCR0_AUTO_FIFO;
2690         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2691 
2692         rtl8152_nic_reset(tp);
2693 
2694         /* rx share fifo credit full threshold */
2695         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2696         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2697         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2698         /* TX share fifo free credit full threshold */
2699         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2700 
2701         /* rx aggregation */
2702         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2703         ocp_data &= ~RX_AGG_DISABLE;
2704         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2705 }
2706 
2707 static void r8153_enter_oob(struct r8152 *tp)
2708 {
2709         u32 ocp_data;
2710         int i;
2711 
2712         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2713         ocp_data &= ~NOW_IS_OOB;
2714         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2715 
2716         rtl_disable(tp);
2717 
2718         for (i = 0; i < 1000; i++) {
2719                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2720                 if (ocp_data & LINK_LIST_READY)
2721                         break;
2722                 usleep_range(1000, 2000);
2723         }
2724 
2725         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2726         ocp_data |= RE_INIT_LL;
2727         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2728 
2729         for (i = 0; i < 1000; i++) {
2730                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2731                 if (ocp_data & LINK_LIST_READY)
2732                         break;
2733                 usleep_range(1000, 2000);
2734         }
2735 
2736         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2737 
2738         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2739         ocp_data &= ~TEREDO_WAKE_MASK;
2740         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2741 
2742         rtl_rx_vlan_en(tp, true);
2743 
2744         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2745         ocp_data |= ALDPS_PROXY_MODE;
2746         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2747 
2748         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2749         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2750         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2751 
2752         rxdy_gated_en(tp, false);
2753 
2754         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2755         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2756         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2757 }
2758 
2759 static void r8153_disable_aldps(struct r8152 *tp)
2760 {
2761         u16 data;
2762 
2763         data = ocp_reg_read(tp, OCP_POWER_CFG);
2764         data &= ~EN_ALDPS;
2765         ocp_reg_write(tp, OCP_POWER_CFG, data);
2766         msleep(20);
2767 }
2768 
2769 static void r8153_enable_aldps(struct r8152 *tp)
2770 {
2771         u16 data;
2772 
2773         data = ocp_reg_read(tp, OCP_POWER_CFG);
2774         data |= EN_ALDPS;
2775         ocp_reg_write(tp, OCP_POWER_CFG, data);
2776 }
2777 
2778 static void rtl8153_disable(struct r8152 *tp)
2779 {
2780         r8153_disable_aldps(tp);
2781         rtl_disable(tp);
2782         r8153_enable_aldps(tp);
2783 }
2784 
2785 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2786 {
2787         u16 bmcr, anar, gbcr;
2788         int ret = 0;
2789 
2790         cancel_delayed_work_sync(&tp->schedule);
2791         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2792         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2793                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2794         if (tp->mii.supports_gmii) {
2795                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2796                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2797         } else {
2798                 gbcr = 0;
2799         }
2800 
2801         if (autoneg == AUTONEG_DISABLE) {
2802                 if (speed == SPEED_10) {
2803                         bmcr = 0;
2804                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2805                 } else if (speed == SPEED_100) {
2806                         bmcr = BMCR_SPEED100;
2807                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2808                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2809                         bmcr = BMCR_SPEED1000;
2810                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2811                 } else {
2812                         ret = -EINVAL;
2813                         goto out;
2814                 }
2815 
2816                 if (duplex == DUPLEX_FULL)
2817                         bmcr |= BMCR_FULLDPLX;
2818         } else {
2819                 if (speed == SPEED_10) {
2820                         if (duplex == DUPLEX_FULL)
2821                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2822                         else
2823                                 anar |= ADVERTISE_10HALF;
2824                 } else if (speed == SPEED_100) {
2825                         if (duplex == DUPLEX_FULL) {
2826                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2827                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2828                         } else {
2829                                 anar |= ADVERTISE_10HALF;
2830                                 anar |= ADVERTISE_100HALF;
2831                         }
2832                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2833                         if (duplex == DUPLEX_FULL) {
2834                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2835                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2836                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2837                         } else {
2838                                 anar |= ADVERTISE_10HALF;
2839                                 anar |= ADVERTISE_100HALF;
2840                                 gbcr |= ADVERTISE_1000HALF;
2841                         }
2842                 } else {
2843                         ret = -EINVAL;
2844                         goto out;
2845                 }
2846 
2847                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2848         }
2849 
2850         if (test_bit(PHY_RESET, &tp->flags))
2851                 bmcr |= BMCR_RESET;
2852 
2853         if (tp->mii.supports_gmii)
2854                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2855 
2856         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2857         r8152_mdio_write(tp, MII_BMCR, bmcr);
2858 
2859         if (test_bit(PHY_RESET, &tp->flags)) {
2860                 int i;
2861 
2862                 clear_bit(PHY_RESET, &tp->flags);
2863                 for (i = 0; i < 50; i++) {
2864                         msleep(20);
2865                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2866                                 break;
2867                 }
2868         }
2869 
2870 out:
2871 
2872         return ret;
2873 }
2874 
2875 static void rtl8152_up(struct r8152 *tp)
2876 {
2877         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2878                 return;
2879 
2880         r8152b_disable_aldps(tp);
2881         r8152b_exit_oob(tp);
2882         r8152b_enable_aldps(tp);
2883 }
2884 
2885 static void rtl8152_down(struct r8152 *tp)
2886 {
2887         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2888                 rtl_drop_queued_tx(tp);
2889                 return;
2890         }
2891 
2892         r8152_power_cut_en(tp, false);
2893         r8152b_disable_aldps(tp);
2894         r8152b_enter_oob(tp);
2895         r8152b_enable_aldps(tp);
2896 }
2897 
2898 static void rtl8153_up(struct r8152 *tp)
2899 {
2900         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2901                 return;
2902 
2903         r8153_disable_aldps(tp);
2904         r8153_first_init(tp);
2905         r8153_enable_aldps(tp);
2906 }
2907 
2908 static void rtl8153_down(struct r8152 *tp)
2909 {
2910         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2911                 rtl_drop_queued_tx(tp);
2912                 return;
2913         }
2914 
2915         r8153_u1u2en(tp, false);
2916         r8153_power_cut_en(tp, false);
2917         r8153_disable_aldps(tp);
2918         r8153_enter_oob(tp);
2919         r8153_enable_aldps(tp);
2920 }
2921 
2922 static void set_carrier(struct r8152 *tp)
2923 {
2924         struct net_device *netdev = tp->netdev;
2925         u8 speed;
2926 
2927         clear_bit(RTL8152_LINK_CHG, &tp->flags);
2928         speed = rtl8152_get_speed(tp);
2929 
2930         if (speed & LINK_STATUS) {
2931                 if (!netif_carrier_ok(netdev)) {
2932                         tp->rtl_ops.enable(tp);
2933                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2934                         netif_carrier_on(netdev);
2935                         rtl_start_rx(tp);
2936                 }
2937         } else {
2938                 if (netif_carrier_ok(netdev)) {
2939                         netif_carrier_off(netdev);
2940                         napi_disable(&tp->napi);
2941                         tp->rtl_ops.disable(tp);
2942                         napi_enable(&tp->napi);
2943                 }
2944         }
2945 }
2946 
2947 static void rtl_work_func_t(struct work_struct *work)
2948 {
2949         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2950 
2951         /* If the device is unplugged or !netif_running(), the workqueue
2952          * doesn't need to wake the device, and could return directly.
2953          */
2954         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
2955                 return;
2956 
2957         if (usb_autopm_get_interface(tp->intf) < 0)
2958                 return;
2959 
2960         if (!test_bit(WORK_ENABLE, &tp->flags))
2961                 goto out1;
2962 
2963         if (!mutex_trylock(&tp->control)) {
2964                 schedule_delayed_work(&tp->schedule, 0);
2965                 goto out1;
2966         }
2967 
2968         if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2969                 set_carrier(tp);
2970 
2971         if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2972                 _rtl8152_set_rx_mode(tp->netdev);
2973 
2974         /* don't schedule napi before linking */
2975         if (test_bit(SCHEDULE_NAPI, &tp->flags) &&
2976             netif_carrier_ok(tp->netdev)) {
2977                 clear_bit(SCHEDULE_NAPI, &tp->flags);
2978                 napi_schedule(&tp->napi);
2979         }
2980 
2981         if (test_bit(PHY_RESET, &tp->flags))
2982                 rtl_phy_reset(tp);
2983 
2984         mutex_unlock(&tp->control);
2985 
2986 out1:
2987         usb_autopm_put_interface(tp->intf);
2988 }
2989 
2990 static int rtl8152_open(struct net_device *netdev)
2991 {
2992         struct r8152 *tp = netdev_priv(netdev);
2993         int res = 0;
2994 
2995         res = alloc_all_mem(tp);
2996         if (res)
2997                 goto out;
2998 
2999         netif_carrier_off(netdev);
3000 
3001         res = usb_autopm_get_interface(tp->intf);
3002         if (res < 0) {
3003                 free_all_mem(tp);
3004                 goto out;
3005         }
3006 
3007         mutex_lock(&tp->control);
3008 
3009         /* The WORK_ENABLE may be set when autoresume occurs */
3010         if (test_bit(WORK_ENABLE, &tp->flags)) {
3011                 clear_bit(WORK_ENABLE, &tp->flags);
3012                 usb_kill_urb(tp->intr_urb);
3013                 cancel_delayed_work_sync(&tp->schedule);
3014 
3015                 /* disable the tx/rx, if the workqueue has enabled them. */
3016                 if (netif_carrier_ok(netdev))
3017                         tp->rtl_ops.disable(tp);
3018         }
3019 
3020         tp->rtl_ops.up(tp);
3021 
3022         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3023                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3024                           DUPLEX_FULL);
3025         netif_carrier_off(netdev);
3026         netif_start_queue(netdev);
3027         set_bit(WORK_ENABLE, &tp->flags);
3028 
3029         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3030         if (res) {
3031                 if (res == -ENODEV)
3032                         netif_device_detach(tp->netdev);
3033                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3034                            res);
3035                 free_all_mem(tp);
3036         } else {
3037                 napi_enable(&tp->napi);
3038         }
3039 
3040         mutex_unlock(&tp->control);
3041 
3042         usb_autopm_put_interface(tp->intf);
3043 
3044 out:
3045         return res;
3046 }
3047 
3048 static int rtl8152_close(struct net_device *netdev)
3049 {
3050         struct r8152 *tp = netdev_priv(netdev);
3051         int res = 0;
3052 
3053         napi_disable(&tp->napi);
3054         clear_bit(WORK_ENABLE, &tp->flags);
3055         usb_kill_urb(tp->intr_urb);
3056         cancel_delayed_work_sync(&tp->schedule);
3057         netif_stop_queue(netdev);
3058 
3059         res = usb_autopm_get_interface(tp->intf);
3060         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3061                 rtl_drop_queued_tx(tp);
3062                 rtl_stop_rx(tp);
3063         } else {
3064                 mutex_lock(&tp->control);
3065 
3066                 /* The autosuspend may have been enabled and wouldn't
3067                  * be disable when autoresume occurs, because the
3068                  * netif_running() would be false.
3069                  */
3070                 rtl_runtime_suspend_enable(tp, false);
3071 
3072                 tp->rtl_ops.down(tp);
3073 
3074                 mutex_unlock(&tp->control);
3075 
3076                 usb_autopm_put_interface(tp->intf);
3077         }
3078 
3079         free_all_mem(tp);
3080 
3081         return res;
3082 }
3083 
3084 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3085 {
3086         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3087         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3088         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3089 }
3090 
3091 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3092 {
3093         u16 data;
3094 
3095         r8152_mmd_indirect(tp, dev, reg);
3096         data = ocp_reg_read(tp, OCP_EEE_DATA);
3097         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3098 
3099         return data;
3100 }
3101 
3102 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3103 {
3104         r8152_mmd_indirect(tp, dev, reg);
3105         ocp_reg_write(tp, OCP_EEE_DATA, data);
3106         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3107 }
3108 
3109 static void r8152_eee_en(struct r8152 *tp, bool enable)
3110 {
3111         u16 config1, config2, config3;
3112         u32 ocp_data;
3113 
3114         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3115         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3116         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3117         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3118 
3119         if (enable) {
3120                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3121                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3122                 config1 |= sd_rise_time(1);
3123                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3124                 config3 |= fast_snr(42);
3125         } else {
3126                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3127                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3128                              RX_QUIET_EN);
3129                 config1 |= sd_rise_time(7);
3130                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3131                 config3 |= fast_snr(511);
3132         }
3133 
3134         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3135         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3136         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3137         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3138 }
3139 
3140 static void r8152b_enable_eee(struct r8152 *tp)
3141 {
3142         r8152_eee_en(tp, true);
3143         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3144 }
3145 
3146 static void r8153_eee_en(struct r8152 *tp, bool enable)
3147 {
3148         u32 ocp_data;
3149         u16 config;
3150 
3151         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3152         config = ocp_reg_read(tp, OCP_EEE_CFG);
3153 
3154         if (enable) {
3155                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3156                 config |= EEE10_EN;
3157         } else {
3158                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3159                 config &= ~EEE10_EN;
3160         }
3161 
3162         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3163         ocp_reg_write(tp, OCP_EEE_CFG, config);
3164 }
3165 
3166 static void r8153_enable_eee(struct r8152 *tp)
3167 {
3168         r8153_eee_en(tp, true);
3169         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3170 }
3171 
3172 static void r8152b_enable_fc(struct r8152 *tp)
3173 {
3174         u16 anar;
3175 
3176         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3177         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3178         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3179 }
3180 
3181 static void rtl_tally_reset(struct r8152 *tp)
3182 {
3183         u32 ocp_data;
3184 
3185         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3186         ocp_data |= TALLY_RESET;
3187         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3188 }
3189 
3190 static void r8152b_init(struct r8152 *tp)
3191 {
3192         u32 ocp_data;
3193 
3194         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3195                 return;
3196 
3197         r8152b_disable_aldps(tp);
3198 
3199         if (tp->version == RTL_VER_01) {
3200                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3201                 ocp_data &= ~LED_MODE_MASK;
3202                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3203         }
3204 
3205         r8152_power_cut_en(tp, false);
3206 
3207         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3208         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3209         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3210         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3211         ocp_data &= ~MCU_CLK_RATIO_MASK;
3212         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3213         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3214         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3215                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3216         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3217 
3218         r8152b_enable_eee(tp);
3219         r8152b_enable_aldps(tp);
3220         r8152b_enable_fc(tp);
3221         rtl_tally_reset(tp);
3222 
3223         /* enable rx aggregation */
3224         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3225         ocp_data &= ~RX_AGG_DISABLE;
3226         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3227 }
3228 
3229 static void r8153_init(struct r8152 *tp)
3230 {
3231         u32 ocp_data;
3232         int i;
3233 
3234         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3235                 return;
3236 
3237         r8153_disable_aldps(tp);
3238         r8153_u1u2en(tp, false);
3239 
3240         for (i = 0; i < 500; i++) {
3241                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3242                     AUTOLOAD_DONE)
3243                         break;
3244                 msleep(20);
3245         }
3246 
3247         for (i = 0; i < 500; i++) {
3248                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3249                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3250                         break;
3251                 msleep(20);
3252         }
3253 
3254         r8153_u2p3en(tp, false);
3255 
3256         if (tp->version == RTL_VER_04) {
3257                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3258                 ocp_data &= ~pwd_dn_scale_mask;
3259                 ocp_data |= pwd_dn_scale(96);
3260                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3261 
3262                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3263                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3264                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3265         } else if (tp->version == RTL_VER_05) {
3266                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3267                 ocp_data &= ~ECM_ALDPS;
3268                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3269 
3270                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3271                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3272                         ocp_data &= ~DYNAMIC_BURST;
3273                 else
3274                         ocp_data |= DYNAMIC_BURST;
3275                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3276         }
3277 
3278         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3279         ocp_data |= EP4_FULL_FC;
3280         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3281 
3282         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3283         ocp_data &= ~TIMER11_EN;
3284         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3285 
3286         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3287         ocp_data &= ~LED_MODE_MASK;
3288         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3289 
3290         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3291         if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
3292                 ocp_data |= LPM_TIMER_500MS;
3293         else
3294                 ocp_data |= LPM_TIMER_500US;
3295         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3296 
3297         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3298         ocp_data &= ~SEN_VAL_MASK;
3299         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3300         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3301 
3302         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3303 
3304         r8153_power_cut_en(tp, false);
3305         r8153_u1u2en(tp, true);
3306 
3307         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3308         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3309         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3310                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3311                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3312         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3313                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3314                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3315                        EEE_SPDWN_EN);
3316 
3317         r8153_enable_eee(tp);
3318         r8153_enable_aldps(tp);
3319         r8152b_enable_fc(tp);
3320         rtl_tally_reset(tp);
3321 }
3322 
3323 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3324 {
3325         struct r8152 *tp = usb_get_intfdata(intf);
3326         struct net_device *netdev = tp->netdev;
3327         int ret = 0;
3328 
3329         mutex_lock(&tp->control);
3330 
3331         if (PMSG_IS_AUTO(message)) {
3332                 if (netif_running(netdev) && work_busy(&tp->schedule.work)) {
3333                         ret = -EBUSY;
3334                         goto out1;
3335                 }
3336 
3337                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3338         } else {
3339                 netif_device_detach(netdev);
3340         }
3341 
3342         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3343                 clear_bit(WORK_ENABLE, &tp->flags);
3344                 usb_kill_urb(tp->intr_urb);
3345                 napi_disable(&tp->napi);
3346                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3347                         rtl_stop_rx(tp);
3348                         rtl_runtime_suspend_enable(tp, true);
3349                 } else {
3350                         cancel_delayed_work_sync(&tp->schedule);
3351                         tp->rtl_ops.down(tp);
3352                 }
3353                 napi_enable(&tp->napi);
3354         }
3355 out1:
3356         mutex_unlock(&tp->control);
3357 
3358         return ret;
3359 }
3360 
3361 static int rtl8152_resume(struct usb_interface *intf)
3362 {
3363         struct r8152 *tp = usb_get_intfdata(intf);
3364 
3365         mutex_lock(&tp->control);
3366 
3367         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3368                 tp->rtl_ops.init(tp);
3369                 netif_device_attach(tp->netdev);
3370         }
3371 
3372         if (netif_running(tp->netdev)) {
3373                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3374                         rtl_runtime_suspend_enable(tp, false);
3375                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3376                         set_bit(WORK_ENABLE, &tp->flags);
3377                         if (netif_carrier_ok(tp->netdev))
3378                                 rtl_start_rx(tp);
3379                 } else {
3380                         tp->rtl_ops.up(tp);
3381                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3382                                           tp->mii.supports_gmii ?
3383                                           SPEED_1000 : SPEED_100,
3384                                           DUPLEX_FULL);
3385                         netif_carrier_off(tp->netdev);
3386                         set_bit(WORK_ENABLE, &tp->flags);
3387                 }
3388                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3389         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3390                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3391         }
3392 
3393         mutex_unlock(&tp->control);
3394 
3395         return 0;
3396 }
3397 
3398 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3399 {
3400         struct r8152 *tp = netdev_priv(dev);
3401 
3402         if (usb_autopm_get_interface(tp->intf) < 0)
3403                 return;
3404 
3405         mutex_lock(&tp->control);
3406 
3407         wol->supported = WAKE_ANY;
3408         wol->wolopts = __rtl_get_wol(tp);
3409 
3410         mutex_unlock(&tp->control);
3411 
3412         usb_autopm_put_interface(tp->intf);
3413 }
3414 
3415 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3416 {
3417         struct r8152 *tp = netdev_priv(dev);
3418         int ret;
3419 
3420         ret = usb_autopm_get_interface(tp->intf);
3421         if (ret < 0)
3422                 goto out_set_wol;
3423 
3424         mutex_lock(&tp->control);
3425 
3426         __rtl_set_wol(tp, wol->wolopts);
3427         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3428 
3429         mutex_unlock(&tp->control);
3430 
3431         usb_autopm_put_interface(tp->intf);
3432 
3433 out_set_wol:
3434         return ret;
3435 }
3436 
3437 static u32 rtl8152_get_msglevel(struct net_device *dev)
3438 {
3439         struct r8152 *tp = netdev_priv(dev);
3440 
3441         return tp->msg_enable;
3442 }
3443 
3444 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3445 {
3446         struct r8152 *tp = netdev_priv(dev);
3447 
3448         tp->msg_enable = value;
3449 }
3450 
3451 static void rtl8152_get_drvinfo(struct net_device *netdev,
3452                                 struct ethtool_drvinfo *info)
3453 {
3454         struct r8152 *tp = netdev_priv(netdev);
3455 
3456         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3457         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3458         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3459 }
3460 
3461 static
3462 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3463 {
3464         struct r8152 *tp = netdev_priv(netdev);
3465         int ret;
3466 
3467         if (!tp->mii.mdio_read)
3468                 return -EOPNOTSUPP;
3469 
3470         ret = usb_autopm_get_interface(tp->intf);
3471         if (ret < 0)
3472                 goto out;
3473 
3474         mutex_lock(&tp->control);
3475 
3476         ret = mii_ethtool_gset(&tp->mii, cmd);
3477 
3478         mutex_unlock(&tp->control);
3479 
3480         usb_autopm_put_interface(tp->intf);
3481 
3482 out:
3483         return ret;
3484 }
3485 
3486 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3487 {
3488         struct r8152 *tp = netdev_priv(dev);
3489         int ret;
3490 
3491         ret = usb_autopm_get_interface(tp->intf);
3492         if (ret < 0)
3493                 goto out;
3494 
3495         mutex_lock(&tp->control);
3496 
3497         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3498 
3499         mutex_unlock(&tp->control);
3500 
3501         usb_autopm_put_interface(tp->intf);
3502 
3503 out:
3504         return ret;
3505 }
3506 
3507 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3508         "tx_packets",
3509         "rx_packets",
3510         "tx_errors",
3511         "rx_errors",
3512         "rx_missed",
3513         "align_errors",
3514         "tx_single_collisions",
3515         "tx_multi_collisions",
3516         "rx_unicast",
3517         "rx_broadcast",
3518         "rx_multicast",
3519         "tx_aborted",
3520         "tx_underrun",
3521 };
3522 
3523 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3524 {
3525         switch (sset) {
3526         case ETH_SS_STATS:
3527                 return ARRAY_SIZE(rtl8152_gstrings);
3528         default:
3529                 return -EOPNOTSUPP;
3530         }
3531 }
3532 
3533 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3534                                       struct ethtool_stats *stats, u64 *data)
3535 {
3536         struct r8152 *tp = netdev_priv(dev);
3537         struct tally_counter tally;
3538 
3539         if (usb_autopm_get_interface(tp->intf) < 0)
3540                 return;
3541 
3542         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3543 
3544         usb_autopm_put_interface(tp->intf);
3545 
3546         data[0] = le64_to_cpu(tally.tx_packets);
3547         data[1] = le64_to_cpu(tally.rx_packets);
3548         data[2] = le64_to_cpu(tally.tx_errors);
3549         data[3] = le32_to_cpu(tally.rx_errors);
3550         data[4] = le16_to_cpu(tally.rx_missed);
3551         data[5] = le16_to_cpu(tally.align_errors);
3552         data[6] = le32_to_cpu(tally.tx_one_collision);
3553         data[7] = le32_to_cpu(tally.tx_multi_collision);
3554         data[8] = le64_to_cpu(tally.rx_unicast);
3555         data[9] = le64_to_cpu(tally.rx_broadcast);
3556         data[10] = le32_to_cpu(tally.rx_multicast);
3557         data[11] = le16_to_cpu(tally.tx_aborted);
3558         data[12] = le16_to_cpu(tally.tx_underrun);
3559 }
3560 
3561 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3562 {
3563         switch (stringset) {
3564         case ETH_SS_STATS:
3565                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3566                 break;
3567         }
3568 }
3569 
3570 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3571 {
3572         u32 ocp_data, lp, adv, supported = 0;
3573         u16 val;
3574 
3575         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3576         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3577 
3578         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3579         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3580 
3581         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3582         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3583 
3584         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3585         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3586 
3587         eee->eee_enabled = !!ocp_data;
3588         eee->eee_active = !!(supported & adv & lp);
3589         eee->supported = supported;
3590         eee->advertised = adv;
3591         eee->lp_advertised = lp;
3592 
3593         return 0;
3594 }
3595 
3596 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3597 {
3598         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3599 
3600         r8152_eee_en(tp, eee->eee_enabled);
3601 
3602         if (!eee->eee_enabled)
3603                 val = 0;
3604 
3605         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3606 
3607         return 0;
3608 }
3609 
3610 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3611 {
3612         u32 ocp_data, lp, adv, supported = 0;
3613         u16 val;
3614 
3615         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3616         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3617 
3618         val = ocp_reg_read(tp, OCP_EEE_ADV);
3619         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3620 
3621         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3622         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3623 
3624         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3625         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3626 
3627         eee->eee_enabled = !!ocp_data;
3628         eee->eee_active = !!(supported & adv & lp);
3629         eee->supported = supported;
3630         eee->advertised = adv;
3631         eee->lp_advertised = lp;
3632 
3633         return 0;
3634 }
3635 
3636 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3637 {
3638         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3639 
3640         r8153_eee_en(tp, eee->eee_enabled);
3641 
3642         if (!eee->eee_enabled)
3643                 val = 0;
3644 
3645         ocp_reg_write(tp, OCP_EEE_ADV, val);
3646 
3647         return 0;
3648 }
3649 
3650 static int
3651 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3652 {
3653         struct r8152 *tp = netdev_priv(net);
3654         int ret;
3655 
3656         ret = usb_autopm_get_interface(tp->intf);
3657         if (ret < 0)
3658                 goto out;
3659 
3660         mutex_lock(&tp->control);
3661 
3662         ret = tp->rtl_ops.eee_get(tp, edata);
3663 
3664         mutex_unlock(&tp->control);
3665 
3666         usb_autopm_put_interface(tp->intf);
3667 
3668 out:
3669         return ret;
3670 }
3671 
3672 static int
3673 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3674 {
3675         struct r8152 *tp = netdev_priv(net);
3676         int ret;
3677 
3678         ret = usb_autopm_get_interface(tp->intf);
3679         if (ret < 0)
3680                 goto out;
3681 
3682         mutex_lock(&tp->control);
3683 
3684         ret = tp->rtl_ops.eee_set(tp, edata);
3685         if (!ret)
3686                 ret = mii_nway_restart(&tp->mii);
3687 
3688         mutex_unlock(&tp->control);
3689 
3690         usb_autopm_put_interface(tp->intf);
3691 
3692 out:
3693         return ret;
3694 }
3695 
3696 static int rtl8152_nway_reset(struct net_device *dev)
3697 {
3698         struct r8152 *tp = netdev_priv(dev);
3699         int ret;
3700 
3701         ret = usb_autopm_get_interface(tp->intf);
3702         if (ret < 0)
3703                 goto out;
3704 
3705         mutex_lock(&tp->control);
3706 
3707         ret = mii_nway_restart(&tp->mii);
3708 
3709         mutex_unlock(&tp->control);
3710 
3711         usb_autopm_put_interface(tp->intf);
3712 
3713 out:
3714         return ret;
3715 }
3716 
3717 static int rtl8152_get_coalesce(struct net_device *netdev,
3718                                 struct ethtool_coalesce *coalesce)
3719 {
3720         struct r8152 *tp = netdev_priv(netdev);
3721 
3722         switch (tp->version) {
3723         case RTL_VER_01:
3724         case RTL_VER_02:
3725                 return -EOPNOTSUPP;
3726         default:
3727                 break;
3728         }
3729 
3730         coalesce->rx_coalesce_usecs = tp->coalesce;
3731 
3732         return 0;
3733 }
3734 
3735 static int rtl8152_set_coalesce(struct net_device *netdev,
3736                                 struct ethtool_coalesce *coalesce)
3737 {
3738         struct r8152 *tp = netdev_priv(netdev);
3739         int ret;
3740 
3741         switch (tp->version) {
3742         case RTL_VER_01:
3743         case RTL_VER_02:
3744                 return -EOPNOTSUPP;
3745         default:
3746                 break;
3747         }
3748 
3749         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3750                 return -EINVAL;
3751 
3752         ret = usb_autopm_get_interface(tp->intf);
3753         if (ret < 0)
3754                 return ret;
3755 
3756         mutex_lock(&tp->control);
3757 
3758         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3759                 tp->coalesce = coalesce->rx_coalesce_usecs;
3760 
3761                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3762                         r8153_set_rx_early_timeout(tp);
3763         }
3764 
3765         mutex_unlock(&tp->control);
3766 
3767         usb_autopm_put_interface(tp->intf);
3768 
3769         return ret;
3770 }
3771 
3772 static struct ethtool_ops ops = {
3773         .get_drvinfo = rtl8152_get_drvinfo,
3774         .get_settings = rtl8152_get_settings,
3775         .set_settings = rtl8152_set_settings,
3776         .get_link = ethtool_op_get_link,
3777         .nway_reset = rtl8152_nway_reset,
3778         .get_msglevel = rtl8152_get_msglevel,
3779         .set_msglevel = rtl8152_set_msglevel,
3780         .get_wol = rtl8152_get_wol,
3781         .set_wol = rtl8152_set_wol,
3782         .get_strings = rtl8152_get_strings,
3783         .get_sset_count = rtl8152_get_sset_count,
3784         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3785         .get_coalesce = rtl8152_get_coalesce,
3786         .set_coalesce = rtl8152_set_coalesce,
3787         .get_eee = rtl_ethtool_get_eee,
3788         .set_eee = rtl_ethtool_set_eee,
3789 };
3790 
3791 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3792 {
3793         struct r8152 *tp = netdev_priv(netdev);
3794         struct mii_ioctl_data *data = if_mii(rq);
3795         int res;
3796 
3797         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3798                 return -ENODEV;
3799 
3800         res = usb_autopm_get_interface(tp->intf);
3801         if (res < 0)
3802                 goto out;
3803 
3804         switch (cmd) {
3805         case SIOCGMIIPHY:
3806                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3807                 break;
3808 
3809         case SIOCGMIIREG:
3810                 mutex_lock(&tp->control);
3811                 data->val_out = r8152_mdio_read(tp, data->reg_num);
3812                 mutex_unlock(&tp->control);
3813                 break;
3814 
3815         case SIOCSMIIREG:
3816                 if (!capable(CAP_NET_ADMIN)) {
3817                         res = -EPERM;
3818                         break;
3819                 }
3820                 mutex_lock(&tp->control);
3821                 r8152_mdio_write(tp, data->reg_num, data->val_in);
3822                 mutex_unlock(&tp->control);
3823                 break;
3824 
3825         default:
3826                 res = -EOPNOTSUPP;
3827         }
3828 
3829         usb_autopm_put_interface(tp->intf);
3830 
3831 out:
3832         return res;
3833 }
3834 
3835 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3836 {
3837         struct r8152 *tp = netdev_priv(dev);
3838         int ret;
3839 
3840         switch (tp->version) {
3841         case RTL_VER_01:
3842         case RTL_VER_02:
3843                 return eth_change_mtu(dev, new_mtu);
3844         default:
3845                 break;
3846         }
3847 
3848         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3849                 return -EINVAL;
3850 
3851         ret = usb_autopm_get_interface(tp->intf);
3852         if (ret < 0)
3853                 return ret;
3854 
3855         mutex_lock(&tp->control);
3856 
3857         dev->mtu = new_mtu;
3858 
3859         if (netif_running(dev) && netif_carrier_ok(dev))
3860                 r8153_set_rx_early_size(tp);
3861 
3862         mutex_unlock(&tp->control);
3863 
3864         usb_autopm_put_interface(tp->intf);
3865 
3866         return ret;
3867 }
3868 
3869 static const struct net_device_ops rtl8152_netdev_ops = {
3870         .ndo_open               = rtl8152_open,
3871         .ndo_stop               = rtl8152_close,
3872         .ndo_do_ioctl           = rtl8152_ioctl,
3873         .ndo_start_xmit         = rtl8152_start_xmit,
3874         .ndo_tx_timeout         = rtl8152_tx_timeout,
3875         .ndo_set_features       = rtl8152_set_features,
3876         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
3877         .ndo_set_mac_address    = rtl8152_set_mac_address,
3878         .ndo_change_mtu         = rtl8152_change_mtu,
3879         .ndo_validate_addr      = eth_validate_addr,
3880         .ndo_features_check     = rtl8152_features_check,
3881 };
3882 
3883 static void r8152b_get_version(struct r8152 *tp)
3884 {
3885         u32     ocp_data;
3886         u16     version;
3887 
3888         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3889         version = (u16)(ocp_data & VERSION_MASK);
3890 
3891         switch (version) {
3892         case 0x4c00:
3893                 tp->version = RTL_VER_01;
3894                 break;
3895         case 0x4c10:
3896                 tp->version = RTL_VER_02;
3897                 break;
3898         case 0x5c00:
3899                 tp->version = RTL_VER_03;
3900                 tp->mii.supports_gmii = 1;
3901                 break;
3902         case 0x5c10:
3903                 tp->version = RTL_VER_04;
3904                 tp->mii.supports_gmii = 1;
3905                 break;
3906         case 0x5c20:
3907                 tp->version = RTL_VER_05;
3908                 tp->mii.supports_gmii = 1;
3909                 break;
3910         default:
3911                 netif_info(tp, probe, tp->netdev,
3912                            "Unknown version 0x%04x\n", version);
3913                 break;
3914         }
3915 }
3916 
3917 static void rtl8152_unload(struct r8152 *tp)
3918 {
3919         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3920                 return;
3921 
3922         if (tp->version != RTL_VER_01)
3923                 r8152_power_cut_en(tp, true);
3924 }
3925 
3926 static void rtl8153_unload(struct r8152 *tp)
3927 {
3928         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3929                 return;
3930 
3931         r8153_power_cut_en(tp, false);
3932 }
3933 
3934 static int rtl_ops_init(struct r8152 *tp)
3935 {
3936         struct rtl_ops *ops = &tp->rtl_ops;
3937         int ret = 0;
3938 
3939         switch (tp->version) {
3940         case RTL_VER_01:
3941         case RTL_VER_02:
3942                 ops->init               = r8152b_init;
3943                 ops->enable             = rtl8152_enable;
3944                 ops->disable            = rtl8152_disable;
3945                 ops->up                 = rtl8152_up;
3946                 ops->down               = rtl8152_down;
3947                 ops->unload             = rtl8152_unload;
3948                 ops->eee_get            = r8152_get_eee;
3949                 ops->eee_set            = r8152_set_eee;
3950                 break;
3951 
3952         case RTL_VER_03:
3953         case RTL_VER_04:
3954         case RTL_VER_05:
3955                 ops->init               = r8153_init;
3956                 ops->enable             = rtl8153_enable;
3957                 ops->disable            = rtl8153_disable;
3958                 ops->up                 = rtl8153_up;
3959                 ops->down               = rtl8153_down;
3960                 ops->unload             = rtl8153_unload;
3961                 ops->eee_get            = r8153_get_eee;
3962                 ops->eee_set            = r8153_set_eee;
3963                 break;
3964 
3965         default:
3966                 ret = -ENODEV;
3967                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3968                 break;
3969         }
3970 
3971         return ret;
3972 }
3973 
3974 static int rtl8152_probe(struct usb_interface *intf,
3975                          const struct usb_device_id *id)
3976 {
3977         struct usb_device *udev = interface_to_usbdev(intf);
3978         struct r8152 *tp;
3979         struct net_device *netdev;
3980         int ret;
3981 
3982         if (udev->actconfig->desc.bConfigurationValue != 1) {
3983                 usb_driver_set_configuration(udev, 1);
3984                 return -ENODEV;
3985         }
3986 
3987         usb_reset_device(udev);
3988         netdev = alloc_etherdev(sizeof(struct r8152));
3989         if (!netdev) {
3990                 dev_err(&intf->dev, "Out of memory\n");
3991                 return -ENOMEM;
3992         }
3993 
3994         SET_NETDEV_DEV(netdev, &intf->dev);
3995         tp = netdev_priv(netdev);
3996         tp->msg_enable = 0x7FFF;
3997 
3998         tp->udev = udev;
3999         tp->netdev = netdev;
4000         tp->intf = intf;
4001 
4002         r8152b_get_version(tp);
4003         ret = rtl_ops_init(tp);
4004         if (ret)
4005                 goto out;
4006 
4007         mutex_init(&tp->control);
4008         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4009 
4010         netdev->netdev_ops = &rtl8152_netdev_ops;
4011         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4012 
4013         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4014                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4015                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4016                             NETIF_F_HW_VLAN_CTAG_TX;
4017         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4018                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4019                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4020                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4021         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4022                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4023                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4024 
4025         netdev->ethtool_ops = &ops;
4026         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4027 
4028         tp->mii.dev = netdev;
4029         tp->mii.mdio_read = read_mii_word;
4030         tp->mii.mdio_write = write_mii_word;
4031         tp->mii.phy_id_mask = 0x3f;
4032         tp->mii.reg_num_mask = 0x1f;
4033         tp->mii.phy_id = R8152_PHY_ID;
4034 
4035         switch (udev->speed) {
4036         case USB_SPEED_SUPER:
4037                 tp->coalesce = COALESCE_SUPER;
4038                 break;
4039         case USB_SPEED_HIGH:
4040                 tp->coalesce = COALESCE_HIGH;
4041                 break;
4042         default:
4043                 tp->coalesce = COALESCE_SLOW;
4044                 break;
4045         }
4046 
4047         intf->needs_remote_wakeup = 1;
4048 
4049         tp->rtl_ops.init(tp);
4050         set_ethernet_addr(tp);
4051 
4052         usb_set_intfdata(intf, tp);
4053         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4054 
4055         ret = register_netdev(netdev);
4056         if (ret != 0) {
4057                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4058                 goto out1;
4059         }
4060 
4061         tp->saved_wolopts = __rtl_get_wol(tp);
4062         if (tp->saved_wolopts)
4063                 device_set_wakeup_enable(&udev->dev, true);
4064         else
4065                 device_set_wakeup_enable(&udev->dev, false);
4066 
4067         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4068 
4069         return 0;
4070 
4071 out1:
4072         netif_napi_del(&tp->napi);
4073         usb_set_intfdata(intf, NULL);
4074 out:
4075         free_netdev(netdev);
4076         return ret;
4077 }
4078 
4079 static void rtl8152_disconnect(struct usb_interface *intf)
4080 {
4081         struct r8152 *tp = usb_get_intfdata(intf);
4082 
4083         usb_set_intfdata(intf, NULL);
4084         if (tp) {
4085                 struct usb_device *udev = tp->udev;
4086 
4087                 if (udev->state == USB_STATE_NOTATTACHED)
4088                         set_bit(RTL8152_UNPLUG, &tp->flags);
4089 
4090                 netif_napi_del(&tp->napi);
4091                 unregister_netdev(tp->netdev);
4092                 tp->rtl_ops.unload(tp);
4093                 free_netdev(tp->netdev);
4094         }
4095 }
4096 
4097 #define REALTEK_USB_DEVICE(vend, prod)  \
4098         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4099                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4100         .idVendor = (vend), \
4101         .idProduct = (prod), \
4102         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4103 }, \
4104 { \
4105         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4106                        USB_DEVICE_ID_MATCH_DEVICE, \
4107         .idVendor = (vend), \
4108         .idProduct = (prod), \
4109         .bInterfaceClass = USB_CLASS_COMM, \
4110         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4111         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4112 
4113 /* table of devices that work with this driver */
4114 static struct usb_device_id rtl8152_table[] = {
4115         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4116         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4117         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4118         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4119         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4120         {}
4121 };
4122 
4123 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4124 
4125 static struct usb_driver rtl8152_driver = {
4126         .name =         MODULENAME,
4127         .id_table =     rtl8152_table,
4128         .probe =        rtl8152_probe,
4129         .disconnect =   rtl8152_disconnect,
4130         .suspend =      rtl8152_suspend,
4131         .resume =       rtl8152_resume,
4132         .reset_resume = rtl8152_resume,
4133         .supports_autosuspend = 1,
4134         .disable_hub_initiated_lpm = 1,
4135 };
4136 
4137 module_usb_driver(rtl8152_driver);
4138 
4139 MODULE_AUTHOR(DRIVER_AUTHOR);
4140 MODULE_DESCRIPTION(DRIVER_DESC);
4141 MODULE_LICENSE("GPL");
4142 

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