Version:  2.0.40 2.2.26 2.4.37 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19

Linux/drivers/net/usb/r8152.c

  1 /*
  2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
  3  *
  4  * This program is free software; you can redistribute it and/or
  5  * modify it under the terms of the GNU General Public License
  6  * version 2 as published by the Free Software Foundation.
  7  *
  8  */
  9 
 10 #include <linux/signal.h>
 11 #include <linux/slab.h>
 12 #include <linux/module.h>
 13 #include <linux/netdevice.h>
 14 #include <linux/etherdevice.h>
 15 #include <linux/mii.h>
 16 #include <linux/ethtool.h>
 17 #include <linux/usb.h>
 18 #include <linux/crc32.h>
 19 #include <linux/if_vlan.h>
 20 #include <linux/uaccess.h>
 21 #include <linux/list.h>
 22 #include <linux/ip.h>
 23 #include <linux/ipv6.h>
 24 #include <net/ip6_checksum.h>
 25 #include <uapi/linux/mdio.h>
 26 #include <linux/mdio.h>
 27 #include <linux/usb/cdc.h>
 28 
 29 /* Version Information */
 30 #define DRIVER_VERSION "v1.07.0 (2014/10/09)"
 31 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
 32 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
 33 #define MODULENAME "r8152"
 34 
 35 #define R8152_PHY_ID            32
 36 
 37 #define PLA_IDR                 0xc000
 38 #define PLA_RCR                 0xc010
 39 #define PLA_RMS                 0xc016
 40 #define PLA_RXFIFO_CTRL0        0xc0a0
 41 #define PLA_RXFIFO_CTRL1        0xc0a4
 42 #define PLA_RXFIFO_CTRL2        0xc0a8
 43 #define PLA_FMC                 0xc0b4
 44 #define PLA_CFG_WOL             0xc0b6
 45 #define PLA_TEREDO_CFG          0xc0bc
 46 #define PLA_MAR                 0xcd00
 47 #define PLA_BACKUP              0xd000
 48 #define PAL_BDC_CR              0xd1a0
 49 #define PLA_TEREDO_TIMER        0xd2cc
 50 #define PLA_REALWOW_TIMER       0xd2e8
 51 #define PLA_LEDSEL              0xdd90
 52 #define PLA_LED_FEATURE         0xdd92
 53 #define PLA_PHYAR               0xde00
 54 #define PLA_BOOT_CTRL           0xe004
 55 #define PLA_GPHY_INTR_IMR       0xe022
 56 #define PLA_EEE_CR              0xe040
 57 #define PLA_EEEP_CR             0xe080
 58 #define PLA_MAC_PWR_CTRL        0xe0c0
 59 #define PLA_MAC_PWR_CTRL2       0xe0ca
 60 #define PLA_MAC_PWR_CTRL3       0xe0cc
 61 #define PLA_MAC_PWR_CTRL4       0xe0ce
 62 #define PLA_WDT6_CTRL           0xe428
 63 #define PLA_TCR0                0xe610
 64 #define PLA_TCR1                0xe612
 65 #define PLA_MTPS                0xe615
 66 #define PLA_TXFIFO_CTRL         0xe618
 67 #define PLA_RSTTALLY            0xe800
 68 #define PLA_CR                  0xe813
 69 #define PLA_CRWECR              0xe81c
 70 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
 71 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
 72 #define PLA_CONFIG5             0xe822
 73 #define PLA_PHY_PWR             0xe84c
 74 #define PLA_OOB_CTRL            0xe84f
 75 #define PLA_CPCR                0xe854
 76 #define PLA_MISC_0              0xe858
 77 #define PLA_MISC_1              0xe85a
 78 #define PLA_OCP_GPHY_BASE       0xe86c
 79 #define PLA_TALLYCNT            0xe890
 80 #define PLA_SFF_STS_7           0xe8de
 81 #define PLA_PHYSTATUS           0xe908
 82 #define PLA_BP_BA               0xfc26
 83 #define PLA_BP_0                0xfc28
 84 #define PLA_BP_1                0xfc2a
 85 #define PLA_BP_2                0xfc2c
 86 #define PLA_BP_3                0xfc2e
 87 #define PLA_BP_4                0xfc30
 88 #define PLA_BP_5                0xfc32
 89 #define PLA_BP_6                0xfc34
 90 #define PLA_BP_7                0xfc36
 91 #define PLA_BP_EN               0xfc38
 92 
 93 #define USB_U2P3_CTRL           0xb460
 94 #define USB_DEV_STAT            0xb808
 95 #define USB_USB_CTRL            0xd406
 96 #define USB_PHY_CTRL            0xd408
 97 #define USB_TX_AGG              0xd40a
 98 #define USB_RX_BUF_TH           0xd40c
 99 #define USB_USB_TIMER           0xd428
100 #define USB_RX_EARLY_AGG        0xd42c
101 #define USB_PM_CTRL_STATUS      0xd432
102 #define USB_TX_DMA              0xd434
103 #define USB_TOLERANCE           0xd490
104 #define USB_LPM_CTRL            0xd41a
105 #define USB_UPS_CTRL            0xd800
106 #define USB_MISC_0              0xd81a
107 #define USB_POWER_CUT           0xd80a
108 #define USB_AFE_CTRL2           0xd824
109 #define USB_WDT11_CTRL          0xe43c
110 #define USB_BP_BA               0xfc26
111 #define USB_BP_0                0xfc28
112 #define USB_BP_1                0xfc2a
113 #define USB_BP_2                0xfc2c
114 #define USB_BP_3                0xfc2e
115 #define USB_BP_4                0xfc30
116 #define USB_BP_5                0xfc32
117 #define USB_BP_6                0xfc34
118 #define USB_BP_7                0xfc36
119 #define USB_BP_EN               0xfc38
120 
121 /* OCP Registers */
122 #define OCP_ALDPS_CONFIG        0x2010
123 #define OCP_EEE_CONFIG1         0x2080
124 #define OCP_EEE_CONFIG2         0x2092
125 #define OCP_EEE_CONFIG3         0x2094
126 #define OCP_BASE_MII            0xa400
127 #define OCP_EEE_AR              0xa41a
128 #define OCP_EEE_DATA            0xa41c
129 #define OCP_PHY_STATUS          0xa420
130 #define OCP_POWER_CFG           0xa430
131 #define OCP_EEE_CFG             0xa432
132 #define OCP_SRAM_ADDR           0xa436
133 #define OCP_SRAM_DATA           0xa438
134 #define OCP_DOWN_SPEED          0xa442
135 #define OCP_EEE_ABLE            0xa5c4
136 #define OCP_EEE_ADV             0xa5d0
137 #define OCP_EEE_LPABLE          0xa5d2
138 #define OCP_ADC_CFG             0xbc06
139 
140 /* SRAM Register */
141 #define SRAM_LPF_CFG            0x8012
142 #define SRAM_10M_AMP1           0x8080
143 #define SRAM_10M_AMP2           0x8082
144 #define SRAM_IMPEDANCE          0x8084
145 
146 /* PLA_RCR */
147 #define RCR_AAP                 0x00000001
148 #define RCR_APM                 0x00000002
149 #define RCR_AM                  0x00000004
150 #define RCR_AB                  0x00000008
151 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
152 
153 /* PLA_RXFIFO_CTRL0 */
154 #define RXFIFO_THR1_NORMAL      0x00080002
155 #define RXFIFO_THR1_OOB         0x01800003
156 
157 /* PLA_RXFIFO_CTRL1 */
158 #define RXFIFO_THR2_FULL        0x00000060
159 #define RXFIFO_THR2_HIGH        0x00000038
160 #define RXFIFO_THR2_OOB         0x0000004a
161 #define RXFIFO_THR2_NORMAL      0x00a0
162 
163 /* PLA_RXFIFO_CTRL2 */
164 #define RXFIFO_THR3_FULL        0x00000078
165 #define RXFIFO_THR3_HIGH        0x00000048
166 #define RXFIFO_THR3_OOB         0x0000005a
167 #define RXFIFO_THR3_NORMAL      0x0110
168 
169 /* PLA_TXFIFO_CTRL */
170 #define TXFIFO_THR_NORMAL       0x00400008
171 #define TXFIFO_THR_NORMAL2      0x01000008
172 
173 /* PLA_FMC */
174 #define FMC_FCR_MCU_EN          0x0001
175 
176 /* PLA_EEEP_CR */
177 #define EEEP_CR_EEEP_TX         0x0002
178 
179 /* PLA_WDT6_CTRL */
180 #define WDT6_SET_MODE           0x0010
181 
182 /* PLA_TCR0 */
183 #define TCR0_TX_EMPTY           0x0800
184 #define TCR0_AUTO_FIFO          0x0080
185 
186 /* PLA_TCR1 */
187 #define VERSION_MASK            0x7cf0
188 
189 /* PLA_MTPS */
190 #define MTPS_JUMBO              (12 * 1024 / 64)
191 #define MTPS_DEFAULT            (6 * 1024 / 64)
192 
193 /* PLA_RSTTALLY */
194 #define TALLY_RESET             0x0001
195 
196 /* PLA_CR */
197 #define CR_RST                  0x10
198 #define CR_RE                   0x08
199 #define CR_TE                   0x04
200 
201 /* PLA_CRWECR */
202 #define CRWECR_NORAML           0x00
203 #define CRWECR_CONFIG           0xc0
204 
205 /* PLA_OOB_CTRL */
206 #define NOW_IS_OOB              0x80
207 #define TXFIFO_EMPTY            0x20
208 #define RXFIFO_EMPTY            0x10
209 #define LINK_LIST_READY         0x02
210 #define DIS_MCU_CLROOB          0x01
211 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
212 
213 /* PLA_MISC_1 */
214 #define RXDY_GATED_EN           0x0008
215 
216 /* PLA_SFF_STS_7 */
217 #define RE_INIT_LL              0x8000
218 #define MCU_BORW_EN             0x4000
219 
220 /* PLA_CPCR */
221 #define CPCR_RX_VLAN            0x0040
222 
223 /* PLA_CFG_WOL */
224 #define MAGIC_EN                0x0001
225 
226 /* PLA_TEREDO_CFG */
227 #define TEREDO_SEL              0x8000
228 #define TEREDO_WAKE_MASK        0x7f00
229 #define TEREDO_RS_EVENT_MASK    0x00fe
230 #define OOB_TEREDO_EN           0x0001
231 
232 /* PAL_BDC_CR */
233 #define ALDPS_PROXY_MODE        0x0001
234 
235 /* PLA_CONFIG34 */
236 #define LINK_ON_WAKE_EN         0x0010
237 #define LINK_OFF_WAKE_EN        0x0008
238 
239 /* PLA_CONFIG5 */
240 #define BWF_EN                  0x0040
241 #define MWF_EN                  0x0020
242 #define UWF_EN                  0x0010
243 #define LAN_WAKE_EN             0x0002
244 
245 /* PLA_LED_FEATURE */
246 #define LED_MODE_MASK           0x0700
247 
248 /* PLA_PHY_PWR */
249 #define TX_10M_IDLE_EN          0x0080
250 #define PFM_PWM_SWITCH          0x0040
251 
252 /* PLA_MAC_PWR_CTRL */
253 #define D3_CLK_GATED_EN         0x00004000
254 #define MCU_CLK_RATIO           0x07010f07
255 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
256 #define ALDPS_SPDWN_RATIO       0x0f87
257 
258 /* PLA_MAC_PWR_CTRL2 */
259 #define EEE_SPDWN_RATIO         0x8007
260 
261 /* PLA_MAC_PWR_CTRL3 */
262 #define PKT_AVAIL_SPDWN_EN      0x0100
263 #define SUSPEND_SPDWN_EN        0x0004
264 #define U1U2_SPDWN_EN           0x0002
265 #define L1_SPDWN_EN             0x0001
266 
267 /* PLA_MAC_PWR_CTRL4 */
268 #define PWRSAVE_SPDWN_EN        0x1000
269 #define RXDV_SPDWN_EN           0x0800
270 #define TX10MIDLE_EN            0x0100
271 #define TP100_SPDWN_EN          0x0020
272 #define TP500_SPDWN_EN          0x0010
273 #define TP1000_SPDWN_EN         0x0008
274 #define EEE_SPDWN_EN            0x0001
275 
276 /* PLA_GPHY_INTR_IMR */
277 #define GPHY_STS_MSK            0x0001
278 #define SPEED_DOWN_MSK          0x0002
279 #define SPDWN_RXDV_MSK          0x0004
280 #define SPDWN_LINKCHG_MSK       0x0008
281 
282 /* PLA_PHYAR */
283 #define PHYAR_FLAG              0x80000000
284 
285 /* PLA_EEE_CR */
286 #define EEE_RX_EN               0x0001
287 #define EEE_TX_EN               0x0002
288 
289 /* PLA_BOOT_CTRL */
290 #define AUTOLOAD_DONE           0x0002
291 
292 /* USB_DEV_STAT */
293 #define STAT_SPEED_MASK         0x0006
294 #define STAT_SPEED_HIGH         0x0000
295 #define STAT_SPEED_FULL         0x0002
296 
297 /* USB_TX_AGG */
298 #define TX_AGG_MAX_THRESHOLD    0x03
299 
300 /* USB_RX_BUF_TH */
301 #define RX_THR_SUPPER           0x0c350180
302 #define RX_THR_HIGH             0x7a120180
303 #define RX_THR_SLOW             0xffff0180
304 
305 /* USB_TX_DMA */
306 #define TEST_MODE_DISABLE       0x00000001
307 #define TX_SIZE_ADJUST1         0x00000100
308 
309 /* USB_UPS_CTRL */
310 #define POWER_CUT               0x0100
311 
312 /* USB_PM_CTRL_STATUS */
313 #define RESUME_INDICATE         0x0001
314 
315 /* USB_USB_CTRL */
316 #define RX_AGG_DISABLE          0x0010
317 
318 /* USB_U2P3_CTRL */
319 #define U2P3_ENABLE             0x0001
320 
321 /* USB_POWER_CUT */
322 #define PWR_EN                  0x0001
323 #define PHASE2_EN               0x0008
324 
325 /* USB_MISC_0 */
326 #define PCUT_STATUS             0x0001
327 
328 /* USB_RX_EARLY_AGG */
329 #define EARLY_AGG_SUPPER        0x0e832981
330 #define EARLY_AGG_HIGH          0x0e837a12
331 #define EARLY_AGG_SLOW          0x0e83ffff
332 
333 /* USB_WDT11_CTRL */
334 #define TIMER11_EN              0x0001
335 
336 /* USB_LPM_CTRL */
337 #define LPM_TIMER_MASK          0x0c
338 #define LPM_TIMER_500MS         0x04    /* 500 ms */
339 #define LPM_TIMER_500US         0x0c    /* 500 us */
340 
341 /* USB_AFE_CTRL2 */
342 #define SEN_VAL_MASK            0xf800
343 #define SEN_VAL_NORMAL          0xa000
344 #define SEL_RXIDLE              0x0100
345 
346 /* OCP_ALDPS_CONFIG */
347 #define ENPWRSAVE               0x8000
348 #define ENPDNPS                 0x0200
349 #define LINKENA                 0x0100
350 #define DIS_SDSAVE              0x0010
351 
352 /* OCP_PHY_STATUS */
353 #define PHY_STAT_MASK           0x0007
354 #define PHY_STAT_LAN_ON         3
355 #define PHY_STAT_PWRDN          5
356 
357 /* OCP_POWER_CFG */
358 #define EEE_CLKDIV_EN           0x8000
359 #define EN_ALDPS                0x0004
360 #define EN_10M_PLLOFF           0x0001
361 
362 /* OCP_EEE_CONFIG1 */
363 #define RG_TXLPI_MSK_HFDUP      0x8000
364 #define RG_MATCLR_EN            0x4000
365 #define EEE_10_CAP              0x2000
366 #define EEE_NWAY_EN             0x1000
367 #define TX_QUIET_EN             0x0200
368 #define RX_QUIET_EN             0x0100
369 #define sd_rise_time_mask       0x0070
370 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
371 #define RG_RXLPI_MSK_HFDUP      0x0008
372 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
373 
374 /* OCP_EEE_CONFIG2 */
375 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
376 #define RG_DACQUIET_EN          0x0400
377 #define RG_LDVQUIET_EN          0x0200
378 #define RG_CKRSEL               0x0020
379 #define RG_EEEPRG_EN            0x0010
380 
381 /* OCP_EEE_CONFIG3 */
382 #define fast_snr_mask           0xff80
383 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
384 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
385 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
386 
387 /* OCP_EEE_AR */
388 /* bit[15:14] function */
389 #define FUN_ADDR                0x0000
390 #define FUN_DATA                0x4000
391 /* bit[4:0] device addr */
392 
393 /* OCP_EEE_CFG */
394 #define CTAP_SHORT_EN           0x0040
395 #define EEE10_EN                0x0010
396 
397 /* OCP_DOWN_SPEED */
398 #define EN_10M_BGOFF            0x0080
399 
400 /* OCP_ADC_CFG */
401 #define CKADSEL_L               0x0100
402 #define ADC_EN                  0x0080
403 #define EN_EMI_L                0x0040
404 
405 /* SRAM_LPF_CFG */
406 #define LPF_AUTO_TUNE           0x8000
407 
408 /* SRAM_10M_AMP1 */
409 #define GDAC_IB_UPALL           0x0008
410 
411 /* SRAM_10M_AMP2 */
412 #define AMP_DN                  0x0200
413 
414 /* SRAM_IMPEDANCE */
415 #define RX_DRIVING_MASK         0x6000
416 
417 enum rtl_register_content {
418         _1000bps        = 0x10,
419         _100bps         = 0x08,
420         _10bps          = 0x04,
421         LINK_STATUS     = 0x02,
422         FULL_DUP        = 0x01,
423 };
424 
425 #define RTL8152_MAX_TX          4
426 #define RTL8152_MAX_RX          10
427 #define INTBUFSIZE              2
428 #define CRC_SIZE                4
429 #define TX_ALIGN                4
430 #define RX_ALIGN                8
431 
432 #define INTR_LINK               0x0004
433 
434 #define RTL8152_REQT_READ       0xc0
435 #define RTL8152_REQT_WRITE      0x40
436 #define RTL8152_REQ_GET_REGS    0x05
437 #define RTL8152_REQ_SET_REGS    0x05
438 
439 #define BYTE_EN_DWORD           0xff
440 #define BYTE_EN_WORD            0x33
441 #define BYTE_EN_BYTE            0x11
442 #define BYTE_EN_SIX_BYTES       0x3f
443 #define BYTE_EN_START_MASK      0x0f
444 #define BYTE_EN_END_MASK        0xf0
445 
446 #define RTL8153_MAX_PACKET      9216 /* 9K */
447 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
448 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
449 #define RTL8153_RMS             RTL8153_MAX_PACKET
450 #define RTL8152_TX_TIMEOUT      (5 * HZ)
451 
452 /* rtl8152 flags */
453 enum rtl8152_flags {
454         RTL8152_UNPLUG = 0,
455         RTL8152_SET_RX_MODE,
456         WORK_ENABLE,
457         RTL8152_LINK_CHG,
458         SELECTIVE_SUSPEND,
459         PHY_RESET,
460         SCHEDULE_TASKLET,
461 };
462 
463 /* Define these values to match your device */
464 #define VENDOR_ID_REALTEK               0x0bda
465 #define VENDOR_ID_SAMSUNG               0x04e8
466 
467 #define MCU_TYPE_PLA                    0x0100
468 #define MCU_TYPE_USB                    0x0000
469 
470 struct tally_counter {
471         __le64  tx_packets;
472         __le64  rx_packets;
473         __le64  tx_errors;
474         __le32  rx_errors;
475         __le16  rx_missed;
476         __le16  align_errors;
477         __le32  tx_one_collision;
478         __le32  tx_multi_collision;
479         __le64  rx_unicast;
480         __le64  rx_broadcast;
481         __le32  rx_multicast;
482         __le16  tx_aborted;
483         __le16  tx_underrun;
484 };
485 
486 struct rx_desc {
487         __le32 opts1;
488 #define RX_LEN_MASK                     0x7fff
489 
490         __le32 opts2;
491 #define RD_UDP_CS                       (1 << 23)
492 #define RD_TCP_CS                       (1 << 22)
493 #define RD_IPV6_CS                      (1 << 20)
494 #define RD_IPV4_CS                      (1 << 19)
495 
496         __le32 opts3;
497 #define IPF                             (1 << 23) /* IP checksum fail */
498 #define UDPF                            (1 << 22) /* UDP checksum fail */
499 #define TCPF                            (1 << 21) /* TCP checksum fail */
500 #define RX_VLAN_TAG                     (1 << 16)
501 
502         __le32 opts4;
503         __le32 opts5;
504         __le32 opts6;
505 };
506 
507 struct tx_desc {
508         __le32 opts1;
509 #define TX_FS                   (1 << 31) /* First segment of a packet */
510 #define TX_LS                   (1 << 30) /* Final segment of a packet */
511 #define GTSENDV4                (1 << 28)
512 #define GTSENDV6                (1 << 27)
513 #define GTTCPHO_SHIFT           18
514 #define GTTCPHO_MAX             0x7fU
515 #define TX_LEN_MAX              0x3ffffU
516 
517         __le32 opts2;
518 #define UDP_CS                  (1 << 31) /* Calculate UDP/IP checksum */
519 #define TCP_CS                  (1 << 30) /* Calculate TCP/IP checksum */
520 #define IPV4_CS                 (1 << 29) /* Calculate IPv4 checksum */
521 #define IPV6_CS                 (1 << 28) /* Calculate IPv6 checksum */
522 #define MSS_SHIFT               17
523 #define MSS_MAX                 0x7ffU
524 #define TCPHO_SHIFT             17
525 #define TCPHO_MAX               0x7ffU
526 #define TX_VLAN_TAG                     (1 << 16)
527 };
528 
529 struct r8152;
530 
531 struct rx_agg {
532         struct list_head list;
533         struct urb *urb;
534         struct r8152 *context;
535         void *buffer;
536         void *head;
537 };
538 
539 struct tx_agg {
540         struct list_head list;
541         struct urb *urb;
542         struct r8152 *context;
543         void *buffer;
544         void *head;
545         u32 skb_num;
546         u32 skb_len;
547 };
548 
549 struct r8152 {
550         unsigned long flags;
551         struct usb_device *udev;
552         struct tasklet_struct tl;
553         struct usb_interface *intf;
554         struct net_device *netdev;
555         struct urb *intr_urb;
556         struct tx_agg tx_info[RTL8152_MAX_TX];
557         struct rx_agg rx_info[RTL8152_MAX_RX];
558         struct list_head rx_done, tx_free;
559         struct sk_buff_head tx_queue;
560         spinlock_t rx_lock, tx_lock;
561         struct delayed_work schedule;
562         struct mii_if_info mii;
563         struct mutex control;   /* use for hw setting */
564 
565         struct rtl_ops {
566                 void (*init)(struct r8152 *);
567                 int (*enable)(struct r8152 *);
568                 void (*disable)(struct r8152 *);
569                 void (*up)(struct r8152 *);
570                 void (*down)(struct r8152 *);
571                 void (*unload)(struct r8152 *);
572                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
573                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
574         } rtl_ops;
575 
576         int intr_interval;
577         u32 saved_wolopts;
578         u32 msg_enable;
579         u32 tx_qlen;
580         u16 ocp_base;
581         u8 *intr_buff;
582         u8 version;
583         u8 speed;
584 };
585 
586 enum rtl_version {
587         RTL_VER_UNKNOWN = 0,
588         RTL_VER_01,
589         RTL_VER_02,
590         RTL_VER_03,
591         RTL_VER_04,
592         RTL_VER_05,
593         RTL_VER_MAX
594 };
595 
596 enum tx_csum_stat {
597         TX_CSUM_SUCCESS = 0,
598         TX_CSUM_TSO,
599         TX_CSUM_NONE
600 };
601 
602 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
603  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
604  */
605 static const int multicast_filter_limit = 32;
606 static unsigned int agg_buf_sz = 16384;
607 
608 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
609                                  VLAN_ETH_HLEN - VLAN_HLEN)
610 
611 static
612 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
613 {
614         int ret;
615         void *tmp;
616 
617         tmp = kmalloc(size, GFP_KERNEL);
618         if (!tmp)
619                 return -ENOMEM;
620 
621         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
622                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
623                               value, index, tmp, size, 500);
624 
625         memcpy(data, tmp, size);
626         kfree(tmp);
627 
628         return ret;
629 }
630 
631 static
632 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
633 {
634         int ret;
635         void *tmp;
636 
637         tmp = kmemdup(data, size, GFP_KERNEL);
638         if (!tmp)
639                 return -ENOMEM;
640 
641         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
642                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
643                               value, index, tmp, size, 500);
644 
645         kfree(tmp);
646 
647         return ret;
648 }
649 
650 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
651                             void *data, u16 type)
652 {
653         u16 limit = 64;
654         int ret = 0;
655 
656         if (test_bit(RTL8152_UNPLUG, &tp->flags))
657                 return -ENODEV;
658 
659         /* both size and indix must be 4 bytes align */
660         if ((size & 3) || !size || (index & 3) || !data)
661                 return -EPERM;
662 
663         if ((u32)index + (u32)size > 0xffff)
664                 return -EPERM;
665 
666         while (size) {
667                 if (size > limit) {
668                         ret = get_registers(tp, index, type, limit, data);
669                         if (ret < 0)
670                                 break;
671 
672                         index += limit;
673                         data += limit;
674                         size -= limit;
675                 } else {
676                         ret = get_registers(tp, index, type, size, data);
677                         if (ret < 0)
678                                 break;
679 
680                         index += size;
681                         data += size;
682                         size = 0;
683                         break;
684                 }
685         }
686 
687         if (ret == -ENODEV)
688                 set_bit(RTL8152_UNPLUG, &tp->flags);
689 
690         return ret;
691 }
692 
693 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
694                              u16 size, void *data, u16 type)
695 {
696         int ret;
697         u16 byteen_start, byteen_end, byen;
698         u16 limit = 512;
699 
700         if (test_bit(RTL8152_UNPLUG, &tp->flags))
701                 return -ENODEV;
702 
703         /* both size and indix must be 4 bytes align */
704         if ((size & 3) || !size || (index & 3) || !data)
705                 return -EPERM;
706 
707         if ((u32)index + (u32)size > 0xffff)
708                 return -EPERM;
709 
710         byteen_start = byteen & BYTE_EN_START_MASK;
711         byteen_end = byteen & BYTE_EN_END_MASK;
712 
713         byen = byteen_start | (byteen_start << 4);
714         ret = set_registers(tp, index, type | byen, 4, data);
715         if (ret < 0)
716                 goto error1;
717 
718         index += 4;
719         data += 4;
720         size -= 4;
721 
722         if (size) {
723                 size -= 4;
724 
725                 while (size) {
726                         if (size > limit) {
727                                 ret = set_registers(tp, index,
728                                                     type | BYTE_EN_DWORD,
729                                                     limit, data);
730                                 if (ret < 0)
731                                         goto error1;
732 
733                                 index += limit;
734                                 data += limit;
735                                 size -= limit;
736                         } else {
737                                 ret = set_registers(tp, index,
738                                                     type | BYTE_EN_DWORD,
739                                                     size, data);
740                                 if (ret < 0)
741                                         goto error1;
742 
743                                 index += size;
744                                 data += size;
745                                 size = 0;
746                                 break;
747                         }
748                 }
749 
750                 byen = byteen_end | (byteen_end >> 4);
751                 ret = set_registers(tp, index, type | byen, 4, data);
752                 if (ret < 0)
753                         goto error1;
754         }
755 
756 error1:
757         if (ret == -ENODEV)
758                 set_bit(RTL8152_UNPLUG, &tp->flags);
759 
760         return ret;
761 }
762 
763 static inline
764 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
765 {
766         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
767 }
768 
769 static inline
770 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
771 {
772         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
773 }
774 
775 static inline
776 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
777 {
778         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
779 }
780 
781 static inline
782 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
783 {
784         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
785 }
786 
787 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
788 {
789         __le32 data;
790 
791         generic_ocp_read(tp, index, sizeof(data), &data, type);
792 
793         return __le32_to_cpu(data);
794 }
795 
796 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
797 {
798         __le32 tmp = __cpu_to_le32(data);
799 
800         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
801 }
802 
803 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
804 {
805         u32 data;
806         __le32 tmp;
807         u8 shift = index & 2;
808 
809         index &= ~3;
810 
811         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
812 
813         data = __le32_to_cpu(tmp);
814         data >>= (shift * 8);
815         data &= 0xffff;
816 
817         return (u16)data;
818 }
819 
820 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
821 {
822         u32 mask = 0xffff;
823         __le32 tmp;
824         u16 byen = BYTE_EN_WORD;
825         u8 shift = index & 2;
826 
827         data &= mask;
828 
829         if (index & 2) {
830                 byen <<= shift;
831                 mask <<= (shift * 8);
832                 data <<= (shift * 8);
833                 index &= ~3;
834         }
835 
836         tmp = __cpu_to_le32(data);
837 
838         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
839 }
840 
841 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
842 {
843         u32 data;
844         __le32 tmp;
845         u8 shift = index & 3;
846 
847         index &= ~3;
848 
849         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
850 
851         data = __le32_to_cpu(tmp);
852         data >>= (shift * 8);
853         data &= 0xff;
854 
855         return (u8)data;
856 }
857 
858 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
859 {
860         u32 mask = 0xff;
861         __le32 tmp;
862         u16 byen = BYTE_EN_BYTE;
863         u8 shift = index & 3;
864 
865         data &= mask;
866 
867         if (index & 3) {
868                 byen <<= shift;
869                 mask <<= (shift * 8);
870                 data <<= (shift * 8);
871                 index &= ~3;
872         }
873 
874         tmp = __cpu_to_le32(data);
875 
876         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
877 }
878 
879 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
880 {
881         u16 ocp_base, ocp_index;
882 
883         ocp_base = addr & 0xf000;
884         if (ocp_base != tp->ocp_base) {
885                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
886                 tp->ocp_base = ocp_base;
887         }
888 
889         ocp_index = (addr & 0x0fff) | 0xb000;
890         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
891 }
892 
893 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
894 {
895         u16 ocp_base, ocp_index;
896 
897         ocp_base = addr & 0xf000;
898         if (ocp_base != tp->ocp_base) {
899                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
900                 tp->ocp_base = ocp_base;
901         }
902 
903         ocp_index = (addr & 0x0fff) | 0xb000;
904         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
905 }
906 
907 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
908 {
909         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
910 }
911 
912 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
913 {
914         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
915 }
916 
917 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
918 {
919         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
920         ocp_reg_write(tp, OCP_SRAM_DATA, data);
921 }
922 
923 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
924 {
925         struct r8152 *tp = netdev_priv(netdev);
926         int ret;
927 
928         if (test_bit(RTL8152_UNPLUG, &tp->flags))
929                 return -ENODEV;
930 
931         if (phy_id != R8152_PHY_ID)
932                 return -EINVAL;
933 
934         ret = r8152_mdio_read(tp, reg);
935 
936         return ret;
937 }
938 
939 static
940 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
941 {
942         struct r8152 *tp = netdev_priv(netdev);
943 
944         if (test_bit(RTL8152_UNPLUG, &tp->flags))
945                 return;
946 
947         if (phy_id != R8152_PHY_ID)
948                 return;
949 
950         r8152_mdio_write(tp, reg, val);
951 }
952 
953 static int
954 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
955 
956 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
957 {
958         struct r8152 *tp = netdev_priv(netdev);
959         struct sockaddr *addr = p;
960         int ret = -EADDRNOTAVAIL;
961 
962         if (!is_valid_ether_addr(addr->sa_data))
963                 goto out1;
964 
965         ret = usb_autopm_get_interface(tp->intf);
966         if (ret < 0)
967                 goto out1;
968 
969         mutex_lock(&tp->control);
970 
971         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
972 
973         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
974         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
975         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
976 
977         mutex_unlock(&tp->control);
978 
979         usb_autopm_put_interface(tp->intf);
980 out1:
981         return ret;
982 }
983 
984 static int set_ethernet_addr(struct r8152 *tp)
985 {
986         struct net_device *dev = tp->netdev;
987         struct sockaddr sa;
988         int ret;
989 
990         if (tp->version == RTL_VER_01)
991                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
992         else
993                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
994 
995         if (ret < 0) {
996                 netif_err(tp, probe, dev, "Get ether addr fail\n");
997         } else if (!is_valid_ether_addr(sa.sa_data)) {
998                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
999                           sa.sa_data);
1000                 eth_hw_addr_random(dev);
1001                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1002                 ret = rtl8152_set_mac_address(dev, &sa);
1003                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1004                            sa.sa_data);
1005         } else {
1006                 if (tp->version == RTL_VER_01)
1007                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1008                 else
1009                         ret = rtl8152_set_mac_address(dev, &sa);
1010         }
1011 
1012         return ret;
1013 }
1014 
1015 static void read_bulk_callback(struct urb *urb)
1016 {
1017         struct net_device *netdev;
1018         int status = urb->status;
1019         struct rx_agg *agg;
1020         struct r8152 *tp;
1021 
1022         agg = urb->context;
1023         if (!agg)
1024                 return;
1025 
1026         tp = agg->context;
1027         if (!tp)
1028                 return;
1029 
1030         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1031                 return;
1032 
1033         if (!test_bit(WORK_ENABLE, &tp->flags))
1034                 return;
1035 
1036         netdev = tp->netdev;
1037 
1038         /* When link down, the driver would cancel all bulks. */
1039         /* This avoid the re-submitting bulk */
1040         if (!netif_carrier_ok(netdev))
1041                 return;
1042 
1043         usb_mark_last_busy(tp->udev);
1044 
1045         switch (status) {
1046         case 0:
1047                 if (urb->actual_length < ETH_ZLEN)
1048                         break;
1049 
1050                 spin_lock(&tp->rx_lock);
1051                 list_add_tail(&agg->list, &tp->rx_done);
1052                 spin_unlock(&tp->rx_lock);
1053                 tasklet_schedule(&tp->tl);
1054                 return;
1055         case -ESHUTDOWN:
1056                 set_bit(RTL8152_UNPLUG, &tp->flags);
1057                 netif_device_detach(tp->netdev);
1058                 return;
1059         case -ENOENT:
1060                 return; /* the urb is in unlink state */
1061         case -ETIME:
1062                 if (net_ratelimit())
1063                         netdev_warn(netdev, "maybe reset is needed?\n");
1064                 break;
1065         default:
1066                 if (net_ratelimit())
1067                         netdev_warn(netdev, "Rx status %d\n", status);
1068                 break;
1069         }
1070 
1071         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1072 }
1073 
1074 static void write_bulk_callback(struct urb *urb)
1075 {
1076         struct net_device_stats *stats;
1077         struct net_device *netdev;
1078         struct tx_agg *agg;
1079         struct r8152 *tp;
1080         int status = urb->status;
1081 
1082         agg = urb->context;
1083         if (!agg)
1084                 return;
1085 
1086         tp = agg->context;
1087         if (!tp)
1088                 return;
1089 
1090         netdev = tp->netdev;
1091         stats = &netdev->stats;
1092         if (status) {
1093                 if (net_ratelimit())
1094                         netdev_warn(netdev, "Tx status %d\n", status);
1095                 stats->tx_errors += agg->skb_num;
1096         } else {
1097                 stats->tx_packets += agg->skb_num;
1098                 stats->tx_bytes += agg->skb_len;
1099         }
1100 
1101         spin_lock(&tp->tx_lock);
1102         list_add_tail(&agg->list, &tp->tx_free);
1103         spin_unlock(&tp->tx_lock);
1104 
1105         usb_autopm_put_interface_async(tp->intf);
1106 
1107         if (!netif_carrier_ok(netdev))
1108                 return;
1109 
1110         if (!test_bit(WORK_ENABLE, &tp->flags))
1111                 return;
1112 
1113         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1114                 return;
1115 
1116         if (!skb_queue_empty(&tp->tx_queue))
1117                 tasklet_schedule(&tp->tl);
1118 }
1119 
1120 static void intr_callback(struct urb *urb)
1121 {
1122         struct r8152 *tp;
1123         __le16 *d;
1124         int status = urb->status;
1125         int res;
1126 
1127         tp = urb->context;
1128         if (!tp)
1129                 return;
1130 
1131         if (!test_bit(WORK_ENABLE, &tp->flags))
1132                 return;
1133 
1134         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1135                 return;
1136 
1137         switch (status) {
1138         case 0:                 /* success */
1139                 break;
1140         case -ECONNRESET:       /* unlink */
1141         case -ESHUTDOWN:
1142                 netif_device_detach(tp->netdev);
1143         case -ENOENT:
1144         case -EPROTO:
1145                 netif_info(tp, intr, tp->netdev,
1146                            "Stop submitting intr, status %d\n", status);
1147                 return;
1148         case -EOVERFLOW:
1149                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1150                 goto resubmit;
1151         /* -EPIPE:  should clear the halt */
1152         default:
1153                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1154                 goto resubmit;
1155         }
1156 
1157         d = urb->transfer_buffer;
1158         if (INTR_LINK & __le16_to_cpu(d[0])) {
1159                 if (!(tp->speed & LINK_STATUS)) {
1160                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1161                         schedule_delayed_work(&tp->schedule, 0);
1162                 }
1163         } else {
1164                 if (tp->speed & LINK_STATUS) {
1165                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1166                         schedule_delayed_work(&tp->schedule, 0);
1167                 }
1168         }
1169 
1170 resubmit:
1171         res = usb_submit_urb(urb, GFP_ATOMIC);
1172         if (res == -ENODEV) {
1173                 set_bit(RTL8152_UNPLUG, &tp->flags);
1174                 netif_device_detach(tp->netdev);
1175         } else if (res) {
1176                 netif_err(tp, intr, tp->netdev,
1177                           "can't resubmit intr, status %d\n", res);
1178         }
1179 }
1180 
1181 static inline void *rx_agg_align(void *data)
1182 {
1183         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1184 }
1185 
1186 static inline void *tx_agg_align(void *data)
1187 {
1188         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1189 }
1190 
1191 static void free_all_mem(struct r8152 *tp)
1192 {
1193         int i;
1194 
1195         for (i = 0; i < RTL8152_MAX_RX; i++) {
1196                 usb_free_urb(tp->rx_info[i].urb);
1197                 tp->rx_info[i].urb = NULL;
1198 
1199                 kfree(tp->rx_info[i].buffer);
1200                 tp->rx_info[i].buffer = NULL;
1201                 tp->rx_info[i].head = NULL;
1202         }
1203 
1204         for (i = 0; i < RTL8152_MAX_TX; i++) {
1205                 usb_free_urb(tp->tx_info[i].urb);
1206                 tp->tx_info[i].urb = NULL;
1207 
1208                 kfree(tp->tx_info[i].buffer);
1209                 tp->tx_info[i].buffer = NULL;
1210                 tp->tx_info[i].head = NULL;
1211         }
1212 
1213         usb_free_urb(tp->intr_urb);
1214         tp->intr_urb = NULL;
1215 
1216         kfree(tp->intr_buff);
1217         tp->intr_buff = NULL;
1218 }
1219 
1220 static int alloc_all_mem(struct r8152 *tp)
1221 {
1222         struct net_device *netdev = tp->netdev;
1223         struct usb_interface *intf = tp->intf;
1224         struct usb_host_interface *alt = intf->cur_altsetting;
1225         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1226         struct urb *urb;
1227         int node, i;
1228         u8 *buf;
1229 
1230         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1231 
1232         spin_lock_init(&tp->rx_lock);
1233         spin_lock_init(&tp->tx_lock);
1234         INIT_LIST_HEAD(&tp->tx_free);
1235         skb_queue_head_init(&tp->tx_queue);
1236 
1237         for (i = 0; i < RTL8152_MAX_RX; i++) {
1238                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1239                 if (!buf)
1240                         goto err1;
1241 
1242                 if (buf != rx_agg_align(buf)) {
1243                         kfree(buf);
1244                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1245                                            node);
1246                         if (!buf)
1247                                 goto err1;
1248                 }
1249 
1250                 urb = usb_alloc_urb(0, GFP_KERNEL);
1251                 if (!urb) {
1252                         kfree(buf);
1253                         goto err1;
1254                 }
1255 
1256                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1257                 tp->rx_info[i].context = tp;
1258                 tp->rx_info[i].urb = urb;
1259                 tp->rx_info[i].buffer = buf;
1260                 tp->rx_info[i].head = rx_agg_align(buf);
1261         }
1262 
1263         for (i = 0; i < RTL8152_MAX_TX; i++) {
1264                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1265                 if (!buf)
1266                         goto err1;
1267 
1268                 if (buf != tx_agg_align(buf)) {
1269                         kfree(buf);
1270                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1271                                            node);
1272                         if (!buf)
1273                                 goto err1;
1274                 }
1275 
1276                 urb = usb_alloc_urb(0, GFP_KERNEL);
1277                 if (!urb) {
1278                         kfree(buf);
1279                         goto err1;
1280                 }
1281 
1282                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1283                 tp->tx_info[i].context = tp;
1284                 tp->tx_info[i].urb = urb;
1285                 tp->tx_info[i].buffer = buf;
1286                 tp->tx_info[i].head = tx_agg_align(buf);
1287 
1288                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1289         }
1290 
1291         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1292         if (!tp->intr_urb)
1293                 goto err1;
1294 
1295         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1296         if (!tp->intr_buff)
1297                 goto err1;
1298 
1299         tp->intr_interval = (int)ep_intr->desc.bInterval;
1300         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1301                          tp->intr_buff, INTBUFSIZE, intr_callback,
1302                          tp, tp->intr_interval);
1303 
1304         return 0;
1305 
1306 err1:
1307         free_all_mem(tp);
1308         return -ENOMEM;
1309 }
1310 
1311 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1312 {
1313         struct tx_agg *agg = NULL;
1314         unsigned long flags;
1315 
1316         if (list_empty(&tp->tx_free))
1317                 return NULL;
1318 
1319         spin_lock_irqsave(&tp->tx_lock, flags);
1320         if (!list_empty(&tp->tx_free)) {
1321                 struct list_head *cursor;
1322 
1323                 cursor = tp->tx_free.next;
1324                 list_del_init(cursor);
1325                 agg = list_entry(cursor, struct tx_agg, list);
1326         }
1327         spin_unlock_irqrestore(&tp->tx_lock, flags);
1328 
1329         return agg;
1330 }
1331 
1332 static inline __be16 get_protocol(struct sk_buff *skb)
1333 {
1334         __be16 protocol;
1335 
1336         if (skb->protocol == htons(ETH_P_8021Q))
1337                 protocol = vlan_eth_hdr(skb)->h_vlan_encapsulated_proto;
1338         else
1339                 protocol = skb->protocol;
1340 
1341         return protocol;
1342 }
1343 
1344 /* r8152_csum_workaround()
1345  * The hw limites the value the transport offset. When the offset is out of the
1346  * range, calculate the checksum by sw.
1347  */
1348 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1349                                   struct sk_buff_head *list)
1350 {
1351         if (skb_shinfo(skb)->gso_size) {
1352                 netdev_features_t features = tp->netdev->features;
1353                 struct sk_buff_head seg_list;
1354                 struct sk_buff *segs, *nskb;
1355 
1356                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1357                 segs = skb_gso_segment(skb, features);
1358                 if (IS_ERR(segs) || !segs)
1359                         goto drop;
1360 
1361                 __skb_queue_head_init(&seg_list);
1362 
1363                 do {
1364                         nskb = segs;
1365                         segs = segs->next;
1366                         nskb->next = NULL;
1367                         __skb_queue_tail(&seg_list, nskb);
1368                 } while (segs);
1369 
1370                 skb_queue_splice(&seg_list, list);
1371                 dev_kfree_skb(skb);
1372         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1373                 if (skb_checksum_help(skb) < 0)
1374                         goto drop;
1375 
1376                 __skb_queue_head(list, skb);
1377         } else {
1378                 struct net_device_stats *stats;
1379 
1380 drop:
1381                 stats = &tp->netdev->stats;
1382                 stats->tx_dropped++;
1383                 dev_kfree_skb(skb);
1384         }
1385 }
1386 
1387 /* msdn_giant_send_check()
1388  * According to the document of microsoft, the TCP Pseudo Header excludes the
1389  * packet length for IPv6 TCP large packets.
1390  */
1391 static int msdn_giant_send_check(struct sk_buff *skb)
1392 {
1393         const struct ipv6hdr *ipv6h;
1394         struct tcphdr *th;
1395         int ret;
1396 
1397         ret = skb_cow_head(skb, 0);
1398         if (ret)
1399                 return ret;
1400 
1401         ipv6h = ipv6_hdr(skb);
1402         th = tcp_hdr(skb);
1403 
1404         th->check = 0;
1405         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1406 
1407         return ret;
1408 }
1409 
1410 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1411 {
1412         if (vlan_tx_tag_present(skb)) {
1413                 u32 opts2;
1414 
1415                 opts2 = TX_VLAN_TAG | swab16(vlan_tx_tag_get(skb));
1416                 desc->opts2 |= cpu_to_le32(opts2);
1417         }
1418 }
1419 
1420 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1421 {
1422         u32 opts2 = le32_to_cpu(desc->opts2);
1423 
1424         if (opts2 & RX_VLAN_TAG)
1425                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1426                                        swab16(opts2 & 0xffff));
1427 }
1428 
1429 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1430                          struct sk_buff *skb, u32 len, u32 transport_offset)
1431 {
1432         u32 mss = skb_shinfo(skb)->gso_size;
1433         u32 opts1, opts2 = 0;
1434         int ret = TX_CSUM_SUCCESS;
1435 
1436         WARN_ON_ONCE(len > TX_LEN_MAX);
1437 
1438         opts1 = len | TX_FS | TX_LS;
1439 
1440         if (mss) {
1441                 if (transport_offset > GTTCPHO_MAX) {
1442                         netif_warn(tp, tx_err, tp->netdev,
1443                                    "Invalid transport offset 0x%x for TSO\n",
1444                                    transport_offset);
1445                         ret = TX_CSUM_TSO;
1446                         goto unavailable;
1447                 }
1448 
1449                 switch (get_protocol(skb)) {
1450                 case htons(ETH_P_IP):
1451                         opts1 |= GTSENDV4;
1452                         break;
1453 
1454                 case htons(ETH_P_IPV6):
1455                         if (msdn_giant_send_check(skb)) {
1456                                 ret = TX_CSUM_TSO;
1457                                 goto unavailable;
1458                         }
1459                         opts1 |= GTSENDV6;
1460                         break;
1461 
1462                 default:
1463                         WARN_ON_ONCE(1);
1464                         break;
1465                 }
1466 
1467                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1468                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1469         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1470                 u8 ip_protocol;
1471 
1472                 if (transport_offset > TCPHO_MAX) {
1473                         netif_warn(tp, tx_err, tp->netdev,
1474                                    "Invalid transport offset 0x%x\n",
1475                                    transport_offset);
1476                         ret = TX_CSUM_NONE;
1477                         goto unavailable;
1478                 }
1479 
1480                 switch (get_protocol(skb)) {
1481                 case htons(ETH_P_IP):
1482                         opts2 |= IPV4_CS;
1483                         ip_protocol = ip_hdr(skb)->protocol;
1484                         break;
1485 
1486                 case htons(ETH_P_IPV6):
1487                         opts2 |= IPV6_CS;
1488                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1489                         break;
1490 
1491                 default:
1492                         ip_protocol = IPPROTO_RAW;
1493                         break;
1494                 }
1495 
1496                 if (ip_protocol == IPPROTO_TCP)
1497                         opts2 |= TCP_CS;
1498                 else if (ip_protocol == IPPROTO_UDP)
1499                         opts2 |= UDP_CS;
1500                 else
1501                         WARN_ON_ONCE(1);
1502 
1503                 opts2 |= transport_offset << TCPHO_SHIFT;
1504         }
1505 
1506         desc->opts2 = cpu_to_le32(opts2);
1507         desc->opts1 = cpu_to_le32(opts1);
1508 
1509 unavailable:
1510         return ret;
1511 }
1512 
1513 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1514 {
1515         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1516         int remain, ret;
1517         u8 *tx_data;
1518 
1519         __skb_queue_head_init(&skb_head);
1520         spin_lock(&tx_queue->lock);
1521         skb_queue_splice_init(tx_queue, &skb_head);
1522         spin_unlock(&tx_queue->lock);
1523 
1524         tx_data = agg->head;
1525         agg->skb_num = 0;
1526         agg->skb_len = 0;
1527         remain = agg_buf_sz;
1528 
1529         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1530                 struct tx_desc *tx_desc;
1531                 struct sk_buff *skb;
1532                 unsigned int len;
1533                 u32 offset;
1534 
1535                 skb = __skb_dequeue(&skb_head);
1536                 if (!skb)
1537                         break;
1538 
1539                 len = skb->len + sizeof(*tx_desc);
1540 
1541                 if (len > remain) {
1542                         __skb_queue_head(&skb_head, skb);
1543                         break;
1544                 }
1545 
1546                 tx_data = tx_agg_align(tx_data);
1547                 tx_desc = (struct tx_desc *)tx_data;
1548 
1549                 offset = (u32)skb_transport_offset(skb);
1550 
1551                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1552                         r8152_csum_workaround(tp, skb, &skb_head);
1553                         continue;
1554                 }
1555 
1556                 rtl_tx_vlan_tag(tx_desc, skb);
1557 
1558                 tx_data += sizeof(*tx_desc);
1559 
1560                 len = skb->len;
1561                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1562                         struct net_device_stats *stats = &tp->netdev->stats;
1563 
1564                         stats->tx_dropped++;
1565                         dev_kfree_skb_any(skb);
1566                         tx_data -= sizeof(*tx_desc);
1567                         continue;
1568                 }
1569 
1570                 tx_data += len;
1571                 agg->skb_len += len;
1572                 agg->skb_num++;
1573 
1574                 dev_kfree_skb_any(skb);
1575 
1576                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1577         }
1578 
1579         if (!skb_queue_empty(&skb_head)) {
1580                 spin_lock(&tx_queue->lock);
1581                 skb_queue_splice(&skb_head, tx_queue);
1582                 spin_unlock(&tx_queue->lock);
1583         }
1584 
1585         netif_tx_lock(tp->netdev);
1586 
1587         if (netif_queue_stopped(tp->netdev) &&
1588             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1589                 netif_wake_queue(tp->netdev);
1590 
1591         netif_tx_unlock(tp->netdev);
1592 
1593         ret = usb_autopm_get_interface_async(tp->intf);
1594         if (ret < 0)
1595                 goto out_tx_fill;
1596 
1597         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1598                           agg->head, (int)(tx_data - (u8 *)agg->head),
1599                           (usb_complete_t)write_bulk_callback, agg);
1600 
1601         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1602         if (ret < 0)
1603                 usb_autopm_put_interface_async(tp->intf);
1604 
1605 out_tx_fill:
1606         return ret;
1607 }
1608 
1609 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1610 {
1611         u8 checksum = CHECKSUM_NONE;
1612         u32 opts2, opts3;
1613 
1614         if (tp->version == RTL_VER_01)
1615                 goto return_result;
1616 
1617         opts2 = le32_to_cpu(rx_desc->opts2);
1618         opts3 = le32_to_cpu(rx_desc->opts3);
1619 
1620         if (opts2 & RD_IPV4_CS) {
1621                 if (opts3 & IPF)
1622                         checksum = CHECKSUM_NONE;
1623                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1624                         checksum = CHECKSUM_NONE;
1625                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1626                         checksum = CHECKSUM_NONE;
1627                 else
1628                         checksum = CHECKSUM_UNNECESSARY;
1629         } else if (RD_IPV6_CS) {
1630                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1631                         checksum = CHECKSUM_UNNECESSARY;
1632                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1633                         checksum = CHECKSUM_UNNECESSARY;
1634         }
1635 
1636 return_result:
1637         return checksum;
1638 }
1639 
1640 static void rx_bottom(struct r8152 *tp)
1641 {
1642         unsigned long flags;
1643         struct list_head *cursor, *next, rx_queue;
1644 
1645         if (list_empty(&tp->rx_done))
1646                 return;
1647 
1648         INIT_LIST_HEAD(&rx_queue);
1649         spin_lock_irqsave(&tp->rx_lock, flags);
1650         list_splice_init(&tp->rx_done, &rx_queue);
1651         spin_unlock_irqrestore(&tp->rx_lock, flags);
1652 
1653         list_for_each_safe(cursor, next, &rx_queue) {
1654                 struct rx_desc *rx_desc;
1655                 struct rx_agg *agg;
1656                 int len_used = 0;
1657                 struct urb *urb;
1658                 u8 *rx_data;
1659 
1660                 list_del_init(cursor);
1661 
1662                 agg = list_entry(cursor, struct rx_agg, list);
1663                 urb = agg->urb;
1664                 if (urb->actual_length < ETH_ZLEN)
1665                         goto submit;
1666 
1667                 rx_desc = agg->head;
1668                 rx_data = agg->head;
1669                 len_used += sizeof(struct rx_desc);
1670 
1671                 while (urb->actual_length > len_used) {
1672                         struct net_device *netdev = tp->netdev;
1673                         struct net_device_stats *stats = &netdev->stats;
1674                         unsigned int pkt_len;
1675                         struct sk_buff *skb;
1676 
1677                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1678                         if (pkt_len < ETH_ZLEN)
1679                                 break;
1680 
1681                         len_used += pkt_len;
1682                         if (urb->actual_length < len_used)
1683                                 break;
1684 
1685                         pkt_len -= CRC_SIZE;
1686                         rx_data += sizeof(struct rx_desc);
1687 
1688                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1689                         if (!skb) {
1690                                 stats->rx_dropped++;
1691                                 goto find_next_rx;
1692                         }
1693 
1694                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1695                         memcpy(skb->data, rx_data, pkt_len);
1696                         skb_put(skb, pkt_len);
1697                         skb->protocol = eth_type_trans(skb, netdev);
1698                         rtl_rx_vlan_tag(rx_desc, skb);
1699                         netif_receive_skb(skb);
1700                         stats->rx_packets++;
1701                         stats->rx_bytes += pkt_len;
1702 
1703 find_next_rx:
1704                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1705                         rx_desc = (struct rx_desc *)rx_data;
1706                         len_used = (int)(rx_data - (u8 *)agg->head);
1707                         len_used += sizeof(struct rx_desc);
1708                 }
1709 
1710 submit:
1711                 r8152_submit_rx(tp, agg, GFP_ATOMIC);
1712         }
1713 }
1714 
1715 static void tx_bottom(struct r8152 *tp)
1716 {
1717         int res;
1718 
1719         do {
1720                 struct tx_agg *agg;
1721 
1722                 if (skb_queue_empty(&tp->tx_queue))
1723                         break;
1724 
1725                 agg = r8152_get_tx_agg(tp);
1726                 if (!agg)
1727                         break;
1728 
1729                 res = r8152_tx_agg_fill(tp, agg);
1730                 if (res) {
1731                         struct net_device *netdev = tp->netdev;
1732 
1733                         if (res == -ENODEV) {
1734                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1735                                 netif_device_detach(netdev);
1736                         } else {
1737                                 struct net_device_stats *stats = &netdev->stats;
1738                                 unsigned long flags;
1739 
1740                                 netif_warn(tp, tx_err, netdev,
1741                                            "failed tx_urb %d\n", res);
1742                                 stats->tx_dropped += agg->skb_num;
1743 
1744                                 spin_lock_irqsave(&tp->tx_lock, flags);
1745                                 list_add_tail(&agg->list, &tp->tx_free);
1746                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1747                         }
1748                 }
1749         } while (res == 0);
1750 }
1751 
1752 static void bottom_half(unsigned long data)
1753 {
1754         struct r8152 *tp;
1755 
1756         tp = (struct r8152 *)data;
1757 
1758         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1759                 return;
1760 
1761         if (!test_bit(WORK_ENABLE, &tp->flags))
1762                 return;
1763 
1764         /* When link down, the driver would cancel all bulks. */
1765         /* This avoid the re-submitting bulk */
1766         if (!netif_carrier_ok(tp->netdev))
1767                 return;
1768 
1769         clear_bit(SCHEDULE_TASKLET, &tp->flags);
1770 
1771         rx_bottom(tp);
1772         tx_bottom(tp);
1773 }
1774 
1775 static
1776 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1777 {
1778         int ret;
1779 
1780         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1781                           agg->head, agg_buf_sz,
1782                           (usb_complete_t)read_bulk_callback, agg);
1783 
1784         ret = usb_submit_urb(agg->urb, mem_flags);
1785         if (ret == -ENODEV) {
1786                 set_bit(RTL8152_UNPLUG, &tp->flags);
1787                 netif_device_detach(tp->netdev);
1788         } else if (ret) {
1789                 struct urb *urb = agg->urb;
1790                 unsigned long flags;
1791 
1792                 urb->actual_length = 0;
1793                 spin_lock_irqsave(&tp->rx_lock, flags);
1794                 list_add_tail(&agg->list, &tp->rx_done);
1795                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1796                 tasklet_schedule(&tp->tl);
1797         }
1798 
1799         return ret;
1800 }
1801 
1802 static void rtl_drop_queued_tx(struct r8152 *tp)
1803 {
1804         struct net_device_stats *stats = &tp->netdev->stats;
1805         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1806         struct sk_buff *skb;
1807 
1808         if (skb_queue_empty(tx_queue))
1809                 return;
1810 
1811         __skb_queue_head_init(&skb_head);
1812         spin_lock_bh(&tx_queue->lock);
1813         skb_queue_splice_init(tx_queue, &skb_head);
1814         spin_unlock_bh(&tx_queue->lock);
1815 
1816         while ((skb = __skb_dequeue(&skb_head))) {
1817                 dev_kfree_skb(skb);
1818                 stats->tx_dropped++;
1819         }
1820 }
1821 
1822 static void rtl8152_tx_timeout(struct net_device *netdev)
1823 {
1824         struct r8152 *tp = netdev_priv(netdev);
1825         int i;
1826 
1827         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1828         for (i = 0; i < RTL8152_MAX_TX; i++)
1829                 usb_unlink_urb(tp->tx_info[i].urb);
1830 }
1831 
1832 static void rtl8152_set_rx_mode(struct net_device *netdev)
1833 {
1834         struct r8152 *tp = netdev_priv(netdev);
1835 
1836         if (tp->speed & LINK_STATUS) {
1837                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1838                 schedule_delayed_work(&tp->schedule, 0);
1839         }
1840 }
1841 
1842 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1843 {
1844         struct r8152 *tp = netdev_priv(netdev);
1845         u32 mc_filter[2];       /* Multicast hash filter */
1846         __le32 tmp[2];
1847         u32 ocp_data;
1848 
1849         clear_bit(RTL8152_SET_RX_MODE, &tp->flags);
1850         netif_stop_queue(netdev);
1851         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1852         ocp_data &= ~RCR_ACPT_ALL;
1853         ocp_data |= RCR_AB | RCR_APM;
1854 
1855         if (netdev->flags & IFF_PROMISC) {
1856                 /* Unconditionally log net taps. */
1857                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1858                 ocp_data |= RCR_AM | RCR_AAP;
1859                 mc_filter[1] = 0xffffffff;
1860                 mc_filter[0] = 0xffffffff;
1861         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1862                    (netdev->flags & IFF_ALLMULTI)) {
1863                 /* Too many to filter perfectly -- accept all multicasts. */
1864                 ocp_data |= RCR_AM;
1865                 mc_filter[1] = 0xffffffff;
1866                 mc_filter[0] = 0xffffffff;
1867         } else {
1868                 struct netdev_hw_addr *ha;
1869 
1870                 mc_filter[1] = 0;
1871                 mc_filter[0] = 0;
1872                 netdev_for_each_mc_addr(ha, netdev) {
1873                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1874 
1875                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1876                         ocp_data |= RCR_AM;
1877                 }
1878         }
1879 
1880         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1881         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1882 
1883         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1884         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1885         netif_wake_queue(netdev);
1886 }
1887 
1888 static netdev_features_t
1889 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1890                        netdev_features_t features)
1891 {
1892         u32 mss = skb_shinfo(skb)->gso_size;
1893         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1894         int offset = skb_transport_offset(skb);
1895 
1896         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1897                 features &= ~(NETIF_F_ALL_CSUM | NETIF_F_GSO_MASK);
1898         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1899                 features &= ~NETIF_F_GSO_MASK;
1900 
1901         return features;
1902 }
1903 
1904 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
1905                                       struct net_device *netdev)
1906 {
1907         struct r8152 *tp = netdev_priv(netdev);
1908 
1909         skb_tx_timestamp(skb);
1910 
1911         skb_queue_tail(&tp->tx_queue, skb);
1912 
1913         if (!list_empty(&tp->tx_free)) {
1914                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
1915                         set_bit(SCHEDULE_TASKLET, &tp->flags);
1916                         schedule_delayed_work(&tp->schedule, 0);
1917                 } else {
1918                         usb_mark_last_busy(tp->udev);
1919                         tasklet_schedule(&tp->tl);
1920                 }
1921         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
1922                 netif_stop_queue(netdev);
1923         }
1924 
1925         return NETDEV_TX_OK;
1926 }
1927 
1928 static void r8152b_reset_packet_filter(struct r8152 *tp)
1929 {
1930         u32     ocp_data;
1931 
1932         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
1933         ocp_data &= ~FMC_FCR_MCU_EN;
1934         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1935         ocp_data |= FMC_FCR_MCU_EN;
1936         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
1937 }
1938 
1939 static void rtl8152_nic_reset(struct r8152 *tp)
1940 {
1941         int     i;
1942 
1943         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
1944 
1945         for (i = 0; i < 1000; i++) {
1946                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
1947                         break;
1948                 usleep_range(100, 400);
1949         }
1950 }
1951 
1952 static void set_tx_qlen(struct r8152 *tp)
1953 {
1954         struct net_device *netdev = tp->netdev;
1955 
1956         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
1957                                     sizeof(struct tx_desc));
1958 }
1959 
1960 static inline u8 rtl8152_get_speed(struct r8152 *tp)
1961 {
1962         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
1963 }
1964 
1965 static void rtl_set_eee_plus(struct r8152 *tp)
1966 {
1967         u32 ocp_data;
1968         u8 speed;
1969 
1970         speed = rtl8152_get_speed(tp);
1971         if (speed & _10bps) {
1972                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1973                 ocp_data |= EEEP_CR_EEEP_TX;
1974                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1975         } else {
1976                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
1977                 ocp_data &= ~EEEP_CR_EEEP_TX;
1978                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
1979         }
1980 }
1981 
1982 static void rxdy_gated_en(struct r8152 *tp, bool enable)
1983 {
1984         u32 ocp_data;
1985 
1986         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
1987         if (enable)
1988                 ocp_data |= RXDY_GATED_EN;
1989         else
1990                 ocp_data &= ~RXDY_GATED_EN;
1991         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
1992 }
1993 
1994 static int rtl_start_rx(struct r8152 *tp)
1995 {
1996         int i, ret = 0;
1997 
1998         INIT_LIST_HEAD(&tp->rx_done);
1999         for (i = 0; i < RTL8152_MAX_RX; i++) {
2000                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2001                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2002                 if (ret)
2003                         break;
2004         }
2005 
2006         if (ret && ++i < RTL8152_MAX_RX) {
2007                 struct list_head rx_queue;
2008                 unsigned long flags;
2009 
2010                 INIT_LIST_HEAD(&rx_queue);
2011 
2012                 do {
2013                         struct rx_agg *agg = &tp->rx_info[i++];
2014                         struct urb *urb = agg->urb;
2015 
2016                         urb->actual_length = 0;
2017                         list_add_tail(&agg->list, &rx_queue);
2018                 } while (i < RTL8152_MAX_RX);
2019 
2020                 spin_lock_irqsave(&tp->rx_lock, flags);
2021                 list_splice_tail(&rx_queue, &tp->rx_done);
2022                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2023         }
2024 
2025         return ret;
2026 }
2027 
2028 static int rtl_stop_rx(struct r8152 *tp)
2029 {
2030         int i;
2031 
2032         for (i = 0; i < RTL8152_MAX_RX; i++)
2033                 usb_kill_urb(tp->rx_info[i].urb);
2034 
2035         return 0;
2036 }
2037 
2038 static int rtl_enable(struct r8152 *tp)
2039 {
2040         u32 ocp_data;
2041 
2042         r8152b_reset_packet_filter(tp);
2043 
2044         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2045         ocp_data |= CR_RE | CR_TE;
2046         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2047 
2048         rxdy_gated_en(tp, false);
2049 
2050         return rtl_start_rx(tp);
2051 }
2052 
2053 static int rtl8152_enable(struct r8152 *tp)
2054 {
2055         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2056                 return -ENODEV;
2057 
2058         set_tx_qlen(tp);
2059         rtl_set_eee_plus(tp);
2060 
2061         return rtl_enable(tp);
2062 }
2063 
2064 static void r8153_set_rx_agg(struct r8152 *tp)
2065 {
2066         u8 speed;
2067 
2068         speed = rtl8152_get_speed(tp);
2069         if (speed & _1000bps) {
2070                 if (tp->udev->speed == USB_SPEED_SUPER) {
2071                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2072                                         RX_THR_SUPPER);
2073                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2074                                         EARLY_AGG_SUPPER);
2075                 } else {
2076                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH,
2077                                         RX_THR_HIGH);
2078                         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2079                                         EARLY_AGG_HIGH);
2080                 }
2081         } else {
2082                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_SLOW);
2083                 ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_EARLY_AGG,
2084                                 EARLY_AGG_SLOW);
2085         }
2086 }
2087 
2088 static int rtl8153_enable(struct r8152 *tp)
2089 {
2090         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2091                 return -ENODEV;
2092 
2093         set_tx_qlen(tp);
2094         rtl_set_eee_plus(tp);
2095         r8153_set_rx_agg(tp);
2096 
2097         return rtl_enable(tp);
2098 }
2099 
2100 static void rtl_disable(struct r8152 *tp)
2101 {
2102         u32 ocp_data;
2103         int i;
2104 
2105         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2106                 rtl_drop_queued_tx(tp);
2107                 return;
2108         }
2109 
2110         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2111         ocp_data &= ~RCR_ACPT_ALL;
2112         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2113 
2114         rtl_drop_queued_tx(tp);
2115 
2116         for (i = 0; i < RTL8152_MAX_TX; i++)
2117                 usb_kill_urb(tp->tx_info[i].urb);
2118 
2119         rxdy_gated_en(tp, true);
2120 
2121         for (i = 0; i < 1000; i++) {
2122                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2123                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2124                         break;
2125                 usleep_range(1000, 2000);
2126         }
2127 
2128         for (i = 0; i < 1000; i++) {
2129                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2130                         break;
2131                 usleep_range(1000, 2000);
2132         }
2133 
2134         rtl_stop_rx(tp);
2135 
2136         rtl8152_nic_reset(tp);
2137 }
2138 
2139 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2140 {
2141         u32 ocp_data;
2142 
2143         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2144         if (enable)
2145                 ocp_data |= POWER_CUT;
2146         else
2147                 ocp_data &= ~POWER_CUT;
2148         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2149 
2150         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2151         ocp_data &= ~RESUME_INDICATE;
2152         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2153 }
2154 
2155 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2156 {
2157         u32 ocp_data;
2158 
2159         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2160         if (enable)
2161                 ocp_data |= CPCR_RX_VLAN;
2162         else
2163                 ocp_data &= ~CPCR_RX_VLAN;
2164         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2165 }
2166 
2167 static int rtl8152_set_features(struct net_device *dev,
2168                                 netdev_features_t features)
2169 {
2170         netdev_features_t changed = features ^ dev->features;
2171         struct r8152 *tp = netdev_priv(dev);
2172         int ret;
2173 
2174         ret = usb_autopm_get_interface(tp->intf);
2175         if (ret < 0)
2176                 goto out;
2177 
2178         mutex_lock(&tp->control);
2179 
2180         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2181                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2182                         rtl_rx_vlan_en(tp, true);
2183                 else
2184                         rtl_rx_vlan_en(tp, false);
2185         }
2186 
2187         mutex_unlock(&tp->control);
2188 
2189         usb_autopm_put_interface(tp->intf);
2190 
2191 out:
2192         return ret;
2193 }
2194 
2195 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2196 
2197 static u32 __rtl_get_wol(struct r8152 *tp)
2198 {
2199         u32 ocp_data;
2200         u32 wolopts = 0;
2201 
2202         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2203         if (!(ocp_data & LAN_WAKE_EN))
2204                 return 0;
2205 
2206         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2207         if (ocp_data & LINK_ON_WAKE_EN)
2208                 wolopts |= WAKE_PHY;
2209 
2210         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2211         if (ocp_data & UWF_EN)
2212                 wolopts |= WAKE_UCAST;
2213         if (ocp_data & BWF_EN)
2214                 wolopts |= WAKE_BCAST;
2215         if (ocp_data & MWF_EN)
2216                 wolopts |= WAKE_MCAST;
2217 
2218         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2219         if (ocp_data & MAGIC_EN)
2220                 wolopts |= WAKE_MAGIC;
2221 
2222         return wolopts;
2223 }
2224 
2225 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2226 {
2227         u32 ocp_data;
2228 
2229         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2230 
2231         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2232         ocp_data &= ~LINK_ON_WAKE_EN;
2233         if (wolopts & WAKE_PHY)
2234                 ocp_data |= LINK_ON_WAKE_EN;
2235         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2236 
2237         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2238         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2239         if (wolopts & WAKE_UCAST)
2240                 ocp_data |= UWF_EN;
2241         if (wolopts & WAKE_BCAST)
2242                 ocp_data |= BWF_EN;
2243         if (wolopts & WAKE_MCAST)
2244                 ocp_data |= MWF_EN;
2245         if (wolopts & WAKE_ANY)
2246                 ocp_data |= LAN_WAKE_EN;
2247         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2248 
2249         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2250 
2251         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2252         ocp_data &= ~MAGIC_EN;
2253         if (wolopts & WAKE_MAGIC)
2254                 ocp_data |= MAGIC_EN;
2255         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2256 
2257         if (wolopts & WAKE_ANY)
2258                 device_set_wakeup_enable(&tp->udev->dev, true);
2259         else
2260                 device_set_wakeup_enable(&tp->udev->dev, false);
2261 }
2262 
2263 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2264 {
2265         if (enable) {
2266                 u32 ocp_data;
2267 
2268                 __rtl_set_wol(tp, WAKE_ANY);
2269 
2270                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2271 
2272                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2273                 ocp_data |= LINK_OFF_WAKE_EN;
2274                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2275 
2276                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2277         } else {
2278                 __rtl_set_wol(tp, tp->saved_wolopts);
2279         }
2280 }
2281 
2282 static void rtl_phy_reset(struct r8152 *tp)
2283 {
2284         u16 data;
2285         int i;
2286 
2287         clear_bit(PHY_RESET, &tp->flags);
2288 
2289         data = r8152_mdio_read(tp, MII_BMCR);
2290 
2291         /* don't reset again before the previous one complete */
2292         if (data & BMCR_RESET)
2293                 return;
2294 
2295         data |= BMCR_RESET;
2296         r8152_mdio_write(tp, MII_BMCR, data);
2297 
2298         for (i = 0; i < 50; i++) {
2299                 msleep(20);
2300                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2301                         break;
2302         }
2303 }
2304 
2305 static void r8153_teredo_off(struct r8152 *tp)
2306 {
2307         u32 ocp_data;
2308 
2309         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2310         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2311         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2312 
2313         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2314         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2315         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2316 }
2317 
2318 static void r8152b_disable_aldps(struct r8152 *tp)
2319 {
2320         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA | DIS_SDSAVE);
2321         msleep(20);
2322 }
2323 
2324 static inline void r8152b_enable_aldps(struct r8152 *tp)
2325 {
2326         ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2327                                             LINKENA | DIS_SDSAVE);
2328 }
2329 
2330 static void rtl8152_disable(struct r8152 *tp)
2331 {
2332         r8152b_disable_aldps(tp);
2333         rtl_disable(tp);
2334         r8152b_enable_aldps(tp);
2335 }
2336 
2337 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2338 {
2339         u16 data;
2340 
2341         data = r8152_mdio_read(tp, MII_BMCR);
2342         if (data & BMCR_PDOWN) {
2343                 data &= ~BMCR_PDOWN;
2344                 r8152_mdio_write(tp, MII_BMCR, data);
2345         }
2346 
2347         set_bit(PHY_RESET, &tp->flags);
2348 }
2349 
2350 static void r8152b_exit_oob(struct r8152 *tp)
2351 {
2352         u32 ocp_data;
2353         int i;
2354 
2355         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2356         ocp_data &= ~RCR_ACPT_ALL;
2357         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2358 
2359         rxdy_gated_en(tp, true);
2360         r8153_teredo_off(tp);
2361         r8152b_hw_phy_cfg(tp);
2362 
2363         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2364         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2365 
2366         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2367         ocp_data &= ~NOW_IS_OOB;
2368         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2369 
2370         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2371         ocp_data &= ~MCU_BORW_EN;
2372         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2373 
2374         for (i = 0; i < 1000; i++) {
2375                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2376                 if (ocp_data & LINK_LIST_READY)
2377                         break;
2378                 usleep_range(1000, 2000);
2379         }
2380 
2381         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2382         ocp_data |= RE_INIT_LL;
2383         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2384 
2385         for (i = 0; i < 1000; i++) {
2386                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2387                 if (ocp_data & LINK_LIST_READY)
2388                         break;
2389                 usleep_range(1000, 2000);
2390         }
2391 
2392         rtl8152_nic_reset(tp);
2393 
2394         /* rx share fifo credit full threshold */
2395         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2396 
2397         if (tp->udev->speed == USB_SPEED_FULL ||
2398             tp->udev->speed == USB_SPEED_LOW) {
2399                 /* rx share fifo credit near full threshold */
2400                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2401                                 RXFIFO_THR2_FULL);
2402                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2403                                 RXFIFO_THR3_FULL);
2404         } else {
2405                 /* rx share fifo credit near full threshold */
2406                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2407                                 RXFIFO_THR2_HIGH);
2408                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2409                                 RXFIFO_THR3_HIGH);
2410         }
2411 
2412         /* TX share fifo free credit full threshold */
2413         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2414 
2415         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2416         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2417         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2418                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2419 
2420         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2421 
2422         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2423 
2424         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2425         ocp_data |= TCR0_AUTO_FIFO;
2426         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2427 }
2428 
2429 static void r8152b_enter_oob(struct r8152 *tp)
2430 {
2431         u32 ocp_data;
2432         int i;
2433 
2434         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2435         ocp_data &= ~NOW_IS_OOB;
2436         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2437 
2438         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2439         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2440         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2441 
2442         rtl_disable(tp);
2443 
2444         for (i = 0; i < 1000; i++) {
2445                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2446                 if (ocp_data & LINK_LIST_READY)
2447                         break;
2448                 usleep_range(1000, 2000);
2449         }
2450 
2451         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2452         ocp_data |= RE_INIT_LL;
2453         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2454 
2455         for (i = 0; i < 1000; i++) {
2456                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2457                 if (ocp_data & LINK_LIST_READY)
2458                         break;
2459                 usleep_range(1000, 2000);
2460         }
2461 
2462         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2463 
2464         rtl_rx_vlan_en(tp, true);
2465 
2466         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2467         ocp_data |= ALDPS_PROXY_MODE;
2468         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2469 
2470         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2471         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2472         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2473 
2474         rxdy_gated_en(tp, false);
2475 
2476         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2477         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2478         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2479 }
2480 
2481 static void r8153_hw_phy_cfg(struct r8152 *tp)
2482 {
2483         u32 ocp_data;
2484         u16 data;
2485 
2486         ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2487         data = r8152_mdio_read(tp, MII_BMCR);
2488         if (data & BMCR_PDOWN) {
2489                 data &= ~BMCR_PDOWN;
2490                 r8152_mdio_write(tp, MII_BMCR, data);
2491         }
2492 
2493         if (tp->version == RTL_VER_03) {
2494                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2495                 data &= ~CTAP_SHORT_EN;
2496                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2497         }
2498 
2499         data = ocp_reg_read(tp, OCP_POWER_CFG);
2500         data |= EEE_CLKDIV_EN;
2501         ocp_reg_write(tp, OCP_POWER_CFG, data);
2502 
2503         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2504         data |= EN_10M_BGOFF;
2505         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2506         data = ocp_reg_read(tp, OCP_POWER_CFG);
2507         data |= EN_10M_PLLOFF;
2508         ocp_reg_write(tp, OCP_POWER_CFG, data);
2509         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2510 
2511         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2512         ocp_data |= PFM_PWM_SWITCH;
2513         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2514 
2515         /* Enable LPF corner auto tune */
2516         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2517 
2518         /* Adjust 10M Amplitude */
2519         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2520         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2521 
2522         set_bit(PHY_RESET, &tp->flags);
2523 }
2524 
2525 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2526 {
2527         u8 u1u2[8];
2528 
2529         if (enable)
2530                 memset(u1u2, 0xff, sizeof(u1u2));
2531         else
2532                 memset(u1u2, 0x00, sizeof(u1u2));
2533 
2534         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2535 }
2536 
2537 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2538 {
2539         u32 ocp_data;
2540 
2541         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2542         if (enable)
2543                 ocp_data |= U2P3_ENABLE;
2544         else
2545                 ocp_data &= ~U2P3_ENABLE;
2546         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2547 }
2548 
2549 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2550 {
2551         u32 ocp_data;
2552 
2553         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2554         if (enable)
2555                 ocp_data |= PWR_EN | PHASE2_EN;
2556         else
2557                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2558         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2559 
2560         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2561         ocp_data &= ~PCUT_STATUS;
2562         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2563 }
2564 
2565 static void r8153_first_init(struct r8152 *tp)
2566 {
2567         u32 ocp_data;
2568         int i;
2569 
2570         rxdy_gated_en(tp, true);
2571         r8153_teredo_off(tp);
2572 
2573         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2574         ocp_data &= ~RCR_ACPT_ALL;
2575         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2576 
2577         r8153_hw_phy_cfg(tp);
2578 
2579         rtl8152_nic_reset(tp);
2580 
2581         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2582         ocp_data &= ~NOW_IS_OOB;
2583         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2584 
2585         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2586         ocp_data &= ~MCU_BORW_EN;
2587         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2588 
2589         for (i = 0; i < 1000; i++) {
2590                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2591                 if (ocp_data & LINK_LIST_READY)
2592                         break;
2593                 usleep_range(1000, 2000);
2594         }
2595 
2596         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2597         ocp_data |= RE_INIT_LL;
2598         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2599 
2600         for (i = 0; i < 1000; i++) {
2601                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2602                 if (ocp_data & LINK_LIST_READY)
2603                         break;
2604                 usleep_range(1000, 2000);
2605         }
2606 
2607         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2608 
2609         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2610         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2611 
2612         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2613         ocp_data |= TCR0_AUTO_FIFO;
2614         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2615 
2616         rtl8152_nic_reset(tp);
2617 
2618         /* rx share fifo credit full threshold */
2619         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2620         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2621         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2622         /* TX share fifo free credit full threshold */
2623         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2624 
2625         /* rx aggregation */
2626         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2627         ocp_data &= ~RX_AGG_DISABLE;
2628         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2629 }
2630 
2631 static void r8153_enter_oob(struct r8152 *tp)
2632 {
2633         u32 ocp_data;
2634         int i;
2635 
2636         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2637         ocp_data &= ~NOW_IS_OOB;
2638         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2639 
2640         rtl_disable(tp);
2641 
2642         for (i = 0; i < 1000; i++) {
2643                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2644                 if (ocp_data & LINK_LIST_READY)
2645                         break;
2646                 usleep_range(1000, 2000);
2647         }
2648 
2649         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2650         ocp_data |= RE_INIT_LL;
2651         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2652 
2653         for (i = 0; i < 1000; i++) {
2654                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2655                 if (ocp_data & LINK_LIST_READY)
2656                         break;
2657                 usleep_range(1000, 2000);
2658         }
2659 
2660         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2661 
2662         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2663         ocp_data &= ~TEREDO_WAKE_MASK;
2664         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2665 
2666         rtl_rx_vlan_en(tp, true);
2667 
2668         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2669         ocp_data |= ALDPS_PROXY_MODE;
2670         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2671 
2672         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2673         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2674         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2675 
2676         rxdy_gated_en(tp, false);
2677 
2678         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2679         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2680         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2681 }
2682 
2683 static void r8153_disable_aldps(struct r8152 *tp)
2684 {
2685         u16 data;
2686 
2687         data = ocp_reg_read(tp, OCP_POWER_CFG);
2688         data &= ~EN_ALDPS;
2689         ocp_reg_write(tp, OCP_POWER_CFG, data);
2690         msleep(20);
2691 }
2692 
2693 static void r8153_enable_aldps(struct r8152 *tp)
2694 {
2695         u16 data;
2696 
2697         data = ocp_reg_read(tp, OCP_POWER_CFG);
2698         data |= EN_ALDPS;
2699         ocp_reg_write(tp, OCP_POWER_CFG, data);
2700 }
2701 
2702 static void rtl8153_disable(struct r8152 *tp)
2703 {
2704         r8153_disable_aldps(tp);
2705         rtl_disable(tp);
2706         r8153_enable_aldps(tp);
2707 }
2708 
2709 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2710 {
2711         u16 bmcr, anar, gbcr;
2712         int ret = 0;
2713 
2714         cancel_delayed_work_sync(&tp->schedule);
2715         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2716         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2717                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2718         if (tp->mii.supports_gmii) {
2719                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2720                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2721         } else {
2722                 gbcr = 0;
2723         }
2724 
2725         if (autoneg == AUTONEG_DISABLE) {
2726                 if (speed == SPEED_10) {
2727                         bmcr = 0;
2728                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2729                 } else if (speed == SPEED_100) {
2730                         bmcr = BMCR_SPEED100;
2731                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2732                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2733                         bmcr = BMCR_SPEED1000;
2734                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2735                 } else {
2736                         ret = -EINVAL;
2737                         goto out;
2738                 }
2739 
2740                 if (duplex == DUPLEX_FULL)
2741                         bmcr |= BMCR_FULLDPLX;
2742         } else {
2743                 if (speed == SPEED_10) {
2744                         if (duplex == DUPLEX_FULL)
2745                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2746                         else
2747                                 anar |= ADVERTISE_10HALF;
2748                 } else if (speed == SPEED_100) {
2749                         if (duplex == DUPLEX_FULL) {
2750                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2751                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2752                         } else {
2753                                 anar |= ADVERTISE_10HALF;
2754                                 anar |= ADVERTISE_100HALF;
2755                         }
2756                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2757                         if (duplex == DUPLEX_FULL) {
2758                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2759                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2760                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2761                         } else {
2762                                 anar |= ADVERTISE_10HALF;
2763                                 anar |= ADVERTISE_100HALF;
2764                                 gbcr |= ADVERTISE_1000HALF;
2765                         }
2766                 } else {
2767                         ret = -EINVAL;
2768                         goto out;
2769                 }
2770 
2771                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2772         }
2773 
2774         if (test_bit(PHY_RESET, &tp->flags))
2775                 bmcr |= BMCR_RESET;
2776 
2777         if (tp->mii.supports_gmii)
2778                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2779 
2780         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2781         r8152_mdio_write(tp, MII_BMCR, bmcr);
2782 
2783         if (test_bit(PHY_RESET, &tp->flags)) {
2784                 int i;
2785 
2786                 clear_bit(PHY_RESET, &tp->flags);
2787                 for (i = 0; i < 50; i++) {
2788                         msleep(20);
2789                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2790                                 break;
2791                 }
2792         }
2793 
2794 out:
2795 
2796         return ret;
2797 }
2798 
2799 static void rtl8152_up(struct r8152 *tp)
2800 {
2801         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2802                 return;
2803 
2804         r8152b_disable_aldps(tp);
2805         r8152b_exit_oob(tp);
2806         r8152b_enable_aldps(tp);
2807 }
2808 
2809 static void rtl8152_down(struct r8152 *tp)
2810 {
2811         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2812                 rtl_drop_queued_tx(tp);
2813                 return;
2814         }
2815 
2816         r8152_power_cut_en(tp, false);
2817         r8152b_disable_aldps(tp);
2818         r8152b_enter_oob(tp);
2819         r8152b_enable_aldps(tp);
2820 }
2821 
2822 static void rtl8153_up(struct r8152 *tp)
2823 {
2824         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2825                 return;
2826 
2827         r8153_disable_aldps(tp);
2828         r8153_first_init(tp);
2829         r8153_enable_aldps(tp);
2830 }
2831 
2832 static void rtl8153_down(struct r8152 *tp)
2833 {
2834         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2835                 rtl_drop_queued_tx(tp);
2836                 return;
2837         }
2838 
2839         r8153_u1u2en(tp, false);
2840         r8153_power_cut_en(tp, false);
2841         r8153_disable_aldps(tp);
2842         r8153_enter_oob(tp);
2843         r8153_enable_aldps(tp);
2844 }
2845 
2846 static void set_carrier(struct r8152 *tp)
2847 {
2848         struct net_device *netdev = tp->netdev;
2849         u8 speed;
2850 
2851         clear_bit(RTL8152_LINK_CHG, &tp->flags);
2852         speed = rtl8152_get_speed(tp);
2853 
2854         if (speed & LINK_STATUS) {
2855                 if (!(tp->speed & LINK_STATUS)) {
2856                         tp->rtl_ops.enable(tp);
2857                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2858                         netif_carrier_on(netdev);
2859                 }
2860         } else {
2861                 if (tp->speed & LINK_STATUS) {
2862                         netif_carrier_off(netdev);
2863                         tasklet_disable(&tp->tl);
2864                         tp->rtl_ops.disable(tp);
2865                         tasklet_enable(&tp->tl);
2866                 }
2867         }
2868         tp->speed = speed;
2869 }
2870 
2871 static void rtl_work_func_t(struct work_struct *work)
2872 {
2873         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
2874 
2875         /* If the device is unplugged or !netif_running(), the workqueue
2876          * doesn't need to wake the device, and could return directly.
2877          */
2878         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
2879                 return;
2880 
2881         if (usb_autopm_get_interface(tp->intf) < 0)
2882                 return;
2883 
2884         if (!test_bit(WORK_ENABLE, &tp->flags))
2885                 goto out1;
2886 
2887         if (!mutex_trylock(&tp->control)) {
2888                 schedule_delayed_work(&tp->schedule, 0);
2889                 goto out1;
2890         }
2891 
2892         if (test_bit(RTL8152_LINK_CHG, &tp->flags))
2893                 set_carrier(tp);
2894 
2895         if (test_bit(RTL8152_SET_RX_MODE, &tp->flags))
2896                 _rtl8152_set_rx_mode(tp->netdev);
2897 
2898         if (test_bit(SCHEDULE_TASKLET, &tp->flags) &&
2899             (tp->speed & LINK_STATUS)) {
2900                 clear_bit(SCHEDULE_TASKLET, &tp->flags);
2901                 tasklet_schedule(&tp->tl);
2902         }
2903 
2904         if (test_bit(PHY_RESET, &tp->flags))
2905                 rtl_phy_reset(tp);
2906 
2907         mutex_unlock(&tp->control);
2908 
2909 out1:
2910         usb_autopm_put_interface(tp->intf);
2911 }
2912 
2913 static int rtl8152_open(struct net_device *netdev)
2914 {
2915         struct r8152 *tp = netdev_priv(netdev);
2916         int res = 0;
2917 
2918         res = alloc_all_mem(tp);
2919         if (res)
2920                 goto out;
2921 
2922         /* set speed to 0 to avoid autoresume try to submit rx */
2923         tp->speed = 0;
2924 
2925         res = usb_autopm_get_interface(tp->intf);
2926         if (res < 0) {
2927                 free_all_mem(tp);
2928                 goto out;
2929         }
2930 
2931         mutex_lock(&tp->control);
2932 
2933         /* The WORK_ENABLE may be set when autoresume occurs */
2934         if (test_bit(WORK_ENABLE, &tp->flags)) {
2935                 clear_bit(WORK_ENABLE, &tp->flags);
2936                 usb_kill_urb(tp->intr_urb);
2937                 cancel_delayed_work_sync(&tp->schedule);
2938 
2939                 /* disable the tx/rx, if the workqueue has enabled them. */
2940                 if (tp->speed & LINK_STATUS)
2941                         tp->rtl_ops.disable(tp);
2942         }
2943 
2944         tp->rtl_ops.up(tp);
2945 
2946         rtl8152_set_speed(tp, AUTONEG_ENABLE,
2947                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
2948                           DUPLEX_FULL);
2949         tp->speed = 0;
2950         netif_carrier_off(netdev);
2951         netif_start_queue(netdev);
2952         set_bit(WORK_ENABLE, &tp->flags);
2953 
2954         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
2955         if (res) {
2956                 if (res == -ENODEV)
2957                         netif_device_detach(tp->netdev);
2958                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
2959                            res);
2960                 free_all_mem(tp);
2961         } else {
2962                 tasklet_enable(&tp->tl);
2963         }
2964 
2965         mutex_unlock(&tp->control);
2966 
2967         usb_autopm_put_interface(tp->intf);
2968 
2969 out:
2970         return res;
2971 }
2972 
2973 static int rtl8152_close(struct net_device *netdev)
2974 {
2975         struct r8152 *tp = netdev_priv(netdev);
2976         int res = 0;
2977 
2978         tasklet_disable(&tp->tl);
2979         clear_bit(WORK_ENABLE, &tp->flags);
2980         usb_kill_urb(tp->intr_urb);
2981         cancel_delayed_work_sync(&tp->schedule);
2982         netif_stop_queue(netdev);
2983 
2984         res = usb_autopm_get_interface(tp->intf);
2985         if (res < 0) {
2986                 rtl_drop_queued_tx(tp);
2987         } else {
2988                 mutex_lock(&tp->control);
2989 
2990                 /* The autosuspend may have been enabled and wouldn't
2991                  * be disable when autoresume occurs, because the
2992                  * netif_running() would be false.
2993                  */
2994                 rtl_runtime_suspend_enable(tp, false);
2995 
2996                 tp->rtl_ops.down(tp);
2997 
2998                 mutex_unlock(&tp->control);
2999 
3000                 usb_autopm_put_interface(tp->intf);
3001         }
3002 
3003         free_all_mem(tp);
3004 
3005         return res;
3006 }
3007 
3008 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3009 {
3010         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3011         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3012         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3013 }
3014 
3015 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3016 {
3017         u16 data;
3018 
3019         r8152_mmd_indirect(tp, dev, reg);
3020         data = ocp_reg_read(tp, OCP_EEE_DATA);
3021         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3022 
3023         return data;
3024 }
3025 
3026 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3027 {
3028         r8152_mmd_indirect(tp, dev, reg);
3029         ocp_reg_write(tp, OCP_EEE_DATA, data);
3030         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3031 }
3032 
3033 static void r8152_eee_en(struct r8152 *tp, bool enable)
3034 {
3035         u16 config1, config2, config3;
3036         u32 ocp_data;
3037 
3038         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3039         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3040         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3041         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3042 
3043         if (enable) {
3044                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3045                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3046                 config1 |= sd_rise_time(1);
3047                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3048                 config3 |= fast_snr(42);
3049         } else {
3050                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3051                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3052                              RX_QUIET_EN);
3053                 config1 |= sd_rise_time(7);
3054                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3055                 config3 |= fast_snr(511);
3056         }
3057 
3058         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3059         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3060         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3061         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3062 }
3063 
3064 static void r8152b_enable_eee(struct r8152 *tp)
3065 {
3066         r8152_eee_en(tp, true);
3067         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3068 }
3069 
3070 static void r8153_eee_en(struct r8152 *tp, bool enable)
3071 {
3072         u32 ocp_data;
3073         u16 config;
3074 
3075         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3076         config = ocp_reg_read(tp, OCP_EEE_CFG);
3077 
3078         if (enable) {
3079                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3080                 config |= EEE10_EN;
3081         } else {
3082                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3083                 config &= ~EEE10_EN;
3084         }
3085 
3086         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3087         ocp_reg_write(tp, OCP_EEE_CFG, config);
3088 }
3089 
3090 static void r8153_enable_eee(struct r8152 *tp)
3091 {
3092         r8153_eee_en(tp, true);
3093         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3094 }
3095 
3096 static void r8152b_enable_fc(struct r8152 *tp)
3097 {
3098         u16 anar;
3099 
3100         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3101         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3102         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3103 }
3104 
3105 static void rtl_tally_reset(struct r8152 *tp)
3106 {
3107         u32 ocp_data;
3108 
3109         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3110         ocp_data |= TALLY_RESET;
3111         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3112 }
3113 
3114 static void r8152b_init(struct r8152 *tp)
3115 {
3116         u32 ocp_data;
3117 
3118         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3119                 return;
3120 
3121         r8152b_disable_aldps(tp);
3122 
3123         if (tp->version == RTL_VER_01) {
3124                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3125                 ocp_data &= ~LED_MODE_MASK;
3126                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3127         }
3128 
3129         r8152_power_cut_en(tp, false);
3130 
3131         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3132         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3133         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3134         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3135         ocp_data &= ~MCU_CLK_RATIO_MASK;
3136         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3137         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3138         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3139                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3140         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3141 
3142         r8152b_enable_eee(tp);
3143         r8152b_enable_aldps(tp);
3144         r8152b_enable_fc(tp);
3145         rtl_tally_reset(tp);
3146 
3147         /* enable rx aggregation */
3148         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3149         ocp_data &= ~RX_AGG_DISABLE;
3150         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3151 }
3152 
3153 static void r8153_init(struct r8152 *tp)
3154 {
3155         u32 ocp_data;
3156         int i;
3157 
3158         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3159                 return;
3160 
3161         r8153_disable_aldps(tp);
3162         r8153_u1u2en(tp, false);
3163 
3164         for (i = 0; i < 500; i++) {
3165                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3166                     AUTOLOAD_DONE)
3167                         break;
3168                 msleep(20);
3169         }
3170 
3171         for (i = 0; i < 500; i++) {
3172                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3173                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3174                         break;
3175                 msleep(20);
3176         }
3177 
3178         r8153_u2p3en(tp, false);
3179 
3180         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3181         ocp_data &= ~TIMER11_EN;
3182         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3183 
3184         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3185         ocp_data &= ~LED_MODE_MASK;
3186         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3187 
3188         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL);
3189         ocp_data &= ~LPM_TIMER_MASK;
3190         if (tp->udev->speed == USB_SPEED_SUPER)
3191                 ocp_data |= LPM_TIMER_500US;
3192         else
3193                 ocp_data |= LPM_TIMER_500MS;
3194         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3195 
3196         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3197         ocp_data &= ~SEN_VAL_MASK;
3198         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3199         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3200 
3201         r8153_power_cut_en(tp, false);
3202         r8153_u1u2en(tp, true);
3203 
3204         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3205         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3206         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3207                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3208                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3209         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3210                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3211                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3212                        EEE_SPDWN_EN);
3213 
3214         r8153_enable_eee(tp);
3215         r8153_enable_aldps(tp);
3216         r8152b_enable_fc(tp);
3217         rtl_tally_reset(tp);
3218 }
3219 
3220 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3221 {
3222         struct r8152 *tp = usb_get_intfdata(intf);
3223         struct net_device *netdev = tp->netdev;
3224         int ret = 0;
3225 
3226         mutex_lock(&tp->control);
3227 
3228         if (PMSG_IS_AUTO(message)) {
3229                 if (netif_running(netdev) && work_busy(&tp->schedule.work)) {
3230                         ret = -EBUSY;
3231                         goto out1;
3232                 }
3233 
3234                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3235         } else {
3236                 netif_device_detach(netdev);
3237         }
3238 
3239         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3240                 clear_bit(WORK_ENABLE, &tp->flags);
3241                 usb_kill_urb(tp->intr_urb);
3242                 tasklet_disable(&tp->tl);
3243                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3244                         rtl_stop_rx(tp);
3245                         rtl_runtime_suspend_enable(tp, true);
3246                 } else {
3247                         cancel_delayed_work_sync(&tp->schedule);
3248                         tp->rtl_ops.down(tp);
3249                 }
3250                 tasklet_enable(&tp->tl);
3251         }
3252 out1:
3253         mutex_unlock(&tp->control);
3254 
3255         return ret;
3256 }
3257 
3258 static int rtl8152_resume(struct usb_interface *intf)
3259 {
3260         struct r8152 *tp = usb_get_intfdata(intf);
3261 
3262         mutex_lock(&tp->control);
3263 
3264         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3265                 tp->rtl_ops.init(tp);
3266                 netif_device_attach(tp->netdev);
3267         }
3268 
3269         if (netif_running(tp->netdev)) {
3270                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3271                         rtl_runtime_suspend_enable(tp, false);
3272                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3273                         set_bit(WORK_ENABLE, &tp->flags);
3274                         if (tp->speed & LINK_STATUS)
3275                                 rtl_start_rx(tp);
3276                 } else {
3277                         tp->rtl_ops.up(tp);
3278                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3279                                           tp->mii.supports_gmii ?
3280                                           SPEED_1000 : SPEED_100,
3281                                           DUPLEX_FULL);
3282                         tp->speed = 0;
3283                         netif_carrier_off(tp->netdev);
3284                         set_bit(WORK_ENABLE, &tp->flags);
3285                 }
3286                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3287         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3288                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3289         }
3290 
3291         mutex_unlock(&tp->control);
3292 
3293         return 0;
3294 }
3295 
3296 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3297 {
3298         struct r8152 *tp = netdev_priv(dev);
3299 
3300         if (usb_autopm_get_interface(tp->intf) < 0)
3301                 return;
3302 
3303         mutex_lock(&tp->control);
3304 
3305         wol->supported = WAKE_ANY;
3306         wol->wolopts = __rtl_get_wol(tp);
3307 
3308         mutex_unlock(&tp->control);
3309 
3310         usb_autopm_put_interface(tp->intf);
3311 }
3312 
3313 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3314 {
3315         struct r8152 *tp = netdev_priv(dev);
3316         int ret;
3317 
3318         ret = usb_autopm_get_interface(tp->intf);
3319         if (ret < 0)
3320                 goto out_set_wol;
3321 
3322         mutex_lock(&tp->control);
3323 
3324         __rtl_set_wol(tp, wol->wolopts);
3325         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3326 
3327         mutex_unlock(&tp->control);
3328 
3329         usb_autopm_put_interface(tp->intf);
3330 
3331 out_set_wol:
3332         return ret;
3333 }
3334 
3335 static u32 rtl8152_get_msglevel(struct net_device *dev)
3336 {
3337         struct r8152 *tp = netdev_priv(dev);
3338 
3339         return tp->msg_enable;
3340 }
3341 
3342 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3343 {
3344         struct r8152 *tp = netdev_priv(dev);
3345 
3346         tp->msg_enable = value;
3347 }
3348 
3349 static void rtl8152_get_drvinfo(struct net_device *netdev,
3350                                 struct ethtool_drvinfo *info)
3351 {
3352         struct r8152 *tp = netdev_priv(netdev);
3353 
3354         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3355         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3356         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3357 }
3358 
3359 static
3360 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3361 {
3362         struct r8152 *tp = netdev_priv(netdev);
3363         int ret;
3364 
3365         if (!tp->mii.mdio_read)
3366                 return -EOPNOTSUPP;
3367 
3368         ret = usb_autopm_get_interface(tp->intf);
3369         if (ret < 0)
3370                 goto out;
3371 
3372         mutex_lock(&tp->control);
3373 
3374         ret = mii_ethtool_gset(&tp->mii, cmd);
3375 
3376         mutex_unlock(&tp->control);
3377 
3378         usb_autopm_put_interface(tp->intf);
3379 
3380 out:
3381         return ret;
3382 }
3383 
3384 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3385 {
3386         struct r8152 *tp = netdev_priv(dev);
3387         int ret;
3388 
3389         ret = usb_autopm_get_interface(tp->intf);
3390         if (ret < 0)
3391                 goto out;
3392 
3393         mutex_lock(&tp->control);
3394 
3395         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3396 
3397         mutex_unlock(&tp->control);
3398 
3399         usb_autopm_put_interface(tp->intf);
3400 
3401 out:
3402         return ret;
3403 }
3404 
3405 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3406         "tx_packets",
3407         "rx_packets",
3408         "tx_errors",
3409         "rx_errors",
3410         "rx_missed",
3411         "align_errors",
3412         "tx_single_collisions",
3413         "tx_multi_collisions",
3414         "rx_unicast",
3415         "rx_broadcast",
3416         "rx_multicast",
3417         "tx_aborted",
3418         "tx_underrun",
3419 };
3420 
3421 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3422 {
3423         switch (sset) {
3424         case ETH_SS_STATS:
3425                 return ARRAY_SIZE(rtl8152_gstrings);
3426         default:
3427                 return -EOPNOTSUPP;
3428         }
3429 }
3430 
3431 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3432                                       struct ethtool_stats *stats, u64 *data)
3433 {
3434         struct r8152 *tp = netdev_priv(dev);
3435         struct tally_counter tally;
3436 
3437         if (usb_autopm_get_interface(tp->intf) < 0)
3438                 return;
3439 
3440         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3441 
3442         usb_autopm_put_interface(tp->intf);
3443 
3444         data[0] = le64_to_cpu(tally.tx_packets);
3445         data[1] = le64_to_cpu(tally.rx_packets);
3446         data[2] = le64_to_cpu(tally.tx_errors);
3447         data[3] = le32_to_cpu(tally.rx_errors);
3448         data[4] = le16_to_cpu(tally.rx_missed);
3449         data[5] = le16_to_cpu(tally.align_errors);
3450         data[6] = le32_to_cpu(tally.tx_one_collision);
3451         data[7] = le32_to_cpu(tally.tx_multi_collision);
3452         data[8] = le64_to_cpu(tally.rx_unicast);
3453         data[9] = le64_to_cpu(tally.rx_broadcast);
3454         data[10] = le32_to_cpu(tally.rx_multicast);
3455         data[11] = le16_to_cpu(tally.tx_aborted);
3456         data[12] = le16_to_cpu(tally.tx_underrun);
3457 }
3458 
3459 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3460 {
3461         switch (stringset) {
3462         case ETH_SS_STATS:
3463                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3464                 break;
3465         }
3466 }
3467 
3468 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3469 {
3470         u32 ocp_data, lp, adv, supported = 0;
3471         u16 val;
3472 
3473         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3474         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3475 
3476         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3477         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3478 
3479         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3480         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3481 
3482         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3483         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3484 
3485         eee->eee_enabled = !!ocp_data;
3486         eee->eee_active = !!(supported & adv & lp);
3487         eee->supported = supported;
3488         eee->advertised = adv;
3489         eee->lp_advertised = lp;
3490 
3491         return 0;
3492 }
3493 
3494 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3495 {
3496         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3497 
3498         r8152_eee_en(tp, eee->eee_enabled);
3499 
3500         if (!eee->eee_enabled)
3501                 val = 0;
3502 
3503         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3504 
3505         return 0;
3506 }
3507 
3508 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3509 {
3510         u32 ocp_data, lp, adv, supported = 0;
3511         u16 val;
3512 
3513         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3514         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3515 
3516         val = ocp_reg_read(tp, OCP_EEE_ADV);
3517         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3518 
3519         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3520         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3521 
3522         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3523         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3524 
3525         eee->eee_enabled = !!ocp_data;
3526         eee->eee_active = !!(supported & adv & lp);
3527         eee->supported = supported;
3528         eee->advertised = adv;
3529         eee->lp_advertised = lp;
3530 
3531         return 0;
3532 }
3533 
3534 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3535 {
3536         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3537 
3538         r8153_eee_en(tp, eee->eee_enabled);
3539 
3540         if (!eee->eee_enabled)
3541                 val = 0;
3542 
3543         ocp_reg_write(tp, OCP_EEE_ADV, val);
3544 
3545         return 0;
3546 }
3547 
3548 static int
3549 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3550 {
3551         struct r8152 *tp = netdev_priv(net);
3552         int ret;
3553 
3554         ret = usb_autopm_get_interface(tp->intf);
3555         if (ret < 0)
3556                 goto out;
3557 
3558         mutex_lock(&tp->control);
3559 
3560         ret = tp->rtl_ops.eee_get(tp, edata);
3561 
3562         mutex_unlock(&tp->control);
3563 
3564         usb_autopm_put_interface(tp->intf);
3565 
3566 out:
3567         return ret;
3568 }
3569 
3570 static int
3571 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3572 {
3573         struct r8152 *tp = netdev_priv(net);
3574         int ret;
3575 
3576         ret = usb_autopm_get_interface(tp->intf);
3577         if (ret < 0)
3578                 goto out;
3579 
3580         mutex_lock(&tp->control);
3581 
3582         ret = tp->rtl_ops.eee_set(tp, edata);
3583         if (!ret)
3584                 ret = mii_nway_restart(&tp->mii);
3585 
3586         mutex_unlock(&tp->control);
3587 
3588         usb_autopm_put_interface(tp->intf);
3589 
3590 out:
3591         return ret;
3592 }
3593 
3594 static int rtl8152_nway_reset(struct net_device *dev)
3595 {
3596         struct r8152 *tp = netdev_priv(dev);
3597         int ret;
3598 
3599         ret = usb_autopm_get_interface(tp->intf);
3600         if (ret < 0)
3601                 goto out;
3602 
3603         mutex_lock(&tp->control);
3604 
3605         ret = mii_nway_restart(&tp->mii);
3606 
3607         mutex_unlock(&tp->control);
3608 
3609         usb_autopm_put_interface(tp->intf);
3610 
3611 out:
3612         return ret;
3613 }
3614 
3615 static struct ethtool_ops ops = {
3616         .get_drvinfo = rtl8152_get_drvinfo,
3617         .get_settings = rtl8152_get_settings,
3618         .set_settings = rtl8152_set_settings,
3619         .get_link = ethtool_op_get_link,
3620         .nway_reset = rtl8152_nway_reset,
3621         .get_msglevel = rtl8152_get_msglevel,
3622         .set_msglevel = rtl8152_set_msglevel,
3623         .get_wol = rtl8152_get_wol,
3624         .set_wol = rtl8152_set_wol,
3625         .get_strings = rtl8152_get_strings,
3626         .get_sset_count = rtl8152_get_sset_count,
3627         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3628         .get_eee = rtl_ethtool_get_eee,
3629         .set_eee = rtl_ethtool_set_eee,
3630 };
3631 
3632 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3633 {
3634         struct r8152 *tp = netdev_priv(netdev);
3635         struct mii_ioctl_data *data = if_mii(rq);
3636         int res;
3637 
3638         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3639                 return -ENODEV;
3640 
3641         res = usb_autopm_get_interface(tp->intf);
3642         if (res < 0)
3643                 goto out;
3644 
3645         switch (cmd) {
3646         case SIOCGMIIPHY:
3647                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3648                 break;
3649 
3650         case SIOCGMIIREG:
3651                 mutex_lock(&tp->control);
3652                 data->val_out = r8152_mdio_read(tp, data->reg_num);
3653                 mutex_unlock(&tp->control);
3654                 break;
3655 
3656         case SIOCSMIIREG:
3657                 if (!capable(CAP_NET_ADMIN)) {
3658                         res = -EPERM;
3659                         break;
3660                 }
3661                 mutex_lock(&tp->control);
3662                 r8152_mdio_write(tp, data->reg_num, data->val_in);
3663                 mutex_unlock(&tp->control);
3664                 break;
3665 
3666         default:
3667                 res = -EOPNOTSUPP;
3668         }
3669 
3670         usb_autopm_put_interface(tp->intf);
3671 
3672 out:
3673         return res;
3674 }
3675 
3676 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
3677 {
3678         struct r8152 *tp = netdev_priv(dev);
3679 
3680         switch (tp->version) {
3681         case RTL_VER_01:
3682         case RTL_VER_02:
3683                 return eth_change_mtu(dev, new_mtu);
3684         default:
3685                 break;
3686         }
3687 
3688         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
3689                 return -EINVAL;
3690 
3691         dev->mtu = new_mtu;
3692 
3693         return 0;
3694 }
3695 
3696 static const struct net_device_ops rtl8152_netdev_ops = {
3697         .ndo_open               = rtl8152_open,
3698         .ndo_stop               = rtl8152_close,
3699         .ndo_do_ioctl           = rtl8152_ioctl,
3700         .ndo_start_xmit         = rtl8152_start_xmit,
3701         .ndo_tx_timeout         = rtl8152_tx_timeout,
3702         .ndo_set_features       = rtl8152_set_features,
3703         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
3704         .ndo_set_mac_address    = rtl8152_set_mac_address,
3705         .ndo_change_mtu         = rtl8152_change_mtu,
3706         .ndo_validate_addr      = eth_validate_addr,
3707         .ndo_features_check     = rtl8152_features_check,
3708 };
3709 
3710 static void r8152b_get_version(struct r8152 *tp)
3711 {
3712         u32     ocp_data;
3713         u16     version;
3714 
3715         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
3716         version = (u16)(ocp_data & VERSION_MASK);
3717 
3718         switch (version) {
3719         case 0x4c00:
3720                 tp->version = RTL_VER_01;
3721                 break;
3722         case 0x4c10:
3723                 tp->version = RTL_VER_02;
3724                 break;
3725         case 0x5c00:
3726                 tp->version = RTL_VER_03;
3727                 tp->mii.supports_gmii = 1;
3728                 break;
3729         case 0x5c10:
3730                 tp->version = RTL_VER_04;
3731                 tp->mii.supports_gmii = 1;
3732                 break;
3733         case 0x5c20:
3734                 tp->version = RTL_VER_05;
3735                 tp->mii.supports_gmii = 1;
3736                 break;
3737         default:
3738                 netif_info(tp, probe, tp->netdev,
3739                            "Unknown version 0x%04x\n", version);
3740                 break;
3741         }
3742 }
3743 
3744 static void rtl8152_unload(struct r8152 *tp)
3745 {
3746         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3747                 return;
3748 
3749         if (tp->version != RTL_VER_01)
3750                 r8152_power_cut_en(tp, true);
3751 }
3752 
3753 static void rtl8153_unload(struct r8152 *tp)
3754 {
3755         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3756                 return;
3757 
3758         r8153_power_cut_en(tp, false);
3759 }
3760 
3761 static int rtl_ops_init(struct r8152 *tp)
3762 {
3763         struct rtl_ops *ops = &tp->rtl_ops;
3764         int ret = 0;
3765 
3766         switch (tp->version) {
3767         case RTL_VER_01:
3768         case RTL_VER_02:
3769                 ops->init               = r8152b_init;
3770                 ops->enable             = rtl8152_enable;
3771                 ops->disable            = rtl8152_disable;
3772                 ops->up                 = rtl8152_up;
3773                 ops->down               = rtl8152_down;
3774                 ops->unload             = rtl8152_unload;
3775                 ops->eee_get            = r8152_get_eee;
3776                 ops->eee_set            = r8152_set_eee;
3777                 break;
3778 
3779         case RTL_VER_03:
3780         case RTL_VER_04:
3781         case RTL_VER_05:
3782                 ops->init               = r8153_init;
3783                 ops->enable             = rtl8153_enable;
3784                 ops->disable            = rtl8153_disable;
3785                 ops->up                 = rtl8153_up;
3786                 ops->down               = rtl8153_down;
3787                 ops->unload             = rtl8153_unload;
3788                 ops->eee_get            = r8153_get_eee;
3789                 ops->eee_set            = r8153_set_eee;
3790                 break;
3791 
3792         default:
3793                 ret = -ENODEV;
3794                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
3795                 break;
3796         }
3797 
3798         return ret;
3799 }
3800 
3801 static int rtl8152_probe(struct usb_interface *intf,
3802                          const struct usb_device_id *id)
3803 {
3804         struct usb_device *udev = interface_to_usbdev(intf);
3805         struct r8152 *tp;
3806         struct net_device *netdev;
3807         int ret;
3808 
3809         if (udev->actconfig->desc.bConfigurationValue != 1) {
3810                 usb_driver_set_configuration(udev, 1);
3811                 return -ENODEV;
3812         }
3813 
3814         usb_reset_device(udev);
3815         netdev = alloc_etherdev(sizeof(struct r8152));
3816         if (!netdev) {
3817                 dev_err(&intf->dev, "Out of memory\n");
3818                 return -ENOMEM;
3819         }
3820 
3821         SET_NETDEV_DEV(netdev, &intf->dev);
3822         tp = netdev_priv(netdev);
3823         tp->msg_enable = 0x7FFF;
3824 
3825         tp->udev = udev;
3826         tp->netdev = netdev;
3827         tp->intf = intf;
3828 
3829         r8152b_get_version(tp);
3830         ret = rtl_ops_init(tp);
3831         if (ret)
3832                 goto out;
3833 
3834         tasklet_init(&tp->tl, bottom_half, (unsigned long)tp);
3835         mutex_init(&tp->control);
3836         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
3837 
3838         netdev->netdev_ops = &rtl8152_netdev_ops;
3839         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
3840 
3841         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3842                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
3843                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
3844                             NETIF_F_HW_VLAN_CTAG_TX;
3845         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
3846                               NETIF_F_TSO | NETIF_F_FRAGLIST |
3847                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
3848                               NETIF_F_HW_VLAN_CTAG_RX |
3849                               NETIF_F_HW_VLAN_CTAG_TX;
3850         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
3851                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
3852                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
3853 
3854         netdev->ethtool_ops = &ops;
3855         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
3856 
3857         tp->mii.dev = netdev;
3858         tp->mii.mdio_read = read_mii_word;
3859         tp->mii.mdio_write = write_mii_word;
3860         tp->mii.phy_id_mask = 0x3f;
3861         tp->mii.reg_num_mask = 0x1f;
3862         tp->mii.phy_id = R8152_PHY_ID;
3863 
3864         intf->needs_remote_wakeup = 1;
3865 
3866         tp->rtl_ops.init(tp);
3867         set_ethernet_addr(tp);
3868 
3869         usb_set_intfdata(intf, tp);
3870 
3871         ret = register_netdev(netdev);
3872         if (ret != 0) {
3873                 netif_err(tp, probe, netdev, "couldn't register the device\n");
3874                 goto out1;
3875         }
3876 
3877         tp->saved_wolopts = __rtl_get_wol(tp);
3878         if (tp->saved_wolopts)
3879                 device_set_wakeup_enable(&udev->dev, true);
3880         else
3881                 device_set_wakeup_enable(&udev->dev, false);
3882 
3883         tasklet_disable(&tp->tl);
3884 
3885         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
3886 
3887         return 0;
3888 
3889 out1:
3890         usb_set_intfdata(intf, NULL);
3891         tasklet_kill(&tp->tl);
3892 out:
3893         free_netdev(netdev);
3894         return ret;
3895 }
3896 
3897 static void rtl8152_disconnect(struct usb_interface *intf)
3898 {
3899         struct r8152 *tp = usb_get_intfdata(intf);
3900 
3901         usb_set_intfdata(intf, NULL);
3902         if (tp) {
3903                 struct usb_device *udev = tp->udev;
3904 
3905                 if (udev->state == USB_STATE_NOTATTACHED)
3906                         set_bit(RTL8152_UNPLUG, &tp->flags);
3907 
3908                 tasklet_kill(&tp->tl);
3909                 unregister_netdev(tp->netdev);
3910                 tp->rtl_ops.unload(tp);
3911                 free_netdev(tp->netdev);
3912         }
3913 }
3914 
3915 #define REALTEK_USB_DEVICE(vend, prod)  \
3916         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
3917                        USB_DEVICE_ID_MATCH_INT_CLASS, \
3918         .idVendor = (vend), \
3919         .idProduct = (prod), \
3920         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
3921 }, \
3922 { \
3923         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
3924                        USB_DEVICE_ID_MATCH_DEVICE, \
3925         .idVendor = (vend), \
3926         .idProduct = (prod), \
3927         .bInterfaceClass = USB_CLASS_COMM, \
3928         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
3929         .bInterfaceProtocol = USB_CDC_PROTO_NONE
3930 
3931 /* table of devices that work with this driver */
3932 static struct usb_device_id rtl8152_table[] = {
3933         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
3934         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
3935         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
3936         {}
3937 };
3938 
3939 MODULE_DEVICE_TABLE(usb, rtl8152_table);
3940 
3941 static struct usb_driver rtl8152_driver = {
3942         .name =         MODULENAME,
3943         .id_table =     rtl8152_table,
3944         .probe =        rtl8152_probe,
3945         .disconnect =   rtl8152_disconnect,
3946         .suspend =      rtl8152_suspend,
3947         .resume =       rtl8152_resume,
3948         .reset_resume = rtl8152_resume,
3949         .supports_autosuspend = 1,
3950         .disable_hub_initiated_lpm = 1,
3951 };
3952 
3953 module_usb_driver(rtl8152_driver);
3954 
3955 MODULE_AUTHOR(DRIVER_AUTHOR);
3956 MODULE_DESCRIPTION(DRIVER_DESC);
3957 MODULE_LICENSE("GPL");
3958 

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