Version:  2.0.40 2.2.26 2.4.37 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6

Linux/drivers/net/usb/r8152.c

  1 /*
  2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
  3  *
  4  * This program is free software; you can redistribute it and/or
  5  * modify it under the terms of the GNU General Public License
  6  * version 2 as published by the Free Software Foundation.
  7  *
  8  */
  9 
 10 #include <linux/signal.h>
 11 #include <linux/slab.h>
 12 #include <linux/module.h>
 13 #include <linux/netdevice.h>
 14 #include <linux/etherdevice.h>
 15 #include <linux/mii.h>
 16 #include <linux/ethtool.h>
 17 #include <linux/usb.h>
 18 #include <linux/crc32.h>
 19 #include <linux/if_vlan.h>
 20 #include <linux/uaccess.h>
 21 #include <linux/list.h>
 22 #include <linux/ip.h>
 23 #include <linux/ipv6.h>
 24 #include <net/ip6_checksum.h>
 25 #include <uapi/linux/mdio.h>
 26 #include <linux/mdio.h>
 27 #include <linux/usb/cdc.h>
 28 #include <linux/suspend.h>
 29 
 30 /* Information for net-next */
 31 #define NETNEXT_VERSION         "08"
 32 
 33 /* Information for net */
 34 #define NET_VERSION             "3"
 35 
 36 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
 37 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
 38 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
 39 #define MODULENAME "r8152"
 40 
 41 #define R8152_PHY_ID            32
 42 
 43 #define PLA_IDR                 0xc000
 44 #define PLA_RCR                 0xc010
 45 #define PLA_RMS                 0xc016
 46 #define PLA_RXFIFO_CTRL0        0xc0a0
 47 #define PLA_RXFIFO_CTRL1        0xc0a4
 48 #define PLA_RXFIFO_CTRL2        0xc0a8
 49 #define PLA_DMY_REG0            0xc0b0
 50 #define PLA_FMC                 0xc0b4
 51 #define PLA_CFG_WOL             0xc0b6
 52 #define PLA_TEREDO_CFG          0xc0bc
 53 #define PLA_MAR                 0xcd00
 54 #define PLA_BACKUP              0xd000
 55 #define PAL_BDC_CR              0xd1a0
 56 #define PLA_TEREDO_TIMER        0xd2cc
 57 #define PLA_REALWOW_TIMER       0xd2e8
 58 #define PLA_LEDSEL              0xdd90
 59 #define PLA_LED_FEATURE         0xdd92
 60 #define PLA_PHYAR               0xde00
 61 #define PLA_BOOT_CTRL           0xe004
 62 #define PLA_GPHY_INTR_IMR       0xe022
 63 #define PLA_EEE_CR              0xe040
 64 #define PLA_EEEP_CR             0xe080
 65 #define PLA_MAC_PWR_CTRL        0xe0c0
 66 #define PLA_MAC_PWR_CTRL2       0xe0ca
 67 #define PLA_MAC_PWR_CTRL3       0xe0cc
 68 #define PLA_MAC_PWR_CTRL4       0xe0ce
 69 #define PLA_WDT6_CTRL           0xe428
 70 #define PLA_TCR0                0xe610
 71 #define PLA_TCR1                0xe612
 72 #define PLA_MTPS                0xe615
 73 #define PLA_TXFIFO_CTRL         0xe618
 74 #define PLA_RSTTALLY            0xe800
 75 #define PLA_CR                  0xe813
 76 #define PLA_CRWECR              0xe81c
 77 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
 78 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
 79 #define PLA_CONFIG5             0xe822
 80 #define PLA_PHY_PWR             0xe84c
 81 #define PLA_OOB_CTRL            0xe84f
 82 #define PLA_CPCR                0xe854
 83 #define PLA_MISC_0              0xe858
 84 #define PLA_MISC_1              0xe85a
 85 #define PLA_OCP_GPHY_BASE       0xe86c
 86 #define PLA_TALLYCNT            0xe890
 87 #define PLA_SFF_STS_7           0xe8de
 88 #define PLA_PHYSTATUS           0xe908
 89 #define PLA_BP_BA               0xfc26
 90 #define PLA_BP_0                0xfc28
 91 #define PLA_BP_1                0xfc2a
 92 #define PLA_BP_2                0xfc2c
 93 #define PLA_BP_3                0xfc2e
 94 #define PLA_BP_4                0xfc30
 95 #define PLA_BP_5                0xfc32
 96 #define PLA_BP_6                0xfc34
 97 #define PLA_BP_7                0xfc36
 98 #define PLA_BP_EN               0xfc38
 99 
100 #define USB_USB2PHY             0xb41e
101 #define USB_SSPHYLINK2          0xb428
102 #define USB_U2P3_CTRL           0xb460
103 #define USB_CSR_DUMMY1          0xb464
104 #define USB_CSR_DUMMY2          0xb466
105 #define USB_DEV_STAT            0xb808
106 #define USB_CONNECT_TIMER       0xcbf8
107 #define USB_BURST_SIZE          0xcfc0
108 #define USB_USB_CTRL            0xd406
109 #define USB_PHY_CTRL            0xd408
110 #define USB_TX_AGG              0xd40a
111 #define USB_RX_BUF_TH           0xd40c
112 #define USB_USB_TIMER           0xd428
113 #define USB_RX_EARLY_TIMEOUT    0xd42c
114 #define USB_RX_EARLY_SIZE       0xd42e
115 #define USB_PM_CTRL_STATUS      0xd432
116 #define USB_TX_DMA              0xd434
117 #define USB_TOLERANCE           0xd490
118 #define USB_LPM_CTRL            0xd41a
119 #define USB_UPS_CTRL            0xd800
120 #define USB_MISC_0              0xd81a
121 #define USB_POWER_CUT           0xd80a
122 #define USB_AFE_CTRL2           0xd824
123 #define USB_WDT11_CTRL          0xe43c
124 #define USB_BP_BA               0xfc26
125 #define USB_BP_0                0xfc28
126 #define USB_BP_1                0xfc2a
127 #define USB_BP_2                0xfc2c
128 #define USB_BP_3                0xfc2e
129 #define USB_BP_4                0xfc30
130 #define USB_BP_5                0xfc32
131 #define USB_BP_6                0xfc34
132 #define USB_BP_7                0xfc36
133 #define USB_BP_EN               0xfc38
134 
135 /* OCP Registers */
136 #define OCP_ALDPS_CONFIG        0x2010
137 #define OCP_EEE_CONFIG1         0x2080
138 #define OCP_EEE_CONFIG2         0x2092
139 #define OCP_EEE_CONFIG3         0x2094
140 #define OCP_BASE_MII            0xa400
141 #define OCP_EEE_AR              0xa41a
142 #define OCP_EEE_DATA            0xa41c
143 #define OCP_PHY_STATUS          0xa420
144 #define OCP_POWER_CFG           0xa430
145 #define OCP_EEE_CFG             0xa432
146 #define OCP_SRAM_ADDR           0xa436
147 #define OCP_SRAM_DATA           0xa438
148 #define OCP_DOWN_SPEED          0xa442
149 #define OCP_EEE_ABLE            0xa5c4
150 #define OCP_EEE_ADV             0xa5d0
151 #define OCP_EEE_LPABLE          0xa5d2
152 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
153 #define OCP_ADC_CFG             0xbc06
154 
155 /* SRAM Register */
156 #define SRAM_LPF_CFG            0x8012
157 #define SRAM_10M_AMP1           0x8080
158 #define SRAM_10M_AMP2           0x8082
159 #define SRAM_IMPEDANCE          0x8084
160 
161 /* PLA_RCR */
162 #define RCR_AAP                 0x00000001
163 #define RCR_APM                 0x00000002
164 #define RCR_AM                  0x00000004
165 #define RCR_AB                  0x00000008
166 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
167 
168 /* PLA_RXFIFO_CTRL0 */
169 #define RXFIFO_THR1_NORMAL      0x00080002
170 #define RXFIFO_THR1_OOB         0x01800003
171 
172 /* PLA_RXFIFO_CTRL1 */
173 #define RXFIFO_THR2_FULL        0x00000060
174 #define RXFIFO_THR2_HIGH        0x00000038
175 #define RXFIFO_THR2_OOB         0x0000004a
176 #define RXFIFO_THR2_NORMAL      0x00a0
177 
178 /* PLA_RXFIFO_CTRL2 */
179 #define RXFIFO_THR3_FULL        0x00000078
180 #define RXFIFO_THR3_HIGH        0x00000048
181 #define RXFIFO_THR3_OOB         0x0000005a
182 #define RXFIFO_THR3_NORMAL      0x0110
183 
184 /* PLA_TXFIFO_CTRL */
185 #define TXFIFO_THR_NORMAL       0x00400008
186 #define TXFIFO_THR_NORMAL2      0x01000008
187 
188 /* PLA_DMY_REG0 */
189 #define ECM_ALDPS               0x0002
190 
191 /* PLA_FMC */
192 #define FMC_FCR_MCU_EN          0x0001
193 
194 /* PLA_EEEP_CR */
195 #define EEEP_CR_EEEP_TX         0x0002
196 
197 /* PLA_WDT6_CTRL */
198 #define WDT6_SET_MODE           0x0010
199 
200 /* PLA_TCR0 */
201 #define TCR0_TX_EMPTY           0x0800
202 #define TCR0_AUTO_FIFO          0x0080
203 
204 /* PLA_TCR1 */
205 #define VERSION_MASK            0x7cf0
206 
207 /* PLA_MTPS */
208 #define MTPS_JUMBO              (12 * 1024 / 64)
209 #define MTPS_DEFAULT            (6 * 1024 / 64)
210 
211 /* PLA_RSTTALLY */
212 #define TALLY_RESET             0x0001
213 
214 /* PLA_CR */
215 #define CR_RST                  0x10
216 #define CR_RE                   0x08
217 #define CR_TE                   0x04
218 
219 /* PLA_CRWECR */
220 #define CRWECR_NORAML           0x00
221 #define CRWECR_CONFIG           0xc0
222 
223 /* PLA_OOB_CTRL */
224 #define NOW_IS_OOB              0x80
225 #define TXFIFO_EMPTY            0x20
226 #define RXFIFO_EMPTY            0x10
227 #define LINK_LIST_READY         0x02
228 #define DIS_MCU_CLROOB          0x01
229 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
230 
231 /* PLA_MISC_1 */
232 #define RXDY_GATED_EN           0x0008
233 
234 /* PLA_SFF_STS_7 */
235 #define RE_INIT_LL              0x8000
236 #define MCU_BORW_EN             0x4000
237 
238 /* PLA_CPCR */
239 #define CPCR_RX_VLAN            0x0040
240 
241 /* PLA_CFG_WOL */
242 #define MAGIC_EN                0x0001
243 
244 /* PLA_TEREDO_CFG */
245 #define TEREDO_SEL              0x8000
246 #define TEREDO_WAKE_MASK        0x7f00
247 #define TEREDO_RS_EVENT_MASK    0x00fe
248 #define OOB_TEREDO_EN           0x0001
249 
250 /* PAL_BDC_CR */
251 #define ALDPS_PROXY_MODE        0x0001
252 
253 /* PLA_CONFIG34 */
254 #define LINK_ON_WAKE_EN         0x0010
255 #define LINK_OFF_WAKE_EN        0x0008
256 
257 /* PLA_CONFIG5 */
258 #define BWF_EN                  0x0040
259 #define MWF_EN                  0x0020
260 #define UWF_EN                  0x0010
261 #define LAN_WAKE_EN             0x0002
262 
263 /* PLA_LED_FEATURE */
264 #define LED_MODE_MASK           0x0700
265 
266 /* PLA_PHY_PWR */
267 #define TX_10M_IDLE_EN          0x0080
268 #define PFM_PWM_SWITCH          0x0040
269 
270 /* PLA_MAC_PWR_CTRL */
271 #define D3_CLK_GATED_EN         0x00004000
272 #define MCU_CLK_RATIO           0x07010f07
273 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
274 #define ALDPS_SPDWN_RATIO       0x0f87
275 
276 /* PLA_MAC_PWR_CTRL2 */
277 #define EEE_SPDWN_RATIO         0x8007
278 
279 /* PLA_MAC_PWR_CTRL3 */
280 #define PKT_AVAIL_SPDWN_EN      0x0100
281 #define SUSPEND_SPDWN_EN        0x0004
282 #define U1U2_SPDWN_EN           0x0002
283 #define L1_SPDWN_EN             0x0001
284 
285 /* PLA_MAC_PWR_CTRL4 */
286 #define PWRSAVE_SPDWN_EN        0x1000
287 #define RXDV_SPDWN_EN           0x0800
288 #define TX10MIDLE_EN            0x0100
289 #define TP100_SPDWN_EN          0x0020
290 #define TP500_SPDWN_EN          0x0010
291 #define TP1000_SPDWN_EN         0x0008
292 #define EEE_SPDWN_EN            0x0001
293 
294 /* PLA_GPHY_INTR_IMR */
295 #define GPHY_STS_MSK            0x0001
296 #define SPEED_DOWN_MSK          0x0002
297 #define SPDWN_RXDV_MSK          0x0004
298 #define SPDWN_LINKCHG_MSK       0x0008
299 
300 /* PLA_PHYAR */
301 #define PHYAR_FLAG              0x80000000
302 
303 /* PLA_EEE_CR */
304 #define EEE_RX_EN               0x0001
305 #define EEE_TX_EN               0x0002
306 
307 /* PLA_BOOT_CTRL */
308 #define AUTOLOAD_DONE           0x0002
309 
310 /* USB_USB2PHY */
311 #define USB2PHY_SUSPEND         0x0001
312 #define USB2PHY_L1              0x0002
313 
314 /* USB_SSPHYLINK2 */
315 #define pwd_dn_scale_mask       0x3ffe
316 #define pwd_dn_scale(x)         ((x) << 1)
317 
318 /* USB_CSR_DUMMY1 */
319 #define DYNAMIC_BURST           0x0001
320 
321 /* USB_CSR_DUMMY2 */
322 #define EP4_FULL_FC             0x0001
323 
324 /* USB_DEV_STAT */
325 #define STAT_SPEED_MASK         0x0006
326 #define STAT_SPEED_HIGH         0x0000
327 #define STAT_SPEED_FULL         0x0002
328 
329 /* USB_TX_AGG */
330 #define TX_AGG_MAX_THRESHOLD    0x03
331 
332 /* USB_RX_BUF_TH */
333 #define RX_THR_SUPPER           0x0c350180
334 #define RX_THR_HIGH             0x7a120180
335 #define RX_THR_SLOW             0xffff0180
336 
337 /* USB_TX_DMA */
338 #define TEST_MODE_DISABLE       0x00000001
339 #define TX_SIZE_ADJUST1         0x00000100
340 
341 /* USB_UPS_CTRL */
342 #define POWER_CUT               0x0100
343 
344 /* USB_PM_CTRL_STATUS */
345 #define RESUME_INDICATE         0x0001
346 
347 /* USB_USB_CTRL */
348 #define RX_AGG_DISABLE          0x0010
349 #define RX_ZERO_EN              0x0080
350 
351 /* USB_U2P3_CTRL */
352 #define U2P3_ENABLE             0x0001
353 
354 /* USB_POWER_CUT */
355 #define PWR_EN                  0x0001
356 #define PHASE2_EN               0x0008
357 
358 /* USB_MISC_0 */
359 #define PCUT_STATUS             0x0001
360 
361 /* USB_RX_EARLY_TIMEOUT */
362 #define COALESCE_SUPER           85000U
363 #define COALESCE_HIGH           250000U
364 #define COALESCE_SLOW           524280U
365 
366 /* USB_WDT11_CTRL */
367 #define TIMER11_EN              0x0001
368 
369 /* USB_LPM_CTRL */
370 /* bit 4 ~ 5: fifo empty boundary */
371 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
372 /* bit 2 ~ 3: LMP timer */
373 #define LPM_TIMER_MASK          0x0c
374 #define LPM_TIMER_500MS         0x04    /* 500 ms */
375 #define LPM_TIMER_500US         0x0c    /* 500 us */
376 #define ROK_EXIT_LPM            0x02
377 
378 /* USB_AFE_CTRL2 */
379 #define SEN_VAL_MASK            0xf800
380 #define SEN_VAL_NORMAL          0xa000
381 #define SEL_RXIDLE              0x0100
382 
383 /* OCP_ALDPS_CONFIG */
384 #define ENPWRSAVE               0x8000
385 #define ENPDNPS                 0x0200
386 #define LINKENA                 0x0100
387 #define DIS_SDSAVE              0x0010
388 
389 /* OCP_PHY_STATUS */
390 #define PHY_STAT_MASK           0x0007
391 #define PHY_STAT_LAN_ON         3
392 #define PHY_STAT_PWRDN          5
393 
394 /* OCP_POWER_CFG */
395 #define EEE_CLKDIV_EN           0x8000
396 #define EN_ALDPS                0x0004
397 #define EN_10M_PLLOFF           0x0001
398 
399 /* OCP_EEE_CONFIG1 */
400 #define RG_TXLPI_MSK_HFDUP      0x8000
401 #define RG_MATCLR_EN            0x4000
402 #define EEE_10_CAP              0x2000
403 #define EEE_NWAY_EN             0x1000
404 #define TX_QUIET_EN             0x0200
405 #define RX_QUIET_EN             0x0100
406 #define sd_rise_time_mask       0x0070
407 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
408 #define RG_RXLPI_MSK_HFDUP      0x0008
409 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
410 
411 /* OCP_EEE_CONFIG2 */
412 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
413 #define RG_DACQUIET_EN          0x0400
414 #define RG_LDVQUIET_EN          0x0200
415 #define RG_CKRSEL               0x0020
416 #define RG_EEEPRG_EN            0x0010
417 
418 /* OCP_EEE_CONFIG3 */
419 #define fast_snr_mask           0xff80
420 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
421 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
422 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
423 
424 /* OCP_EEE_AR */
425 /* bit[15:14] function */
426 #define FUN_ADDR                0x0000
427 #define FUN_DATA                0x4000
428 /* bit[4:0] device addr */
429 
430 /* OCP_EEE_CFG */
431 #define CTAP_SHORT_EN           0x0040
432 #define EEE10_EN                0x0010
433 
434 /* OCP_DOWN_SPEED */
435 #define EN_10M_BGOFF            0x0080
436 
437 /* OCP_PHY_STATE */
438 #define TXDIS_STATE             0x01
439 #define ABD_STATE               0x02
440 
441 /* OCP_ADC_CFG */
442 #define CKADSEL_L               0x0100
443 #define ADC_EN                  0x0080
444 #define EN_EMI_L                0x0040
445 
446 /* SRAM_LPF_CFG */
447 #define LPF_AUTO_TUNE           0x8000
448 
449 /* SRAM_10M_AMP1 */
450 #define GDAC_IB_UPALL           0x0008
451 
452 /* SRAM_10M_AMP2 */
453 #define AMP_DN                  0x0200
454 
455 /* SRAM_IMPEDANCE */
456 #define RX_DRIVING_MASK         0x6000
457 
458 enum rtl_register_content {
459         _1000bps        = 0x10,
460         _100bps         = 0x08,
461         _10bps          = 0x04,
462         LINK_STATUS     = 0x02,
463         FULL_DUP        = 0x01,
464 };
465 
466 #define RTL8152_MAX_TX          4
467 #define RTL8152_MAX_RX          10
468 #define INTBUFSIZE              2
469 #define CRC_SIZE                4
470 #define TX_ALIGN                4
471 #define RX_ALIGN                8
472 
473 #define INTR_LINK               0x0004
474 
475 #define RTL8152_REQT_READ       0xc0
476 #define RTL8152_REQT_WRITE      0x40
477 #define RTL8152_REQ_GET_REGS    0x05
478 #define RTL8152_REQ_SET_REGS    0x05
479 
480 #define BYTE_EN_DWORD           0xff
481 #define BYTE_EN_WORD            0x33
482 #define BYTE_EN_BYTE            0x11
483 #define BYTE_EN_SIX_BYTES       0x3f
484 #define BYTE_EN_START_MASK      0x0f
485 #define BYTE_EN_END_MASK        0xf0
486 
487 #define RTL8153_MAX_PACKET      9216 /* 9K */
488 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
489 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
490 #define RTL8153_RMS             RTL8153_MAX_PACKET
491 #define RTL8152_TX_TIMEOUT      (5 * HZ)
492 #define RTL8152_NAPI_WEIGHT     64
493 
494 /* rtl8152 flags */
495 enum rtl8152_flags {
496         RTL8152_UNPLUG = 0,
497         RTL8152_SET_RX_MODE,
498         WORK_ENABLE,
499         RTL8152_LINK_CHG,
500         SELECTIVE_SUSPEND,
501         PHY_RESET,
502         SCHEDULE_NAPI,
503 };
504 
505 /* Define these values to match your device */
506 #define VENDOR_ID_REALTEK               0x0bda
507 #define VENDOR_ID_SAMSUNG               0x04e8
508 #define VENDOR_ID_LENOVO                0x17ef
509 #define VENDOR_ID_NVIDIA                0x0955
510 
511 #define MCU_TYPE_PLA                    0x0100
512 #define MCU_TYPE_USB                    0x0000
513 
514 struct tally_counter {
515         __le64  tx_packets;
516         __le64  rx_packets;
517         __le64  tx_errors;
518         __le32  rx_errors;
519         __le16  rx_missed;
520         __le16  align_errors;
521         __le32  tx_one_collision;
522         __le32  tx_multi_collision;
523         __le64  rx_unicast;
524         __le64  rx_broadcast;
525         __le32  rx_multicast;
526         __le16  tx_aborted;
527         __le16  tx_underrun;
528 };
529 
530 struct rx_desc {
531         __le32 opts1;
532 #define RX_LEN_MASK                     0x7fff
533 
534         __le32 opts2;
535 #define RD_UDP_CS                       BIT(23)
536 #define RD_TCP_CS                       BIT(22)
537 #define RD_IPV6_CS                      BIT(20)
538 #define RD_IPV4_CS                      BIT(19)
539 
540         __le32 opts3;
541 #define IPF                             BIT(23) /* IP checksum fail */
542 #define UDPF                            BIT(22) /* UDP checksum fail */
543 #define TCPF                            BIT(21) /* TCP checksum fail */
544 #define RX_VLAN_TAG                     BIT(16)
545 
546         __le32 opts4;
547         __le32 opts5;
548         __le32 opts6;
549 };
550 
551 struct tx_desc {
552         __le32 opts1;
553 #define TX_FS                   BIT(31) /* First segment of a packet */
554 #define TX_LS                   BIT(30) /* Final segment of a packet */
555 #define GTSENDV4                BIT(28)
556 #define GTSENDV6                BIT(27)
557 #define GTTCPHO_SHIFT           18
558 #define GTTCPHO_MAX             0x7fU
559 #define TX_LEN_MAX              0x3ffffU
560 
561         __le32 opts2;
562 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
563 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
564 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
565 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
566 #define MSS_SHIFT               17
567 #define MSS_MAX                 0x7ffU
568 #define TCPHO_SHIFT             17
569 #define TCPHO_MAX               0x7ffU
570 #define TX_VLAN_TAG             BIT(16)
571 };
572 
573 struct r8152;
574 
575 struct rx_agg {
576         struct list_head list;
577         struct urb *urb;
578         struct r8152 *context;
579         void *buffer;
580         void *head;
581 };
582 
583 struct tx_agg {
584         struct list_head list;
585         struct urb *urb;
586         struct r8152 *context;
587         void *buffer;
588         void *head;
589         u32 skb_num;
590         u32 skb_len;
591 };
592 
593 struct r8152 {
594         unsigned long flags;
595         struct usb_device *udev;
596         struct napi_struct napi;
597         struct usb_interface *intf;
598         struct net_device *netdev;
599         struct urb *intr_urb;
600         struct tx_agg tx_info[RTL8152_MAX_TX];
601         struct rx_agg rx_info[RTL8152_MAX_RX];
602         struct list_head rx_done, tx_free;
603         struct sk_buff_head tx_queue, rx_queue;
604         spinlock_t rx_lock, tx_lock;
605         struct delayed_work schedule;
606         struct mii_if_info mii;
607         struct mutex control;   /* use for hw setting */
608 #ifdef CONFIG_PM_SLEEP
609         struct notifier_block pm_notifier;
610 #endif
611 
612         struct rtl_ops {
613                 void (*init)(struct r8152 *);
614                 int (*enable)(struct r8152 *);
615                 void (*disable)(struct r8152 *);
616                 void (*up)(struct r8152 *);
617                 void (*down)(struct r8152 *);
618                 void (*unload)(struct r8152 *);
619                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
620                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
621                 bool (*in_nway)(struct r8152 *);
622         } rtl_ops;
623 
624         int intr_interval;
625         u32 saved_wolopts;
626         u32 msg_enable;
627         u32 tx_qlen;
628         u32 coalesce;
629         u16 ocp_base;
630         u8 *intr_buff;
631         u8 version;
632 };
633 
634 enum rtl_version {
635         RTL_VER_UNKNOWN = 0,
636         RTL_VER_01,
637         RTL_VER_02,
638         RTL_VER_03,
639         RTL_VER_04,
640         RTL_VER_05,
641         RTL_VER_06,
642         RTL_VER_MAX
643 };
644 
645 enum tx_csum_stat {
646         TX_CSUM_SUCCESS = 0,
647         TX_CSUM_TSO,
648         TX_CSUM_NONE
649 };
650 
651 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
652  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
653  */
654 static const int multicast_filter_limit = 32;
655 static unsigned int agg_buf_sz = 16384;
656 
657 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
658                                  VLAN_ETH_HLEN - VLAN_HLEN)
659 
660 static
661 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
662 {
663         int ret;
664         void *tmp;
665 
666         tmp = kmalloc(size, GFP_KERNEL);
667         if (!tmp)
668                 return -ENOMEM;
669 
670         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
671                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
672                               value, index, tmp, size, 500);
673 
674         memcpy(data, tmp, size);
675         kfree(tmp);
676 
677         return ret;
678 }
679 
680 static
681 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
682 {
683         int ret;
684         void *tmp;
685 
686         tmp = kmemdup(data, size, GFP_KERNEL);
687         if (!tmp)
688                 return -ENOMEM;
689 
690         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
691                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
692                               value, index, tmp, size, 500);
693 
694         kfree(tmp);
695 
696         return ret;
697 }
698 
699 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
700                             void *data, u16 type)
701 {
702         u16 limit = 64;
703         int ret = 0;
704 
705         if (test_bit(RTL8152_UNPLUG, &tp->flags))
706                 return -ENODEV;
707 
708         /* both size and indix must be 4 bytes align */
709         if ((size & 3) || !size || (index & 3) || !data)
710                 return -EPERM;
711 
712         if ((u32)index + (u32)size > 0xffff)
713                 return -EPERM;
714 
715         while (size) {
716                 if (size > limit) {
717                         ret = get_registers(tp, index, type, limit, data);
718                         if (ret < 0)
719                                 break;
720 
721                         index += limit;
722                         data += limit;
723                         size -= limit;
724                 } else {
725                         ret = get_registers(tp, index, type, size, data);
726                         if (ret < 0)
727                                 break;
728 
729                         index += size;
730                         data += size;
731                         size = 0;
732                         break;
733                 }
734         }
735 
736         if (ret == -ENODEV)
737                 set_bit(RTL8152_UNPLUG, &tp->flags);
738 
739         return ret;
740 }
741 
742 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
743                              u16 size, void *data, u16 type)
744 {
745         int ret;
746         u16 byteen_start, byteen_end, byen;
747         u16 limit = 512;
748 
749         if (test_bit(RTL8152_UNPLUG, &tp->flags))
750                 return -ENODEV;
751 
752         /* both size and indix must be 4 bytes align */
753         if ((size & 3) || !size || (index & 3) || !data)
754                 return -EPERM;
755 
756         if ((u32)index + (u32)size > 0xffff)
757                 return -EPERM;
758 
759         byteen_start = byteen & BYTE_EN_START_MASK;
760         byteen_end = byteen & BYTE_EN_END_MASK;
761 
762         byen = byteen_start | (byteen_start << 4);
763         ret = set_registers(tp, index, type | byen, 4, data);
764         if (ret < 0)
765                 goto error1;
766 
767         index += 4;
768         data += 4;
769         size -= 4;
770 
771         if (size) {
772                 size -= 4;
773 
774                 while (size) {
775                         if (size > limit) {
776                                 ret = set_registers(tp, index,
777                                                     type | BYTE_EN_DWORD,
778                                                     limit, data);
779                                 if (ret < 0)
780                                         goto error1;
781 
782                                 index += limit;
783                                 data += limit;
784                                 size -= limit;
785                         } else {
786                                 ret = set_registers(tp, index,
787                                                     type | BYTE_EN_DWORD,
788                                                     size, data);
789                                 if (ret < 0)
790                                         goto error1;
791 
792                                 index += size;
793                                 data += size;
794                                 size = 0;
795                                 break;
796                         }
797                 }
798 
799                 byen = byteen_end | (byteen_end >> 4);
800                 ret = set_registers(tp, index, type | byen, 4, data);
801                 if (ret < 0)
802                         goto error1;
803         }
804 
805 error1:
806         if (ret == -ENODEV)
807                 set_bit(RTL8152_UNPLUG, &tp->flags);
808 
809         return ret;
810 }
811 
812 static inline
813 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
814 {
815         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
816 }
817 
818 static inline
819 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
820 {
821         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
822 }
823 
824 static inline
825 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
826 {
827         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
828 }
829 
830 static inline
831 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
832 {
833         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
834 }
835 
836 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
837 {
838         __le32 data;
839 
840         generic_ocp_read(tp, index, sizeof(data), &data, type);
841 
842         return __le32_to_cpu(data);
843 }
844 
845 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
846 {
847         __le32 tmp = __cpu_to_le32(data);
848 
849         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
850 }
851 
852 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
853 {
854         u32 data;
855         __le32 tmp;
856         u8 shift = index & 2;
857 
858         index &= ~3;
859 
860         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
861 
862         data = __le32_to_cpu(tmp);
863         data >>= (shift * 8);
864         data &= 0xffff;
865 
866         return (u16)data;
867 }
868 
869 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
870 {
871         u32 mask = 0xffff;
872         __le32 tmp;
873         u16 byen = BYTE_EN_WORD;
874         u8 shift = index & 2;
875 
876         data &= mask;
877 
878         if (index & 2) {
879                 byen <<= shift;
880                 mask <<= (shift * 8);
881                 data <<= (shift * 8);
882                 index &= ~3;
883         }
884 
885         tmp = __cpu_to_le32(data);
886 
887         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
888 }
889 
890 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
891 {
892         u32 data;
893         __le32 tmp;
894         u8 shift = index & 3;
895 
896         index &= ~3;
897 
898         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
899 
900         data = __le32_to_cpu(tmp);
901         data >>= (shift * 8);
902         data &= 0xff;
903 
904         return (u8)data;
905 }
906 
907 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
908 {
909         u32 mask = 0xff;
910         __le32 tmp;
911         u16 byen = BYTE_EN_BYTE;
912         u8 shift = index & 3;
913 
914         data &= mask;
915 
916         if (index & 3) {
917                 byen <<= shift;
918                 mask <<= (shift * 8);
919                 data <<= (shift * 8);
920                 index &= ~3;
921         }
922 
923         tmp = __cpu_to_le32(data);
924 
925         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
926 }
927 
928 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
929 {
930         u16 ocp_base, ocp_index;
931 
932         ocp_base = addr & 0xf000;
933         if (ocp_base != tp->ocp_base) {
934                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
935                 tp->ocp_base = ocp_base;
936         }
937 
938         ocp_index = (addr & 0x0fff) | 0xb000;
939         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
940 }
941 
942 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
943 {
944         u16 ocp_base, ocp_index;
945 
946         ocp_base = addr & 0xf000;
947         if (ocp_base != tp->ocp_base) {
948                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
949                 tp->ocp_base = ocp_base;
950         }
951 
952         ocp_index = (addr & 0x0fff) | 0xb000;
953         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
954 }
955 
956 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
957 {
958         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
959 }
960 
961 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
962 {
963         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
964 }
965 
966 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
967 {
968         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
969         ocp_reg_write(tp, OCP_SRAM_DATA, data);
970 }
971 
972 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
973 {
974         struct r8152 *tp = netdev_priv(netdev);
975         int ret;
976 
977         if (test_bit(RTL8152_UNPLUG, &tp->flags))
978                 return -ENODEV;
979 
980         if (phy_id != R8152_PHY_ID)
981                 return -EINVAL;
982 
983         ret = r8152_mdio_read(tp, reg);
984 
985         return ret;
986 }
987 
988 static
989 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
990 {
991         struct r8152 *tp = netdev_priv(netdev);
992 
993         if (test_bit(RTL8152_UNPLUG, &tp->flags))
994                 return;
995 
996         if (phy_id != R8152_PHY_ID)
997                 return;
998 
999         r8152_mdio_write(tp, reg, val);
1000 }
1001 
1002 static int
1003 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1004 
1005 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1006 {
1007         struct r8152 *tp = netdev_priv(netdev);
1008         struct sockaddr *addr = p;
1009         int ret = -EADDRNOTAVAIL;
1010 
1011         if (!is_valid_ether_addr(addr->sa_data))
1012                 goto out1;
1013 
1014         ret = usb_autopm_get_interface(tp->intf);
1015         if (ret < 0)
1016                 goto out1;
1017 
1018         mutex_lock(&tp->control);
1019 
1020         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1021 
1022         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1023         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1024         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1025 
1026         mutex_unlock(&tp->control);
1027 
1028         usb_autopm_put_interface(tp->intf);
1029 out1:
1030         return ret;
1031 }
1032 
1033 static int set_ethernet_addr(struct r8152 *tp)
1034 {
1035         struct net_device *dev = tp->netdev;
1036         struct sockaddr sa;
1037         int ret;
1038 
1039         if (tp->version == RTL_VER_01)
1040                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1041         else
1042                 ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1043 
1044         if (ret < 0) {
1045                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1046         } else if (!is_valid_ether_addr(sa.sa_data)) {
1047                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1048                           sa.sa_data);
1049                 eth_hw_addr_random(dev);
1050                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1051                 ret = rtl8152_set_mac_address(dev, &sa);
1052                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1053                            sa.sa_data);
1054         } else {
1055                 if (tp->version == RTL_VER_01)
1056                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1057                 else
1058                         ret = rtl8152_set_mac_address(dev, &sa);
1059         }
1060 
1061         return ret;
1062 }
1063 
1064 static void read_bulk_callback(struct urb *urb)
1065 {
1066         struct net_device *netdev;
1067         int status = urb->status;
1068         struct rx_agg *agg;
1069         struct r8152 *tp;
1070 
1071         agg = urb->context;
1072         if (!agg)
1073                 return;
1074 
1075         tp = agg->context;
1076         if (!tp)
1077                 return;
1078 
1079         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1080                 return;
1081 
1082         if (!test_bit(WORK_ENABLE, &tp->flags))
1083                 return;
1084 
1085         netdev = tp->netdev;
1086 
1087         /* When link down, the driver would cancel all bulks. */
1088         /* This avoid the re-submitting bulk */
1089         if (!netif_carrier_ok(netdev))
1090                 return;
1091 
1092         usb_mark_last_busy(tp->udev);
1093 
1094         switch (status) {
1095         case 0:
1096                 if (urb->actual_length < ETH_ZLEN)
1097                         break;
1098 
1099                 spin_lock(&tp->rx_lock);
1100                 list_add_tail(&agg->list, &tp->rx_done);
1101                 spin_unlock(&tp->rx_lock);
1102                 napi_schedule(&tp->napi);
1103                 return;
1104         case -ESHUTDOWN:
1105                 set_bit(RTL8152_UNPLUG, &tp->flags);
1106                 netif_device_detach(tp->netdev);
1107                 return;
1108         case -ENOENT:
1109                 return; /* the urb is in unlink state */
1110         case -ETIME:
1111                 if (net_ratelimit())
1112                         netdev_warn(netdev, "maybe reset is needed?\n");
1113                 break;
1114         default:
1115                 if (net_ratelimit())
1116                         netdev_warn(netdev, "Rx status %d\n", status);
1117                 break;
1118         }
1119 
1120         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1121 }
1122 
1123 static void write_bulk_callback(struct urb *urb)
1124 {
1125         struct net_device_stats *stats;
1126         struct net_device *netdev;
1127         struct tx_agg *agg;
1128         struct r8152 *tp;
1129         int status = urb->status;
1130 
1131         agg = urb->context;
1132         if (!agg)
1133                 return;
1134 
1135         tp = agg->context;
1136         if (!tp)
1137                 return;
1138 
1139         netdev = tp->netdev;
1140         stats = &netdev->stats;
1141         if (status) {
1142                 if (net_ratelimit())
1143                         netdev_warn(netdev, "Tx status %d\n", status);
1144                 stats->tx_errors += agg->skb_num;
1145         } else {
1146                 stats->tx_packets += agg->skb_num;
1147                 stats->tx_bytes += agg->skb_len;
1148         }
1149 
1150         spin_lock(&tp->tx_lock);
1151         list_add_tail(&agg->list, &tp->tx_free);
1152         spin_unlock(&tp->tx_lock);
1153 
1154         usb_autopm_put_interface_async(tp->intf);
1155 
1156         if (!netif_carrier_ok(netdev))
1157                 return;
1158 
1159         if (!test_bit(WORK_ENABLE, &tp->flags))
1160                 return;
1161 
1162         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1163                 return;
1164 
1165         if (!skb_queue_empty(&tp->tx_queue))
1166                 napi_schedule(&tp->napi);
1167 }
1168 
1169 static void intr_callback(struct urb *urb)
1170 {
1171         struct r8152 *tp;
1172         __le16 *d;
1173         int status = urb->status;
1174         int res;
1175 
1176         tp = urb->context;
1177         if (!tp)
1178                 return;
1179 
1180         if (!test_bit(WORK_ENABLE, &tp->flags))
1181                 return;
1182 
1183         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1184                 return;
1185 
1186         switch (status) {
1187         case 0:                 /* success */
1188                 break;
1189         case -ECONNRESET:       /* unlink */
1190         case -ESHUTDOWN:
1191                 netif_device_detach(tp->netdev);
1192         case -ENOENT:
1193         case -EPROTO:
1194                 netif_info(tp, intr, tp->netdev,
1195                            "Stop submitting intr, status %d\n", status);
1196                 return;
1197         case -EOVERFLOW:
1198                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1199                 goto resubmit;
1200         /* -EPIPE:  should clear the halt */
1201         default:
1202                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1203                 goto resubmit;
1204         }
1205 
1206         d = urb->transfer_buffer;
1207         if (INTR_LINK & __le16_to_cpu(d[0])) {
1208                 if (!netif_carrier_ok(tp->netdev)) {
1209                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1210                         schedule_delayed_work(&tp->schedule, 0);
1211                 }
1212         } else {
1213                 if (netif_carrier_ok(tp->netdev)) {
1214                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1215                         schedule_delayed_work(&tp->schedule, 0);
1216                 }
1217         }
1218 
1219 resubmit:
1220         res = usb_submit_urb(urb, GFP_ATOMIC);
1221         if (res == -ENODEV) {
1222                 set_bit(RTL8152_UNPLUG, &tp->flags);
1223                 netif_device_detach(tp->netdev);
1224         } else if (res) {
1225                 netif_err(tp, intr, tp->netdev,
1226                           "can't resubmit intr, status %d\n", res);
1227         }
1228 }
1229 
1230 static inline void *rx_agg_align(void *data)
1231 {
1232         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1233 }
1234 
1235 static inline void *tx_agg_align(void *data)
1236 {
1237         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1238 }
1239 
1240 static void free_all_mem(struct r8152 *tp)
1241 {
1242         int i;
1243 
1244         for (i = 0; i < RTL8152_MAX_RX; i++) {
1245                 usb_free_urb(tp->rx_info[i].urb);
1246                 tp->rx_info[i].urb = NULL;
1247 
1248                 kfree(tp->rx_info[i].buffer);
1249                 tp->rx_info[i].buffer = NULL;
1250                 tp->rx_info[i].head = NULL;
1251         }
1252 
1253         for (i = 0; i < RTL8152_MAX_TX; i++) {
1254                 usb_free_urb(tp->tx_info[i].urb);
1255                 tp->tx_info[i].urb = NULL;
1256 
1257                 kfree(tp->tx_info[i].buffer);
1258                 tp->tx_info[i].buffer = NULL;
1259                 tp->tx_info[i].head = NULL;
1260         }
1261 
1262         usb_free_urb(tp->intr_urb);
1263         tp->intr_urb = NULL;
1264 
1265         kfree(tp->intr_buff);
1266         tp->intr_buff = NULL;
1267 }
1268 
1269 static int alloc_all_mem(struct r8152 *tp)
1270 {
1271         struct net_device *netdev = tp->netdev;
1272         struct usb_interface *intf = tp->intf;
1273         struct usb_host_interface *alt = intf->cur_altsetting;
1274         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1275         struct urb *urb;
1276         int node, i;
1277         u8 *buf;
1278 
1279         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1280 
1281         spin_lock_init(&tp->rx_lock);
1282         spin_lock_init(&tp->tx_lock);
1283         INIT_LIST_HEAD(&tp->tx_free);
1284         skb_queue_head_init(&tp->tx_queue);
1285         skb_queue_head_init(&tp->rx_queue);
1286 
1287         for (i = 0; i < RTL8152_MAX_RX; i++) {
1288                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1289                 if (!buf)
1290                         goto err1;
1291 
1292                 if (buf != rx_agg_align(buf)) {
1293                         kfree(buf);
1294                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1295                                            node);
1296                         if (!buf)
1297                                 goto err1;
1298                 }
1299 
1300                 urb = usb_alloc_urb(0, GFP_KERNEL);
1301                 if (!urb) {
1302                         kfree(buf);
1303                         goto err1;
1304                 }
1305 
1306                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1307                 tp->rx_info[i].context = tp;
1308                 tp->rx_info[i].urb = urb;
1309                 tp->rx_info[i].buffer = buf;
1310                 tp->rx_info[i].head = rx_agg_align(buf);
1311         }
1312 
1313         for (i = 0; i < RTL8152_MAX_TX; i++) {
1314                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1315                 if (!buf)
1316                         goto err1;
1317 
1318                 if (buf != tx_agg_align(buf)) {
1319                         kfree(buf);
1320                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1321                                            node);
1322                         if (!buf)
1323                                 goto err1;
1324                 }
1325 
1326                 urb = usb_alloc_urb(0, GFP_KERNEL);
1327                 if (!urb) {
1328                         kfree(buf);
1329                         goto err1;
1330                 }
1331 
1332                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1333                 tp->tx_info[i].context = tp;
1334                 tp->tx_info[i].urb = urb;
1335                 tp->tx_info[i].buffer = buf;
1336                 tp->tx_info[i].head = tx_agg_align(buf);
1337 
1338                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1339         }
1340 
1341         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1342         if (!tp->intr_urb)
1343                 goto err1;
1344 
1345         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1346         if (!tp->intr_buff)
1347                 goto err1;
1348 
1349         tp->intr_interval = (int)ep_intr->desc.bInterval;
1350         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1351                          tp->intr_buff, INTBUFSIZE, intr_callback,
1352                          tp, tp->intr_interval);
1353 
1354         return 0;
1355 
1356 err1:
1357         free_all_mem(tp);
1358         return -ENOMEM;
1359 }
1360 
1361 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1362 {
1363         struct tx_agg *agg = NULL;
1364         unsigned long flags;
1365 
1366         if (list_empty(&tp->tx_free))
1367                 return NULL;
1368 
1369         spin_lock_irqsave(&tp->tx_lock, flags);
1370         if (!list_empty(&tp->tx_free)) {
1371                 struct list_head *cursor;
1372 
1373                 cursor = tp->tx_free.next;
1374                 list_del_init(cursor);
1375                 agg = list_entry(cursor, struct tx_agg, list);
1376         }
1377         spin_unlock_irqrestore(&tp->tx_lock, flags);
1378 
1379         return agg;
1380 }
1381 
1382 /* r8152_csum_workaround()
1383  * The hw limites the value the transport offset. When the offset is out of the
1384  * range, calculate the checksum by sw.
1385  */
1386 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1387                                   struct sk_buff_head *list)
1388 {
1389         if (skb_shinfo(skb)->gso_size) {
1390                 netdev_features_t features = tp->netdev->features;
1391                 struct sk_buff_head seg_list;
1392                 struct sk_buff *segs, *nskb;
1393 
1394                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1395                 segs = skb_gso_segment(skb, features);
1396                 if (IS_ERR(segs) || !segs)
1397                         goto drop;
1398 
1399                 __skb_queue_head_init(&seg_list);
1400 
1401                 do {
1402                         nskb = segs;
1403                         segs = segs->next;
1404                         nskb->next = NULL;
1405                         __skb_queue_tail(&seg_list, nskb);
1406                 } while (segs);
1407 
1408                 skb_queue_splice(&seg_list, list);
1409                 dev_kfree_skb(skb);
1410         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1411                 if (skb_checksum_help(skb) < 0)
1412                         goto drop;
1413 
1414                 __skb_queue_head(list, skb);
1415         } else {
1416                 struct net_device_stats *stats;
1417 
1418 drop:
1419                 stats = &tp->netdev->stats;
1420                 stats->tx_dropped++;
1421                 dev_kfree_skb(skb);
1422         }
1423 }
1424 
1425 /* msdn_giant_send_check()
1426  * According to the document of microsoft, the TCP Pseudo Header excludes the
1427  * packet length for IPv6 TCP large packets.
1428  */
1429 static int msdn_giant_send_check(struct sk_buff *skb)
1430 {
1431         const struct ipv6hdr *ipv6h;
1432         struct tcphdr *th;
1433         int ret;
1434 
1435         ret = skb_cow_head(skb, 0);
1436         if (ret)
1437                 return ret;
1438 
1439         ipv6h = ipv6_hdr(skb);
1440         th = tcp_hdr(skb);
1441 
1442         th->check = 0;
1443         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1444 
1445         return ret;
1446 }
1447 
1448 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1449 {
1450         if (skb_vlan_tag_present(skb)) {
1451                 u32 opts2;
1452 
1453                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1454                 desc->opts2 |= cpu_to_le32(opts2);
1455         }
1456 }
1457 
1458 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1459 {
1460         u32 opts2 = le32_to_cpu(desc->opts2);
1461 
1462         if (opts2 & RX_VLAN_TAG)
1463                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1464                                        swab16(opts2 & 0xffff));
1465 }
1466 
1467 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1468                          struct sk_buff *skb, u32 len, u32 transport_offset)
1469 {
1470         u32 mss = skb_shinfo(skb)->gso_size;
1471         u32 opts1, opts2 = 0;
1472         int ret = TX_CSUM_SUCCESS;
1473 
1474         WARN_ON_ONCE(len > TX_LEN_MAX);
1475 
1476         opts1 = len | TX_FS | TX_LS;
1477 
1478         if (mss) {
1479                 if (transport_offset > GTTCPHO_MAX) {
1480                         netif_warn(tp, tx_err, tp->netdev,
1481                                    "Invalid transport offset 0x%x for TSO\n",
1482                                    transport_offset);
1483                         ret = TX_CSUM_TSO;
1484                         goto unavailable;
1485                 }
1486 
1487                 switch (vlan_get_protocol(skb)) {
1488                 case htons(ETH_P_IP):
1489                         opts1 |= GTSENDV4;
1490                         break;
1491 
1492                 case htons(ETH_P_IPV6):
1493                         if (msdn_giant_send_check(skb)) {
1494                                 ret = TX_CSUM_TSO;
1495                                 goto unavailable;
1496                         }
1497                         opts1 |= GTSENDV6;
1498                         break;
1499 
1500                 default:
1501                         WARN_ON_ONCE(1);
1502                         break;
1503                 }
1504 
1505                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1506                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1507         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1508                 u8 ip_protocol;
1509 
1510                 if (transport_offset > TCPHO_MAX) {
1511                         netif_warn(tp, tx_err, tp->netdev,
1512                                    "Invalid transport offset 0x%x\n",
1513                                    transport_offset);
1514                         ret = TX_CSUM_NONE;
1515                         goto unavailable;
1516                 }
1517 
1518                 switch (vlan_get_protocol(skb)) {
1519                 case htons(ETH_P_IP):
1520                         opts2 |= IPV4_CS;
1521                         ip_protocol = ip_hdr(skb)->protocol;
1522                         break;
1523 
1524                 case htons(ETH_P_IPV6):
1525                         opts2 |= IPV6_CS;
1526                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1527                         break;
1528 
1529                 default:
1530                         ip_protocol = IPPROTO_RAW;
1531                         break;
1532                 }
1533 
1534                 if (ip_protocol == IPPROTO_TCP)
1535                         opts2 |= TCP_CS;
1536                 else if (ip_protocol == IPPROTO_UDP)
1537                         opts2 |= UDP_CS;
1538                 else
1539                         WARN_ON_ONCE(1);
1540 
1541                 opts2 |= transport_offset << TCPHO_SHIFT;
1542         }
1543 
1544         desc->opts2 = cpu_to_le32(opts2);
1545         desc->opts1 = cpu_to_le32(opts1);
1546 
1547 unavailable:
1548         return ret;
1549 }
1550 
1551 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1552 {
1553         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1554         int remain, ret;
1555         u8 *tx_data;
1556 
1557         __skb_queue_head_init(&skb_head);
1558         spin_lock(&tx_queue->lock);
1559         skb_queue_splice_init(tx_queue, &skb_head);
1560         spin_unlock(&tx_queue->lock);
1561 
1562         tx_data = agg->head;
1563         agg->skb_num = 0;
1564         agg->skb_len = 0;
1565         remain = agg_buf_sz;
1566 
1567         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1568                 struct tx_desc *tx_desc;
1569                 struct sk_buff *skb;
1570                 unsigned int len;
1571                 u32 offset;
1572 
1573                 skb = __skb_dequeue(&skb_head);
1574                 if (!skb)
1575                         break;
1576 
1577                 len = skb->len + sizeof(*tx_desc);
1578 
1579                 if (len > remain) {
1580                         __skb_queue_head(&skb_head, skb);
1581                         break;
1582                 }
1583 
1584                 tx_data = tx_agg_align(tx_data);
1585                 tx_desc = (struct tx_desc *)tx_data;
1586 
1587                 offset = (u32)skb_transport_offset(skb);
1588 
1589                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1590                         r8152_csum_workaround(tp, skb, &skb_head);
1591                         continue;
1592                 }
1593 
1594                 rtl_tx_vlan_tag(tx_desc, skb);
1595 
1596                 tx_data += sizeof(*tx_desc);
1597 
1598                 len = skb->len;
1599                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1600                         struct net_device_stats *stats = &tp->netdev->stats;
1601 
1602                         stats->tx_dropped++;
1603                         dev_kfree_skb_any(skb);
1604                         tx_data -= sizeof(*tx_desc);
1605                         continue;
1606                 }
1607 
1608                 tx_data += len;
1609                 agg->skb_len += len;
1610                 agg->skb_num++;
1611 
1612                 dev_kfree_skb_any(skb);
1613 
1614                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1615         }
1616 
1617         if (!skb_queue_empty(&skb_head)) {
1618                 spin_lock(&tx_queue->lock);
1619                 skb_queue_splice(&skb_head, tx_queue);
1620                 spin_unlock(&tx_queue->lock);
1621         }
1622 
1623         netif_tx_lock(tp->netdev);
1624 
1625         if (netif_queue_stopped(tp->netdev) &&
1626             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1627                 netif_wake_queue(tp->netdev);
1628 
1629         netif_tx_unlock(tp->netdev);
1630 
1631         ret = usb_autopm_get_interface_async(tp->intf);
1632         if (ret < 0)
1633                 goto out_tx_fill;
1634 
1635         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1636                           agg->head, (int)(tx_data - (u8 *)agg->head),
1637                           (usb_complete_t)write_bulk_callback, agg);
1638 
1639         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1640         if (ret < 0)
1641                 usb_autopm_put_interface_async(tp->intf);
1642 
1643 out_tx_fill:
1644         return ret;
1645 }
1646 
1647 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1648 {
1649         u8 checksum = CHECKSUM_NONE;
1650         u32 opts2, opts3;
1651 
1652         if (tp->version == RTL_VER_01)
1653                 goto return_result;
1654 
1655         opts2 = le32_to_cpu(rx_desc->opts2);
1656         opts3 = le32_to_cpu(rx_desc->opts3);
1657 
1658         if (opts2 & RD_IPV4_CS) {
1659                 if (opts3 & IPF)
1660                         checksum = CHECKSUM_NONE;
1661                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1662                         checksum = CHECKSUM_NONE;
1663                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1664                         checksum = CHECKSUM_NONE;
1665                 else
1666                         checksum = CHECKSUM_UNNECESSARY;
1667         } else if (RD_IPV6_CS) {
1668                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1669                         checksum = CHECKSUM_UNNECESSARY;
1670                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1671                         checksum = CHECKSUM_UNNECESSARY;
1672         }
1673 
1674 return_result:
1675         return checksum;
1676 }
1677 
1678 static int rx_bottom(struct r8152 *tp, int budget)
1679 {
1680         unsigned long flags;
1681         struct list_head *cursor, *next, rx_queue;
1682         int ret = 0, work_done = 0;
1683 
1684         if (!skb_queue_empty(&tp->rx_queue)) {
1685                 while (work_done < budget) {
1686                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1687                         struct net_device *netdev = tp->netdev;
1688                         struct net_device_stats *stats = &netdev->stats;
1689                         unsigned int pkt_len;
1690 
1691                         if (!skb)
1692                                 break;
1693 
1694                         pkt_len = skb->len;
1695                         napi_gro_receive(&tp->napi, skb);
1696                         work_done++;
1697                         stats->rx_packets++;
1698                         stats->rx_bytes += pkt_len;
1699                 }
1700         }
1701 
1702         if (list_empty(&tp->rx_done))
1703                 goto out1;
1704 
1705         INIT_LIST_HEAD(&rx_queue);
1706         spin_lock_irqsave(&tp->rx_lock, flags);
1707         list_splice_init(&tp->rx_done, &rx_queue);
1708         spin_unlock_irqrestore(&tp->rx_lock, flags);
1709 
1710         list_for_each_safe(cursor, next, &rx_queue) {
1711                 struct rx_desc *rx_desc;
1712                 struct rx_agg *agg;
1713                 int len_used = 0;
1714                 struct urb *urb;
1715                 u8 *rx_data;
1716 
1717                 list_del_init(cursor);
1718 
1719                 agg = list_entry(cursor, struct rx_agg, list);
1720                 urb = agg->urb;
1721                 if (urb->actual_length < ETH_ZLEN)
1722                         goto submit;
1723 
1724                 rx_desc = agg->head;
1725                 rx_data = agg->head;
1726                 len_used += sizeof(struct rx_desc);
1727 
1728                 while (urb->actual_length > len_used) {
1729                         struct net_device *netdev = tp->netdev;
1730                         struct net_device_stats *stats = &netdev->stats;
1731                         unsigned int pkt_len;
1732                         struct sk_buff *skb;
1733 
1734                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1735                         if (pkt_len < ETH_ZLEN)
1736                                 break;
1737 
1738                         len_used += pkt_len;
1739                         if (urb->actual_length < len_used)
1740                                 break;
1741 
1742                         pkt_len -= CRC_SIZE;
1743                         rx_data += sizeof(struct rx_desc);
1744 
1745                         skb = netdev_alloc_skb_ip_align(netdev, pkt_len);
1746                         if (!skb) {
1747                                 stats->rx_dropped++;
1748                                 goto find_next_rx;
1749                         }
1750 
1751                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1752                         memcpy(skb->data, rx_data, pkt_len);
1753                         skb_put(skb, pkt_len);
1754                         skb->protocol = eth_type_trans(skb, netdev);
1755                         rtl_rx_vlan_tag(rx_desc, skb);
1756                         if (work_done < budget) {
1757                                 napi_gro_receive(&tp->napi, skb);
1758                                 work_done++;
1759                                 stats->rx_packets++;
1760                                 stats->rx_bytes += pkt_len;
1761                         } else {
1762                                 __skb_queue_tail(&tp->rx_queue, skb);
1763                         }
1764 
1765 find_next_rx:
1766                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1767                         rx_desc = (struct rx_desc *)rx_data;
1768                         len_used = (int)(rx_data - (u8 *)agg->head);
1769                         len_used += sizeof(struct rx_desc);
1770                 }
1771 
1772 submit:
1773                 if (!ret) {
1774                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1775                 } else {
1776                         urb->actual_length = 0;
1777                         list_add_tail(&agg->list, next);
1778                 }
1779         }
1780 
1781         if (!list_empty(&rx_queue)) {
1782                 spin_lock_irqsave(&tp->rx_lock, flags);
1783                 list_splice_tail(&rx_queue, &tp->rx_done);
1784                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1785         }
1786 
1787 out1:
1788         return work_done;
1789 }
1790 
1791 static void tx_bottom(struct r8152 *tp)
1792 {
1793         int res;
1794 
1795         do {
1796                 struct tx_agg *agg;
1797 
1798                 if (skb_queue_empty(&tp->tx_queue))
1799                         break;
1800 
1801                 agg = r8152_get_tx_agg(tp);
1802                 if (!agg)
1803                         break;
1804 
1805                 res = r8152_tx_agg_fill(tp, agg);
1806                 if (res) {
1807                         struct net_device *netdev = tp->netdev;
1808 
1809                         if (res == -ENODEV) {
1810                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1811                                 netif_device_detach(netdev);
1812                         } else {
1813                                 struct net_device_stats *stats = &netdev->stats;
1814                                 unsigned long flags;
1815 
1816                                 netif_warn(tp, tx_err, netdev,
1817                                            "failed tx_urb %d\n", res);
1818                                 stats->tx_dropped += agg->skb_num;
1819 
1820                                 spin_lock_irqsave(&tp->tx_lock, flags);
1821                                 list_add_tail(&agg->list, &tp->tx_free);
1822                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1823                         }
1824                 }
1825         } while (res == 0);
1826 }
1827 
1828 static void bottom_half(struct r8152 *tp)
1829 {
1830         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1831                 return;
1832 
1833         if (!test_bit(WORK_ENABLE, &tp->flags))
1834                 return;
1835 
1836         /* When link down, the driver would cancel all bulks. */
1837         /* This avoid the re-submitting bulk */
1838         if (!netif_carrier_ok(tp->netdev))
1839                 return;
1840 
1841         clear_bit(SCHEDULE_NAPI, &tp->flags);
1842 
1843         tx_bottom(tp);
1844 }
1845 
1846 static int r8152_poll(struct napi_struct *napi, int budget)
1847 {
1848         struct r8152 *tp = container_of(napi, struct r8152, napi);
1849         int work_done;
1850 
1851         work_done = rx_bottom(tp, budget);
1852         bottom_half(tp);
1853 
1854         if (work_done < budget) {
1855                 napi_complete(napi);
1856                 if (!list_empty(&tp->rx_done))
1857                         napi_schedule(napi);
1858         }
1859 
1860         return work_done;
1861 }
1862 
1863 static
1864 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1865 {
1866         int ret;
1867 
1868         /* The rx would be stopped, so skip submitting */
1869         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1870             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1871                 return 0;
1872 
1873         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1874                           agg->head, agg_buf_sz,
1875                           (usb_complete_t)read_bulk_callback, agg);
1876 
1877         ret = usb_submit_urb(agg->urb, mem_flags);
1878         if (ret == -ENODEV) {
1879                 set_bit(RTL8152_UNPLUG, &tp->flags);
1880                 netif_device_detach(tp->netdev);
1881         } else if (ret) {
1882                 struct urb *urb = agg->urb;
1883                 unsigned long flags;
1884 
1885                 urb->actual_length = 0;
1886                 spin_lock_irqsave(&tp->rx_lock, flags);
1887                 list_add_tail(&agg->list, &tp->rx_done);
1888                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1889 
1890                 netif_err(tp, rx_err, tp->netdev,
1891                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1892 
1893                 napi_schedule(&tp->napi);
1894         }
1895 
1896         return ret;
1897 }
1898 
1899 static void rtl_drop_queued_tx(struct r8152 *tp)
1900 {
1901         struct net_device_stats *stats = &tp->netdev->stats;
1902         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1903         struct sk_buff *skb;
1904 
1905         if (skb_queue_empty(tx_queue))
1906                 return;
1907 
1908         __skb_queue_head_init(&skb_head);
1909         spin_lock_bh(&tx_queue->lock);
1910         skb_queue_splice_init(tx_queue, &skb_head);
1911         spin_unlock_bh(&tx_queue->lock);
1912 
1913         while ((skb = __skb_dequeue(&skb_head))) {
1914                 dev_kfree_skb(skb);
1915                 stats->tx_dropped++;
1916         }
1917 }
1918 
1919 static void rtl8152_tx_timeout(struct net_device *netdev)
1920 {
1921         struct r8152 *tp = netdev_priv(netdev);
1922 
1923         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
1924 
1925         usb_queue_reset_device(tp->intf);
1926 }
1927 
1928 static void rtl8152_set_rx_mode(struct net_device *netdev)
1929 {
1930         struct r8152 *tp = netdev_priv(netdev);
1931 
1932         if (netif_carrier_ok(netdev)) {
1933                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
1934                 schedule_delayed_work(&tp->schedule, 0);
1935         }
1936 }
1937 
1938 static void _rtl8152_set_rx_mode(struct net_device *netdev)
1939 {
1940         struct r8152 *tp = netdev_priv(netdev);
1941         u32 mc_filter[2];       /* Multicast hash filter */
1942         __le32 tmp[2];
1943         u32 ocp_data;
1944 
1945         netif_stop_queue(netdev);
1946         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
1947         ocp_data &= ~RCR_ACPT_ALL;
1948         ocp_data |= RCR_AB | RCR_APM;
1949 
1950         if (netdev->flags & IFF_PROMISC) {
1951                 /* Unconditionally log net taps. */
1952                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
1953                 ocp_data |= RCR_AM | RCR_AAP;
1954                 mc_filter[1] = 0xffffffff;
1955                 mc_filter[0] = 0xffffffff;
1956         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
1957                    (netdev->flags & IFF_ALLMULTI)) {
1958                 /* Too many to filter perfectly -- accept all multicasts. */
1959                 ocp_data |= RCR_AM;
1960                 mc_filter[1] = 0xffffffff;
1961                 mc_filter[0] = 0xffffffff;
1962         } else {
1963                 struct netdev_hw_addr *ha;
1964 
1965                 mc_filter[1] = 0;
1966                 mc_filter[0] = 0;
1967                 netdev_for_each_mc_addr(ha, netdev) {
1968                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
1969 
1970                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
1971                         ocp_data |= RCR_AM;
1972                 }
1973         }
1974 
1975         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
1976         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
1977 
1978         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
1979         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
1980         netif_wake_queue(netdev);
1981 }
1982 
1983 static netdev_features_t
1984 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
1985                        netdev_features_t features)
1986 {
1987         u32 mss = skb_shinfo(skb)->gso_size;
1988         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
1989         int offset = skb_transport_offset(skb);
1990 
1991         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
1992                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
1993         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
1994                 features &= ~NETIF_F_GSO_MASK;
1995 
1996         return features;
1997 }
1998 
1999 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2000                                       struct net_device *netdev)
2001 {
2002         struct r8152 *tp = netdev_priv(netdev);
2003 
2004         skb_tx_timestamp(skb);
2005 
2006         skb_queue_tail(&tp->tx_queue, skb);
2007 
2008         if (!list_empty(&tp->tx_free)) {
2009                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2010                         set_bit(SCHEDULE_NAPI, &tp->flags);
2011                         schedule_delayed_work(&tp->schedule, 0);
2012                 } else {
2013                         usb_mark_last_busy(tp->udev);
2014                         napi_schedule(&tp->napi);
2015                 }
2016         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2017                 netif_stop_queue(netdev);
2018         }
2019 
2020         return NETDEV_TX_OK;
2021 }
2022 
2023 static void r8152b_reset_packet_filter(struct r8152 *tp)
2024 {
2025         u32     ocp_data;
2026 
2027         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2028         ocp_data &= ~FMC_FCR_MCU_EN;
2029         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2030         ocp_data |= FMC_FCR_MCU_EN;
2031         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2032 }
2033 
2034 static void rtl8152_nic_reset(struct r8152 *tp)
2035 {
2036         int     i;
2037 
2038         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2039 
2040         for (i = 0; i < 1000; i++) {
2041                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2042                         break;
2043                 usleep_range(100, 400);
2044         }
2045 }
2046 
2047 static void set_tx_qlen(struct r8152 *tp)
2048 {
2049         struct net_device *netdev = tp->netdev;
2050 
2051         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2052                                     sizeof(struct tx_desc));
2053 }
2054 
2055 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2056 {
2057         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2058 }
2059 
2060 static void rtl_set_eee_plus(struct r8152 *tp)
2061 {
2062         u32 ocp_data;
2063         u8 speed;
2064 
2065         speed = rtl8152_get_speed(tp);
2066         if (speed & _10bps) {
2067                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2068                 ocp_data |= EEEP_CR_EEEP_TX;
2069                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2070         } else {
2071                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2072                 ocp_data &= ~EEEP_CR_EEEP_TX;
2073                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2074         }
2075 }
2076 
2077 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2078 {
2079         u32 ocp_data;
2080 
2081         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2082         if (enable)
2083                 ocp_data |= RXDY_GATED_EN;
2084         else
2085                 ocp_data &= ~RXDY_GATED_EN;
2086         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2087 }
2088 
2089 static int rtl_start_rx(struct r8152 *tp)
2090 {
2091         int i, ret = 0;
2092 
2093         INIT_LIST_HEAD(&tp->rx_done);
2094         for (i = 0; i < RTL8152_MAX_RX; i++) {
2095                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2096                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2097                 if (ret)
2098                         break;
2099         }
2100 
2101         if (ret && ++i < RTL8152_MAX_RX) {
2102                 struct list_head rx_queue;
2103                 unsigned long flags;
2104 
2105                 INIT_LIST_HEAD(&rx_queue);
2106 
2107                 do {
2108                         struct rx_agg *agg = &tp->rx_info[i++];
2109                         struct urb *urb = agg->urb;
2110 
2111                         urb->actual_length = 0;
2112                         list_add_tail(&agg->list, &rx_queue);
2113                 } while (i < RTL8152_MAX_RX);
2114 
2115                 spin_lock_irqsave(&tp->rx_lock, flags);
2116                 list_splice_tail(&rx_queue, &tp->rx_done);
2117                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2118         }
2119 
2120         return ret;
2121 }
2122 
2123 static int rtl_stop_rx(struct r8152 *tp)
2124 {
2125         int i;
2126 
2127         for (i = 0; i < RTL8152_MAX_RX; i++)
2128                 usb_kill_urb(tp->rx_info[i].urb);
2129 
2130         while (!skb_queue_empty(&tp->rx_queue))
2131                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2132 
2133         return 0;
2134 }
2135 
2136 static int rtl_enable(struct r8152 *tp)
2137 {
2138         u32 ocp_data;
2139 
2140         r8152b_reset_packet_filter(tp);
2141 
2142         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2143         ocp_data |= CR_RE | CR_TE;
2144         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2145 
2146         rxdy_gated_en(tp, false);
2147 
2148         return 0;
2149 }
2150 
2151 static int rtl8152_enable(struct r8152 *tp)
2152 {
2153         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2154                 return -ENODEV;
2155 
2156         set_tx_qlen(tp);
2157         rtl_set_eee_plus(tp);
2158 
2159         return rtl_enable(tp);
2160 }
2161 
2162 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2163 {
2164         u32 ocp_data = tp->coalesce / 8;
2165 
2166         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2167 }
2168 
2169 static void r8153_set_rx_early_size(struct r8152 *tp)
2170 {
2171         u32 mtu = tp->netdev->mtu;
2172         u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 4;
2173 
2174         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2175 }
2176 
2177 static int rtl8153_enable(struct r8152 *tp)
2178 {
2179         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2180                 return -ENODEV;
2181 
2182         usb_disable_lpm(tp->udev);
2183         set_tx_qlen(tp);
2184         rtl_set_eee_plus(tp);
2185         r8153_set_rx_early_timeout(tp);
2186         r8153_set_rx_early_size(tp);
2187 
2188         return rtl_enable(tp);
2189 }
2190 
2191 static void rtl_disable(struct r8152 *tp)
2192 {
2193         u32 ocp_data;
2194         int i;
2195 
2196         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2197                 rtl_drop_queued_tx(tp);
2198                 return;
2199         }
2200 
2201         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2202         ocp_data &= ~RCR_ACPT_ALL;
2203         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2204 
2205         rtl_drop_queued_tx(tp);
2206 
2207         for (i = 0; i < RTL8152_MAX_TX; i++)
2208                 usb_kill_urb(tp->tx_info[i].urb);
2209 
2210         rxdy_gated_en(tp, true);
2211 
2212         for (i = 0; i < 1000; i++) {
2213                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2214                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2215                         break;
2216                 usleep_range(1000, 2000);
2217         }
2218 
2219         for (i = 0; i < 1000; i++) {
2220                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2221                         break;
2222                 usleep_range(1000, 2000);
2223         }
2224 
2225         rtl_stop_rx(tp);
2226 
2227         rtl8152_nic_reset(tp);
2228 }
2229 
2230 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2231 {
2232         u32 ocp_data;
2233 
2234         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2235         if (enable)
2236                 ocp_data |= POWER_CUT;
2237         else
2238                 ocp_data &= ~POWER_CUT;
2239         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2240 
2241         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2242         ocp_data &= ~RESUME_INDICATE;
2243         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2244 }
2245 
2246 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2247 {
2248         u32 ocp_data;
2249 
2250         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2251         if (enable)
2252                 ocp_data |= CPCR_RX_VLAN;
2253         else
2254                 ocp_data &= ~CPCR_RX_VLAN;
2255         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2256 }
2257 
2258 static int rtl8152_set_features(struct net_device *dev,
2259                                 netdev_features_t features)
2260 {
2261         netdev_features_t changed = features ^ dev->features;
2262         struct r8152 *tp = netdev_priv(dev);
2263         int ret;
2264 
2265         ret = usb_autopm_get_interface(tp->intf);
2266         if (ret < 0)
2267                 goto out;
2268 
2269         mutex_lock(&tp->control);
2270 
2271         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2272                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2273                         rtl_rx_vlan_en(tp, true);
2274                 else
2275                         rtl_rx_vlan_en(tp, false);
2276         }
2277 
2278         mutex_unlock(&tp->control);
2279 
2280         usb_autopm_put_interface(tp->intf);
2281 
2282 out:
2283         return ret;
2284 }
2285 
2286 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2287 
2288 static u32 __rtl_get_wol(struct r8152 *tp)
2289 {
2290         u32 ocp_data;
2291         u32 wolopts = 0;
2292 
2293         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2294         if (!(ocp_data & LAN_WAKE_EN))
2295                 return 0;
2296 
2297         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2298         if (ocp_data & LINK_ON_WAKE_EN)
2299                 wolopts |= WAKE_PHY;
2300 
2301         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2302         if (ocp_data & UWF_EN)
2303                 wolopts |= WAKE_UCAST;
2304         if (ocp_data & BWF_EN)
2305                 wolopts |= WAKE_BCAST;
2306         if (ocp_data & MWF_EN)
2307                 wolopts |= WAKE_MCAST;
2308 
2309         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2310         if (ocp_data & MAGIC_EN)
2311                 wolopts |= WAKE_MAGIC;
2312 
2313         return wolopts;
2314 }
2315 
2316 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2317 {
2318         u32 ocp_data;
2319 
2320         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2321 
2322         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2323         ocp_data &= ~LINK_ON_WAKE_EN;
2324         if (wolopts & WAKE_PHY)
2325                 ocp_data |= LINK_ON_WAKE_EN;
2326         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2327 
2328         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2329         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN | LAN_WAKE_EN);
2330         if (wolopts & WAKE_UCAST)
2331                 ocp_data |= UWF_EN;
2332         if (wolopts & WAKE_BCAST)
2333                 ocp_data |= BWF_EN;
2334         if (wolopts & WAKE_MCAST)
2335                 ocp_data |= MWF_EN;
2336         if (wolopts & WAKE_ANY)
2337                 ocp_data |= LAN_WAKE_EN;
2338         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2339 
2340         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2341 
2342         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2343         ocp_data &= ~MAGIC_EN;
2344         if (wolopts & WAKE_MAGIC)
2345                 ocp_data |= MAGIC_EN;
2346         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2347 
2348         if (wolopts & WAKE_ANY)
2349                 device_set_wakeup_enable(&tp->udev->dev, true);
2350         else
2351                 device_set_wakeup_enable(&tp->udev->dev, false);
2352 }
2353 
2354 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2355 {
2356         u8 u1u2[8];
2357 
2358         if (enable)
2359                 memset(u1u2, 0xff, sizeof(u1u2));
2360         else
2361                 memset(u1u2, 0x00, sizeof(u1u2));
2362 
2363         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2364 }
2365 
2366 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2367 {
2368         u32 ocp_data;
2369 
2370         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2371         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2372                 ocp_data |= U2P3_ENABLE;
2373         else
2374                 ocp_data &= ~U2P3_ENABLE;
2375         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2376 }
2377 
2378 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2379 {
2380         u32 ocp_data;
2381 
2382         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2383         if (enable)
2384                 ocp_data |= PWR_EN | PHASE2_EN;
2385         else
2386                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2387         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2388 
2389         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2390         ocp_data &= ~PCUT_STATUS;
2391         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2392 }
2393 
2394 static bool rtl_can_wakeup(struct r8152 *tp)
2395 {
2396         struct usb_device *udev = tp->udev;
2397 
2398         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2399 }
2400 
2401 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2402 {
2403         if (enable) {
2404                 u32 ocp_data;
2405 
2406                 r8153_u1u2en(tp, false);
2407                 r8153_u2p3en(tp, false);
2408 
2409                 __rtl_set_wol(tp, WAKE_ANY);
2410 
2411                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2412 
2413                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2414                 ocp_data |= LINK_OFF_WAKE_EN;
2415                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2416 
2417                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2418         } else {
2419                 __rtl_set_wol(tp, tp->saved_wolopts);
2420                 r8153_u2p3en(tp, true);
2421                 r8153_u1u2en(tp, true);
2422         }
2423 }
2424 
2425 static void rtl_phy_reset(struct r8152 *tp)
2426 {
2427         u16 data;
2428         int i;
2429 
2430         data = r8152_mdio_read(tp, MII_BMCR);
2431 
2432         /* don't reset again before the previous one complete */
2433         if (data & BMCR_RESET)
2434                 return;
2435 
2436         data |= BMCR_RESET;
2437         r8152_mdio_write(tp, MII_BMCR, data);
2438 
2439         for (i = 0; i < 50; i++) {
2440                 msleep(20);
2441                 if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2442                         break;
2443         }
2444 }
2445 
2446 static void r8153_teredo_off(struct r8152 *tp)
2447 {
2448         u32 ocp_data;
2449 
2450         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2451         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2452         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2453 
2454         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2455         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2456         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2457 }
2458 
2459 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2460 {
2461         if (enable) {
2462                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2463                                                     LINKENA | DIS_SDSAVE);
2464         } else {
2465                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2466                                                     DIS_SDSAVE);
2467                 msleep(20);
2468         }
2469 }
2470 
2471 static void rtl8152_disable(struct r8152 *tp)
2472 {
2473         r8152_aldps_en(tp, false);
2474         rtl_disable(tp);
2475         r8152_aldps_en(tp, true);
2476 }
2477 
2478 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2479 {
2480         u16 data;
2481 
2482         data = r8152_mdio_read(tp, MII_BMCR);
2483         if (data & BMCR_PDOWN) {
2484                 data &= ~BMCR_PDOWN;
2485                 r8152_mdio_write(tp, MII_BMCR, data);
2486         }
2487 
2488         set_bit(PHY_RESET, &tp->flags);
2489 }
2490 
2491 static void r8152b_exit_oob(struct r8152 *tp)
2492 {
2493         u32 ocp_data;
2494         int i;
2495 
2496         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2497         ocp_data &= ~RCR_ACPT_ALL;
2498         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2499 
2500         rxdy_gated_en(tp, true);
2501         r8153_teredo_off(tp);
2502         r8152b_hw_phy_cfg(tp);
2503 
2504         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2505         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2506 
2507         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2508         ocp_data &= ~NOW_IS_OOB;
2509         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2510 
2511         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2512         ocp_data &= ~MCU_BORW_EN;
2513         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2514 
2515         for (i = 0; i < 1000; i++) {
2516                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2517                 if (ocp_data & LINK_LIST_READY)
2518                         break;
2519                 usleep_range(1000, 2000);
2520         }
2521 
2522         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2523         ocp_data |= RE_INIT_LL;
2524         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2525 
2526         for (i = 0; i < 1000; i++) {
2527                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2528                 if (ocp_data & LINK_LIST_READY)
2529                         break;
2530                 usleep_range(1000, 2000);
2531         }
2532 
2533         rtl8152_nic_reset(tp);
2534 
2535         /* rx share fifo credit full threshold */
2536         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2537 
2538         if (tp->udev->speed == USB_SPEED_FULL ||
2539             tp->udev->speed == USB_SPEED_LOW) {
2540                 /* rx share fifo credit near full threshold */
2541                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2542                                 RXFIFO_THR2_FULL);
2543                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2544                                 RXFIFO_THR3_FULL);
2545         } else {
2546                 /* rx share fifo credit near full threshold */
2547                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2548                                 RXFIFO_THR2_HIGH);
2549                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2550                                 RXFIFO_THR3_HIGH);
2551         }
2552 
2553         /* TX share fifo free credit full threshold */
2554         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2555 
2556         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2557         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2558         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2559                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2560 
2561         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2562 
2563         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2564 
2565         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2566         ocp_data |= TCR0_AUTO_FIFO;
2567         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2568 }
2569 
2570 static void r8152b_enter_oob(struct r8152 *tp)
2571 {
2572         u32 ocp_data;
2573         int i;
2574 
2575         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2576         ocp_data &= ~NOW_IS_OOB;
2577         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2578 
2579         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2580         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2581         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2582 
2583         rtl_disable(tp);
2584 
2585         for (i = 0; i < 1000; i++) {
2586                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2587                 if (ocp_data & LINK_LIST_READY)
2588                         break;
2589                 usleep_range(1000, 2000);
2590         }
2591 
2592         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2593         ocp_data |= RE_INIT_LL;
2594         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2595 
2596         for (i = 0; i < 1000; i++) {
2597                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2598                 if (ocp_data & LINK_LIST_READY)
2599                         break;
2600                 usleep_range(1000, 2000);
2601         }
2602 
2603         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2604 
2605         rtl_rx_vlan_en(tp, true);
2606 
2607         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2608         ocp_data |= ALDPS_PROXY_MODE;
2609         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2610 
2611         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2612         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2613         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2614 
2615         rxdy_gated_en(tp, false);
2616 
2617         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2618         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2619         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2620 }
2621 
2622 static void r8153_hw_phy_cfg(struct r8152 *tp)
2623 {
2624         u32 ocp_data;
2625         u16 data;
2626 
2627         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
2628             tp->version == RTL_VER_05)
2629                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
2630 
2631         data = r8152_mdio_read(tp, MII_BMCR);
2632         if (data & BMCR_PDOWN) {
2633                 data &= ~BMCR_PDOWN;
2634                 r8152_mdio_write(tp, MII_BMCR, data);
2635         }
2636 
2637         if (tp->version == RTL_VER_03) {
2638                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2639                 data &= ~CTAP_SHORT_EN;
2640                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2641         }
2642 
2643         data = ocp_reg_read(tp, OCP_POWER_CFG);
2644         data |= EEE_CLKDIV_EN;
2645         ocp_reg_write(tp, OCP_POWER_CFG, data);
2646 
2647         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2648         data |= EN_10M_BGOFF;
2649         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2650         data = ocp_reg_read(tp, OCP_POWER_CFG);
2651         data |= EN_10M_PLLOFF;
2652         ocp_reg_write(tp, OCP_POWER_CFG, data);
2653         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2654 
2655         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2656         ocp_data |= PFM_PWM_SWITCH;
2657         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2658 
2659         /* Enable LPF corner auto tune */
2660         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2661 
2662         /* Adjust 10M Amplitude */
2663         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2664         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2665 
2666         set_bit(PHY_RESET, &tp->flags);
2667 }
2668 
2669 static void r8153_first_init(struct r8152 *tp)
2670 {
2671         u32 ocp_data;
2672         int i;
2673 
2674         rxdy_gated_en(tp, true);
2675         r8153_teredo_off(tp);
2676 
2677         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2678         ocp_data &= ~RCR_ACPT_ALL;
2679         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2680 
2681         r8153_hw_phy_cfg(tp);
2682 
2683         rtl8152_nic_reset(tp);
2684 
2685         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2686         ocp_data &= ~NOW_IS_OOB;
2687         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2688 
2689         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2690         ocp_data &= ~MCU_BORW_EN;
2691         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2692 
2693         for (i = 0; i < 1000; i++) {
2694                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2695                 if (ocp_data & LINK_LIST_READY)
2696                         break;
2697                 usleep_range(1000, 2000);
2698         }
2699 
2700         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2701         ocp_data |= RE_INIT_LL;
2702         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2703 
2704         for (i = 0; i < 1000; i++) {
2705                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2706                 if (ocp_data & LINK_LIST_READY)
2707                         break;
2708                 usleep_range(1000, 2000);
2709         }
2710 
2711         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2712 
2713         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2714         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2715 
2716         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2717         ocp_data |= TCR0_AUTO_FIFO;
2718         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2719 
2720         rtl8152_nic_reset(tp);
2721 
2722         /* rx share fifo credit full threshold */
2723         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2724         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2725         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2726         /* TX share fifo free credit full threshold */
2727         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2728 
2729         /* rx aggregation */
2730         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2731         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2732         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2733 }
2734 
2735 static void r8153_enter_oob(struct r8152 *tp)
2736 {
2737         u32 ocp_data;
2738         int i;
2739 
2740         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2741         ocp_data &= ~NOW_IS_OOB;
2742         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2743 
2744         rtl_disable(tp);
2745 
2746         for (i = 0; i < 1000; i++) {
2747                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2748                 if (ocp_data & LINK_LIST_READY)
2749                         break;
2750                 usleep_range(1000, 2000);
2751         }
2752 
2753         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2754         ocp_data |= RE_INIT_LL;
2755         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2756 
2757         for (i = 0; i < 1000; i++) {
2758                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2759                 if (ocp_data & LINK_LIST_READY)
2760                         break;
2761                 usleep_range(1000, 2000);
2762         }
2763 
2764         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2765 
2766         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2767         ocp_data &= ~TEREDO_WAKE_MASK;
2768         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2769 
2770         rtl_rx_vlan_en(tp, true);
2771 
2772         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2773         ocp_data |= ALDPS_PROXY_MODE;
2774         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2775 
2776         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2777         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2778         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2779 
2780         rxdy_gated_en(tp, false);
2781 
2782         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2783         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2784         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2785 }
2786 
2787 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2788 {
2789         u16 data;
2790 
2791         data = ocp_reg_read(tp, OCP_POWER_CFG);
2792         if (enable) {
2793                 data |= EN_ALDPS;
2794                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2795         } else {
2796                 data &= ~EN_ALDPS;
2797                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2798                 msleep(20);
2799         }
2800 }
2801 
2802 static void rtl8153_disable(struct r8152 *tp)
2803 {
2804         r8153_aldps_en(tp, false);
2805         rtl_disable(tp);
2806         r8153_aldps_en(tp, true);
2807         usb_enable_lpm(tp->udev);
2808 }
2809 
2810 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2811 {
2812         u16 bmcr, anar, gbcr;
2813         int ret = 0;
2814 
2815         cancel_delayed_work_sync(&tp->schedule);
2816         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2817         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2818                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2819         if (tp->mii.supports_gmii) {
2820                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2821                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2822         } else {
2823                 gbcr = 0;
2824         }
2825 
2826         if (autoneg == AUTONEG_DISABLE) {
2827                 if (speed == SPEED_10) {
2828                         bmcr = 0;
2829                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2830                 } else if (speed == SPEED_100) {
2831                         bmcr = BMCR_SPEED100;
2832                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2833                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2834                         bmcr = BMCR_SPEED1000;
2835                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2836                 } else {
2837                         ret = -EINVAL;
2838                         goto out;
2839                 }
2840 
2841                 if (duplex == DUPLEX_FULL)
2842                         bmcr |= BMCR_FULLDPLX;
2843         } else {
2844                 if (speed == SPEED_10) {
2845                         if (duplex == DUPLEX_FULL)
2846                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2847                         else
2848                                 anar |= ADVERTISE_10HALF;
2849                 } else if (speed == SPEED_100) {
2850                         if (duplex == DUPLEX_FULL) {
2851                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2852                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2853                         } else {
2854                                 anar |= ADVERTISE_10HALF;
2855                                 anar |= ADVERTISE_100HALF;
2856                         }
2857                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
2858                         if (duplex == DUPLEX_FULL) {
2859                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
2860                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
2861                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
2862                         } else {
2863                                 anar |= ADVERTISE_10HALF;
2864                                 anar |= ADVERTISE_100HALF;
2865                                 gbcr |= ADVERTISE_1000HALF;
2866                         }
2867                 } else {
2868                         ret = -EINVAL;
2869                         goto out;
2870                 }
2871 
2872                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
2873         }
2874 
2875         if (test_bit(PHY_RESET, &tp->flags))
2876                 bmcr |= BMCR_RESET;
2877 
2878         if (tp->mii.supports_gmii)
2879                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
2880 
2881         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2882         r8152_mdio_write(tp, MII_BMCR, bmcr);
2883 
2884         if (test_and_clear_bit(PHY_RESET, &tp->flags)) {
2885                 int i;
2886 
2887                 for (i = 0; i < 50; i++) {
2888                         msleep(20);
2889                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
2890                                 break;
2891                 }
2892         }
2893 
2894 out:
2895         return ret;
2896 }
2897 
2898 static void rtl8152_up(struct r8152 *tp)
2899 {
2900         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2901                 return;
2902 
2903         r8152_aldps_en(tp, false);
2904         r8152b_exit_oob(tp);
2905         r8152_aldps_en(tp, true);
2906 }
2907 
2908 static void rtl8152_down(struct r8152 *tp)
2909 {
2910         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2911                 rtl_drop_queued_tx(tp);
2912                 return;
2913         }
2914 
2915         r8152_power_cut_en(tp, false);
2916         r8152_aldps_en(tp, false);
2917         r8152b_enter_oob(tp);
2918         r8152_aldps_en(tp, true);
2919 }
2920 
2921 static void rtl8153_up(struct r8152 *tp)
2922 {
2923         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2924                 return;
2925 
2926         r8153_u1u2en(tp, false);
2927         r8153_aldps_en(tp, false);
2928         r8153_first_init(tp);
2929         r8153_aldps_en(tp, true);
2930         r8153_u2p3en(tp, true);
2931         r8153_u1u2en(tp, true);
2932         usb_enable_lpm(tp->udev);
2933 }
2934 
2935 static void rtl8153_down(struct r8152 *tp)
2936 {
2937         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2938                 rtl_drop_queued_tx(tp);
2939                 return;
2940         }
2941 
2942         r8153_u1u2en(tp, false);
2943         r8153_u2p3en(tp, false);
2944         r8153_power_cut_en(tp, false);
2945         r8153_aldps_en(tp, false);
2946         r8153_enter_oob(tp);
2947         r8153_aldps_en(tp, true);
2948 }
2949 
2950 static bool rtl8152_in_nway(struct r8152 *tp)
2951 {
2952         u16 nway_state;
2953 
2954         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
2955         tp->ocp_base = 0x2000;
2956         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
2957         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
2958 
2959         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
2960         if (nway_state & 0xc000)
2961                 return false;
2962         else
2963                 return true;
2964 }
2965 
2966 static bool rtl8153_in_nway(struct r8152 *tp)
2967 {
2968         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
2969 
2970         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
2971                 return false;
2972         else
2973                 return true;
2974 }
2975 
2976 static void set_carrier(struct r8152 *tp)
2977 {
2978         struct net_device *netdev = tp->netdev;
2979         u8 speed;
2980 
2981         speed = rtl8152_get_speed(tp);
2982 
2983         if (speed & LINK_STATUS) {
2984                 if (!netif_carrier_ok(netdev)) {
2985                         tp->rtl_ops.enable(tp);
2986                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2987                         napi_disable(&tp->napi);
2988                         netif_carrier_on(netdev);
2989                         rtl_start_rx(tp);
2990                         napi_enable(&tp->napi);
2991                 }
2992         } else {
2993                 if (netif_carrier_ok(netdev)) {
2994                         netif_carrier_off(netdev);
2995                         napi_disable(&tp->napi);
2996                         tp->rtl_ops.disable(tp);
2997                         napi_enable(&tp->napi);
2998                 }
2999         }
3000 }
3001 
3002 static void rtl_work_func_t(struct work_struct *work)
3003 {
3004         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3005 
3006         /* If the device is unplugged or !netif_running(), the workqueue
3007          * doesn't need to wake the device, and could return directly.
3008          */
3009         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3010                 return;
3011 
3012         if (usb_autopm_get_interface(tp->intf) < 0)
3013                 return;
3014 
3015         if (!test_bit(WORK_ENABLE, &tp->flags))
3016                 goto out1;
3017 
3018         if (!mutex_trylock(&tp->control)) {
3019                 schedule_delayed_work(&tp->schedule, 0);
3020                 goto out1;
3021         }
3022 
3023         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3024                 set_carrier(tp);
3025 
3026         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3027                 _rtl8152_set_rx_mode(tp->netdev);
3028 
3029         /* don't schedule napi before linking */
3030         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3031             netif_carrier_ok(tp->netdev))
3032                 napi_schedule(&tp->napi);
3033 
3034         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3035                 rtl_phy_reset(tp);
3036 
3037         mutex_unlock(&tp->control);
3038 
3039 out1:
3040         usb_autopm_put_interface(tp->intf);
3041 }
3042 
3043 #ifdef CONFIG_PM_SLEEP
3044 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3045                         void *data)
3046 {
3047         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3048 
3049         switch (action) {
3050         case PM_HIBERNATION_PREPARE:
3051         case PM_SUSPEND_PREPARE:
3052                 usb_autopm_get_interface(tp->intf);
3053                 break;
3054 
3055         case PM_POST_HIBERNATION:
3056         case PM_POST_SUSPEND:
3057                 usb_autopm_put_interface(tp->intf);
3058                 break;
3059 
3060         case PM_POST_RESTORE:
3061         case PM_RESTORE_PREPARE:
3062         default:
3063                 break;
3064         }
3065 
3066         return NOTIFY_DONE;
3067 }
3068 #endif
3069 
3070 static int rtl8152_open(struct net_device *netdev)
3071 {
3072         struct r8152 *tp = netdev_priv(netdev);
3073         int res = 0;
3074 
3075         res = alloc_all_mem(tp);
3076         if (res)
3077                 goto out;
3078 
3079         netif_carrier_off(netdev);
3080 
3081         res = usb_autopm_get_interface(tp->intf);
3082         if (res < 0) {
3083                 free_all_mem(tp);
3084                 goto out;
3085         }
3086 
3087         mutex_lock(&tp->control);
3088 
3089         tp->rtl_ops.up(tp);
3090 
3091         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3092                           tp->mii.supports_gmii ? SPEED_1000 : SPEED_100,
3093                           DUPLEX_FULL);
3094         netif_carrier_off(netdev);
3095         netif_start_queue(netdev);
3096         set_bit(WORK_ENABLE, &tp->flags);
3097 
3098         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3099         if (res) {
3100                 if (res == -ENODEV)
3101                         netif_device_detach(tp->netdev);
3102                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3103                            res);
3104                 free_all_mem(tp);
3105         } else {
3106                 napi_enable(&tp->napi);
3107         }
3108 
3109         mutex_unlock(&tp->control);
3110 
3111         usb_autopm_put_interface(tp->intf);
3112 #ifdef CONFIG_PM_SLEEP
3113         tp->pm_notifier.notifier_call = rtl_notifier;
3114         register_pm_notifier(&tp->pm_notifier);
3115 #endif
3116 
3117 out:
3118         return res;
3119 }
3120 
3121 static int rtl8152_close(struct net_device *netdev)
3122 {
3123         struct r8152 *tp = netdev_priv(netdev);
3124         int res = 0;
3125 
3126 #ifdef CONFIG_PM_SLEEP
3127         unregister_pm_notifier(&tp->pm_notifier);
3128 #endif
3129         napi_disable(&tp->napi);
3130         clear_bit(WORK_ENABLE, &tp->flags);
3131         usb_kill_urb(tp->intr_urb);
3132         cancel_delayed_work_sync(&tp->schedule);
3133         netif_stop_queue(netdev);
3134 
3135         res = usb_autopm_get_interface(tp->intf);
3136         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3137                 rtl_drop_queued_tx(tp);
3138                 rtl_stop_rx(tp);
3139         } else {
3140                 mutex_lock(&tp->control);
3141 
3142                 tp->rtl_ops.down(tp);
3143 
3144                 mutex_unlock(&tp->control);
3145 
3146                 usb_autopm_put_interface(tp->intf);
3147         }
3148 
3149         free_all_mem(tp);
3150 
3151         return res;
3152 }
3153 
3154 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
3155 {
3156         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
3157         ocp_reg_write(tp, OCP_EEE_DATA, reg);
3158         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
3159 }
3160 
3161 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
3162 {
3163         u16 data;
3164 
3165         r8152_mmd_indirect(tp, dev, reg);
3166         data = ocp_reg_read(tp, OCP_EEE_DATA);
3167         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3168 
3169         return data;
3170 }
3171 
3172 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
3173 {
3174         r8152_mmd_indirect(tp, dev, reg);
3175         ocp_reg_write(tp, OCP_EEE_DATA, data);
3176         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
3177 }
3178 
3179 static void r8152_eee_en(struct r8152 *tp, bool enable)
3180 {
3181         u16 config1, config2, config3;
3182         u32 ocp_data;
3183 
3184         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3185         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
3186         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
3187         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
3188 
3189         if (enable) {
3190                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3191                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
3192                 config1 |= sd_rise_time(1);
3193                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
3194                 config3 |= fast_snr(42);
3195         } else {
3196                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3197                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
3198                              RX_QUIET_EN);
3199                 config1 |= sd_rise_time(7);
3200                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
3201                 config3 |= fast_snr(511);
3202         }
3203 
3204         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3205         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
3206         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
3207         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
3208 }
3209 
3210 static void r8152b_enable_eee(struct r8152 *tp)
3211 {
3212         r8152_eee_en(tp, true);
3213         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
3214 }
3215 
3216 static void r8153_eee_en(struct r8152 *tp, bool enable)
3217 {
3218         u32 ocp_data;
3219         u16 config;
3220 
3221         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3222         config = ocp_reg_read(tp, OCP_EEE_CFG);
3223 
3224         if (enable) {
3225                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
3226                 config |= EEE10_EN;
3227         } else {
3228                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
3229                 config &= ~EEE10_EN;
3230         }
3231 
3232         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
3233         ocp_reg_write(tp, OCP_EEE_CFG, config);
3234 }
3235 
3236 static void r8153_enable_eee(struct r8152 *tp)
3237 {
3238         r8153_eee_en(tp, true);
3239         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
3240 }
3241 
3242 static void r8152b_enable_fc(struct r8152 *tp)
3243 {
3244         u16 anar;
3245 
3246         anar = r8152_mdio_read(tp, MII_ADVERTISE);
3247         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
3248         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3249 }
3250 
3251 static void rtl_tally_reset(struct r8152 *tp)
3252 {
3253         u32 ocp_data;
3254 
3255         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3256         ocp_data |= TALLY_RESET;
3257         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3258 }
3259 
3260 static void r8152b_init(struct r8152 *tp)
3261 {
3262         u32 ocp_data;
3263 
3264         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3265                 return;
3266 
3267         r8152_aldps_en(tp, false);
3268 
3269         if (tp->version == RTL_VER_01) {
3270                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3271                 ocp_data &= ~LED_MODE_MASK;
3272                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3273         }
3274 
3275         r8152_power_cut_en(tp, false);
3276 
3277         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3278         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3279         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3280         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3281         ocp_data &= ~MCU_CLK_RATIO_MASK;
3282         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3283         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3284         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3285                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3286         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3287 
3288         r8152b_enable_eee(tp);
3289         r8152_aldps_en(tp, true);
3290         r8152b_enable_fc(tp);
3291         rtl_tally_reset(tp);
3292 
3293         /* enable rx aggregation */
3294         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3295         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3296         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3297 }
3298 
3299 static void r8153_init(struct r8152 *tp)
3300 {
3301         u32 ocp_data;
3302         int i;
3303 
3304         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3305                 return;
3306 
3307         r8153_aldps_en(tp, false);
3308         r8153_u1u2en(tp, false);
3309 
3310         for (i = 0; i < 500; i++) {
3311                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3312                     AUTOLOAD_DONE)
3313                         break;
3314                 msleep(20);
3315         }
3316 
3317         for (i = 0; i < 500; i++) {
3318                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3319                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3320                         break;
3321                 msleep(20);
3322         }
3323 
3324         usb_disable_lpm(tp->udev);
3325         r8153_u2p3en(tp, false);
3326 
3327         if (tp->version == RTL_VER_04) {
3328                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3329                 ocp_data &= ~pwd_dn_scale_mask;
3330                 ocp_data |= pwd_dn_scale(96);
3331                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3332 
3333                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3334                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3335                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3336         } else if (tp->version == RTL_VER_05) {
3337                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3338                 ocp_data &= ~ECM_ALDPS;
3339                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3340 
3341                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3342                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3343                         ocp_data &= ~DYNAMIC_BURST;
3344                 else
3345                         ocp_data |= DYNAMIC_BURST;
3346                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3347         } else if (tp->version == RTL_VER_06) {
3348                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3349                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3350                         ocp_data &= ~DYNAMIC_BURST;
3351                 else
3352                         ocp_data |= DYNAMIC_BURST;
3353                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3354         }
3355 
3356         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3357         ocp_data |= EP4_FULL_FC;
3358         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3359 
3360         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3361         ocp_data &= ~TIMER11_EN;
3362         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3363 
3364         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3365         ocp_data &= ~LED_MODE_MASK;
3366         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3367 
3368         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3369         if (tp->version == RTL_VER_04 && tp->udev->speed != USB_SPEED_SUPER)
3370                 ocp_data |= LPM_TIMER_500MS;
3371         else
3372                 ocp_data |= LPM_TIMER_500US;
3373         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3374 
3375         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3376         ocp_data &= ~SEN_VAL_MASK;
3377         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3378         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3379 
3380         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3381 
3382         r8153_power_cut_en(tp, false);
3383         r8153_u1u2en(tp, true);
3384 
3385         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ALDPS_SPDWN_RATIO);
3386         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, EEE_SPDWN_RATIO);
3387         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3,
3388                        PKT_AVAIL_SPDWN_EN | SUSPEND_SPDWN_EN |
3389                        U1U2_SPDWN_EN | L1_SPDWN_EN);
3390         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4,
3391                        PWRSAVE_SPDWN_EN | RXDV_SPDWN_EN | TX10MIDLE_EN |
3392                        TP100_SPDWN_EN | TP500_SPDWN_EN | TP1000_SPDWN_EN |
3393                        EEE_SPDWN_EN);
3394 
3395         r8153_enable_eee(tp);
3396         r8153_aldps_en(tp, true);
3397         r8152b_enable_fc(tp);
3398         rtl_tally_reset(tp);
3399         r8153_u2p3en(tp, true);
3400 }
3401 
3402 static int rtl8152_pre_reset(struct usb_interface *intf)
3403 {
3404         struct r8152 *tp = usb_get_intfdata(intf);
3405         struct net_device *netdev;
3406 
3407         if (!tp)
3408                 return 0;
3409 
3410         netdev = tp->netdev;
3411         if (!netif_running(netdev))
3412                 return 0;
3413 
3414         napi_disable(&tp->napi);
3415         clear_bit(WORK_ENABLE, &tp->flags);
3416         usb_kill_urb(tp->intr_urb);
3417         cancel_delayed_work_sync(&tp->schedule);
3418         if (netif_carrier_ok(netdev)) {
3419                 netif_stop_queue(netdev);
3420                 mutex_lock(&tp->control);
3421                 tp->rtl_ops.disable(tp);
3422                 mutex_unlock(&tp->control);
3423         }
3424 
3425         return 0;
3426 }
3427 
3428 static int rtl8152_post_reset(struct usb_interface *intf)
3429 {
3430         struct r8152 *tp = usb_get_intfdata(intf);
3431         struct net_device *netdev;
3432 
3433         if (!tp)
3434                 return 0;
3435 
3436         netdev = tp->netdev;
3437         if (!netif_running(netdev))
3438                 return 0;
3439 
3440         set_bit(WORK_ENABLE, &tp->flags);
3441         if (netif_carrier_ok(netdev)) {
3442                 mutex_lock(&tp->control);
3443                 tp->rtl_ops.enable(tp);
3444                 rtl8152_set_rx_mode(netdev);
3445                 mutex_unlock(&tp->control);
3446                 netif_wake_queue(netdev);
3447         }
3448 
3449         napi_enable(&tp->napi);
3450 
3451         return 0;
3452 }
3453 
3454 static bool delay_autosuspend(struct r8152 *tp)
3455 {
3456         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3457         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3458 
3459         /* This means a linking change occurs and the driver doesn't detect it,
3460          * yet. If the driver has disabled tx/rx and hw is linking on, the
3461          * device wouldn't wake up by receiving any packet.
3462          */
3463         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3464                 return true;
3465 
3466         /* If the linking down is occurred by nway, the device may miss the
3467          * linking change event. And it wouldn't wake when linking on.
3468          */
3469         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3470                 return true;
3471         else
3472                 return false;
3473 }
3474 
3475 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3476 {
3477         struct r8152 *tp = usb_get_intfdata(intf);
3478         struct net_device *netdev = tp->netdev;
3479         int ret = 0;
3480 
3481         mutex_lock(&tp->control);
3482 
3483         if (PMSG_IS_AUTO(message)) {
3484                 if (netif_running(netdev) && delay_autosuspend(tp)) {
3485                         ret = -EBUSY;
3486                         goto out1;
3487                 }
3488 
3489                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3490         } else {
3491                 netif_device_detach(netdev);
3492         }
3493 
3494         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3495                 clear_bit(WORK_ENABLE, &tp->flags);
3496                 usb_kill_urb(tp->intr_urb);
3497                 napi_disable(&tp->napi);
3498                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3499                         rtl_stop_rx(tp);
3500                         rtl_runtime_suspend_enable(tp, true);
3501                 } else {
3502                         cancel_delayed_work_sync(&tp->schedule);
3503                         tp->rtl_ops.down(tp);
3504                 }
3505                 napi_enable(&tp->napi);
3506         }
3507 out1:
3508         mutex_unlock(&tp->control);
3509 
3510         return ret;
3511 }
3512 
3513 static int rtl8152_resume(struct usb_interface *intf)
3514 {
3515         struct r8152 *tp = usb_get_intfdata(intf);
3516 
3517         mutex_lock(&tp->control);
3518 
3519         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3520                 tp->rtl_ops.init(tp);
3521                 netif_device_attach(tp->netdev);
3522         }
3523 
3524         if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3525                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3526                         rtl_runtime_suspend_enable(tp, false);
3527                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3528                         napi_disable(&tp->napi);
3529                         set_bit(WORK_ENABLE, &tp->flags);
3530                         if (netif_carrier_ok(tp->netdev))
3531                                 rtl_start_rx(tp);
3532                         napi_enable(&tp->napi);
3533                 } else {
3534                         tp->rtl_ops.up(tp);
3535                         rtl8152_set_speed(tp, AUTONEG_ENABLE,
3536                                           tp->mii.supports_gmii ?
3537                                           SPEED_1000 : SPEED_100,
3538                                           DUPLEX_FULL);
3539                         netif_carrier_off(tp->netdev);
3540                         set_bit(WORK_ENABLE, &tp->flags);
3541                 }
3542                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3543         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3544                 if (tp->netdev->flags & IFF_UP)
3545                         rtl_runtime_suspend_enable(tp, false);
3546                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3547         }
3548 
3549         mutex_unlock(&tp->control);
3550 
3551         return 0;
3552 }
3553 
3554 static int rtl8152_reset_resume(struct usb_interface *intf)
3555 {
3556         struct r8152 *tp = usb_get_intfdata(intf);
3557 
3558         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3559         return rtl8152_resume(intf);
3560 }
3561 
3562 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3563 {
3564         struct r8152 *tp = netdev_priv(dev);
3565 
3566         if (usb_autopm_get_interface(tp->intf) < 0)
3567                 return;
3568 
3569         if (!rtl_can_wakeup(tp)) {
3570                 wol->supported = 0;
3571                 wol->wolopts = 0;
3572         } else {
3573                 mutex_lock(&tp->control);
3574                 wol->supported = WAKE_ANY;
3575                 wol->wolopts = __rtl_get_wol(tp);
3576                 mutex_unlock(&tp->control);
3577         }
3578 
3579         usb_autopm_put_interface(tp->intf);
3580 }
3581 
3582 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3583 {
3584         struct r8152 *tp = netdev_priv(dev);
3585         int ret;
3586 
3587         if (!rtl_can_wakeup(tp))
3588                 return -EOPNOTSUPP;
3589 
3590         ret = usb_autopm_get_interface(tp->intf);
3591         if (ret < 0)
3592                 goto out_set_wol;
3593 
3594         mutex_lock(&tp->control);
3595 
3596         __rtl_set_wol(tp, wol->wolopts);
3597         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3598 
3599         mutex_unlock(&tp->control);
3600 
3601         usb_autopm_put_interface(tp->intf);
3602 
3603 out_set_wol:
3604         return ret;
3605 }
3606 
3607 static u32 rtl8152_get_msglevel(struct net_device *dev)
3608 {
3609         struct r8152 *tp = netdev_priv(dev);
3610 
3611         return tp->msg_enable;
3612 }
3613 
3614 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3615 {
3616         struct r8152 *tp = netdev_priv(dev);
3617 
3618         tp->msg_enable = value;
3619 }
3620 
3621 static void rtl8152_get_drvinfo(struct net_device *netdev,
3622                                 struct ethtool_drvinfo *info)
3623 {
3624         struct r8152 *tp = netdev_priv(netdev);
3625 
3626         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3627         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3628         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3629 }
3630 
3631 static
3632 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3633 {
3634         struct r8152 *tp = netdev_priv(netdev);
3635         int ret;
3636 
3637         if (!tp->mii.mdio_read)
3638                 return -EOPNOTSUPP;
3639 
3640         ret = usb_autopm_get_interface(tp->intf);
3641         if (ret < 0)
3642                 goto out;
3643 
3644         mutex_lock(&tp->control);
3645 
3646         ret = mii_ethtool_gset(&tp->mii, cmd);
3647 
3648         mutex_unlock(&tp->control);
3649 
3650         usb_autopm_put_interface(tp->intf);
3651 
3652 out:
3653         return ret;
3654 }
3655 
3656 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3657 {
3658         struct r8152 *tp = netdev_priv(dev);
3659         int ret;
3660 
3661         ret = usb_autopm_get_interface(tp->intf);
3662         if (ret < 0)
3663                 goto out;
3664 
3665         mutex_lock(&tp->control);
3666 
3667         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3668 
3669         mutex_unlock(&tp->control);
3670 
3671         usb_autopm_put_interface(tp->intf);
3672 
3673 out:
3674         return ret;
3675 }
3676 
3677 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3678         "tx_packets",
3679         "rx_packets",
3680         "tx_errors",
3681         "rx_errors",
3682         "rx_missed",
3683         "align_errors",
3684         "tx_single_collisions",
3685         "tx_multi_collisions",
3686         "rx_unicast",
3687         "rx_broadcast",
3688         "rx_multicast",
3689         "tx_aborted",
3690         "tx_underrun",
3691 };
3692 
3693 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3694 {
3695         switch (sset) {
3696         case ETH_SS_STATS:
3697                 return ARRAY_SIZE(rtl8152_gstrings);
3698         default:
3699                 return -EOPNOTSUPP;
3700         }
3701 }
3702 
3703 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3704                                       struct ethtool_stats *stats, u64 *data)
3705 {
3706         struct r8152 *tp = netdev_priv(dev);
3707         struct tally_counter tally;
3708 
3709         if (usb_autopm_get_interface(tp->intf) < 0)
3710                 return;
3711 
3712         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3713 
3714         usb_autopm_put_interface(tp->intf);
3715 
3716         data[0] = le64_to_cpu(tally.tx_packets);
3717         data[1] = le64_to_cpu(tally.rx_packets);
3718         data[2] = le64_to_cpu(tally.tx_errors);
3719         data[3] = le32_to_cpu(tally.rx_errors);
3720         data[4] = le16_to_cpu(tally.rx_missed);
3721         data[5] = le16_to_cpu(tally.align_errors);
3722         data[6] = le32_to_cpu(tally.tx_one_collision);
3723         data[7] = le32_to_cpu(tally.tx_multi_collision);
3724         data[8] = le64_to_cpu(tally.rx_unicast);
3725         data[9] = le64_to_cpu(tally.rx_broadcast);
3726         data[10] = le32_to_cpu(tally.rx_multicast);
3727         data[11] = le16_to_cpu(tally.tx_aborted);
3728         data[12] = le16_to_cpu(tally.tx_underrun);
3729 }
3730 
3731 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3732 {
3733         switch (stringset) {
3734         case ETH_SS_STATS:
3735                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3736                 break;
3737         }
3738 }
3739 
3740 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3741 {
3742         u32 ocp_data, lp, adv, supported = 0;
3743         u16 val;
3744 
3745         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3746         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3747 
3748         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3749         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3750 
3751         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3752         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3753 
3754         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3755         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3756 
3757         eee->eee_enabled = !!ocp_data;
3758         eee->eee_active = !!(supported & adv & lp);
3759         eee->supported = supported;
3760         eee->advertised = adv;
3761         eee->lp_advertised = lp;
3762 
3763         return 0;
3764 }
3765 
3766 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3767 {
3768         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3769 
3770         r8152_eee_en(tp, eee->eee_enabled);
3771 
3772         if (!eee->eee_enabled)
3773                 val = 0;
3774 
3775         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3776 
3777         return 0;
3778 }
3779 
3780 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3781 {
3782         u32 ocp_data, lp, adv, supported = 0;
3783         u16 val;
3784 
3785         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3786         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3787 
3788         val = ocp_reg_read(tp, OCP_EEE_ADV);
3789         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3790 
3791         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3792         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3793 
3794         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3795         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3796 
3797         eee->eee_enabled = !!ocp_data;
3798         eee->eee_active = !!(supported & adv & lp);
3799         eee->supported = supported;
3800         eee->advertised = adv;
3801         eee->lp_advertised = lp;
3802 
3803         return 0;
3804 }
3805 
3806 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3807 {
3808         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3809 
3810         r8153_eee_en(tp, eee->eee_enabled);
3811 
3812         if (!eee->eee_enabled)
3813                 val = 0;
3814 
3815         ocp_reg_write(tp, OCP_EEE_ADV, val);
3816 
3817         return 0;
3818 }
3819 
3820 static int
3821 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3822 {
3823         struct r8152 *tp = netdev_priv(net);
3824         int ret;
3825 
3826         ret = usb_autopm_get_interface(tp->intf);
3827         if (ret < 0)
3828                 goto out;
3829 
3830         mutex_lock(&tp->control);
3831 
3832         ret = tp->rtl_ops.eee_get(tp, edata);
3833 
3834         mutex_unlock(&tp->control);
3835 
3836         usb_autopm_put_interface(tp->intf);
3837 
3838 out:
3839         return ret;
3840 }
3841 
3842 static int
3843 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3844 {
3845         struct r8152 *tp = netdev_priv(net);
3846         int ret;
3847 
3848         ret = usb_autopm_get_interface(tp->intf);
3849         if (ret < 0)
3850                 goto out;
3851 
3852         mutex_lock(&tp->control);
3853 
3854         ret = tp->rtl_ops.eee_set(tp, edata);
3855         if (!ret)
3856                 ret = mii_nway_restart(&tp->mii);
3857 
3858         mutex_unlock(&tp->control);
3859 
3860         usb_autopm_put_interface(tp->intf);
3861 
3862 out:
3863         return ret;
3864 }
3865 
3866 static int rtl8152_nway_reset(struct net_device *dev)
3867 {
3868         struct r8152 *tp = netdev_priv(dev);
3869         int ret;
3870 
3871         ret = usb_autopm_get_interface(tp->intf);
3872         if (ret < 0)
3873                 goto out;
3874 
3875         mutex_lock(&tp->control);
3876 
3877         ret = mii_nway_restart(&tp->mii);
3878 
3879         mutex_unlock(&tp->control);
3880 
3881         usb_autopm_put_interface(tp->intf);
3882 
3883 out:
3884         return ret;
3885 }
3886 
3887 static int rtl8152_get_coalesce(struct net_device *netdev,
3888                                 struct ethtool_coalesce *coalesce)
3889 {
3890         struct r8152 *tp = netdev_priv(netdev);
3891 
3892         switch (tp->version) {
3893         case RTL_VER_01:
3894         case RTL_VER_02:
3895                 return -EOPNOTSUPP;
3896         default:
3897                 break;
3898         }
3899 
3900         coalesce->rx_coalesce_usecs = tp->coalesce;
3901 
3902         return 0;
3903 }
3904 
3905 static int rtl8152_set_coalesce(struct net_device *netdev,
3906                                 struct ethtool_coalesce *coalesce)
3907 {
3908         struct r8152 *tp = netdev_priv(netdev);
3909         int ret;
3910 
3911         switch (tp->version) {
3912         case RTL_VER_01:
3913         case RTL_VER_02:
3914                 return -EOPNOTSUPP;
3915         default:
3916                 break;
3917         }
3918 
3919         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
3920                 return -EINVAL;
3921 
3922         ret = usb_autopm_get_interface(tp->intf);
3923         if (ret < 0)
3924                 return ret;
3925 
3926         mutex_lock(&tp->control);
3927 
3928         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
3929                 tp->coalesce = coalesce->rx_coalesce_usecs;
3930 
3931                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
3932                         r8153_set_rx_early_timeout(tp);
3933         }
3934 
3935         mutex_unlock(&tp->control);
3936 
3937         usb_autopm_put_interface(tp->intf);
3938 
3939         return ret;
3940 }
3941 
3942 static struct ethtool_ops ops = {
3943         .get_drvinfo = rtl8152_get_drvinfo,
3944         .get_settings = rtl8152_get_settings,
3945         .set_settings = rtl8152_set_settings,
3946         .get_link = ethtool_op_get_link,
3947         .nway_reset = rtl8152_nway_reset,
3948         .get_msglevel = rtl8152_get_msglevel,
3949         .set_msglevel = rtl8152_set_msglevel,
3950         .get_wol = rtl8152_get_wol,
3951         .set_wol = rtl8152_set_wol,
3952         .get_strings = rtl8152_get_strings,
3953         .get_sset_count = rtl8152_get_sset_count,
3954         .get_ethtool_stats = rtl8152_get_ethtool_stats,
3955         .get_coalesce = rtl8152_get_coalesce,
3956         .set_coalesce = rtl8152_set_coalesce,
3957         .get_eee = rtl_ethtool_get_eee,
3958         .set_eee = rtl_ethtool_set_eee,
3959 };
3960 
3961 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
3962 {
3963         struct r8152 *tp = netdev_priv(netdev);
3964         struct mii_ioctl_data *data = if_mii(rq);
3965         int res;
3966 
3967         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3968                 return -ENODEV;
3969 
3970         res = usb_autopm_get_interface(tp->intf);
3971         if (res < 0)
3972                 goto out;
3973 
3974         switch (cmd) {
3975         case SIOCGMIIPHY:
3976                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
3977                 break;
3978 
3979         case SIOCGMIIREG:
3980                 mutex_lock(&tp->control);
3981                 data->val_out = r8152_mdio_read(tp, data->reg_num);
3982                 mutex_unlock(&tp->control);
3983                 break;
3984 
3985         case SIOCSMIIREG:
3986                 if (!capable(CAP_NET_ADMIN)) {
3987                         res = -EPERM;
3988                         break;
3989                 }
3990                 mutex_lock(&tp->control);
3991                 r8152_mdio_write(tp, data->reg_num, data->val_in);
3992                 mutex_unlock(&tp->control);
3993                 break;
3994 
3995         default:
3996                 res = -EOPNOTSUPP;
3997         }
3998 
3999         usb_autopm_put_interface(tp->intf);
4000 
4001 out:
4002         return res;
4003 }
4004 
4005 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4006 {
4007         struct r8152 *tp = netdev_priv(dev);
4008         int ret;
4009 
4010         switch (tp->version) {
4011         case RTL_VER_01:
4012         case RTL_VER_02:
4013                 return eth_change_mtu(dev, new_mtu);
4014         default:
4015                 break;
4016         }
4017 
4018         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4019                 return -EINVAL;
4020 
4021         ret = usb_autopm_get_interface(tp->intf);
4022         if (ret < 0)
4023                 return ret;
4024 
4025         mutex_lock(&tp->control);
4026 
4027         dev->mtu = new_mtu;
4028 
4029         if (netif_running(dev) && netif_carrier_ok(dev))
4030                 r8153_set_rx_early_size(tp);
4031 
4032         mutex_unlock(&tp->control);
4033 
4034         usb_autopm_put_interface(tp->intf);
4035 
4036         return ret;
4037 }
4038 
4039 static const struct net_device_ops rtl8152_netdev_ops = {
4040         .ndo_open               = rtl8152_open,
4041         .ndo_stop               = rtl8152_close,
4042         .ndo_do_ioctl           = rtl8152_ioctl,
4043         .ndo_start_xmit         = rtl8152_start_xmit,
4044         .ndo_tx_timeout         = rtl8152_tx_timeout,
4045         .ndo_set_features       = rtl8152_set_features,
4046         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4047         .ndo_set_mac_address    = rtl8152_set_mac_address,
4048         .ndo_change_mtu         = rtl8152_change_mtu,
4049         .ndo_validate_addr      = eth_validate_addr,
4050         .ndo_features_check     = rtl8152_features_check,
4051 };
4052 
4053 static void r8152b_get_version(struct r8152 *tp)
4054 {
4055         u32     ocp_data;
4056         u16     version;
4057 
4058         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4059         version = (u16)(ocp_data & VERSION_MASK);
4060 
4061         switch (version) {
4062         case 0x4c00:
4063                 tp->version = RTL_VER_01;
4064                 break;
4065         case 0x4c10:
4066                 tp->version = RTL_VER_02;
4067                 break;
4068         case 0x5c00:
4069                 tp->version = RTL_VER_03;
4070                 tp->mii.supports_gmii = 1;
4071                 break;
4072         case 0x5c10:
4073                 tp->version = RTL_VER_04;
4074                 tp->mii.supports_gmii = 1;
4075                 break;
4076         case 0x5c20:
4077                 tp->version = RTL_VER_05;
4078                 tp->mii.supports_gmii = 1;
4079                 break;
4080         case 0x5c30:
4081                 tp->version = RTL_VER_06;
4082                 tp->mii.supports_gmii = 1;
4083                 break;
4084         default:
4085                 netif_info(tp, probe, tp->netdev,
4086                            "Unknown version 0x%04x\n", version);
4087                 break;
4088         }
4089 }
4090 
4091 static void rtl8152_unload(struct r8152 *tp)
4092 {
4093         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4094                 return;
4095 
4096         if (tp->version != RTL_VER_01)
4097                 r8152_power_cut_en(tp, true);
4098 }
4099 
4100 static void rtl8153_unload(struct r8152 *tp)
4101 {
4102         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4103                 return;
4104 
4105         r8153_power_cut_en(tp, false);
4106 }
4107 
4108 static int rtl_ops_init(struct r8152 *tp)
4109 {
4110         struct rtl_ops *ops = &tp->rtl_ops;
4111         int ret = 0;
4112 
4113         switch (tp->version) {
4114         case RTL_VER_01:
4115         case RTL_VER_02:
4116                 ops->init               = r8152b_init;
4117                 ops->enable             = rtl8152_enable;
4118                 ops->disable            = rtl8152_disable;
4119                 ops->up                 = rtl8152_up;
4120                 ops->down               = rtl8152_down;
4121                 ops->unload             = rtl8152_unload;
4122                 ops->eee_get            = r8152_get_eee;
4123                 ops->eee_set            = r8152_set_eee;
4124                 ops->in_nway            = rtl8152_in_nway;
4125                 break;
4126 
4127         case RTL_VER_03:
4128         case RTL_VER_04:
4129         case RTL_VER_05:
4130         case RTL_VER_06:
4131                 ops->init               = r8153_init;
4132                 ops->enable             = rtl8153_enable;
4133                 ops->disable            = rtl8153_disable;
4134                 ops->up                 = rtl8153_up;
4135                 ops->down               = rtl8153_down;
4136                 ops->unload             = rtl8153_unload;
4137                 ops->eee_get            = r8153_get_eee;
4138                 ops->eee_set            = r8153_set_eee;
4139                 ops->in_nway            = rtl8153_in_nway;
4140                 break;
4141 
4142         default:
4143                 ret = -ENODEV;
4144                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4145                 break;
4146         }
4147 
4148         return ret;
4149 }
4150 
4151 static int rtl8152_probe(struct usb_interface *intf,
4152                          const struct usb_device_id *id)
4153 {
4154         struct usb_device *udev = interface_to_usbdev(intf);
4155         struct r8152 *tp;
4156         struct net_device *netdev;
4157         int ret;
4158 
4159         if (udev->actconfig->desc.bConfigurationValue != 1) {
4160                 usb_driver_set_configuration(udev, 1);
4161                 return -ENODEV;
4162         }
4163 
4164         usb_reset_device(udev);
4165         netdev = alloc_etherdev(sizeof(struct r8152));
4166         if (!netdev) {
4167                 dev_err(&intf->dev, "Out of memory\n");
4168                 return -ENOMEM;
4169         }
4170 
4171         SET_NETDEV_DEV(netdev, &intf->dev);
4172         tp = netdev_priv(netdev);
4173         tp->msg_enable = 0x7FFF;
4174 
4175         tp->udev = udev;
4176         tp->netdev = netdev;
4177         tp->intf = intf;
4178 
4179         r8152b_get_version(tp);
4180         ret = rtl_ops_init(tp);
4181         if (ret)
4182                 goto out;
4183 
4184         mutex_init(&tp->control);
4185         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4186 
4187         netdev->netdev_ops = &rtl8152_netdev_ops;
4188         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4189 
4190         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4191                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4192                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4193                             NETIF_F_HW_VLAN_CTAG_TX;
4194         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4195                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4196                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4197                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4198         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4199                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4200                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4201 
4202         netdev->ethtool_ops = &ops;
4203         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4204 
4205         tp->mii.dev = netdev;
4206         tp->mii.mdio_read = read_mii_word;
4207         tp->mii.mdio_write = write_mii_word;
4208         tp->mii.phy_id_mask = 0x3f;
4209         tp->mii.reg_num_mask = 0x1f;
4210         tp->mii.phy_id = R8152_PHY_ID;
4211 
4212         switch (udev->speed) {
4213         case USB_SPEED_SUPER:
4214                 tp->coalesce = COALESCE_SUPER;
4215                 break;
4216         case USB_SPEED_HIGH:
4217                 tp->coalesce = COALESCE_HIGH;
4218                 break;
4219         default:
4220                 tp->coalesce = COALESCE_SLOW;
4221                 break;
4222         }
4223 
4224         intf->needs_remote_wakeup = 1;
4225 
4226         tp->rtl_ops.init(tp);
4227         set_ethernet_addr(tp);
4228 
4229         usb_set_intfdata(intf, tp);
4230         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4231 
4232         ret = register_netdev(netdev);
4233         if (ret != 0) {
4234                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4235                 goto out1;
4236         }
4237 
4238         if (!rtl_can_wakeup(tp))
4239                 __rtl_set_wol(tp, 0);
4240 
4241         tp->saved_wolopts = __rtl_get_wol(tp);
4242         if (tp->saved_wolopts)
4243                 device_set_wakeup_enable(&udev->dev, true);
4244         else
4245                 device_set_wakeup_enable(&udev->dev, false);
4246 
4247         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4248 
4249         return 0;
4250 
4251 out1:
4252         netif_napi_del(&tp->napi);
4253         usb_set_intfdata(intf, NULL);
4254 out:
4255         free_netdev(netdev);
4256         return ret;
4257 }
4258 
4259 static void rtl8152_disconnect(struct usb_interface *intf)
4260 {
4261         struct r8152 *tp = usb_get_intfdata(intf);
4262 
4263         usb_set_intfdata(intf, NULL);
4264         if (tp) {
4265                 struct usb_device *udev = tp->udev;
4266 
4267                 if (udev->state == USB_STATE_NOTATTACHED)
4268                         set_bit(RTL8152_UNPLUG, &tp->flags);
4269 
4270                 netif_napi_del(&tp->napi);
4271                 unregister_netdev(tp->netdev);
4272                 tp->rtl_ops.unload(tp);
4273                 free_netdev(tp->netdev);
4274         }
4275 }
4276 
4277 #define REALTEK_USB_DEVICE(vend, prod)  \
4278         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4279                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4280         .idVendor = (vend), \
4281         .idProduct = (prod), \
4282         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4283 }, \
4284 { \
4285         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4286                        USB_DEVICE_ID_MATCH_DEVICE, \
4287         .idVendor = (vend), \
4288         .idProduct = (prod), \
4289         .bInterfaceClass = USB_CLASS_COMM, \
4290         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4291         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4292 
4293 /* table of devices that work with this driver */
4294 static struct usb_device_id rtl8152_table[] = {
4295         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4296         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4297         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4298         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4299         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4300         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4301         {}
4302 };
4303 
4304 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4305 
4306 static struct usb_driver rtl8152_driver = {
4307         .name =         MODULENAME,
4308         .id_table =     rtl8152_table,
4309         .probe =        rtl8152_probe,
4310         .disconnect =   rtl8152_disconnect,
4311         .suspend =      rtl8152_suspend,
4312         .resume =       rtl8152_resume,
4313         .reset_resume = rtl8152_reset_resume,
4314         .pre_reset =    rtl8152_pre_reset,
4315         .post_reset =   rtl8152_post_reset,
4316         .supports_autosuspend = 1,
4317         .disable_hub_initiated_lpm = 1,
4318 };
4319 
4320 module_usb_driver(rtl8152_driver);
4321 
4322 MODULE_AUTHOR(DRIVER_AUTHOR);
4323 MODULE_DESCRIPTION(DRIVER_DESC);
4324 MODULE_LICENSE("GPL");
4325 

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