Version:  2.0.40 2.2.26 2.4.37 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9

Linux/drivers/net/usb/r8152.c

  1 /*
  2  *  Copyright (c) 2014 Realtek Semiconductor Corp. All rights reserved.
  3  *
  4  * This program is free software; you can redistribute it and/or
  5  * modify it under the terms of the GNU General Public License
  6  * version 2 as published by the Free Software Foundation.
  7  *
  8  */
  9 
 10 #include <linux/signal.h>
 11 #include <linux/slab.h>
 12 #include <linux/module.h>
 13 #include <linux/netdevice.h>
 14 #include <linux/etherdevice.h>
 15 #include <linux/mii.h>
 16 #include <linux/ethtool.h>
 17 #include <linux/usb.h>
 18 #include <linux/crc32.h>
 19 #include <linux/if_vlan.h>
 20 #include <linux/uaccess.h>
 21 #include <linux/list.h>
 22 #include <linux/ip.h>
 23 #include <linux/ipv6.h>
 24 #include <net/ip6_checksum.h>
 25 #include <uapi/linux/mdio.h>
 26 #include <linux/mdio.h>
 27 #include <linux/usb/cdc.h>
 28 #include <linux/suspend.h>
 29 #include <linux/acpi.h>
 30 
 31 /* Information for net-next */
 32 #define NETNEXT_VERSION         "08"
 33 
 34 /* Information for net */
 35 #define NET_VERSION             "6"
 36 
 37 #define DRIVER_VERSION          "v1." NETNEXT_VERSION "." NET_VERSION
 38 #define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
 39 #define DRIVER_DESC "Realtek RTL8152/RTL8153 Based USB Ethernet Adapters"
 40 #define MODULENAME "r8152"
 41 
 42 #define R8152_PHY_ID            32
 43 
 44 #define PLA_IDR                 0xc000
 45 #define PLA_RCR                 0xc010
 46 #define PLA_RMS                 0xc016
 47 #define PLA_RXFIFO_CTRL0        0xc0a0
 48 #define PLA_RXFIFO_CTRL1        0xc0a4
 49 #define PLA_RXFIFO_CTRL2        0xc0a8
 50 #define PLA_DMY_REG0            0xc0b0
 51 #define PLA_FMC                 0xc0b4
 52 #define PLA_CFG_WOL             0xc0b6
 53 #define PLA_TEREDO_CFG          0xc0bc
 54 #define PLA_MAR                 0xcd00
 55 #define PLA_BACKUP              0xd000
 56 #define PAL_BDC_CR              0xd1a0
 57 #define PLA_TEREDO_TIMER        0xd2cc
 58 #define PLA_REALWOW_TIMER       0xd2e8
 59 #define PLA_LEDSEL              0xdd90
 60 #define PLA_LED_FEATURE         0xdd92
 61 #define PLA_PHYAR               0xde00
 62 #define PLA_BOOT_CTRL           0xe004
 63 #define PLA_GPHY_INTR_IMR       0xe022
 64 #define PLA_EEE_CR              0xe040
 65 #define PLA_EEEP_CR             0xe080
 66 #define PLA_MAC_PWR_CTRL        0xe0c0
 67 #define PLA_MAC_PWR_CTRL2       0xe0ca
 68 #define PLA_MAC_PWR_CTRL3       0xe0cc
 69 #define PLA_MAC_PWR_CTRL4       0xe0ce
 70 #define PLA_WDT6_CTRL           0xe428
 71 #define PLA_TCR0                0xe610
 72 #define PLA_TCR1                0xe612
 73 #define PLA_MTPS                0xe615
 74 #define PLA_TXFIFO_CTRL         0xe618
 75 #define PLA_RSTTALLY            0xe800
 76 #define PLA_CR                  0xe813
 77 #define PLA_CRWECR              0xe81c
 78 #define PLA_CONFIG12            0xe81e  /* CONFIG1, CONFIG2 */
 79 #define PLA_CONFIG34            0xe820  /* CONFIG3, CONFIG4 */
 80 #define PLA_CONFIG5             0xe822
 81 #define PLA_PHY_PWR             0xe84c
 82 #define PLA_OOB_CTRL            0xe84f
 83 #define PLA_CPCR                0xe854
 84 #define PLA_MISC_0              0xe858
 85 #define PLA_MISC_1              0xe85a
 86 #define PLA_OCP_GPHY_BASE       0xe86c
 87 #define PLA_TALLYCNT            0xe890
 88 #define PLA_SFF_STS_7           0xe8de
 89 #define PLA_PHYSTATUS           0xe908
 90 #define PLA_BP_BA               0xfc26
 91 #define PLA_BP_0                0xfc28
 92 #define PLA_BP_1                0xfc2a
 93 #define PLA_BP_2                0xfc2c
 94 #define PLA_BP_3                0xfc2e
 95 #define PLA_BP_4                0xfc30
 96 #define PLA_BP_5                0xfc32
 97 #define PLA_BP_6                0xfc34
 98 #define PLA_BP_7                0xfc36
 99 #define PLA_BP_EN               0xfc38
100 
101 #define USB_USB2PHY             0xb41e
102 #define USB_SSPHYLINK2          0xb428
103 #define USB_U2P3_CTRL           0xb460
104 #define USB_CSR_DUMMY1          0xb464
105 #define USB_CSR_DUMMY2          0xb466
106 #define USB_DEV_STAT            0xb808
107 #define USB_CONNECT_TIMER       0xcbf8
108 #define USB_BURST_SIZE          0xcfc0
109 #define USB_USB_CTRL            0xd406
110 #define USB_PHY_CTRL            0xd408
111 #define USB_TX_AGG              0xd40a
112 #define USB_RX_BUF_TH           0xd40c
113 #define USB_USB_TIMER           0xd428
114 #define USB_RX_EARLY_TIMEOUT    0xd42c
115 #define USB_RX_EARLY_SIZE       0xd42e
116 #define USB_PM_CTRL_STATUS      0xd432
117 #define USB_TX_DMA              0xd434
118 #define USB_TOLERANCE           0xd490
119 #define USB_LPM_CTRL            0xd41a
120 #define USB_BMU_RESET           0xd4b0
121 #define USB_UPS_CTRL            0xd800
122 #define USB_MISC_0              0xd81a
123 #define USB_POWER_CUT           0xd80a
124 #define USB_AFE_CTRL2           0xd824
125 #define USB_WDT11_CTRL          0xe43c
126 #define USB_BP_BA               0xfc26
127 #define USB_BP_0                0xfc28
128 #define USB_BP_1                0xfc2a
129 #define USB_BP_2                0xfc2c
130 #define USB_BP_3                0xfc2e
131 #define USB_BP_4                0xfc30
132 #define USB_BP_5                0xfc32
133 #define USB_BP_6                0xfc34
134 #define USB_BP_7                0xfc36
135 #define USB_BP_EN               0xfc38
136 
137 /* OCP Registers */
138 #define OCP_ALDPS_CONFIG        0x2010
139 #define OCP_EEE_CONFIG1         0x2080
140 #define OCP_EEE_CONFIG2         0x2092
141 #define OCP_EEE_CONFIG3         0x2094
142 #define OCP_BASE_MII            0xa400
143 #define OCP_EEE_AR              0xa41a
144 #define OCP_EEE_DATA            0xa41c
145 #define OCP_PHY_STATUS          0xa420
146 #define OCP_POWER_CFG           0xa430
147 #define OCP_EEE_CFG             0xa432
148 #define OCP_SRAM_ADDR           0xa436
149 #define OCP_SRAM_DATA           0xa438
150 #define OCP_DOWN_SPEED          0xa442
151 #define OCP_EEE_ABLE            0xa5c4
152 #define OCP_EEE_ADV             0xa5d0
153 #define OCP_EEE_LPABLE          0xa5d2
154 #define OCP_PHY_STATE           0xa708          /* nway state for 8153 */
155 #define OCP_ADC_CFG             0xbc06
156 
157 /* SRAM Register */
158 #define SRAM_LPF_CFG            0x8012
159 #define SRAM_10M_AMP1           0x8080
160 #define SRAM_10M_AMP2           0x8082
161 #define SRAM_IMPEDANCE          0x8084
162 
163 /* PLA_RCR */
164 #define RCR_AAP                 0x00000001
165 #define RCR_APM                 0x00000002
166 #define RCR_AM                  0x00000004
167 #define RCR_AB                  0x00000008
168 #define RCR_ACPT_ALL            (RCR_AAP | RCR_APM | RCR_AM | RCR_AB)
169 
170 /* PLA_RXFIFO_CTRL0 */
171 #define RXFIFO_THR1_NORMAL      0x00080002
172 #define RXFIFO_THR1_OOB         0x01800003
173 
174 /* PLA_RXFIFO_CTRL1 */
175 #define RXFIFO_THR2_FULL        0x00000060
176 #define RXFIFO_THR2_HIGH        0x00000038
177 #define RXFIFO_THR2_OOB         0x0000004a
178 #define RXFIFO_THR2_NORMAL      0x00a0
179 
180 /* PLA_RXFIFO_CTRL2 */
181 #define RXFIFO_THR3_FULL        0x00000078
182 #define RXFIFO_THR3_HIGH        0x00000048
183 #define RXFIFO_THR3_OOB         0x0000005a
184 #define RXFIFO_THR3_NORMAL      0x0110
185 
186 /* PLA_TXFIFO_CTRL */
187 #define TXFIFO_THR_NORMAL       0x00400008
188 #define TXFIFO_THR_NORMAL2      0x01000008
189 
190 /* PLA_DMY_REG0 */
191 #define ECM_ALDPS               0x0002
192 
193 /* PLA_FMC */
194 #define FMC_FCR_MCU_EN          0x0001
195 
196 /* PLA_EEEP_CR */
197 #define EEEP_CR_EEEP_TX         0x0002
198 
199 /* PLA_WDT6_CTRL */
200 #define WDT6_SET_MODE           0x0010
201 
202 /* PLA_TCR0 */
203 #define TCR0_TX_EMPTY           0x0800
204 #define TCR0_AUTO_FIFO          0x0080
205 
206 /* PLA_TCR1 */
207 #define VERSION_MASK            0x7cf0
208 
209 /* PLA_MTPS */
210 #define MTPS_JUMBO              (12 * 1024 / 64)
211 #define MTPS_DEFAULT            (6 * 1024 / 64)
212 
213 /* PLA_RSTTALLY */
214 #define TALLY_RESET             0x0001
215 
216 /* PLA_CR */
217 #define CR_RST                  0x10
218 #define CR_RE                   0x08
219 #define CR_TE                   0x04
220 
221 /* PLA_CRWECR */
222 #define CRWECR_NORAML           0x00
223 #define CRWECR_CONFIG           0xc0
224 
225 /* PLA_OOB_CTRL */
226 #define NOW_IS_OOB              0x80
227 #define TXFIFO_EMPTY            0x20
228 #define RXFIFO_EMPTY            0x10
229 #define LINK_LIST_READY         0x02
230 #define DIS_MCU_CLROOB          0x01
231 #define FIFO_EMPTY              (TXFIFO_EMPTY | RXFIFO_EMPTY)
232 
233 /* PLA_MISC_1 */
234 #define RXDY_GATED_EN           0x0008
235 
236 /* PLA_SFF_STS_7 */
237 #define RE_INIT_LL              0x8000
238 #define MCU_BORW_EN             0x4000
239 
240 /* PLA_CPCR */
241 #define CPCR_RX_VLAN            0x0040
242 
243 /* PLA_CFG_WOL */
244 #define MAGIC_EN                0x0001
245 
246 /* PLA_TEREDO_CFG */
247 #define TEREDO_SEL              0x8000
248 #define TEREDO_WAKE_MASK        0x7f00
249 #define TEREDO_RS_EVENT_MASK    0x00fe
250 #define OOB_TEREDO_EN           0x0001
251 
252 /* PAL_BDC_CR */
253 #define ALDPS_PROXY_MODE        0x0001
254 
255 /* PLA_CONFIG34 */
256 #define LINK_ON_WAKE_EN         0x0010
257 #define LINK_OFF_WAKE_EN        0x0008
258 
259 /* PLA_CONFIG5 */
260 #define BWF_EN                  0x0040
261 #define MWF_EN                  0x0020
262 #define UWF_EN                  0x0010
263 #define LAN_WAKE_EN             0x0002
264 
265 /* PLA_LED_FEATURE */
266 #define LED_MODE_MASK           0x0700
267 
268 /* PLA_PHY_PWR */
269 #define TX_10M_IDLE_EN          0x0080
270 #define PFM_PWM_SWITCH          0x0040
271 
272 /* PLA_MAC_PWR_CTRL */
273 #define D3_CLK_GATED_EN         0x00004000
274 #define MCU_CLK_RATIO           0x07010f07
275 #define MCU_CLK_RATIO_MASK      0x0f0f0f0f
276 #define ALDPS_SPDWN_RATIO       0x0f87
277 
278 /* PLA_MAC_PWR_CTRL2 */
279 #define EEE_SPDWN_RATIO         0x8007
280 
281 /* PLA_MAC_PWR_CTRL3 */
282 #define PKT_AVAIL_SPDWN_EN      0x0100
283 #define SUSPEND_SPDWN_EN        0x0004
284 #define U1U2_SPDWN_EN           0x0002
285 #define L1_SPDWN_EN             0x0001
286 
287 /* PLA_MAC_PWR_CTRL4 */
288 #define PWRSAVE_SPDWN_EN        0x1000
289 #define RXDV_SPDWN_EN           0x0800
290 #define TX10MIDLE_EN            0x0100
291 #define TP100_SPDWN_EN          0x0020
292 #define TP500_SPDWN_EN          0x0010
293 #define TP1000_SPDWN_EN         0x0008
294 #define EEE_SPDWN_EN            0x0001
295 
296 /* PLA_GPHY_INTR_IMR */
297 #define GPHY_STS_MSK            0x0001
298 #define SPEED_DOWN_MSK          0x0002
299 #define SPDWN_RXDV_MSK          0x0004
300 #define SPDWN_LINKCHG_MSK       0x0008
301 
302 /* PLA_PHYAR */
303 #define PHYAR_FLAG              0x80000000
304 
305 /* PLA_EEE_CR */
306 #define EEE_RX_EN               0x0001
307 #define EEE_TX_EN               0x0002
308 
309 /* PLA_BOOT_CTRL */
310 #define AUTOLOAD_DONE           0x0002
311 
312 /* USB_USB2PHY */
313 #define USB2PHY_SUSPEND         0x0001
314 #define USB2PHY_L1              0x0002
315 
316 /* USB_SSPHYLINK2 */
317 #define pwd_dn_scale_mask       0x3ffe
318 #define pwd_dn_scale(x)         ((x) << 1)
319 
320 /* USB_CSR_DUMMY1 */
321 #define DYNAMIC_BURST           0x0001
322 
323 /* USB_CSR_DUMMY2 */
324 #define EP4_FULL_FC             0x0001
325 
326 /* USB_DEV_STAT */
327 #define STAT_SPEED_MASK         0x0006
328 #define STAT_SPEED_HIGH         0x0000
329 #define STAT_SPEED_FULL         0x0002
330 
331 /* USB_TX_AGG */
332 #define TX_AGG_MAX_THRESHOLD    0x03
333 
334 /* USB_RX_BUF_TH */
335 #define RX_THR_SUPPER           0x0c350180
336 #define RX_THR_HIGH             0x7a120180
337 #define RX_THR_SLOW             0xffff0180
338 
339 /* USB_TX_DMA */
340 #define TEST_MODE_DISABLE       0x00000001
341 #define TX_SIZE_ADJUST1         0x00000100
342 
343 /* USB_BMU_RESET */
344 #define BMU_RESET_EP_IN         0x01
345 #define BMU_RESET_EP_OUT        0x02
346 
347 /* USB_UPS_CTRL */
348 #define POWER_CUT               0x0100
349 
350 /* USB_PM_CTRL_STATUS */
351 #define RESUME_INDICATE         0x0001
352 
353 /* USB_USB_CTRL */
354 #define RX_AGG_DISABLE          0x0010
355 #define RX_ZERO_EN              0x0080
356 
357 /* USB_U2P3_CTRL */
358 #define U2P3_ENABLE             0x0001
359 
360 /* USB_POWER_CUT */
361 #define PWR_EN                  0x0001
362 #define PHASE2_EN               0x0008
363 
364 /* USB_MISC_0 */
365 #define PCUT_STATUS             0x0001
366 
367 /* USB_RX_EARLY_TIMEOUT */
368 #define COALESCE_SUPER           85000U
369 #define COALESCE_HIGH           250000U
370 #define COALESCE_SLOW           524280U
371 
372 /* USB_WDT11_CTRL */
373 #define TIMER11_EN              0x0001
374 
375 /* USB_LPM_CTRL */
376 /* bit 4 ~ 5: fifo empty boundary */
377 #define FIFO_EMPTY_1FB          0x30    /* 0x1fb * 64 = 32448 bytes */
378 /* bit 2 ~ 3: LMP timer */
379 #define LPM_TIMER_MASK          0x0c
380 #define LPM_TIMER_500MS         0x04    /* 500 ms */
381 #define LPM_TIMER_500US         0x0c    /* 500 us */
382 #define ROK_EXIT_LPM            0x02
383 
384 /* USB_AFE_CTRL2 */
385 #define SEN_VAL_MASK            0xf800
386 #define SEN_VAL_NORMAL          0xa000
387 #define SEL_RXIDLE              0x0100
388 
389 /* OCP_ALDPS_CONFIG */
390 #define ENPWRSAVE               0x8000
391 #define ENPDNPS                 0x0200
392 #define LINKENA                 0x0100
393 #define DIS_SDSAVE              0x0010
394 
395 /* OCP_PHY_STATUS */
396 #define PHY_STAT_MASK           0x0007
397 #define PHY_STAT_LAN_ON         3
398 #define PHY_STAT_PWRDN          5
399 
400 /* OCP_POWER_CFG */
401 #define EEE_CLKDIV_EN           0x8000
402 #define EN_ALDPS                0x0004
403 #define EN_10M_PLLOFF           0x0001
404 
405 /* OCP_EEE_CONFIG1 */
406 #define RG_TXLPI_MSK_HFDUP      0x8000
407 #define RG_MATCLR_EN            0x4000
408 #define EEE_10_CAP              0x2000
409 #define EEE_NWAY_EN             0x1000
410 #define TX_QUIET_EN             0x0200
411 #define RX_QUIET_EN             0x0100
412 #define sd_rise_time_mask       0x0070
413 #define sd_rise_time(x)         (min(x, 7) << 4)        /* bit 4 ~ 6 */
414 #define RG_RXLPI_MSK_HFDUP      0x0008
415 #define SDFALLTIME              0x0007  /* bit 0 ~ 2 */
416 
417 /* OCP_EEE_CONFIG2 */
418 #define RG_LPIHYS_NUM           0x7000  /* bit 12 ~ 15 */
419 #define RG_DACQUIET_EN          0x0400
420 #define RG_LDVQUIET_EN          0x0200
421 #define RG_CKRSEL               0x0020
422 #define RG_EEEPRG_EN            0x0010
423 
424 /* OCP_EEE_CONFIG3 */
425 #define fast_snr_mask           0xff80
426 #define fast_snr(x)             (min(x, 0x1ff) << 7)    /* bit 7 ~ 15 */
427 #define RG_LFS_SEL              0x0060  /* bit 6 ~ 5 */
428 #define MSK_PH                  0x0006  /* bit 0 ~ 3 */
429 
430 /* OCP_EEE_AR */
431 /* bit[15:14] function */
432 #define FUN_ADDR                0x0000
433 #define FUN_DATA                0x4000
434 /* bit[4:0] device addr */
435 
436 /* OCP_EEE_CFG */
437 #define CTAP_SHORT_EN           0x0040
438 #define EEE10_EN                0x0010
439 
440 /* OCP_DOWN_SPEED */
441 #define EN_10M_BGOFF            0x0080
442 
443 /* OCP_PHY_STATE */
444 #define TXDIS_STATE             0x01
445 #define ABD_STATE               0x02
446 
447 /* OCP_ADC_CFG */
448 #define CKADSEL_L               0x0100
449 #define ADC_EN                  0x0080
450 #define EN_EMI_L                0x0040
451 
452 /* SRAM_LPF_CFG */
453 #define LPF_AUTO_TUNE           0x8000
454 
455 /* SRAM_10M_AMP1 */
456 #define GDAC_IB_UPALL           0x0008
457 
458 /* SRAM_10M_AMP2 */
459 #define AMP_DN                  0x0200
460 
461 /* SRAM_IMPEDANCE */
462 #define RX_DRIVING_MASK         0x6000
463 
464 /* MAC PASSTHRU */
465 #define AD_MASK                 0xfee0
466 #define EFUSE                   0xcfdb
467 #define PASS_THRU_MASK          0x1
468 
469 enum rtl_register_content {
470         _1000bps        = 0x10,
471         _100bps         = 0x08,
472         _10bps          = 0x04,
473         LINK_STATUS     = 0x02,
474         FULL_DUP        = 0x01,
475 };
476 
477 #define RTL8152_MAX_TX          4
478 #define RTL8152_MAX_RX          10
479 #define INTBUFSIZE              2
480 #define CRC_SIZE                4
481 #define TX_ALIGN                4
482 #define RX_ALIGN                8
483 
484 #define INTR_LINK               0x0004
485 
486 #define RTL8152_REQT_READ       0xc0
487 #define RTL8152_REQT_WRITE      0x40
488 #define RTL8152_REQ_GET_REGS    0x05
489 #define RTL8152_REQ_SET_REGS    0x05
490 
491 #define BYTE_EN_DWORD           0xff
492 #define BYTE_EN_WORD            0x33
493 #define BYTE_EN_BYTE            0x11
494 #define BYTE_EN_SIX_BYTES       0x3f
495 #define BYTE_EN_START_MASK      0x0f
496 #define BYTE_EN_END_MASK        0xf0
497 
498 #define RTL8153_MAX_PACKET      9216 /* 9K */
499 #define RTL8153_MAX_MTU         (RTL8153_MAX_PACKET - VLAN_ETH_HLEN - VLAN_HLEN)
500 #define RTL8152_RMS             (VLAN_ETH_FRAME_LEN + VLAN_HLEN)
501 #define RTL8153_RMS             RTL8153_MAX_PACKET
502 #define RTL8152_TX_TIMEOUT      (5 * HZ)
503 #define RTL8152_NAPI_WEIGHT     64
504 
505 /* rtl8152 flags */
506 enum rtl8152_flags {
507         RTL8152_UNPLUG = 0,
508         RTL8152_SET_RX_MODE,
509         WORK_ENABLE,
510         RTL8152_LINK_CHG,
511         SELECTIVE_SUSPEND,
512         PHY_RESET,
513         SCHEDULE_NAPI,
514 };
515 
516 /* Define these values to match your device */
517 #define VENDOR_ID_REALTEK               0x0bda
518 #define VENDOR_ID_SAMSUNG               0x04e8
519 #define VENDOR_ID_LENOVO                0x17ef
520 #define VENDOR_ID_NVIDIA                0x0955
521 
522 #define MCU_TYPE_PLA                    0x0100
523 #define MCU_TYPE_USB                    0x0000
524 
525 struct tally_counter {
526         __le64  tx_packets;
527         __le64  rx_packets;
528         __le64  tx_errors;
529         __le32  rx_errors;
530         __le16  rx_missed;
531         __le16  align_errors;
532         __le32  tx_one_collision;
533         __le32  tx_multi_collision;
534         __le64  rx_unicast;
535         __le64  rx_broadcast;
536         __le32  rx_multicast;
537         __le16  tx_aborted;
538         __le16  tx_underrun;
539 };
540 
541 struct rx_desc {
542         __le32 opts1;
543 #define RX_LEN_MASK                     0x7fff
544 
545         __le32 opts2;
546 #define RD_UDP_CS                       BIT(23)
547 #define RD_TCP_CS                       BIT(22)
548 #define RD_IPV6_CS                      BIT(20)
549 #define RD_IPV4_CS                      BIT(19)
550 
551         __le32 opts3;
552 #define IPF                             BIT(23) /* IP checksum fail */
553 #define UDPF                            BIT(22) /* UDP checksum fail */
554 #define TCPF                            BIT(21) /* TCP checksum fail */
555 #define RX_VLAN_TAG                     BIT(16)
556 
557         __le32 opts4;
558         __le32 opts5;
559         __le32 opts6;
560 };
561 
562 struct tx_desc {
563         __le32 opts1;
564 #define TX_FS                   BIT(31) /* First segment of a packet */
565 #define TX_LS                   BIT(30) /* Final segment of a packet */
566 #define GTSENDV4                BIT(28)
567 #define GTSENDV6                BIT(27)
568 #define GTTCPHO_SHIFT           18
569 #define GTTCPHO_MAX             0x7fU
570 #define TX_LEN_MAX              0x3ffffU
571 
572         __le32 opts2;
573 #define UDP_CS                  BIT(31) /* Calculate UDP/IP checksum */
574 #define TCP_CS                  BIT(30) /* Calculate TCP/IP checksum */
575 #define IPV4_CS                 BIT(29) /* Calculate IPv4 checksum */
576 #define IPV6_CS                 BIT(28) /* Calculate IPv6 checksum */
577 #define MSS_SHIFT               17
578 #define MSS_MAX                 0x7ffU
579 #define TCPHO_SHIFT             17
580 #define TCPHO_MAX               0x7ffU
581 #define TX_VLAN_TAG             BIT(16)
582 };
583 
584 struct r8152;
585 
586 struct rx_agg {
587         struct list_head list;
588         struct urb *urb;
589         struct r8152 *context;
590         void *buffer;
591         void *head;
592 };
593 
594 struct tx_agg {
595         struct list_head list;
596         struct urb *urb;
597         struct r8152 *context;
598         void *buffer;
599         void *head;
600         u32 skb_num;
601         u32 skb_len;
602 };
603 
604 struct r8152 {
605         unsigned long flags;
606         struct usb_device *udev;
607         struct napi_struct napi;
608         struct usb_interface *intf;
609         struct net_device *netdev;
610         struct urb *intr_urb;
611         struct tx_agg tx_info[RTL8152_MAX_TX];
612         struct rx_agg rx_info[RTL8152_MAX_RX];
613         struct list_head rx_done, tx_free;
614         struct sk_buff_head tx_queue, rx_queue;
615         spinlock_t rx_lock, tx_lock;
616         struct delayed_work schedule, hw_phy_work;
617         struct mii_if_info mii;
618         struct mutex control;   /* use for hw setting */
619 #ifdef CONFIG_PM_SLEEP
620         struct notifier_block pm_notifier;
621 #endif
622 
623         struct rtl_ops {
624                 void (*init)(struct r8152 *);
625                 int (*enable)(struct r8152 *);
626                 void (*disable)(struct r8152 *);
627                 void (*up)(struct r8152 *);
628                 void (*down)(struct r8152 *);
629                 void (*unload)(struct r8152 *);
630                 int (*eee_get)(struct r8152 *, struct ethtool_eee *);
631                 int (*eee_set)(struct r8152 *, struct ethtool_eee *);
632                 bool (*in_nway)(struct r8152 *);
633                 void (*hw_phy_cfg)(struct r8152 *);
634                 void (*autosuspend_en)(struct r8152 *tp, bool enable);
635         } rtl_ops;
636 
637         int intr_interval;
638         u32 saved_wolopts;
639         u32 msg_enable;
640         u32 tx_qlen;
641         u32 coalesce;
642         u16 ocp_base;
643         u16 speed;
644         u8 *intr_buff;
645         u8 version;
646         u8 duplex;
647         u8 autoneg;
648 };
649 
650 enum rtl_version {
651         RTL_VER_UNKNOWN = 0,
652         RTL_VER_01,
653         RTL_VER_02,
654         RTL_VER_03,
655         RTL_VER_04,
656         RTL_VER_05,
657         RTL_VER_06,
658         RTL_VER_MAX
659 };
660 
661 enum tx_csum_stat {
662         TX_CSUM_SUCCESS = 0,
663         TX_CSUM_TSO,
664         TX_CSUM_NONE
665 };
666 
667 /* Maximum number of multicast addresses to filter (vs. Rx-all-multicast).
668  * The RTL chips use a 64 element hash table based on the Ethernet CRC.
669  */
670 static const int multicast_filter_limit = 32;
671 static unsigned int agg_buf_sz = 16384;
672 
673 #define RTL_LIMITED_TSO_SIZE    (agg_buf_sz - sizeof(struct tx_desc) - \
674                                  VLAN_ETH_HLEN - VLAN_HLEN)
675 
676 static
677 int get_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
678 {
679         int ret;
680         void *tmp;
681 
682         tmp = kmalloc(size, GFP_KERNEL);
683         if (!tmp)
684                 return -ENOMEM;
685 
686         ret = usb_control_msg(tp->udev, usb_rcvctrlpipe(tp->udev, 0),
687                               RTL8152_REQ_GET_REGS, RTL8152_REQT_READ,
688                               value, index, tmp, size, 500);
689 
690         memcpy(data, tmp, size);
691         kfree(tmp);
692 
693         return ret;
694 }
695 
696 static
697 int set_registers(struct r8152 *tp, u16 value, u16 index, u16 size, void *data)
698 {
699         int ret;
700         void *tmp;
701 
702         tmp = kmemdup(data, size, GFP_KERNEL);
703         if (!tmp)
704                 return -ENOMEM;
705 
706         ret = usb_control_msg(tp->udev, usb_sndctrlpipe(tp->udev, 0),
707                               RTL8152_REQ_SET_REGS, RTL8152_REQT_WRITE,
708                               value, index, tmp, size, 500);
709 
710         kfree(tmp);
711 
712         return ret;
713 }
714 
715 static int generic_ocp_read(struct r8152 *tp, u16 index, u16 size,
716                             void *data, u16 type)
717 {
718         u16 limit = 64;
719         int ret = 0;
720 
721         if (test_bit(RTL8152_UNPLUG, &tp->flags))
722                 return -ENODEV;
723 
724         /* both size and indix must be 4 bytes align */
725         if ((size & 3) || !size || (index & 3) || !data)
726                 return -EPERM;
727 
728         if ((u32)index + (u32)size > 0xffff)
729                 return -EPERM;
730 
731         while (size) {
732                 if (size > limit) {
733                         ret = get_registers(tp, index, type, limit, data);
734                         if (ret < 0)
735                                 break;
736 
737                         index += limit;
738                         data += limit;
739                         size -= limit;
740                 } else {
741                         ret = get_registers(tp, index, type, size, data);
742                         if (ret < 0)
743                                 break;
744 
745                         index += size;
746                         data += size;
747                         size = 0;
748                         break;
749                 }
750         }
751 
752         if (ret == -ENODEV)
753                 set_bit(RTL8152_UNPLUG, &tp->flags);
754 
755         return ret;
756 }
757 
758 static int generic_ocp_write(struct r8152 *tp, u16 index, u16 byteen,
759                              u16 size, void *data, u16 type)
760 {
761         int ret;
762         u16 byteen_start, byteen_end, byen;
763         u16 limit = 512;
764 
765         if (test_bit(RTL8152_UNPLUG, &tp->flags))
766                 return -ENODEV;
767 
768         /* both size and indix must be 4 bytes align */
769         if ((size & 3) || !size || (index & 3) || !data)
770                 return -EPERM;
771 
772         if ((u32)index + (u32)size > 0xffff)
773                 return -EPERM;
774 
775         byteen_start = byteen & BYTE_EN_START_MASK;
776         byteen_end = byteen & BYTE_EN_END_MASK;
777 
778         byen = byteen_start | (byteen_start << 4);
779         ret = set_registers(tp, index, type | byen, 4, data);
780         if (ret < 0)
781                 goto error1;
782 
783         index += 4;
784         data += 4;
785         size -= 4;
786 
787         if (size) {
788                 size -= 4;
789 
790                 while (size) {
791                         if (size > limit) {
792                                 ret = set_registers(tp, index,
793                                                     type | BYTE_EN_DWORD,
794                                                     limit, data);
795                                 if (ret < 0)
796                                         goto error1;
797 
798                                 index += limit;
799                                 data += limit;
800                                 size -= limit;
801                         } else {
802                                 ret = set_registers(tp, index,
803                                                     type | BYTE_EN_DWORD,
804                                                     size, data);
805                                 if (ret < 0)
806                                         goto error1;
807 
808                                 index += size;
809                                 data += size;
810                                 size = 0;
811                                 break;
812                         }
813                 }
814 
815                 byen = byteen_end | (byteen_end >> 4);
816                 ret = set_registers(tp, index, type | byen, 4, data);
817                 if (ret < 0)
818                         goto error1;
819         }
820 
821 error1:
822         if (ret == -ENODEV)
823                 set_bit(RTL8152_UNPLUG, &tp->flags);
824 
825         return ret;
826 }
827 
828 static inline
829 int pla_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
830 {
831         return generic_ocp_read(tp, index, size, data, MCU_TYPE_PLA);
832 }
833 
834 static inline
835 int pla_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
836 {
837         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_PLA);
838 }
839 
840 static inline
841 int usb_ocp_read(struct r8152 *tp, u16 index, u16 size, void *data)
842 {
843         return generic_ocp_read(tp, index, size, data, MCU_TYPE_USB);
844 }
845 
846 static inline
847 int usb_ocp_write(struct r8152 *tp, u16 index, u16 byteen, u16 size, void *data)
848 {
849         return generic_ocp_write(tp, index, byteen, size, data, MCU_TYPE_USB);
850 }
851 
852 static u32 ocp_read_dword(struct r8152 *tp, u16 type, u16 index)
853 {
854         __le32 data;
855 
856         generic_ocp_read(tp, index, sizeof(data), &data, type);
857 
858         return __le32_to_cpu(data);
859 }
860 
861 static void ocp_write_dword(struct r8152 *tp, u16 type, u16 index, u32 data)
862 {
863         __le32 tmp = __cpu_to_le32(data);
864 
865         generic_ocp_write(tp, index, BYTE_EN_DWORD, sizeof(tmp), &tmp, type);
866 }
867 
868 static u16 ocp_read_word(struct r8152 *tp, u16 type, u16 index)
869 {
870         u32 data;
871         __le32 tmp;
872         u8 shift = index & 2;
873 
874         index &= ~3;
875 
876         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
877 
878         data = __le32_to_cpu(tmp);
879         data >>= (shift * 8);
880         data &= 0xffff;
881 
882         return (u16)data;
883 }
884 
885 static void ocp_write_word(struct r8152 *tp, u16 type, u16 index, u32 data)
886 {
887         u32 mask = 0xffff;
888         __le32 tmp;
889         u16 byen = BYTE_EN_WORD;
890         u8 shift = index & 2;
891 
892         data &= mask;
893 
894         if (index & 2) {
895                 byen <<= shift;
896                 mask <<= (shift * 8);
897                 data <<= (shift * 8);
898                 index &= ~3;
899         }
900 
901         tmp = __cpu_to_le32(data);
902 
903         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
904 }
905 
906 static u8 ocp_read_byte(struct r8152 *tp, u16 type, u16 index)
907 {
908         u32 data;
909         __le32 tmp;
910         u8 shift = index & 3;
911 
912         index &= ~3;
913 
914         generic_ocp_read(tp, index, sizeof(tmp), &tmp, type);
915 
916         data = __le32_to_cpu(tmp);
917         data >>= (shift * 8);
918         data &= 0xff;
919 
920         return (u8)data;
921 }
922 
923 static void ocp_write_byte(struct r8152 *tp, u16 type, u16 index, u32 data)
924 {
925         u32 mask = 0xff;
926         __le32 tmp;
927         u16 byen = BYTE_EN_BYTE;
928         u8 shift = index & 3;
929 
930         data &= mask;
931 
932         if (index & 3) {
933                 byen <<= shift;
934                 mask <<= (shift * 8);
935                 data <<= (shift * 8);
936                 index &= ~3;
937         }
938 
939         tmp = __cpu_to_le32(data);
940 
941         generic_ocp_write(tp, index, byen, sizeof(tmp), &tmp, type);
942 }
943 
944 static u16 ocp_reg_read(struct r8152 *tp, u16 addr)
945 {
946         u16 ocp_base, ocp_index;
947 
948         ocp_base = addr & 0xf000;
949         if (ocp_base != tp->ocp_base) {
950                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
951                 tp->ocp_base = ocp_base;
952         }
953 
954         ocp_index = (addr & 0x0fff) | 0xb000;
955         return ocp_read_word(tp, MCU_TYPE_PLA, ocp_index);
956 }
957 
958 static void ocp_reg_write(struct r8152 *tp, u16 addr, u16 data)
959 {
960         u16 ocp_base, ocp_index;
961 
962         ocp_base = addr & 0xf000;
963         if (ocp_base != tp->ocp_base) {
964                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, ocp_base);
965                 tp->ocp_base = ocp_base;
966         }
967 
968         ocp_index = (addr & 0x0fff) | 0xb000;
969         ocp_write_word(tp, MCU_TYPE_PLA, ocp_index, data);
970 }
971 
972 static inline void r8152_mdio_write(struct r8152 *tp, u32 reg_addr, u32 value)
973 {
974         ocp_reg_write(tp, OCP_BASE_MII + reg_addr * 2, value);
975 }
976 
977 static inline int r8152_mdio_read(struct r8152 *tp, u32 reg_addr)
978 {
979         return ocp_reg_read(tp, OCP_BASE_MII + reg_addr * 2);
980 }
981 
982 static void sram_write(struct r8152 *tp, u16 addr, u16 data)
983 {
984         ocp_reg_write(tp, OCP_SRAM_ADDR, addr);
985         ocp_reg_write(tp, OCP_SRAM_DATA, data);
986 }
987 
988 static int read_mii_word(struct net_device *netdev, int phy_id, int reg)
989 {
990         struct r8152 *tp = netdev_priv(netdev);
991         int ret;
992 
993         if (test_bit(RTL8152_UNPLUG, &tp->flags))
994                 return -ENODEV;
995 
996         if (phy_id != R8152_PHY_ID)
997                 return -EINVAL;
998 
999         ret = r8152_mdio_read(tp, reg);
1000 
1001         return ret;
1002 }
1003 
1004 static
1005 void write_mii_word(struct net_device *netdev, int phy_id, int reg, int val)
1006 {
1007         struct r8152 *tp = netdev_priv(netdev);
1008 
1009         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1010                 return;
1011 
1012         if (phy_id != R8152_PHY_ID)
1013                 return;
1014 
1015         r8152_mdio_write(tp, reg, val);
1016 }
1017 
1018 static int
1019 r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags);
1020 
1021 static int rtl8152_set_mac_address(struct net_device *netdev, void *p)
1022 {
1023         struct r8152 *tp = netdev_priv(netdev);
1024         struct sockaddr *addr = p;
1025         int ret = -EADDRNOTAVAIL;
1026 
1027         if (!is_valid_ether_addr(addr->sa_data))
1028                 goto out1;
1029 
1030         ret = usb_autopm_get_interface(tp->intf);
1031         if (ret < 0)
1032                 goto out1;
1033 
1034         mutex_lock(&tp->control);
1035 
1036         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
1037 
1038         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
1039         pla_ocp_write(tp, PLA_IDR, BYTE_EN_SIX_BYTES, 8, addr->sa_data);
1040         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
1041 
1042         mutex_unlock(&tp->control);
1043 
1044         usb_autopm_put_interface(tp->intf);
1045 out1:
1046         return ret;
1047 }
1048 
1049 /* Devices containing RTL8153-AD can support a persistent
1050  * host system provided MAC address.
1051  * Examples of this are Dell TB15 and Dell WD15 docks
1052  */
1053 static int vendor_mac_passthru_addr_read(struct r8152 *tp, struct sockaddr *sa)
1054 {
1055         acpi_status status;
1056         struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
1057         union acpi_object *obj;
1058         int ret = -EINVAL;
1059         u32 ocp_data;
1060         unsigned char buf[6];
1061 
1062         /* test for -AD variant of RTL8153 */
1063         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
1064         if ((ocp_data & AD_MASK) != 0x1000)
1065                 return -ENODEV;
1066 
1067         /* test for MAC address pass-through bit */
1068         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, EFUSE);
1069         if ((ocp_data & PASS_THRU_MASK) != 1)
1070                 return -ENODEV;
1071 
1072         /* returns _AUXMAC_#AABBCCDDEEFF# */
1073         status = acpi_evaluate_object(NULL, "\\_SB.AMAC", NULL, &buffer);
1074         obj = (union acpi_object *)buffer.pointer;
1075         if (!ACPI_SUCCESS(status))
1076                 return -ENODEV;
1077         if (obj->type != ACPI_TYPE_BUFFER || obj->string.length != 0x17) {
1078                 netif_warn(tp, probe, tp->netdev,
1079                            "Invalid buffer for pass-thru MAC addr: (%d, %d)\n",
1080                            obj->type, obj->string.length);
1081                 goto amacout;
1082         }
1083         if (strncmp(obj->string.pointer, "_AUXMAC_#", 9) != 0 ||
1084             strncmp(obj->string.pointer + 0x15, "#", 1) != 0) {
1085                 netif_warn(tp, probe, tp->netdev,
1086                            "Invalid header when reading pass-thru MAC addr\n");
1087                 goto amacout;
1088         }
1089         ret = hex2bin(buf, obj->string.pointer + 9, 6);
1090         if (!(ret == 0 && is_valid_ether_addr(buf))) {
1091                 netif_warn(tp, probe, tp->netdev,
1092                            "Invalid MAC for pass-thru MAC addr: %d, %pM\n",
1093                            ret, buf);
1094                 ret = -EINVAL;
1095                 goto amacout;
1096         }
1097         memcpy(sa->sa_data, buf, 6);
1098         ether_addr_copy(tp->netdev->dev_addr, sa->sa_data);
1099         netif_info(tp, probe, tp->netdev,
1100                    "Using pass-thru MAC addr %pM\n", sa->sa_data);
1101 
1102 amacout:
1103         kfree(obj);
1104         return ret;
1105 }
1106 
1107 static int set_ethernet_addr(struct r8152 *tp)
1108 {
1109         struct net_device *dev = tp->netdev;
1110         struct sockaddr sa;
1111         int ret;
1112 
1113         if (tp->version == RTL_VER_01) {
1114                 ret = pla_ocp_read(tp, PLA_IDR, 8, sa.sa_data);
1115         } else {
1116                 /* if this is not an RTL8153-AD, no eFuse mac pass thru set,
1117                  * or system doesn't provide valid _SB.AMAC this will be
1118                  * be expected to non-zero
1119                  */
1120                 ret = vendor_mac_passthru_addr_read(tp, &sa);
1121                 if (ret < 0)
1122                         ret = pla_ocp_read(tp, PLA_BACKUP, 8, sa.sa_data);
1123         }
1124 
1125         if (ret < 0) {
1126                 netif_err(tp, probe, dev, "Get ether addr fail\n");
1127         } else if (!is_valid_ether_addr(sa.sa_data)) {
1128                 netif_err(tp, probe, dev, "Invalid ether addr %pM\n",
1129                           sa.sa_data);
1130                 eth_hw_addr_random(dev);
1131                 ether_addr_copy(sa.sa_data, dev->dev_addr);
1132                 ret = rtl8152_set_mac_address(dev, &sa);
1133                 netif_info(tp, probe, dev, "Random ether addr %pM\n",
1134                            sa.sa_data);
1135         } else {
1136                 if (tp->version == RTL_VER_01)
1137                         ether_addr_copy(dev->dev_addr, sa.sa_data);
1138                 else
1139                         ret = rtl8152_set_mac_address(dev, &sa);
1140         }
1141 
1142         return ret;
1143 }
1144 
1145 static void read_bulk_callback(struct urb *urb)
1146 {
1147         struct net_device *netdev;
1148         int status = urb->status;
1149         struct rx_agg *agg;
1150         struct r8152 *tp;
1151 
1152         agg = urb->context;
1153         if (!agg)
1154                 return;
1155 
1156         tp = agg->context;
1157         if (!tp)
1158                 return;
1159 
1160         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1161                 return;
1162 
1163         if (!test_bit(WORK_ENABLE, &tp->flags))
1164                 return;
1165 
1166         netdev = tp->netdev;
1167 
1168         /* When link down, the driver would cancel all bulks. */
1169         /* This avoid the re-submitting bulk */
1170         if (!netif_carrier_ok(netdev))
1171                 return;
1172 
1173         usb_mark_last_busy(tp->udev);
1174 
1175         switch (status) {
1176         case 0:
1177                 if (urb->actual_length < ETH_ZLEN)
1178                         break;
1179 
1180                 spin_lock(&tp->rx_lock);
1181                 list_add_tail(&agg->list, &tp->rx_done);
1182                 spin_unlock(&tp->rx_lock);
1183                 napi_schedule(&tp->napi);
1184                 return;
1185         case -ESHUTDOWN:
1186                 set_bit(RTL8152_UNPLUG, &tp->flags);
1187                 netif_device_detach(tp->netdev);
1188                 return;
1189         case -ENOENT:
1190                 return; /* the urb is in unlink state */
1191         case -ETIME:
1192                 if (net_ratelimit())
1193                         netdev_warn(netdev, "maybe reset is needed?\n");
1194                 break;
1195         default:
1196                 if (net_ratelimit())
1197                         netdev_warn(netdev, "Rx status %d\n", status);
1198                 break;
1199         }
1200 
1201         r8152_submit_rx(tp, agg, GFP_ATOMIC);
1202 }
1203 
1204 static void write_bulk_callback(struct urb *urb)
1205 {
1206         struct net_device_stats *stats;
1207         struct net_device *netdev;
1208         struct tx_agg *agg;
1209         struct r8152 *tp;
1210         int status = urb->status;
1211 
1212         agg = urb->context;
1213         if (!agg)
1214                 return;
1215 
1216         tp = agg->context;
1217         if (!tp)
1218                 return;
1219 
1220         netdev = tp->netdev;
1221         stats = &netdev->stats;
1222         if (status) {
1223                 if (net_ratelimit())
1224                         netdev_warn(netdev, "Tx status %d\n", status);
1225                 stats->tx_errors += agg->skb_num;
1226         } else {
1227                 stats->tx_packets += agg->skb_num;
1228                 stats->tx_bytes += agg->skb_len;
1229         }
1230 
1231         spin_lock(&tp->tx_lock);
1232         list_add_tail(&agg->list, &tp->tx_free);
1233         spin_unlock(&tp->tx_lock);
1234 
1235         usb_autopm_put_interface_async(tp->intf);
1236 
1237         if (!netif_carrier_ok(netdev))
1238                 return;
1239 
1240         if (!test_bit(WORK_ENABLE, &tp->flags))
1241                 return;
1242 
1243         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1244                 return;
1245 
1246         if (!skb_queue_empty(&tp->tx_queue))
1247                 napi_schedule(&tp->napi);
1248 }
1249 
1250 static void intr_callback(struct urb *urb)
1251 {
1252         struct r8152 *tp;
1253         __le16 *d;
1254         int status = urb->status;
1255         int res;
1256 
1257         tp = urb->context;
1258         if (!tp)
1259                 return;
1260 
1261         if (!test_bit(WORK_ENABLE, &tp->flags))
1262                 return;
1263 
1264         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1265                 return;
1266 
1267         switch (status) {
1268         case 0:                 /* success */
1269                 break;
1270         case -ECONNRESET:       /* unlink */
1271         case -ESHUTDOWN:
1272                 netif_device_detach(tp->netdev);
1273         case -ENOENT:
1274         case -EPROTO:
1275                 netif_info(tp, intr, tp->netdev,
1276                            "Stop submitting intr, status %d\n", status);
1277                 return;
1278         case -EOVERFLOW:
1279                 netif_info(tp, intr, tp->netdev, "intr status -EOVERFLOW\n");
1280                 goto resubmit;
1281         /* -EPIPE:  should clear the halt */
1282         default:
1283                 netif_info(tp, intr, tp->netdev, "intr status %d\n", status);
1284                 goto resubmit;
1285         }
1286 
1287         d = urb->transfer_buffer;
1288         if (INTR_LINK & __le16_to_cpu(d[0])) {
1289                 if (!netif_carrier_ok(tp->netdev)) {
1290                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1291                         schedule_delayed_work(&tp->schedule, 0);
1292                 }
1293         } else {
1294                 if (netif_carrier_ok(tp->netdev)) {
1295                         set_bit(RTL8152_LINK_CHG, &tp->flags);
1296                         schedule_delayed_work(&tp->schedule, 0);
1297                 }
1298         }
1299 
1300 resubmit:
1301         res = usb_submit_urb(urb, GFP_ATOMIC);
1302         if (res == -ENODEV) {
1303                 set_bit(RTL8152_UNPLUG, &tp->flags);
1304                 netif_device_detach(tp->netdev);
1305         } else if (res) {
1306                 netif_err(tp, intr, tp->netdev,
1307                           "can't resubmit intr, status %d\n", res);
1308         }
1309 }
1310 
1311 static inline void *rx_agg_align(void *data)
1312 {
1313         return (void *)ALIGN((uintptr_t)data, RX_ALIGN);
1314 }
1315 
1316 static inline void *tx_agg_align(void *data)
1317 {
1318         return (void *)ALIGN((uintptr_t)data, TX_ALIGN);
1319 }
1320 
1321 static void free_all_mem(struct r8152 *tp)
1322 {
1323         int i;
1324 
1325         for (i = 0; i < RTL8152_MAX_RX; i++) {
1326                 usb_free_urb(tp->rx_info[i].urb);
1327                 tp->rx_info[i].urb = NULL;
1328 
1329                 kfree(tp->rx_info[i].buffer);
1330                 tp->rx_info[i].buffer = NULL;
1331                 tp->rx_info[i].head = NULL;
1332         }
1333 
1334         for (i = 0; i < RTL8152_MAX_TX; i++) {
1335                 usb_free_urb(tp->tx_info[i].urb);
1336                 tp->tx_info[i].urb = NULL;
1337 
1338                 kfree(tp->tx_info[i].buffer);
1339                 tp->tx_info[i].buffer = NULL;
1340                 tp->tx_info[i].head = NULL;
1341         }
1342 
1343         usb_free_urb(tp->intr_urb);
1344         tp->intr_urb = NULL;
1345 
1346         kfree(tp->intr_buff);
1347         tp->intr_buff = NULL;
1348 }
1349 
1350 static int alloc_all_mem(struct r8152 *tp)
1351 {
1352         struct net_device *netdev = tp->netdev;
1353         struct usb_interface *intf = tp->intf;
1354         struct usb_host_interface *alt = intf->cur_altsetting;
1355         struct usb_host_endpoint *ep_intr = alt->endpoint + 2;
1356         struct urb *urb;
1357         int node, i;
1358         u8 *buf;
1359 
1360         node = netdev->dev.parent ? dev_to_node(netdev->dev.parent) : -1;
1361 
1362         spin_lock_init(&tp->rx_lock);
1363         spin_lock_init(&tp->tx_lock);
1364         INIT_LIST_HEAD(&tp->tx_free);
1365         skb_queue_head_init(&tp->tx_queue);
1366         skb_queue_head_init(&tp->rx_queue);
1367 
1368         for (i = 0; i < RTL8152_MAX_RX; i++) {
1369                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1370                 if (!buf)
1371                         goto err1;
1372 
1373                 if (buf != rx_agg_align(buf)) {
1374                         kfree(buf);
1375                         buf = kmalloc_node(agg_buf_sz + RX_ALIGN, GFP_KERNEL,
1376                                            node);
1377                         if (!buf)
1378                                 goto err1;
1379                 }
1380 
1381                 urb = usb_alloc_urb(0, GFP_KERNEL);
1382                 if (!urb) {
1383                         kfree(buf);
1384                         goto err1;
1385                 }
1386 
1387                 INIT_LIST_HEAD(&tp->rx_info[i].list);
1388                 tp->rx_info[i].context = tp;
1389                 tp->rx_info[i].urb = urb;
1390                 tp->rx_info[i].buffer = buf;
1391                 tp->rx_info[i].head = rx_agg_align(buf);
1392         }
1393 
1394         for (i = 0; i < RTL8152_MAX_TX; i++) {
1395                 buf = kmalloc_node(agg_buf_sz, GFP_KERNEL, node);
1396                 if (!buf)
1397                         goto err1;
1398 
1399                 if (buf != tx_agg_align(buf)) {
1400                         kfree(buf);
1401                         buf = kmalloc_node(agg_buf_sz + TX_ALIGN, GFP_KERNEL,
1402                                            node);
1403                         if (!buf)
1404                                 goto err1;
1405                 }
1406 
1407                 urb = usb_alloc_urb(0, GFP_KERNEL);
1408                 if (!urb) {
1409                         kfree(buf);
1410                         goto err1;
1411                 }
1412 
1413                 INIT_LIST_HEAD(&tp->tx_info[i].list);
1414                 tp->tx_info[i].context = tp;
1415                 tp->tx_info[i].urb = urb;
1416                 tp->tx_info[i].buffer = buf;
1417                 tp->tx_info[i].head = tx_agg_align(buf);
1418 
1419                 list_add_tail(&tp->tx_info[i].list, &tp->tx_free);
1420         }
1421 
1422         tp->intr_urb = usb_alloc_urb(0, GFP_KERNEL);
1423         if (!tp->intr_urb)
1424                 goto err1;
1425 
1426         tp->intr_buff = kmalloc(INTBUFSIZE, GFP_KERNEL);
1427         if (!tp->intr_buff)
1428                 goto err1;
1429 
1430         tp->intr_interval = (int)ep_intr->desc.bInterval;
1431         usb_fill_int_urb(tp->intr_urb, tp->udev, usb_rcvintpipe(tp->udev, 3),
1432                          tp->intr_buff, INTBUFSIZE, intr_callback,
1433                          tp, tp->intr_interval);
1434 
1435         return 0;
1436 
1437 err1:
1438         free_all_mem(tp);
1439         return -ENOMEM;
1440 }
1441 
1442 static struct tx_agg *r8152_get_tx_agg(struct r8152 *tp)
1443 {
1444         struct tx_agg *agg = NULL;
1445         unsigned long flags;
1446 
1447         if (list_empty(&tp->tx_free))
1448                 return NULL;
1449 
1450         spin_lock_irqsave(&tp->tx_lock, flags);
1451         if (!list_empty(&tp->tx_free)) {
1452                 struct list_head *cursor;
1453 
1454                 cursor = tp->tx_free.next;
1455                 list_del_init(cursor);
1456                 agg = list_entry(cursor, struct tx_agg, list);
1457         }
1458         spin_unlock_irqrestore(&tp->tx_lock, flags);
1459 
1460         return agg;
1461 }
1462 
1463 /* r8152_csum_workaround()
1464  * The hw limites the value the transport offset. When the offset is out of the
1465  * range, calculate the checksum by sw.
1466  */
1467 static void r8152_csum_workaround(struct r8152 *tp, struct sk_buff *skb,
1468                                   struct sk_buff_head *list)
1469 {
1470         if (skb_shinfo(skb)->gso_size) {
1471                 netdev_features_t features = tp->netdev->features;
1472                 struct sk_buff_head seg_list;
1473                 struct sk_buff *segs, *nskb;
1474 
1475                 features &= ~(NETIF_F_SG | NETIF_F_IPV6_CSUM | NETIF_F_TSO6);
1476                 segs = skb_gso_segment(skb, features);
1477                 if (IS_ERR(segs) || !segs)
1478                         goto drop;
1479 
1480                 __skb_queue_head_init(&seg_list);
1481 
1482                 do {
1483                         nskb = segs;
1484                         segs = segs->next;
1485                         nskb->next = NULL;
1486                         __skb_queue_tail(&seg_list, nskb);
1487                 } while (segs);
1488 
1489                 skb_queue_splice(&seg_list, list);
1490                 dev_kfree_skb(skb);
1491         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1492                 if (skb_checksum_help(skb) < 0)
1493                         goto drop;
1494 
1495                 __skb_queue_head(list, skb);
1496         } else {
1497                 struct net_device_stats *stats;
1498 
1499 drop:
1500                 stats = &tp->netdev->stats;
1501                 stats->tx_dropped++;
1502                 dev_kfree_skb(skb);
1503         }
1504 }
1505 
1506 /* msdn_giant_send_check()
1507  * According to the document of microsoft, the TCP Pseudo Header excludes the
1508  * packet length for IPv6 TCP large packets.
1509  */
1510 static int msdn_giant_send_check(struct sk_buff *skb)
1511 {
1512         const struct ipv6hdr *ipv6h;
1513         struct tcphdr *th;
1514         int ret;
1515 
1516         ret = skb_cow_head(skb, 0);
1517         if (ret)
1518                 return ret;
1519 
1520         ipv6h = ipv6_hdr(skb);
1521         th = tcp_hdr(skb);
1522 
1523         th->check = 0;
1524         th->check = ~tcp_v6_check(0, &ipv6h->saddr, &ipv6h->daddr, 0);
1525 
1526         return ret;
1527 }
1528 
1529 static inline void rtl_tx_vlan_tag(struct tx_desc *desc, struct sk_buff *skb)
1530 {
1531         if (skb_vlan_tag_present(skb)) {
1532                 u32 opts2;
1533 
1534                 opts2 = TX_VLAN_TAG | swab16(skb_vlan_tag_get(skb));
1535                 desc->opts2 |= cpu_to_le32(opts2);
1536         }
1537 }
1538 
1539 static inline void rtl_rx_vlan_tag(struct rx_desc *desc, struct sk_buff *skb)
1540 {
1541         u32 opts2 = le32_to_cpu(desc->opts2);
1542 
1543         if (opts2 & RX_VLAN_TAG)
1544                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q),
1545                                        swab16(opts2 & 0xffff));
1546 }
1547 
1548 static int r8152_tx_csum(struct r8152 *tp, struct tx_desc *desc,
1549                          struct sk_buff *skb, u32 len, u32 transport_offset)
1550 {
1551         u32 mss = skb_shinfo(skb)->gso_size;
1552         u32 opts1, opts2 = 0;
1553         int ret = TX_CSUM_SUCCESS;
1554 
1555         WARN_ON_ONCE(len > TX_LEN_MAX);
1556 
1557         opts1 = len | TX_FS | TX_LS;
1558 
1559         if (mss) {
1560                 if (transport_offset > GTTCPHO_MAX) {
1561                         netif_warn(tp, tx_err, tp->netdev,
1562                                    "Invalid transport offset 0x%x for TSO\n",
1563                                    transport_offset);
1564                         ret = TX_CSUM_TSO;
1565                         goto unavailable;
1566                 }
1567 
1568                 switch (vlan_get_protocol(skb)) {
1569                 case htons(ETH_P_IP):
1570                         opts1 |= GTSENDV4;
1571                         break;
1572 
1573                 case htons(ETH_P_IPV6):
1574                         if (msdn_giant_send_check(skb)) {
1575                                 ret = TX_CSUM_TSO;
1576                                 goto unavailable;
1577                         }
1578                         opts1 |= GTSENDV6;
1579                         break;
1580 
1581                 default:
1582                         WARN_ON_ONCE(1);
1583                         break;
1584                 }
1585 
1586                 opts1 |= transport_offset << GTTCPHO_SHIFT;
1587                 opts2 |= min(mss, MSS_MAX) << MSS_SHIFT;
1588         } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
1589                 u8 ip_protocol;
1590 
1591                 if (transport_offset > TCPHO_MAX) {
1592                         netif_warn(tp, tx_err, tp->netdev,
1593                                    "Invalid transport offset 0x%x\n",
1594                                    transport_offset);
1595                         ret = TX_CSUM_NONE;
1596                         goto unavailable;
1597                 }
1598 
1599                 switch (vlan_get_protocol(skb)) {
1600                 case htons(ETH_P_IP):
1601                         opts2 |= IPV4_CS;
1602                         ip_protocol = ip_hdr(skb)->protocol;
1603                         break;
1604 
1605                 case htons(ETH_P_IPV6):
1606                         opts2 |= IPV6_CS;
1607                         ip_protocol = ipv6_hdr(skb)->nexthdr;
1608                         break;
1609 
1610                 default:
1611                         ip_protocol = IPPROTO_RAW;
1612                         break;
1613                 }
1614 
1615                 if (ip_protocol == IPPROTO_TCP)
1616                         opts2 |= TCP_CS;
1617                 else if (ip_protocol == IPPROTO_UDP)
1618                         opts2 |= UDP_CS;
1619                 else
1620                         WARN_ON_ONCE(1);
1621 
1622                 opts2 |= transport_offset << TCPHO_SHIFT;
1623         }
1624 
1625         desc->opts2 = cpu_to_le32(opts2);
1626         desc->opts1 = cpu_to_le32(opts1);
1627 
1628 unavailable:
1629         return ret;
1630 }
1631 
1632 static int r8152_tx_agg_fill(struct r8152 *tp, struct tx_agg *agg)
1633 {
1634         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1635         int remain, ret;
1636         u8 *tx_data;
1637 
1638         __skb_queue_head_init(&skb_head);
1639         spin_lock(&tx_queue->lock);
1640         skb_queue_splice_init(tx_queue, &skb_head);
1641         spin_unlock(&tx_queue->lock);
1642 
1643         tx_data = agg->head;
1644         agg->skb_num = 0;
1645         agg->skb_len = 0;
1646         remain = agg_buf_sz;
1647 
1648         while (remain >= ETH_ZLEN + sizeof(struct tx_desc)) {
1649                 struct tx_desc *tx_desc;
1650                 struct sk_buff *skb;
1651                 unsigned int len;
1652                 u32 offset;
1653 
1654                 skb = __skb_dequeue(&skb_head);
1655                 if (!skb)
1656                         break;
1657 
1658                 len = skb->len + sizeof(*tx_desc);
1659 
1660                 if (len > remain) {
1661                         __skb_queue_head(&skb_head, skb);
1662                         break;
1663                 }
1664 
1665                 tx_data = tx_agg_align(tx_data);
1666                 tx_desc = (struct tx_desc *)tx_data;
1667 
1668                 offset = (u32)skb_transport_offset(skb);
1669 
1670                 if (r8152_tx_csum(tp, tx_desc, skb, skb->len, offset)) {
1671                         r8152_csum_workaround(tp, skb, &skb_head);
1672                         continue;
1673                 }
1674 
1675                 rtl_tx_vlan_tag(tx_desc, skb);
1676 
1677                 tx_data += sizeof(*tx_desc);
1678 
1679                 len = skb->len;
1680                 if (skb_copy_bits(skb, 0, tx_data, len) < 0) {
1681                         struct net_device_stats *stats = &tp->netdev->stats;
1682 
1683                         stats->tx_dropped++;
1684                         dev_kfree_skb_any(skb);
1685                         tx_data -= sizeof(*tx_desc);
1686                         continue;
1687                 }
1688 
1689                 tx_data += len;
1690                 agg->skb_len += len;
1691                 agg->skb_num++;
1692 
1693                 dev_kfree_skb_any(skb);
1694 
1695                 remain = agg_buf_sz - (int)(tx_agg_align(tx_data) - agg->head);
1696         }
1697 
1698         if (!skb_queue_empty(&skb_head)) {
1699                 spin_lock(&tx_queue->lock);
1700                 skb_queue_splice(&skb_head, tx_queue);
1701                 spin_unlock(&tx_queue->lock);
1702         }
1703 
1704         netif_tx_lock(tp->netdev);
1705 
1706         if (netif_queue_stopped(tp->netdev) &&
1707             skb_queue_len(&tp->tx_queue) < tp->tx_qlen)
1708                 netif_wake_queue(tp->netdev);
1709 
1710         netif_tx_unlock(tp->netdev);
1711 
1712         ret = usb_autopm_get_interface_async(tp->intf);
1713         if (ret < 0)
1714                 goto out_tx_fill;
1715 
1716         usb_fill_bulk_urb(agg->urb, tp->udev, usb_sndbulkpipe(tp->udev, 2),
1717                           agg->head, (int)(tx_data - (u8 *)agg->head),
1718                           (usb_complete_t)write_bulk_callback, agg);
1719 
1720         ret = usb_submit_urb(agg->urb, GFP_ATOMIC);
1721         if (ret < 0)
1722                 usb_autopm_put_interface_async(tp->intf);
1723 
1724 out_tx_fill:
1725         return ret;
1726 }
1727 
1728 static u8 r8152_rx_csum(struct r8152 *tp, struct rx_desc *rx_desc)
1729 {
1730         u8 checksum = CHECKSUM_NONE;
1731         u32 opts2, opts3;
1732 
1733         if (tp->version == RTL_VER_01 || tp->version == RTL_VER_02)
1734                 goto return_result;
1735 
1736         opts2 = le32_to_cpu(rx_desc->opts2);
1737         opts3 = le32_to_cpu(rx_desc->opts3);
1738 
1739         if (opts2 & RD_IPV4_CS) {
1740                 if (opts3 & IPF)
1741                         checksum = CHECKSUM_NONE;
1742                 else if ((opts2 & RD_UDP_CS) && (opts3 & UDPF))
1743                         checksum = CHECKSUM_NONE;
1744                 else if ((opts2 & RD_TCP_CS) && (opts3 & TCPF))
1745                         checksum = CHECKSUM_NONE;
1746                 else
1747                         checksum = CHECKSUM_UNNECESSARY;
1748         } else if (opts2 & RD_IPV6_CS) {
1749                 if ((opts2 & RD_UDP_CS) && !(opts3 & UDPF))
1750                         checksum = CHECKSUM_UNNECESSARY;
1751                 else if ((opts2 & RD_TCP_CS) && !(opts3 & TCPF))
1752                         checksum = CHECKSUM_UNNECESSARY;
1753         }
1754 
1755 return_result:
1756         return checksum;
1757 }
1758 
1759 static int rx_bottom(struct r8152 *tp, int budget)
1760 {
1761         unsigned long flags;
1762         struct list_head *cursor, *next, rx_queue;
1763         int ret = 0, work_done = 0;
1764 
1765         if (!skb_queue_empty(&tp->rx_queue)) {
1766                 while (work_done < budget) {
1767                         struct sk_buff *skb = __skb_dequeue(&tp->rx_queue);
1768                         struct net_device *netdev = tp->netdev;
1769                         struct net_device_stats *stats = &netdev->stats;
1770                         unsigned int pkt_len;
1771 
1772                         if (!skb)
1773                                 break;
1774 
1775                         pkt_len = skb->len;
1776                         napi_gro_receive(&tp->napi, skb);
1777                         work_done++;
1778                         stats->rx_packets++;
1779                         stats->rx_bytes += pkt_len;
1780                 }
1781         }
1782 
1783         if (list_empty(&tp->rx_done))
1784                 goto out1;
1785 
1786         INIT_LIST_HEAD(&rx_queue);
1787         spin_lock_irqsave(&tp->rx_lock, flags);
1788         list_splice_init(&tp->rx_done, &rx_queue);
1789         spin_unlock_irqrestore(&tp->rx_lock, flags);
1790 
1791         list_for_each_safe(cursor, next, &rx_queue) {
1792                 struct rx_desc *rx_desc;
1793                 struct rx_agg *agg;
1794                 int len_used = 0;
1795                 struct urb *urb;
1796                 u8 *rx_data;
1797 
1798                 list_del_init(cursor);
1799 
1800                 agg = list_entry(cursor, struct rx_agg, list);
1801                 urb = agg->urb;
1802                 if (urb->actual_length < ETH_ZLEN)
1803                         goto submit;
1804 
1805                 rx_desc = agg->head;
1806                 rx_data = agg->head;
1807                 len_used += sizeof(struct rx_desc);
1808 
1809                 while (urb->actual_length > len_used) {
1810                         struct net_device *netdev = tp->netdev;
1811                         struct net_device_stats *stats = &netdev->stats;
1812                         unsigned int pkt_len;
1813                         struct sk_buff *skb;
1814 
1815                         pkt_len = le32_to_cpu(rx_desc->opts1) & RX_LEN_MASK;
1816                         if (pkt_len < ETH_ZLEN)
1817                                 break;
1818 
1819                         len_used += pkt_len;
1820                         if (urb->actual_length < len_used)
1821                                 break;
1822 
1823                         pkt_len -= CRC_SIZE;
1824                         rx_data += sizeof(struct rx_desc);
1825 
1826                         skb = napi_alloc_skb(&tp->napi, pkt_len);
1827                         if (!skb) {
1828                                 stats->rx_dropped++;
1829                                 goto find_next_rx;
1830                         }
1831 
1832                         skb->ip_summed = r8152_rx_csum(tp, rx_desc);
1833                         memcpy(skb->data, rx_data, pkt_len);
1834                         skb_put(skb, pkt_len);
1835                         skb->protocol = eth_type_trans(skb, netdev);
1836                         rtl_rx_vlan_tag(rx_desc, skb);
1837                         if (work_done < budget) {
1838                                 napi_gro_receive(&tp->napi, skb);
1839                                 work_done++;
1840                                 stats->rx_packets++;
1841                                 stats->rx_bytes += pkt_len;
1842                         } else {
1843                                 __skb_queue_tail(&tp->rx_queue, skb);
1844                         }
1845 
1846 find_next_rx:
1847                         rx_data = rx_agg_align(rx_data + pkt_len + CRC_SIZE);
1848                         rx_desc = (struct rx_desc *)rx_data;
1849                         len_used = (int)(rx_data - (u8 *)agg->head);
1850                         len_used += sizeof(struct rx_desc);
1851                 }
1852 
1853 submit:
1854                 if (!ret) {
1855                         ret = r8152_submit_rx(tp, agg, GFP_ATOMIC);
1856                 } else {
1857                         urb->actual_length = 0;
1858                         list_add_tail(&agg->list, next);
1859                 }
1860         }
1861 
1862         if (!list_empty(&rx_queue)) {
1863                 spin_lock_irqsave(&tp->rx_lock, flags);
1864                 list_splice_tail(&rx_queue, &tp->rx_done);
1865                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1866         }
1867 
1868 out1:
1869         return work_done;
1870 }
1871 
1872 static void tx_bottom(struct r8152 *tp)
1873 {
1874         int res;
1875 
1876         do {
1877                 struct tx_agg *agg;
1878 
1879                 if (skb_queue_empty(&tp->tx_queue))
1880                         break;
1881 
1882                 agg = r8152_get_tx_agg(tp);
1883                 if (!agg)
1884                         break;
1885 
1886                 res = r8152_tx_agg_fill(tp, agg);
1887                 if (res) {
1888                         struct net_device *netdev = tp->netdev;
1889 
1890                         if (res == -ENODEV) {
1891                                 set_bit(RTL8152_UNPLUG, &tp->flags);
1892                                 netif_device_detach(netdev);
1893                         } else {
1894                                 struct net_device_stats *stats = &netdev->stats;
1895                                 unsigned long flags;
1896 
1897                                 netif_warn(tp, tx_err, netdev,
1898                                            "failed tx_urb %d\n", res);
1899                                 stats->tx_dropped += agg->skb_num;
1900 
1901                                 spin_lock_irqsave(&tp->tx_lock, flags);
1902                                 list_add_tail(&agg->list, &tp->tx_free);
1903                                 spin_unlock_irqrestore(&tp->tx_lock, flags);
1904                         }
1905                 }
1906         } while (res == 0);
1907 }
1908 
1909 static void bottom_half(struct r8152 *tp)
1910 {
1911         if (test_bit(RTL8152_UNPLUG, &tp->flags))
1912                 return;
1913 
1914         if (!test_bit(WORK_ENABLE, &tp->flags))
1915                 return;
1916 
1917         /* When link down, the driver would cancel all bulks. */
1918         /* This avoid the re-submitting bulk */
1919         if (!netif_carrier_ok(tp->netdev))
1920                 return;
1921 
1922         clear_bit(SCHEDULE_NAPI, &tp->flags);
1923 
1924         tx_bottom(tp);
1925 }
1926 
1927 static int r8152_poll(struct napi_struct *napi, int budget)
1928 {
1929         struct r8152 *tp = container_of(napi, struct r8152, napi);
1930         int work_done;
1931 
1932         work_done = rx_bottom(tp, budget);
1933         bottom_half(tp);
1934 
1935         if (work_done < budget) {
1936                 napi_complete(napi);
1937                 if (!list_empty(&tp->rx_done))
1938                         napi_schedule(napi);
1939         }
1940 
1941         return work_done;
1942 }
1943 
1944 static
1945 int r8152_submit_rx(struct r8152 *tp, struct rx_agg *agg, gfp_t mem_flags)
1946 {
1947         int ret;
1948 
1949         /* The rx would be stopped, so skip submitting */
1950         if (test_bit(RTL8152_UNPLUG, &tp->flags) ||
1951             !test_bit(WORK_ENABLE, &tp->flags) || !netif_carrier_ok(tp->netdev))
1952                 return 0;
1953 
1954         usb_fill_bulk_urb(agg->urb, tp->udev, usb_rcvbulkpipe(tp->udev, 1),
1955                           agg->head, agg_buf_sz,
1956                           (usb_complete_t)read_bulk_callback, agg);
1957 
1958         ret = usb_submit_urb(agg->urb, mem_flags);
1959         if (ret == -ENODEV) {
1960                 set_bit(RTL8152_UNPLUG, &tp->flags);
1961                 netif_device_detach(tp->netdev);
1962         } else if (ret) {
1963                 struct urb *urb = agg->urb;
1964                 unsigned long flags;
1965 
1966                 urb->actual_length = 0;
1967                 spin_lock_irqsave(&tp->rx_lock, flags);
1968                 list_add_tail(&agg->list, &tp->rx_done);
1969                 spin_unlock_irqrestore(&tp->rx_lock, flags);
1970 
1971                 netif_err(tp, rx_err, tp->netdev,
1972                           "Couldn't submit rx[%p], ret = %d\n", agg, ret);
1973 
1974                 napi_schedule(&tp->napi);
1975         }
1976 
1977         return ret;
1978 }
1979 
1980 static void rtl_drop_queued_tx(struct r8152 *tp)
1981 {
1982         struct net_device_stats *stats = &tp->netdev->stats;
1983         struct sk_buff_head skb_head, *tx_queue = &tp->tx_queue;
1984         struct sk_buff *skb;
1985 
1986         if (skb_queue_empty(tx_queue))
1987                 return;
1988 
1989         __skb_queue_head_init(&skb_head);
1990         spin_lock_bh(&tx_queue->lock);
1991         skb_queue_splice_init(tx_queue, &skb_head);
1992         spin_unlock_bh(&tx_queue->lock);
1993 
1994         while ((skb = __skb_dequeue(&skb_head))) {
1995                 dev_kfree_skb(skb);
1996                 stats->tx_dropped++;
1997         }
1998 }
1999 
2000 static void rtl8152_tx_timeout(struct net_device *netdev)
2001 {
2002         struct r8152 *tp = netdev_priv(netdev);
2003 
2004         netif_warn(tp, tx_err, netdev, "Tx timeout\n");
2005 
2006         usb_queue_reset_device(tp->intf);
2007 }
2008 
2009 static void rtl8152_set_rx_mode(struct net_device *netdev)
2010 {
2011         struct r8152 *tp = netdev_priv(netdev);
2012 
2013         if (netif_carrier_ok(netdev)) {
2014                 set_bit(RTL8152_SET_RX_MODE, &tp->flags);
2015                 schedule_delayed_work(&tp->schedule, 0);
2016         }
2017 }
2018 
2019 static void _rtl8152_set_rx_mode(struct net_device *netdev)
2020 {
2021         struct r8152 *tp = netdev_priv(netdev);
2022         u32 mc_filter[2];       /* Multicast hash filter */
2023         __le32 tmp[2];
2024         u32 ocp_data;
2025 
2026         netif_stop_queue(netdev);
2027         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2028         ocp_data &= ~RCR_ACPT_ALL;
2029         ocp_data |= RCR_AB | RCR_APM;
2030 
2031         if (netdev->flags & IFF_PROMISC) {
2032                 /* Unconditionally log net taps. */
2033                 netif_notice(tp, link, netdev, "Promiscuous mode enabled\n");
2034                 ocp_data |= RCR_AM | RCR_AAP;
2035                 mc_filter[1] = 0xffffffff;
2036                 mc_filter[0] = 0xffffffff;
2037         } else if ((netdev_mc_count(netdev) > multicast_filter_limit) ||
2038                    (netdev->flags & IFF_ALLMULTI)) {
2039                 /* Too many to filter perfectly -- accept all multicasts. */
2040                 ocp_data |= RCR_AM;
2041                 mc_filter[1] = 0xffffffff;
2042                 mc_filter[0] = 0xffffffff;
2043         } else {
2044                 struct netdev_hw_addr *ha;
2045 
2046                 mc_filter[1] = 0;
2047                 mc_filter[0] = 0;
2048                 netdev_for_each_mc_addr(ha, netdev) {
2049                         int bit_nr = ether_crc(ETH_ALEN, ha->addr) >> 26;
2050 
2051                         mc_filter[bit_nr >> 5] |= 1 << (bit_nr & 31);
2052                         ocp_data |= RCR_AM;
2053                 }
2054         }
2055 
2056         tmp[0] = __cpu_to_le32(swab32(mc_filter[1]));
2057         tmp[1] = __cpu_to_le32(swab32(mc_filter[0]));
2058 
2059         pla_ocp_write(tp, PLA_MAR, BYTE_EN_DWORD, sizeof(tmp), tmp);
2060         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2061         netif_wake_queue(netdev);
2062 }
2063 
2064 static netdev_features_t
2065 rtl8152_features_check(struct sk_buff *skb, struct net_device *dev,
2066                        netdev_features_t features)
2067 {
2068         u32 mss = skb_shinfo(skb)->gso_size;
2069         int max_offset = mss ? GTTCPHO_MAX : TCPHO_MAX;
2070         int offset = skb_transport_offset(skb);
2071 
2072         if ((mss || skb->ip_summed == CHECKSUM_PARTIAL) && offset > max_offset)
2073                 features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
2074         else if ((skb->len + sizeof(struct tx_desc)) > agg_buf_sz)
2075                 features &= ~NETIF_F_GSO_MASK;
2076 
2077         return features;
2078 }
2079 
2080 static netdev_tx_t rtl8152_start_xmit(struct sk_buff *skb,
2081                                       struct net_device *netdev)
2082 {
2083         struct r8152 *tp = netdev_priv(netdev);
2084 
2085         skb_tx_timestamp(skb);
2086 
2087         skb_queue_tail(&tp->tx_queue, skb);
2088 
2089         if (!list_empty(&tp->tx_free)) {
2090                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
2091                         set_bit(SCHEDULE_NAPI, &tp->flags);
2092                         schedule_delayed_work(&tp->schedule, 0);
2093                 } else {
2094                         usb_mark_last_busy(tp->udev);
2095                         napi_schedule(&tp->napi);
2096                 }
2097         } else if (skb_queue_len(&tp->tx_queue) > tp->tx_qlen) {
2098                 netif_stop_queue(netdev);
2099         }
2100 
2101         return NETDEV_TX_OK;
2102 }
2103 
2104 static void r8152b_reset_packet_filter(struct r8152 *tp)
2105 {
2106         u32     ocp_data;
2107 
2108         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_FMC);
2109         ocp_data &= ~FMC_FCR_MCU_EN;
2110         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2111         ocp_data |= FMC_FCR_MCU_EN;
2112         ocp_write_word(tp, MCU_TYPE_PLA, PLA_FMC, ocp_data);
2113 }
2114 
2115 static void rtl8152_nic_reset(struct r8152 *tp)
2116 {
2117         int     i;
2118 
2119         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, CR_RST);
2120 
2121         for (i = 0; i < 1000; i++) {
2122                 if (!(ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR) & CR_RST))
2123                         break;
2124                 usleep_range(100, 400);
2125         }
2126 }
2127 
2128 static void set_tx_qlen(struct r8152 *tp)
2129 {
2130         struct net_device *netdev = tp->netdev;
2131 
2132         tp->tx_qlen = agg_buf_sz / (netdev->mtu + VLAN_ETH_HLEN + VLAN_HLEN +
2133                                     sizeof(struct tx_desc));
2134 }
2135 
2136 static inline u8 rtl8152_get_speed(struct r8152 *tp)
2137 {
2138         return ocp_read_byte(tp, MCU_TYPE_PLA, PLA_PHYSTATUS);
2139 }
2140 
2141 static void rtl_set_eee_plus(struct r8152 *tp)
2142 {
2143         u32 ocp_data;
2144         u8 speed;
2145 
2146         speed = rtl8152_get_speed(tp);
2147         if (speed & _10bps) {
2148                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2149                 ocp_data |= EEEP_CR_EEEP_TX;
2150                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2151         } else {
2152                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR);
2153                 ocp_data &= ~EEEP_CR_EEEP_TX;
2154                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEEP_CR, ocp_data);
2155         }
2156 }
2157 
2158 static void rxdy_gated_en(struct r8152 *tp, bool enable)
2159 {
2160         u32 ocp_data;
2161 
2162         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_MISC_1);
2163         if (enable)
2164                 ocp_data |= RXDY_GATED_EN;
2165         else
2166                 ocp_data &= ~RXDY_GATED_EN;
2167         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MISC_1, ocp_data);
2168 }
2169 
2170 static int rtl_start_rx(struct r8152 *tp)
2171 {
2172         int i, ret = 0;
2173 
2174         INIT_LIST_HEAD(&tp->rx_done);
2175         for (i = 0; i < RTL8152_MAX_RX; i++) {
2176                 INIT_LIST_HEAD(&tp->rx_info[i].list);
2177                 ret = r8152_submit_rx(tp, &tp->rx_info[i], GFP_KERNEL);
2178                 if (ret)
2179                         break;
2180         }
2181 
2182         if (ret && ++i < RTL8152_MAX_RX) {
2183                 struct list_head rx_queue;
2184                 unsigned long flags;
2185 
2186                 INIT_LIST_HEAD(&rx_queue);
2187 
2188                 do {
2189                         struct rx_agg *agg = &tp->rx_info[i++];
2190                         struct urb *urb = agg->urb;
2191 
2192                         urb->actual_length = 0;
2193                         list_add_tail(&agg->list, &rx_queue);
2194                 } while (i < RTL8152_MAX_RX);
2195 
2196                 spin_lock_irqsave(&tp->rx_lock, flags);
2197                 list_splice_tail(&rx_queue, &tp->rx_done);
2198                 spin_unlock_irqrestore(&tp->rx_lock, flags);
2199         }
2200 
2201         return ret;
2202 }
2203 
2204 static int rtl_stop_rx(struct r8152 *tp)
2205 {
2206         int i;
2207 
2208         for (i = 0; i < RTL8152_MAX_RX; i++)
2209                 usb_kill_urb(tp->rx_info[i].urb);
2210 
2211         while (!skb_queue_empty(&tp->rx_queue))
2212                 dev_kfree_skb(__skb_dequeue(&tp->rx_queue));
2213 
2214         return 0;
2215 }
2216 
2217 static int rtl_enable(struct r8152 *tp)
2218 {
2219         u32 ocp_data;
2220 
2221         r8152b_reset_packet_filter(tp);
2222 
2223         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_CR);
2224         ocp_data |= CR_RE | CR_TE;
2225         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, ocp_data);
2226 
2227         rxdy_gated_en(tp, false);
2228 
2229         return 0;
2230 }
2231 
2232 static int rtl8152_enable(struct r8152 *tp)
2233 {
2234         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2235                 return -ENODEV;
2236 
2237         set_tx_qlen(tp);
2238         rtl_set_eee_plus(tp);
2239 
2240         return rtl_enable(tp);
2241 }
2242 
2243 static void r8153_set_rx_early_timeout(struct r8152 *tp)
2244 {
2245         u32 ocp_data = tp->coalesce / 8;
2246 
2247         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_TIMEOUT, ocp_data);
2248 }
2249 
2250 static void r8153_set_rx_early_size(struct r8152 *tp)
2251 {
2252         u32 mtu = tp->netdev->mtu;
2253         u32 ocp_data = (agg_buf_sz - mtu - VLAN_ETH_HLEN - VLAN_HLEN) / 8;
2254 
2255         ocp_write_word(tp, MCU_TYPE_USB, USB_RX_EARLY_SIZE, ocp_data);
2256 }
2257 
2258 static int rtl8153_enable(struct r8152 *tp)
2259 {
2260         if (test_bit(RTL8152_UNPLUG, &tp->flags))
2261                 return -ENODEV;
2262 
2263         usb_disable_lpm(tp->udev);
2264         set_tx_qlen(tp);
2265         rtl_set_eee_plus(tp);
2266         r8153_set_rx_early_timeout(tp);
2267         r8153_set_rx_early_size(tp);
2268 
2269         return rtl_enable(tp);
2270 }
2271 
2272 static void rtl_disable(struct r8152 *tp)
2273 {
2274         u32 ocp_data;
2275         int i;
2276 
2277         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
2278                 rtl_drop_queued_tx(tp);
2279                 return;
2280         }
2281 
2282         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2283         ocp_data &= ~RCR_ACPT_ALL;
2284         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2285 
2286         rtl_drop_queued_tx(tp);
2287 
2288         for (i = 0; i < RTL8152_MAX_TX; i++)
2289                 usb_kill_urb(tp->tx_info[i].urb);
2290 
2291         rxdy_gated_en(tp, true);
2292 
2293         for (i = 0; i < 1000; i++) {
2294                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2295                 if ((ocp_data & FIFO_EMPTY) == FIFO_EMPTY)
2296                         break;
2297                 usleep_range(1000, 2000);
2298         }
2299 
2300         for (i = 0; i < 1000; i++) {
2301                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0) & TCR0_TX_EMPTY)
2302                         break;
2303                 usleep_range(1000, 2000);
2304         }
2305 
2306         rtl_stop_rx(tp);
2307 
2308         rtl8152_nic_reset(tp);
2309 }
2310 
2311 static void r8152_power_cut_en(struct r8152 *tp, bool enable)
2312 {
2313         u32 ocp_data;
2314 
2315         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_UPS_CTRL);
2316         if (enable)
2317                 ocp_data |= POWER_CUT;
2318         else
2319                 ocp_data &= ~POWER_CUT;
2320         ocp_write_word(tp, MCU_TYPE_USB, USB_UPS_CTRL, ocp_data);
2321 
2322         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS);
2323         ocp_data &= ~RESUME_INDICATE;
2324         ocp_write_word(tp, MCU_TYPE_USB, USB_PM_CTRL_STATUS, ocp_data);
2325 }
2326 
2327 static void rtl_rx_vlan_en(struct r8152 *tp, bool enable)
2328 {
2329         u32 ocp_data;
2330 
2331         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CPCR);
2332         if (enable)
2333                 ocp_data |= CPCR_RX_VLAN;
2334         else
2335                 ocp_data &= ~CPCR_RX_VLAN;
2336         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CPCR, ocp_data);
2337 }
2338 
2339 static int rtl8152_set_features(struct net_device *dev,
2340                                 netdev_features_t features)
2341 {
2342         netdev_features_t changed = features ^ dev->features;
2343         struct r8152 *tp = netdev_priv(dev);
2344         int ret;
2345 
2346         ret = usb_autopm_get_interface(tp->intf);
2347         if (ret < 0)
2348                 goto out;
2349 
2350         mutex_lock(&tp->control);
2351 
2352         if (changed & NETIF_F_HW_VLAN_CTAG_RX) {
2353                 if (features & NETIF_F_HW_VLAN_CTAG_RX)
2354                         rtl_rx_vlan_en(tp, true);
2355                 else
2356                         rtl_rx_vlan_en(tp, false);
2357         }
2358 
2359         mutex_unlock(&tp->control);
2360 
2361         usb_autopm_put_interface(tp->intf);
2362 
2363 out:
2364         return ret;
2365 }
2366 
2367 #define WAKE_ANY (WAKE_PHY | WAKE_MAGIC | WAKE_UCAST | WAKE_BCAST | WAKE_MCAST)
2368 
2369 static u32 __rtl_get_wol(struct r8152 *tp)
2370 {
2371         u32 ocp_data;
2372         u32 wolopts = 0;
2373 
2374         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2375         if (ocp_data & LINK_ON_WAKE_EN)
2376                 wolopts |= WAKE_PHY;
2377 
2378         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2379         if (ocp_data & UWF_EN)
2380                 wolopts |= WAKE_UCAST;
2381         if (ocp_data & BWF_EN)
2382                 wolopts |= WAKE_BCAST;
2383         if (ocp_data & MWF_EN)
2384                 wolopts |= WAKE_MCAST;
2385 
2386         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2387         if (ocp_data & MAGIC_EN)
2388                 wolopts |= WAKE_MAGIC;
2389 
2390         return wolopts;
2391 }
2392 
2393 static void __rtl_set_wol(struct r8152 *tp, u32 wolopts)
2394 {
2395         u32 ocp_data;
2396 
2397         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2398 
2399         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2400         ocp_data &= ~LINK_ON_WAKE_EN;
2401         if (wolopts & WAKE_PHY)
2402                 ocp_data |= LINK_ON_WAKE_EN;
2403         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2404 
2405         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG5);
2406         ocp_data &= ~(UWF_EN | BWF_EN | MWF_EN);
2407         if (wolopts & WAKE_UCAST)
2408                 ocp_data |= UWF_EN;
2409         if (wolopts & WAKE_BCAST)
2410                 ocp_data |= BWF_EN;
2411         if (wolopts & WAKE_MCAST)
2412                 ocp_data |= MWF_EN;
2413         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG5, ocp_data);
2414 
2415         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2416 
2417         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL);
2418         ocp_data &= ~MAGIC_EN;
2419         if (wolopts & WAKE_MAGIC)
2420                 ocp_data |= MAGIC_EN;
2421         ocp_write_word(tp, MCU_TYPE_PLA, PLA_CFG_WOL, ocp_data);
2422 
2423         if (wolopts & WAKE_ANY)
2424                 device_set_wakeup_enable(&tp->udev->dev, true);
2425         else
2426                 device_set_wakeup_enable(&tp->udev->dev, false);
2427 }
2428 
2429 static void r8153_u1u2en(struct r8152 *tp, bool enable)
2430 {
2431         u8 u1u2[8];
2432 
2433         if (enable)
2434                 memset(u1u2, 0xff, sizeof(u1u2));
2435         else
2436                 memset(u1u2, 0x00, sizeof(u1u2));
2437 
2438         usb_ocp_write(tp, USB_TOLERANCE, BYTE_EN_SIX_BYTES, sizeof(u1u2), u1u2);
2439 }
2440 
2441 static void r8153_u2p3en(struct r8152 *tp, bool enable)
2442 {
2443         u32 ocp_data;
2444 
2445         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL);
2446         if (enable && tp->version != RTL_VER_03 && tp->version != RTL_VER_04)
2447                 ocp_data |= U2P3_ENABLE;
2448         else
2449                 ocp_data &= ~U2P3_ENABLE;
2450         ocp_write_word(tp, MCU_TYPE_USB, USB_U2P3_CTRL, ocp_data);
2451 }
2452 
2453 static void r8153_power_cut_en(struct r8152 *tp, bool enable)
2454 {
2455         u32 ocp_data;
2456 
2457         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_POWER_CUT);
2458         if (enable)
2459                 ocp_data |= PWR_EN | PHASE2_EN;
2460         else
2461                 ocp_data &= ~(PWR_EN | PHASE2_EN);
2462         ocp_write_word(tp, MCU_TYPE_USB, USB_POWER_CUT, ocp_data);
2463 
2464         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_MISC_0);
2465         ocp_data &= ~PCUT_STATUS;
2466         ocp_write_word(tp, MCU_TYPE_USB, USB_MISC_0, ocp_data);
2467 }
2468 
2469 static bool rtl_can_wakeup(struct r8152 *tp)
2470 {
2471         struct usb_device *udev = tp->udev;
2472 
2473         return (udev->actconfig->desc.bmAttributes & USB_CONFIG_ATT_WAKEUP);
2474 }
2475 
2476 static void rtl_runtime_suspend_enable(struct r8152 *tp, bool enable)
2477 {
2478         if (enable) {
2479                 u32 ocp_data;
2480 
2481                 __rtl_set_wol(tp, WAKE_ANY);
2482 
2483                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2484 
2485                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2486                 ocp_data |= LINK_OFF_WAKE_EN;
2487                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2488 
2489                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2490         } else {
2491                 u32 ocp_data;
2492 
2493                 __rtl_set_wol(tp, tp->saved_wolopts);
2494 
2495                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_CONFIG);
2496 
2497                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_CONFIG34);
2498                 ocp_data &= ~LINK_OFF_WAKE_EN;
2499                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_CONFIG34, ocp_data);
2500 
2501                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2502         }
2503 }
2504 
2505 static void rtl8153_runtime_enable(struct r8152 *tp, bool enable)
2506 {
2507         rtl_runtime_suspend_enable(tp, enable);
2508 
2509         if (enable) {
2510                 r8153_u1u2en(tp, false);
2511                 r8153_u2p3en(tp, false);
2512         } else {
2513                 r8153_u2p3en(tp, true);
2514                 r8153_u1u2en(tp, true);
2515         }
2516 }
2517 
2518 static void r8153_teredo_off(struct r8152 *tp)
2519 {
2520         u32 ocp_data;
2521 
2522         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2523         ocp_data &= ~(TEREDO_SEL | TEREDO_RS_EVENT_MASK | OOB_TEREDO_EN);
2524         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2525 
2526         ocp_write_word(tp, MCU_TYPE_PLA, PLA_WDT6_CTRL, WDT6_SET_MODE);
2527         ocp_write_word(tp, MCU_TYPE_PLA, PLA_REALWOW_TIMER, 0);
2528         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TEREDO_TIMER, 0);
2529 }
2530 
2531 static void rtl_reset_bmu(struct r8152 *tp)
2532 {
2533         u32 ocp_data;
2534 
2535         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_BMU_RESET);
2536         ocp_data &= ~(BMU_RESET_EP_IN | BMU_RESET_EP_OUT);
2537         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2538         ocp_data |= BMU_RESET_EP_IN | BMU_RESET_EP_OUT;
2539         ocp_write_byte(tp, MCU_TYPE_USB, USB_BMU_RESET, ocp_data);
2540 }
2541 
2542 static void r8152_aldps_en(struct r8152 *tp, bool enable)
2543 {
2544         if (enable) {
2545                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPWRSAVE | ENPDNPS |
2546                                                     LINKENA | DIS_SDSAVE);
2547         } else {
2548                 ocp_reg_write(tp, OCP_ALDPS_CONFIG, ENPDNPS | LINKENA |
2549                                                     DIS_SDSAVE);
2550                 msleep(20);
2551         }
2552 }
2553 
2554 static inline void r8152_mmd_indirect(struct r8152 *tp, u16 dev, u16 reg)
2555 {
2556         ocp_reg_write(tp, OCP_EEE_AR, FUN_ADDR | dev);
2557         ocp_reg_write(tp, OCP_EEE_DATA, reg);
2558         ocp_reg_write(tp, OCP_EEE_AR, FUN_DATA | dev);
2559 }
2560 
2561 static u16 r8152_mmd_read(struct r8152 *tp, u16 dev, u16 reg)
2562 {
2563         u16 data;
2564 
2565         r8152_mmd_indirect(tp, dev, reg);
2566         data = ocp_reg_read(tp, OCP_EEE_DATA);
2567         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2568 
2569         return data;
2570 }
2571 
2572 static void r8152_mmd_write(struct r8152 *tp, u16 dev, u16 reg, u16 data)
2573 {
2574         r8152_mmd_indirect(tp, dev, reg);
2575         ocp_reg_write(tp, OCP_EEE_DATA, data);
2576         ocp_reg_write(tp, OCP_EEE_AR, 0x0000);
2577 }
2578 
2579 static void r8152_eee_en(struct r8152 *tp, bool enable)
2580 {
2581         u16 config1, config2, config3;
2582         u32 ocp_data;
2583 
2584         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2585         config1 = ocp_reg_read(tp, OCP_EEE_CONFIG1) & ~sd_rise_time_mask;
2586         config2 = ocp_reg_read(tp, OCP_EEE_CONFIG2);
2587         config3 = ocp_reg_read(tp, OCP_EEE_CONFIG3) & ~fast_snr_mask;
2588 
2589         if (enable) {
2590                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2591                 config1 |= EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN | RX_QUIET_EN;
2592                 config1 |= sd_rise_time(1);
2593                 config2 |= RG_DACQUIET_EN | RG_LDVQUIET_EN;
2594                 config3 |= fast_snr(42);
2595         } else {
2596                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2597                 config1 &= ~(EEE_10_CAP | EEE_NWAY_EN | TX_QUIET_EN |
2598                              RX_QUIET_EN);
2599                 config1 |= sd_rise_time(7);
2600                 config2 &= ~(RG_DACQUIET_EN | RG_LDVQUIET_EN);
2601                 config3 |= fast_snr(511);
2602         }
2603 
2604         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2605         ocp_reg_write(tp, OCP_EEE_CONFIG1, config1);
2606         ocp_reg_write(tp, OCP_EEE_CONFIG2, config2);
2607         ocp_reg_write(tp, OCP_EEE_CONFIG3, config3);
2608 }
2609 
2610 static void r8152b_enable_eee(struct r8152 *tp)
2611 {
2612         r8152_eee_en(tp, true);
2613         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, MDIO_EEE_100TX);
2614 }
2615 
2616 static void r8152b_enable_fc(struct r8152 *tp)
2617 {
2618         u16 anar;
2619 
2620         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2621         anar |= ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
2622         r8152_mdio_write(tp, MII_ADVERTISE, anar);
2623 }
2624 
2625 static void rtl8152_disable(struct r8152 *tp)
2626 {
2627         r8152_aldps_en(tp, false);
2628         rtl_disable(tp);
2629         r8152_aldps_en(tp, true);
2630 }
2631 
2632 static void r8152b_hw_phy_cfg(struct r8152 *tp)
2633 {
2634         r8152b_enable_eee(tp);
2635         r8152_aldps_en(tp, true);
2636         r8152b_enable_fc(tp);
2637 
2638         set_bit(PHY_RESET, &tp->flags);
2639 }
2640 
2641 static void r8152b_exit_oob(struct r8152 *tp)
2642 {
2643         u32 ocp_data;
2644         int i;
2645 
2646         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2647         ocp_data &= ~RCR_ACPT_ALL;
2648         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2649 
2650         rxdy_gated_en(tp, true);
2651         r8153_teredo_off(tp);
2652         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CRWECR, CRWECR_NORAML);
2653         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_CR, 0x00);
2654 
2655         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2656         ocp_data &= ~NOW_IS_OOB;
2657         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2658 
2659         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2660         ocp_data &= ~MCU_BORW_EN;
2661         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2662 
2663         for (i = 0; i < 1000; i++) {
2664                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2665                 if (ocp_data & LINK_LIST_READY)
2666                         break;
2667                 usleep_range(1000, 2000);
2668         }
2669 
2670         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2671         ocp_data |= RE_INIT_LL;
2672         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2673 
2674         for (i = 0; i < 1000; i++) {
2675                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2676                 if (ocp_data & LINK_LIST_READY)
2677                         break;
2678                 usleep_range(1000, 2000);
2679         }
2680 
2681         rtl8152_nic_reset(tp);
2682 
2683         /* rx share fifo credit full threshold */
2684         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2685 
2686         if (tp->udev->speed == USB_SPEED_FULL ||
2687             tp->udev->speed == USB_SPEED_LOW) {
2688                 /* rx share fifo credit near full threshold */
2689                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2690                                 RXFIFO_THR2_FULL);
2691                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2692                                 RXFIFO_THR3_FULL);
2693         } else {
2694                 /* rx share fifo credit near full threshold */
2695                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1,
2696                                 RXFIFO_THR2_HIGH);
2697                 ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2,
2698                                 RXFIFO_THR3_HIGH);
2699         }
2700 
2701         /* TX share fifo free credit full threshold */
2702         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL);
2703 
2704         ocp_write_byte(tp, MCU_TYPE_USB, USB_TX_AGG, TX_AGG_MAX_THRESHOLD);
2705         ocp_write_dword(tp, MCU_TYPE_USB, USB_RX_BUF_TH, RX_THR_HIGH);
2706         ocp_write_dword(tp, MCU_TYPE_USB, USB_TX_DMA,
2707                         TEST_MODE_DISABLE | TX_SIZE_ADJUST1);
2708 
2709         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2710 
2711         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2712 
2713         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2714         ocp_data |= TCR0_AUTO_FIFO;
2715         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2716 }
2717 
2718 static void r8152b_enter_oob(struct r8152 *tp)
2719 {
2720         u32 ocp_data;
2721         int i;
2722 
2723         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2724         ocp_data &= ~NOW_IS_OOB;
2725         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2726 
2727         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_OOB);
2728         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_OOB);
2729         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_OOB);
2730 
2731         rtl_disable(tp);
2732 
2733         for (i = 0; i < 1000; i++) {
2734                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2735                 if (ocp_data & LINK_LIST_READY)
2736                         break;
2737                 usleep_range(1000, 2000);
2738         }
2739 
2740         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2741         ocp_data |= RE_INIT_LL;
2742         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2743 
2744         for (i = 0; i < 1000; i++) {
2745                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2746                 if (ocp_data & LINK_LIST_READY)
2747                         break;
2748                 usleep_range(1000, 2000);
2749         }
2750 
2751         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8152_RMS);
2752 
2753         rtl_rx_vlan_en(tp, true);
2754 
2755         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2756         ocp_data |= ALDPS_PROXY_MODE;
2757         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2758 
2759         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2760         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2761         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2762 
2763         rxdy_gated_en(tp, false);
2764 
2765         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2766         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2767         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2768 }
2769 
2770 static void r8153_aldps_en(struct r8152 *tp, bool enable)
2771 {
2772         u16 data;
2773 
2774         data = ocp_reg_read(tp, OCP_POWER_CFG);
2775         if (enable) {
2776                 data |= EN_ALDPS;
2777                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2778         } else {
2779                 data &= ~EN_ALDPS;
2780                 ocp_reg_write(tp, OCP_POWER_CFG, data);
2781                 msleep(20);
2782         }
2783 }
2784 
2785 static void r8153_eee_en(struct r8152 *tp, bool enable)
2786 {
2787         u32 ocp_data;
2788         u16 config;
2789 
2790         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
2791         config = ocp_reg_read(tp, OCP_EEE_CFG);
2792 
2793         if (enable) {
2794                 ocp_data |= EEE_RX_EN | EEE_TX_EN;
2795                 config |= EEE10_EN;
2796         } else {
2797                 ocp_data &= ~(EEE_RX_EN | EEE_TX_EN);
2798                 config &= ~EEE10_EN;
2799         }
2800 
2801         ocp_write_word(tp, MCU_TYPE_PLA, PLA_EEE_CR, ocp_data);
2802         ocp_reg_write(tp, OCP_EEE_CFG, config);
2803 }
2804 
2805 static void r8153_hw_phy_cfg(struct r8152 *tp)
2806 {
2807         u32 ocp_data;
2808         u16 data;
2809 
2810         /* disable ALDPS before updating the PHY parameters */
2811         r8153_aldps_en(tp, false);
2812 
2813         /* disable EEE before updating the PHY parameters */
2814         r8153_eee_en(tp, false);
2815         ocp_reg_write(tp, OCP_EEE_ADV, 0);
2816 
2817         if (tp->version == RTL_VER_03) {
2818                 data = ocp_reg_read(tp, OCP_EEE_CFG);
2819                 data &= ~CTAP_SHORT_EN;
2820                 ocp_reg_write(tp, OCP_EEE_CFG, data);
2821         }
2822 
2823         data = ocp_reg_read(tp, OCP_POWER_CFG);
2824         data |= EEE_CLKDIV_EN;
2825         ocp_reg_write(tp, OCP_POWER_CFG, data);
2826 
2827         data = ocp_reg_read(tp, OCP_DOWN_SPEED);
2828         data |= EN_10M_BGOFF;
2829         ocp_reg_write(tp, OCP_DOWN_SPEED, data);
2830         data = ocp_reg_read(tp, OCP_POWER_CFG);
2831         data |= EN_10M_PLLOFF;
2832         ocp_reg_write(tp, OCP_POWER_CFG, data);
2833         sram_write(tp, SRAM_IMPEDANCE, 0x0b13);
2834 
2835         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
2836         ocp_data |= PFM_PWM_SWITCH;
2837         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
2838 
2839         /* Enable LPF corner auto tune */
2840         sram_write(tp, SRAM_LPF_CFG, 0xf70f);
2841 
2842         /* Adjust 10M Amplitude */
2843         sram_write(tp, SRAM_10M_AMP1, 0x00af);
2844         sram_write(tp, SRAM_10M_AMP2, 0x0208);
2845 
2846         r8153_eee_en(tp, true);
2847         ocp_reg_write(tp, OCP_EEE_ADV, MDIO_EEE_1000T | MDIO_EEE_100TX);
2848 
2849         r8153_aldps_en(tp, true);
2850         r8152b_enable_fc(tp);
2851 
2852         set_bit(PHY_RESET, &tp->flags);
2853 }
2854 
2855 static void r8153_first_init(struct r8152 *tp)
2856 {
2857         u32 ocp_data;
2858         int i;
2859 
2860         rxdy_gated_en(tp, true);
2861         r8153_teredo_off(tp);
2862 
2863         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2864         ocp_data &= ~RCR_ACPT_ALL;
2865         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2866 
2867         rtl8152_nic_reset(tp);
2868         rtl_reset_bmu(tp);
2869 
2870         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2871         ocp_data &= ~NOW_IS_OOB;
2872         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2873 
2874         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2875         ocp_data &= ~MCU_BORW_EN;
2876         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2877 
2878         for (i = 0; i < 1000; i++) {
2879                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2880                 if (ocp_data & LINK_LIST_READY)
2881                         break;
2882                 usleep_range(1000, 2000);
2883         }
2884 
2885         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2886         ocp_data |= RE_INIT_LL;
2887         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2888 
2889         for (i = 0; i < 1000; i++) {
2890                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2891                 if (ocp_data & LINK_LIST_READY)
2892                         break;
2893                 usleep_range(1000, 2000);
2894         }
2895 
2896         rtl_rx_vlan_en(tp, tp->netdev->features & NETIF_F_HW_VLAN_CTAG_RX);
2897 
2898         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2899         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_MTPS, MTPS_JUMBO);
2900 
2901         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR0);
2902         ocp_data |= TCR0_AUTO_FIFO;
2903         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TCR0, ocp_data);
2904 
2905         rtl8152_nic_reset(tp);
2906 
2907         /* rx share fifo credit full threshold */
2908         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL0, RXFIFO_THR1_NORMAL);
2909         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL1, RXFIFO_THR2_NORMAL);
2910         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RXFIFO_CTRL2, RXFIFO_THR3_NORMAL);
2911         /* TX share fifo free credit full threshold */
2912         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_TXFIFO_CTRL, TXFIFO_THR_NORMAL2);
2913 
2914         /* rx aggregation */
2915         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
2916         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
2917         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
2918 }
2919 
2920 static void r8153_enter_oob(struct r8152 *tp)
2921 {
2922         u32 ocp_data;
2923         int i;
2924 
2925         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2926         ocp_data &= ~NOW_IS_OOB;
2927         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2928 
2929         rtl_disable(tp);
2930         rtl_reset_bmu(tp);
2931 
2932         for (i = 0; i < 1000; i++) {
2933                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2934                 if (ocp_data & LINK_LIST_READY)
2935                         break;
2936                 usleep_range(1000, 2000);
2937         }
2938 
2939         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7);
2940         ocp_data |= RE_INIT_LL;
2941         ocp_write_word(tp, MCU_TYPE_PLA, PLA_SFF_STS_7, ocp_data);
2942 
2943         for (i = 0; i < 1000; i++) {
2944                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2945                 if (ocp_data & LINK_LIST_READY)
2946                         break;
2947                 usleep_range(1000, 2000);
2948         }
2949 
2950         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RMS, RTL8153_RMS);
2951 
2952         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG);
2953         ocp_data &= ~TEREDO_WAKE_MASK;
2954         ocp_write_word(tp, MCU_TYPE_PLA, PLA_TEREDO_CFG, ocp_data);
2955 
2956         rtl_rx_vlan_en(tp, true);
2957 
2958         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PAL_BDC_CR);
2959         ocp_data |= ALDPS_PROXY_MODE;
2960         ocp_write_word(tp, MCU_TYPE_PLA, PAL_BDC_CR, ocp_data);
2961 
2962         ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL);
2963         ocp_data |= NOW_IS_OOB | DIS_MCU_CLROOB;
2964         ocp_write_byte(tp, MCU_TYPE_PLA, PLA_OOB_CTRL, ocp_data);
2965 
2966         rxdy_gated_en(tp, false);
2967 
2968         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_RCR);
2969         ocp_data |= RCR_APM | RCR_AM | RCR_AB;
2970         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_RCR, ocp_data);
2971 }
2972 
2973 static void rtl8153_disable(struct r8152 *tp)
2974 {
2975         r8153_aldps_en(tp, false);
2976         rtl_disable(tp);
2977         rtl_reset_bmu(tp);
2978         r8153_aldps_en(tp, true);
2979         usb_enable_lpm(tp->udev);
2980 }
2981 
2982 static int rtl8152_set_speed(struct r8152 *tp, u8 autoneg, u16 speed, u8 duplex)
2983 {
2984         u16 bmcr, anar, gbcr;
2985         int ret = 0;
2986 
2987         anar = r8152_mdio_read(tp, MII_ADVERTISE);
2988         anar &= ~(ADVERTISE_10HALF | ADVERTISE_10FULL |
2989                   ADVERTISE_100HALF | ADVERTISE_100FULL);
2990         if (tp->mii.supports_gmii) {
2991                 gbcr = r8152_mdio_read(tp, MII_CTRL1000);
2992                 gbcr &= ~(ADVERTISE_1000FULL | ADVERTISE_1000HALF);
2993         } else {
2994                 gbcr = 0;
2995         }
2996 
2997         if (autoneg == AUTONEG_DISABLE) {
2998                 if (speed == SPEED_10) {
2999                         bmcr = 0;
3000                         anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3001                 } else if (speed == SPEED_100) {
3002                         bmcr = BMCR_SPEED100;
3003                         anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3004                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3005                         bmcr = BMCR_SPEED1000;
3006                         gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3007                 } else {
3008                         ret = -EINVAL;
3009                         goto out;
3010                 }
3011 
3012                 if (duplex == DUPLEX_FULL)
3013                         bmcr |= BMCR_FULLDPLX;
3014         } else {
3015                 if (speed == SPEED_10) {
3016                         if (duplex == DUPLEX_FULL)
3017                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3018                         else
3019                                 anar |= ADVERTISE_10HALF;
3020                 } else if (speed == SPEED_100) {
3021                         if (duplex == DUPLEX_FULL) {
3022                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3023                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3024                         } else {
3025                                 anar |= ADVERTISE_10HALF;
3026                                 anar |= ADVERTISE_100HALF;
3027                         }
3028                 } else if (speed == SPEED_1000 && tp->mii.supports_gmii) {
3029                         if (duplex == DUPLEX_FULL) {
3030                                 anar |= ADVERTISE_10HALF | ADVERTISE_10FULL;
3031                                 anar |= ADVERTISE_100HALF | ADVERTISE_100FULL;
3032                                 gbcr |= ADVERTISE_1000FULL | ADVERTISE_1000HALF;
3033                         } else {
3034                                 anar |= ADVERTISE_10HALF;
3035                                 anar |= ADVERTISE_100HALF;
3036                                 gbcr |= ADVERTISE_1000HALF;
3037                         }
3038                 } else {
3039                         ret = -EINVAL;
3040                         goto out;
3041                 }
3042 
3043                 bmcr = BMCR_ANENABLE | BMCR_ANRESTART;
3044         }
3045 
3046         if (test_and_clear_bit(PHY_RESET, &tp->flags))
3047                 bmcr |= BMCR_RESET;
3048 
3049         if (tp->mii.supports_gmii)
3050                 r8152_mdio_write(tp, MII_CTRL1000, gbcr);
3051 
3052         r8152_mdio_write(tp, MII_ADVERTISE, anar);
3053         r8152_mdio_write(tp, MII_BMCR, bmcr);
3054 
3055         if (bmcr & BMCR_RESET) {
3056                 int i;
3057 
3058                 for (i = 0; i < 50; i++) {
3059                         msleep(20);
3060                         if ((r8152_mdio_read(tp, MII_BMCR) & BMCR_RESET) == 0)
3061                                 break;
3062                 }
3063         }
3064 
3065 out:
3066         return ret;
3067 }
3068 
3069 static void rtl8152_up(struct r8152 *tp)
3070 {
3071         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3072                 return;
3073 
3074         r8152_aldps_en(tp, false);
3075         r8152b_exit_oob(tp);
3076         r8152_aldps_en(tp, true);
3077 }
3078 
3079 static void rtl8152_down(struct r8152 *tp)
3080 {
3081         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3082                 rtl_drop_queued_tx(tp);
3083                 return;
3084         }
3085 
3086         r8152_power_cut_en(tp, false);
3087         r8152_aldps_en(tp, false);
3088         r8152b_enter_oob(tp);
3089         r8152_aldps_en(tp, true);
3090 }
3091 
3092 static void rtl8153_up(struct r8152 *tp)
3093 {
3094         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3095                 return;
3096 
3097         r8153_u1u2en(tp, false);
3098         r8153_aldps_en(tp, false);
3099         r8153_first_init(tp);
3100         r8153_aldps_en(tp, true);
3101         r8153_u2p3en(tp, true);
3102         r8153_u1u2en(tp, true);
3103         usb_enable_lpm(tp->udev);
3104 }
3105 
3106 static void rtl8153_down(struct r8152 *tp)
3107 {
3108         if (test_bit(RTL8152_UNPLUG, &tp->flags)) {
3109                 rtl_drop_queued_tx(tp);
3110                 return;
3111         }
3112 
3113         r8153_u1u2en(tp, false);
3114         r8153_u2p3en(tp, false);
3115         r8153_power_cut_en(tp, false);
3116         r8153_aldps_en(tp, false);
3117         r8153_enter_oob(tp);
3118         r8153_aldps_en(tp, true);
3119 }
3120 
3121 static bool rtl8152_in_nway(struct r8152 *tp)
3122 {
3123         u16 nway_state;
3124 
3125         ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, 0x2000);
3126         tp->ocp_base = 0x2000;
3127         ocp_write_byte(tp, MCU_TYPE_PLA, 0xb014, 0x4c);         /* phy state */
3128         nway_state = ocp_read_word(tp, MCU_TYPE_PLA, 0xb01a);
3129 
3130         /* bit 15: TXDIS_STATE, bit 14: ABD_STATE */
3131         if (nway_state & 0xc000)
3132                 return false;
3133         else
3134                 return true;
3135 }
3136 
3137 static bool rtl8153_in_nway(struct r8152 *tp)
3138 {
3139         u16 phy_state = ocp_reg_read(tp, OCP_PHY_STATE) & 0xff;
3140 
3141         if (phy_state == TXDIS_STATE || phy_state == ABD_STATE)
3142                 return false;
3143         else
3144                 return true;
3145 }
3146 
3147 static void set_carrier(struct r8152 *tp)
3148 {
3149         struct net_device *netdev = tp->netdev;
3150         u8 speed;
3151 
3152         speed = rtl8152_get_speed(tp);
3153 
3154         if (speed & LINK_STATUS) {
3155                 if (!netif_carrier_ok(netdev)) {
3156                         tp->rtl_ops.enable(tp);
3157                         set_bit(RTL8152_SET_RX_MODE, &tp->flags);
3158                         napi_disable(&tp->napi);
3159                         netif_carrier_on(netdev);
3160                         rtl_start_rx(tp);
3161                         napi_enable(&tp->napi);
3162                 }
3163         } else {
3164                 if (netif_carrier_ok(netdev)) {
3165                         netif_carrier_off(netdev);
3166                         napi_disable(&tp->napi);
3167                         tp->rtl_ops.disable(tp);
3168                         napi_enable(&tp->napi);
3169                 }
3170         }
3171 }
3172 
3173 static void rtl_work_func_t(struct work_struct *work)
3174 {
3175         struct r8152 *tp = container_of(work, struct r8152, schedule.work);
3176 
3177         /* If the device is unplugged or !netif_running(), the workqueue
3178          * doesn't need to wake the device, and could return directly.
3179          */
3180         if (test_bit(RTL8152_UNPLUG, &tp->flags) || !netif_running(tp->netdev))
3181                 return;
3182 
3183         if (usb_autopm_get_interface(tp->intf) < 0)
3184                 return;
3185 
3186         if (!test_bit(WORK_ENABLE, &tp->flags))
3187                 goto out1;
3188 
3189         if (!mutex_trylock(&tp->control)) {
3190                 schedule_delayed_work(&tp->schedule, 0);
3191                 goto out1;
3192         }
3193 
3194         if (test_and_clear_bit(RTL8152_LINK_CHG, &tp->flags))
3195                 set_carrier(tp);
3196 
3197         if (test_and_clear_bit(RTL8152_SET_RX_MODE, &tp->flags))
3198                 _rtl8152_set_rx_mode(tp->netdev);
3199 
3200         /* don't schedule napi before linking */
3201         if (test_and_clear_bit(SCHEDULE_NAPI, &tp->flags) &&
3202             netif_carrier_ok(tp->netdev))
3203                 napi_schedule(&tp->napi);
3204 
3205         mutex_unlock(&tp->control);
3206 
3207 out1:
3208         usb_autopm_put_interface(tp->intf);
3209 }
3210 
3211 static void rtl_hw_phy_work_func_t(struct work_struct *work)
3212 {
3213         struct r8152 *tp = container_of(work, struct r8152, hw_phy_work.work);
3214 
3215         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3216                 return;
3217 
3218         if (usb_autopm_get_interface(tp->intf) < 0)
3219                 return;
3220 
3221         mutex_lock(&tp->control);
3222 
3223         tp->rtl_ops.hw_phy_cfg(tp);
3224 
3225         rtl8152_set_speed(tp, tp->autoneg, tp->speed, tp->duplex);
3226 
3227         mutex_unlock(&tp->control);
3228 
3229         usb_autopm_put_interface(tp->intf);
3230 }
3231 
3232 #ifdef CONFIG_PM_SLEEP
3233 static int rtl_notifier(struct notifier_block *nb, unsigned long action,
3234                         void *data)
3235 {
3236         struct r8152 *tp = container_of(nb, struct r8152, pm_notifier);
3237 
3238         switch (action) {
3239         case PM_HIBERNATION_PREPARE:
3240         case PM_SUSPEND_PREPARE:
3241                 usb_autopm_get_interface(tp->intf);
3242                 break;
3243 
3244         case PM_POST_HIBERNATION:
3245         case PM_POST_SUSPEND:
3246                 usb_autopm_put_interface(tp->intf);
3247                 break;
3248 
3249         case PM_POST_RESTORE:
3250         case PM_RESTORE_PREPARE:
3251         default:
3252                 break;
3253         }
3254 
3255         return NOTIFY_DONE;
3256 }
3257 #endif
3258 
3259 static int rtl8152_open(struct net_device *netdev)
3260 {
3261         struct r8152 *tp = netdev_priv(netdev);
3262         int res = 0;
3263 
3264         res = alloc_all_mem(tp);
3265         if (res)
3266                 goto out;
3267 
3268         res = usb_autopm_get_interface(tp->intf);
3269         if (res < 0)
3270                 goto out_free;
3271 
3272         mutex_lock(&tp->control);
3273 
3274         tp->rtl_ops.up(tp);
3275 
3276         netif_carrier_off(netdev);
3277         netif_start_queue(netdev);
3278         set_bit(WORK_ENABLE, &tp->flags);
3279 
3280         res = usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3281         if (res) {
3282                 if (res == -ENODEV)
3283                         netif_device_detach(tp->netdev);
3284                 netif_warn(tp, ifup, netdev, "intr_urb submit failed: %d\n",
3285                            res);
3286                 goto out_unlock;
3287         }
3288         napi_enable(&tp->napi);
3289 
3290         mutex_unlock(&tp->control);
3291 
3292         usb_autopm_put_interface(tp->intf);
3293 #ifdef CONFIG_PM_SLEEP
3294         tp->pm_notifier.notifier_call = rtl_notifier;
3295         register_pm_notifier(&tp->pm_notifier);
3296 #endif
3297         return 0;
3298 
3299 out_unlock:
3300         mutex_unlock(&tp->control);
3301         usb_autopm_put_interface(tp->intf);
3302 out_free:
3303         free_all_mem(tp);
3304 out:
3305         return res;
3306 }
3307 
3308 static int rtl8152_close(struct net_device *netdev)
3309 {
3310         struct r8152 *tp = netdev_priv(netdev);
3311         int res = 0;
3312 
3313 #ifdef CONFIG_PM_SLEEP
3314         unregister_pm_notifier(&tp->pm_notifier);
3315 #endif
3316         napi_disable(&tp->napi);
3317         clear_bit(WORK_ENABLE, &tp->flags);
3318         usb_kill_urb(tp->intr_urb);
3319         cancel_delayed_work_sync(&tp->schedule);
3320         netif_stop_queue(netdev);
3321 
3322         res = usb_autopm_get_interface(tp->intf);
3323         if (res < 0 || test_bit(RTL8152_UNPLUG, &tp->flags)) {
3324                 rtl_drop_queued_tx(tp);
3325                 rtl_stop_rx(tp);
3326         } else {
3327                 mutex_lock(&tp->control);
3328 
3329                 tp->rtl_ops.down(tp);
3330 
3331                 mutex_unlock(&tp->control);
3332 
3333                 usb_autopm_put_interface(tp->intf);
3334         }
3335 
3336         free_all_mem(tp);
3337 
3338         return res;
3339 }
3340 
3341 static void rtl_tally_reset(struct r8152 *tp)
3342 {
3343         u32 ocp_data;
3344 
3345         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY);
3346         ocp_data |= TALLY_RESET;
3347         ocp_write_word(tp, MCU_TYPE_PLA, PLA_RSTTALLY, ocp_data);
3348 }
3349 
3350 static void r8152b_init(struct r8152 *tp)
3351 {
3352         u32 ocp_data;
3353         u16 data;
3354 
3355         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3356                 return;
3357 
3358         data = r8152_mdio_read(tp, MII_BMCR);
3359         if (data & BMCR_PDOWN) {
3360                 data &= ~BMCR_PDOWN;
3361                 r8152_mdio_write(tp, MII_BMCR, data);
3362         }
3363 
3364         r8152_aldps_en(tp, false);
3365 
3366         if (tp->version == RTL_VER_01) {
3367                 ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3368                 ocp_data &= ~LED_MODE_MASK;
3369                 ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3370         }
3371 
3372         r8152_power_cut_en(tp, false);
3373 
3374         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR);
3375         ocp_data |= TX_10M_IDLE_EN | PFM_PWM_SWITCH;
3376         ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data);
3377         ocp_data = ocp_read_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL);
3378         ocp_data &= ~MCU_CLK_RATIO_MASK;
3379         ocp_data |= MCU_CLK_RATIO | D3_CLK_GATED_EN;
3380         ocp_write_dword(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, ocp_data);
3381         ocp_data = GPHY_STS_MSK | SPEED_DOWN_MSK |
3382                    SPDWN_RXDV_MSK | SPDWN_LINKCHG_MSK;
3383         ocp_write_word(tp, MCU_TYPE_PLA, PLA_GPHY_INTR_IMR, ocp_data);
3384 
3385         rtl_tally_reset(tp);
3386 
3387         /* enable rx aggregation */
3388         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_USB_CTRL);
3389         ocp_data &= ~(RX_AGG_DISABLE | RX_ZERO_EN);
3390         ocp_write_word(tp, MCU_TYPE_USB, USB_USB_CTRL, ocp_data);
3391 }
3392 
3393 static void r8153_init(struct r8152 *tp)
3394 {
3395         u32 ocp_data;
3396         u16 data;
3397         int i;
3398 
3399         if (test_bit(RTL8152_UNPLUG, &tp->flags))
3400                 return;
3401 
3402         r8153_u1u2en(tp, false);
3403 
3404         for (i = 0; i < 500; i++) {
3405                 if (ocp_read_word(tp, MCU_TYPE_PLA, PLA_BOOT_CTRL) &
3406                     AUTOLOAD_DONE)
3407                         break;
3408                 msleep(20);
3409         }
3410 
3411         for (i = 0; i < 500; i++) {
3412                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3413                 if (ocp_data == PHY_STAT_LAN_ON || ocp_data == PHY_STAT_PWRDN)
3414                         break;
3415                 msleep(20);
3416         }
3417 
3418         if (tp->version == RTL_VER_03 || tp->version == RTL_VER_04 ||
3419             tp->version == RTL_VER_05)
3420                 ocp_reg_write(tp, OCP_ADC_CFG, CKADSEL_L | ADC_EN | EN_EMI_L);
3421 
3422         data = r8152_mdio_read(tp, MII_BMCR);
3423         if (data & BMCR_PDOWN) {
3424                 data &= ~BMCR_PDOWN;
3425                 r8152_mdio_write(tp, MII_BMCR, data);
3426         }
3427 
3428         for (i = 0; i < 500; i++) {
3429                 ocp_data = ocp_reg_read(tp, OCP_PHY_STATUS) & PHY_STAT_MASK;
3430                 if (ocp_data == PHY_STAT_LAN_ON)
3431                         break;
3432                 msleep(20);
3433         }
3434 
3435         usb_disable_lpm(tp->udev);
3436         r8153_u2p3en(tp, false);
3437 
3438         if (tp->version == RTL_VER_04) {
3439                 ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2);
3440                 ocp_data &= ~pwd_dn_scale_mask;
3441                 ocp_data |= pwd_dn_scale(96);
3442                 ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK2, ocp_data);
3443 
3444                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_USB2PHY);
3445                 ocp_data |= USB2PHY_L1 | USB2PHY_SUSPEND;
3446                 ocp_write_byte(tp, MCU_TYPE_USB, USB_USB2PHY, ocp_data);
3447         } else if (tp->version == RTL_VER_05) {
3448                 ocp_data = ocp_read_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0);
3449                 ocp_data &= ~ECM_ALDPS;
3450                 ocp_write_byte(tp, MCU_TYPE_PLA, PLA_DMY_REG0, ocp_data);
3451 
3452                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3453                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3454                         ocp_data &= ~DYNAMIC_BURST;
3455                 else
3456                         ocp_data |= DYNAMIC_BURST;
3457                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3458         } else if (tp->version == RTL_VER_06) {
3459                 ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1);
3460                 if (ocp_read_word(tp, MCU_TYPE_USB, USB_BURST_SIZE) == 0)
3461                         ocp_data &= ~DYNAMIC_BURST;
3462                 else
3463                         ocp_data |= DYNAMIC_BURST;
3464                 ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY1, ocp_data);
3465         }
3466 
3467         ocp_data = ocp_read_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2);
3468         ocp_data |= EP4_FULL_FC;
3469         ocp_write_byte(tp, MCU_TYPE_USB, USB_CSR_DUMMY2, ocp_data);
3470 
3471         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL);
3472         ocp_data &= ~TIMER11_EN;
3473         ocp_write_word(tp, MCU_TYPE_USB, USB_WDT11_CTRL, ocp_data);
3474 
3475         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE);
3476         ocp_data &= ~LED_MODE_MASK;
3477         ocp_write_word(tp, MCU_TYPE_PLA, PLA_LED_FEATURE, ocp_data);
3478 
3479         ocp_data = FIFO_EMPTY_1FB | ROK_EXIT_LPM;
3480         if (tp->version == RTL_VER_04 && tp->udev->speed < USB_SPEED_SUPER)
3481                 ocp_data |= LPM_TIMER_500MS;
3482         else
3483                 ocp_data |= LPM_TIMER_500US;
3484         ocp_write_byte(tp, MCU_TYPE_USB, USB_LPM_CTRL, ocp_data);
3485 
3486         ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2);
3487         ocp_data &= ~SEN_VAL_MASK;
3488         ocp_data |= SEN_VAL_NORMAL | SEL_RXIDLE;
3489         ocp_write_word(tp, MCU_TYPE_USB, USB_AFE_CTRL2, ocp_data);
3490 
3491         ocp_write_word(tp, MCU_TYPE_USB, USB_CONNECT_TIMER, 0x0001);
3492 
3493         r8153_power_cut_en(tp, false);
3494         r8153_u1u2en(tp, true);
3495 
3496         /* MAC clock speed down */
3497         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL, 0);
3498         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL2, 0);
3499         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, 0);
3500         ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL4, 0);
3501 
3502         rtl_tally_reset(tp);
3503         r8153_u2p3en(tp, true);
3504 }
3505 
3506 static int rtl8152_pre_reset(struct usb_interface *intf)
3507 {
3508         struct r8152 *tp = usb_get_intfdata(intf);
3509         struct net_device *netdev;
3510 
3511         if (!tp)
3512                 return 0;
3513 
3514         netdev = tp->netdev;
3515         if (!netif_running(netdev))
3516                 return 0;
3517 
3518         napi_disable(&tp->napi);
3519         clear_bit(WORK_ENABLE, &tp->flags);
3520         usb_kill_urb(tp->intr_urb);
3521         cancel_delayed_work_sync(&tp->schedule);
3522         if (netif_carrier_ok(netdev)) {
3523                 netif_stop_queue(netdev);
3524                 mutex_lock(&tp->control);
3525                 tp->rtl_ops.disable(tp);
3526                 mutex_unlock(&tp->control);
3527         }
3528 
3529         return 0;
3530 }
3531 
3532 static int rtl8152_post_reset(struct usb_interface *intf)
3533 {
3534         struct r8152 *tp = usb_get_intfdata(intf);
3535         struct net_device *netdev;
3536 
3537         if (!tp)
3538                 return 0;
3539 
3540         netdev = tp->netdev;
3541         if (!netif_running(netdev))
3542                 return 0;
3543 
3544         set_bit(WORK_ENABLE, &tp->flags);
3545         if (netif_carrier_ok(netdev)) {
3546                 mutex_lock(&tp->control);
3547                 tp->rtl_ops.enable(tp);
3548                 rtl8152_set_rx_mode(netdev);
3549                 mutex_unlock(&tp->control);
3550                 netif_wake_queue(netdev);
3551         }
3552 
3553         napi_enable(&tp->napi);
3554 
3555         return 0;
3556 }
3557 
3558 static bool delay_autosuspend(struct r8152 *tp)
3559 {
3560         bool sw_linking = !!netif_carrier_ok(tp->netdev);
3561         bool hw_linking = !!(rtl8152_get_speed(tp) & LINK_STATUS);
3562 
3563         /* This means a linking change occurs and the driver doesn't detect it,
3564          * yet. If the driver has disabled tx/rx and hw is linking on, the
3565          * device wouldn't wake up by receiving any packet.
3566          */
3567         if (work_busy(&tp->schedule.work) || sw_linking != hw_linking)
3568                 return true;
3569 
3570         /* If the linking down is occurred by nway, the device may miss the
3571          * linking change event. And it wouldn't wake when linking on.
3572          */
3573         if (!sw_linking && tp->rtl_ops.in_nway(tp))
3574                 return true;
3575         else
3576                 return false;
3577 }
3578 
3579 static int rtl8152_suspend(struct usb_interface *intf, pm_message_t message)
3580 {
3581         struct r8152 *tp = usb_get_intfdata(intf);
3582         struct net_device *netdev = tp->netdev;
3583         int ret = 0;
3584 
3585         mutex_lock(&tp->control);
3586 
3587         if (PMSG_IS_AUTO(message)) {
3588                 if (netif_running(netdev) && delay_autosuspend(tp)) {
3589                         ret = -EBUSY;
3590                         goto out1;
3591                 }
3592 
3593                 set_bit(SELECTIVE_SUSPEND, &tp->flags);
3594         } else {
3595                 netif_device_detach(netdev);
3596         }
3597 
3598         if (netif_running(netdev) && test_bit(WORK_ENABLE, &tp->flags)) {
3599                 clear_bit(WORK_ENABLE, &tp->flags);
3600                 usb_kill_urb(tp->intr_urb);
3601                 napi_disable(&tp->napi);
3602                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3603                         rtl_stop_rx(tp);
3604                         tp->rtl_ops.autosuspend_en(tp, true);
3605                 } else {
3606                         cancel_delayed_work_sync(&tp->schedule);
3607                         tp->rtl_ops.down(tp);
3608                 }
3609                 napi_enable(&tp->napi);
3610         }
3611 out1:
3612         mutex_unlock(&tp->control);
3613 
3614         return ret;
3615 }
3616 
3617 static int rtl8152_resume(struct usb_interface *intf)
3618 {
3619         struct r8152 *tp = usb_get_intfdata(intf);
3620 
3621         mutex_lock(&tp->control);
3622 
3623         if (!test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3624                 tp->rtl_ops.init(tp);
3625                 queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
3626                 netif_device_attach(tp->netdev);
3627         }
3628 
3629         if (netif_running(tp->netdev) && tp->netdev->flags & IFF_UP) {
3630                 if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3631                         tp->rtl_ops.autosuspend_en(tp, false);
3632                         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3633                         napi_disable(&tp->napi);
3634                         set_bit(WORK_ENABLE, &tp->flags);
3635                         if (netif_carrier_ok(tp->netdev))
3636                                 rtl_start_rx(tp);
3637                         napi_enable(&tp->napi);
3638                 } else {
3639                         tp->rtl_ops.up(tp);
3640                         netif_carrier_off(tp->netdev);
3641                         set_bit(WORK_ENABLE, &tp->flags);
3642                 }
3643                 usb_submit_urb(tp->intr_urb, GFP_KERNEL);
3644         } else if (test_bit(SELECTIVE_SUSPEND, &tp->flags)) {
3645                 if (tp->netdev->flags & IFF_UP)
3646                         tp->rtl_ops.autosuspend_en(tp, false);
3647                 clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3648         }
3649 
3650         mutex_unlock(&tp->control);
3651 
3652         return 0;
3653 }
3654 
3655 static int rtl8152_reset_resume(struct usb_interface *intf)
3656 {
3657         struct r8152 *tp = usb_get_intfdata(intf);
3658 
3659         clear_bit(SELECTIVE_SUSPEND, &tp->flags);
3660         return rtl8152_resume(intf);
3661 }
3662 
3663 static void rtl8152_get_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3664 {
3665         struct r8152 *tp = netdev_priv(dev);
3666 
3667         if (usb_autopm_get_interface(tp->intf) < 0)
3668                 return;
3669 
3670         if (!rtl_can_wakeup(tp)) {
3671                 wol->supported = 0;
3672                 wol->wolopts = 0;
3673         } else {
3674                 mutex_lock(&tp->control);
3675                 wol->supported = WAKE_ANY;
3676                 wol->wolopts = __rtl_get_wol(tp);
3677                 mutex_unlock(&tp->control);
3678         }
3679 
3680         usb_autopm_put_interface(tp->intf);
3681 }
3682 
3683 static int rtl8152_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
3684 {
3685         struct r8152 *tp = netdev_priv(dev);
3686         int ret;
3687 
3688         if (!rtl_can_wakeup(tp))
3689                 return -EOPNOTSUPP;
3690 
3691         ret = usb_autopm_get_interface(tp->intf);
3692         if (ret < 0)
3693                 goto out_set_wol;
3694 
3695         mutex_lock(&tp->control);
3696 
3697         __rtl_set_wol(tp, wol->wolopts);
3698         tp->saved_wolopts = wol->wolopts & WAKE_ANY;
3699 
3700         mutex_unlock(&tp->control);
3701 
3702         usb_autopm_put_interface(tp->intf);
3703 
3704 out_set_wol:
3705         return ret;
3706 }
3707 
3708 static u32 rtl8152_get_msglevel(struct net_device *dev)
3709 {
3710         struct r8152 *tp = netdev_priv(dev);
3711 
3712         return tp->msg_enable;
3713 }
3714 
3715 static void rtl8152_set_msglevel(struct net_device *dev, u32 value)
3716 {
3717         struct r8152 *tp = netdev_priv(dev);
3718 
3719         tp->msg_enable = value;
3720 }
3721 
3722 static void rtl8152_get_drvinfo(struct net_device *netdev,
3723                                 struct ethtool_drvinfo *info)
3724 {
3725         struct r8152 *tp = netdev_priv(netdev);
3726 
3727         strlcpy(info->driver, MODULENAME, sizeof(info->driver));
3728         strlcpy(info->version, DRIVER_VERSION, sizeof(info->version));
3729         usb_make_path(tp->udev, info->bus_info, sizeof(info->bus_info));
3730 }
3731 
3732 static
3733 int rtl8152_get_settings(struct net_device *netdev, struct ethtool_cmd *cmd)
3734 {
3735         struct r8152 *tp = netdev_priv(netdev);
3736         int ret;
3737 
3738         if (!tp->mii.mdio_read)
3739                 return -EOPNOTSUPP;
3740 
3741         ret = usb_autopm_get_interface(tp->intf);
3742         if (ret < 0)
3743                 goto out;
3744 
3745         mutex_lock(&tp->control);
3746 
3747         ret = mii_ethtool_gset(&tp->mii, cmd);
3748 
3749         mutex_unlock(&tp->control);
3750 
3751         usb_autopm_put_interface(tp->intf);
3752 
3753 out:
3754         return ret;
3755 }
3756 
3757 static int rtl8152_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
3758 {
3759         struct r8152 *tp = netdev_priv(dev);
3760         int ret;
3761 
3762         ret = usb_autopm_get_interface(tp->intf);
3763         if (ret < 0)
3764                 goto out;
3765 
3766         mutex_lock(&tp->control);
3767 
3768         ret = rtl8152_set_speed(tp, cmd->autoneg, cmd->speed, cmd->duplex);
3769         if (!ret) {
3770                 tp->autoneg = cmd->autoneg;
3771                 tp->speed = cmd->speed;
3772                 tp->duplex = cmd->duplex;
3773         }
3774 
3775         mutex_unlock(&tp->control);
3776 
3777         usb_autopm_put_interface(tp->intf);
3778 
3779 out:
3780         return ret;
3781 }
3782 
3783 static const char rtl8152_gstrings[][ETH_GSTRING_LEN] = {
3784         "tx_packets",
3785         "rx_packets",
3786         "tx_errors",
3787         "rx_errors",
3788         "rx_missed",
3789         "align_errors",
3790         "tx_single_collisions",
3791         "tx_multi_collisions",
3792         "rx_unicast",
3793         "rx_broadcast",
3794         "rx_multicast",
3795         "tx_aborted",
3796         "tx_underrun",
3797 };
3798 
3799 static int rtl8152_get_sset_count(struct net_device *dev, int sset)
3800 {
3801         switch (sset) {
3802         case ETH_SS_STATS:
3803                 return ARRAY_SIZE(rtl8152_gstrings);
3804         default:
3805                 return -EOPNOTSUPP;
3806         }
3807 }
3808 
3809 static void rtl8152_get_ethtool_stats(struct net_device *dev,
3810                                       struct ethtool_stats *stats, u64 *data)
3811 {
3812         struct r8152 *tp = netdev_priv(dev);
3813         struct tally_counter tally;
3814 
3815         if (usb_autopm_get_interface(tp->intf) < 0)
3816                 return;
3817 
3818         generic_ocp_read(tp, PLA_TALLYCNT, sizeof(tally), &tally, MCU_TYPE_PLA);
3819 
3820         usb_autopm_put_interface(tp->intf);
3821 
3822         data[0] = le64_to_cpu(tally.tx_packets);
3823         data[1] = le64_to_cpu(tally.rx_packets);
3824         data[2] = le64_to_cpu(tally.tx_errors);
3825         data[3] = le32_to_cpu(tally.rx_errors);
3826         data[4] = le16_to_cpu(tally.rx_missed);
3827         data[5] = le16_to_cpu(tally.align_errors);
3828         data[6] = le32_to_cpu(tally.tx_one_collision);
3829         data[7] = le32_to_cpu(tally.tx_multi_collision);
3830         data[8] = le64_to_cpu(tally.rx_unicast);
3831         data[9] = le64_to_cpu(tally.rx_broadcast);
3832         data[10] = le32_to_cpu(tally.rx_multicast);
3833         data[11] = le16_to_cpu(tally.tx_aborted);
3834         data[12] = le16_to_cpu(tally.tx_underrun);
3835 }
3836 
3837 static void rtl8152_get_strings(struct net_device *dev, u32 stringset, u8 *data)
3838 {
3839         switch (stringset) {
3840         case ETH_SS_STATS:
3841                 memcpy(data, *rtl8152_gstrings, sizeof(rtl8152_gstrings));
3842                 break;
3843         }
3844 }
3845 
3846 static int r8152_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3847 {
3848         u32 ocp_data, lp, adv, supported = 0;
3849         u16 val;
3850 
3851         val = r8152_mmd_read(tp, MDIO_MMD_PCS, MDIO_PCS_EEE_ABLE);
3852         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3853 
3854         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV);
3855         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3856 
3857         val = r8152_mmd_read(tp, MDIO_MMD_AN, MDIO_AN_EEE_LPABLE);
3858         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3859 
3860         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3861         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3862 
3863         eee->eee_enabled = !!ocp_data;
3864         eee->eee_active = !!(supported & adv & lp);
3865         eee->supported = supported;
3866         eee->advertised = adv;
3867         eee->lp_advertised = lp;
3868 
3869         return 0;
3870 }
3871 
3872 static int r8152_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3873 {
3874         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3875 
3876         r8152_eee_en(tp, eee->eee_enabled);
3877 
3878         if (!eee->eee_enabled)
3879                 val = 0;
3880 
3881         r8152_mmd_write(tp, MDIO_MMD_AN, MDIO_AN_EEE_ADV, val);
3882 
3883         return 0;
3884 }
3885 
3886 static int r8153_get_eee(struct r8152 *tp, struct ethtool_eee *eee)
3887 {
3888         u32 ocp_data, lp, adv, supported = 0;
3889         u16 val;
3890 
3891         val = ocp_reg_read(tp, OCP_EEE_ABLE);
3892         supported = mmd_eee_cap_to_ethtool_sup_t(val);
3893 
3894         val = ocp_reg_read(tp, OCP_EEE_ADV);
3895         adv = mmd_eee_adv_to_ethtool_adv_t(val);
3896 
3897         val = ocp_reg_read(tp, OCP_EEE_LPABLE);
3898         lp = mmd_eee_adv_to_ethtool_adv_t(val);
3899 
3900         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_EEE_CR);
3901         ocp_data &= EEE_RX_EN | EEE_TX_EN;
3902 
3903         eee->eee_enabled = !!ocp_data;
3904         eee->eee_active = !!(supported & adv & lp);
3905         eee->supported = supported;
3906         eee->advertised = adv;
3907         eee->lp_advertised = lp;
3908 
3909         return 0;
3910 }
3911 
3912 static int r8153_set_eee(struct r8152 *tp, struct ethtool_eee *eee)
3913 {
3914         u16 val = ethtool_adv_to_mmd_eee_adv_t(eee->advertised);
3915 
3916         r8153_eee_en(tp, eee->eee_enabled);
3917 
3918         if (!eee->eee_enabled)
3919                 val = 0;
3920 
3921         ocp_reg_write(tp, OCP_EEE_ADV, val);
3922 
3923         return 0;
3924 }
3925 
3926 static int
3927 rtl_ethtool_get_eee(struct net_device *net, struct ethtool_eee *edata)
3928 {
3929         struct r8152 *tp = netdev_priv(net);
3930         int ret;
3931 
3932         ret = usb_autopm_get_interface(tp->intf);
3933         if (ret < 0)
3934                 goto out;
3935 
3936         mutex_lock(&tp->control);
3937 
3938         ret = tp->rtl_ops.eee_get(tp, edata);
3939 
3940         mutex_unlock(&tp->control);
3941 
3942         usb_autopm_put_interface(tp->intf);
3943 
3944 out:
3945         return ret;
3946 }
3947 
3948 static int
3949 rtl_ethtool_set_eee(struct net_device *net, struct ethtool_eee *edata)
3950 {
3951         struct r8152 *tp = netdev_priv(net);
3952         int ret;
3953 
3954         ret = usb_autopm_get_interface(tp->intf);
3955         if (ret < 0)
3956                 goto out;
3957 
3958         mutex_lock(&tp->control);
3959 
3960         ret = tp->rtl_ops.eee_set(tp, edata);
3961         if (!ret)
3962                 ret = mii_nway_restart(&tp->mii);
3963 
3964         mutex_unlock(&tp->control);
3965 
3966         usb_autopm_put_interface(tp->intf);
3967 
3968 out:
3969         return ret;
3970 }
3971 
3972 static int rtl8152_nway_reset(struct net_device *dev)
3973 {
3974         struct r8152 *tp = netdev_priv(dev);
3975         int ret;
3976 
3977         ret = usb_autopm_get_interface(tp->intf);
3978         if (ret < 0)
3979                 goto out;
3980 
3981         mutex_lock(&tp->control);
3982 
3983         ret = mii_nway_restart(&tp->mii);
3984 
3985         mutex_unlock(&tp->control);
3986 
3987         usb_autopm_put_interface(tp->intf);
3988 
3989 out:
3990         return ret;
3991 }
3992 
3993 static int rtl8152_get_coalesce(struct net_device *netdev,
3994                                 struct ethtool_coalesce *coalesce)
3995 {
3996         struct r8152 *tp = netdev_priv(netdev);
3997 
3998         switch (tp->version) {
3999         case RTL_VER_01:
4000         case RTL_VER_02:
4001                 return -EOPNOTSUPP;
4002         default:
4003                 break;
4004         }
4005 
4006         coalesce->rx_coalesce_usecs = tp->coalesce;
4007 
4008         return 0;
4009 }
4010 
4011 static int rtl8152_set_coalesce(struct net_device *netdev,
4012                                 struct ethtool_coalesce *coalesce)
4013 {
4014         struct r8152 *tp = netdev_priv(netdev);
4015         int ret;
4016 
4017         switch (tp->version) {
4018         case RTL_VER_01:
4019         case RTL_VER_02:
4020                 return -EOPNOTSUPP;
4021         default:
4022                 break;
4023         }
4024 
4025         if (coalesce->rx_coalesce_usecs > COALESCE_SLOW)
4026                 return -EINVAL;
4027 
4028         ret = usb_autopm_get_interface(tp->intf);
4029         if (ret < 0)
4030                 return ret;
4031 
4032         mutex_lock(&tp->control);
4033 
4034         if (tp->coalesce != coalesce->rx_coalesce_usecs) {
4035                 tp->coalesce = coalesce->rx_coalesce_usecs;
4036 
4037                 if (netif_running(tp->netdev) && netif_carrier_ok(netdev))
4038                         r8153_set_rx_early_timeout(tp);
4039         }
4040 
4041         mutex_unlock(&tp->control);
4042 
4043         usb_autopm_put_interface(tp->intf);
4044 
4045         return ret;
4046 }
4047 
4048 static const struct ethtool_ops ops = {
4049         .get_drvinfo = rtl8152_get_drvinfo,
4050         .get_settings = rtl8152_get_settings,
4051         .set_settings = rtl8152_set_settings,
4052         .get_link = ethtool_op_get_link,
4053         .nway_reset = rtl8152_nway_reset,
4054         .get_msglevel = rtl8152_get_msglevel,
4055         .set_msglevel = rtl8152_set_msglevel,
4056         .get_wol = rtl8152_get_wol,
4057         .set_wol = rtl8152_set_wol,
4058         .get_strings = rtl8152_get_strings,
4059         .get_sset_count = rtl8152_get_sset_count,
4060         .get_ethtool_stats = rtl8152_get_ethtool_stats,
4061         .get_coalesce = rtl8152_get_coalesce,
4062         .set_coalesce = rtl8152_set_coalesce,
4063         .get_eee = rtl_ethtool_get_eee,
4064         .set_eee = rtl_ethtool_set_eee,
4065 };
4066 
4067 static int rtl8152_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd)
4068 {
4069         struct r8152 *tp = netdev_priv(netdev);
4070         struct mii_ioctl_data *data = if_mii(rq);
4071         int res;
4072 
4073         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4074                 return -ENODEV;
4075 
4076         res = usb_autopm_get_interface(tp->intf);
4077         if (res < 0)
4078                 goto out;
4079 
4080         switch (cmd) {
4081         case SIOCGMIIPHY:
4082                 data->phy_id = R8152_PHY_ID; /* Internal PHY */
4083                 break;
4084 
4085         case SIOCGMIIREG:
4086                 mutex_lock(&tp->control);
4087                 data->val_out = r8152_mdio_read(tp, data->reg_num);
4088                 mutex_unlock(&tp->control);
4089                 break;
4090 
4091         case SIOCSMIIREG:
4092                 if (!capable(CAP_NET_ADMIN)) {
4093                         res = -EPERM;
4094                         break;
4095                 }
4096                 mutex_lock(&tp->control);
4097                 r8152_mdio_write(tp, data->reg_num, data->val_in);
4098                 mutex_unlock(&tp->control);
4099                 break;
4100 
4101         default:
4102                 res = -EOPNOTSUPP;
4103         }
4104 
4105         usb_autopm_put_interface(tp->intf);
4106 
4107 out:
4108         return res;
4109 }
4110 
4111 static int rtl8152_change_mtu(struct net_device *dev, int new_mtu)
4112 {
4113         struct r8152 *tp = netdev_priv(dev);
4114         int ret;
4115 
4116         switch (tp->version) {
4117         case RTL_VER_01:
4118         case RTL_VER_02:
4119                 return eth_change_mtu(dev, new_mtu);
4120         default:
4121                 break;
4122         }
4123 
4124         if (new_mtu < 68 || new_mtu > RTL8153_MAX_MTU)
4125                 return -EINVAL;
4126 
4127         ret = usb_autopm_get_interface(tp->intf);
4128         if (ret < 0)
4129                 return ret;
4130 
4131         mutex_lock(&tp->control);
4132 
4133         dev->mtu = new_mtu;
4134 
4135         if (netif_running(dev) && netif_carrier_ok(dev))
4136                 r8153_set_rx_early_size(tp);
4137 
4138         mutex_unlock(&tp->control);
4139 
4140         usb_autopm_put_interface(tp->intf);
4141 
4142         return ret;
4143 }
4144 
4145 static const struct net_device_ops rtl8152_netdev_ops = {
4146         .ndo_open               = rtl8152_open,
4147         .ndo_stop               = rtl8152_close,
4148         .ndo_do_ioctl           = rtl8152_ioctl,
4149         .ndo_start_xmit         = rtl8152_start_xmit,
4150         .ndo_tx_timeout         = rtl8152_tx_timeout,
4151         .ndo_set_features       = rtl8152_set_features,
4152         .ndo_set_rx_mode        = rtl8152_set_rx_mode,
4153         .ndo_set_mac_address    = rtl8152_set_mac_address,
4154         .ndo_change_mtu         = rtl8152_change_mtu,
4155         .ndo_validate_addr      = eth_validate_addr,
4156         .ndo_features_check     = rtl8152_features_check,
4157 };
4158 
4159 static void r8152b_get_version(struct r8152 *tp)
4160 {
4161         u32     ocp_data;
4162         u16     version;
4163 
4164         ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_TCR1);
4165         version = (u16)(ocp_data & VERSION_MASK);
4166 
4167         switch (version) {
4168         case 0x4c00:
4169                 tp->version = RTL_VER_01;
4170                 break;
4171         case 0x4c10:
4172                 tp->version = RTL_VER_02;
4173                 break;
4174         case 0x5c00:
4175                 tp->version = RTL_VER_03;
4176                 tp->mii.supports_gmii = 1;
4177                 break;
4178         case 0x5c10:
4179                 tp->version = RTL_VER_04;
4180                 tp->mii.supports_gmii = 1;
4181                 break;
4182         case 0x5c20:
4183                 tp->version = RTL_VER_05;
4184                 tp->mii.supports_gmii = 1;
4185                 break;
4186         case 0x5c30:
4187                 tp->version = RTL_VER_06;
4188                 tp->mii.supports_gmii = 1;
4189                 break;
4190         default:
4191                 netif_info(tp, probe, tp->netdev,
4192                            "Unknown version 0x%04x\n", version);
4193                 break;
4194         }
4195 }
4196 
4197 static void rtl8152_unload(struct r8152 *tp)
4198 {
4199         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4200                 return;
4201 
4202         if (tp->version != RTL_VER_01)
4203                 r8152_power_cut_en(tp, true);
4204 }
4205 
4206 static void rtl8153_unload(struct r8152 *tp)
4207 {
4208         if (test_bit(RTL8152_UNPLUG, &tp->flags))
4209                 return;
4210 
4211         r8153_power_cut_en(tp, false);
4212 }
4213 
4214 static int rtl_ops_init(struct r8152 *tp)
4215 {
4216         struct rtl_ops *ops = &tp->rtl_ops;
4217         int ret = 0;
4218 
4219         switch (tp->version) {
4220         case RTL_VER_01:
4221         case RTL_VER_02:
4222                 ops->init               = r8152b_init;
4223                 ops->enable             = rtl8152_enable;
4224                 ops->disable            = rtl8152_disable;
4225                 ops->up                 = rtl8152_up;
4226                 ops->down               = rtl8152_down;
4227                 ops->unload             = rtl8152_unload;
4228                 ops->eee_get            = r8152_get_eee;
4229                 ops->eee_set            = r8152_set_eee;
4230                 ops->in_nway            = rtl8152_in_nway;
4231                 ops->hw_phy_cfg         = r8152b_hw_phy_cfg;
4232                 ops->autosuspend_en     = rtl_runtime_suspend_enable;
4233                 break;
4234 
4235         case RTL_VER_03:
4236         case RTL_VER_04:
4237         case RTL_VER_05:
4238         case RTL_VER_06:
4239                 ops->init               = r8153_init;
4240                 ops->enable             = rtl8153_enable;
4241                 ops->disable            = rtl8153_disable;
4242                 ops->up                 = rtl8153_up;
4243                 ops->down               = rtl8153_down;
4244                 ops->unload             = rtl8153_unload;
4245                 ops->eee_get            = r8153_get_eee;
4246                 ops->eee_set            = r8153_set_eee;
4247                 ops->in_nway            = rtl8153_in_nway;
4248                 ops->hw_phy_cfg         = r8153_hw_phy_cfg;
4249                 ops->autosuspend_en     = rtl8153_runtime_enable;
4250                 break;
4251 
4252         default:
4253                 ret = -ENODEV;
4254                 netif_err(tp, probe, tp->netdev, "Unknown Device\n");
4255                 break;
4256         }
4257 
4258         return ret;
4259 }
4260 
4261 static int rtl8152_probe(struct usb_interface *intf,
4262                          const struct usb_device_id *id)
4263 {
4264         struct usb_device *udev = interface_to_usbdev(intf);
4265         struct r8152 *tp;
4266         struct net_device *netdev;
4267         int ret;
4268 
4269         if (udev->actconfig->desc.bConfigurationValue != 1) {
4270                 usb_driver_set_configuration(udev, 1);
4271                 return -ENODEV;
4272         }
4273 
4274         usb_reset_device(udev);
4275         netdev = alloc_etherdev(sizeof(struct r8152));
4276         if (!netdev) {
4277                 dev_err(&intf->dev, "Out of memory\n");
4278                 return -ENOMEM;
4279         }
4280 
4281         SET_NETDEV_DEV(netdev, &intf->dev);
4282         tp = netdev_priv(netdev);
4283         tp->msg_enable = 0x7FFF;
4284 
4285         tp->udev = udev;
4286         tp->netdev = netdev;
4287         tp->intf = intf;
4288 
4289         r8152b_get_version(tp);
4290         ret = rtl_ops_init(tp);
4291         if (ret)
4292                 goto out;
4293 
4294         mutex_init(&tp->control);
4295         INIT_DELAYED_WORK(&tp->schedule, rtl_work_func_t);
4296         INIT_DELAYED_WORK(&tp->hw_phy_work, rtl_hw_phy_work_func_t);
4297 
4298         netdev->netdev_ops = &rtl8152_netdev_ops;
4299         netdev->watchdog_timeo = RTL8152_TX_TIMEOUT;
4300 
4301         netdev->features |= NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4302                             NETIF_F_TSO | NETIF_F_FRAGLIST | NETIF_F_IPV6_CSUM |
4303                             NETIF_F_TSO6 | NETIF_F_HW_VLAN_CTAG_RX |
4304                             NETIF_F_HW_VLAN_CTAG_TX;
4305         netdev->hw_features = NETIF_F_RXCSUM | NETIF_F_IP_CSUM | NETIF_F_SG |
4306                               NETIF_F_TSO | NETIF_F_FRAGLIST |
4307                               NETIF_F_IPV6_CSUM | NETIF_F_TSO6 |
4308                               NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
4309         netdev->vlan_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO |
4310                                 NETIF_F_HIGHDMA | NETIF_F_FRAGLIST |
4311                                 NETIF_F_IPV6_CSUM | NETIF_F_TSO6;
4312 
4313         netdev->ethtool_ops = &ops;
4314         netif_set_gso_max_size(netdev, RTL_LIMITED_TSO_SIZE);
4315 
4316         tp->mii.dev = netdev;
4317         tp->mii.mdio_read = read_mii_word;
4318         tp->mii.mdio_write = write_mii_word;
4319         tp->mii.phy_id_mask = 0x3f;
4320         tp->mii.reg_num_mask = 0x1f;
4321         tp->mii.phy_id = R8152_PHY_ID;
4322 
4323         switch (udev->speed) {
4324         case USB_SPEED_SUPER:
4325         case USB_SPEED_SUPER_PLUS:
4326                 tp->coalesce = COALESCE_SUPER;
4327                 break;
4328         case USB_SPEED_HIGH:
4329                 tp->coalesce = COALESCE_HIGH;
4330                 break;
4331         default:
4332                 tp->coalesce = COALESCE_SLOW;
4333                 break;
4334         }
4335 
4336         tp->autoneg = AUTONEG_ENABLE;
4337         tp->speed = tp->mii.supports_gmii ? SPEED_1000 : SPEED_100;
4338         tp->duplex = DUPLEX_FULL;
4339 
4340         intf->needs_remote_wakeup = 1;
4341 
4342         tp->rtl_ops.init(tp);
4343         queue_delayed_work(system_long_wq, &tp->hw_phy_work, 0);
4344         set_ethernet_addr(tp);
4345 
4346         usb_set_intfdata(intf, tp);
4347         netif_napi_add(netdev, &tp->napi, r8152_poll, RTL8152_NAPI_WEIGHT);
4348 
4349         ret = register_netdev(netdev);
4350         if (ret != 0) {
4351                 netif_err(tp, probe, netdev, "couldn't register the device\n");
4352                 goto out1;
4353         }
4354 
4355         if (!rtl_can_wakeup(tp))
4356                 __rtl_set_wol(tp, 0);
4357 
4358         tp->saved_wolopts = __rtl_get_wol(tp);
4359         if (tp->saved_wolopts)
4360                 device_set_wakeup_enable(&udev->dev, true);
4361         else
4362                 device_set_wakeup_enable(&udev->dev, false);
4363 
4364         netif_info(tp, probe, netdev, "%s\n", DRIVER_VERSION);
4365 
4366         return 0;
4367 
4368 out1:
4369         netif_napi_del(&tp->napi);
4370         usb_set_intfdata(intf, NULL);
4371 out:
4372         free_netdev(netdev);
4373         return ret;
4374 }
4375 
4376 static void rtl8152_disconnect(struct usb_interface *intf)
4377 {
4378         struct r8152 *tp = usb_get_intfdata(intf);
4379 
4380         usb_set_intfdata(intf, NULL);
4381         if (tp) {
4382                 struct usb_device *udev = tp->udev;
4383 
4384                 if (udev->state == USB_STATE_NOTATTACHED)
4385                         set_bit(RTL8152_UNPLUG, &tp->flags);
4386 
4387                 netif_napi_del(&tp->napi);
4388                 unregister_netdev(tp->netdev);
4389                 cancel_delayed_work_sync(&tp->hw_phy_work);
4390                 tp->rtl_ops.unload(tp);
4391                 free_netdev(tp->netdev);
4392         }
4393 }
4394 
4395 #define REALTEK_USB_DEVICE(vend, prod)  \
4396         .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
4397                        USB_DEVICE_ID_MATCH_INT_CLASS, \
4398         .idVendor = (vend), \
4399         .idProduct = (prod), \
4400         .bInterfaceClass = USB_CLASS_VENDOR_SPEC \
4401 }, \
4402 { \
4403         .match_flags = USB_DEVICE_ID_MATCH_INT_INFO | \
4404                        USB_DEVICE_ID_MATCH_DEVICE, \
4405         .idVendor = (vend), \
4406         .idProduct = (prod), \
4407         .bInterfaceClass = USB_CLASS_COMM, \
4408         .bInterfaceSubClass = USB_CDC_SUBCLASS_ETHERNET, \
4409         .bInterfaceProtocol = USB_CDC_PROTO_NONE
4410 
4411 /* table of devices that work with this driver */
4412 static struct usb_device_id rtl8152_table[] = {
4413         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8152)},
4414         {REALTEK_USB_DEVICE(VENDOR_ID_REALTEK, 0x8153)},
4415         {REALTEK_USB_DEVICE(VENDOR_ID_SAMSUNG, 0xa101)},
4416         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x7205)},
4417         {REALTEK_USB_DEVICE(VENDOR_ID_LENOVO,  0x304f)},
4418         {REALTEK_USB_DEVICE(VENDOR_ID_NVIDIA,  0x09ff)},
4419         {}
4420 };
4421 
4422 MODULE_DEVICE_TABLE(usb, rtl8152_table);
4423 
4424 static struct usb_driver rtl8152_driver = {
4425         .name =         MODULENAME,
4426         .id_table =     rtl8152_table,
4427         .probe =        rtl8152_probe,
4428         .disconnect =   rtl8152_disconnect,
4429         .suspend =      rtl8152_suspend,
4430         .resume =       rtl8152_resume,
4431         .reset_resume = rtl8152_reset_resume,
4432         .pre_reset =    rtl8152_pre_reset,
4433         .post_reset =   rtl8152_post_reset,
4434         .supports_autosuspend = 1,
4435         .disable_hub_initiated_lpm = 1,
4436 };
4437 
4438 module_usb_driver(rtl8152_driver);
4439 
4440 MODULE_AUTHOR(DRIVER_AUTHOR);
4441 MODULE_DESCRIPTION(DRIVER_DESC);
4442 MODULE_LICENSE("GPL");
4443 MODULE_VERSION(DRIVER_VERSION);
4444 

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