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Version: 2.6.24 2.6.25 2.6.26 2.6.27 2.6.28 2.6.29 2.6.30 2.6.31 2.6.32 2.6.33 2.6.34 2.6.35
Architecture: x86 arm avr32 blackfin m68k m68knommu microblaze mips powerpc sh
1 /******************************************************************************* 2 3 Copyright(c) 2006 Tundra Semiconductor Corporation. 4 5 This program is free software; you can redistribute it and/or modify it 6 under the terms of the GNU General Public License as published by the Free 7 Software Foundation; either version 2 of the License, or (at your option) 8 any later version. 9 10 This program is distributed in the hope that it will be useful, but WITHOUT 11 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 more details. 14 15 You should have received a copy of the GNU General Public License along with 16 this program; if not, write to the Free Software Foundation, Inc., 59 17 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 19 *******************************************************************************/ 20 21 /* This driver is based on the driver code originally developed 22 * for the Intel IOC80314 (ForestLake) Gigabit Ethernet by 23 * scott.wood@timesys.com * Copyright (C) 2003 TimeSys Corporation 24 * 25 * Currently changes from original version are: 26 * - porting to Tsi108-based platform and kernel 2.6 (kong.lai@tundra.com) 27 * - modifications to handle two ports independently and support for 28 * additional PHY devices (alexandre.bounine@tundra.com) 29 * - Get hardware information from platform device. (tie-fei.zang@freescale.com) 30 * 31 */ 32 33 #include <linux/module.h> 34 #include <linux/types.h> 35 #include <linux/init.h> 36 #include <linux/net.h> 37 #include <linux/netdevice.h> 38 #include <linux/etherdevice.h> 39 #include <linux/skbuff.h> 40 #include <linux/slab.h> 41 #include <linux/spinlock.h> 42 #include <linux/delay.h> 43 #include <linux/crc32.h> 44 #include <linux/mii.h> 45 #include <linux/device.h> 46 #include <linux/pci.h> 47 #include <linux/rtnetlink.h> 48 #include <linux/timer.h> 49 #include <linux/platform_device.h> 50 51 #include <asm/system.h> 52 #include <asm/io.h> 53 #include <asm/tsi108.h> 54 55 #include "tsi108_eth.h" 56 57 #define MII_READ_DELAY 10000 /* max link wait time in msec */ 58 59 #define TSI108_RXRING_LEN 256 60 61 /* NOTE: The driver currently does not support receiving packets 62 * larger than the buffer size, so don't decrease this (unless you 63 * want to add such support). 64 */ 65 #define TSI108_RXBUF_SIZE 1536 66 67 #define TSI108_TXRING_LEN 256 68 69 #define TSI108_TX_INT_FREQ 64 70 71 /* Check the phy status every half a second. */ 72 #define CHECK_PHY_INTERVAL (HZ/2) 73 74 static int tsi108_init_one(struct platform_device *pdev); 75 static int tsi108_ether_remove(struct platform_device *pdev); 76 77 struct tsi108_prv_data { 78 void __iomem *regs; /* Base of normal regs */ 79 void __iomem *phyregs; /* Base of register bank used for PHY access */ 80 81 struct net_device *dev; 82 struct napi_struct napi; 83 84 unsigned int phy; /* Index of PHY for this interface */ 85 unsigned int irq_num; 86 unsigned int id; 87 unsigned int phy_type; 88 89 struct timer_list timer;/* Timer that triggers the check phy function */ 90 unsigned int rxtail; /* Next entry in rxring to read */ 91 unsigned int rxhead; /* Next entry in rxring to give a new buffer */ 92 unsigned int rxfree; /* Number of free, allocated RX buffers */ 93 94 unsigned int rxpending; /* Non-zero if there are still descriptors 95 * to be processed from a previous descriptor 96 * interrupt condition that has been cleared */ 97 98 unsigned int txtail; /* Next TX descriptor to check status on */ 99 unsigned int txhead; /* Next TX descriptor to use */ 100 101 /* Number of free TX descriptors. This could be calculated from 102 * rxhead and rxtail if one descriptor were left unused to disambiguate 103 * full and empty conditions, but it's simpler to just keep track 104 * explicitly. */ 105 106 unsigned int txfree; 107 108 unsigned int phy_ok; /* The PHY is currently powered on. */ 109 110 /* PHY status (duplex is 1 for half, 2 for full, 111 * so that the default 0 indicates that neither has 112 * yet been configured). */ 113 114 unsigned int link_up; 115 unsigned int speed; 116 unsigned int duplex; 117 118 tx_desc *txring; 119 rx_desc *rxring; 120 struct sk_buff *txskbs[TSI108_TXRING_LEN]; 121 struct sk_buff *rxskbs[TSI108_RXRING_LEN]; 122 123 dma_addr_t txdma, rxdma; 124 125 /* txlock nests in misclock and phy_lock */ 126 127 spinlock_t txlock, misclock; 128 129 /* stats is used to hold the upper bits of each hardware counter, 130 * and tmpstats is used to hold the full values for returning 131 * to the caller of get_stats(). They must be separate in case 132 * an overflow interrupt occurs before the stats are consumed. 133 */ 134 135 struct net_device_stats stats; 136 struct net_device_stats tmpstats; 137 138 /* These stats are kept separate in hardware, thus require individual 139 * fields for handling carry. They are combined in get_stats. 140 */ 141 142 unsigned long rx_fcs; /* Add to rx_frame_errors */ 143 unsigned long rx_short_fcs; /* Add to rx_frame_errors */ 144 unsigned long rx_long_fcs; /* Add to rx_frame_errors */ 145 unsigned long rx_underruns; /* Add to rx_length_errors */ 146 unsigned long rx_overruns; /* Add to rx_length_errors */ 147 148 unsigned long tx_coll_abort; /* Add to tx_aborted_errors/collisions */ 149 unsigned long tx_pause_drop; /* Add to tx_aborted_errors */ 150 151 unsigned long mc_hash[16]; 152 u32 msg_enable; /* debug message level */ 153 struct mii_if_info mii_if; 154 unsigned int init_media; 155 }; 156 157 /* Structure for a device driver */ 158 159 static struct platform_driver tsi_eth_driver = { 160 .probe = tsi108_init_one, 161 .remove = tsi108_ether_remove, 162 .driver = { 163 .name = "tsi-ethernet", 164 }, 165 }; 166 167 static void tsi108_timed_checker(unsigned long dev_ptr); 168 169 static void dump_eth_one(struct net_device *dev) 170 { 171 struct tsi108_prv_data *data = netdev_priv(dev); 172 173 printk("Dumping %s...\n", dev->name); 174 printk("intstat %x intmask %x phy_ok %d" 175 " link %d speed %d duplex %d\n", 176 TSI_READ(TSI108_EC_INTSTAT), 177 TSI_READ(TSI108_EC_INTMASK), data->phy_ok, 178 data->link_up, data->speed, data->duplex); 179 180 printk("TX: head %d, tail %d, free %d, stat %x, estat %x, err %x\n", 181 data->txhead, data->txtail, data->txfree, 182 TSI_READ(TSI108_EC_TXSTAT), 183 TSI_READ(TSI108_EC_TXESTAT), 184 TSI_READ(TSI108_EC_TXERR)); 185 186 printk("RX: head %d, tail %d, free %d, stat %x," 187 " estat %x, err %x, pending %d\n\n", 188 data->rxhead, data->rxtail, data->rxfree, 189 TSI_READ(TSI108_EC_RXSTAT), 190 TSI_READ(TSI108_EC_RXESTAT), 191 TSI_READ(TSI108_EC_RXERR), data->rxpending); 192 } 193 194 /* Synchronization is needed between the thread and up/down events. 195 * Note that the PHY is accessed through the same registers for both 196 * interfaces, so this can't be made interface-specific. 197 */ 198 199 static DEFINE_SPINLOCK(phy_lock); 200 201 static int tsi108_read_mii(struct tsi108_prv_data *data, int reg) 202 { 203 unsigned i; 204 205 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, 206 (data->phy << TSI108_MAC_MII_ADDR_PHY) | 207 (reg << TSI108_MAC_MII_ADDR_REG)); 208 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, 0); 209 TSI_WRITE_PHY(TSI108_MAC_MII_CMD, TSI108_MAC_MII_CMD_READ); 210 for (i = 0; i < 100; i++) { 211 if (!(TSI_READ_PHY(TSI108_MAC_MII_IND) & 212 (TSI108_MAC_MII_IND_NOTVALID | TSI108_MAC_MII_IND_BUSY))) 213 break; 214 udelay(10); 215 } 216 217 if (i == 100) 218 return 0xffff; 219 else 220 return (TSI_READ_PHY(TSI108_MAC_MII_DATAIN)); 221 } 222 223 static void tsi108_write_mii(struct tsi108_prv_data *data, 224 int reg, u16 val) 225 { 226 unsigned i = 100; 227 TSI_WRITE_PHY(TSI108_MAC_MII_ADDR, 228 (data->phy << TSI108_MAC_MII_ADDR_PHY) | 229 (reg << TSI108_MAC_MII_ADDR_REG)); 230 TSI_WRITE_PHY(TSI108_MAC_MII_DATAOUT, val); 231 while (i--) { 232 if(!(TSI_READ_PHY(TSI108_MAC_MII_IND) & 233 TSI108_MAC_MII_IND_BUSY)) 234 break; 235 udelay(10); 236 } 237 } 238 239 static int tsi108_mdio_read(struct net_device *dev, int addr, int reg) 240 { 241 struct tsi108_prv_data *data = netdev_priv(dev); 242 return tsi108_read_mii(data, reg); 243 } 244 245 static void tsi108_mdio_write(struct net_device *dev, int addr, int reg, int val) 246 { 247 struct tsi108_prv_data *data = netdev_priv(dev); 248 tsi108_write_mii(data, reg, val); 249 } 250 251 static inline void tsi108_write_tbi(struct tsi108_prv_data *data, 252 int reg, u16 val) 253 { 254 unsigned i = 1000; 255 TSI_WRITE(TSI108_MAC_MII_ADDR, 256 (0x1e << TSI108_MAC_MII_ADDR_PHY) 257 | (reg << TSI108_MAC_MII_ADDR_REG)); 258 TSI_WRITE(TSI108_MAC_MII_DATAOUT, val); 259 while(i--) { 260 if(!(TSI_READ(TSI108_MAC_MII_IND) & TSI108_MAC_MII_IND_BUSY)) 261 return; 262 udelay(10); 263 } 264 printk(KERN_ERR "%s function time out \n", __FUNCTION__); 265 } 266 267 static int mii_speed(struct mii_if_info *mii) 268 { 269 int advert, lpa, val, media; 270 int lpa2 = 0; 271 int speed; 272 273 if (!mii_link_ok(mii)) 274 return 0; 275 276 val = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_BMSR); 277 if ((val & BMSR_ANEGCOMPLETE) == 0) 278 return 0; 279 280 advert = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_ADVERTISE); 281 lpa = (*mii->mdio_read) (mii->dev, mii->phy_id, MII_LPA); 282 media = mii_nway_result(advert & lpa); 283 284 if (mii->supports_gmii) 285 lpa2 = mii->mdio_read(mii->dev, mii->phy_id, MII_STAT1000); 286 287 speed = lpa2 & (LPA_1000FULL | LPA_1000HALF) ? 1000 : 288 (media & (ADVERTISE_100FULL | ADVERTISE_100HALF) ? 100 : 10); 289 return speed; 290 } 291 292 static void tsi108_check_phy(struct net_device *dev) 293 { 294 struct tsi108_prv_data *data = netdev_priv(dev); 295 u32 mac_cfg2_reg, portctrl_reg; 296 u32 duplex; 297 u32 speed; 298 unsigned long flags; 299 300 /* Do a dummy read, as for some reason the first read 301 * after a link becomes up returns link down, even if 302 * it's been a while since the link came up. 303 */ 304 305 spin_lock_irqsave(&phy_lock, flags); 306 307 if (!data->phy_ok) 308 goto out; 309 310 tsi108_read_mii(data, MII_BMSR); 311 312 duplex = mii_check_media(&data->mii_if, netif_msg_link(data), data->init_media); 313 data->init_media = 0; 314 315 if (netif_carrier_ok(dev)) { 316 317 speed = mii_speed(&data->mii_if); 318 319 if ((speed != data->speed) || duplex) { 320 321 mac_cfg2_reg = TSI_READ(TSI108_MAC_CFG2); 322 portctrl_reg = TSI_READ(TSI108_EC_PORTCTRL); 323 324 mac_cfg2_reg &= ~TSI108_MAC_CFG2_IFACE_MASK; 325 326 if (speed == 1000) { 327 mac_cfg2_reg |= TSI108_MAC_CFG2_GIG; 328 portctrl_reg &= ~TSI108_EC_PORTCTRL_NOGIG; 329 } else { 330 mac_cfg2_reg |= TSI108_MAC_CFG2_NOGIG; 331 portctrl_reg |= TSI108_EC_PORTCTRL_NOGIG; 332 } 333 334 data->speed = speed; 335 336 if (data->mii_if.full_duplex) { 337 mac_cfg2_reg |= TSI108_MAC_CFG2_FULLDUPLEX; 338 portctrl_reg &= ~TSI108_EC_PORTCTRL_HALFDUPLEX; 339 data->duplex = 2; 340 } else { 341 mac_cfg2_reg &= ~TSI108_MAC_CFG2_FULLDUPLEX; 342 portctrl_reg |= TSI108_EC_PORTCTRL_HALFDUPLEX; 343 data->duplex = 1; 344 } 345 346 TSI_WRITE(TSI108_MAC_CFG2, mac_cfg2_reg); 347 TSI_WRITE(TSI108_EC_PORTCTRL, portctrl_reg); 348 349 if (data->link_up == 0) { 350 /* The manual says it can take 3-4 usecs for the speed change 351 * to take effect. 352 */ 353 udelay(5); 354 355 spin_lock(&data->txlock); 356 if (is_valid_ether_addr(dev->dev_addr) && data->txfree) 357 netif_wake_queue(dev); 358 359 data->link_up = 1; 360 spin_unlock(&data->txlock); 361 } 362 } 363 364 } else { 365 if (data->link_up == 1) { 366 netif_stop_queue(dev); 367 data->link_up = 0; 368 printk(KERN_NOTICE "%s : link is down\n", dev->name); 369 } 370 371 goto out; 372 } 373 374 375 out: 376 spin_unlock_irqrestore(&phy_lock, flags); 377 } 378 379 static inline void 380 tsi108_stat_carry_one(int carry, int carry_bit, int carry_shift, 381 unsigned long *upper) 382 { 383 if (carry & carry_bit) 384 *upper += carry_shift; 385 } 386 387 static void tsi108_stat_carry(struct net_device *dev) 388 { 389 struct tsi108_prv_data *data = netdev_priv(dev); 390 u32 carry1, carry2; 391 392 spin_lock_irq(&data->misclock); 393 394 carry1 = TSI_READ(TSI108_STAT_CARRY1); 395 carry2 = TSI_READ(TSI108_STAT_CARRY2); 396 397 TSI_WRITE(TSI108_STAT_CARRY1, carry1); 398 TSI_WRITE(TSI108_STAT_CARRY2, carry2); 399 400 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXBYTES, 401 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); 402 403 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXPKTS, 404 TSI108_STAT_RXPKTS_CARRY, 405 &data->stats.rx_packets); 406 407 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFCS, 408 TSI108_STAT_RXFCS_CARRY, &data->rx_fcs); 409 410 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXMCAST, 411 TSI108_STAT_RXMCAST_CARRY, 412 &data->stats.multicast); 413 414 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXALIGN, 415 TSI108_STAT_RXALIGN_CARRY, 416 &data->stats.rx_frame_errors); 417 418 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXLENGTH, 419 TSI108_STAT_RXLENGTH_CARRY, 420 &data->stats.rx_length_errors); 421 422 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXRUNT, 423 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); 424 425 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJUMBO, 426 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); 427 428 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXFRAG, 429 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); 430 431 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXJABBER, 432 TSI108_STAT_RXJABBER_CARRY, &data->rx_long_fcs); 433 434 tsi108_stat_carry_one(carry1, TSI108_STAT_CARRY1_RXDROP, 435 TSI108_STAT_RXDROP_CARRY, 436 &data->stats.rx_missed_errors); 437 438 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXBYTES, 439 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); 440 441 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPKTS, 442 TSI108_STAT_TXPKTS_CARRY, 443 &data->stats.tx_packets); 444 445 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXDEF, 446 TSI108_STAT_TXEXDEF_CARRY, 447 &data->stats.tx_aborted_errors); 448 449 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXEXCOL, 450 TSI108_STAT_TXEXCOL_CARRY, &data->tx_coll_abort); 451 452 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXTCOL, 453 TSI108_STAT_TXTCOL_CARRY, 454 &data->stats.collisions); 455 456 tsi108_stat_carry_one(carry2, TSI108_STAT_CARRY2_TXPAUSE, 457 TSI108_STAT_TXPAUSEDROP_CARRY, 458 &data->tx_pause_drop); 459 460 spin_unlock_irq(&data->misclock); 461 } 462 463 /* Read a stat counter atomically with respect to carries. 464 * data->misclock must be held. 465 */ 466 static inline unsigned long 467 tsi108_read_stat(struct tsi108_prv_data * data, int reg, int carry_bit, 468 int carry_shift, unsigned long *upper) 469 { 470 int carryreg; 471 unsigned long val; 472 473 if (reg < 0xb0) 474 carryreg = TSI108_STAT_CARRY1; 475 else 476 carryreg = TSI108_STAT_CARRY2; 477 478 again: 479 val = TSI_READ(reg) | *upper; 480 481 /* Check to see if it overflowed, but the interrupt hasn't 482 * been serviced yet. If so, handle the carry here, and 483 * try again. 484 */ 485 486 if (unlikely(TSI_READ(carryreg) & carry_bit)) { 487 *upper += carry_shift; 488 TSI_WRITE(carryreg, carry_bit); 489 goto again; 490 } 491 492 return val; 493 } 494 495 static struct net_device_stats *tsi108_get_stats(struct net_device *dev) 496 { 497 unsigned long excol; 498 499 struct tsi108_prv_data *data = netdev_priv(dev); 500 spin_lock_irq(&data->misclock); 501 502 data->tmpstats.rx_packets = 503 tsi108_read_stat(data, TSI108_STAT_RXPKTS, 504 TSI108_STAT_CARRY1_RXPKTS, 505 TSI108_STAT_RXPKTS_CARRY, &data->stats.rx_packets); 506 507 data->tmpstats.tx_packets = 508 tsi108_read_stat(data, TSI108_STAT_TXPKTS, 509 TSI108_STAT_CARRY2_TXPKTS, 510 TSI108_STAT_TXPKTS_CARRY, &data->stats.tx_packets); 511 512 data->tmpstats.rx_bytes = 513 tsi108_read_stat(data, TSI108_STAT_RXBYTES, 514 TSI108_STAT_CARRY1_RXBYTES, 515 TSI108_STAT_RXBYTES_CARRY, &data->stats.rx_bytes); 516 517 data->tmpstats.tx_bytes = 518 tsi108_read_stat(data, TSI108_STAT_TXBYTES, 519 TSI108_STAT_CARRY2_TXBYTES, 520 TSI108_STAT_TXBYTES_CARRY, &data->stats.tx_bytes); 521 522 data->tmpstats.multicast = 523 tsi108_read_stat(data, TSI108_STAT_RXMCAST, 524 TSI108_STAT_CARRY1_RXMCAST, 525 TSI108_STAT_RXMCAST_CARRY, &data->stats.multicast); 526 527 excol = tsi108_read_stat(data, TSI108_STAT_TXEXCOL, 528 TSI108_STAT_CARRY2_TXEXCOL, 529 TSI108_STAT_TXEXCOL_CARRY, 530 &data->tx_coll_abort); 531 532 data->tmpstats.collisions = 533 tsi108_read_stat(data, TSI108_STAT_TXTCOL, 534 TSI108_STAT_CARRY2_TXTCOL, 535 TSI108_STAT_TXTCOL_CARRY, &data->stats.collisions); 536 537 data->tmpstats.collisions += excol; 538 539 data->tmpstats.rx_length_errors = 540 tsi108_read_stat(data, TSI108_STAT_RXLENGTH, 541 TSI108_STAT_CARRY1_RXLENGTH, 542 TSI108_STAT_RXLENGTH_CARRY, 543 &data->stats.rx_length_errors); 544 545 data->tmpstats.rx_length_errors += 546 tsi108_read_stat(data, TSI108_STAT_RXRUNT, 547 TSI108_STAT_CARRY1_RXRUNT, 548 TSI108_STAT_RXRUNT_CARRY, &data->rx_underruns); 549 550 data->tmpstats.rx_length_errors += 551 tsi108_read_stat(data, TSI108_STAT_RXJUMBO, 552 TSI108_STAT_CARRY1_RXJUMBO, 553 TSI108_STAT_RXJUMBO_CARRY, &data->rx_overruns); 554 555 data->tmpstats.rx_frame_errors = 556 tsi108_read_stat(data, TSI108_STAT_RXALIGN, 557 TSI108_STAT_CARRY1_RXALIGN, 558 TSI108_STAT_RXALIGN_CARRY, 559 &data->stats.rx_frame_errors); 560 561 data->tmpstats.rx_frame_errors += 562 tsi108_read_stat(data, TSI108_STAT_RXFCS, 563 TSI108_STAT_CARRY1_RXFCS, TSI108_STAT_RXFCS_CARRY, 564 &data->rx_fcs); 565 566 data->tmpstats.rx_frame_errors += 567 tsi108_read_stat(data, TSI108_STAT_RXFRAG, 568 TSI108_STAT_CARRY1_RXFRAG, 569 TSI108_STAT_RXFRAG_CARRY, &data->rx_short_fcs); 570 571 data->tmpstats.rx_missed_errors = 572 tsi108_read_stat(data, TSI108_STAT_RXDROP, 573 TSI108_STAT_CARRY1_RXDROP, 574 TSI108_STAT_RXDROP_CARRY, 575 &data->stats.rx_missed_errors); 576 577 /* These three are maintained by software. */ 578 data->tmpstats.rx_fifo_errors = data->stats.rx_fifo_errors; 579 data->tmpstats.rx_crc_errors = data->stats.rx_crc_errors; 580 581 data->tmpstats.tx_aborted_errors = 582 tsi108_read_stat(data, TSI108_STAT_TXEXDEF, 583 TSI108_STAT_CARRY2_TXEXDEF, 584 TSI108_STAT_TXEXDEF_CARRY, 585 &data->stats.tx_aborted_errors); 586 587 data->tmpstats.tx_aborted_errors += 588 tsi108_read_stat(data, TSI108_STAT_TXPAUSEDROP, 589 TSI108_STAT_CARRY2_TXPAUSE, 590 TSI108_STAT_TXPAUSEDROP_CARRY, 591 &data->tx_pause_drop); 592 593 data->tmpstats.tx_aborted_errors += excol; 594 595 data->tmpstats.tx_errors = data->tmpstats.tx_aborted_errors; 596 data->tmpstats.rx_errors = data->tmpstats.rx_length_errors + 597 data->tmpstats.rx_crc_errors + 598 data->tmpstats.rx_frame_errors + 599 data->tmpstats.rx_fifo_errors + data->tmpstats.rx_missed_errors; 600 601 spin_unlock_irq(&data->misclock); 602 return &data->tmpstats; 603 } 604 605 static void tsi108_restart_rx(struct tsi108_prv_data * data, struct net_device *dev) 606 { 607 TSI_WRITE(TSI108_EC_RXQ_PTRHIGH, 608 TSI108_EC_RXQ_PTRHIGH_VALID); 609 610 TSI_WRITE(TSI108_EC_RXCTRL, TSI108_EC_RXCTRL_GO 611 | TSI108_EC_RXCTRL_QUEUE0); 612 } 613 614 static void tsi108_restart_tx(struct tsi108_prv_data * data) 615 { 616 TSI_WRITE(TSI108_EC_TXQ_PTRHIGH, 617 TSI108_EC_TXQ_PTRHIGH_VALID); 618 619 TSI_WRITE(TSI108_EC_TXCTRL, TSI108_EC_TXCTRL_IDLEINT | 620 TSI108_EC_TXCTRL_GO | TSI108_EC_TXCTRL_QUEUE0); 621 } 622 623 /* txlock must be held by caller, with IRQs disabled, and 624 * with permission to re-enable them when the lock is dropped. 625 */ 626 static void tsi108_complete_tx(struct net_device *dev) 627 { 628 struct tsi108_prv_data *data = netdev_priv(dev); 629 int tx; 630 struct sk_buff *skb; 631 int release = 0; 632 633 while (!data->txfree || data->txhead != data->txtail) { 634 tx = data->txtail; 635 636 if (data->txring[tx].misc & TSI108_TX_OWN) 637 break; 638 639 skb = data->txskbs[tx]; 640 641 if (!(data->txring[tx].misc & TSI108_TX_OK)) 642 printk("%s: bad tx packet, misc %x\n", 643 dev->name, data->txring[tx].misc); 644 645 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; 646 data->txfree++; 647 648 if (data->txring[tx].misc & TSI108_TX_EOF) { 649 dev_kfree_skb_any(skb); 650 release++; 651 } 652 } 653 654 if (release) { 655 if (is_valid_ether_addr(dev->dev_addr) && data->link_up) 656 netif_wake_queue(dev); 657 } 658 } 659 660 static int tsi108_send_packet(struct sk_buff * skb, struct net_device *dev) 661 { 662 struct tsi108_prv_data *data = netdev_priv(dev); 663 int frags = skb_shinfo(skb)->nr_frags + 1; 664 int i; 665 666 if (!data->phy_ok && net_ratelimit()) 667 printk(KERN_ERR "%s: Transmit while PHY is down!\n", dev->name); 668 669 if (!data->link_up) { 670 printk(KERN_ERR "%s: Transmit while link is down!\n", 671 dev->name); 672 netif_stop_queue(dev); 673 return NETDEV_TX_BUSY; 674 } 675 676 if (data->txfree < MAX_SKB_FRAGS + 1) { 677 netif_stop_queue(dev); 678 679 if (net_ratelimit()) 680 printk(KERN_ERR "%s: Transmit with full tx ring!\n", 681 dev->name); 682 return NETDEV_TX_BUSY; 683 } 684 685 if (data->txfree - frags < MAX_SKB_FRAGS + 1) { 686 netif_stop_queue(dev); 687 } 688 689 spin_lock_irq(&data->txlock); 690 691 for (i = 0; i < frags; i++) { 692 int misc = 0; 693 int tx = data->txhead; 694 695 /* This is done to mark every TSI108_TX_INT_FREQ tx buffers with 696 * the interrupt bit. TX descriptor-complete interrupts are 697 * enabled when the queue fills up, and masked when there is 698 * still free space. This way, when saturating the outbound 699 * link, the tx interrupts are kept to a reasonable level. 700 * When the queue is not full, reclamation of skbs still occurs 701 * as new packets are transmitted, or on a queue-empty 702 * interrupt. 703 */ 704 705 if ((tx % TSI108_TX_INT_FREQ == 0) && 706 ((TSI108_TXRING_LEN - data->txfree) >= TSI108_TX_INT_FREQ)) 707 misc = TSI108_TX_INT; 708 709 data->txskbs[tx] = skb; 710 711 if (i == 0) { 712 data->txring[tx].buf0 = dma_map_single(NULL, skb->data, 713 skb->len - skb->data_len, DMA_TO_DEVICE); 714 data->txring[tx].len = skb->len - skb->data_len; 715 misc |= TSI108_TX_SOF; 716 } else { 717 skb_frag_t *frag = &skb_shinfo(skb)->frags[i - 1]; 718 719 data->txring[tx].buf0 = 720 dma_map_page(NULL, frag->page, frag->page_offset, 721 frag->size, DMA_TO_DEVICE); 722 data->txring[tx].len = frag->size; 723 } 724 725 if (i == frags - 1) 726 misc |= TSI108_TX_EOF; 727 728 if (netif_msg_pktdata(data)) { 729 int i; 730 printk("%s: Tx Frame contents (%d)\n", dev->name, 731 skb->len); 732 for (i = 0; i < skb->len; i++) 733 printk(" %2.2x", skb->data[i]); 734 printk(".\n"); 735 } 736 data->txring[tx].misc = misc | TSI108_TX_OWN; 737 738 data->txhead = (data->txhead + 1) % TSI108_TXRING_LEN; 739 data->txfree--; 740 } 741 742 tsi108_complete_tx(dev); 743 744 /* This must be done after the check for completed tx descriptors, 745 * so that the tail pointer is correct. 746 */ 747 748 if (!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_QUEUE0)) 749 tsi108_restart_tx(data); 750 751 spin_unlock_irq(&data->txlock); 752 return NETDEV_TX_OK; 753 } 754 755 static int tsi108_complete_rx(struct net_device *dev, int budget) 756 { 757 struct tsi108_prv_data *data = netdev_priv(dev); 758 int done = 0; 759 760 while (data->rxfree && done != budget) { 761 int rx = data->rxtail; 762 struct sk_buff *skb; 763 764 if (data->rxring[rx].misc & TSI108_RX_OWN) 765 break; 766 767 skb = data->rxskbs[rx]; 768 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; 769 data->rxfree--; 770 done++; 771 772 if (data->rxring[rx].misc & TSI108_RX_BAD) { 773 spin_lock_irq(&data->misclock); 774 775 if (data->rxring[rx].misc & TSI108_RX_CRC) 776 data->stats.rx_crc_errors++; 777 if (data->rxring[rx].misc & TSI108_RX_OVER) 778 data->stats.rx_fifo_errors++; 779 780 spin_unlock_irq(&data->misclock); 781 782 dev_kfree_skb_any(skb); 783 continue; 784 } 785 if (netif_msg_pktdata(data)) { 786 int i; 787 printk("%s: Rx Frame contents (%d)\n", 788 dev->name, data->rxring[rx].len); 789 for (i = 0; i < data->rxring[rx].len; i++) 790 printk(" %2.2x", skb->data[i]); 791 printk(".\n"); 792 } 793 794 skb_put(skb, data->rxring[rx].len); 795 skb->protocol = eth_type_trans(skb, dev); 796 netif_receive_skb(skb); 797 dev->last_rx = jiffies; 798 } 799 800 return done; 801 } 802 803 static int tsi108_refill_rx(struct net_device *dev, int budget) 804 { 805 struct tsi108_prv_data *data = netdev_priv(dev); 806 int done = 0; 807 808 while (data->rxfree != TSI108_RXRING_LEN && done != budget) { 809 int rx = data->rxhead; 810 struct sk_buff *skb; 811 812 data->rxskbs[rx] = skb = dev_alloc_skb(TSI108_RXBUF_SIZE + 2); 813 if (!skb) 814 break; 815 816 skb_reserve(skb, 2); /* Align the data on a 4-byte boundary. */ 817 818 data->rxring[rx].buf0 = dma_map_single(NULL, skb->data, 819 TSI108_RX_SKB_SIZE, 820 DMA_FROM_DEVICE); 821 822 /* Sometimes the hardware sets blen to zero after packet 823 * reception, even though the manual says that it's only ever 824 * modified by the driver. 825 */ 826 827 data->rxring[rx].blen = TSI108_RX_SKB_SIZE; 828 data->rxring[rx].misc = TSI108_RX_OWN | TSI108_RX_INT; 829 830 data->rxhead = (data->rxhead + 1) % TSI108_RXRING_LEN; 831 data->rxfree++; 832 done++; 833 } 834 835 if (done != 0 && !(TSI_READ(TSI108_EC_RXSTAT) & 836 TSI108_EC_RXSTAT_QUEUE0)) 837 tsi108_restart_rx(data, dev); 838 839 return done; 840 } 841 842 static int tsi108_poll(struct napi_struct *napi, int budget) 843 { 844 struct tsi108_prv_data *data = container_of(napi, struct tsi108_prv_data, napi); 845 struct net_device *dev = data->dev; 846 u32 estat = TSI_READ(TSI108_EC_RXESTAT); 847 u32 intstat = TSI_READ(TSI108_EC_INTSTAT); 848 int num_received = 0, num_filled = 0; 849 850 intstat &= TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | 851 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | TSI108_INT_RXWAIT; 852 853 TSI_WRITE(TSI108_EC_RXESTAT, estat); 854 TSI_WRITE(TSI108_EC_INTSTAT, intstat); 855 856 if (data->rxpending || (estat & TSI108_EC_RXESTAT_Q0_DESCINT)) 857 num_received = tsi108_complete_rx(dev, budget); 858 859 /* This should normally fill no more slots than the number of 860 * packets received in tsi108_complete_rx(). The exception 861 * is when we previously ran out of memory for RX SKBs. In that 862 * case, it's helpful to obey the budget, not only so that the 863 * CPU isn't hogged, but so that memory (which may still be low) 864 * is not hogged by one device. 865 * 866 * A work unit is considered to be two SKBs to allow us to catch 867 * up when the ring has shrunk due to out-of-memory but we're 868 * still removing the full budget's worth of packets each time. 869 */ 870 871 if (data->rxfree < TSI108_RXRING_LEN) 872 num_filled = tsi108_refill_rx(dev, budget * 2); 873 874 if (intstat & TSI108_INT_RXERROR) { 875 u32 err = TSI_READ(TSI108_EC_RXERR); 876 TSI_WRITE(TSI108_EC_RXERR, err); 877 878 if (err) { 879 if (net_ratelimit()) 880 printk(KERN_DEBUG "%s: RX error %x\n", 881 dev->name, err); 882 883 if (!(TSI_READ(TSI108_EC_RXSTAT) & 884 TSI108_EC_RXSTAT_QUEUE0)) 885 tsi108_restart_rx(data, dev); 886 } 887 } 888 889 if (intstat & TSI108_INT_RXOVERRUN) { 890 spin_lock_irq(&data->misclock); 891 data->stats.rx_fifo_errors++; 892 spin_unlock_irq(&data->misclock); 893 } 894 895 if (num_received < budget) { 896 data->rxpending = 0; 897 netif_rx_complete(dev, napi); 898 899 TSI_WRITE(TSI108_EC_INTMASK, 900 TSI_READ(TSI108_EC_INTMASK) 901 & ~(TSI108_INT_RXQUEUE0 902 | TSI108_INT_RXTHRESH | 903 TSI108_INT_RXOVERRUN | 904 TSI108_INT_RXERROR | 905 TSI108_INT_RXWAIT)); 906 } else { 907 data->rxpending = 1; 908 } 909 910 return num_received; 911 } 912 913 static void tsi108_rx_int(struct net_device *dev) 914 { 915 struct tsi108_prv_data *data = netdev_priv(dev); 916 917 /* A race could cause dev to already be scheduled, so it's not an 918 * error if that happens (and interrupts shouldn't be re-masked, 919 * because that can cause harmful races, if poll has already 920 * unmasked them but not cleared LINK_STATE_SCHED). 921 * 922 * This can happen if this code races with tsi108_poll(), which masks 923 * the interrupts after tsi108_irq_one() read the mask, but before 924 * netif_rx_schedule is called. It could also happen due to calls 925 * from tsi108_check_rxring(). 926 */ 927 928 if (netif_rx_schedule_prep(dev, &data->napi)) { 929 /* Mask, rather than ack, the receive interrupts. The ack 930 * will happen in tsi108_poll(). 931 */ 932 933 TSI_WRITE(TSI108_EC_INTMASK, 934 TSI_READ(TSI108_EC_INTMASK) | 935 TSI108_INT_RXQUEUE0 936 | TSI108_INT_RXTHRESH | 937 TSI108_INT_RXOVERRUN | TSI108_INT_RXERROR | 938 TSI108_INT_RXWAIT); 939 __netif_rx_schedule(dev, &data->napi); 940 } else { 941 if (!netif_running(dev)) { 942 /* This can happen if an interrupt occurs while the 943 * interface is being brought down, as the START 944 * bit is cleared before the stop function is called. 945 * 946 * In this case, the interrupts must be masked, or 947 * they will continue indefinitely. 948 * 949 * There's a race here if the interface is brought down 950 * and then up in rapid succession, as the device could 951 * be made running after the above check and before 952 * the masking below. This will only happen if the IRQ 953 * thread has a lower priority than the task brining 954 * up the interface. Fixing this race would likely 955 * require changes in generic code. 956 */ 957 958 TSI_WRITE(TSI108_EC_INTMASK, 959 TSI_READ 960 (TSI108_EC_INTMASK) | 961 TSI108_INT_RXQUEUE0 | 962 TSI108_INT_RXTHRESH | 963 TSI108_INT_RXOVERRUN | 964 TSI108_INT_RXERROR | 965 TSI108_INT_RXWAIT); 966 } 967 } 968 } 969 970 /* If the RX ring has run out of memory, try periodically 971 * to allocate some more, as otherwise poll would never 972 * get called (apart from the initial end-of-queue condition). 973 * 974 * This is called once per second (by default) from the thread. 975 */ 976 977 static void tsi108_check_rxring(struct net_device *dev) 978 { 979 struct tsi108_prv_data *data = netdev_priv(dev); 980 981 /* A poll is scheduled, as opposed to caling tsi108_refill_rx 982 * directly, so as to keep the receive path single-threaded 983 * (and thus not needing a lock). 984 */ 985 986 if (netif_running(dev) && data->rxfree < TSI108_RXRING_LEN / 4) 987 tsi108_rx_int(dev); 988 } 989 990 static void tsi108_tx_int(struct net_device *dev) 991 { 992 struct tsi108_prv_data *data = netdev_priv(dev); 993 u32 estat = TSI_READ(TSI108_EC_TXESTAT); 994 995 TSI_WRITE(TSI108_EC_TXESTAT, estat); 996 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_TXQUEUE0 | 997 TSI108_INT_TXIDLE | TSI108_INT_TXERROR); 998 if (estat & TSI108_EC_TXESTAT_Q0_ERR) { 999 u32 err = TSI_READ(TSI108_EC_TXERR); 1000 TSI_WRITE(TSI108_EC_TXERR, err); 1001 1002 if (err && net_ratelimit()) 1003 printk(KERN_ERR "%s: TX error %x\n", dev->name, err); 1004 } 1005 1006 if (estat & (TSI108_EC_TXESTAT_Q0_DESCINT | TSI108_EC_TXESTAT_Q0_EOQ)) { 1007 spin_lock(&data->txlock); 1008 tsi108_complete_tx(dev); 1009 spin_unlock(&data->txlock); 1010 } 1011 } 1012 1013 1014 static irqreturn_t tsi108_irq(int irq, void *dev_id) 1015 { 1016 struct net_device *dev = dev_id; 1017 struct tsi108_prv_data *data = netdev_priv(dev); 1018 u32 stat = TSI_READ(TSI108_EC_INTSTAT); 1019 1020 if (!(stat & TSI108_INT_ANY)) 1021 return IRQ_NONE; /* Not our interrupt */ 1022 1023 stat &= ~TSI_READ(TSI108_EC_INTMASK); 1024 1025 if (stat & (TSI108_INT_TXQUEUE0 | TSI108_INT_TXIDLE | 1026 TSI108_INT_TXERROR)) 1027 tsi108_tx_int(dev); 1028 if (stat & (TSI108_INT_RXQUEUE0 | TSI108_INT_RXTHRESH | 1029 TSI108_INT_RXWAIT | TSI108_INT_RXOVERRUN | 1030 TSI108_INT_RXERROR)) 1031 tsi108_rx_int(dev); 1032 1033 if (stat & TSI108_INT_SFN) { 1034 if (net_ratelimit()) 1035 printk(KERN_DEBUG "%s: SFN error\n", dev->name); 1036 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_SFN); 1037 } 1038 1039 if (stat & TSI108_INT_STATCARRY) { 1040 tsi108_stat_carry(dev); 1041 TSI_WRITE(TSI108_EC_INTSTAT, TSI108_INT_STATCARRY); 1042 } 1043 1044 return IRQ_HANDLED; 1045 } 1046 1047 static void tsi108_stop_ethernet(struct net_device *dev) 1048 { 1049 struct tsi108_prv_data *data = netdev_priv(dev); 1050 int i = 1000; 1051 /* Disable all TX and RX queues ... */ 1052 TSI_WRITE(TSI108_EC_TXCTRL, 0); 1053 TSI_WRITE(TSI108_EC_RXCTRL, 0); 1054 1055 /* ...and wait for them to become idle */ 1056 while(i--) { 1057 if(!(TSI_READ(TSI108_EC_TXSTAT) & TSI108_EC_TXSTAT_ACTIVE)) 1058 break; 1059 udelay(10); 1060 } 1061 i = 1000; 1062 while(i--){ 1063 if(!(TSI_READ(TSI108_EC_RXSTAT) & TSI108_EC_RXSTAT_ACTIVE)) 1064 return; 1065 udelay(10); 1066 } 1067 printk(KERN_ERR "%s function time out \n", __FUNCTION__); 1068 } 1069 1070 static void tsi108_reset_ether(struct tsi108_prv_data * data) 1071 { 1072 TSI_WRITE(TSI108_MAC_CFG1, TSI108_MAC_CFG1_SOFTRST); 1073 udelay(100); 1074 TSI_WRITE(TSI108_MAC_CFG1, 0); 1075 1076 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATRST); 1077 udelay(100); 1078 TSI_WRITE(TSI108_EC_PORTCTRL, 1079 TSI_READ(TSI108_EC_PORTCTRL) & 1080 ~TSI108_EC_PORTCTRL_STATRST); 1081 1082 TSI_WRITE(TSI108_EC_TXCFG, TSI108_EC_TXCFG_RST); 1083 udelay(100); 1084 TSI_WRITE(TSI108_EC_TXCFG, 1085 TSI_READ(TSI108_EC_TXCFG) & 1086 ~TSI108_EC_TXCFG_RST); 1087 1088 TSI_WRITE(TSI108_EC_RXCFG, TSI108_EC_RXCFG_RST); 1089 udelay(100); 1090 TSI_WRITE(TSI108_EC_RXCFG, 1091 TSI_READ(TSI108_EC_RXCFG) & 1092 ~TSI108_EC_RXCFG_RST); 1093 1094 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, 1095 TSI_READ(TSI108_MAC_MII_MGMT_CFG) | 1096 TSI108_MAC_MII_MGMT_RST); 1097 udelay(100); 1098 TSI_WRITE(TSI108_MAC_MII_MGMT_CFG, 1099 (TSI_READ(TSI108_MAC_MII_MGMT_CFG) & 1100 ~(TSI108_MAC_MII_MGMT_RST | 1101 TSI108_MAC_MII_MGMT_CLK)) | 0x07); 1102 } 1103 1104 static int tsi108_get_mac(struct net_device *dev) 1105 { 1106 struct tsi108_prv_data *data = netdev_priv(dev); 1107 u32 word1 = TSI_READ(TSI108_MAC_ADDR1); 1108 u32 word2 = TSI_READ(TSI108_MAC_ADDR2); 1109 1110 /* Note that the octets are reversed from what the manual says, 1111 * producing an even weirder ordering... 1112 */ 1113 if (word2 == 0 && word1 == 0) { 1114 dev->dev_addr[0] = 0x00; 1115 dev->dev_addr[1] = 0x06; 1116 dev->dev_addr[2] = 0xd2; 1117 dev->dev_addr[3] = 0x00; 1118 dev->dev_addr[4] = 0x00; 1119 if (0x8 == data->phy) 1120 dev->dev_addr[5] = 0x01; 1121 else 1122 dev->dev_addr[5] = 0x02; 1123 1124 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); 1125 1126 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | 1127 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); 1128 1129 TSI_WRITE(TSI108_MAC_ADDR1, word1); 1130 TSI_WRITE(TSI108_MAC_ADDR2, word2); 1131 } else { 1132 dev->dev_addr[0] = (word2 >> 16) & 0xff; 1133 dev->dev_addr[1] = (word2 >> 24) & 0xff; 1134 dev->dev_addr[2] = (word1 >> 0) & 0xff; 1135 dev->dev_addr[3] = (word1 >> 8) & 0xff; 1136 dev->dev_addr[4] = (word1 >> 16) & 0xff; 1137 dev->dev_addr[5] = (word1 >> 24) & 0xff; 1138 } 1139 1140 if (!is_valid_ether_addr(dev->dev_addr)) { 1141 printk("KERN_ERR: word1: %08x, word2: %08x\n", word1, word2); 1142 return -EINVAL; 1143 } 1144 1145 return 0; 1146 } 1147 1148 static int tsi108_set_mac(struct net_device *dev, void *addr) 1149 { 1150 struct tsi108_prv_data *data = netdev_priv(dev); 1151 u32 word1, word2; 1152 int i; 1153 1154 if (!is_valid_ether_addr(addr)) 1155 return -EINVAL; 1156 1157 for (i = 0; i < 6; i++) 1158 /* +2 is for the offset of the HW addr type */ 1159 dev->dev_addr[i] = ((unsigned char *)addr)[i + 2]; 1160 1161 word2 = (dev->dev_addr[0] << 16) | (dev->dev_addr[1] << 24); 1162 1163 word1 = (dev->dev_addr[2] << 0) | (dev->dev_addr[3] << 8) | 1164 (dev->dev_addr[4] << 16) | (dev->dev_addr[5] << 24); 1165 1166 spin_lock_irq(&data->misclock); 1167 TSI_WRITE(TSI108_MAC_ADDR1, word1); 1168 TSI_WRITE(TSI108_MAC_ADDR2, word2); 1169 spin_lock(&data->txlock); 1170 1171 if (data->txfree && data->link_up) 1172 netif_wake_queue(dev); 1173 1174 spin_unlock(&data->txlock); 1175 spin_unlock_irq(&data->misclock); 1176 return 0; 1177 } 1178 1179 /* Protected by dev->xmit_lock. */ 1180 static void tsi108_set_rx_mode(struct net_device *dev) 1181 { 1182 struct tsi108_prv_data *data = netdev_priv(dev); 1183 u32 rxcfg = TSI_READ(TSI108_EC_RXCFG); 1184 1185 if (dev->flags & IFF_PROMISC) { 1186 rxcfg &= ~(TSI108_EC_RXCFG_UC_HASH | TSI108_EC_RXCFG_MC_HASH); 1187 rxcfg |= TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE; 1188 goto out; 1189 } 1190 1191 rxcfg &= ~(TSI108_EC_RXCFG_UFE | TSI108_EC_RXCFG_MFE); 1192 1193 if (dev->flags & IFF_ALLMULTI || dev->mc_count) { 1194 int i; 1195 struct dev_mc_list *mc = dev->mc_list; 1196 rxcfg |= TSI108_EC_RXCFG_MFE | TSI108_EC_RXCFG_MC_HASH; 1197 1198 memset(data->mc_hash, 0, sizeof(data->mc_hash)); 1199 1200 while (mc) { 1201 u32 hash, crc; 1202 1203 if (mc->dmi_addrlen == 6) { 1204 crc = ether_crc(6, mc->dmi_addr); 1205 hash = crc >> 23; 1206 1207 __set_bit(hash, &data->mc_hash[0]); 1208 } else { 1209 printk(KERN_ERR 1210 "%s: got multicast address of length %d " 1211 "instead of 6.\n", dev->name, 1212 mc->dmi_addrlen); 1213 } 1214 1215 mc = mc->next; 1216 } 1217 1218 TSI_WRITE(TSI108_EC_HASHADDR, 1219 TSI108_EC_HASHADDR_AUTOINC | 1220 TSI108_EC_HASHADDR_MCAST); 1221 1222 for (i = 0; i < 16; i++) { 1223 /* The manual says that the hardware may drop 1224 * back-to-back writes to the data register. 1225 */ 1226 udelay(1); 1227 TSI_WRITE(TSI108_EC_HASHDATA, 1228 data->mc_hash[i]); 1229 } 1230 } 1231 1232 out: 1233 TSI_WRITE(TSI108_EC_RXCFG, rxcfg); 1234 } 1235 1236 static void tsi108_init_phy(struct net_device *dev) 1237 { 1238 struct tsi108_prv_data *data = netdev_priv(dev); 1239 u32 i = 0; 1240 u16 phyval = 0; 1241 unsigned long flags; 1242 1243 spin_lock_irqsave(&phy_lock, flags); 1244 1245 tsi108_write_mii(data, MII_BMCR, BMCR_RESET); 1246 while (i--){ 1247 if(!(tsi108_read_mii(data, MII_BMCR) & BMCR_RESET)) 1248 break; 1249 udelay(10); 1250 } 1251 if (i == 0) 1252 printk(KERN_ERR "%s function time out \n", __FUNCTION__); 1253 1254 if (data->phy_type == TSI108_PHY_BCM54XX) { 1255 tsi108_write_mii(data, 0x09, 0x0300); 1256 tsi108_write_mii(data, 0x10, 0x1020); 1257 tsi108_write_mii(data, 0x1c, 0x8c00); 1258 } 1259 1260 tsi108_write_mii(data, 1261 MII_BMCR, 1262 BMCR_ANENABLE | BMCR_ANRESTART); 1263 while (tsi108_read_mii(data, MII_BMCR) & BMCR_ANRESTART) 1264 cpu_relax(); 1265 1266 /* Set G/MII mode and receive clock select in TBI control #2. The 1267 * second port won't work if this isn't done, even though we don't 1268 * use TBI mode. 1269 */ 1270 1271 tsi108_write_tbi(data, 0x11, 0x30); 1272 1273 /* FIXME: It seems to take more than 2 back-to-back reads to the 1274 * PHY_STAT register before the link up status bit is set. 1275 */ 1276 1277 data->link_up = 1; 1278 1279 while (!((phyval = tsi108_read_mii(data, MII_BMSR)) & 1280 BMSR_LSTATUS)) { 1281 if (i++ > (MII_READ_DELAY / 10)) { 1282 data->link_up = 0; 1283 break; 1284 } 1285 spin_unlock_irqrestore(&phy_lock, flags); 1286 msleep(10); 1287 spin_lock_irqsave(&phy_lock, flags); 1288 } 1289 1290 printk(KERN_DEBUG "PHY_STAT reg contains %08x\n", phyval); 1291 data->phy_ok = 1; 1292 data->init_media = 1; 1293 spin_unlock_irqrestore(&phy_lock, flags); 1294 } 1295 1296 static void tsi108_kill_phy(struct net_device *dev) 1297 { 1298 struct tsi108_prv_data *data = netdev_priv(dev); 1299 unsigned long flags; 1300 1301 spin_lock_irqsave(&phy_lock, flags); 1302 tsi108_write_mii(data, MII_BMCR, BMCR_PDOWN); 1303 data->phy_ok = 0; 1304 spin_unlock_irqrestore(&phy_lock, flags); 1305 } 1306 1307 static int tsi108_open(struct net_device *dev) 1308 { 1309 int i; 1310 struct tsi108_prv_data *data = netdev_priv(dev); 1311 unsigned int rxring_size = TSI108_RXRING_LEN * sizeof(rx_desc); 1312 unsigned int txring_size = TSI108_TXRING_LEN * sizeof(tx_desc); 1313 1314 i = request_irq(data->irq_num, tsi108_irq, 0, dev->name, dev); 1315 if (i != 0) { 1316 printk(KERN_ERR "tsi108_eth%d: Could not allocate IRQ%d.\n", 1317 data->id, data->irq_num); 1318 return i; 1319 } else { 1320 dev->irq = data->irq_num; 1321 printk(KERN_NOTICE 1322 "tsi108_open : Port %d Assigned IRQ %d to %s\n", 1323 data->id, dev->irq, dev->name); 1324 } 1325 1326 data->rxring = dma_alloc_coherent(NULL, rxring_size, 1327 &data->rxdma, GFP_KERNEL); 1328 1329 if (!data->rxring) { 1330 printk(KERN_DEBUG 1331 "TSI108_ETH: failed to allocate memory for rxring!\n"); 1332 return -ENOMEM; 1333 } else { 1334 memset(data->rxring, 0, rxring_size); 1335 } 1336 1337 data->txring = dma_alloc_coherent(NULL, txring_size, 1338 &data->txdma, GFP_KERNEL); 1339 1340 if (!data->txring) { 1341 printk(KERN_DEBUG 1342 "TSI108_ETH: failed to allocate memory for txring!\n"); 1343 pci_free_consistent(0, rxring_size, data->rxring, data->rxdma); 1344 return -ENOMEM; 1345 } else { 1346 memset(data->txring, 0, txring_size); 1347 } 1348 1349 for (i = 0; i < TSI108_RXRING_LEN; i++) { 1350 data->rxring[i].next0 = data->rxdma + (i + 1) * sizeof(rx_desc); 1351 data->rxring[i].blen = TSI108_RXBUF_SIZE; 1352 data->rxring[i].vlan = 0; 1353 } 1354 1355 data->rxring[TSI108_RXRING_LEN - 1].next0 = data->rxdma; 1356 1357 data->rxtail = 0; 1358 data->rxhead = 0; 1359 1360 for (i = 0; i < TSI108_RXRING_LEN; i++) { 1361 struct sk_buff *skb = dev_alloc_skb(TSI108_RXBUF_SIZE + NET_IP_ALIGN); 1362 1363 if (!skb) { 1364 /* Bah. No memory for now, but maybe we'll get 1365 * some more later. 1366 * For now, we'll live with the smaller ring. 1367 */ 1368 printk(KERN_WARNING 1369 "%s: Could only allocate %d receive skb(s).\n", 1370 dev->name, i); 1371 data->rxhead = i; 1372 break; 1373 } 1374 1375 data->rxskbs[i] = skb; 1376 /* Align the payload on a 4-byte boundary */ 1377 skb_reserve(skb, 2); 1378 data->rxskbs[i] = skb; 1379 data->rxring[i].buf0 = virt_to_phys(data->rxskbs[i]->data); 1380 data->rxring[i].misc = TSI108_RX_OWN | TSI108_RX_INT; 1381 } 1382 1383 data->rxfree = i; 1384 TSI_WRITE(TSI108_EC_RXQ_PTRLOW, data->rxdma); 1385 1386 for (i = 0; i < TSI108_TXRING_LEN; i++) { 1387 data->txring[i].next0 = data->txdma + (i + 1) * sizeof(tx_desc); 1388 data->txring[i].misc = 0; 1389 } 1390 1391 data->txring[TSI108_TXRING_LEN - 1].next0 = data->txdma; 1392 data->txtail = 0; 1393 data->txhead = 0; 1394 data->txfree = TSI108_TXRING_LEN; 1395 TSI_WRITE(TSI108_EC_TXQ_PTRLOW, data->txdma); 1396 tsi108_init_phy(dev); 1397 1398 napi_enable(&data->napi); 1399 1400 setup_timer(&data->timer, tsi108_timed_checker, (unsigned long)dev); 1401 mod_timer(&data->timer, jiffies + 1); 1402 1403 tsi108_restart_rx(data, dev); 1404 1405 TSI_WRITE(TSI108_EC_INTSTAT, ~0); 1406 1407 TSI_WRITE(TSI108_EC_INTMASK, 1408 ~(TSI108_INT_TXQUEUE0 | TSI108_INT_RXERROR | 1409 TSI108_INT_RXTHRESH | TSI108_INT_RXQUEUE0 | 1410 TSI108_INT_RXOVERRUN | TSI108_INT_RXWAIT | 1411 TSI108_INT_SFN | TSI108_INT_STATCARRY)); 1412 1413 TSI_WRITE(TSI108_MAC_CFG1, 1414 TSI108_MAC_CFG1_RXEN | TSI108_MAC_CFG1_TXEN); 1415 netif_start_queue(dev); 1416 return 0; 1417 } 1418 1419 static int tsi108_close(struct net_device *dev) 1420 { 1421 struct tsi108_prv_data *data = netdev_priv(dev); 1422 1423 netif_stop_queue(dev); 1424 napi_disable(&data->napi); 1425 1426 del_timer_sync(&data->timer); 1427 1428 tsi108_stop_ethernet(dev); 1429 tsi108_kill_phy(dev); 1430 TSI_WRITE(TSI108_EC_INTMASK, ~0); 1431 TSI_WRITE(TSI108_MAC_CFG1, 0); 1432 1433 /* Check for any pending TX packets, and drop them. */ 1434 1435 while (!data->txfree || data->txhead != data->txtail) { 1436 int tx = data->txtail; 1437 struct sk_buff *skb; 1438 skb = data->txskbs[tx]; 1439 data->txtail = (data->txtail + 1) % TSI108_TXRING_LEN; 1440 data->txfree++; 1441 dev_kfree_skb(skb); 1442 } 1443 1444 synchronize_irq(data->irq_num); 1445 free_irq(data->irq_num, dev); 1446 1447 /* Discard the RX ring. */ 1448 1449 while (data->rxfree) { 1450 int rx = data->rxtail; 1451 struct sk_buff *skb; 1452 1453 skb = data->rxskbs[rx]; 1454 data->rxtail = (data->rxtail + 1) % TSI108_RXRING_LEN; 1455 data->rxfree--; 1456 dev_kfree_skb(skb); 1457 } 1458 1459 dma_free_coherent(0, 1460 TSI108_RXRING_LEN * sizeof(rx_desc), 1461 data->rxring, data->rxdma); 1462 dma_free_coherent(0, 1463 TSI108_TXRING_LEN * sizeof(tx_desc), 1464 data->txring, data->txdma); 1465 1466 return 0; 1467 } 1468 1469 static void tsi108_init_mac(struct net_device *dev) 1470 { 1471 struct tsi108_prv_data *data = netdev_priv(dev); 1472 1473 TSI_WRITE(TSI108_MAC_CFG2, TSI108_MAC_CFG2_DFLT_PREAMBLE | 1474 TSI108_MAC_CFG2_PADCRC); 1475 1476 TSI_WRITE(TSI108_EC_TXTHRESH, 1477 (192 << TSI108_EC_TXTHRESH_STARTFILL) | 1478 (192 << TSI108_EC_TXTHRESH_STOPFILL)); 1479 1480 TSI_WRITE(TSI108_STAT_CARRYMASK1, 1481 ~(TSI108_STAT_CARRY1_RXBYTES | 1482 TSI108_STAT_CARRY1_RXPKTS | 1483 TSI108_STAT_CARRY1_RXFCS | 1484 TSI108_STAT_CARRY1_RXMCAST | 1485 TSI108_STAT_CARRY1_RXALIGN | 1486 TSI108_STAT_CARRY1_RXLENGTH | 1487 TSI108_STAT_CARRY1_RXRUNT | 1488 TSI108_STAT_CARRY1_RXJUMBO | 1489 TSI108_STAT_CARRY1_RXFRAG | 1490 TSI108_STAT_CARRY1_RXJABBER | 1491 TSI108_STAT_CARRY1_RXDROP)); 1492 1493 TSI_WRITE(TSI108_STAT_CARRYMASK2, 1494 ~(TSI108_STAT_CARRY2_TXBYTES | 1495 TSI108_STAT_CARRY2_TXPKTS | 1496 TSI108_STAT_CARRY2_TXEXDEF | 1497 TSI108_STAT_CARRY2_TXEXCOL | 1498 TSI108_STAT_CARRY2_TXTCOL | 1499 TSI108_STAT_CARRY2_TXPAUSE)); 1500 1501 TSI_WRITE(TSI108_EC_PORTCTRL, TSI108_EC_PORTCTRL_STATEN); 1502 TSI_WRITE(TSI108_MAC_CFG1, 0); 1503 1504 TSI_WRITE(TSI108_EC_RXCFG, 1505 TSI108_EC_RXCFG_SE | TSI108_EC_RXCFG_BFE); 1506 1507 TSI_WRITE(TSI108_EC_TXQ_CFG, TSI108_EC_TXQ_CFG_DESC_INT | 1508 TSI108_EC_TXQ_CFG_EOQ_OWN_INT | 1509 TSI108_EC_TXQ_CFG_WSWP | (TSI108_PBM_PORT << 1510 TSI108_EC_TXQ_CFG_SFNPORT)); 1511 1512 TSI_WRITE(TSI108_EC_RXQ_CFG, TSI108_EC_RXQ_CFG_DESC_INT | 1513 TSI108_EC_RXQ_CFG_EOQ_OWN_INT | 1514 TSI108_EC_RXQ_CFG_WSWP | (TSI108_PBM_PORT << 1515 TSI108_EC_RXQ_CFG_SFNPORT)); 1516 1517 TSI_WRITE(TSI108_EC_TXQ_BUFCFG, 1518 TSI108_EC_TXQ_BUFCFG_BURST256 | 1519 TSI108_EC_TXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << 1520 TSI108_EC_TXQ_BUFCFG_SFNPORT)); 1521 1522 TSI_WRITE(TSI108_EC_RXQ_BUFCFG, 1523 TSI108_EC_RXQ_BUFCFG_BURST256 | 1524 TSI108_EC_RXQ_BUFCFG_BSWP | (TSI108_PBM_PORT << 1525 TSI108_EC_RXQ_BUFCFG_SFNPORT)); 1526 1527 TSI_WRITE(TSI108_EC_INTMASK, ~0); 1528 } 1529 1530 static int tsi108_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) 1531 { 1532 struct tsi108_prv_data *data = netdev_priv(dev); 1533 return generic_mii_ioctl(&data->mii_if, if_mii(rq), cmd, NULL); 1534 } 1535 1536 static int 1537 tsi108_init_one(struct platform_device *pdev) 1538 { 1539 struct net_device *dev = NULL; 1540 struct tsi108_prv_data *data = NULL; 1541 hw_info *einfo; 1542 int err = 0; 1543 DECLARE_MAC_BUF(mac); 1544 1545 einfo = pdev->dev.platform_data; 1546 1547 if (NULL == einfo) { 1548 printk(KERN_ERR "tsi-eth %d: Missing additional data!\n", 1549 pdev->id); 1550 return -ENODEV; 1551 } 1552 1553 /* Create an ethernet device instance */ 1554 1555 dev = alloc_etherdev(sizeof(struct tsi108_prv_data)); 1556 if (!dev) { 1557 printk("tsi108_eth: Could not allocate a device structure\n"); 1558 return -ENOMEM; 1559 } 1560 1561 printk("tsi108_eth%d: probe...\n", pdev->id); 1562 data = netdev_priv(dev); 1563 data->dev = dev; 1564 1565 pr_debug("tsi108_eth%d:regs:phyresgs:phy:irq_num=0x%x:0x%x:0x%x:0x%x\n", 1566 pdev->id, einfo->regs, einfo->phyregs, 1567 einfo->phy, einfo->irq_num); 1568 1569 data->regs = ioremap(einfo->regs, 0x400); 1570 if (NULL == data->regs) { 1571 err = -ENOMEM; 1572 goto regs_fail; 1573 } 1574 1575 data->phyregs = ioremap(einfo->phyregs, 0x400); 1576 if (NULL == data->phyregs) { 1577 err = -ENOMEM; 1578 goto regs_fail; 1579 } 1580 /* MII setup */ 1581 data->mii_if.dev = dev; 1582 data->mii_if.mdio_read = tsi108_mdio_read; 1583 data->mii_if.mdio_write = tsi108_mdio_write; 1584 data->mii_if.phy_id = einfo->phy; 1585 data->mii_if.phy_id_mask = 0x1f; 1586 data->mii_if.reg_num_mask = 0x1f; 1587 data->mii_if.supports_gmii = mii_check_gmii_support(&data->mii_if); 1588 1589 data->phy = einfo->phy; 1590 data->phy_type = einfo->phy_type; 1591 data->irq_num = einfo->irq_num; 1592 data->id = pdev->id; 1593 dev->open = tsi108_open; 1594 dev->stop = tsi108_close; 1595 dev->hard_start_xmit = tsi108_send_packet; 1596 dev->set_mac_address = tsi108_set_mac; 1597 dev->set_multicast_list = tsi108_set_rx_mode; 1598 dev->get_stats = tsi108_get_stats; 1599 netif_napi_add(dev, &data->napi, tsi108_poll, 64); 1600 dev->do_ioctl = tsi108_do_ioctl; 1601 1602 /* Apparently, the Linux networking code won't use scatter-gather 1603 * if the hardware doesn't do checksums. However, it's faster 1604 * to checksum in place and use SG, as (among other reasons) 1605 * the cache won't be dirtied (which then has to be flushed 1606 * before DMA). The checksumming is done by the driver (via 1607 * a new function skb_csum_dev() in net/core/skbuff.c). 1608 */ 1609 1610 dev->features = NETIF_F_HIGHDMA; 1611 1612 spin_lock_init(&data->txlock); 1613 spin_lock_init(&data->misclock); 1614 1615 tsi108_reset_ether(data); 1616 tsi108_kill_phy(dev); 1617 1618 if ((err = tsi108_get_mac(dev)) != 0) { 1619 printk(KERN_ERR "%s: Invalid MAC address. Please correct.\n", 1620 dev->name); 1621 goto register_fail; 1622 } 1623 1624 tsi108_init_mac(dev); 1625 err = register_netdev(dev); 1626 if (err) { 1627 printk(KERN_ERR "%s: Cannot register net device, aborting.\n", 1628 dev->name); 1629 goto register_fail; 1630 } 1631 1632 printk(KERN_INFO "%s: Tsi108 Gigabit Ethernet, MAC: %s\n", 1633 dev->name, print_mac(mac, dev->dev_addr)); 1634 #ifdef DEBUG 1635 data->msg_enable = DEBUG; 1636 dump_eth_one(dev); 1637 #endif 1638 1639 return 0; 1640 1641 register_fail: 1642 iounmap(data->regs); 1643 iounmap(data->phyregs); 1644 1645 regs_fail: 1646 free_netdev(dev); 1647 return err; 1648 } 1649 1650 /* There's no way to either get interrupts from the PHY when 1651 * something changes, or to have the Tsi108 automatically communicate 1652 * with the PHY to reconfigure itself. 1653 * 1654 * Thus, we have to do it using a timer. 1655 */ 1656 1657 static void tsi108_timed_checker(unsigned long dev_ptr) 1658 { 1659 struct net_device *dev = (struct net_device *)dev_ptr; 1660 struct tsi108_prv_data *data = netdev_priv(dev); 1661 1662 tsi108_check_phy(dev); 1663 tsi108_check_rxring(dev); 1664 mod_timer(&data->timer, jiffies + CHECK_PHY_INTERVAL); 1665 } 1666 1667 static int tsi108_ether_init(void) 1668 { 1669 int ret; 1670 ret = platform_driver_register (&tsi_eth_driver); 1671 if (ret < 0){ 1672 printk("tsi108_ether_init: error initializing ethernet " 1673 "device\n"); 1674 return ret; 1675 } 1676 return 0; 1677 } 1678 1679 static int tsi108_ether_remove(struct platform_device *pdev) 1680 { 1681 struct net_device *dev = platform_get_drvdata(pdev); 1682 struct tsi108_prv_data *priv = netdev_priv(dev); 1683 1684 unregister_netdev(dev); 1685 tsi108_stop_ethernet(dev); 1686 platform_set_drvdata(pdev, NULL); 1687 iounmap(priv->regs); 1688 iounmap(priv->phyregs); 1689 free_netdev(dev); 1690 1691 return 0; 1692 } 1693 static void tsi108_ether_exit(void) 1694 { 1695 platform_driver_unregister(&tsi_eth_driver); 1696 } 1697 1698 module_init(tsi108_ether_init); 1699 module_exit(tsi108_ether_exit); 1700 1701 MODULE_AUTHOR("Tundra Semiconductor Corporation"); 1702 MODULE_DESCRIPTION("Tsi108 Gigabit Ethernet driver"); 1703 MODULE_LICENSE("GPL"); 1704
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