Version:  2.0.40 2.2.26 2.4.37 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6

Linux/drivers/net/irda/ali-ircc.c

  1 /*********************************************************************
  2  *                
  3  * Filename:      ali-ircc.h
  4  * Version:       0.5
  5  * Description:   Driver for the ALI M1535D and M1543C FIR Controller
  6  * Status:        Experimental.
  7  * Author:        Benjamin Kong <benjamin_kong@ali.com.tw>
  8  * Created at:    2000/10/16 03:46PM
  9  * Modified at:   2001/1/3 02:55PM
 10  * Modified by:   Benjamin Kong <benjamin_kong@ali.com.tw>
 11  * Modified at:   2003/11/6 and support for ALi south-bridge chipsets M1563
 12  * Modified by:   Clear Zhang <clear_zhang@ali.com.tw>
 13  * 
 14  *     Copyright (c) 2000 Benjamin Kong <benjamin_kong@ali.com.tw>
 15  *     All Rights Reserved
 16  *      
 17  *     This program is free software; you can redistribute it and/or 
 18  *     modify it under the terms of the GNU General Public License as 
 19  *     published by the Free Software Foundation; either version 2 of 
 20  *     the License, or (at your option) any later version.
 21  *  
 22  ********************************************************************/
 23 
 24 #include <linux/module.h>
 25 #include <linux/gfp.h>
 26 
 27 #include <linux/kernel.h>
 28 #include <linux/types.h>
 29 #include <linux/skbuff.h>
 30 #include <linux/netdevice.h>
 31 #include <linux/ioport.h>
 32 #include <linux/delay.h>
 33 #include <linux/init.h>
 34 #include <linux/interrupt.h>
 35 #include <linux/rtnetlink.h>
 36 #include <linux/serial_reg.h>
 37 #include <linux/dma-mapping.h>
 38 #include <linux/platform_device.h>
 39 
 40 #include <asm/io.h>
 41 #include <asm/dma.h>
 42 #include <asm/byteorder.h>
 43 
 44 #include <net/irda/wrapper.h>
 45 #include <net/irda/irda.h>
 46 #include <net/irda/irda_device.h>
 47 
 48 #include "ali-ircc.h"
 49 
 50 #define CHIP_IO_EXTENT 8
 51 #define BROKEN_DONGLE_ID
 52 
 53 #define ALI_IRCC_DRIVER_NAME "ali-ircc"
 54 
 55 /* Power Management */
 56 static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state);
 57 static int ali_ircc_resume(struct platform_device *dev);
 58 
 59 static struct platform_driver ali_ircc_driver = {
 60         .suspend        = ali_ircc_suspend,
 61         .resume         = ali_ircc_resume,
 62         .driver         = {
 63                 .name   = ALI_IRCC_DRIVER_NAME,
 64         },
 65 };
 66 
 67 /* Module parameters */
 68 static int qos_mtt_bits = 0x07;  /* 1 ms or more */
 69 
 70 /* Use BIOS settions by default, but user may supply module parameters */
 71 static unsigned int io[]  = { ~0, ~0, ~0, ~0 };
 72 static unsigned int irq[] = { 0, 0, 0, 0 };
 73 static unsigned int dma[] = { 0, 0, 0, 0 };
 74 
 75 static int  ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info);
 76 static int  ali_ircc_init_43(ali_chip_t *chip, chipio_t *info);
 77 static int  ali_ircc_init_53(ali_chip_t *chip, chipio_t *info);
 78 
 79 /* These are the currently known ALi south-bridge chipsets, the only one difference
 80  * is that M1543C doesn't support HP HDSL-3600
 81  */
 82 static ali_chip_t chips[] =
 83 {
 84         { "M1543", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x43, ali_ircc_probe_53, ali_ircc_init_43 },
 85         { "M1535", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x53, ali_ircc_probe_53, ali_ircc_init_53 },
 86         { "M1563", { 0x3f0, 0x370 }, 0x51, 0x23, 0x20, 0x63, ali_ircc_probe_53, ali_ircc_init_53 },
 87         { NULL }
 88 };
 89 
 90 /* Max 4 instances for now */
 91 static struct ali_ircc_cb *dev_self[] = { NULL, NULL, NULL, NULL };
 92 
 93 /* Dongle Types */
 94 static char *dongle_types[] = {
 95         "TFDS6000",
 96         "HP HSDL-3600",
 97         "HP HSDL-1100", 
 98         "No dongle connected",
 99 };
100 
101 /* Some prototypes */
102 static int  ali_ircc_open(int i, chipio_t *info);
103 
104 static int  ali_ircc_close(struct ali_ircc_cb *self);
105 
106 static int  ali_ircc_setup(chipio_t *info);
107 static int  ali_ircc_is_receiving(struct ali_ircc_cb *self);
108 static int  ali_ircc_net_open(struct net_device *dev);
109 static int  ali_ircc_net_close(struct net_device *dev);
110 static int  ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd);
111 static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud);
112 
113 /* SIR function */
114 static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb,
115                                                 struct net_device *dev);
116 static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self);
117 static void ali_ircc_sir_receive(struct ali_ircc_cb *self);
118 static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self);
119 static int  ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len);
120 static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed);
121 
122 /* FIR function */
123 static netdev_tx_t  ali_ircc_fir_hard_xmit(struct sk_buff *skb,
124                                                  struct net_device *dev);
125 static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 speed);
126 static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self);
127 static int  ali_ircc_dma_receive(struct ali_ircc_cb *self); 
128 static int  ali_ircc_dma_receive_complete(struct ali_ircc_cb *self);
129 static int  ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self);
130 static void ali_ircc_dma_xmit(struct ali_ircc_cb *self);
131 
132 /* My Function */
133 static int  ali_ircc_read_dongle_id (int i, chipio_t *info);
134 static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed);
135 
136 /* ALi chip function */
137 static void SIR2FIR(int iobase);
138 static void FIR2SIR(int iobase);
139 static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable);
140 
141 /*
142  * Function ali_ircc_init ()
143  *
144  *    Initialize chip. Find out whay kinds of chips we are dealing with
145  *    and their configuration registers address
146  */
147 static int __init ali_ircc_init(void)
148 {
149         ali_chip_t *chip;
150         chipio_t info;
151         int ret;
152         int cfg, cfg_base;
153         int reg, revision;
154         int i = 0;
155         
156         ret = platform_driver_register(&ali_ircc_driver);
157         if (ret) {
158                 net_err_ratelimited("%s, Can't register driver!\n",
159                                     ALI_IRCC_DRIVER_NAME);
160                 return ret;
161         }
162 
163         ret = -ENODEV;
164         
165         /* Probe for all the ALi chipsets we know about */
166         for (chip= chips; chip->name; chip++, i++) 
167         {
168                 pr_debug("%s(), Probing for %s ...\n", __func__, chip->name);
169                                 
170                 /* Try all config registers for this chip */
171                 for (cfg=0; cfg<2; cfg++)
172                 {
173                         cfg_base = chip->cfg[cfg];
174                         if (!cfg_base)
175                                 continue;
176                                 
177                         memset(&info, 0, sizeof(chipio_t));
178                         info.cfg_base = cfg_base;
179                         info.fir_base = io[i];
180                         info.dma = dma[i];
181                         info.irq = irq[i];
182                         
183                         
184                         /* Enter Configuration */
185                         outb(chip->entr1, cfg_base);
186                         outb(chip->entr2, cfg_base);
187                         
188                         /* Select Logical Device 5 Registers (UART2) */
189                         outb(0x07, cfg_base);
190                         outb(0x05, cfg_base+1);
191                         
192                         /* Read Chip Identification Register */
193                         outb(chip->cid_index, cfg_base);        
194                         reg = inb(cfg_base+1);  
195                                 
196                         if (reg == chip->cid_value)
197                         {
198                                 pr_debug("%s(), Chip found at 0x%03x\n",
199                                          __func__, cfg_base);
200                                            
201                                 outb(0x1F, cfg_base);
202                                 revision = inb(cfg_base+1);
203                                 pr_debug("%s(), Found %s chip, revision=%d\n",
204                                          __func__, chip->name, revision);
205                                 
206                                 /* 
207                                  * If the user supplies the base address, then
208                                  * we init the chip, if not we probe the values
209                                  * set by the BIOS
210                                  */                             
211                                 if (io[i] < 2000)
212                                 {
213                                         chip->init(chip, &info);
214                                 }
215                                 else
216                                 {
217                                         chip->probe(chip, &info);       
218                                 }
219                                 
220                                 if (ali_ircc_open(i, &info) == 0)
221                                         ret = 0;
222                                 i++;                            
223                         }
224                         else
225                         {
226                                 pr_debug("%s(), No %s chip at 0x%03x\n",
227                                          __func__, chip->name, cfg_base);
228                         }
229                         /* Exit configuration */
230                         outb(0xbb, cfg_base);
231                 }
232         }               
233                 
234         if (ret)
235                 platform_driver_unregister(&ali_ircc_driver);
236 
237         return ret;
238 }
239 
240 /*
241  * Function ali_ircc_cleanup ()
242  *
243  *    Close all configured chips
244  *
245  */
246 static void __exit ali_ircc_cleanup(void)
247 {
248         int i;
249 
250         for (i=0; i < ARRAY_SIZE(dev_self); i++) {
251                 if (dev_self[i])
252                         ali_ircc_close(dev_self[i]);
253         }
254         
255         platform_driver_unregister(&ali_ircc_driver);
256 
257 }
258 
259 static const struct net_device_ops ali_ircc_sir_ops = {
260         .ndo_open       = ali_ircc_net_open,
261         .ndo_stop       = ali_ircc_net_close,
262         .ndo_start_xmit = ali_ircc_sir_hard_xmit,
263         .ndo_do_ioctl   = ali_ircc_net_ioctl,
264 };
265 
266 static const struct net_device_ops ali_ircc_fir_ops = {
267         .ndo_open       = ali_ircc_net_open,
268         .ndo_stop       = ali_ircc_net_close,
269         .ndo_start_xmit = ali_ircc_fir_hard_xmit,
270         .ndo_do_ioctl   = ali_ircc_net_ioctl,
271 };
272 
273 /*
274  * Function ali_ircc_open (int i, chipio_t *inf)
275  *
276  *    Open driver instance
277  *
278  */
279 static int ali_ircc_open(int i, chipio_t *info)
280 {
281         struct net_device *dev;
282         struct ali_ircc_cb *self;
283         int dongle_id;
284         int err;
285                         
286         if (i >= ARRAY_SIZE(dev_self)) {
287                 net_err_ratelimited("%s(), maximum number of supported chips reached!\n",
288                                     __func__);
289                 return -ENOMEM;
290         }
291         
292         /* Set FIR FIFO and DMA Threshold */
293         if ((ali_ircc_setup(info)) == -1)
294                 return -1;
295                 
296         dev = alloc_irdadev(sizeof(*self));
297         if (dev == NULL) {
298                 net_err_ratelimited("%s(), can't allocate memory for control block!\n",
299                                     __func__);
300                 return -ENOMEM;
301         }
302 
303         self = netdev_priv(dev);
304         self->netdev = dev;
305         spin_lock_init(&self->lock);
306    
307         /* Need to store self somewhere */
308         dev_self[i] = self;
309         self->index = i;
310 
311         /* Initialize IO */
312         self->io.cfg_base  = info->cfg_base;    /* In ali_ircc_probe_53 assign          */
313         self->io.fir_base  = info->fir_base;    /* info->sir_base = info->fir_base      */
314         self->io.sir_base  = info->sir_base;    /* ALi SIR and FIR use the same address */
315         self->io.irq       = info->irq;
316         self->io.fir_ext   = CHIP_IO_EXTENT;
317         self->io.dma       = info->dma;
318         self->io.fifo_size = 16;                /* SIR: 16, FIR: 32 Benjamin 2000/11/1 */
319         
320         /* Reserve the ioports that we need */
321         if (!request_region(self->io.fir_base, self->io.fir_ext,
322                             ALI_IRCC_DRIVER_NAME)) {
323                 net_warn_ratelimited("%s(), can't get iobase of 0x%03x\n",
324                                      __func__, self->io.fir_base);
325                 err = -ENODEV;
326                 goto err_out1;
327         }
328 
329         /* Initialize QoS for this device */
330         irda_init_max_qos_capabilies(&self->qos);
331         
332         /* The only value we must override it the baudrate */
333         self->qos.baud_rate.bits = IR_9600|IR_19200|IR_38400|IR_57600|
334                 IR_115200|IR_576000|IR_1152000|(IR_4000000 << 8); // benjamin 2000/11/8 05:27PM
335                         
336         self->qos.min_turn_time.bits = qos_mtt_bits;
337                         
338         irda_qos_bits_to_value(&self->qos);
339         
340         /* Max DMA buffer size needed = (data_size + 6) * (window_size) + 6; */
341         self->rx_buff.truesize = 14384; 
342         self->tx_buff.truesize = 14384;
343 
344         /* Allocate memory if needed */
345         self->rx_buff.head =
346                 dma_zalloc_coherent(NULL, self->rx_buff.truesize,
347                                     &self->rx_buff_dma, GFP_KERNEL);
348         if (self->rx_buff.head == NULL) {
349                 err = -ENOMEM;
350                 goto err_out2;
351         }
352         
353         self->tx_buff.head =
354                 dma_zalloc_coherent(NULL, self->tx_buff.truesize,
355                                     &self->tx_buff_dma, GFP_KERNEL);
356         if (self->tx_buff.head == NULL) {
357                 err = -ENOMEM;
358                 goto err_out3;
359         }
360 
361         self->rx_buff.in_frame = FALSE;
362         self->rx_buff.state = OUTSIDE_FRAME;
363         self->tx_buff.data = self->tx_buff.head;
364         self->rx_buff.data = self->rx_buff.head;
365         
366         /* Reset Tx queue info */
367         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
368         self->tx_fifo.tail = self->tx_buff.head;
369 
370         /* Override the network functions we need to use */
371         dev->netdev_ops = &ali_ircc_sir_ops;
372 
373         err = register_netdev(dev);
374         if (err) {
375                 net_err_ratelimited("%s(), register_netdev() failed!\n",
376                                     __func__);
377                 goto err_out4;
378         }
379         net_info_ratelimited("IrDA: Registered device %s\n", dev->name);
380 
381         /* Check dongle id */
382         dongle_id = ali_ircc_read_dongle_id(i, info);
383         net_info_ratelimited("%s(), %s, Found dongle: %s\n",
384                              __func__, ALI_IRCC_DRIVER_NAME,
385                              dongle_types[dongle_id]);
386                 
387         self->io.dongle_id = dongle_id;
388 
389         
390         return 0;
391 
392  err_out4:
393         dma_free_coherent(NULL, self->tx_buff.truesize,
394                           self->tx_buff.head, self->tx_buff_dma);
395  err_out3:
396         dma_free_coherent(NULL, self->rx_buff.truesize,
397                           self->rx_buff.head, self->rx_buff_dma);
398  err_out2:
399         release_region(self->io.fir_base, self->io.fir_ext);
400  err_out1:
401         dev_self[i] = NULL;
402         free_netdev(dev);
403         return err;
404 }
405 
406 
407 /*
408  * Function ali_ircc_close (self)
409  *
410  *    Close driver instance
411  *
412  */
413 static int __exit ali_ircc_close(struct ali_ircc_cb *self)
414 {
415         int iobase;
416 
417         IRDA_ASSERT(self != NULL, return -1;);
418 
419         iobase = self->io.fir_base;
420 
421         /* Remove netdevice */
422         unregister_netdev(self->netdev);
423 
424         /* Release the PORT that this driver is using */
425         pr_debug("%s(), Releasing Region %03x\n", __func__, self->io.fir_base);
426         release_region(self->io.fir_base, self->io.fir_ext);
427 
428         if (self->tx_buff.head)
429                 dma_free_coherent(NULL, self->tx_buff.truesize,
430                                   self->tx_buff.head, self->tx_buff_dma);
431         
432         if (self->rx_buff.head)
433                 dma_free_coherent(NULL, self->rx_buff.truesize,
434                                   self->rx_buff.head, self->rx_buff_dma);
435 
436         dev_self[self->index] = NULL;
437         free_netdev(self->netdev);
438         
439         
440         return 0;
441 }
442 
443 /*
444  * Function ali_ircc_init_43 (chip, info)
445  *
446  *    Initialize the ALi M1543 chip. 
447  */
448 static int ali_ircc_init_43(ali_chip_t *chip, chipio_t *info) 
449 {
450         /* All controller information like I/O address, DMA channel, IRQ
451          * are set by BIOS
452          */
453         
454         return 0;
455 }
456 
457 /*
458  * Function ali_ircc_init_53 (chip, info)
459  *
460  *    Initialize the ALi M1535 chip. 
461  */
462 static int ali_ircc_init_53(ali_chip_t *chip, chipio_t *info) 
463 {
464         /* All controller information like I/O address, DMA channel, IRQ
465          * are set by BIOS
466          */
467         
468         return 0;
469 }
470 
471 /*
472  * Function ali_ircc_probe_53 (chip, info)
473  *      
474  *      Probes for the ALi M1535D or M1535
475  */
476 static int ali_ircc_probe_53(ali_chip_t *chip, chipio_t *info)
477 {
478         int cfg_base = info->cfg_base;
479         int hi, low, reg;
480         
481         
482         /* Enter Configuration */
483         outb(chip->entr1, cfg_base);
484         outb(chip->entr2, cfg_base);
485         
486         /* Select Logical Device 5 Registers (UART2) */
487         outb(0x07, cfg_base);
488         outb(0x05, cfg_base+1);
489         
490         /* Read address control register */
491         outb(0x60, cfg_base);
492         hi = inb(cfg_base+1);   
493         outb(0x61, cfg_base);
494         low = inb(cfg_base+1);
495         info->fir_base = (hi<<8) + low;
496         
497         info->sir_base = info->fir_base;
498         
499         pr_debug("%s(), probing fir_base=0x%03x\n", __func__, info->fir_base);
500                 
501         /* Read IRQ control register */
502         outb(0x70, cfg_base);
503         reg = inb(cfg_base+1);
504         info->irq = reg & 0x0f;
505         pr_debug("%s(), probing irq=%d\n", __func__, info->irq);
506         
507         /* Read DMA channel */
508         outb(0x74, cfg_base);
509         reg = inb(cfg_base+1);
510         info->dma = reg & 0x07;
511         
512         if(info->dma == 0x04)
513                 net_warn_ratelimited("%s(), No DMA channel assigned !\n",
514                                      __func__);
515         else
516                 pr_debug("%s(), probing dma=%d\n", __func__, info->dma);
517         
518         /* Read Enabled Status */
519         outb(0x30, cfg_base);
520         reg = inb(cfg_base+1);
521         info->enabled = (reg & 0x80) && (reg & 0x01);
522         pr_debug("%s(), probing enabled=%d\n", __func__, info->enabled);
523         
524         /* Read Power Status */
525         outb(0x22, cfg_base);
526         reg = inb(cfg_base+1);
527         info->suspended = (reg & 0x20);
528         pr_debug("%s(), probing suspended=%d\n", __func__, info->suspended);
529         
530         /* Exit configuration */
531         outb(0xbb, cfg_base);
532                 
533         
534         return 0;       
535 }
536 
537 /*
538  * Function ali_ircc_setup (info)
539  *
540  *      Set FIR FIFO and DMA Threshold
541  *      Returns non-negative on success.
542  *
543  */
544 static int ali_ircc_setup(chipio_t *info)
545 {
546         unsigned char tmp;
547         int version;
548         int iobase = info->fir_base;
549         
550         
551         /* Locking comments :
552          * Most operations here need to be protected. We are called before
553          * the device instance is created in ali_ircc_open(), therefore 
554          * nobody can bother us - Jean II */
555 
556         /* Switch to FIR space */
557         SIR2FIR(iobase);
558         
559         /* Master Reset */
560         outb(0x40, iobase+FIR_MCR); // benjamin 2000/11/30 11:45AM
561         
562         /* Read FIR ID Version Register */
563         switch_bank(iobase, BANK3);
564         version = inb(iobase+FIR_ID_VR);
565         
566         /* Should be 0x00 in the M1535/M1535D */
567         if(version != 0x00)
568         {
569                 net_err_ratelimited("%s, Wrong chip version %02x\n",
570                                     ALI_IRCC_DRIVER_NAME, version);
571                 return -1;
572         }
573         
574         /* Set FIR FIFO Threshold Register */
575         switch_bank(iobase, BANK1);
576         outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR);
577         
578         /* Set FIR DMA Threshold Register */
579         outb(RX_DMA_Threshold, iobase+FIR_DMA_TR);
580         
581         /* CRC enable */
582         switch_bank(iobase, BANK2);
583         outb(inb(iobase+FIR_IRDA_CR) | IRDA_CR_CRC, iobase+FIR_IRDA_CR);
584         
585         /* NDIS driver set TX Length here BANK2 Alias 3, Alias4*/
586         
587         /* Switch to Bank 0 */
588         switch_bank(iobase, BANK0);
589         
590         tmp = inb(iobase+FIR_LCR_B);
591         tmp &=~0x20; // disable SIP
592         tmp |= 0x80; // these two steps make RX mode
593         tmp &= 0xbf;    
594         outb(tmp, iobase+FIR_LCR_B);
595                 
596         /* Disable Interrupt */
597         outb(0x00, iobase+FIR_IER);
598         
599         
600         /* Switch to SIR space */
601         FIR2SIR(iobase);
602         
603         net_info_ratelimited("%s, driver loaded (Benjamin Kong)\n",
604                              ALI_IRCC_DRIVER_NAME);
605         
606         /* Enable receive interrupts */ 
607         // outb(UART_IER_RDI, iobase+UART_IER); //benjamin 2000/11/23 01:25PM
608         // Turn on the interrupts in ali_ircc_net_open
609         
610         
611         return 0;
612 }
613 
614 /*
615  * Function ali_ircc_read_dongle_id (int index, info)
616  *
617  * Try to read dongle identification. This procedure needs to be executed
618  * once after power-on/reset. It also needs to be used whenever you suspect
619  * that the user may have plugged/unplugged the IrDA Dongle.
620  */
621 static int ali_ircc_read_dongle_id (int i, chipio_t *info)
622 {
623         int dongle_id, reg;
624         int cfg_base = info->cfg_base;
625         
626                 
627         /* Enter Configuration */
628         outb(chips[i].entr1, cfg_base);
629         outb(chips[i].entr2, cfg_base);
630         
631         /* Select Logical Device 5 Registers (UART2) */
632         outb(0x07, cfg_base);
633         outb(0x05, cfg_base+1);
634         
635         /* Read Dongle ID */
636         outb(0xf0, cfg_base);
637         reg = inb(cfg_base+1);  
638         dongle_id = ((reg>>6)&0x02) | ((reg>>5)&0x01);
639         pr_debug("%s(), probing dongle_id=%d, dongle_types=%s\n",
640                  __func__, dongle_id, dongle_types[dongle_id]);
641         
642         /* Exit configuration */
643         outb(0xbb, cfg_base);
644                         
645         
646         return dongle_id;
647 }
648 
649 /*
650  * Function ali_ircc_interrupt (irq, dev_id, regs)
651  *
652  *    An interrupt from the chip has arrived. Time to do some work
653  *
654  */
655 static irqreturn_t ali_ircc_interrupt(int irq, void *dev_id)
656 {
657         struct net_device *dev = dev_id;
658         struct ali_ircc_cb *self;
659         int ret;
660                 
661                 
662         self = netdev_priv(dev);
663         
664         spin_lock(&self->lock);
665         
666         /* Dispatch interrupt handler for the current speed */
667         if (self->io.speed > 115200)
668                 ret = ali_ircc_fir_interrupt(self);
669         else
670                 ret = ali_ircc_sir_interrupt(self);
671                 
672         spin_unlock(&self->lock);
673         
674         return ret;
675 }
676 /*
677  * Function ali_ircc_fir_interrupt(irq, struct ali_ircc_cb *self)
678  *
679  *    Handle MIR/FIR interrupt
680  *
681  */
682 static irqreturn_t ali_ircc_fir_interrupt(struct ali_ircc_cb *self)
683 {
684         __u8 eir, OldMessageCount;
685         int iobase, tmp;
686         
687         
688         iobase = self->io.fir_base;
689         
690         switch_bank(iobase, BANK0);     
691         self->InterruptID = inb(iobase+FIR_IIR);                
692         self->BusStatus = inb(iobase+FIR_BSR);  
693         
694         OldMessageCount = (self->LineStatus + 1) & 0x07;
695         self->LineStatus = inb(iobase+FIR_LSR); 
696         //self->ier = inb(iobase+FIR_IER);              2000/12/1 04:32PM
697         eir = self->InterruptID & self->ier; /* Mask out the interesting ones */ 
698         
699         pr_debug("%s(), self->InterruptID = %x\n", __func__, self->InterruptID);
700         pr_debug("%s(), self->LineStatus = %x\n", __func__, self->LineStatus);
701         pr_debug("%s(), self->ier = %x\n", __func__, self->ier);
702         pr_debug("%s(), eir = %x\n", __func__, eir);
703         
704         /* Disable interrupts */
705          SetCOMInterrupts(self, FALSE);
706         
707         /* Tx or Rx Interrupt */
708         
709         if (eir & IIR_EOM) 
710         {               
711                 if (self->io.direction == IO_XMIT) /* TX */
712                 {
713                         pr_debug("%s(), ******* IIR_EOM (Tx) *******\n",
714                                  __func__);
715                         
716                         if(ali_ircc_dma_xmit_complete(self))
717                         {
718                                 if (irda_device_txqueue_empty(self->netdev)) 
719                                 {
720                                         /* Prepare for receive */
721                                         ali_ircc_dma_receive(self);                                     
722                                         self->ier = IER_EOM;                                                                    
723                                 }
724                         }
725                         else
726                         {
727                                 self->ier = IER_EOM;                                    
728                         }
729                                                                         
730                 }       
731                 else /* RX */
732                 {
733                         pr_debug("%s(), ******* IIR_EOM (Rx) *******\n",
734                                  __func__);
735                         
736                         if(OldMessageCount > ((self->LineStatus+1) & 0x07))
737                         {
738                                 self->rcvFramesOverflow = TRUE; 
739                                 pr_debug("%s(), ******* self->rcvFramesOverflow = TRUE ********\n",
740                                          __func__);
741                         }
742                                                 
743                         if (ali_ircc_dma_receive_complete(self))
744                         {
745                                 pr_debug("%s(), ******* receive complete ********\n",
746                                          __func__);
747                                 
748                                 self->ier = IER_EOM;                            
749                         }
750                         else
751                         {
752                                 pr_debug("%s(), ******* Not receive complete ********\n",
753                                          __func__);
754                                 
755                                 self->ier = IER_EOM | IER_TIMER;                                                                
756                         }       
757                 
758                 }               
759         }
760         /* Timer Interrupt */
761         else if (eir & IIR_TIMER)
762         {       
763                 if(OldMessageCount > ((self->LineStatus+1) & 0x07))
764                 {
765                         self->rcvFramesOverflow = TRUE; 
766                         pr_debug("%s(), ******* self->rcvFramesOverflow = TRUE *******\n",
767                                  __func__);
768                 }
769                 /* Disable Timer */
770                 switch_bank(iobase, BANK1);
771                 tmp = inb(iobase+FIR_CR);
772                 outb( tmp& ~CR_TIMER_EN, iobase+FIR_CR);
773                 
774                 /* Check if this is a Tx timer interrupt */
775                 if (self->io.direction == IO_XMIT)
776                 {
777                         ali_ircc_dma_xmit(self);
778                         
779                         /* Interrupt on EOM */
780                         self->ier = IER_EOM;
781                                                                         
782                 }
783                 else /* Rx */
784                 {
785                         if(ali_ircc_dma_receive_complete(self)) 
786                         {
787                                 self->ier = IER_EOM;
788                         }
789                         else
790                         {
791                                 self->ier = IER_EOM | IER_TIMER;
792                         }       
793                 }               
794         }
795         
796         /* Restore Interrupt */ 
797         SetCOMInterrupts(self, TRUE);   
798                 
799         return IRQ_RETVAL(eir);
800 }
801 
802 /*
803  * Function ali_ircc_sir_interrupt (irq, self, eir)
804  *
805  *    Handle SIR interrupt
806  *
807  */
808 static irqreturn_t ali_ircc_sir_interrupt(struct ali_ircc_cb *self)
809 {
810         int iobase;
811         int iir, lsr;
812         
813         
814         iobase = self->io.sir_base;
815 
816         iir = inb(iobase+UART_IIR) & UART_IIR_ID;
817         if (iir) {      
818                 /* Clear interrupt */
819                 lsr = inb(iobase+UART_LSR);
820 
821                 pr_debug("%s(), iir=%02x, lsr=%02x, iobase=%#x\n",
822                          __func__, iir, lsr, iobase);
823 
824                 switch (iir) 
825                 {
826                         case UART_IIR_RLSI:
827                                 pr_debug("%s(), RLSI\n", __func__);
828                                 break;
829                         case UART_IIR_RDI:
830                                 /* Receive interrupt */
831                                 ali_ircc_sir_receive(self);
832                                 break;
833                         case UART_IIR_THRI:
834                                 if (lsr & UART_LSR_THRE)
835                                 {
836                                         /* Transmitter ready for data */
837                                         ali_ircc_sir_write_wakeup(self);                                
838                                 }                               
839                                 break;
840                         default:
841                                 pr_debug("%s(), unhandled IIR=%#x\n",
842                                          __func__, iir);
843                                 break;
844                 } 
845                 
846         }
847         
848         
849         return IRQ_RETVAL(iir);
850 }
851 
852 
853 /*
854  * Function ali_ircc_sir_receive (self)
855  *
856  *    Receive one frame from the infrared port
857  *
858  */
859 static void ali_ircc_sir_receive(struct ali_ircc_cb *self) 
860 {
861         int boguscount = 0;
862         int iobase;
863         
864         IRDA_ASSERT(self != NULL, return;);
865 
866         iobase = self->io.sir_base;
867 
868         /*  
869          * Receive all characters in Rx FIFO, unwrap and unstuff them. 
870          * async_unwrap_char will deliver all found frames  
871          */
872         do {
873                 async_unwrap_char(self->netdev, &self->netdev->stats, &self->rx_buff,
874                                   inb(iobase+UART_RX));
875 
876                 /* Make sure we don't stay here too long */
877                 if (boguscount++ > 32) {
878                         pr_debug("%s(), breaking!\n", __func__);
879                         break;
880                 }
881         } while (inb(iobase+UART_LSR) & UART_LSR_DR);   
882         
883 }
884 
885 /*
886  * Function ali_ircc_sir_write_wakeup (tty)
887  *
888  *    Called by the driver when there's room for more data.  If we have
889  *    more packets to send, we send them here.
890  *
891  */
892 static void ali_ircc_sir_write_wakeup(struct ali_ircc_cb *self)
893 {
894         int actual = 0;
895         int iobase;     
896 
897         IRDA_ASSERT(self != NULL, return;);
898 
899         
900         iobase = self->io.sir_base;
901 
902         /* Finished with frame?  */
903         if (self->tx_buff.len > 0)  
904         {
905                 /* Write data left in transmit buffer */
906                 actual = ali_ircc_sir_write(iobase, self->io.fifo_size, 
907                                       self->tx_buff.data, self->tx_buff.len);
908                 self->tx_buff.data += actual;
909                 self->tx_buff.len  -= actual;
910         } 
911         else 
912         {
913                 if (self->new_speed) 
914                 {
915                         /* We must wait until all data are gone */
916                         while(!(inb(iobase+UART_LSR) & UART_LSR_TEMT))
917                                 pr_debug("%s(), UART_LSR_THRE\n", __func__);
918                         
919                         pr_debug("%s(), Changing speed! self->new_speed = %d\n",
920                                  __func__, self->new_speed);
921                         ali_ircc_change_speed(self, self->new_speed);
922                         self->new_speed = 0;                    
923                         
924                         // benjamin 2000/11/10 06:32PM
925                         if (self->io.speed > 115200)
926                         {
927                                 pr_debug("%s(), ali_ircc_change_speed from UART_LSR_TEMT\n",
928                                          __func__);
929                                         
930                                 self->ier = IER_EOM;
931                                 // SetCOMInterrupts(self, TRUE);                                                        
932                                 return;                                                 
933                         }
934                 }
935                 else
936                 {
937                         netif_wake_queue(self->netdev); 
938                 }
939                         
940                 self->netdev->stats.tx_packets++;
941                 
942                 /* Turn on receive interrupts */
943                 outb(UART_IER_RDI, iobase+UART_IER);
944         }
945                 
946 }
947 
948 static void ali_ircc_change_speed(struct ali_ircc_cb *self, __u32 baud)
949 {
950         struct net_device *dev = self->netdev;
951         int iobase;
952         
953         
954         pr_debug("%s(), setting speed = %d\n", __func__, baud);
955         
956         /* This function *must* be called with irq off and spin-lock.
957          * - Jean II */
958 
959         iobase = self->io.fir_base;
960         
961         SetCOMInterrupts(self, FALSE); // 2000/11/24 11:43AM
962         
963         /* Go to MIR, FIR Speed */
964         if (baud > 115200)
965         {
966                 
967                                         
968                 ali_ircc_fir_change_speed(self, baud);                  
969                 
970                 /* Install FIR xmit handler*/
971                 dev->netdev_ops = &ali_ircc_fir_ops;
972                                 
973                 /* Enable Interuupt */
974                 self->ier = IER_EOM; // benjamin 2000/11/20 07:24PM                                     
975                                 
976                 /* Be ready for incoming frames */
977                 ali_ircc_dma_receive(self);     // benajmin 2000/11/8 07:46PM not complete
978         }       
979         /* Go to SIR Speed */
980         else
981         {
982                 ali_ircc_sir_change_speed(self, baud);
983                                 
984                 /* Install SIR xmit handler*/
985                 dev->netdev_ops = &ali_ircc_sir_ops;
986         }
987         
988                 
989         SetCOMInterrupts(self, TRUE);   // 2000/11/24 11:43AM
990                 
991         netif_wake_queue(self->netdev); 
992         
993 }
994 
995 static void ali_ircc_fir_change_speed(struct ali_ircc_cb *priv, __u32 baud)
996 {
997                 
998         int iobase; 
999         struct ali_ircc_cb *self = priv;
1000         struct net_device *dev;
1001 
1002                 
1003         IRDA_ASSERT(self != NULL, return;);
1004 
1005         dev = self->netdev;
1006         iobase = self->io.fir_base;
1007         
1008         pr_debug("%s(), self->io.speed = %d, change to speed = %d\n",
1009                  __func__, self->io.speed, baud);
1010         
1011         /* Come from SIR speed */
1012         if(self->io.speed <=115200)
1013         {
1014                 SIR2FIR(iobase);
1015         }
1016                 
1017         /* Update accounting for new speed */
1018         self->io.speed = baud;
1019                 
1020         // Set Dongle Speed mode
1021         ali_ircc_change_dongle_speed(self, baud);
1022                 
1023 }
1024 
1025 /*
1026  * Function ali_sir_change_speed (self, speed)
1027  *
1028  *    Set speed of IrDA port to specified baudrate
1029  *
1030  */
1031 static void ali_ircc_sir_change_speed(struct ali_ircc_cb *priv, __u32 speed)
1032 {
1033         struct ali_ircc_cb *self = priv;
1034         int iobase; 
1035         int fcr;    /* FIFO control reg */
1036         int lcr;    /* Line control reg */
1037         int divisor;
1038 
1039         
1040         pr_debug("%s(), Setting speed to: %d\n", __func__, speed);
1041 
1042         IRDA_ASSERT(self != NULL, return;);
1043 
1044         iobase = self->io.sir_base;
1045         
1046         /* Come from MIR or FIR speed */
1047         if(self->io.speed >115200)
1048         {       
1049                 // Set Dongle Speed mode first
1050                 ali_ircc_change_dongle_speed(self, speed);
1051                         
1052                 FIR2SIR(iobase);
1053         }
1054                 
1055         // Clear Line and Auxiluary status registers 2000/11/24 11:47AM
1056                 
1057         inb(iobase+UART_LSR);
1058         inb(iobase+UART_SCR);
1059                 
1060         /* Update accounting for new speed */
1061         self->io.speed = speed;
1062 
1063         divisor = 115200/speed;
1064         
1065         fcr = UART_FCR_ENABLE_FIFO;
1066 
1067         /* 
1068          * Use trigger level 1 to avoid 3 ms. timeout delay at 9600 bps, and
1069          * almost 1,7 ms at 19200 bps. At speeds above that we can just forget
1070          * about this timeout since it will always be fast enough. 
1071          */
1072         if (self->io.speed < 38400)
1073                 fcr |= UART_FCR_TRIGGER_1;
1074         else 
1075                 fcr |= UART_FCR_TRIGGER_14;
1076         
1077         /* IrDA ports use 8N1 */
1078         lcr = UART_LCR_WLEN8;
1079         
1080         outb(UART_LCR_DLAB | lcr, iobase+UART_LCR); /* Set DLAB */
1081         outb(divisor & 0xff,      iobase+UART_DLL); /* Set speed */
1082         outb(divisor >> 8,        iobase+UART_DLM);
1083         outb(lcr,                 iobase+UART_LCR); /* Set 8N1  */
1084         outb(fcr,                 iobase+UART_FCR); /* Enable FIFO's */
1085 
1086         /* without this, the connection will be broken after come back from FIR speed,
1087            but with this, the SIR connection is harder to established */
1088         outb((UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2), iobase+UART_MCR);
1089 }
1090 
1091 static void ali_ircc_change_dongle_speed(struct ali_ircc_cb *priv, int speed)
1092 {
1093         
1094         struct ali_ircc_cb *self = priv;
1095         int iobase,dongle_id;
1096         int tmp = 0;
1097                         
1098         
1099         iobase = self->io.fir_base;     /* or iobase = self->io.sir_base; */
1100         dongle_id = self->io.dongle_id;
1101         
1102         /* We are already locked, no need to do it again */
1103                 
1104         pr_debug("%s(), Set Speed for %s , Speed = %d\n",
1105                  __func__, dongle_types[dongle_id], speed);
1106         
1107         switch_bank(iobase, BANK2);
1108         tmp = inb(iobase+FIR_IRDA_CR);
1109                 
1110         /* IBM type dongle */
1111         if(dongle_id == 0)
1112         {                               
1113                 if(speed == 4000000)
1114                 {
1115                         //            __ __     
1116                         // SD/MODE __|     |__ __
1117                         //               __ __ 
1118                         // IRTX    __ __|     |__
1119                         //         T1 T2 T3 T4 T5
1120                         
1121                         tmp &=  ~IRDA_CR_HDLC;          // HDLC=0
1122                         tmp |= IRDA_CR_CRC;             // CRC=1
1123                         
1124                         switch_bank(iobase, BANK2);
1125                         outb(tmp, iobase+FIR_IRDA_CR);
1126                         
1127                         // T1 -> SD/MODE:0 IRTX:0
1128                         tmp &= ~0x09;
1129                         tmp |= 0x02;
1130                         outb(tmp, iobase+FIR_IRDA_CR);
1131                         udelay(2);
1132                         
1133                         // T2 -> SD/MODE:1 IRTX:0
1134                         tmp &= ~0x01;
1135                         tmp |= 0x0a;
1136                         outb(tmp, iobase+FIR_IRDA_CR);
1137                         udelay(2);
1138                         
1139                         // T3 -> SD/MODE:1 IRTX:1
1140                         tmp |= 0x0b;
1141                         outb(tmp, iobase+FIR_IRDA_CR);
1142                         udelay(2);
1143                         
1144                         // T4 -> SD/MODE:0 IRTX:1
1145                         tmp &= ~0x08;
1146                         tmp |= 0x03;
1147                         outb(tmp, iobase+FIR_IRDA_CR);
1148                         udelay(2);
1149                         
1150                         // T5 -> SD/MODE:0 IRTX:0
1151                         tmp &= ~0x09;
1152                         tmp |= 0x02;
1153                         outb(tmp, iobase+FIR_IRDA_CR);
1154                         udelay(2);
1155                         
1156                         // reset -> Normal TX output Signal
1157                         outb(tmp & ~0x02, iobase+FIR_IRDA_CR);                          
1158                 }
1159                 else /* speed <=1152000 */
1160                 {       
1161                         //            __        
1162                         // SD/MODE __|  |__
1163                         //
1164                         // IRTX    ________
1165                         //         T1 T2 T3  
1166                         
1167                         /* MIR 115200, 57600 */
1168                         if (speed==1152000)
1169                         {
1170                                 tmp |= 0xA0;       //HDLC=1, 1.152Mbps=1
1171                         }
1172                         else
1173                         {
1174                                 tmp &=~0x80;       //HDLC 0.576Mbps
1175                                 tmp |= 0x20;       //HDLC=1,
1176                         }                       
1177                         
1178                         tmp |= IRDA_CR_CRC;             // CRC=1
1179                         
1180                         switch_bank(iobase, BANK2);
1181                         outb(tmp, iobase+FIR_IRDA_CR);
1182                                                 
1183                         /* MIR 115200, 57600 */ 
1184                                                 
1185                         //switch_bank(iobase, BANK2);                   
1186                         // T1 -> SD/MODE:0 IRTX:0
1187                         tmp &= ~0x09;
1188                         tmp |= 0x02;
1189                         outb(tmp, iobase+FIR_IRDA_CR);
1190                         udelay(2);
1191                         
1192                         // T2 -> SD/MODE:1 IRTX:0
1193                         tmp &= ~0x01;     
1194                         tmp |= 0x0a;      
1195                         outb(tmp, iobase+FIR_IRDA_CR);
1196                         
1197                         // T3 -> SD/MODE:0 IRTX:0
1198                         tmp &= ~0x09;
1199                         tmp |= 0x02;
1200                         outb(tmp, iobase+FIR_IRDA_CR);
1201                         udelay(2);
1202                         
1203                         // reset -> Normal TX output Signal
1204                         outb(tmp & ~0x02, iobase+FIR_IRDA_CR);                                                  
1205                 }               
1206         }
1207         else if (dongle_id == 1) /* HP HDSL-3600 */
1208         {
1209                 switch(speed)
1210                 {
1211                 case 4000000:
1212                         tmp &=  ~IRDA_CR_HDLC;  // HDLC=0
1213                         break;  
1214                         
1215                 case 1152000:
1216                         tmp |= 0xA0;            // HDLC=1, 1.152Mbps=1
1217                         break;
1218                         
1219                 case 576000:
1220                         tmp &=~0x80;            // HDLC 0.576Mbps
1221                         tmp |= 0x20;            // HDLC=1,
1222                         break;
1223                 }                       
1224                         
1225                 tmp |= IRDA_CR_CRC;             // CRC=1
1226                         
1227                 switch_bank(iobase, BANK2);
1228                 outb(tmp, iobase+FIR_IRDA_CR);          
1229         }
1230         else /* HP HDSL-1100 */
1231         {
1232                 if(speed <= 115200) /* SIR */
1233                 {
1234                         
1235                         tmp &= ~IRDA_CR_FIR_SIN;        // HP sin select = 0
1236                         
1237                         switch_bank(iobase, BANK2);
1238                         outb(tmp, iobase+FIR_IRDA_CR);                  
1239                 }
1240                 else /* MIR FIR */
1241                 {       
1242                         
1243                         switch(speed)
1244                         {
1245                         case 4000000:
1246                                 tmp &=  ~IRDA_CR_HDLC;  // HDLC=0
1247                                 break;  
1248                         
1249                         case 1152000:
1250                                 tmp |= 0xA0;            // HDLC=1, 1.152Mbps=1
1251                                 break;
1252                         
1253                         case 576000:
1254                                 tmp &=~0x80;            // HDLC 0.576Mbps
1255                                 tmp |= 0x20;            // HDLC=1,
1256                                 break;
1257                         }                       
1258                         
1259                         tmp |= IRDA_CR_CRC;             // CRC=1
1260                         tmp |= IRDA_CR_FIR_SIN;         // HP sin select = 1
1261                         
1262                         switch_bank(iobase, BANK2);
1263                         outb(tmp, iobase+FIR_IRDA_CR);                  
1264                 }
1265         }
1266                         
1267         switch_bank(iobase, BANK0);
1268         
1269 }
1270 
1271 /*
1272  * Function ali_ircc_sir_write (driver)
1273  *
1274  *    Fill Tx FIFO with transmit data
1275  *
1276  */
1277 static int ali_ircc_sir_write(int iobase, int fifo_size, __u8 *buf, int len)
1278 {
1279         int actual = 0;
1280         
1281                 
1282         /* Tx FIFO should be empty! */
1283         if (!(inb(iobase+UART_LSR) & UART_LSR_THRE)) {
1284                 pr_debug("%s(), failed, fifo not empty!\n", __func__);
1285                 return 0;
1286         }
1287         
1288         /* Fill FIFO with current frame */
1289         while ((fifo_size-- > 0) && (actual < len)) {
1290                 /* Transmit next byte */
1291                 outb(buf[actual], iobase+UART_TX);
1292 
1293                 actual++;
1294         }
1295         
1296         return actual;
1297 }
1298 
1299 /*
1300  * Function ali_ircc_net_open (dev)
1301  *
1302  *    Start the device
1303  *
1304  */
1305 static int ali_ircc_net_open(struct net_device *dev)
1306 {
1307         struct ali_ircc_cb *self;
1308         int iobase;
1309         char hwname[32];
1310                 
1311         
1312         IRDA_ASSERT(dev != NULL, return -1;);
1313         
1314         self = netdev_priv(dev);
1315         
1316         IRDA_ASSERT(self != NULL, return 0;);
1317         
1318         iobase = self->io.fir_base;
1319         
1320         /* Request IRQ and install Interrupt Handler */
1321         if (request_irq(self->io.irq, ali_ircc_interrupt, 0, dev->name, dev)) 
1322         {
1323                 net_warn_ratelimited("%s, unable to allocate irq=%d\n",
1324                                      ALI_IRCC_DRIVER_NAME, self->io.irq);
1325                 return -EAGAIN;
1326         }
1327         
1328         /*
1329          * Always allocate the DMA channel after the IRQ, and clean up on 
1330          * failure.
1331          */
1332         if (request_dma(self->io.dma, dev->name)) {
1333                 net_warn_ratelimited("%s, unable to allocate dma=%d\n",
1334                                      ALI_IRCC_DRIVER_NAME, self->io.dma);
1335                 free_irq(self->io.irq, dev);
1336                 return -EAGAIN;
1337         }
1338         
1339         /* Turn on interrups */
1340         outb(UART_IER_RDI , iobase+UART_IER);
1341 
1342         /* Ready to play! */
1343         netif_start_queue(dev); //benjamin by irport
1344         
1345         /* Give self a hardware name */
1346         sprintf(hwname, "ALI-FIR @ 0x%03x", self->io.fir_base);
1347 
1348         /* 
1349          * Open new IrLAP layer instance, now that everything should be
1350          * initialized properly 
1351          */
1352         self->irlap = irlap_open(dev, &self->qos, hwname);
1353                 
1354         
1355         return 0;
1356 }
1357 
1358 /*
1359  * Function ali_ircc_net_close (dev)
1360  *
1361  *    Stop the device
1362  *
1363  */
1364 static int ali_ircc_net_close(struct net_device *dev)
1365 {       
1366 
1367         struct ali_ircc_cb *self;
1368         //int iobase;
1369                         
1370                 
1371         IRDA_ASSERT(dev != NULL, return -1;);
1372 
1373         self = netdev_priv(dev);
1374         IRDA_ASSERT(self != NULL, return 0;);
1375 
1376         /* Stop device */
1377         netif_stop_queue(dev);
1378         
1379         /* Stop and remove instance of IrLAP */
1380         if (self->irlap)
1381                 irlap_close(self->irlap);
1382         self->irlap = NULL;
1383                 
1384         disable_dma(self->io.dma);
1385 
1386         /* Disable interrupts */
1387         SetCOMInterrupts(self, FALSE);
1388                
1389         free_irq(self->io.irq, dev);
1390         free_dma(self->io.dma);
1391 
1392         
1393         return 0;
1394 }
1395 
1396 /*
1397  * Function ali_ircc_fir_hard_xmit (skb, dev)
1398  *
1399  *    Transmit the frame
1400  *
1401  */
1402 static netdev_tx_t ali_ircc_fir_hard_xmit(struct sk_buff *skb,
1403                                                 struct net_device *dev)
1404 {
1405         struct ali_ircc_cb *self;
1406         unsigned long flags;
1407         int iobase;
1408         __u32 speed;
1409         int mtt, diff;
1410         
1411         
1412         self = netdev_priv(dev);
1413         iobase = self->io.fir_base;
1414 
1415         netif_stop_queue(dev);
1416         
1417         /* Make sure tests *& speed change are atomic */
1418         spin_lock_irqsave(&self->lock, flags);
1419         
1420         /* Note : you should make sure that speed changes are not going
1421          * to corrupt any outgoing frame. Look at nsc-ircc for the gory
1422          * details - Jean II */
1423 
1424         /* Check if we need to change the speed */
1425         speed = irda_get_next_speed(skb);
1426         if ((speed != self->io.speed) && (speed != -1)) {
1427                 /* Check for empty frame */
1428                 if (!skb->len) {
1429                         ali_ircc_change_speed(self, speed); 
1430                         dev->trans_start = jiffies;
1431                         spin_unlock_irqrestore(&self->lock, flags);
1432                         dev_kfree_skb(skb);
1433                         return NETDEV_TX_OK;
1434                 } else
1435                         self->new_speed = speed;
1436         }
1437 
1438         /* Register and copy this frame to DMA memory */
1439         self->tx_fifo.queue[self->tx_fifo.free].start = self->tx_fifo.tail;
1440         self->tx_fifo.queue[self->tx_fifo.free].len = skb->len;
1441         self->tx_fifo.tail += skb->len;
1442 
1443         dev->stats.tx_bytes += skb->len;
1444 
1445         skb_copy_from_linear_data(skb, self->tx_fifo.queue[self->tx_fifo.free].start,
1446                       skb->len);
1447         self->tx_fifo.len++;
1448         self->tx_fifo.free++;
1449 
1450         /* Start transmit only if there is currently no transmit going on */
1451         if (self->tx_fifo.len == 1) 
1452         {
1453                 /* Check if we must wait the min turn time or not */
1454                 mtt = irda_get_mtt(skb);
1455                                 
1456                 if (mtt) 
1457                 {
1458                         /* Check how much time we have used already */
1459                         diff = ktime_us_delta(ktime_get(), self->stamp);
1460                         /* self->stamp is set from ali_ircc_dma_receive_complete() */
1461                                                         
1462                         pr_debug("%s(), ******* diff = %d *******\n",
1463                                  __func__, diff);
1464 
1465                         /* Check if the mtt is larger than the time we have
1466                          * already used by all the protocol processing
1467                          */
1468                         if (mtt > diff)
1469                         {                               
1470                                 mtt -= diff;
1471                                                                 
1472                                 /* 
1473                                  * Use timer if delay larger than 1000 us, and
1474                                  * use udelay for smaller values which should
1475                                  * be acceptable
1476                                  */
1477                                 if (mtt > 500) 
1478                                 {
1479                                         /* Adjust for timer resolution */
1480                                         mtt = (mtt+250) / 500;  /* 4 discard, 5 get advanced, Let's round off */
1481                                         
1482                                         pr_debug("%s(), ************** mtt = %d ***********\n",
1483                                                  __func__, mtt);
1484                                         
1485                                         /* Setup timer */
1486                                         if (mtt == 1) /* 500 us */
1487                                         {
1488                                                 switch_bank(iobase, BANK1);
1489                                                 outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR);
1490                                         }       
1491                                         else if (mtt == 2) /* 1 ms */
1492                                         {
1493                                                 switch_bank(iobase, BANK1);
1494                                                 outb(TIMER_IIR_1ms, iobase+FIR_TIMER_IIR);
1495                                         }                                       
1496                                         else /* > 2ms -> 4ms */
1497                                         {
1498                                                 switch_bank(iobase, BANK1);
1499                                                 outb(TIMER_IIR_2ms, iobase+FIR_TIMER_IIR);
1500                                         }
1501                                         
1502                                         
1503                                         /* Start timer */
1504                                         outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR);
1505                                         self->io.direction = IO_XMIT;
1506                                         
1507                                         /* Enable timer interrupt */
1508                                         self->ier = IER_TIMER;
1509                                         SetCOMInterrupts(self, TRUE);                                   
1510                                         
1511                                         /* Timer will take care of the rest */
1512                                         goto out; 
1513                                 } 
1514                                 else
1515                                         udelay(mtt);
1516                         } // if (if (mtt > diff)
1517                 }// if (mtt) 
1518                                 
1519                 /* Enable EOM interrupt */
1520                 self->ier = IER_EOM;
1521                 SetCOMInterrupts(self, TRUE);
1522                 
1523                 /* Transmit frame */
1524                 ali_ircc_dma_xmit(self);
1525         } // if (self->tx_fifo.len == 1) 
1526         
1527  out:
1528         
1529         /* Not busy transmitting anymore if window is not full */
1530         if (self->tx_fifo.free < MAX_TX_WINDOW)
1531                 netif_wake_queue(self->netdev);
1532         
1533         /* Restore bank register */
1534         switch_bank(iobase, BANK0);
1535 
1536         dev->trans_start = jiffies;
1537         spin_unlock_irqrestore(&self->lock, flags);
1538         dev_kfree_skb(skb);
1539 
1540         return NETDEV_TX_OK;    
1541 }
1542 
1543 
1544 static void ali_ircc_dma_xmit(struct ali_ircc_cb *self)
1545 {
1546         int iobase, tmp;
1547         unsigned char FIFO_OPTI, Hi, Lo;
1548         
1549         
1550         
1551         iobase = self->io.fir_base;
1552         
1553         /* FIFO threshold , this method comes from NDIS5 code */
1554         
1555         if(self->tx_fifo.queue[self->tx_fifo.ptr].len < TX_FIFO_Threshold)
1556                 FIFO_OPTI = self->tx_fifo.queue[self->tx_fifo.ptr].len-1;
1557         else
1558                 FIFO_OPTI = TX_FIFO_Threshold;
1559         
1560         /* Disable DMA */
1561         switch_bank(iobase, BANK1);
1562         outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);
1563         
1564         self->io.direction = IO_XMIT;
1565         
1566         irda_setup_dma(self->io.dma, 
1567                        ((u8 *)self->tx_fifo.queue[self->tx_fifo.ptr].start -
1568                         self->tx_buff.head) + self->tx_buff_dma,
1569                        self->tx_fifo.queue[self->tx_fifo.ptr].len, 
1570                        DMA_TX_MODE);
1571                 
1572         /* Reset Tx FIFO */
1573         switch_bank(iobase, BANK0);
1574         outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A);
1575         
1576         /* Set Tx FIFO threshold */
1577         if (self->fifo_opti_buf!=FIFO_OPTI) 
1578         {
1579                 switch_bank(iobase, BANK1);
1580                 outb(FIFO_OPTI, iobase+FIR_FIFO_TR) ;
1581                 self->fifo_opti_buf=FIFO_OPTI;
1582         }
1583         
1584         /* Set Tx DMA threshold */
1585         switch_bank(iobase, BANK1);
1586         outb(TX_DMA_Threshold, iobase+FIR_DMA_TR);
1587         
1588         /* Set max Tx frame size */
1589         Hi = (self->tx_fifo.queue[self->tx_fifo.ptr].len >> 8) & 0x0f;
1590         Lo = self->tx_fifo.queue[self->tx_fifo.ptr].len & 0xff;
1591         switch_bank(iobase, BANK2);
1592         outb(Hi, iobase+FIR_TX_DSR_HI);
1593         outb(Lo, iobase+FIR_TX_DSR_LO);
1594         
1595         /* Disable SIP , Disable Brick Wall (we don't support in TX mode), Change to TX mode */
1596         switch_bank(iobase, BANK0);     
1597         tmp = inb(iobase+FIR_LCR_B);
1598         tmp &= ~0x20; // Disable SIP
1599         outb(((unsigned char)(tmp & 0x3f) | LCR_B_TX_MODE) & ~LCR_B_BW, iobase+FIR_LCR_B);
1600         pr_debug("%s(), *** Change to TX mode: FIR_LCR_B = 0x%x ***\n",
1601                  __func__, inb(iobase + FIR_LCR_B));
1602         
1603         outb(0, iobase+FIR_LSR);
1604                         
1605         /* Enable DMA and Burst Mode */
1606         switch_bank(iobase, BANK1);
1607         outb(inb(iobase+FIR_CR) | CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR);
1608         
1609         switch_bank(iobase, BANK0); 
1610         
1611 }
1612 
1613 static int  ali_ircc_dma_xmit_complete(struct ali_ircc_cb *self)
1614 {
1615         int iobase;
1616         int ret = TRUE;
1617         
1618         
1619         iobase = self->io.fir_base;
1620         
1621         /* Disable DMA */
1622         switch_bank(iobase, BANK1);
1623         outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);
1624         
1625         /* Check for underrun! */
1626         switch_bank(iobase, BANK0);
1627         if((inb(iobase+FIR_LSR) & LSR_FRAME_ABORT) == LSR_FRAME_ABORT)
1628         
1629         {
1630                 net_err_ratelimited("%s(), ********* LSR_FRAME_ABORT *********\n",
1631                                     __func__);
1632                 self->netdev->stats.tx_errors++;
1633                 self->netdev->stats.tx_fifo_errors++;
1634         }
1635         else 
1636         {
1637                 self->netdev->stats.tx_packets++;
1638         }
1639 
1640         /* Check if we need to change the speed */
1641         if (self->new_speed) 
1642         {
1643                 ali_ircc_change_speed(self, self->new_speed);
1644                 self->new_speed = 0;
1645         }
1646 
1647         /* Finished with this frame, so prepare for next */
1648         self->tx_fifo.ptr++;
1649         self->tx_fifo.len--;
1650 
1651         /* Any frames to be sent back-to-back? */
1652         if (self->tx_fifo.len) 
1653         {
1654                 ali_ircc_dma_xmit(self);
1655                 
1656                 /* Not finished yet! */
1657                 ret = FALSE;
1658         } 
1659         else 
1660         {       /* Reset Tx FIFO info */
1661                 self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1662                 self->tx_fifo.tail = self->tx_buff.head;
1663         }
1664 
1665         /* Make sure we have room for more frames */
1666         if (self->tx_fifo.free < MAX_TX_WINDOW) {
1667                 /* Not busy transmitting anymore */
1668                 /* Tell the network layer, that we can accept more frames */
1669                 netif_wake_queue(self->netdev);
1670         }
1671                 
1672         switch_bank(iobase, BANK0); 
1673         
1674         return ret;
1675 }
1676 
1677 /*
1678  * Function ali_ircc_dma_receive (self)
1679  *
1680  *    Get ready for receiving a frame. The device will initiate a DMA
1681  *    if it starts to receive a frame.
1682  *
1683  */
1684 static int ali_ircc_dma_receive(struct ali_ircc_cb *self) 
1685 {
1686         int iobase, tmp;
1687         
1688         
1689         iobase = self->io.fir_base;
1690         
1691         /* Reset Tx FIFO info */
1692         self->tx_fifo.len = self->tx_fifo.ptr = self->tx_fifo.free = 0;
1693         self->tx_fifo.tail = self->tx_buff.head;
1694                 
1695         /* Disable DMA */
1696         switch_bank(iobase, BANK1);
1697         outb(inb(iobase+FIR_CR) & ~CR_DMA_EN, iobase+FIR_CR);
1698         
1699         /* Reset Message Count */
1700         switch_bank(iobase, BANK0);
1701         outb(0x07, iobase+FIR_LSR);
1702                 
1703         self->rcvFramesOverflow = FALSE;        
1704         
1705         self->LineStatus = inb(iobase+FIR_LSR) ;
1706         
1707         /* Reset Rx FIFO info */
1708         self->io.direction = IO_RECV;
1709         self->rx_buff.data = self->rx_buff.head;
1710                 
1711         /* Reset Rx FIFO */
1712         // switch_bank(iobase, BANK0);
1713         outb(LCR_A_FIFO_RESET, iobase+FIR_LCR_A); 
1714         
1715         self->st_fifo.len = self->st_fifo.pending_bytes = 0;
1716         self->st_fifo.tail = self->st_fifo.head = 0;
1717                 
1718         irda_setup_dma(self->io.dma, self->rx_buff_dma, self->rx_buff.truesize,
1719                        DMA_RX_MODE);
1720          
1721         /* Set Receive Mode,Brick Wall */
1722         //switch_bank(iobase, BANK0);
1723         tmp = inb(iobase+FIR_LCR_B);
1724         outb((unsigned char)(tmp &0x3f) | LCR_B_RX_MODE | LCR_B_BW , iobase + FIR_LCR_B); // 2000/12/1 05:16PM
1725         pr_debug("%s(), *** Change To RX mode: FIR_LCR_B = 0x%x ***\n",
1726                  __func__, inb(iobase + FIR_LCR_B));
1727                         
1728         /* Set Rx Threshold */
1729         switch_bank(iobase, BANK1);
1730         outb(RX_FIFO_Threshold, iobase+FIR_FIFO_TR);
1731         outb(RX_DMA_Threshold, iobase+FIR_DMA_TR);
1732                 
1733         /* Enable DMA and Burst Mode */
1734         // switch_bank(iobase, BANK1);
1735         outb(CR_DMA_EN | CR_DMA_BURST, iobase+FIR_CR);
1736                                 
1737         switch_bank(iobase, BANK0); 
1738         return 0;
1739 }
1740 
1741 static int  ali_ircc_dma_receive_complete(struct ali_ircc_cb *self)
1742 {
1743         struct st_fifo *st_fifo;
1744         struct sk_buff *skb;
1745         __u8 status, MessageCount;
1746         int len, i, iobase, val;        
1747 
1748         st_fifo = &self->st_fifo;               
1749         iobase = self->io.fir_base;     
1750                 
1751         switch_bank(iobase, BANK0);
1752         MessageCount = inb(iobase+ FIR_LSR)&0x07;
1753         
1754         if (MessageCount > 0)   
1755                 pr_debug("%s(), Message count = %d\n", __func__, MessageCount);
1756                 
1757         for (i=0; i<=MessageCount; i++)
1758         {
1759                 /* Bank 0 */
1760                 switch_bank(iobase, BANK0);
1761                 status = inb(iobase+FIR_LSR);
1762                 
1763                 switch_bank(iobase, BANK2);
1764                 len = inb(iobase+FIR_RX_DSR_HI) & 0x0f;
1765                 len = len << 8; 
1766                 len |= inb(iobase+FIR_RX_DSR_LO);
1767                 
1768                 pr_debug("%s(), RX Length = 0x%.2x,\n", __func__ , len);
1769                 pr_debug("%s(), RX Status = 0x%.2x,\n", __func__ , status);
1770                 
1771                 if (st_fifo->tail >= MAX_RX_WINDOW) {
1772                         pr_debug("%s(), window is full!\n", __func__);
1773                         continue;
1774                 }
1775                         
1776                 st_fifo->entries[st_fifo->tail].status = status;
1777                 st_fifo->entries[st_fifo->tail].len = len;
1778                 st_fifo->pending_bytes += len;
1779                 st_fifo->tail++;
1780                 st_fifo->len++;
1781         }
1782                         
1783         for (i=0; i<=MessageCount; i++)
1784         {       
1785                 /* Get first entry */
1786                 status = st_fifo->entries[st_fifo->head].status;
1787                 len    = st_fifo->entries[st_fifo->head].len;
1788                 st_fifo->pending_bytes -= len;
1789                 st_fifo->head++;
1790                 st_fifo->len--;                 
1791                 
1792                 /* Check for errors */
1793                 if ((status & 0xd8) || self->rcvFramesOverflow || (len==0))             
1794                 {
1795                         pr_debug("%s(), ************* RX Errors ************\n",
1796                                  __func__);
1797                         
1798                         /* Skip frame */
1799                         self->netdev->stats.rx_errors++;
1800                         
1801                         self->rx_buff.data += len;
1802                         
1803                         if (status & LSR_FIFO_UR) 
1804                         {
1805                                 self->netdev->stats.rx_frame_errors++;
1806                                 pr_debug("%s(), ************* FIFO Errors ************\n",
1807                                          __func__);
1808                         }       
1809                         if (status & LSR_FRAME_ERROR)
1810                         {
1811                                 self->netdev->stats.rx_frame_errors++;
1812                                 pr_debug("%s(), ************* FRAME Errors ************\n",
1813                                          __func__);
1814                         }
1815                                                         
1816                         if (status & LSR_CRC_ERROR) 
1817                         {
1818                                 self->netdev->stats.rx_crc_errors++;
1819                                 pr_debug("%s(), ************* CRC Errors ************\n",
1820                                          __func__);
1821                         }
1822                         
1823                         if(self->rcvFramesOverflow)
1824                         {
1825                                 self->netdev->stats.rx_frame_errors++;
1826                                 pr_debug("%s(), ************* Overran DMA buffer ************\n",
1827                                          __func__);
1828                         }
1829                         if(len == 0)
1830                         {
1831                                 self->netdev->stats.rx_frame_errors++;
1832                                 pr_debug("%s(), ********** Receive Frame Size = 0 *********\n",
1833                                          __func__);
1834                         }
1835                 }        
1836                 else 
1837                 {
1838                         
1839                         if (st_fifo->pending_bytes < 32) 
1840                         {
1841                                 switch_bank(iobase, BANK0);
1842                                 val = inb(iobase+FIR_BSR);      
1843                                 if ((val& BSR_FIFO_NOT_EMPTY)== 0x80) 
1844                                 {
1845                                         pr_debug("%s(), ************* BSR_FIFO_NOT_EMPTY ************\n",
1846                                                  __func__);
1847                                         
1848                                         /* Put this entry back in fifo */
1849                                         st_fifo->head--;
1850                                         st_fifo->len++;
1851                                         st_fifo->pending_bytes += len;
1852                                         st_fifo->entries[st_fifo->head].status = status;
1853                                         st_fifo->entries[st_fifo->head].len = len;
1854                                                 
1855                                         /*  
1856                                         * DMA not finished yet, so try again 
1857                                         * later, set timer value, resolution 
1858                                         * 500 us 
1859                                         */
1860                                          
1861                                         switch_bank(iobase, BANK1);
1862                                         outb(TIMER_IIR_500, iobase+FIR_TIMER_IIR); // 2001/1/2 05:07PM
1863                                         
1864                                         /* Enable Timer */
1865                                         outb(inb(iobase+FIR_CR) | CR_TIMER_EN, iobase+FIR_CR);
1866                                                 
1867                                         return FALSE; /* I'll be back! */
1868                                 }
1869                         }               
1870                         
1871                         /* 
1872                          * Remember the time we received this frame, so we can
1873                          * reduce the min turn time a bit since we will know
1874                          * how much time we have used for protocol processing
1875                          */
1876                         self->stamp = ktime_get();
1877 
1878                         skb = dev_alloc_skb(len+1);
1879                         if (skb == NULL)  
1880                         {
1881                                 self->netdev->stats.rx_dropped++;
1882 
1883                                 return FALSE;
1884                         }
1885                         
1886                         /* Make sure IP header gets aligned */
1887                         skb_reserve(skb, 1); 
1888                         
1889                         /* Copy frame without CRC, CRC is removed by hardware*/
1890                         skb_put(skb, len);
1891                         skb_copy_to_linear_data(skb, self->rx_buff.data, len);
1892 
1893                         /* Move to next frame */
1894                         self->rx_buff.data += len;
1895                         self->netdev->stats.rx_bytes += len;
1896                         self->netdev->stats.rx_packets++;
1897 
1898                         skb->dev = self->netdev;
1899                         skb_reset_mac_header(skb);
1900                         skb->protocol = htons(ETH_P_IRDA);
1901                         netif_rx(skb);
1902                 }
1903         }
1904         
1905         switch_bank(iobase, BANK0);     
1906                 
1907         return TRUE;
1908 }
1909 
1910 
1911 
1912 /*
1913  * Function ali_ircc_sir_hard_xmit (skb, dev)
1914  *
1915  *    Transmit the frame!
1916  *
1917  */
1918 static netdev_tx_t ali_ircc_sir_hard_xmit(struct sk_buff *skb,
1919                                                 struct net_device *dev)
1920 {
1921         struct ali_ircc_cb *self;
1922         unsigned long flags;
1923         int iobase;
1924         __u32 speed;
1925         
1926         
1927         IRDA_ASSERT(dev != NULL, return NETDEV_TX_OK;);
1928         
1929         self = netdev_priv(dev);
1930         IRDA_ASSERT(self != NULL, return NETDEV_TX_OK;);
1931 
1932         iobase = self->io.sir_base;
1933 
1934         netif_stop_queue(dev);
1935         
1936         /* Make sure tests *& speed change are atomic */
1937         spin_lock_irqsave(&self->lock, flags);
1938 
1939         /* Note : you should make sure that speed changes are not going
1940          * to corrupt any outgoing frame. Look at nsc-ircc for the gory
1941          * details - Jean II */
1942 
1943         /* Check if we need to change the speed */
1944         speed = irda_get_next_speed(skb);
1945         if ((speed != self->io.speed) && (speed != -1)) {
1946                 /* Check for empty frame */
1947                 if (!skb->len) {
1948                         ali_ircc_change_speed(self, speed); 
1949                         dev->trans_start = jiffies;
1950                         spin_unlock_irqrestore(&self->lock, flags);
1951                         dev_kfree_skb(skb);
1952                         return NETDEV_TX_OK;
1953                 } else
1954                         self->new_speed = speed;
1955         }
1956 
1957         /* Init tx buffer */
1958         self->tx_buff.data = self->tx_buff.head;
1959 
1960         /* Copy skb to tx_buff while wrapping, stuffing and making CRC */
1961         self->tx_buff.len = async_wrap_skb(skb, self->tx_buff.data, 
1962                                            self->tx_buff.truesize);
1963         
1964         self->netdev->stats.tx_bytes += self->tx_buff.len;
1965 
1966         /* Turn on transmit finished interrupt. Will fire immediately!  */
1967         outb(UART_IER_THRI, iobase+UART_IER); 
1968 
1969         dev->trans_start = jiffies;
1970         spin_unlock_irqrestore(&self->lock, flags);
1971 
1972         dev_kfree_skb(skb);
1973         
1974         
1975         return NETDEV_TX_OK;    
1976 }
1977 
1978 
1979 /*
1980  * Function ali_ircc_net_ioctl (dev, rq, cmd)
1981  *
1982  *    Process IOCTL commands for this device
1983  *
1984  */
1985 static int ali_ircc_net_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
1986 {
1987         struct if_irda_req *irq = (struct if_irda_req *) rq;
1988         struct ali_ircc_cb *self;
1989         unsigned long flags;
1990         int ret = 0;
1991         
1992         
1993         IRDA_ASSERT(dev != NULL, return -1;);
1994 
1995         self = netdev_priv(dev);
1996 
1997         IRDA_ASSERT(self != NULL, return -1;);
1998 
1999         pr_debug("%s(), %s, (cmd=0x%X)\n", __func__ , dev->name, cmd);
2000         
2001         switch (cmd) {
2002         case SIOCSBANDWIDTH: /* Set bandwidth */
2003                 pr_debug("%s(), SIOCSBANDWIDTH\n", __func__);
2004                 /*
2005                  * This function will also be used by IrLAP to change the
2006                  * speed, so we still must allow for speed change within
2007                  * interrupt context.
2008                  */
2009                 if (!in_interrupt() && !capable(CAP_NET_ADMIN))
2010                         return -EPERM;
2011                 
2012                 spin_lock_irqsave(&self->lock, flags);
2013                 ali_ircc_change_speed(self, irq->ifr_baudrate);         
2014                 spin_unlock_irqrestore(&self->lock, flags);
2015                 break;
2016         case SIOCSMEDIABUSY: /* Set media busy */
2017                 pr_debug("%s(), SIOCSMEDIABUSY\n", __func__);
2018                 if (!capable(CAP_NET_ADMIN))
2019                         return -EPERM;
2020                 irda_device_set_media_busy(self->netdev, TRUE);
2021                 break;
2022         case SIOCGRECEIVING: /* Check if we are receiving right now */
2023                 pr_debug("%s(), SIOCGRECEIVING\n", __func__);
2024                 /* This is protected */
2025                 irq->ifr_receiving = ali_ircc_is_receiving(self);
2026                 break;
2027         default:
2028                 ret = -EOPNOTSUPP;
2029         }
2030         
2031         
2032         return ret;
2033 }
2034 
2035 /*
2036  * Function ali_ircc_is_receiving (self)
2037  *
2038  *    Return TRUE is we are currently receiving a frame
2039  *
2040  */
2041 static int ali_ircc_is_receiving(struct ali_ircc_cb *self)
2042 {
2043         unsigned long flags;
2044         int status = FALSE;
2045         int iobase;             
2046         
2047         
2048         IRDA_ASSERT(self != NULL, return FALSE;);
2049 
2050         spin_lock_irqsave(&self->lock, flags);
2051 
2052         if (self->io.speed > 115200) 
2053         {
2054                 iobase = self->io.fir_base;
2055                 
2056                 switch_bank(iobase, BANK1);
2057                 if((inb(iobase+FIR_FIFO_FR) & 0x3f) != 0)               
2058                 {
2059                         /* We are receiving something */
2060                         pr_debug("%s(), We are receiving something\n",
2061                                  __func__);
2062                         status = TRUE;
2063                 }
2064                 switch_bank(iobase, BANK0);             
2065         } 
2066         else
2067         { 
2068                 status = (self->rx_buff.state != OUTSIDE_FRAME);
2069         }
2070         
2071         spin_unlock_irqrestore(&self->lock, flags);
2072         
2073         
2074         return status;
2075 }
2076 
2077 static int ali_ircc_suspend(struct platform_device *dev, pm_message_t state)
2078 {
2079         struct ali_ircc_cb *self = platform_get_drvdata(dev);
2080         
2081         net_info_ratelimited("%s, Suspending\n", ALI_IRCC_DRIVER_NAME);
2082 
2083         if (self->io.suspended)
2084                 return 0;
2085 
2086         ali_ircc_net_close(self->netdev);
2087 
2088         self->io.suspended = 1;
2089         
2090         return 0;
2091 }
2092 
2093 static int ali_ircc_resume(struct platform_device *dev)
2094 {
2095         struct ali_ircc_cb *self = platform_get_drvdata(dev);
2096         
2097         if (!self->io.suspended)
2098                 return 0;
2099         
2100         ali_ircc_net_open(self->netdev);
2101         
2102         net_info_ratelimited("%s, Waking up\n", ALI_IRCC_DRIVER_NAME);
2103 
2104         self->io.suspended = 0;
2105 
2106         return 0;
2107 }
2108 
2109 /* ALi Chip Function */
2110 
2111 static void SetCOMInterrupts(struct ali_ircc_cb *self , unsigned char enable)
2112 {
2113         
2114         unsigned char newMask;
2115         
2116         int iobase = self->io.fir_base; /* or sir_base */
2117 
2118         pr_debug("%s(), -------- Start -------- ( Enable = %d )\n",
2119                  __func__, enable);
2120         
2121         /* Enable the interrupt which we wish to */
2122         if (enable){
2123                 if (self->io.direction == IO_XMIT)
2124                 {
2125                         if (self->io.speed > 115200) /* FIR, MIR */
2126                         {
2127                                 newMask = self->ier;
2128                         }
2129                         else /* SIR */
2130                         {
2131                                 newMask = UART_IER_THRI | UART_IER_RDI;
2132                         }
2133                 }
2134                 else {
2135                         if (self->io.speed > 115200) /* FIR, MIR */
2136                         {
2137                                 newMask = self->ier;
2138                         }
2139                         else /* SIR */
2140                         {
2141                                 newMask = UART_IER_RDI;
2142                         }
2143                 }
2144         }
2145         else /* Disable all the interrupts */
2146         {
2147                 newMask = 0x00;
2148 
2149         }
2150 
2151         //SIR and FIR has different registers
2152         if (self->io.speed > 115200)
2153         {       
2154                 switch_bank(iobase, BANK0);
2155                 outb(newMask, iobase+FIR_IER);
2156         }
2157         else
2158                 outb(newMask, iobase+UART_IER);
2159                 
2160 }
2161 
2162 static void SIR2FIR(int iobase)
2163 {
2164         //unsigned char tmp;
2165                 
2166         
2167         /* Already protected (change_speed() or setup()), no need to lock.
2168          * Jean II */
2169         
2170         outb(0x28, iobase+UART_MCR);
2171         outb(0x68, iobase+UART_MCR);
2172         outb(0x88, iobase+UART_MCR);            
2173         
2174         outb(0x60, iobase+FIR_MCR);     /*  Master Reset */
2175         outb(0x20, iobase+FIR_MCR);     /*  Master Interrupt Enable */
2176         
2177         //tmp = inb(iobase+FIR_LCR_B);  /* SIP enable */
2178         //tmp |= 0x20;
2179         //outb(tmp, iobase+FIR_LCR_B);  
2180         
2181 }
2182 
2183 static void FIR2SIR(int iobase)
2184 {
2185         unsigned char val;
2186         
2187         
2188         /* Already protected (change_speed() or setup()), no need to lock.
2189          * Jean II */
2190         
2191         outb(0x20, iobase+FIR_MCR);     /* IRQ to low */
2192         outb(0x00, iobase+UART_IER);    
2193                 
2194         outb(0xA0, iobase+FIR_MCR);     /* Don't set master reset */
2195         outb(0x00, iobase+UART_FCR);
2196         outb(0x07, iobase+UART_FCR);            
2197         
2198         val = inb(iobase+UART_RX);
2199         val = inb(iobase+UART_LSR);
2200         val = inb(iobase+UART_MSR);
2201         
2202 }
2203 
2204 MODULE_AUTHOR("Benjamin Kong <benjamin_kong@ali.com.tw>");
2205 MODULE_DESCRIPTION("ALi FIR Controller Driver");
2206 MODULE_LICENSE("GPL");
2207 MODULE_ALIAS("platform:" ALI_IRCC_DRIVER_NAME);
2208 
2209 
2210 module_param_array(io, int, NULL, 0);
2211 MODULE_PARM_DESC(io, "Base I/O addresses");
2212 module_param_array(irq, int, NULL, 0);
2213 MODULE_PARM_DESC(irq, "IRQ lines");
2214 module_param_array(dma, int, NULL, 0);
2215 MODULE_PARM_DESC(dma, "DMA channels");
2216 
2217 module_init(ali_ircc_init);
2218 module_exit(ali_ircc_cleanup);
2219 

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