Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/net/ethernet/xilinx/xilinx_emaclite.c

  1 /*
  2  * Xilinx EmacLite Linux driver for the Xilinx Ethernet MAC Lite device.
  3  *
  4  * This is a new flat driver which is based on the original emac_lite
  5  * driver from John Williams <john.williams@xilinx.com>.
  6  *
  7  * 2007 - 2013 (c) Xilinx, Inc.
  8  *
  9  * This program is free software; you can redistribute it and/or modify it
 10  * under the terms of the GNU General Public License as published by the
 11  * Free Software Foundation; either version 2 of the License, or (at your
 12  * option) any later version.
 13  */
 14 
 15 #include <linux/module.h>
 16 #include <linux/uaccess.h>
 17 #include <linux/netdevice.h>
 18 #include <linux/etherdevice.h>
 19 #include <linux/skbuff.h>
 20 #include <linux/io.h>
 21 #include <linux/slab.h>
 22 #include <linux/of_address.h>
 23 #include <linux/of_device.h>
 24 #include <linux/of_platform.h>
 25 #include <linux/of_mdio.h>
 26 #include <linux/of_net.h>
 27 #include <linux/phy.h>
 28 #include <linux/interrupt.h>
 29 
 30 #define DRIVER_NAME "xilinx_emaclite"
 31 
 32 /* Register offsets for the EmacLite Core */
 33 #define XEL_TXBUFF_OFFSET       0x0             /* Transmit Buffer */
 34 #define XEL_MDIOADDR_OFFSET     0x07E4          /* MDIO Address Register */
 35 #define XEL_MDIOWR_OFFSET       0x07E8          /* MDIO Write Data Register */
 36 #define XEL_MDIORD_OFFSET       0x07EC          /* MDIO Read Data Register */
 37 #define XEL_MDIOCTRL_OFFSET     0x07F0          /* MDIO Control Register */
 38 #define XEL_GIER_OFFSET         0x07F8          /* GIE Register */
 39 #define XEL_TSR_OFFSET          0x07FC          /* Tx status */
 40 #define XEL_TPLR_OFFSET         0x07F4          /* Tx packet length */
 41 
 42 #define XEL_RXBUFF_OFFSET       0x1000          /* Receive Buffer */
 43 #define XEL_RPLR_OFFSET         0x100C          /* Rx packet length */
 44 #define XEL_RSR_OFFSET          0x17FC          /* Rx status */
 45 
 46 #define XEL_BUFFER_OFFSET       0x0800          /* Next Tx/Rx buffer's offset */
 47 
 48 /* MDIO Address Register Bit Masks */
 49 #define XEL_MDIOADDR_REGADR_MASK  0x0000001F    /* Register Address */
 50 #define XEL_MDIOADDR_PHYADR_MASK  0x000003E0    /* PHY Address */
 51 #define XEL_MDIOADDR_PHYADR_SHIFT 5
 52 #define XEL_MDIOADDR_OP_MASK      0x00000400    /* RD/WR Operation */
 53 
 54 /* MDIO Write Data Register Bit Masks */
 55 #define XEL_MDIOWR_WRDATA_MASK    0x0000FFFF    /* Data to be Written */
 56 
 57 /* MDIO Read Data Register Bit Masks */
 58 #define XEL_MDIORD_RDDATA_MASK    0x0000FFFF    /* Data to be Read */
 59 
 60 /* MDIO Control Register Bit Masks */
 61 #define XEL_MDIOCTRL_MDIOSTS_MASK 0x00000001    /* MDIO Status Mask */
 62 #define XEL_MDIOCTRL_MDIOEN_MASK  0x00000008    /* MDIO Enable */
 63 
 64 /* Global Interrupt Enable Register (GIER) Bit Masks */
 65 #define XEL_GIER_GIE_MASK       0x80000000      /* Global Enable */
 66 
 67 /* Transmit Status Register (TSR) Bit Masks */
 68 #define XEL_TSR_XMIT_BUSY_MASK   0x00000001     /* Tx complete */
 69 #define XEL_TSR_PROGRAM_MASK     0x00000002     /* Program the MAC address */
 70 #define XEL_TSR_XMIT_IE_MASK     0x00000008     /* Tx interrupt enable bit */
 71 #define XEL_TSR_XMIT_ACTIVE_MASK 0x80000000     /* Buffer is active, SW bit
 72                                                  * only. This is not documented
 73                                                  * in the HW spec */
 74 
 75 /* Define for programming the MAC address into the EmacLite */
 76 #define XEL_TSR_PROG_MAC_ADDR   (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_PROGRAM_MASK)
 77 
 78 /* Receive Status Register (RSR) */
 79 #define XEL_RSR_RECV_DONE_MASK  0x00000001      /* Rx complete */
 80 #define XEL_RSR_RECV_IE_MASK    0x00000008      /* Rx interrupt enable bit */
 81 
 82 /* Transmit Packet Length Register (TPLR) */
 83 #define XEL_TPLR_LENGTH_MASK    0x0000FFFF      /* Tx packet length */
 84 
 85 /* Receive Packet Length Register (RPLR) */
 86 #define XEL_RPLR_LENGTH_MASK    0x0000FFFF      /* Rx packet length */
 87 
 88 #define XEL_HEADER_OFFSET       12              /* Offset to length field */
 89 #define XEL_HEADER_SHIFT        16              /* Shift value for length */
 90 
 91 /* General Ethernet Definitions */
 92 #define XEL_ARP_PACKET_SIZE             28      /* Max ARP packet size */
 93 #define XEL_HEADER_IP_LENGTH_OFFSET     16      /* IP Length Offset */
 94 
 95 
 96 
 97 #define TX_TIMEOUT              (60*HZ)         /* Tx timeout is 60 seconds. */
 98 #define ALIGNMENT               4
 99 
100 /* BUFFER_ALIGN(adr) calculates the number of bytes to the next alignment. */
101 #define BUFFER_ALIGN(adr) ((ALIGNMENT - ((u32) adr)) % ALIGNMENT)
102 
103 /**
104  * struct net_local - Our private per device data
105  * @ndev:               instance of the network device
106  * @tx_ping_pong:       indicates whether Tx Pong buffer is configured in HW
107  * @rx_ping_pong:       indicates whether Rx Pong buffer is configured in HW
108  * @next_tx_buf_to_use: next Tx buffer to write to
109  * @next_rx_buf_to_use: next Rx buffer to read from
110  * @base_addr:          base address of the Emaclite device
111  * @reset_lock:         lock used for synchronization
112  * @deferred_skb:       holds an skb (for transmission at a later time) when the
113  *                      Tx buffer is not free
114  * @phy_dev:            pointer to the PHY device
115  * @phy_node:           pointer to the PHY device node
116  * @mii_bus:            pointer to the MII bus
117  * @mdio_irqs:          IRQs table for MDIO bus
118  * @last_link:          last link status
119  * @has_mdio:           indicates whether MDIO is included in the HW
120  */
121 struct net_local {
122 
123         struct net_device *ndev;
124 
125         bool tx_ping_pong;
126         bool rx_ping_pong;
127         u32 next_tx_buf_to_use;
128         u32 next_rx_buf_to_use;
129         void __iomem *base_addr;
130 
131         spinlock_t reset_lock;
132         struct sk_buff *deferred_skb;
133 
134         struct phy_device *phy_dev;
135         struct device_node *phy_node;
136 
137         struct mii_bus *mii_bus;
138         int mdio_irqs[PHY_MAX_ADDR];
139 
140         int last_link;
141         bool has_mdio;
142 };
143 
144 
145 /*************************/
146 /* EmacLite driver calls */
147 /*************************/
148 
149 /**
150  * xemaclite_enable_interrupts - Enable the interrupts for the EmacLite device
151  * @drvdata:    Pointer to the Emaclite device private data
152  *
153  * This function enables the Tx and Rx interrupts for the Emaclite device along
154  * with the Global Interrupt Enable.
155  */
156 static void xemaclite_enable_interrupts(struct net_local *drvdata)
157 {
158         u32 reg_data;
159 
160         /* Enable the Tx interrupts for the first Buffer */
161         reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
162         __raw_writel(reg_data | XEL_TSR_XMIT_IE_MASK,
163                      drvdata->base_addr + XEL_TSR_OFFSET);
164 
165         /* Enable the Rx interrupts for the first buffer */
166         __raw_writel(XEL_RSR_RECV_IE_MASK, drvdata->base_addr + XEL_RSR_OFFSET);
167 
168         /* Enable the Global Interrupt Enable */
169         __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
170 }
171 
172 /**
173  * xemaclite_disable_interrupts - Disable the interrupts for the EmacLite device
174  * @drvdata:    Pointer to the Emaclite device private data
175  *
176  * This function disables the Tx and Rx interrupts for the Emaclite device,
177  * along with the Global Interrupt Enable.
178  */
179 static void xemaclite_disable_interrupts(struct net_local *drvdata)
180 {
181         u32 reg_data;
182 
183         /* Disable the Global Interrupt Enable */
184         __raw_writel(XEL_GIER_GIE_MASK, drvdata->base_addr + XEL_GIER_OFFSET);
185 
186         /* Disable the Tx interrupts for the first buffer */
187         reg_data = __raw_readl(drvdata->base_addr + XEL_TSR_OFFSET);
188         __raw_writel(reg_data & (~XEL_TSR_XMIT_IE_MASK),
189                      drvdata->base_addr + XEL_TSR_OFFSET);
190 
191         /* Disable the Rx interrupts for the first buffer */
192         reg_data = __raw_readl(drvdata->base_addr + XEL_RSR_OFFSET);
193         __raw_writel(reg_data & (~XEL_RSR_RECV_IE_MASK),
194                      drvdata->base_addr + XEL_RSR_OFFSET);
195 }
196 
197 /**
198  * xemaclite_aligned_write - Write from 16-bit aligned to 32-bit aligned address
199  * @src_ptr:    Void pointer to the 16-bit aligned source address
200  * @dest_ptr:   Pointer to the 32-bit aligned destination address
201  * @length:     Number bytes to write from source to destination
202  *
203  * This function writes data from a 16-bit aligned buffer to a 32-bit aligned
204  * address in the EmacLite device.
205  */
206 static void xemaclite_aligned_write(void *src_ptr, u32 *dest_ptr,
207                                     unsigned length)
208 {
209         u32 align_buffer;
210         u32 *to_u32_ptr;
211         u16 *from_u16_ptr, *to_u16_ptr;
212 
213         to_u32_ptr = dest_ptr;
214         from_u16_ptr = src_ptr;
215         align_buffer = 0;
216 
217         for (; length > 3; length -= 4) {
218                 to_u16_ptr = (u16 *)&align_buffer;
219                 *to_u16_ptr++ = *from_u16_ptr++;
220                 *to_u16_ptr++ = *from_u16_ptr++;
221 
222                 /* This barrier resolves occasional issues seen around
223                  * cases where the data is not properly flushed out
224                  * from the processor store buffers to the destination
225                  * memory locations.
226                  */
227                 wmb();
228 
229                 /* Output a word */
230                 *to_u32_ptr++ = align_buffer;
231         }
232         if (length) {
233                 u8 *from_u8_ptr, *to_u8_ptr;
234 
235                 /* Set up to output the remaining data */
236                 align_buffer = 0;
237                 to_u8_ptr = (u8 *) &align_buffer;
238                 from_u8_ptr = (u8 *) from_u16_ptr;
239 
240                 /* Output the remaining data */
241                 for (; length > 0; length--)
242                         *to_u8_ptr++ = *from_u8_ptr++;
243 
244                 /* This barrier resolves occasional issues seen around
245                  * cases where the data is not properly flushed out
246                  * from the processor store buffers to the destination
247                  * memory locations.
248                  */
249                 wmb();
250                 *to_u32_ptr = align_buffer;
251         }
252 }
253 
254 /**
255  * xemaclite_aligned_read - Read from 32-bit aligned to 16-bit aligned buffer
256  * @src_ptr:    Pointer to the 32-bit aligned source address
257  * @dest_ptr:   Pointer to the 16-bit aligned destination address
258  * @length:     Number bytes to read from source to destination
259  *
260  * This function reads data from a 32-bit aligned address in the EmacLite device
261  * to a 16-bit aligned buffer.
262  */
263 static void xemaclite_aligned_read(u32 *src_ptr, u8 *dest_ptr,
264                                    unsigned length)
265 {
266         u16 *to_u16_ptr, *from_u16_ptr;
267         u32 *from_u32_ptr;
268         u32 align_buffer;
269 
270         from_u32_ptr = src_ptr;
271         to_u16_ptr = (u16 *) dest_ptr;
272 
273         for (; length > 3; length -= 4) {
274                 /* Copy each word into the temporary buffer */
275                 align_buffer = *from_u32_ptr++;
276                 from_u16_ptr = (u16 *)&align_buffer;
277 
278                 /* Read data from source */
279                 *to_u16_ptr++ = *from_u16_ptr++;
280                 *to_u16_ptr++ = *from_u16_ptr++;
281         }
282 
283         if (length) {
284                 u8 *to_u8_ptr, *from_u8_ptr;
285 
286                 /* Set up to read the remaining data */
287                 to_u8_ptr = (u8 *) to_u16_ptr;
288                 align_buffer = *from_u32_ptr++;
289                 from_u8_ptr = (u8 *) &align_buffer;
290 
291                 /* Read the remaining data */
292                 for (; length > 0; length--)
293                         *to_u8_ptr = *from_u8_ptr;
294         }
295 }
296 
297 /**
298  * xemaclite_send_data - Send an Ethernet frame
299  * @drvdata:    Pointer to the Emaclite device private data
300  * @data:       Pointer to the data to be sent
301  * @byte_count: Total frame size, including header
302  *
303  * This function checks if the Tx buffer of the Emaclite device is free to send
304  * data. If so, it fills the Tx buffer with data for transmission. Otherwise, it
305  * returns an error.
306  *
307  * Return:      0 upon success or -1 if the buffer(s) are full.
308  *
309  * Note:        The maximum Tx packet size can not be more than Ethernet header
310  *              (14 Bytes) + Maximum MTU (1500 bytes). This is excluding FCS.
311  */
312 static int xemaclite_send_data(struct net_local *drvdata, u8 *data,
313                                unsigned int byte_count)
314 {
315         u32 reg_data;
316         void __iomem *addr;
317 
318         /* Determine the expected Tx buffer address */
319         addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
320 
321         /* If the length is too large, truncate it */
322         if (byte_count > ETH_FRAME_LEN)
323                 byte_count = ETH_FRAME_LEN;
324 
325         /* Check if the expected buffer is available */
326         reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
327         if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
328              XEL_TSR_XMIT_ACTIVE_MASK)) == 0) {
329 
330                 /* Switch to next buffer if configured */
331                 if (drvdata->tx_ping_pong != 0)
332                         drvdata->next_tx_buf_to_use ^= XEL_BUFFER_OFFSET;
333         } else if (drvdata->tx_ping_pong != 0) {
334                 /* If the expected buffer is full, try the other buffer,
335                  * if it is configured in HW */
336 
337                 addr = (void __iomem __force *)((u32 __force)addr ^
338                                                  XEL_BUFFER_OFFSET);
339                 reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
340 
341                 if ((reg_data & (XEL_TSR_XMIT_BUSY_MASK |
342                      XEL_TSR_XMIT_ACTIVE_MASK)) != 0)
343                         return -1; /* Buffers were full, return failure */
344         } else
345                 return -1; /* Buffer was full, return failure */
346 
347         /* Write the frame to the buffer */
348         xemaclite_aligned_write(data, (u32 __force *) addr, byte_count);
349 
350         __raw_writel((byte_count & XEL_TPLR_LENGTH_MASK),
351                      addr + XEL_TPLR_OFFSET);
352 
353         /* Update the Tx Status Register to indicate that there is a
354          * frame to send. Set the XEL_TSR_XMIT_ACTIVE_MASK flag which
355          * is used by the interrupt handler to check whether a frame
356          * has been transmitted */
357         reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
358         reg_data |= (XEL_TSR_XMIT_BUSY_MASK | XEL_TSR_XMIT_ACTIVE_MASK);
359         __raw_writel(reg_data, addr + XEL_TSR_OFFSET);
360 
361         return 0;
362 }
363 
364 /**
365  * xemaclite_recv_data - Receive a frame
366  * @drvdata:    Pointer to the Emaclite device private data
367  * @data:       Address where the data is to be received
368  *
369  * This function is intended to be called from the interrupt context or
370  * with a wrapper which waits for the receive frame to be available.
371  *
372  * Return:      Total number of bytes received
373  */
374 static u16 xemaclite_recv_data(struct net_local *drvdata, u8 *data)
375 {
376         void __iomem *addr;
377         u16 length, proto_type;
378         u32 reg_data;
379 
380         /* Determine the expected buffer address */
381         addr = (drvdata->base_addr + drvdata->next_rx_buf_to_use);
382 
383         /* Verify which buffer has valid data */
384         reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
385 
386         if ((reg_data & XEL_RSR_RECV_DONE_MASK) == XEL_RSR_RECV_DONE_MASK) {
387                 if (drvdata->rx_ping_pong != 0)
388                         drvdata->next_rx_buf_to_use ^= XEL_BUFFER_OFFSET;
389         } else {
390                 /* The instance is out of sync, try other buffer if other
391                  * buffer is configured, return 0 otherwise. If the instance is
392                  * out of sync, do not update the 'next_rx_buf_to_use' since it
393                  * will correct on subsequent calls */
394                 if (drvdata->rx_ping_pong != 0)
395                         addr = (void __iomem __force *)((u32 __force)addr ^
396                                                          XEL_BUFFER_OFFSET);
397                 else
398                         return 0;       /* No data was available */
399 
400                 /* Verify that buffer has valid data */
401                 reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
402                 if ((reg_data & XEL_RSR_RECV_DONE_MASK) !=
403                      XEL_RSR_RECV_DONE_MASK)
404                         return 0;       /* No data was available */
405         }
406 
407         /* Get the protocol type of the ethernet frame that arrived */
408         proto_type = ((ntohl(__raw_readl(addr + XEL_HEADER_OFFSET +
409                         XEL_RXBUFF_OFFSET)) >> XEL_HEADER_SHIFT) &
410                         XEL_RPLR_LENGTH_MASK);
411 
412         /* Check if received ethernet frame is a raw ethernet frame
413          * or an IP packet or an ARP packet */
414         if (proto_type > (ETH_FRAME_LEN + ETH_FCS_LEN)) {
415 
416                 if (proto_type == ETH_P_IP) {
417                         length = ((ntohl(__raw_readl(addr +
418                                         XEL_HEADER_IP_LENGTH_OFFSET +
419                                         XEL_RXBUFF_OFFSET)) >>
420                                         XEL_HEADER_SHIFT) &
421                                         XEL_RPLR_LENGTH_MASK);
422                         length += ETH_HLEN + ETH_FCS_LEN;
423 
424                 } else if (proto_type == ETH_P_ARP)
425                         length = XEL_ARP_PACKET_SIZE + ETH_HLEN + ETH_FCS_LEN;
426                 else
427                         /* Field contains type other than IP or ARP, use max
428                          * frame size and let user parse it */
429                         length = ETH_FRAME_LEN + ETH_FCS_LEN;
430         } else
431                 /* Use the length in the frame, plus the header and trailer */
432                 length = proto_type + ETH_HLEN + ETH_FCS_LEN;
433 
434         /* Read from the EmacLite device */
435         xemaclite_aligned_read((u32 __force *) (addr + XEL_RXBUFF_OFFSET),
436                                 data, length);
437 
438         /* Acknowledge the frame */
439         reg_data = __raw_readl(addr + XEL_RSR_OFFSET);
440         reg_data &= ~XEL_RSR_RECV_DONE_MASK;
441         __raw_writel(reg_data, addr + XEL_RSR_OFFSET);
442 
443         return length;
444 }
445 
446 /**
447  * xemaclite_update_address - Update the MAC address in the device
448  * @drvdata:    Pointer to the Emaclite device private data
449  * @address_ptr:Pointer to the MAC address (MAC address is a 48-bit value)
450  *
451  * Tx must be idle and Rx should be idle for deterministic results.
452  * It is recommended that this function should be called after the
453  * initialization and before transmission of any packets from the device.
454  * The MAC address can be programmed using any of the two transmit
455  * buffers (if configured).
456  */
457 static void xemaclite_update_address(struct net_local *drvdata,
458                                      u8 *address_ptr)
459 {
460         void __iomem *addr;
461         u32 reg_data;
462 
463         /* Determine the expected Tx buffer address */
464         addr = drvdata->base_addr + drvdata->next_tx_buf_to_use;
465 
466         xemaclite_aligned_write(address_ptr, (u32 __force *) addr, ETH_ALEN);
467 
468         __raw_writel(ETH_ALEN, addr + XEL_TPLR_OFFSET);
469 
470         /* Update the MAC address in the EmacLite */
471         reg_data = __raw_readl(addr + XEL_TSR_OFFSET);
472         __raw_writel(reg_data | XEL_TSR_PROG_MAC_ADDR, addr + XEL_TSR_OFFSET);
473 
474         /* Wait for EmacLite to finish with the MAC address update */
475         while ((__raw_readl(addr + XEL_TSR_OFFSET) &
476                 XEL_TSR_PROG_MAC_ADDR) != 0)
477                 ;
478 }
479 
480 /**
481  * xemaclite_set_mac_address - Set the MAC address for this device
482  * @dev:        Pointer to the network device instance
483  * @addr:       Void pointer to the sockaddr structure
484  *
485  * This function copies the HW address from the sockaddr strucutre to the
486  * net_device structure and updates the address in HW.
487  *
488  * Return:      Error if the net device is busy or 0 if the addr is set
489  *              successfully
490  */
491 static int xemaclite_set_mac_address(struct net_device *dev, void *address)
492 {
493         struct net_local *lp = netdev_priv(dev);
494         struct sockaddr *addr = address;
495 
496         if (netif_running(dev))
497                 return -EBUSY;
498 
499         memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
500         xemaclite_update_address(lp, dev->dev_addr);
501         return 0;
502 }
503 
504 /**
505  * xemaclite_tx_timeout - Callback for Tx Timeout
506  * @dev:        Pointer to the network device
507  *
508  * This function is called when Tx time out occurs for Emaclite device.
509  */
510 static void xemaclite_tx_timeout(struct net_device *dev)
511 {
512         struct net_local *lp = netdev_priv(dev);
513         unsigned long flags;
514 
515         dev_err(&lp->ndev->dev, "Exceeded transmit timeout of %lu ms\n",
516                 TX_TIMEOUT * 1000UL / HZ);
517 
518         dev->stats.tx_errors++;
519 
520         /* Reset the device */
521         spin_lock_irqsave(&lp->reset_lock, flags);
522 
523         /* Shouldn't really be necessary, but shouldn't hurt */
524         netif_stop_queue(dev);
525 
526         xemaclite_disable_interrupts(lp);
527         xemaclite_enable_interrupts(lp);
528 
529         if (lp->deferred_skb) {
530                 dev_kfree_skb(lp->deferred_skb);
531                 lp->deferred_skb = NULL;
532                 dev->stats.tx_errors++;
533         }
534 
535         /* To exclude tx timeout */
536         dev->trans_start = jiffies; /* prevent tx timeout */
537 
538         /* We're all ready to go. Start the queue */
539         netif_wake_queue(dev);
540         spin_unlock_irqrestore(&lp->reset_lock, flags);
541 }
542 
543 /**********************/
544 /* Interrupt Handlers */
545 /**********************/
546 
547 /**
548  * xemaclite_tx_handler - Interrupt handler for frames sent
549  * @dev:        Pointer to the network device
550  *
551  * This function updates the number of packets transmitted and handles the
552  * deferred skb, if there is one.
553  */
554 static void xemaclite_tx_handler(struct net_device *dev)
555 {
556         struct net_local *lp = netdev_priv(dev);
557 
558         dev->stats.tx_packets++;
559         if (lp->deferred_skb) {
560                 if (xemaclite_send_data(lp,
561                                         (u8 *) lp->deferred_skb->data,
562                                         lp->deferred_skb->len) != 0)
563                         return;
564                 else {
565                         dev->stats.tx_bytes += lp->deferred_skb->len;
566                         dev_kfree_skb_irq(lp->deferred_skb);
567                         lp->deferred_skb = NULL;
568                         dev->trans_start = jiffies; /* prevent tx timeout */
569                         netif_wake_queue(dev);
570                 }
571         }
572 }
573 
574 /**
575  * xemaclite_rx_handler- Interrupt handler for frames received
576  * @dev:        Pointer to the network device
577  *
578  * This function allocates memory for a socket buffer, fills it with data
579  * received and hands it over to the TCP/IP stack.
580  */
581 static void xemaclite_rx_handler(struct net_device *dev)
582 {
583         struct net_local *lp = netdev_priv(dev);
584         struct sk_buff *skb;
585         unsigned int align;
586         u32 len;
587 
588         len = ETH_FRAME_LEN + ETH_FCS_LEN;
589         skb = netdev_alloc_skb(dev, len + ALIGNMENT);
590         if (!skb) {
591                 /* Couldn't get memory. */
592                 dev->stats.rx_dropped++;
593                 dev_err(&lp->ndev->dev, "Could not allocate receive buffer\n");
594                 return;
595         }
596 
597         /*
598          * A new skb should have the data halfword aligned, but this code is
599          * here just in case that isn't true. Calculate how many
600          * bytes we should reserve to get the data to start on a word
601          * boundary */
602         align = BUFFER_ALIGN(skb->data);
603         if (align)
604                 skb_reserve(skb, align);
605 
606         skb_reserve(skb, 2);
607 
608         len = xemaclite_recv_data(lp, (u8 *) skb->data);
609 
610         if (!len) {
611                 dev->stats.rx_errors++;
612                 dev_kfree_skb_irq(skb);
613                 return;
614         }
615 
616         skb_put(skb, len);      /* Tell the skb how much data we got */
617 
618         skb->protocol = eth_type_trans(skb, dev);
619         skb_checksum_none_assert(skb);
620 
621         dev->stats.rx_packets++;
622         dev->stats.rx_bytes += len;
623 
624         if (!skb_defer_rx_timestamp(skb))
625                 netif_rx(skb);  /* Send the packet upstream */
626 }
627 
628 /**
629  * xemaclite_interrupt - Interrupt handler for this driver
630  * @irq:        Irq of the Emaclite device
631  * @dev_id:     Void pointer to the network device instance used as callback
632  *              reference
633  *
634  * This function handles the Tx and Rx interrupts of the EmacLite device.
635  */
636 static irqreturn_t xemaclite_interrupt(int irq, void *dev_id)
637 {
638         bool tx_complete = false;
639         struct net_device *dev = dev_id;
640         struct net_local *lp = netdev_priv(dev);
641         void __iomem *base_addr = lp->base_addr;
642         u32 tx_status;
643 
644         /* Check if there is Rx Data available */
645         if ((__raw_readl(base_addr + XEL_RSR_OFFSET) &
646                          XEL_RSR_RECV_DONE_MASK) ||
647             (__raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_RSR_OFFSET)
648                          & XEL_RSR_RECV_DONE_MASK))
649 
650                 xemaclite_rx_handler(dev);
651 
652         /* Check if the Transmission for the first buffer is completed */
653         tx_status = __raw_readl(base_addr + XEL_TSR_OFFSET);
654         if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
655                 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
656 
657                 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
658                 __raw_writel(tx_status, base_addr + XEL_TSR_OFFSET);
659 
660                 tx_complete = true;
661         }
662 
663         /* Check if the Transmission for the second buffer is completed */
664         tx_status = __raw_readl(base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
665         if (((tx_status & XEL_TSR_XMIT_BUSY_MASK) == 0) &&
666                 (tx_status & XEL_TSR_XMIT_ACTIVE_MASK) != 0) {
667 
668                 tx_status &= ~XEL_TSR_XMIT_ACTIVE_MASK;
669                 __raw_writel(tx_status, base_addr + XEL_BUFFER_OFFSET +
670                              XEL_TSR_OFFSET);
671 
672                 tx_complete = true;
673         }
674 
675         /* If there was a Tx interrupt, call the Tx Handler */
676         if (tx_complete != 0)
677                 xemaclite_tx_handler(dev);
678 
679         return IRQ_HANDLED;
680 }
681 
682 /**********************/
683 /* MDIO Bus functions */
684 /**********************/
685 
686 /**
687  * xemaclite_mdio_wait - Wait for the MDIO to be ready to use
688  * @lp:         Pointer to the Emaclite device private data
689  *
690  * This function waits till the device is ready to accept a new MDIO
691  * request.
692  *
693  * Return:      0 for success or ETIMEDOUT for a timeout
694  */
695 
696 static int xemaclite_mdio_wait(struct net_local *lp)
697 {
698         long end = jiffies + 2;
699 
700         /* wait for the MDIO interface to not be busy or timeout
701            after some time.
702         */
703         while (__raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET) &
704                         XEL_MDIOCTRL_MDIOSTS_MASK) {
705                 if (end - jiffies <= 0) {
706                         WARN_ON(1);
707                         return -ETIMEDOUT;
708                 }
709                 msleep(1);
710         }
711         return 0;
712 }
713 
714 /**
715  * xemaclite_mdio_read - Read from a given MII management register
716  * @bus:        the mii_bus struct
717  * @phy_id:     the phy address
718  * @reg:        register number to read from
719  *
720  * This function waits till the device is ready to accept a new MDIO
721  * request and then writes the phy address to the MDIO Address register
722  * and reads data from MDIO Read Data register, when its available.
723  *
724  * Return:      Value read from the MII management register
725  */
726 static int xemaclite_mdio_read(struct mii_bus *bus, int phy_id, int reg)
727 {
728         struct net_local *lp = bus->priv;
729         u32 ctrl_reg;
730         u32 rc;
731 
732         if (xemaclite_mdio_wait(lp))
733                 return -ETIMEDOUT;
734 
735         /* Write the PHY address, register number and set the OP bit in the
736          * MDIO Address register. Set the Status bit in the MDIO Control
737          * register to start a MDIO read transaction.
738          */
739         ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
740         __raw_writel(XEL_MDIOADDR_OP_MASK |
741                      ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
742                      lp->base_addr + XEL_MDIOADDR_OFFSET);
743         __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
744                      lp->base_addr + XEL_MDIOCTRL_OFFSET);
745 
746         if (xemaclite_mdio_wait(lp))
747                 return -ETIMEDOUT;
748 
749         rc = __raw_readl(lp->base_addr + XEL_MDIORD_OFFSET);
750 
751         dev_dbg(&lp->ndev->dev,
752                 "xemaclite_mdio_read(phy_id=%i, reg=%x) == %x\n",
753                 phy_id, reg, rc);
754 
755         return rc;
756 }
757 
758 /**
759  * xemaclite_mdio_write - Write to a given MII management register
760  * @bus:        the mii_bus struct
761  * @phy_id:     the phy address
762  * @reg:        register number to write to
763  * @val:        value to write to the register number specified by reg
764  *
765  * This function waits till the device is ready to accept a new MDIO
766  * request and then writes the val to the MDIO Write Data register.
767  */
768 static int xemaclite_mdio_write(struct mii_bus *bus, int phy_id, int reg,
769                                 u16 val)
770 {
771         struct net_local *lp = bus->priv;
772         u32 ctrl_reg;
773 
774         dev_dbg(&lp->ndev->dev,
775                 "xemaclite_mdio_write(phy_id=%i, reg=%x, val=%x)\n",
776                 phy_id, reg, val);
777 
778         if (xemaclite_mdio_wait(lp))
779                 return -ETIMEDOUT;
780 
781         /* Write the PHY address, register number and clear the OP bit in the
782          * MDIO Address register and then write the value into the MDIO Write
783          * Data register. Finally, set the Status bit in the MDIO Control
784          * register to start a MDIO write transaction.
785          */
786         ctrl_reg = __raw_readl(lp->base_addr + XEL_MDIOCTRL_OFFSET);
787         __raw_writel(~XEL_MDIOADDR_OP_MASK &
788                      ((phy_id << XEL_MDIOADDR_PHYADR_SHIFT) | reg),
789                      lp->base_addr + XEL_MDIOADDR_OFFSET);
790         __raw_writel(val, lp->base_addr + XEL_MDIOWR_OFFSET);
791         __raw_writel(ctrl_reg | XEL_MDIOCTRL_MDIOSTS_MASK,
792                      lp->base_addr + XEL_MDIOCTRL_OFFSET);
793 
794         return 0;
795 }
796 
797 /**
798  * xemaclite_mdio_setup - Register mii_bus for the Emaclite device
799  * @lp:         Pointer to the Emaclite device private data
800  * @ofdev:      Pointer to OF device structure
801  *
802  * This function enables MDIO bus in the Emaclite device and registers a
803  * mii_bus.
804  *
805  * Return:      0 upon success or a negative error upon failure
806  */
807 static int xemaclite_mdio_setup(struct net_local *lp, struct device *dev)
808 {
809         struct mii_bus *bus;
810         int rc;
811         struct resource res;
812         struct device_node *np = of_get_parent(lp->phy_node);
813         struct device_node *npp;
814 
815         /* Don't register the MDIO bus if the phy_node or its parent node
816          * can't be found.
817          */
818         if (!np) {
819                 dev_err(dev, "Failed to register mdio bus.\n");
820                 return -ENODEV;
821         }
822         npp = of_get_parent(np);
823 
824         of_address_to_resource(npp, 0, &res);
825         if (lp->ndev->mem_start != res.start) {
826                 struct phy_device *phydev;
827                 phydev = of_phy_find_device(lp->phy_node);
828                 if (!phydev)
829                         dev_info(dev,
830                                  "MDIO of the phy is not registered yet\n");
831                 return 0;
832         }
833 
834         /* Enable the MDIO bus by asserting the enable bit in MDIO Control
835          * register.
836          */
837         __raw_writel(XEL_MDIOCTRL_MDIOEN_MASK,
838                      lp->base_addr + XEL_MDIOCTRL_OFFSET);
839 
840         bus = mdiobus_alloc();
841         if (!bus) {
842                 dev_err(dev, "Failed to allocate mdiobus\n");
843                 return -ENOMEM;
844         }
845 
846         snprintf(bus->id, MII_BUS_ID_SIZE, "%.8llx",
847                  (unsigned long long)res.start);
848         bus->priv = lp;
849         bus->name = "Xilinx Emaclite MDIO";
850         bus->read = xemaclite_mdio_read;
851         bus->write = xemaclite_mdio_write;
852         bus->parent = dev;
853         bus->irq = lp->mdio_irqs; /* preallocated IRQ table */
854 
855         lp->mii_bus = bus;
856 
857         rc = of_mdiobus_register(bus, np);
858         if (rc) {
859                 dev_err(dev, "Failed to register mdio bus.\n");
860                 goto err_register;
861         }
862 
863         return 0;
864 
865 err_register:
866         mdiobus_free(bus);
867         return rc;
868 }
869 
870 /**
871  * xemaclite_adjust_link - Link state callback for the Emaclite device
872  * @ndev: pointer to net_device struct
873  *
874  * There's nothing in the Emaclite device to be configured when the link
875  * state changes. We just print the status.
876  */
877 static void xemaclite_adjust_link(struct net_device *ndev)
878 {
879         struct net_local *lp = netdev_priv(ndev);
880         struct phy_device *phy = lp->phy_dev;
881         int link_state;
882 
883         /* hash together the state values to decide if something has changed */
884         link_state = phy->speed | (phy->duplex << 1) | phy->link;
885 
886         if (lp->last_link != link_state) {
887                 lp->last_link = link_state;
888                 phy_print_status(phy);
889         }
890 }
891 
892 /**
893  * xemaclite_open - Open the network device
894  * @dev:        Pointer to the network device
895  *
896  * This function sets the MAC address, requests an IRQ and enables interrupts
897  * for the Emaclite device and starts the Tx queue.
898  * It also connects to the phy device, if MDIO is included in Emaclite device.
899  */
900 static int xemaclite_open(struct net_device *dev)
901 {
902         struct net_local *lp = netdev_priv(dev);
903         int retval;
904 
905         /* Just to be safe, stop the device first */
906         xemaclite_disable_interrupts(lp);
907 
908         if (lp->phy_node) {
909                 u32 bmcr;
910 
911                 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
912                                              xemaclite_adjust_link, 0,
913                                              PHY_INTERFACE_MODE_MII);
914                 if (!lp->phy_dev) {
915                         dev_err(&lp->ndev->dev, "of_phy_connect() failed\n");
916                         return -ENODEV;
917                 }
918 
919                 /* EmacLite doesn't support giga-bit speeds */
920                 lp->phy_dev->supported &= (PHY_BASIC_FEATURES);
921                 lp->phy_dev->advertising = lp->phy_dev->supported;
922 
923                 /* Don't advertise 1000BASE-T Full/Half duplex speeds */
924                 phy_write(lp->phy_dev, MII_CTRL1000, 0);
925 
926                 /* Advertise only 10 and 100mbps full/half duplex speeds */
927                 phy_write(lp->phy_dev, MII_ADVERTISE, ADVERTISE_ALL |
928                           ADVERTISE_CSMA);
929 
930                 /* Restart auto negotiation */
931                 bmcr = phy_read(lp->phy_dev, MII_BMCR);
932                 bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
933                 phy_write(lp->phy_dev, MII_BMCR, bmcr);
934 
935                 phy_start(lp->phy_dev);
936         }
937 
938         /* Set the MAC address each time opened */
939         xemaclite_update_address(lp, dev->dev_addr);
940 
941         /* Grab the IRQ */
942         retval = request_irq(dev->irq, xemaclite_interrupt, 0, dev->name, dev);
943         if (retval) {
944                 dev_err(&lp->ndev->dev, "Could not allocate interrupt %d\n",
945                         dev->irq);
946                 if (lp->phy_dev)
947                         phy_disconnect(lp->phy_dev);
948                 lp->phy_dev = NULL;
949 
950                 return retval;
951         }
952 
953         /* Enable Interrupts */
954         xemaclite_enable_interrupts(lp);
955 
956         /* We're ready to go */
957         netif_start_queue(dev);
958 
959         return 0;
960 }
961 
962 /**
963  * xemaclite_close - Close the network device
964  * @dev:        Pointer to the network device
965  *
966  * This function stops the Tx queue, disables interrupts and frees the IRQ for
967  * the Emaclite device.
968  * It also disconnects the phy device associated with the Emaclite device.
969  */
970 static int xemaclite_close(struct net_device *dev)
971 {
972         struct net_local *lp = netdev_priv(dev);
973 
974         netif_stop_queue(dev);
975         xemaclite_disable_interrupts(lp);
976         free_irq(dev->irq, dev);
977 
978         if (lp->phy_dev)
979                 phy_disconnect(lp->phy_dev);
980         lp->phy_dev = NULL;
981 
982         return 0;
983 }
984 
985 /**
986  * xemaclite_send - Transmit a frame
987  * @orig_skb:   Pointer to the socket buffer to be transmitted
988  * @dev:        Pointer to the network device
989  *
990  * This function checks if the Tx buffer of the Emaclite device is free to send
991  * data. If so, it fills the Tx buffer with data from socket buffer data,
992  * updates the stats and frees the socket buffer. The Tx completion is signaled
993  * by an interrupt. If the Tx buffer isn't free, then the socket buffer is
994  * deferred and the Tx queue is stopped so that the deferred socket buffer can
995  * be transmitted when the Emaclite device is free to transmit data.
996  *
997  * Return:      0, always.
998  */
999 static int xemaclite_send(struct sk_buff *orig_skb, struct net_device *dev)
1000 {
1001         struct net_local *lp = netdev_priv(dev);
1002         struct sk_buff *new_skb;
1003         unsigned int len;
1004         unsigned long flags;
1005 
1006         len = orig_skb->len;
1007 
1008         new_skb = orig_skb;
1009 
1010         spin_lock_irqsave(&lp->reset_lock, flags);
1011         if (xemaclite_send_data(lp, (u8 *) new_skb->data, len) != 0) {
1012                 /* If the Emaclite Tx buffer is busy, stop the Tx queue and
1013                  * defer the skb for transmission during the ISR, after the
1014                  * current transmission is complete */
1015                 netif_stop_queue(dev);
1016                 lp->deferred_skb = new_skb;
1017                 /* Take the time stamp now, since we can't do this in an ISR. */
1018                 skb_tx_timestamp(new_skb);
1019                 spin_unlock_irqrestore(&lp->reset_lock, flags);
1020                 return 0;
1021         }
1022         spin_unlock_irqrestore(&lp->reset_lock, flags);
1023 
1024         skb_tx_timestamp(new_skb);
1025 
1026         dev->stats.tx_bytes += len;
1027         dev_consume_skb_any(new_skb);
1028 
1029         return 0;
1030 }
1031 
1032 /**
1033  * xemaclite_remove_ndev - Free the network device
1034  * @ndev:       Pointer to the network device to be freed
1035  *
1036  * This function un maps the IO region of the Emaclite device and frees the net
1037  * device.
1038  */
1039 static void xemaclite_remove_ndev(struct net_device *ndev)
1040 {
1041         if (ndev) {
1042                 free_netdev(ndev);
1043         }
1044 }
1045 
1046 /**
1047  * get_bool - Get a parameter from the OF device
1048  * @ofdev:      Pointer to OF device structure
1049  * @s:          Property to be retrieved
1050  *
1051  * This function looks for a property in the device node and returns the value
1052  * of the property if its found or 0 if the property is not found.
1053  *
1054  * Return:      Value of the parameter if the parameter is found, or 0 otherwise
1055  */
1056 static bool get_bool(struct platform_device *ofdev, const char *s)
1057 {
1058         u32 *p = (u32 *)of_get_property(ofdev->dev.of_node, s, NULL);
1059 
1060         if (p) {
1061                 return (bool)*p;
1062         } else {
1063                 dev_warn(&ofdev->dev, "Parameter %s not found,"
1064                         "defaulting to false\n", s);
1065                 return 0;
1066         }
1067 }
1068 
1069 static struct net_device_ops xemaclite_netdev_ops;
1070 
1071 /**
1072  * xemaclite_of_probe - Probe method for the Emaclite device.
1073  * @ofdev:      Pointer to OF device structure
1074  * @match:      Pointer to the structure used for matching a device
1075  *
1076  * This function probes for the Emaclite device in the device tree.
1077  * It initializes the driver data structure and the hardware, sets the MAC
1078  * address and registers the network device.
1079  * It also registers a mii_bus for the Emaclite device, if MDIO is included
1080  * in the device.
1081  *
1082  * Return:      0, if the driver is bound to the Emaclite device, or
1083  *              a negative error if there is failure.
1084  */
1085 static int xemaclite_of_probe(struct platform_device *ofdev)
1086 {
1087         struct resource *res;
1088         struct net_device *ndev = NULL;
1089         struct net_local *lp = NULL;
1090         struct device *dev = &ofdev->dev;
1091         const void *mac_address;
1092 
1093         int rc = 0;
1094 
1095         dev_info(dev, "Device Tree Probing\n");
1096 
1097         /* Create an ethernet device instance */
1098         ndev = alloc_etherdev(sizeof(struct net_local));
1099         if (!ndev)
1100                 return -ENOMEM;
1101 
1102         dev_set_drvdata(dev, ndev);
1103         SET_NETDEV_DEV(ndev, &ofdev->dev);
1104 
1105         lp = netdev_priv(ndev);
1106         lp->ndev = ndev;
1107 
1108         /* Get IRQ for the device */
1109         res = platform_get_resource(ofdev, IORESOURCE_IRQ, 0);
1110         if (!res) {
1111                 dev_err(dev, "no IRQ found\n");
1112                 goto error;
1113         }
1114 
1115         ndev->irq = res->start;
1116 
1117         res = platform_get_resource(ofdev, IORESOURCE_MEM, 0);
1118         lp->base_addr = devm_ioremap_resource(&ofdev->dev, res);
1119         if (IS_ERR(lp->base_addr)) {
1120                 rc = PTR_ERR(lp->base_addr);
1121                 goto error;
1122         }
1123 
1124         ndev->mem_start = res->start;
1125         ndev->mem_end = res->end;
1126 
1127         spin_lock_init(&lp->reset_lock);
1128         lp->next_tx_buf_to_use = 0x0;
1129         lp->next_rx_buf_to_use = 0x0;
1130         lp->tx_ping_pong = get_bool(ofdev, "xlnx,tx-ping-pong");
1131         lp->rx_ping_pong = get_bool(ofdev, "xlnx,rx-ping-pong");
1132         mac_address = of_get_mac_address(ofdev->dev.of_node);
1133 
1134         if (mac_address)
1135                 /* Set the MAC address. */
1136                 memcpy(ndev->dev_addr, mac_address, ETH_ALEN);
1137         else
1138                 dev_warn(dev, "No MAC address found\n");
1139 
1140         /* Clear the Tx CSR's in case this is a restart */
1141         __raw_writel(0, lp->base_addr + XEL_TSR_OFFSET);
1142         __raw_writel(0, lp->base_addr + XEL_BUFFER_OFFSET + XEL_TSR_OFFSET);
1143 
1144         /* Set the MAC address in the EmacLite device */
1145         xemaclite_update_address(lp, ndev->dev_addr);
1146 
1147         lp->phy_node = of_parse_phandle(ofdev->dev.of_node, "phy-handle", 0);
1148         rc = xemaclite_mdio_setup(lp, &ofdev->dev);
1149         if (rc)
1150                 dev_warn(&ofdev->dev, "error registering MDIO bus\n");
1151 
1152         dev_info(dev, "MAC address is now %pM\n", ndev->dev_addr);
1153 
1154         ndev->netdev_ops = &xemaclite_netdev_ops;
1155         ndev->flags &= ~IFF_MULTICAST;
1156         ndev->watchdog_timeo = TX_TIMEOUT;
1157 
1158         /* Finally, register the device */
1159         rc = register_netdev(ndev);
1160         if (rc) {
1161                 dev_err(dev,
1162                         "Cannot register network device, aborting\n");
1163                 goto error;
1164         }
1165 
1166         dev_info(dev,
1167                  "Xilinx EmacLite at 0x%08X mapped to 0x%08X, irq=%d\n",
1168                  (unsigned int __force)ndev->mem_start,
1169                  (unsigned int __force)lp->base_addr, ndev->irq);
1170         return 0;
1171 
1172 error:
1173         xemaclite_remove_ndev(ndev);
1174         return rc;
1175 }
1176 
1177 /**
1178  * xemaclite_of_remove - Unbind the driver from the Emaclite device.
1179  * @of_dev:     Pointer to OF device structure
1180  *
1181  * This function is called if a device is physically removed from the system or
1182  * if the driver module is being unloaded. It frees any resources allocated to
1183  * the device.
1184  *
1185  * Return:      0, always.
1186  */
1187 static int xemaclite_of_remove(struct platform_device *of_dev)
1188 {
1189         struct net_device *ndev = platform_get_drvdata(of_dev);
1190 
1191         struct net_local *lp = netdev_priv(ndev);
1192 
1193         /* Un-register the mii_bus, if configured */
1194         if (lp->has_mdio) {
1195                 mdiobus_unregister(lp->mii_bus);
1196                 kfree(lp->mii_bus->irq);
1197                 mdiobus_free(lp->mii_bus);
1198                 lp->mii_bus = NULL;
1199         }
1200 
1201         unregister_netdev(ndev);
1202 
1203         if (lp->phy_node)
1204                 of_node_put(lp->phy_node);
1205         lp->phy_node = NULL;
1206 
1207         xemaclite_remove_ndev(ndev);
1208 
1209         return 0;
1210 }
1211 
1212 #ifdef CONFIG_NET_POLL_CONTROLLER
1213 static void
1214 xemaclite_poll_controller(struct net_device *ndev)
1215 {
1216         disable_irq(ndev->irq);
1217         xemaclite_interrupt(ndev->irq, ndev);
1218         enable_irq(ndev->irq);
1219 }
1220 #endif
1221 
1222 static struct net_device_ops xemaclite_netdev_ops = {
1223         .ndo_open               = xemaclite_open,
1224         .ndo_stop               = xemaclite_close,
1225         .ndo_start_xmit         = xemaclite_send,
1226         .ndo_set_mac_address    = xemaclite_set_mac_address,
1227         .ndo_tx_timeout         = xemaclite_tx_timeout,
1228 #ifdef CONFIG_NET_POLL_CONTROLLER
1229         .ndo_poll_controller = xemaclite_poll_controller,
1230 #endif
1231 };
1232 
1233 /* Match table for OF platform binding */
1234 static struct of_device_id xemaclite_of_match[] = {
1235         { .compatible = "xlnx,opb-ethernetlite-1.01.a", },
1236         { .compatible = "xlnx,opb-ethernetlite-1.01.b", },
1237         { .compatible = "xlnx,xps-ethernetlite-1.00.a", },
1238         { .compatible = "xlnx,xps-ethernetlite-2.00.a", },
1239         { .compatible = "xlnx,xps-ethernetlite-2.01.a", },
1240         { .compatible = "xlnx,xps-ethernetlite-3.00.a", },
1241         { /* end of list */ },
1242 };
1243 MODULE_DEVICE_TABLE(of, xemaclite_of_match);
1244 
1245 static struct platform_driver xemaclite_of_driver = {
1246         .driver = {
1247                 .name = DRIVER_NAME,
1248                 .owner = THIS_MODULE,
1249                 .of_match_table = xemaclite_of_match,
1250         },
1251         .probe          = xemaclite_of_probe,
1252         .remove         = xemaclite_of_remove,
1253 };
1254 
1255 module_platform_driver(xemaclite_of_driver);
1256 
1257 MODULE_AUTHOR("Xilinx, Inc.");
1258 MODULE_DESCRIPTION("Xilinx Ethernet MAC Lite driver");
1259 MODULE_LICENSE("GPL");
1260 

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