Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/net/ethernet/xilinx/ll_temac_main.c

  1 /*
  2  * Driver for Xilinx TEMAC Ethernet device
  3  *
  4  * Copyright (c) 2008 Nissin Systems Co., Ltd.,  Yoshio Kashiwagi
  5  * Copyright (c) 2005-2008 DLA Systems,  David H. Lynch Jr. <dhlii@dlasys.net>
  6  * Copyright (c) 2008-2009 Secret Lab Technologies Ltd.
  7  *
  8  * This is a driver for the Xilinx ll_temac ipcore which is often used
  9  * in the Virtex and Spartan series of chips.
 10  *
 11  * Notes:
 12  * - The ll_temac hardware uses indirect access for many of the TEMAC
 13  *   registers, include the MDIO bus.  However, indirect access to MDIO
 14  *   registers take considerably more clock cycles than to TEMAC registers.
 15  *   MDIO accesses are long, so threads doing them should probably sleep
 16  *   rather than busywait.  However, since only one indirect access can be
 17  *   in progress at any given time, that means that *all* indirect accesses
 18  *   could end up sleeping (to wait for an MDIO access to complete).
 19  *   Fortunately none of the indirect accesses are on the 'hot' path for tx
 20  *   or rx, so this should be okay.
 21  *
 22  * TODO:
 23  * - Factor out locallink DMA code into separate driver
 24  * - Fix multicast assignment.
 25  * - Fix support for hardware checksumming.
 26  * - Testing.  Lots and lots of testing.
 27  *
 28  */
 29 
 30 #include <linux/delay.h>
 31 #include <linux/etherdevice.h>
 32 #include <linux/mii.h>
 33 #include <linux/module.h>
 34 #include <linux/mutex.h>
 35 #include <linux/netdevice.h>
 36 #include <linux/of.h>
 37 #include <linux/of_device.h>
 38 #include <linux/of_irq.h>
 39 #include <linux/of_mdio.h>
 40 #include <linux/of_platform.h>
 41 #include <linux/of_address.h>
 42 #include <linux/skbuff.h>
 43 #include <linux/spinlock.h>
 44 #include <linux/tcp.h>      /* needed for sizeof(tcphdr) */
 45 #include <linux/udp.h>      /* needed for sizeof(udphdr) */
 46 #include <linux/phy.h>
 47 #include <linux/in.h>
 48 #include <linux/io.h>
 49 #include <linux/ip.h>
 50 #include <linux/slab.h>
 51 #include <linux/interrupt.h>
 52 #include <linux/dma-mapping.h>
 53 
 54 #include "ll_temac.h"
 55 
 56 #define TX_BD_NUM   64
 57 #define RX_BD_NUM   128
 58 
 59 /* ---------------------------------------------------------------------
 60  * Low level register access functions
 61  */
 62 
 63 u32 temac_ior(struct temac_local *lp, int offset)
 64 {
 65         return in_be32((u32 *)(lp->regs + offset));
 66 }
 67 
 68 void temac_iow(struct temac_local *lp, int offset, u32 value)
 69 {
 70         out_be32((u32 *) (lp->regs + offset), value);
 71 }
 72 
 73 int temac_indirect_busywait(struct temac_local *lp)
 74 {
 75         long end = jiffies + 2;
 76 
 77         while (!(temac_ior(lp, XTE_RDY0_OFFSET) & XTE_RDY0_HARD_ACS_RDY_MASK)) {
 78                 if (end - jiffies <= 0) {
 79                         WARN_ON(1);
 80                         return -ETIMEDOUT;
 81                 }
 82                 msleep(1);
 83         }
 84         return 0;
 85 }
 86 
 87 /**
 88  * temac_indirect_in32
 89  *
 90  * lp->indirect_mutex must be held when calling this function
 91  */
 92 u32 temac_indirect_in32(struct temac_local *lp, int reg)
 93 {
 94         u32 val;
 95 
 96         if (temac_indirect_busywait(lp))
 97                 return -ETIMEDOUT;
 98         temac_iow(lp, XTE_CTL0_OFFSET, reg);
 99         if (temac_indirect_busywait(lp))
100                 return -ETIMEDOUT;
101         val = temac_ior(lp, XTE_LSW0_OFFSET);
102 
103         return val;
104 }
105 
106 /**
107  * temac_indirect_out32
108  *
109  * lp->indirect_mutex must be held when calling this function
110  */
111 void temac_indirect_out32(struct temac_local *lp, int reg, u32 value)
112 {
113         if (temac_indirect_busywait(lp))
114                 return;
115         temac_iow(lp, XTE_LSW0_OFFSET, value);
116         temac_iow(lp, XTE_CTL0_OFFSET, CNTLREG_WRITE_ENABLE_MASK | reg);
117         temac_indirect_busywait(lp);
118 }
119 
120 /**
121  * temac_dma_in32 - Memory mapped DMA read, this function expects a
122  * register input that is based on DCR word addresses which
123  * are then converted to memory mapped byte addresses
124  */
125 static u32 temac_dma_in32(struct temac_local *lp, int reg)
126 {
127         return in_be32((u32 *)(lp->sdma_regs + (reg << 2)));
128 }
129 
130 /**
131  * temac_dma_out32 - Memory mapped DMA read, this function expects a
132  * register input that is based on DCR word addresses which
133  * are then converted to memory mapped byte addresses
134  */
135 static void temac_dma_out32(struct temac_local *lp, int reg, u32 value)
136 {
137         out_be32((u32 *)(lp->sdma_regs + (reg << 2)), value);
138 }
139 
140 /* DMA register access functions can be DCR based or memory mapped.
141  * The PowerPC 440 is DCR based, the PowerPC 405 and MicroBlaze are both
142  * memory mapped.
143  */
144 #ifdef CONFIG_PPC_DCR
145 
146 /**
147  * temac_dma_dcr_in32 - DCR based DMA read
148  */
149 static u32 temac_dma_dcr_in(struct temac_local *lp, int reg)
150 {
151         return dcr_read(lp->sdma_dcrs, reg);
152 }
153 
154 /**
155  * temac_dma_dcr_out32 - DCR based DMA write
156  */
157 static void temac_dma_dcr_out(struct temac_local *lp, int reg, u32 value)
158 {
159         dcr_write(lp->sdma_dcrs, reg, value);
160 }
161 
162 /**
163  * temac_dcr_setup - If the DMA is DCR based, then setup the address and
164  * I/O  functions
165  */
166 static int temac_dcr_setup(struct temac_local *lp, struct platform_device *op,
167                                 struct device_node *np)
168 {
169         unsigned int dcrs;
170 
171         /* setup the dcr address mapping if it's in the device tree */
172 
173         dcrs = dcr_resource_start(np, 0);
174         if (dcrs != 0) {
175                 lp->sdma_dcrs = dcr_map(np, dcrs, dcr_resource_len(np, 0));
176                 lp->dma_in = temac_dma_dcr_in;
177                 lp->dma_out = temac_dma_dcr_out;
178                 dev_dbg(&op->dev, "DCR base: %x\n", dcrs);
179                 return 0;
180         }
181         /* no DCR in the device tree, indicate a failure */
182         return -1;
183 }
184 
185 #else
186 
187 /*
188  * temac_dcr_setup - This is a stub for when DCR is not supported,
189  * such as with MicroBlaze
190  */
191 static int temac_dcr_setup(struct temac_local *lp, struct platform_device *op,
192                                 struct device_node *np)
193 {
194         return -1;
195 }
196 
197 #endif
198 
199 /**
200  * temac_dma_bd_release - Release buffer descriptor rings
201  */
202 static void temac_dma_bd_release(struct net_device *ndev)
203 {
204         struct temac_local *lp = netdev_priv(ndev);
205         int i;
206 
207         /* Reset Local Link (DMA) */
208         lp->dma_out(lp, DMA_CONTROL_REG, DMA_CONTROL_RST);
209 
210         for (i = 0; i < RX_BD_NUM; i++) {
211                 if (!lp->rx_skb[i])
212                         break;
213                 else {
214                         dma_unmap_single(ndev->dev.parent, lp->rx_bd_v[i].phys,
215                                         XTE_MAX_JUMBO_FRAME_SIZE, DMA_FROM_DEVICE);
216                         dev_kfree_skb(lp->rx_skb[i]);
217                 }
218         }
219         if (lp->rx_bd_v)
220                 dma_free_coherent(ndev->dev.parent,
221                                 sizeof(*lp->rx_bd_v) * RX_BD_NUM,
222                                 lp->rx_bd_v, lp->rx_bd_p);
223         if (lp->tx_bd_v)
224                 dma_free_coherent(ndev->dev.parent,
225                                 sizeof(*lp->tx_bd_v) * TX_BD_NUM,
226                                 lp->tx_bd_v, lp->tx_bd_p);
227         if (lp->rx_skb)
228                 kfree(lp->rx_skb);
229 }
230 
231 /**
232  * temac_dma_bd_init - Setup buffer descriptor rings
233  */
234 static int temac_dma_bd_init(struct net_device *ndev)
235 {
236         struct temac_local *lp = netdev_priv(ndev);
237         struct sk_buff *skb;
238         int i;
239 
240         lp->rx_skb = kcalloc(RX_BD_NUM, sizeof(*lp->rx_skb), GFP_KERNEL);
241         if (!lp->rx_skb)
242                 goto out;
243 
244         /* allocate the tx and rx ring buffer descriptors. */
245         /* returns a virtual address and a physical address. */
246         lp->tx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
247                                           sizeof(*lp->tx_bd_v) * TX_BD_NUM,
248                                           &lp->tx_bd_p, GFP_KERNEL);
249         if (!lp->tx_bd_v)
250                 goto out;
251 
252         lp->rx_bd_v = dma_zalloc_coherent(ndev->dev.parent,
253                                           sizeof(*lp->rx_bd_v) * RX_BD_NUM,
254                                           &lp->rx_bd_p, GFP_KERNEL);
255         if (!lp->rx_bd_v)
256                 goto out;
257 
258         for (i = 0; i < TX_BD_NUM; i++) {
259                 lp->tx_bd_v[i].next = lp->tx_bd_p +
260                                 sizeof(*lp->tx_bd_v) * ((i + 1) % TX_BD_NUM);
261         }
262 
263         for (i = 0; i < RX_BD_NUM; i++) {
264                 lp->rx_bd_v[i].next = lp->rx_bd_p +
265                                 sizeof(*lp->rx_bd_v) * ((i + 1) % RX_BD_NUM);
266 
267                 skb = netdev_alloc_skb_ip_align(ndev,
268                                                 XTE_MAX_JUMBO_FRAME_SIZE);
269                 if (!skb)
270                         goto out;
271 
272                 lp->rx_skb[i] = skb;
273                 /* returns physical address of skb->data */
274                 lp->rx_bd_v[i].phys = dma_map_single(ndev->dev.parent,
275                                                      skb->data,
276                                                      XTE_MAX_JUMBO_FRAME_SIZE,
277                                                      DMA_FROM_DEVICE);
278                 lp->rx_bd_v[i].len = XTE_MAX_JUMBO_FRAME_SIZE;
279                 lp->rx_bd_v[i].app0 = STS_CTRL_APP0_IRQONEND;
280         }
281 
282         lp->dma_out(lp, TX_CHNL_CTRL, 0x10220400 |
283                                           CHNL_CTRL_IRQ_EN |
284                                           CHNL_CTRL_IRQ_DLY_EN |
285                                           CHNL_CTRL_IRQ_COAL_EN);
286         /* 0x10220483 */
287         /* 0x00100483 */
288         lp->dma_out(lp, RX_CHNL_CTRL, 0xff070000 |
289                                           CHNL_CTRL_IRQ_EN |
290                                           CHNL_CTRL_IRQ_DLY_EN |
291                                           CHNL_CTRL_IRQ_COAL_EN |
292                                           CHNL_CTRL_IRQ_IOE);
293         /* 0xff010283 */
294 
295         lp->dma_out(lp, RX_CURDESC_PTR,  lp->rx_bd_p);
296         lp->dma_out(lp, RX_TAILDESC_PTR,
297                        lp->rx_bd_p + (sizeof(*lp->rx_bd_v) * (RX_BD_NUM - 1)));
298         lp->dma_out(lp, TX_CURDESC_PTR, lp->tx_bd_p);
299 
300         /* Init descriptor indexes */
301         lp->tx_bd_ci = 0;
302         lp->tx_bd_next = 0;
303         lp->tx_bd_tail = 0;
304         lp->rx_bd_ci = 0;
305 
306         return 0;
307 
308 out:
309         temac_dma_bd_release(ndev);
310         return -ENOMEM;
311 }
312 
313 /* ---------------------------------------------------------------------
314  * net_device_ops
315  */
316 
317 static void temac_do_set_mac_address(struct net_device *ndev)
318 {
319         struct temac_local *lp = netdev_priv(ndev);
320 
321         /* set up unicast MAC address filter set its mac address */
322         mutex_lock(&lp->indirect_mutex);
323         temac_indirect_out32(lp, XTE_UAW0_OFFSET,
324                              (ndev->dev_addr[0]) |
325                              (ndev->dev_addr[1] << 8) |
326                              (ndev->dev_addr[2] << 16) |
327                              (ndev->dev_addr[3] << 24));
328         /* There are reserved bits in EUAW1
329          * so don't affect them Set MAC bits [47:32] in EUAW1 */
330         temac_indirect_out32(lp, XTE_UAW1_OFFSET,
331                              (ndev->dev_addr[4] & 0x000000ff) |
332                              (ndev->dev_addr[5] << 8));
333         mutex_unlock(&lp->indirect_mutex);
334 }
335 
336 static int temac_init_mac_address(struct net_device *ndev, void *address)
337 {
338         memcpy(ndev->dev_addr, address, ETH_ALEN);
339         if (!is_valid_ether_addr(ndev->dev_addr))
340                 eth_hw_addr_random(ndev);
341         temac_do_set_mac_address(ndev);
342         return 0;
343 }
344 
345 static int temac_set_mac_address(struct net_device *ndev, void *p)
346 {
347         struct sockaddr *addr = p;
348 
349         if (!is_valid_ether_addr(addr->sa_data))
350                 return -EADDRNOTAVAIL;
351         memcpy(ndev->dev_addr, addr->sa_data, ETH_ALEN);
352         temac_do_set_mac_address(ndev);
353         return 0;
354 }
355 
356 static void temac_set_multicast_list(struct net_device *ndev)
357 {
358         struct temac_local *lp = netdev_priv(ndev);
359         u32 multi_addr_msw, multi_addr_lsw, val;
360         int i;
361 
362         mutex_lock(&lp->indirect_mutex);
363         if (ndev->flags & (IFF_ALLMULTI | IFF_PROMISC) ||
364             netdev_mc_count(ndev) > MULTICAST_CAM_TABLE_NUM) {
365                 /*
366                  *      We must make the kernel realise we had to move
367                  *      into promisc mode or we start all out war on
368                  *      the cable. If it was a promisc request the
369                  *      flag is already set. If not we assert it.
370                  */
371                 ndev->flags |= IFF_PROMISC;
372                 temac_indirect_out32(lp, XTE_AFM_OFFSET, XTE_AFM_EPPRM_MASK);
373                 dev_info(&ndev->dev, "Promiscuous mode enabled.\n");
374         } else if (!netdev_mc_empty(ndev)) {
375                 struct netdev_hw_addr *ha;
376 
377                 i = 0;
378                 netdev_for_each_mc_addr(ha, ndev) {
379                         if (i >= MULTICAST_CAM_TABLE_NUM)
380                                 break;
381                         multi_addr_msw = ((ha->addr[3] << 24) |
382                                           (ha->addr[2] << 16) |
383                                           (ha->addr[1] << 8) |
384                                           (ha->addr[0]));
385                         temac_indirect_out32(lp, XTE_MAW0_OFFSET,
386                                              multi_addr_msw);
387                         multi_addr_lsw = ((ha->addr[5] << 8) |
388                                           (ha->addr[4]) | (i << 16));
389                         temac_indirect_out32(lp, XTE_MAW1_OFFSET,
390                                              multi_addr_lsw);
391                         i++;
392                 }
393         } else {
394                 val = temac_indirect_in32(lp, XTE_AFM_OFFSET);
395                 temac_indirect_out32(lp, XTE_AFM_OFFSET,
396                                      val & ~XTE_AFM_EPPRM_MASK);
397                 temac_indirect_out32(lp, XTE_MAW0_OFFSET, 0);
398                 temac_indirect_out32(lp, XTE_MAW1_OFFSET, 0);
399                 dev_info(&ndev->dev, "Promiscuous mode disabled.\n");
400         }
401         mutex_unlock(&lp->indirect_mutex);
402 }
403 
404 struct temac_option {
405         int flg;
406         u32 opt;
407         u32 reg;
408         u32 m_or;
409         u32 m_and;
410 } temac_options[] = {
411         /* Turn on jumbo packet support for both Rx and Tx */
412         {
413                 .opt = XTE_OPTION_JUMBO,
414                 .reg = XTE_TXC_OFFSET,
415                 .m_or = XTE_TXC_TXJMBO_MASK,
416         },
417         {
418                 .opt = XTE_OPTION_JUMBO,
419                 .reg = XTE_RXC1_OFFSET,
420                 .m_or =XTE_RXC1_RXJMBO_MASK,
421         },
422         /* Turn on VLAN packet support for both Rx and Tx */
423         {
424                 .opt = XTE_OPTION_VLAN,
425                 .reg = XTE_TXC_OFFSET,
426                 .m_or =XTE_TXC_TXVLAN_MASK,
427         },
428         {
429                 .opt = XTE_OPTION_VLAN,
430                 .reg = XTE_RXC1_OFFSET,
431                 .m_or =XTE_RXC1_RXVLAN_MASK,
432         },
433         /* Turn on FCS stripping on receive packets */
434         {
435                 .opt = XTE_OPTION_FCS_STRIP,
436                 .reg = XTE_RXC1_OFFSET,
437                 .m_or =XTE_RXC1_RXFCS_MASK,
438         },
439         /* Turn on FCS insertion on transmit packets */
440         {
441                 .opt = XTE_OPTION_FCS_INSERT,
442                 .reg = XTE_TXC_OFFSET,
443                 .m_or =XTE_TXC_TXFCS_MASK,
444         },
445         /* Turn on length/type field checking on receive packets */
446         {
447                 .opt = XTE_OPTION_LENTYPE_ERR,
448                 .reg = XTE_RXC1_OFFSET,
449                 .m_or =XTE_RXC1_RXLT_MASK,
450         },
451         /* Turn on flow control */
452         {
453                 .opt = XTE_OPTION_FLOW_CONTROL,
454                 .reg = XTE_FCC_OFFSET,
455                 .m_or =XTE_FCC_RXFLO_MASK,
456         },
457         /* Turn on flow control */
458         {
459                 .opt = XTE_OPTION_FLOW_CONTROL,
460                 .reg = XTE_FCC_OFFSET,
461                 .m_or =XTE_FCC_TXFLO_MASK,
462         },
463         /* Turn on promiscuous frame filtering (all frames are received ) */
464         {
465                 .opt = XTE_OPTION_PROMISC,
466                 .reg = XTE_AFM_OFFSET,
467                 .m_or =XTE_AFM_EPPRM_MASK,
468         },
469         /* Enable transmitter if not already enabled */
470         {
471                 .opt = XTE_OPTION_TXEN,
472                 .reg = XTE_TXC_OFFSET,
473                 .m_or =XTE_TXC_TXEN_MASK,
474         },
475         /* Enable receiver? */
476         {
477                 .opt = XTE_OPTION_RXEN,
478                 .reg = XTE_RXC1_OFFSET,
479                 .m_or =XTE_RXC1_RXEN_MASK,
480         },
481         {}
482 };
483 
484 /**
485  * temac_setoptions
486  */
487 static u32 temac_setoptions(struct net_device *ndev, u32 options)
488 {
489         struct temac_local *lp = netdev_priv(ndev);
490         struct temac_option *tp = &temac_options[0];
491         int reg;
492 
493         mutex_lock(&lp->indirect_mutex);
494         while (tp->opt) {
495                 reg = temac_indirect_in32(lp, tp->reg) & ~tp->m_or;
496                 if (options & tp->opt)
497                         reg |= tp->m_or;
498                 temac_indirect_out32(lp, tp->reg, reg);
499                 tp++;
500         }
501         lp->options |= options;
502         mutex_unlock(&lp->indirect_mutex);
503 
504         return 0;
505 }
506 
507 /* Initialize temac */
508 static void temac_device_reset(struct net_device *ndev)
509 {
510         struct temac_local *lp = netdev_priv(ndev);
511         u32 timeout;
512         u32 val;
513 
514         /* Perform a software reset */
515 
516         /* 0x300 host enable bit ? */
517         /* reset PHY through control register ?:1 */
518 
519         dev_dbg(&ndev->dev, "%s()\n", __func__);
520 
521         mutex_lock(&lp->indirect_mutex);
522         /* Reset the receiver and wait for it to finish reset */
523         temac_indirect_out32(lp, XTE_RXC1_OFFSET, XTE_RXC1_RXRST_MASK);
524         timeout = 1000;
525         while (temac_indirect_in32(lp, XTE_RXC1_OFFSET) & XTE_RXC1_RXRST_MASK) {
526                 udelay(1);
527                 if (--timeout == 0) {
528                         dev_err(&ndev->dev,
529                                 "temac_device_reset RX reset timeout!!\n");
530                         break;
531                 }
532         }
533 
534         /* Reset the transmitter and wait for it to finish reset */
535         temac_indirect_out32(lp, XTE_TXC_OFFSET, XTE_TXC_TXRST_MASK);
536         timeout = 1000;
537         while (temac_indirect_in32(lp, XTE_TXC_OFFSET) & XTE_TXC_TXRST_MASK) {
538                 udelay(1);
539                 if (--timeout == 0) {
540                         dev_err(&ndev->dev,
541                                 "temac_device_reset TX reset timeout!!\n");
542                         break;
543                 }
544         }
545 
546         /* Disable the receiver */
547         val = temac_indirect_in32(lp, XTE_RXC1_OFFSET);
548         temac_indirect_out32(lp, XTE_RXC1_OFFSET, val & ~XTE_RXC1_RXEN_MASK);
549 
550         /* Reset Local Link (DMA) */
551         lp->dma_out(lp, DMA_CONTROL_REG, DMA_CONTROL_RST);
552         timeout = 1000;
553         while (lp->dma_in(lp, DMA_CONTROL_REG) & DMA_CONTROL_RST) {
554                 udelay(1);
555                 if (--timeout == 0) {
556                         dev_err(&ndev->dev,
557                                 "temac_device_reset DMA reset timeout!!\n");
558                         break;
559                 }
560         }
561         lp->dma_out(lp, DMA_CONTROL_REG, DMA_TAIL_ENABLE);
562 
563         if (temac_dma_bd_init(ndev)) {
564                 dev_err(&ndev->dev,
565                                 "temac_device_reset descriptor allocation failed\n");
566         }
567 
568         temac_indirect_out32(lp, XTE_RXC0_OFFSET, 0);
569         temac_indirect_out32(lp, XTE_RXC1_OFFSET, 0);
570         temac_indirect_out32(lp, XTE_TXC_OFFSET, 0);
571         temac_indirect_out32(lp, XTE_FCC_OFFSET, XTE_FCC_RXFLO_MASK);
572 
573         mutex_unlock(&lp->indirect_mutex);
574 
575         /* Sync default options with HW
576          * but leave receiver and transmitter disabled.  */
577         temac_setoptions(ndev,
578                          lp->options & ~(XTE_OPTION_TXEN | XTE_OPTION_RXEN));
579 
580         temac_do_set_mac_address(ndev);
581 
582         /* Set address filter table */
583         temac_set_multicast_list(ndev);
584         if (temac_setoptions(ndev, lp->options))
585                 dev_err(&ndev->dev, "Error setting TEMAC options\n");
586 
587         /* Init Driver variable */
588         ndev->trans_start = jiffies; /* prevent tx timeout */
589 }
590 
591 void temac_adjust_link(struct net_device *ndev)
592 {
593         struct temac_local *lp = netdev_priv(ndev);
594         struct phy_device *phy = lp->phy_dev;
595         u32 mii_speed;
596         int link_state;
597 
598         /* hash together the state values to decide if something has changed */
599         link_state = phy->speed | (phy->duplex << 1) | phy->link;
600 
601         mutex_lock(&lp->indirect_mutex);
602         if (lp->last_link != link_state) {
603                 mii_speed = temac_indirect_in32(lp, XTE_EMCFG_OFFSET);
604                 mii_speed &= ~XTE_EMCFG_LINKSPD_MASK;
605 
606                 switch (phy->speed) {
607                 case SPEED_1000: mii_speed |= XTE_EMCFG_LINKSPD_1000; break;
608                 case SPEED_100: mii_speed |= XTE_EMCFG_LINKSPD_100; break;
609                 case SPEED_10: mii_speed |= XTE_EMCFG_LINKSPD_10; break;
610                 }
611 
612                 /* Write new speed setting out to TEMAC */
613                 temac_indirect_out32(lp, XTE_EMCFG_OFFSET, mii_speed);
614                 lp->last_link = link_state;
615                 phy_print_status(phy);
616         }
617         mutex_unlock(&lp->indirect_mutex);
618 }
619 
620 static void temac_start_xmit_done(struct net_device *ndev)
621 {
622         struct temac_local *lp = netdev_priv(ndev);
623         struct cdmac_bd *cur_p;
624         unsigned int stat = 0;
625 
626         cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
627         stat = cur_p->app0;
628 
629         while (stat & STS_CTRL_APP0_CMPLT) {
630                 dma_unmap_single(ndev->dev.parent, cur_p->phys, cur_p->len,
631                                  DMA_TO_DEVICE);
632                 if (cur_p->app4)
633                         dev_kfree_skb_irq((struct sk_buff *)cur_p->app4);
634                 cur_p->app0 = 0;
635                 cur_p->app1 = 0;
636                 cur_p->app2 = 0;
637                 cur_p->app3 = 0;
638                 cur_p->app4 = 0;
639 
640                 ndev->stats.tx_packets++;
641                 ndev->stats.tx_bytes += cur_p->len;
642 
643                 lp->tx_bd_ci++;
644                 if (lp->tx_bd_ci >= TX_BD_NUM)
645                         lp->tx_bd_ci = 0;
646 
647                 cur_p = &lp->tx_bd_v[lp->tx_bd_ci];
648                 stat = cur_p->app0;
649         }
650 
651         netif_wake_queue(ndev);
652 }
653 
654 static inline int temac_check_tx_bd_space(struct temac_local *lp, int num_frag)
655 {
656         struct cdmac_bd *cur_p;
657         int tail;
658 
659         tail = lp->tx_bd_tail;
660         cur_p = &lp->tx_bd_v[tail];
661 
662         do {
663                 if (cur_p->app0)
664                         return NETDEV_TX_BUSY;
665 
666                 tail++;
667                 if (tail >= TX_BD_NUM)
668                         tail = 0;
669 
670                 cur_p = &lp->tx_bd_v[tail];
671                 num_frag--;
672         } while (num_frag >= 0);
673 
674         return 0;
675 }
676 
677 static int temac_start_xmit(struct sk_buff *skb, struct net_device *ndev)
678 {
679         struct temac_local *lp = netdev_priv(ndev);
680         struct cdmac_bd *cur_p;
681         dma_addr_t start_p, tail_p;
682         int ii;
683         unsigned long num_frag;
684         skb_frag_t *frag;
685 
686         num_frag = skb_shinfo(skb)->nr_frags;
687         frag = &skb_shinfo(skb)->frags[0];
688         start_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
689         cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
690 
691         if (temac_check_tx_bd_space(lp, num_frag)) {
692                 if (!netif_queue_stopped(ndev)) {
693                         netif_stop_queue(ndev);
694                         return NETDEV_TX_BUSY;
695                 }
696                 return NETDEV_TX_BUSY;
697         }
698 
699         cur_p->app0 = 0;
700         if (skb->ip_summed == CHECKSUM_PARTIAL) {
701                 unsigned int csum_start_off = skb_checksum_start_offset(skb);
702                 unsigned int csum_index_off = csum_start_off + skb->csum_offset;
703 
704                 cur_p->app0 |= 1; /* TX Checksum Enabled */
705                 cur_p->app1 = (csum_start_off << 16) | csum_index_off;
706                 cur_p->app2 = 0;  /* initial checksum seed */
707         }
708 
709         cur_p->app0 |= STS_CTRL_APP0_SOP;
710         cur_p->len = skb_headlen(skb);
711         cur_p->phys = dma_map_single(ndev->dev.parent, skb->data, skb->len,
712                                      DMA_TO_DEVICE);
713         cur_p->app4 = (unsigned long)skb;
714 
715         for (ii = 0; ii < num_frag; ii++) {
716                 lp->tx_bd_tail++;
717                 if (lp->tx_bd_tail >= TX_BD_NUM)
718                         lp->tx_bd_tail = 0;
719 
720                 cur_p = &lp->tx_bd_v[lp->tx_bd_tail];
721                 cur_p->phys = dma_map_single(ndev->dev.parent,
722                                              skb_frag_address(frag),
723                                              skb_frag_size(frag), DMA_TO_DEVICE);
724                 cur_p->len = skb_frag_size(frag);
725                 cur_p->app0 = 0;
726                 frag++;
727         }
728         cur_p->app0 |= STS_CTRL_APP0_EOP;
729 
730         tail_p = lp->tx_bd_p + sizeof(*lp->tx_bd_v) * lp->tx_bd_tail;
731         lp->tx_bd_tail++;
732         if (lp->tx_bd_tail >= TX_BD_NUM)
733                 lp->tx_bd_tail = 0;
734 
735         skb_tx_timestamp(skb);
736 
737         /* Kick off the transfer */
738         lp->dma_out(lp, TX_TAILDESC_PTR, tail_p); /* DMA start */
739 
740         return NETDEV_TX_OK;
741 }
742 
743 
744 static void ll_temac_recv(struct net_device *ndev)
745 {
746         struct temac_local *lp = netdev_priv(ndev);
747         struct sk_buff *skb, *new_skb;
748         unsigned int bdstat;
749         struct cdmac_bd *cur_p;
750         dma_addr_t tail_p;
751         int length;
752         unsigned long flags;
753 
754         spin_lock_irqsave(&lp->rx_lock, flags);
755 
756         tail_p = lp->rx_bd_p + sizeof(*lp->rx_bd_v) * lp->rx_bd_ci;
757         cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
758 
759         bdstat = cur_p->app0;
760         while ((bdstat & STS_CTRL_APP0_CMPLT)) {
761 
762                 skb = lp->rx_skb[lp->rx_bd_ci];
763                 length = cur_p->app4 & 0x3FFF;
764 
765                 dma_unmap_single(ndev->dev.parent, cur_p->phys, length,
766                                  DMA_FROM_DEVICE);
767 
768                 skb_put(skb, length);
769                 skb->protocol = eth_type_trans(skb, ndev);
770                 skb_checksum_none_assert(skb);
771 
772                 /* if we're doing rx csum offload, set it up */
773                 if (((lp->temac_features & TEMAC_FEATURE_RX_CSUM) != 0) &&
774                     (skb->protocol == htons(ETH_P_IP)) &&
775                     (skb->len > 64)) {
776 
777                         skb->csum = cur_p->app3 & 0xFFFF;
778                         skb->ip_summed = CHECKSUM_COMPLETE;
779                 }
780 
781                 if (!skb_defer_rx_timestamp(skb))
782                         netif_rx(skb);
783 
784                 ndev->stats.rx_packets++;
785                 ndev->stats.rx_bytes += length;
786 
787                 new_skb = netdev_alloc_skb_ip_align(ndev,
788                                                 XTE_MAX_JUMBO_FRAME_SIZE);
789                 if (!new_skb) {
790                         spin_unlock_irqrestore(&lp->rx_lock, flags);
791                         return;
792                 }
793 
794                 cur_p->app0 = STS_CTRL_APP0_IRQONEND;
795                 cur_p->phys = dma_map_single(ndev->dev.parent, new_skb->data,
796                                              XTE_MAX_JUMBO_FRAME_SIZE,
797                                              DMA_FROM_DEVICE);
798                 cur_p->len = XTE_MAX_JUMBO_FRAME_SIZE;
799                 lp->rx_skb[lp->rx_bd_ci] = new_skb;
800 
801                 lp->rx_bd_ci++;
802                 if (lp->rx_bd_ci >= RX_BD_NUM)
803                         lp->rx_bd_ci = 0;
804 
805                 cur_p = &lp->rx_bd_v[lp->rx_bd_ci];
806                 bdstat = cur_p->app0;
807         }
808         lp->dma_out(lp, RX_TAILDESC_PTR, tail_p);
809 
810         spin_unlock_irqrestore(&lp->rx_lock, flags);
811 }
812 
813 static irqreturn_t ll_temac_tx_irq(int irq, void *_ndev)
814 {
815         struct net_device *ndev = _ndev;
816         struct temac_local *lp = netdev_priv(ndev);
817         unsigned int status;
818 
819         status = lp->dma_in(lp, TX_IRQ_REG);
820         lp->dma_out(lp, TX_IRQ_REG, status);
821 
822         if (status & (IRQ_COAL | IRQ_DLY))
823                 temac_start_xmit_done(lp->ndev);
824         if (status & 0x080)
825                 dev_err(&ndev->dev, "DMA error 0x%x\n", status);
826 
827         return IRQ_HANDLED;
828 }
829 
830 static irqreturn_t ll_temac_rx_irq(int irq, void *_ndev)
831 {
832         struct net_device *ndev = _ndev;
833         struct temac_local *lp = netdev_priv(ndev);
834         unsigned int status;
835 
836         /* Read and clear the status registers */
837         status = lp->dma_in(lp, RX_IRQ_REG);
838         lp->dma_out(lp, RX_IRQ_REG, status);
839 
840         if (status & (IRQ_COAL | IRQ_DLY))
841                 ll_temac_recv(lp->ndev);
842 
843         return IRQ_HANDLED;
844 }
845 
846 static int temac_open(struct net_device *ndev)
847 {
848         struct temac_local *lp = netdev_priv(ndev);
849         int rc;
850 
851         dev_dbg(&ndev->dev, "temac_open()\n");
852 
853         if (lp->phy_node) {
854                 lp->phy_dev = of_phy_connect(lp->ndev, lp->phy_node,
855                                              temac_adjust_link, 0, 0);
856                 if (!lp->phy_dev) {
857                         dev_err(lp->dev, "of_phy_connect() failed\n");
858                         return -ENODEV;
859                 }
860 
861                 phy_start(lp->phy_dev);
862         }
863 
864         temac_device_reset(ndev);
865 
866         rc = request_irq(lp->tx_irq, ll_temac_tx_irq, 0, ndev->name, ndev);
867         if (rc)
868                 goto err_tx_irq;
869         rc = request_irq(lp->rx_irq, ll_temac_rx_irq, 0, ndev->name, ndev);
870         if (rc)
871                 goto err_rx_irq;
872 
873         return 0;
874 
875  err_rx_irq:
876         free_irq(lp->tx_irq, ndev);
877  err_tx_irq:
878         if (lp->phy_dev)
879                 phy_disconnect(lp->phy_dev);
880         lp->phy_dev = NULL;
881         dev_err(lp->dev, "request_irq() failed\n");
882         return rc;
883 }
884 
885 static int temac_stop(struct net_device *ndev)
886 {
887         struct temac_local *lp = netdev_priv(ndev);
888 
889         dev_dbg(&ndev->dev, "temac_close()\n");
890 
891         free_irq(lp->tx_irq, ndev);
892         free_irq(lp->rx_irq, ndev);
893 
894         if (lp->phy_dev)
895                 phy_disconnect(lp->phy_dev);
896         lp->phy_dev = NULL;
897 
898         temac_dma_bd_release(ndev);
899 
900         return 0;
901 }
902 
903 #ifdef CONFIG_NET_POLL_CONTROLLER
904 static void
905 temac_poll_controller(struct net_device *ndev)
906 {
907         struct temac_local *lp = netdev_priv(ndev);
908 
909         disable_irq(lp->tx_irq);
910         disable_irq(lp->rx_irq);
911 
912         ll_temac_rx_irq(lp->tx_irq, ndev);
913         ll_temac_tx_irq(lp->rx_irq, ndev);
914 
915         enable_irq(lp->tx_irq);
916         enable_irq(lp->rx_irq);
917 }
918 #endif
919 
920 static int temac_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
921 {
922         struct temac_local *lp = netdev_priv(ndev);
923 
924         if (!netif_running(ndev))
925                 return -EINVAL;
926 
927         if (!lp->phy_dev)
928                 return -EINVAL;
929 
930         return phy_mii_ioctl(lp->phy_dev, rq, cmd);
931 }
932 
933 static const struct net_device_ops temac_netdev_ops = {
934         .ndo_open = temac_open,
935         .ndo_stop = temac_stop,
936         .ndo_start_xmit = temac_start_xmit,
937         .ndo_set_mac_address = temac_set_mac_address,
938         .ndo_validate_addr = eth_validate_addr,
939         .ndo_do_ioctl = temac_ioctl,
940 #ifdef CONFIG_NET_POLL_CONTROLLER
941         .ndo_poll_controller = temac_poll_controller,
942 #endif
943 };
944 
945 /* ---------------------------------------------------------------------
946  * SYSFS device attributes
947  */
948 static ssize_t temac_show_llink_regs(struct device *dev,
949                                      struct device_attribute *attr, char *buf)
950 {
951         struct net_device *ndev = dev_get_drvdata(dev);
952         struct temac_local *lp = netdev_priv(ndev);
953         int i, len = 0;
954 
955         for (i = 0; i < 0x11; i++)
956                 len += sprintf(buf + len, "%.8x%s", lp->dma_in(lp, i),
957                                (i % 8) == 7 ? "\n" : " ");
958         len += sprintf(buf + len, "\n");
959 
960         return len;
961 }
962 
963 static DEVICE_ATTR(llink_regs, 0440, temac_show_llink_regs, NULL);
964 
965 static struct attribute *temac_device_attrs[] = {
966         &dev_attr_llink_regs.attr,
967         NULL,
968 };
969 
970 static const struct attribute_group temac_attr_group = {
971         .attrs = temac_device_attrs,
972 };
973 
974 /* ethtool support */
975 static int temac_get_settings(struct net_device *ndev, struct ethtool_cmd *cmd)
976 {
977         struct temac_local *lp = netdev_priv(ndev);
978         return phy_ethtool_gset(lp->phy_dev, cmd);
979 }
980 
981 static int temac_set_settings(struct net_device *ndev, struct ethtool_cmd *cmd)
982 {
983         struct temac_local *lp = netdev_priv(ndev);
984         return phy_ethtool_sset(lp->phy_dev, cmd);
985 }
986 
987 static int temac_nway_reset(struct net_device *ndev)
988 {
989         struct temac_local *lp = netdev_priv(ndev);
990         return phy_start_aneg(lp->phy_dev);
991 }
992 
993 static const struct ethtool_ops temac_ethtool_ops = {
994         .get_settings = temac_get_settings,
995         .set_settings = temac_set_settings,
996         .nway_reset = temac_nway_reset,
997         .get_link = ethtool_op_get_link,
998         .get_ts_info = ethtool_op_get_ts_info,
999 };
1000 
1001 static int temac_of_probe(struct platform_device *op)
1002 {
1003         struct device_node *np;
1004         struct temac_local *lp;
1005         struct net_device *ndev;
1006         const void *addr;
1007         __be32 *p;
1008         int size, rc = 0;
1009 
1010         /* Init network device structure */
1011         ndev = alloc_etherdev(sizeof(*lp));
1012         if (!ndev)
1013                 return -ENOMEM;
1014 
1015         ether_setup(ndev);
1016         platform_set_drvdata(op, ndev);
1017         SET_NETDEV_DEV(ndev, &op->dev);
1018         ndev->flags &= ~IFF_MULTICAST;  /* clear multicast */
1019         ndev->features = NETIF_F_SG;
1020         ndev->netdev_ops = &temac_netdev_ops;
1021         ndev->ethtool_ops = &temac_ethtool_ops;
1022 #if 0
1023         ndev->features |= NETIF_F_IP_CSUM; /* Can checksum TCP/UDP over IPv4. */
1024         ndev->features |= NETIF_F_HW_CSUM; /* Can checksum all the packets. */
1025         ndev->features |= NETIF_F_IPV6_CSUM; /* Can checksum IPV6 TCP/UDP */
1026         ndev->features |= NETIF_F_HIGHDMA; /* Can DMA to high memory. */
1027         ndev->features |= NETIF_F_HW_VLAN_CTAG_TX; /* Transmit VLAN hw accel */
1028         ndev->features |= NETIF_F_HW_VLAN_CTAG_RX; /* Receive VLAN hw acceleration */
1029         ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER; /* Receive VLAN filtering */
1030         ndev->features |= NETIF_F_VLAN_CHALLENGED; /* cannot handle VLAN pkts */
1031         ndev->features |= NETIF_F_GSO; /* Enable software GSO. */
1032         ndev->features |= NETIF_F_MULTI_QUEUE; /* Has multiple TX/RX queues */
1033         ndev->features |= NETIF_F_LRO; /* large receive offload */
1034 #endif
1035 
1036         /* setup temac private info structure */
1037         lp = netdev_priv(ndev);
1038         lp->ndev = ndev;
1039         lp->dev = &op->dev;
1040         lp->options = XTE_OPTION_DEFAULTS;
1041         spin_lock_init(&lp->rx_lock);
1042         mutex_init(&lp->indirect_mutex);
1043 
1044         /* map device registers */
1045         lp->regs = of_iomap(op->dev.of_node, 0);
1046         if (!lp->regs) {
1047                 dev_err(&op->dev, "could not map temac regs.\n");
1048                 goto nodev;
1049         }
1050 
1051         /* Setup checksum offload, but default to off if not specified */
1052         lp->temac_features = 0;
1053         p = (__be32 *)of_get_property(op->dev.of_node, "xlnx,txcsum", NULL);
1054         if (p && be32_to_cpu(*p)) {
1055                 lp->temac_features |= TEMAC_FEATURE_TX_CSUM;
1056                 /* Can checksum TCP/UDP over IPv4. */
1057                 ndev->features |= NETIF_F_IP_CSUM;
1058         }
1059         p = (__be32 *)of_get_property(op->dev.of_node, "xlnx,rxcsum", NULL);
1060         if (p && be32_to_cpu(*p))
1061                 lp->temac_features |= TEMAC_FEATURE_RX_CSUM;
1062 
1063         /* Find the DMA node, map the DMA registers, and decode the DMA IRQs */
1064         np = of_parse_phandle(op->dev.of_node, "llink-connected", 0);
1065         if (!np) {
1066                 dev_err(&op->dev, "could not find DMA node\n");
1067                 goto err_iounmap;
1068         }
1069 
1070         /* Setup the DMA register accesses, could be DCR or memory mapped */
1071         if (temac_dcr_setup(lp, op, np)) {
1072 
1073                 /* no DCR in the device tree, try non-DCR */
1074                 lp->sdma_regs = of_iomap(np, 0);
1075                 if (lp->sdma_regs) {
1076                         lp->dma_in = temac_dma_in32;
1077                         lp->dma_out = temac_dma_out32;
1078                         dev_dbg(&op->dev, "MEM base: %p\n", lp->sdma_regs);
1079                 } else {
1080                         dev_err(&op->dev, "unable to map DMA registers\n");
1081                         of_node_put(np);
1082                         goto err_iounmap;
1083                 }
1084         }
1085 
1086         lp->rx_irq = irq_of_parse_and_map(np, 0);
1087         lp->tx_irq = irq_of_parse_and_map(np, 1);
1088 
1089         of_node_put(np); /* Finished with the DMA node; drop the reference */
1090 
1091         if (!lp->rx_irq || !lp->tx_irq) {
1092                 dev_err(&op->dev, "could not determine irqs\n");
1093                 rc = -ENOMEM;
1094                 goto err_iounmap_2;
1095         }
1096 
1097 
1098         /* Retrieve the MAC address */
1099         addr = of_get_property(op->dev.of_node, "local-mac-address", &size);
1100         if ((!addr) || (size != 6)) {
1101                 dev_err(&op->dev, "could not find MAC address\n");
1102                 rc = -ENODEV;
1103                 goto err_iounmap_2;
1104         }
1105         temac_init_mac_address(ndev, (void *)addr);
1106 
1107         rc = temac_mdio_setup(lp, op->dev.of_node);
1108         if (rc)
1109                 dev_warn(&op->dev, "error registering MDIO bus\n");
1110 
1111         lp->phy_node = of_parse_phandle(op->dev.of_node, "phy-handle", 0);
1112         if (lp->phy_node)
1113                 dev_dbg(lp->dev, "using PHY node %s (%p)\n", np->full_name, np);
1114 
1115         /* Add the device attributes */
1116         rc = sysfs_create_group(&lp->dev->kobj, &temac_attr_group);
1117         if (rc) {
1118                 dev_err(lp->dev, "Error creating sysfs files\n");
1119                 goto err_iounmap_2;
1120         }
1121 
1122         rc = register_netdev(lp->ndev);
1123         if (rc) {
1124                 dev_err(lp->dev, "register_netdev() error (%i)\n", rc);
1125                 goto err_register_ndev;
1126         }
1127 
1128         return 0;
1129 
1130  err_register_ndev:
1131         sysfs_remove_group(&lp->dev->kobj, &temac_attr_group);
1132  err_iounmap_2:
1133         if (lp->sdma_regs)
1134                 iounmap(lp->sdma_regs);
1135  err_iounmap:
1136         iounmap(lp->regs);
1137  nodev:
1138         free_netdev(ndev);
1139         ndev = NULL;
1140         return rc;
1141 }
1142 
1143 static int temac_of_remove(struct platform_device *op)
1144 {
1145         struct net_device *ndev = platform_get_drvdata(op);
1146         struct temac_local *lp = netdev_priv(ndev);
1147 
1148         temac_mdio_teardown(lp);
1149         unregister_netdev(ndev);
1150         sysfs_remove_group(&lp->dev->kobj, &temac_attr_group);
1151         if (lp->phy_node)
1152                 of_node_put(lp->phy_node);
1153         lp->phy_node = NULL;
1154         iounmap(lp->regs);
1155         if (lp->sdma_regs)
1156                 iounmap(lp->sdma_regs);
1157         free_netdev(ndev);
1158         return 0;
1159 }
1160 
1161 static struct of_device_id temac_of_match[] = {
1162         { .compatible = "xlnx,xps-ll-temac-1.01.b", },
1163         { .compatible = "xlnx,xps-ll-temac-2.00.a", },
1164         { .compatible = "xlnx,xps-ll-temac-2.02.a", },
1165         { .compatible = "xlnx,xps-ll-temac-2.03.a", },
1166         {},
1167 };
1168 MODULE_DEVICE_TABLE(of, temac_of_match);
1169 
1170 static struct platform_driver temac_of_driver = {
1171         .probe = temac_of_probe,
1172         .remove = temac_of_remove,
1173         .driver = {
1174                 .owner = THIS_MODULE,
1175                 .name = "xilinx_temac",
1176                 .of_match_table = temac_of_match,
1177         },
1178 };
1179 
1180 module_platform_driver(temac_of_driver);
1181 
1182 MODULE_DESCRIPTION("Xilinx LL_TEMAC Ethernet driver");
1183 MODULE_AUTHOR("Yoshio Kashiwagi");
1184 MODULE_LICENSE("GPL");
1185 

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