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Linux/drivers/net/ethernet/ti/cpsw-phy-sel.c

  1 /* Texas Instruments Ethernet Switch Driver
  2  *
  3  * Copyright (C) 2013 Texas Instruments
  4  *
  5  * This program is free software; you can redistribute it and/or
  6  * modify it under the terms of the GNU General Public License
  7  * version 2 as published by the Free Software Foundation.
  8  *
  9  * This program is distributed "as is" WITHOUT ANY WARRANTY of any
 10  * kind, whether express or implied; without even the implied warranty
 11  * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 12  * GNU General Public License for more details.
 13  */
 14 
 15 #include <linux/platform_device.h>
 16 #include <linux/module.h>
 17 #include <linux/netdevice.h>
 18 #include <linux/phy.h>
 19 #include <linux/of.h>
 20 #include <linux/of_device.h>
 21 
 22 #include "cpsw.h"
 23 
 24 /* AM33xx SoC specific definitions for the CONTROL port */
 25 #define AM33XX_GMII_SEL_MODE_MII        0
 26 #define AM33XX_GMII_SEL_MODE_RMII       1
 27 #define AM33XX_GMII_SEL_MODE_RGMII      2
 28 
 29 #define AM33XX_GMII_SEL_RMII2_IO_CLK_EN BIT(7)
 30 #define AM33XX_GMII_SEL_RMII1_IO_CLK_EN BIT(6)
 31 
 32 struct cpsw_phy_sel_priv {
 33         struct device   *dev;
 34         u32 __iomem     *gmii_sel;
 35         bool            rmii_clock_external;
 36         void (*cpsw_phy_sel)(struct cpsw_phy_sel_priv *priv,
 37                              phy_interface_t phy_mode, int slave);
 38 };
 39 
 40 
 41 static void cpsw_gmii_sel_am3352(struct cpsw_phy_sel_priv *priv,
 42                                  phy_interface_t phy_mode, int slave)
 43 {
 44         u32 reg;
 45         u32 mask;
 46         u32 mode = 0;
 47 
 48         reg = readl(priv->gmii_sel);
 49 
 50         switch (phy_mode) {
 51         case PHY_INTERFACE_MODE_RMII:
 52                 mode = AM33XX_GMII_SEL_MODE_RMII;
 53                 break;
 54 
 55         case PHY_INTERFACE_MODE_RGMII:
 56         case PHY_INTERFACE_MODE_RGMII_ID:
 57         case PHY_INTERFACE_MODE_RGMII_RXID:
 58         case PHY_INTERFACE_MODE_RGMII_TXID:
 59                 mode = AM33XX_GMII_SEL_MODE_RGMII;
 60                 break;
 61 
 62         case PHY_INTERFACE_MODE_MII:
 63         default:
 64                 mode = AM33XX_GMII_SEL_MODE_MII;
 65                 break;
 66         };
 67 
 68         mask = 0x3 << (slave * 2) | BIT(slave + 6);
 69         mode <<= slave * 2;
 70 
 71         if (priv->rmii_clock_external) {
 72                 if (slave == 0)
 73                         mode |= AM33XX_GMII_SEL_RMII1_IO_CLK_EN;
 74                 else
 75                         mode |= AM33XX_GMII_SEL_RMII2_IO_CLK_EN;
 76         }
 77 
 78         reg &= ~mask;
 79         reg |= mode;
 80 
 81         writel(reg, priv->gmii_sel);
 82 }
 83 
 84 static struct platform_driver cpsw_phy_sel_driver;
 85 static int match(struct device *dev, void *data)
 86 {
 87         struct device_node *node = (struct device_node *)data;
 88         return dev->of_node == node &&
 89                 dev->driver == &cpsw_phy_sel_driver.driver;
 90 }
 91 
 92 void cpsw_phy_sel(struct device *dev, phy_interface_t phy_mode, int slave)
 93 {
 94         struct device_node *node;
 95         struct cpsw_phy_sel_priv *priv;
 96 
 97         node = of_get_child_by_name(dev->of_node, "cpsw-phy-sel");
 98         if (!node) {
 99                 dev_err(dev, "Phy mode driver DT not found\n");
100                 return;
101         }
102 
103         dev = bus_find_device(&platform_bus_type, NULL, node, match);
104         priv = dev_get_drvdata(dev);
105 
106         priv->cpsw_phy_sel(priv, phy_mode, slave);
107 }
108 EXPORT_SYMBOL_GPL(cpsw_phy_sel);
109 
110 static const struct of_device_id cpsw_phy_sel_id_table[] = {
111         {
112                 .compatible     = "ti,am3352-cpsw-phy-sel",
113                 .data           = &cpsw_gmii_sel_am3352,
114         },
115         {}
116 };
117 MODULE_DEVICE_TABLE(of, cpsw_phy_sel_id_table);
118 
119 static int cpsw_phy_sel_probe(struct platform_device *pdev)
120 {
121         struct resource *res;
122         const struct of_device_id *of_id;
123         struct cpsw_phy_sel_priv *priv;
124 
125         of_id = of_match_node(cpsw_phy_sel_id_table, pdev->dev.of_node);
126         if (!of_id)
127                 return -EINVAL;
128 
129         priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
130         if (!priv) {
131                 dev_err(&pdev->dev, "unable to alloc memory for cpsw phy sel\n");
132                 return -ENOMEM;
133         }
134 
135         priv->cpsw_phy_sel = of_id->data;
136 
137         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "gmii-sel");
138         priv->gmii_sel = devm_ioremap_resource(&pdev->dev, res);
139         if (IS_ERR(priv->gmii_sel))
140                 return PTR_ERR(priv->gmii_sel);
141 
142         if (of_find_property(pdev->dev.of_node, "rmii-clock-ext", NULL))
143                 priv->rmii_clock_external = true;
144 
145         dev_set_drvdata(&pdev->dev, priv);
146 
147         return 0;
148 }
149 
150 static struct platform_driver cpsw_phy_sel_driver = {
151         .probe          = cpsw_phy_sel_probe,
152         .driver         = {
153                 .name   = "cpsw-phy-sel",
154                 .owner  = THIS_MODULE,
155                 .of_match_table = cpsw_phy_sel_id_table,
156         },
157 };
158 
159 module_platform_driver(cpsw_phy_sel_driver);
160 MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>");
161 MODULE_LICENSE("GPL v2");
162 

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