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Linux/drivers/net/ethernet/smsc/smc91x.c

  1 /*
  2  * smc91x.c
  3  * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
  4  *
  5  * Copyright (C) 1996 by Erik Stahlman
  6  * Copyright (C) 2001 Standard Microsystems Corporation
  7  *      Developed by Simple Network Magic Corporation
  8  * Copyright (C) 2003 Monta Vista Software, Inc.
  9  *      Unified SMC91x driver by Nicolas Pitre
 10  *
 11  * This program is free software; you can redistribute it and/or modify
 12  * it under the terms of the GNU General Public License as published by
 13  * the Free Software Foundation; either version 2 of the License, or
 14  * (at your option) any later version.
 15  *
 16  * This program is distributed in the hope that it will be useful,
 17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19  * GNU General Public License for more details.
 20  *
 21  * You should have received a copy of the GNU General Public License
 22  * along with this program; if not, see <http://www.gnu.org/licenses/>.
 23  *
 24  * Arguments:
 25  *      io      = for the base address
 26  *      irq     = for the IRQ
 27  *      nowait  = 0 for normal wait states, 1 eliminates additional wait states
 28  *
 29  * original author:
 30  *      Erik Stahlman <erik@vt.edu>
 31  *
 32  * hardware multicast code:
 33  *    Peter Cammaert <pc@denkart.be>
 34  *
 35  * contributors:
 36  *      Daris A Nevil <dnevil@snmc.com>
 37  *      Nicolas Pitre <nico@fluxnic.net>
 38  *      Russell King <rmk@arm.linux.org.uk>
 39  *
 40  * History:
 41  *   08/20/00  Arnaldo Melo       fix kfree(skb) in smc_hardware_send_packet
 42  *   12/15/00  Christian Jullien  fix "Warning: kfree_skb on hard IRQ"
 43  *   03/16/01  Daris A Nevil      modified smc9194.c for use with LAN91C111
 44  *   08/22/01  Scott Anderson     merge changes from smc9194 to smc91111
 45  *   08/21/01  Pramod B Bhardwaj  added support for RevB of LAN91C111
 46  *   12/20/01  Jeff Sutherland    initial port to Xscale PXA with DMA support
 47  *   04/07/03  Nicolas Pitre      unified SMC91x driver, killed irq races,
 48  *                                more bus abstraction, big cleanup, etc.
 49  *   29/09/03  Russell King       - add driver model support
 50  *                                - ethtool support
 51  *                                - convert to use generic MII interface
 52  *                                - add link up/down notification
 53  *                                - don't try to handle full negotiation in
 54  *                                  smc_phy_configure
 55  *                                - clean up (and fix stack overrun) in PHY
 56  *                                  MII read/write functions
 57  *   22/09/04  Nicolas Pitre      big update (see commit log for details)
 58  */
 59 static const char version[] =
 60         "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@fluxnic.net>";
 61 
 62 /* Debugging level */
 63 #ifndef SMC_DEBUG
 64 #define SMC_DEBUG               0
 65 #endif
 66 
 67 
 68 #include <linux/module.h>
 69 #include <linux/kernel.h>
 70 #include <linux/sched.h>
 71 #include <linux/delay.h>
 72 #include <linux/interrupt.h>
 73 #include <linux/irq.h>
 74 #include <linux/errno.h>
 75 #include <linux/ioport.h>
 76 #include <linux/crc32.h>
 77 #include <linux/platform_device.h>
 78 #include <linux/spinlock.h>
 79 #include <linux/ethtool.h>
 80 #include <linux/mii.h>
 81 #include <linux/workqueue.h>
 82 #include <linux/of.h>
 83 #include <linux/of_device.h>
 84 
 85 #include <linux/netdevice.h>
 86 #include <linux/etherdevice.h>
 87 #include <linux/skbuff.h>
 88 
 89 #include <asm/io.h>
 90 
 91 #include "smc91x.h"
 92 
 93 #ifndef SMC_NOWAIT
 94 # define SMC_NOWAIT             0
 95 #endif
 96 static int nowait = SMC_NOWAIT;
 97 module_param(nowait, int, 0400);
 98 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
 99 
100 /*
101  * Transmit timeout, default 5 seconds.
102  */
103 static int watchdog = 1000;
104 module_param(watchdog, int, 0400);
105 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
106 
107 MODULE_LICENSE("GPL");
108 MODULE_ALIAS("platform:smc91x");
109 
110 /*
111  * The internal workings of the driver.  If you are changing anything
112  * here with the SMC stuff, you should have the datasheet and know
113  * what you are doing.
114  */
115 #define CARDNAME "smc91x"
116 
117 /*
118  * Use power-down feature of the chip
119  */
120 #define POWER_DOWN              1
121 
122 /*
123  * Wait time for memory to be free.  This probably shouldn't be
124  * tuned that much, as waiting for this means nothing else happens
125  * in the system
126  */
127 #define MEMORY_WAIT_TIME        16
128 
129 /*
130  * The maximum number of processing loops allowed for each call to the
131  * IRQ handler.
132  */
133 #define MAX_IRQ_LOOPS           8
134 
135 /*
136  * This selects whether TX packets are sent one by one to the SMC91x internal
137  * memory and throttled until transmission completes.  This may prevent
138  * RX overruns a litle by keeping much of the memory free for RX packets
139  * but to the expense of reduced TX throughput and increased IRQ overhead.
140  * Note this is not a cure for a too slow data bus or too high IRQ latency.
141  */
142 #define THROTTLE_TX_PKTS        0
143 
144 /*
145  * The MII clock high/low times.  2x this number gives the MII clock period
146  * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
147  */
148 #define MII_DELAY               1
149 
150 #define DBG(n, dev, fmt, ...)                                   \
151         do {                                                    \
152                 if (SMC_DEBUG >= (n))                           \
153                         netdev_dbg(dev, fmt, ##__VA_ARGS__);    \
154         } while (0)
155 
156 #define PRINTK(dev, fmt, ...)                                   \
157         do {                                                    \
158                 if (SMC_DEBUG > 0)                              \
159                         netdev_info(dev, fmt, ##__VA_ARGS__);   \
160                 else                                            \
161                         netdev_dbg(dev, fmt, ##__VA_ARGS__);    \
162         } while (0)
163 
164 #if SMC_DEBUG > 3
165 static void PRINT_PKT(u_char *buf, int length)
166 {
167         int i;
168         int remainder;
169         int lines;
170 
171         lines = length / 16;
172         remainder = length % 16;
173 
174         for (i = 0; i < lines ; i ++) {
175                 int cur;
176                 printk(KERN_DEBUG);
177                 for (cur = 0; cur < 8; cur++) {
178                         u_char a, b;
179                         a = *buf++;
180                         b = *buf++;
181                         pr_cont("%02x%02x ", a, b);
182                 }
183                 pr_cont("\n");
184         }
185         printk(KERN_DEBUG);
186         for (i = 0; i < remainder/2 ; i++) {
187                 u_char a, b;
188                 a = *buf++;
189                 b = *buf++;
190                 pr_cont("%02x%02x ", a, b);
191         }
192         pr_cont("\n");
193 }
194 #else
195 static inline void PRINT_PKT(u_char *buf, int length) { }
196 #endif
197 
198 
199 /* this enables an interrupt in the interrupt mask register */
200 #define SMC_ENABLE_INT(lp, x) do {                                      \
201         unsigned char mask;                                             \
202         unsigned long smc_enable_flags;                                 \
203         spin_lock_irqsave(&lp->lock, smc_enable_flags);                 \
204         mask = SMC_GET_INT_MASK(lp);                                    \
205         mask |= (x);                                                    \
206         SMC_SET_INT_MASK(lp, mask);                                     \
207         spin_unlock_irqrestore(&lp->lock, smc_enable_flags);            \
208 } while (0)
209 
210 /* this disables an interrupt from the interrupt mask register */
211 #define SMC_DISABLE_INT(lp, x) do {                                     \
212         unsigned char mask;                                             \
213         unsigned long smc_disable_flags;                                \
214         spin_lock_irqsave(&lp->lock, smc_disable_flags);                \
215         mask = SMC_GET_INT_MASK(lp);                                    \
216         mask &= ~(x);                                                   \
217         SMC_SET_INT_MASK(lp, mask);                                     \
218         spin_unlock_irqrestore(&lp->lock, smc_disable_flags);           \
219 } while (0)
220 
221 /*
222  * Wait while MMU is busy.  This is usually in the order of a few nanosecs
223  * if at all, but let's avoid deadlocking the system if the hardware
224  * decides to go south.
225  */
226 #define SMC_WAIT_MMU_BUSY(lp) do {                                      \
227         if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) {          \
228                 unsigned long timeout = jiffies + 2;                    \
229                 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) {         \
230                         if (time_after(jiffies, timeout)) {             \
231                                 netdev_dbg(dev, "timeout %s line %d\n", \
232                                            __FILE__, __LINE__);         \
233                                 break;                                  \
234                         }                                               \
235                         cpu_relax();                                    \
236                 }                                                       \
237         }                                                               \
238 } while (0)
239 
240 
241 /*
242  * this does a soft reset on the device
243  */
244 static void smc_reset(struct net_device *dev)
245 {
246         struct smc_local *lp = netdev_priv(dev);
247         void __iomem *ioaddr = lp->base;
248         unsigned int ctl, cfg;
249         struct sk_buff *pending_skb;
250 
251         DBG(2, dev, "%s\n", __func__);
252 
253         /* Disable all interrupts, block TX tasklet */
254         spin_lock_irq(&lp->lock);
255         SMC_SELECT_BANK(lp, 2);
256         SMC_SET_INT_MASK(lp, 0);
257         pending_skb = lp->pending_tx_skb;
258         lp->pending_tx_skb = NULL;
259         spin_unlock_irq(&lp->lock);
260 
261         /* free any pending tx skb */
262         if (pending_skb) {
263                 dev_kfree_skb(pending_skb);
264                 dev->stats.tx_errors++;
265                 dev->stats.tx_aborted_errors++;
266         }
267 
268         /*
269          * This resets the registers mostly to defaults, but doesn't
270          * affect EEPROM.  That seems unnecessary
271          */
272         SMC_SELECT_BANK(lp, 0);
273         SMC_SET_RCR(lp, RCR_SOFTRST);
274 
275         /*
276          * Setup the Configuration Register
277          * This is necessary because the CONFIG_REG is not affected
278          * by a soft reset
279          */
280         SMC_SELECT_BANK(lp, 1);
281 
282         cfg = CONFIG_DEFAULT;
283 
284         /*
285          * Setup for fast accesses if requested.  If the card/system
286          * can't handle it then there will be no recovery except for
287          * a hard reset or power cycle
288          */
289         if (lp->cfg.flags & SMC91X_NOWAIT)
290                 cfg |= CONFIG_NO_WAIT;
291 
292         /*
293          * Release from possible power-down state
294          * Configuration register is not affected by Soft Reset
295          */
296         cfg |= CONFIG_EPH_POWER_EN;
297 
298         SMC_SET_CONFIG(lp, cfg);
299 
300         /* this should pause enough for the chip to be happy */
301         /*
302          * elaborate?  What does the chip _need_? --jgarzik
303          *
304          * This seems to be undocumented, but something the original
305          * driver(s) have always done.  Suspect undocumented timing
306          * info/determined empirically. --rmk
307          */
308         udelay(1);
309 
310         /* Disable transmit and receive functionality */
311         SMC_SELECT_BANK(lp, 0);
312         SMC_SET_RCR(lp, RCR_CLEAR);
313         SMC_SET_TCR(lp, TCR_CLEAR);
314 
315         SMC_SELECT_BANK(lp, 1);
316         ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
317 
318         /*
319          * Set the control register to automatically release successfully
320          * transmitted packets, to make the best use out of our limited
321          * memory
322          */
323         if(!THROTTLE_TX_PKTS)
324                 ctl |= CTL_AUTO_RELEASE;
325         else
326                 ctl &= ~CTL_AUTO_RELEASE;
327         SMC_SET_CTL(lp, ctl);
328 
329         /* Reset the MMU */
330         SMC_SELECT_BANK(lp, 2);
331         SMC_SET_MMU_CMD(lp, MC_RESET);
332         SMC_WAIT_MMU_BUSY(lp);
333 }
334 
335 /*
336  * Enable Interrupts, Receive, and Transmit
337  */
338 static void smc_enable(struct net_device *dev)
339 {
340         struct smc_local *lp = netdev_priv(dev);
341         void __iomem *ioaddr = lp->base;
342         int mask;
343 
344         DBG(2, dev, "%s\n", __func__);
345 
346         /* see the header file for options in TCR/RCR DEFAULT */
347         SMC_SELECT_BANK(lp, 0);
348         SMC_SET_TCR(lp, lp->tcr_cur_mode);
349         SMC_SET_RCR(lp, lp->rcr_cur_mode);
350 
351         SMC_SELECT_BANK(lp, 1);
352         SMC_SET_MAC_ADDR(lp, dev->dev_addr);
353 
354         /* now, enable interrupts */
355         mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
356         if (lp->version >= (CHIP_91100 << 4))
357                 mask |= IM_MDINT;
358         SMC_SELECT_BANK(lp, 2);
359         SMC_SET_INT_MASK(lp, mask);
360 
361         /*
362          * From this point the register bank must _NOT_ be switched away
363          * to something else than bank 2 without proper locking against
364          * races with any tasklet or interrupt handlers until smc_shutdown()
365          * or smc_reset() is called.
366          */
367 }
368 
369 /*
370  * this puts the device in an inactive state
371  */
372 static void smc_shutdown(struct net_device *dev)
373 {
374         struct smc_local *lp = netdev_priv(dev);
375         void __iomem *ioaddr = lp->base;
376         struct sk_buff *pending_skb;
377 
378         DBG(2, dev, "%s: %s\n", CARDNAME, __func__);
379 
380         /* no more interrupts for me */
381         spin_lock_irq(&lp->lock);
382         SMC_SELECT_BANK(lp, 2);
383         SMC_SET_INT_MASK(lp, 0);
384         pending_skb = lp->pending_tx_skb;
385         lp->pending_tx_skb = NULL;
386         spin_unlock_irq(&lp->lock);
387         if (pending_skb)
388                 dev_kfree_skb(pending_skb);
389 
390         /* and tell the card to stay away from that nasty outside world */
391         SMC_SELECT_BANK(lp, 0);
392         SMC_SET_RCR(lp, RCR_CLEAR);
393         SMC_SET_TCR(lp, TCR_CLEAR);
394 
395 #ifdef POWER_DOWN
396         /* finally, shut the chip down */
397         SMC_SELECT_BANK(lp, 1);
398         SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
399 #endif
400 }
401 
402 /*
403  * This is the procedure to handle the receipt of a packet.
404  */
405 static inline void  smc_rcv(struct net_device *dev)
406 {
407         struct smc_local *lp = netdev_priv(dev);
408         void __iomem *ioaddr = lp->base;
409         unsigned int packet_number, status, packet_len;
410 
411         DBG(3, dev, "%s\n", __func__);
412 
413         packet_number = SMC_GET_RXFIFO(lp);
414         if (unlikely(packet_number & RXFIFO_REMPTY)) {
415                 PRINTK(dev, "smc_rcv with nothing on FIFO.\n");
416                 return;
417         }
418 
419         /* read from start of packet */
420         SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
421 
422         /* First two words are status and packet length */
423         SMC_GET_PKT_HDR(lp, status, packet_len);
424         packet_len &= 0x07ff;  /* mask off top bits */
425         DBG(2, dev, "RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
426             packet_number, status, packet_len, packet_len);
427 
428         back:
429         if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
430                 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
431                         /* accept VLAN packets */
432                         status &= ~RS_TOOLONG;
433                         goto back;
434                 }
435                 if (packet_len < 6) {
436                         /* bloody hardware */
437                         netdev_err(dev, "fubar (rxlen %u status %x\n",
438                                    packet_len, status);
439                         status |= RS_TOOSHORT;
440                 }
441                 SMC_WAIT_MMU_BUSY(lp);
442                 SMC_SET_MMU_CMD(lp, MC_RELEASE);
443                 dev->stats.rx_errors++;
444                 if (status & RS_ALGNERR)
445                         dev->stats.rx_frame_errors++;
446                 if (status & (RS_TOOSHORT | RS_TOOLONG))
447                         dev->stats.rx_length_errors++;
448                 if (status & RS_BADCRC)
449                         dev->stats.rx_crc_errors++;
450         } else {
451                 struct sk_buff *skb;
452                 unsigned char *data;
453                 unsigned int data_len;
454 
455                 /* set multicast stats */
456                 if (status & RS_MULTICAST)
457                         dev->stats.multicast++;
458 
459                 /*
460                  * Actual payload is packet_len - 6 (or 5 if odd byte).
461                  * We want skb_reserve(2) and the final ctrl word
462                  * (2 bytes, possibly containing the payload odd byte).
463                  * Furthermore, we add 2 bytes to allow rounding up to
464                  * multiple of 4 bytes on 32 bit buses.
465                  * Hence packet_len - 6 + 2 + 2 + 2.
466                  */
467                 skb = netdev_alloc_skb(dev, packet_len);
468                 if (unlikely(skb == NULL)) {
469                         SMC_WAIT_MMU_BUSY(lp);
470                         SMC_SET_MMU_CMD(lp, MC_RELEASE);
471                         dev->stats.rx_dropped++;
472                         return;
473                 }
474 
475                 /* Align IP header to 32 bits */
476                 skb_reserve(skb, 2);
477 
478                 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
479                 if (lp->version == 0x90)
480                         status |= RS_ODDFRAME;
481 
482                 /*
483                  * If odd length: packet_len - 5,
484                  * otherwise packet_len - 6.
485                  * With the trailing ctrl byte it's packet_len - 4.
486                  */
487                 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
488                 data = skb_put(skb, data_len);
489                 SMC_PULL_DATA(lp, data, packet_len - 4);
490 
491                 SMC_WAIT_MMU_BUSY(lp);
492                 SMC_SET_MMU_CMD(lp, MC_RELEASE);
493 
494                 PRINT_PKT(data, packet_len - 4);
495 
496                 skb->protocol = eth_type_trans(skb, dev);
497                 netif_rx(skb);
498                 dev->stats.rx_packets++;
499                 dev->stats.rx_bytes += data_len;
500         }
501 }
502 
503 #ifdef CONFIG_SMP
504 /*
505  * On SMP we have the following problem:
506  *
507  *      A = smc_hardware_send_pkt()
508  *      B = smc_hard_start_xmit()
509  *      C = smc_interrupt()
510  *
511  * A and B can never be executed simultaneously.  However, at least on UP,
512  * it is possible (and even desirable) for C to interrupt execution of
513  * A or B in order to have better RX reliability and avoid overruns.
514  * C, just like A and B, must have exclusive access to the chip and
515  * each of them must lock against any other concurrent access.
516  * Unfortunately this is not possible to have C suspend execution of A or
517  * B taking place on another CPU. On UP this is no an issue since A and B
518  * are run from softirq context and C from hard IRQ context, and there is
519  * no other CPU where concurrent access can happen.
520  * If ever there is a way to force at least B and C to always be executed
521  * on the same CPU then we could use read/write locks to protect against
522  * any other concurrent access and C would always interrupt B. But life
523  * isn't that easy in a SMP world...
524  */
525 #define smc_special_trylock(lock, flags)                                \
526 ({                                                                      \
527         int __ret;                                                      \
528         local_irq_save(flags);                                          \
529         __ret = spin_trylock(lock);                                     \
530         if (!__ret)                                                     \
531                 local_irq_restore(flags);                               \
532         __ret;                                                          \
533 })
534 #define smc_special_lock(lock, flags)           spin_lock_irqsave(lock, flags)
535 #define smc_special_unlock(lock, flags)         spin_unlock_irqrestore(lock, flags)
536 #else
537 #define smc_special_trylock(lock, flags)        (flags == flags)
538 #define smc_special_lock(lock, flags)           do { flags = 0; } while (0)
539 #define smc_special_unlock(lock, flags) do { flags = 0; } while (0)
540 #endif
541 
542 /*
543  * This is called to actually send a packet to the chip.
544  */
545 static void smc_hardware_send_pkt(unsigned long data)
546 {
547         struct net_device *dev = (struct net_device *)data;
548         struct smc_local *lp = netdev_priv(dev);
549         void __iomem *ioaddr = lp->base;
550         struct sk_buff *skb;
551         unsigned int packet_no, len;
552         unsigned char *buf;
553         unsigned long flags;
554 
555         DBG(3, dev, "%s\n", __func__);
556 
557         if (!smc_special_trylock(&lp->lock, flags)) {
558                 netif_stop_queue(dev);
559                 tasklet_schedule(&lp->tx_task);
560                 return;
561         }
562 
563         skb = lp->pending_tx_skb;
564         if (unlikely(!skb)) {
565                 smc_special_unlock(&lp->lock, flags);
566                 return;
567         }
568         lp->pending_tx_skb = NULL;
569 
570         packet_no = SMC_GET_AR(lp);
571         if (unlikely(packet_no & AR_FAILED)) {
572                 netdev_err(dev, "Memory allocation failed.\n");
573                 dev->stats.tx_errors++;
574                 dev->stats.tx_fifo_errors++;
575                 smc_special_unlock(&lp->lock, flags);
576                 goto done;
577         }
578 
579         /* point to the beginning of the packet */
580         SMC_SET_PN(lp, packet_no);
581         SMC_SET_PTR(lp, PTR_AUTOINC);
582 
583         buf = skb->data;
584         len = skb->len;
585         DBG(2, dev, "TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
586             packet_no, len, len, buf);
587         PRINT_PKT(buf, len);
588 
589         /*
590          * Send the packet length (+6 for status words, length, and ctl.
591          * The card will pad to 64 bytes with zeroes if packet is too small.
592          */
593         SMC_PUT_PKT_HDR(lp, 0, len + 6);
594 
595         /* send the actual data */
596         SMC_PUSH_DATA(lp, buf, len & ~1);
597 
598         /* Send final ctl word with the last byte if there is one */
599         SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG(lp));
600 
601         /*
602          * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
603          * have the effect of having at most one packet queued for TX
604          * in the chip's memory at all time.
605          *
606          * If THROTTLE_TX_PKTS is not set then the queue is stopped only
607          * when memory allocation (MC_ALLOC) does not succeed right away.
608          */
609         if (THROTTLE_TX_PKTS)
610                 netif_stop_queue(dev);
611 
612         /* queue the packet for TX */
613         SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
614         smc_special_unlock(&lp->lock, flags);
615 
616         dev->trans_start = jiffies;
617         dev->stats.tx_packets++;
618         dev->stats.tx_bytes += len;
619 
620         SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
621 
622 done:   if (!THROTTLE_TX_PKTS)
623                 netif_wake_queue(dev);
624 
625         dev_consume_skb_any(skb);
626 }
627 
628 /*
629  * Since I am not sure if I will have enough room in the chip's ram
630  * to store the packet, I call this routine which either sends it
631  * now, or set the card to generates an interrupt when ready
632  * for the packet.
633  */
634 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
635 {
636         struct smc_local *lp = netdev_priv(dev);
637         void __iomem *ioaddr = lp->base;
638         unsigned int numPages, poll_count, status;
639         unsigned long flags;
640 
641         DBG(3, dev, "%s\n", __func__);
642 
643         BUG_ON(lp->pending_tx_skb != NULL);
644 
645         /*
646          * The MMU wants the number of pages to be the number of 256 bytes
647          * 'pages', minus 1 (since a packet can't ever have 0 pages :))
648          *
649          * The 91C111 ignores the size bits, but earlier models don't.
650          *
651          * Pkt size for allocating is data length +6 (for additional status
652          * words, length and ctl)
653          *
654          * If odd size then last byte is included in ctl word.
655          */
656         numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
657         if (unlikely(numPages > 7)) {
658                 netdev_warn(dev, "Far too big packet error.\n");
659                 dev->stats.tx_errors++;
660                 dev->stats.tx_dropped++;
661                 dev_kfree_skb_any(skb);
662                 return NETDEV_TX_OK;
663         }
664 
665         smc_special_lock(&lp->lock, flags);
666 
667         /* now, try to allocate the memory */
668         SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
669 
670         /*
671          * Poll the chip for a short amount of time in case the
672          * allocation succeeds quickly.
673          */
674         poll_count = MEMORY_WAIT_TIME;
675         do {
676                 status = SMC_GET_INT(lp);
677                 if (status & IM_ALLOC_INT) {
678                         SMC_ACK_INT(lp, IM_ALLOC_INT);
679                         break;
680                 }
681         } while (--poll_count);
682 
683         smc_special_unlock(&lp->lock, flags);
684 
685         lp->pending_tx_skb = skb;
686         if (!poll_count) {
687                 /* oh well, wait until the chip finds memory later */
688                 netif_stop_queue(dev);
689                 DBG(2, dev, "TX memory allocation deferred.\n");
690                 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
691         } else {
692                 /*
693                  * Allocation succeeded: push packet to the chip's own memory
694                  * immediately.
695                  */
696                 smc_hardware_send_pkt((unsigned long)dev);
697         }
698 
699         return NETDEV_TX_OK;
700 }
701 
702 /*
703  * This handles a TX interrupt, which is only called when:
704  * - a TX error occurred, or
705  * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
706  */
707 static void smc_tx(struct net_device *dev)
708 {
709         struct smc_local *lp = netdev_priv(dev);
710         void __iomem *ioaddr = lp->base;
711         unsigned int saved_packet, packet_no, tx_status, pkt_len;
712 
713         DBG(3, dev, "%s\n", __func__);
714 
715         /* If the TX FIFO is empty then nothing to do */
716         packet_no = SMC_GET_TXFIFO(lp);
717         if (unlikely(packet_no & TXFIFO_TEMPTY)) {
718                 PRINTK(dev, "smc_tx with nothing on FIFO.\n");
719                 return;
720         }
721 
722         /* select packet to read from */
723         saved_packet = SMC_GET_PN(lp);
724         SMC_SET_PN(lp, packet_no);
725 
726         /* read the first word (status word) from this packet */
727         SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
728         SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
729         DBG(2, dev, "TX STATUS 0x%04x PNR 0x%02x\n",
730             tx_status, packet_no);
731 
732         if (!(tx_status & ES_TX_SUC))
733                 dev->stats.tx_errors++;
734 
735         if (tx_status & ES_LOSTCARR)
736                 dev->stats.tx_carrier_errors++;
737 
738         if (tx_status & (ES_LATCOL | ES_16COL)) {
739                 PRINTK(dev, "%s occurred on last xmit\n",
740                        (tx_status & ES_LATCOL) ?
741                         "late collision" : "too many collisions");
742                 dev->stats.tx_window_errors++;
743                 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
744                         netdev_info(dev, "unexpectedly large number of bad collisions. Please check duplex setting.\n");
745                 }
746         }
747 
748         /* kill the packet */
749         SMC_WAIT_MMU_BUSY(lp);
750         SMC_SET_MMU_CMD(lp, MC_FREEPKT);
751 
752         /* Don't restore Packet Number Reg until busy bit is cleared */
753         SMC_WAIT_MMU_BUSY(lp);
754         SMC_SET_PN(lp, saved_packet);
755 
756         /* re-enable transmit */
757         SMC_SELECT_BANK(lp, 0);
758         SMC_SET_TCR(lp, lp->tcr_cur_mode);
759         SMC_SELECT_BANK(lp, 2);
760 }
761 
762 
763 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
764 
765 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
766 {
767         struct smc_local *lp = netdev_priv(dev);
768         void __iomem *ioaddr = lp->base;
769         unsigned int mii_reg, mask;
770 
771         mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
772         mii_reg |= MII_MDOE;
773 
774         for (mask = 1 << (bits - 1); mask; mask >>= 1) {
775                 if (val & mask)
776                         mii_reg |= MII_MDO;
777                 else
778                         mii_reg &= ~MII_MDO;
779 
780                 SMC_SET_MII(lp, mii_reg);
781                 udelay(MII_DELAY);
782                 SMC_SET_MII(lp, mii_reg | MII_MCLK);
783                 udelay(MII_DELAY);
784         }
785 }
786 
787 static unsigned int smc_mii_in(struct net_device *dev, int bits)
788 {
789         struct smc_local *lp = netdev_priv(dev);
790         void __iomem *ioaddr = lp->base;
791         unsigned int mii_reg, mask, val;
792 
793         mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
794         SMC_SET_MII(lp, mii_reg);
795 
796         for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
797                 if (SMC_GET_MII(lp) & MII_MDI)
798                         val |= mask;
799 
800                 SMC_SET_MII(lp, mii_reg);
801                 udelay(MII_DELAY);
802                 SMC_SET_MII(lp, mii_reg | MII_MCLK);
803                 udelay(MII_DELAY);
804         }
805 
806         return val;
807 }
808 
809 /*
810  * Reads a register from the MII Management serial interface
811  */
812 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
813 {
814         struct smc_local *lp = netdev_priv(dev);
815         void __iomem *ioaddr = lp->base;
816         unsigned int phydata;
817 
818         SMC_SELECT_BANK(lp, 3);
819 
820         /* Idle - 32 ones */
821         smc_mii_out(dev, 0xffffffff, 32);
822 
823         /* Start code (01) + read (10) + phyaddr + phyreg */
824         smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
825 
826         /* Turnaround (2bits) + phydata */
827         phydata = smc_mii_in(dev, 18);
828 
829         /* Return to idle state */
830         SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
831 
832         DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
833             __func__, phyaddr, phyreg, phydata);
834 
835         SMC_SELECT_BANK(lp, 2);
836         return phydata;
837 }
838 
839 /*
840  * Writes a register to the MII Management serial interface
841  */
842 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
843                           int phydata)
844 {
845         struct smc_local *lp = netdev_priv(dev);
846         void __iomem *ioaddr = lp->base;
847 
848         SMC_SELECT_BANK(lp, 3);
849 
850         /* Idle - 32 ones */
851         smc_mii_out(dev, 0xffffffff, 32);
852 
853         /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
854         smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
855 
856         /* Return to idle state */
857         SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
858 
859         DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
860             __func__, phyaddr, phyreg, phydata);
861 
862         SMC_SELECT_BANK(lp, 2);
863 }
864 
865 /*
866  * Finds and reports the PHY address
867  */
868 static void smc_phy_detect(struct net_device *dev)
869 {
870         struct smc_local *lp = netdev_priv(dev);
871         int phyaddr;
872 
873         DBG(2, dev, "%s\n", __func__);
874 
875         lp->phy_type = 0;
876 
877         /*
878          * Scan all 32 PHY addresses if necessary, starting at
879          * PHY#1 to PHY#31, and then PHY#0 last.
880          */
881         for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
882                 unsigned int id1, id2;
883 
884                 /* Read the PHY identifiers */
885                 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
886                 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
887 
888                 DBG(3, dev, "phy_id1=0x%x, phy_id2=0x%x\n",
889                     id1, id2);
890 
891                 /* Make sure it is a valid identifier */
892                 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
893                     id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
894                         /* Save the PHY's address */
895                         lp->mii.phy_id = phyaddr & 31;
896                         lp->phy_type = id1 << 16 | id2;
897                         break;
898                 }
899         }
900 }
901 
902 /*
903  * Sets the PHY to a configuration as determined by the user
904  */
905 static int smc_phy_fixed(struct net_device *dev)
906 {
907         struct smc_local *lp = netdev_priv(dev);
908         void __iomem *ioaddr = lp->base;
909         int phyaddr = lp->mii.phy_id;
910         int bmcr, cfg1;
911 
912         DBG(3, dev, "%s\n", __func__);
913 
914         /* Enter Link Disable state */
915         cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
916         cfg1 |= PHY_CFG1_LNKDIS;
917         smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
918 
919         /*
920          * Set our fixed capabilities
921          * Disable auto-negotiation
922          */
923         bmcr = 0;
924 
925         if (lp->ctl_rfduplx)
926                 bmcr |= BMCR_FULLDPLX;
927 
928         if (lp->ctl_rspeed == 100)
929                 bmcr |= BMCR_SPEED100;
930 
931         /* Write our capabilities to the phy control register */
932         smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
933 
934         /* Re-Configure the Receive/Phy Control register */
935         SMC_SELECT_BANK(lp, 0);
936         SMC_SET_RPC(lp, lp->rpc_cur_mode);
937         SMC_SELECT_BANK(lp, 2);
938 
939         return 1;
940 }
941 
942 /**
943  * smc_phy_reset - reset the phy
944  * @dev: net device
945  * @phy: phy address
946  *
947  * Issue a software reset for the specified PHY and
948  * wait up to 100ms for the reset to complete.  We should
949  * not access the PHY for 50ms after issuing the reset.
950  *
951  * The time to wait appears to be dependent on the PHY.
952  *
953  * Must be called with lp->lock locked.
954  */
955 static int smc_phy_reset(struct net_device *dev, int phy)
956 {
957         struct smc_local *lp = netdev_priv(dev);
958         unsigned int bmcr;
959         int timeout;
960 
961         smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
962 
963         for (timeout = 2; timeout; timeout--) {
964                 spin_unlock_irq(&lp->lock);
965                 msleep(50);
966                 spin_lock_irq(&lp->lock);
967 
968                 bmcr = smc_phy_read(dev, phy, MII_BMCR);
969                 if (!(bmcr & BMCR_RESET))
970                         break;
971         }
972 
973         return bmcr & BMCR_RESET;
974 }
975 
976 /**
977  * smc_phy_powerdown - powerdown phy
978  * @dev: net device
979  *
980  * Power down the specified PHY
981  */
982 static void smc_phy_powerdown(struct net_device *dev)
983 {
984         struct smc_local *lp = netdev_priv(dev);
985         unsigned int bmcr;
986         int phy = lp->mii.phy_id;
987 
988         if (lp->phy_type == 0)
989                 return;
990 
991         /* We need to ensure that no calls to smc_phy_configure are
992            pending.
993         */
994         cancel_work_sync(&lp->phy_configure);
995 
996         bmcr = smc_phy_read(dev, phy, MII_BMCR);
997         smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
998 }
999 
1000 /**
1001  * smc_phy_check_media - check the media status and adjust TCR
1002  * @dev: net device
1003  * @init: set true for initialisation
1004  *
1005  * Select duplex mode depending on negotiation state.  This
1006  * also updates our carrier state.
1007  */
1008 static void smc_phy_check_media(struct net_device *dev, int init)
1009 {
1010         struct smc_local *lp = netdev_priv(dev);
1011         void __iomem *ioaddr = lp->base;
1012 
1013         if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1014                 /* duplex state has changed */
1015                 if (lp->mii.full_duplex) {
1016                         lp->tcr_cur_mode |= TCR_SWFDUP;
1017                 } else {
1018                         lp->tcr_cur_mode &= ~TCR_SWFDUP;
1019                 }
1020 
1021                 SMC_SELECT_BANK(lp, 0);
1022                 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1023         }
1024 }
1025 
1026 /*
1027  * Configures the specified PHY through the MII management interface
1028  * using Autonegotiation.
1029  * Calls smc_phy_fixed() if the user has requested a certain config.
1030  * If RPC ANEG bit is set, the media selection is dependent purely on
1031  * the selection by the MII (either in the MII BMCR reg or the result
1032  * of autonegotiation.)  If the RPC ANEG bit is cleared, the selection
1033  * is controlled by the RPC SPEED and RPC DPLX bits.
1034  */
1035 static void smc_phy_configure(struct work_struct *work)
1036 {
1037         struct smc_local *lp =
1038                 container_of(work, struct smc_local, phy_configure);
1039         struct net_device *dev = lp->dev;
1040         void __iomem *ioaddr = lp->base;
1041         int phyaddr = lp->mii.phy_id;
1042         int my_phy_caps; /* My PHY capabilities */
1043         int my_ad_caps; /* My Advertised capabilities */
1044         int status;
1045 
1046         DBG(3, dev, "smc_program_phy()\n");
1047 
1048         spin_lock_irq(&lp->lock);
1049 
1050         /*
1051          * We should not be called if phy_type is zero.
1052          */
1053         if (lp->phy_type == 0)
1054                 goto smc_phy_configure_exit;
1055 
1056         if (smc_phy_reset(dev, phyaddr)) {
1057                 netdev_info(dev, "PHY reset timed out\n");
1058                 goto smc_phy_configure_exit;
1059         }
1060 
1061         /*
1062          * Enable PHY Interrupts (for register 18)
1063          * Interrupts listed here are disabled
1064          */
1065         smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1066                 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1067                 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1068                 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1069 
1070         /* Configure the Receive/Phy Control register */
1071         SMC_SELECT_BANK(lp, 0);
1072         SMC_SET_RPC(lp, lp->rpc_cur_mode);
1073 
1074         /* If the user requested no auto neg, then go set his request */
1075         if (lp->mii.force_media) {
1076                 smc_phy_fixed(dev);
1077                 goto smc_phy_configure_exit;
1078         }
1079 
1080         /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1081         my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1082 
1083         if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1084                 netdev_info(dev, "Auto negotiation NOT supported\n");
1085                 smc_phy_fixed(dev);
1086                 goto smc_phy_configure_exit;
1087         }
1088 
1089         my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1090 
1091         if (my_phy_caps & BMSR_100BASE4)
1092                 my_ad_caps |= ADVERTISE_100BASE4;
1093         if (my_phy_caps & BMSR_100FULL)
1094                 my_ad_caps |= ADVERTISE_100FULL;
1095         if (my_phy_caps & BMSR_100HALF)
1096                 my_ad_caps |= ADVERTISE_100HALF;
1097         if (my_phy_caps & BMSR_10FULL)
1098                 my_ad_caps |= ADVERTISE_10FULL;
1099         if (my_phy_caps & BMSR_10HALF)
1100                 my_ad_caps |= ADVERTISE_10HALF;
1101 
1102         /* Disable capabilities not selected by our user */
1103         if (lp->ctl_rspeed != 100)
1104                 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1105 
1106         if (!lp->ctl_rfduplx)
1107                 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1108 
1109         /* Update our Auto-Neg Advertisement Register */
1110         smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1111         lp->mii.advertising = my_ad_caps;
1112 
1113         /*
1114          * Read the register back.  Without this, it appears that when
1115          * auto-negotiation is restarted, sometimes it isn't ready and
1116          * the link does not come up.
1117          */
1118         status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1119 
1120         DBG(2, dev, "phy caps=%x\n", my_phy_caps);
1121         DBG(2, dev, "phy advertised caps=%x\n", my_ad_caps);
1122 
1123         /* Restart auto-negotiation process in order to advertise my caps */
1124         smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1125 
1126         smc_phy_check_media(dev, 1);
1127 
1128 smc_phy_configure_exit:
1129         SMC_SELECT_BANK(lp, 2);
1130         spin_unlock_irq(&lp->lock);
1131 }
1132 
1133 /*
1134  * smc_phy_interrupt
1135  *
1136  * Purpose:  Handle interrupts relating to PHY register 18. This is
1137  *  called from the "hard" interrupt handler under our private spinlock.
1138  */
1139 static void smc_phy_interrupt(struct net_device *dev)
1140 {
1141         struct smc_local *lp = netdev_priv(dev);
1142         int phyaddr = lp->mii.phy_id;
1143         int phy18;
1144 
1145         DBG(2, dev, "%s\n", __func__);
1146 
1147         if (lp->phy_type == 0)
1148                 return;
1149 
1150         for(;;) {
1151                 smc_phy_check_media(dev, 0);
1152 
1153                 /* Read PHY Register 18, Status Output */
1154                 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1155                 if ((phy18 & PHY_INT_INT) == 0)
1156                         break;
1157         }
1158 }
1159 
1160 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1161 
1162 static void smc_10bt_check_media(struct net_device *dev, int init)
1163 {
1164         struct smc_local *lp = netdev_priv(dev);
1165         void __iomem *ioaddr = lp->base;
1166         unsigned int old_carrier, new_carrier;
1167 
1168         old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1169 
1170         SMC_SELECT_BANK(lp, 0);
1171         new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1172         SMC_SELECT_BANK(lp, 2);
1173 
1174         if (init || (old_carrier != new_carrier)) {
1175                 if (!new_carrier) {
1176                         netif_carrier_off(dev);
1177                 } else {
1178                         netif_carrier_on(dev);
1179                 }
1180                 if (netif_msg_link(lp))
1181                         netdev_info(dev, "link %s\n",
1182                                     new_carrier ? "up" : "down");
1183         }
1184 }
1185 
1186 static void smc_eph_interrupt(struct net_device *dev)
1187 {
1188         struct smc_local *lp = netdev_priv(dev);
1189         void __iomem *ioaddr = lp->base;
1190         unsigned int ctl;
1191 
1192         smc_10bt_check_media(dev, 0);
1193 
1194         SMC_SELECT_BANK(lp, 1);
1195         ctl = SMC_GET_CTL(lp);
1196         SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1197         SMC_SET_CTL(lp, ctl);
1198         SMC_SELECT_BANK(lp, 2);
1199 }
1200 
1201 /*
1202  * This is the main routine of the driver, to handle the device when
1203  * it needs some attention.
1204  */
1205 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1206 {
1207         struct net_device *dev = dev_id;
1208         struct smc_local *lp = netdev_priv(dev);
1209         void __iomem *ioaddr = lp->base;
1210         int status, mask, timeout, card_stats;
1211         int saved_pointer;
1212 
1213         DBG(3, dev, "%s\n", __func__);
1214 
1215         spin_lock(&lp->lock);
1216 
1217         /* A preamble may be used when there is a potential race
1218          * between the interruptible transmit functions and this
1219          * ISR. */
1220         SMC_INTERRUPT_PREAMBLE;
1221 
1222         saved_pointer = SMC_GET_PTR(lp);
1223         mask = SMC_GET_INT_MASK(lp);
1224         SMC_SET_INT_MASK(lp, 0);
1225 
1226         /* set a timeout value, so I don't stay here forever */
1227         timeout = MAX_IRQ_LOOPS;
1228 
1229         do {
1230                 status = SMC_GET_INT(lp);
1231 
1232                 DBG(2, dev, "INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1233                     status, mask,
1234                     ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1235                        meminfo = SMC_GET_MIR(lp);
1236                        SMC_SELECT_BANK(lp, 2); meminfo; }),
1237                     SMC_GET_FIFO(lp));
1238 
1239                 status &= mask;
1240                 if (!status)
1241                         break;
1242 
1243                 if (status & IM_TX_INT) {
1244                         /* do this before RX as it will free memory quickly */
1245                         DBG(3, dev, "TX int\n");
1246                         smc_tx(dev);
1247                         SMC_ACK_INT(lp, IM_TX_INT);
1248                         if (THROTTLE_TX_PKTS)
1249                                 netif_wake_queue(dev);
1250                 } else if (status & IM_RCV_INT) {
1251                         DBG(3, dev, "RX irq\n");
1252                         smc_rcv(dev);
1253                 } else if (status & IM_ALLOC_INT) {
1254                         DBG(3, dev, "Allocation irq\n");
1255                         tasklet_hi_schedule(&lp->tx_task);
1256                         mask &= ~IM_ALLOC_INT;
1257                 } else if (status & IM_TX_EMPTY_INT) {
1258                         DBG(3, dev, "TX empty\n");
1259                         mask &= ~IM_TX_EMPTY_INT;
1260 
1261                         /* update stats */
1262                         SMC_SELECT_BANK(lp, 0);
1263                         card_stats = SMC_GET_COUNTER(lp);
1264                         SMC_SELECT_BANK(lp, 2);
1265 
1266                         /* single collisions */
1267                         dev->stats.collisions += card_stats & 0xF;
1268                         card_stats >>= 4;
1269 
1270                         /* multiple collisions */
1271                         dev->stats.collisions += card_stats & 0xF;
1272                 } else if (status & IM_RX_OVRN_INT) {
1273                         DBG(1, dev, "RX overrun (EPH_ST 0x%04x)\n",
1274                             ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1275                                eph_st = SMC_GET_EPH_STATUS(lp);
1276                                SMC_SELECT_BANK(lp, 2); eph_st; }));
1277                         SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1278                         dev->stats.rx_errors++;
1279                         dev->stats.rx_fifo_errors++;
1280                 } else if (status & IM_EPH_INT) {
1281                         smc_eph_interrupt(dev);
1282                 } else if (status & IM_MDINT) {
1283                         SMC_ACK_INT(lp, IM_MDINT);
1284                         smc_phy_interrupt(dev);
1285                 } else if (status & IM_ERCV_INT) {
1286                         SMC_ACK_INT(lp, IM_ERCV_INT);
1287                         PRINTK(dev, "UNSUPPORTED: ERCV INTERRUPT\n");
1288                 }
1289         } while (--timeout);
1290 
1291         /* restore register states */
1292         SMC_SET_PTR(lp, saved_pointer);
1293         SMC_SET_INT_MASK(lp, mask);
1294         spin_unlock(&lp->lock);
1295 
1296 #ifndef CONFIG_NET_POLL_CONTROLLER
1297         if (timeout == MAX_IRQ_LOOPS)
1298                 PRINTK(dev, "spurious interrupt (mask = 0x%02x)\n",
1299                        mask);
1300 #endif
1301         DBG(3, dev, "Interrupt done (%d loops)\n",
1302             MAX_IRQ_LOOPS - timeout);
1303 
1304         /*
1305          * We return IRQ_HANDLED unconditionally here even if there was
1306          * nothing to do.  There is a possibility that a packet might
1307          * get enqueued into the chip right after TX_EMPTY_INT is raised
1308          * but just before the CPU acknowledges the IRQ.
1309          * Better take an unneeded IRQ in some occasions than complexifying
1310          * the code for all cases.
1311          */
1312         return IRQ_HANDLED;
1313 }
1314 
1315 #ifdef CONFIG_NET_POLL_CONTROLLER
1316 /*
1317  * Polling receive - used by netconsole and other diagnostic tools
1318  * to allow network i/o with interrupts disabled.
1319  */
1320 static void smc_poll_controller(struct net_device *dev)
1321 {
1322         disable_irq(dev->irq);
1323         smc_interrupt(dev->irq, dev);
1324         enable_irq(dev->irq);
1325 }
1326 #endif
1327 
1328 /* Our watchdog timed out. Called by the networking layer */
1329 static void smc_timeout(struct net_device *dev)
1330 {
1331         struct smc_local *lp = netdev_priv(dev);
1332         void __iomem *ioaddr = lp->base;
1333         int status, mask, eph_st, meminfo, fifo;
1334 
1335         DBG(2, dev, "%s\n", __func__);
1336 
1337         spin_lock_irq(&lp->lock);
1338         status = SMC_GET_INT(lp);
1339         mask = SMC_GET_INT_MASK(lp);
1340         fifo = SMC_GET_FIFO(lp);
1341         SMC_SELECT_BANK(lp, 0);
1342         eph_st = SMC_GET_EPH_STATUS(lp);
1343         meminfo = SMC_GET_MIR(lp);
1344         SMC_SELECT_BANK(lp, 2);
1345         spin_unlock_irq(&lp->lock);
1346         PRINTK(dev, "TX timeout (INT 0x%02x INTMASK 0x%02x MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1347                status, mask, meminfo, fifo, eph_st);
1348 
1349         smc_reset(dev);
1350         smc_enable(dev);
1351 
1352         /*
1353          * Reconfiguring the PHY doesn't seem like a bad idea here, but
1354          * smc_phy_configure() calls msleep() which calls schedule_timeout()
1355          * which calls schedule().  Hence we use a work queue.
1356          */
1357         if (lp->phy_type != 0)
1358                 schedule_work(&lp->phy_configure);
1359 
1360         /* We can accept TX packets again */
1361         dev->trans_start = jiffies; /* prevent tx timeout */
1362         netif_wake_queue(dev);
1363 }
1364 
1365 /*
1366  * This routine will, depending on the values passed to it,
1367  * either make it accept multicast packets, go into
1368  * promiscuous mode (for TCPDUMP and cousins) or accept
1369  * a select set of multicast packets
1370  */
1371 static void smc_set_multicast_list(struct net_device *dev)
1372 {
1373         struct smc_local *lp = netdev_priv(dev);
1374         void __iomem *ioaddr = lp->base;
1375         unsigned char multicast_table[8];
1376         int update_multicast = 0;
1377 
1378         DBG(2, dev, "%s\n", __func__);
1379 
1380         if (dev->flags & IFF_PROMISC) {
1381                 DBG(2, dev, "RCR_PRMS\n");
1382                 lp->rcr_cur_mode |= RCR_PRMS;
1383         }
1384 
1385 /* BUG?  I never disable promiscuous mode if multicasting was turned on.
1386    Now, I turn off promiscuous mode, but I don't do anything to multicasting
1387    when promiscuous mode is turned on.
1388 */
1389 
1390         /*
1391          * Here, I am setting this to accept all multicast packets.
1392          * I don't need to zero the multicast table, because the flag is
1393          * checked before the table is
1394          */
1395         else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1396                 DBG(2, dev, "RCR_ALMUL\n");
1397                 lp->rcr_cur_mode |= RCR_ALMUL;
1398         }
1399 
1400         /*
1401          * This sets the internal hardware table to filter out unwanted
1402          * multicast packets before they take up memory.
1403          *
1404          * The SMC chip uses a hash table where the high 6 bits of the CRC of
1405          * address are the offset into the table.  If that bit is 1, then the
1406          * multicast packet is accepted.  Otherwise, it's dropped silently.
1407          *
1408          * To use the 6 bits as an offset into the table, the high 3 bits are
1409          * the number of the 8 bit register, while the low 3 bits are the bit
1410          * within that register.
1411          */
1412         else if (!netdev_mc_empty(dev)) {
1413                 struct netdev_hw_addr *ha;
1414 
1415                 /* table for flipping the order of 3 bits */
1416                 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1417 
1418                 /* start with a table of all zeros: reject all */
1419                 memset(multicast_table, 0, sizeof(multicast_table));
1420 
1421                 netdev_for_each_mc_addr(ha, dev) {
1422                         int position;
1423 
1424                         /* only use the low order bits */
1425                         position = crc32_le(~0, ha->addr, 6) & 0x3f;
1426 
1427                         /* do some messy swapping to put the bit in the right spot */
1428                         multicast_table[invert3[position&7]] |=
1429                                 (1<<invert3[(position>>3)&7]);
1430                 }
1431 
1432                 /* be sure I get rid of flags I might have set */
1433                 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1434 
1435                 /* now, the table can be loaded into the chipset */
1436                 update_multicast = 1;
1437         } else  {
1438                 DBG(2, dev, "~(RCR_PRMS|RCR_ALMUL)\n");
1439                 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1440 
1441                 /*
1442                  * since I'm disabling all multicast entirely, I need to
1443                  * clear the multicast list
1444                  */
1445                 memset(multicast_table, 0, sizeof(multicast_table));
1446                 update_multicast = 1;
1447         }
1448 
1449         spin_lock_irq(&lp->lock);
1450         SMC_SELECT_BANK(lp, 0);
1451         SMC_SET_RCR(lp, lp->rcr_cur_mode);
1452         if (update_multicast) {
1453                 SMC_SELECT_BANK(lp, 3);
1454                 SMC_SET_MCAST(lp, multicast_table);
1455         }
1456         SMC_SELECT_BANK(lp, 2);
1457         spin_unlock_irq(&lp->lock);
1458 }
1459 
1460 
1461 /*
1462  * Open and Initialize the board
1463  *
1464  * Set up everything, reset the card, etc..
1465  */
1466 static int
1467 smc_open(struct net_device *dev)
1468 {
1469         struct smc_local *lp = netdev_priv(dev);
1470 
1471         DBG(2, dev, "%s\n", __func__);
1472 
1473         /* Setup the default Register Modes */
1474         lp->tcr_cur_mode = TCR_DEFAULT;
1475         lp->rcr_cur_mode = RCR_DEFAULT;
1476         lp->rpc_cur_mode = RPC_DEFAULT |
1477                                 lp->cfg.leda << RPC_LSXA_SHFT |
1478                                 lp->cfg.ledb << RPC_LSXB_SHFT;
1479 
1480         /*
1481          * If we are not using a MII interface, we need to
1482          * monitor our own carrier signal to detect faults.
1483          */
1484         if (lp->phy_type == 0)
1485                 lp->tcr_cur_mode |= TCR_MON_CSN;
1486 
1487         /* reset the hardware */
1488         smc_reset(dev);
1489         smc_enable(dev);
1490 
1491         /* Configure the PHY, initialize the link state */
1492         if (lp->phy_type != 0)
1493                 smc_phy_configure(&lp->phy_configure);
1494         else {
1495                 spin_lock_irq(&lp->lock);
1496                 smc_10bt_check_media(dev, 1);
1497                 spin_unlock_irq(&lp->lock);
1498         }
1499 
1500         netif_start_queue(dev);
1501         return 0;
1502 }
1503 
1504 /*
1505  * smc_close
1506  *
1507  * this makes the board clean up everything that it can
1508  * and not talk to the outside world.   Caused by
1509  * an 'ifconfig ethX down'
1510  */
1511 static int smc_close(struct net_device *dev)
1512 {
1513         struct smc_local *lp = netdev_priv(dev);
1514 
1515         DBG(2, dev, "%s\n", __func__);
1516 
1517         netif_stop_queue(dev);
1518         netif_carrier_off(dev);
1519 
1520         /* clear everything */
1521         smc_shutdown(dev);
1522         tasklet_kill(&lp->tx_task);
1523         smc_phy_powerdown(dev);
1524         return 0;
1525 }
1526 
1527 /*
1528  * Ethtool support
1529  */
1530 static int
1531 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1532 {
1533         struct smc_local *lp = netdev_priv(dev);
1534         int ret;
1535 
1536         cmd->maxtxpkt = 1;
1537         cmd->maxrxpkt = 1;
1538 
1539         if (lp->phy_type != 0) {
1540                 spin_lock_irq(&lp->lock);
1541                 ret = mii_ethtool_gset(&lp->mii, cmd);
1542                 spin_unlock_irq(&lp->lock);
1543         } else {
1544                 cmd->supported = SUPPORTED_10baseT_Half |
1545                                  SUPPORTED_10baseT_Full |
1546                                  SUPPORTED_TP | SUPPORTED_AUI;
1547 
1548                 if (lp->ctl_rspeed == 10)
1549                         ethtool_cmd_speed_set(cmd, SPEED_10);
1550                 else if (lp->ctl_rspeed == 100)
1551                         ethtool_cmd_speed_set(cmd, SPEED_100);
1552 
1553                 cmd->autoneg = AUTONEG_DISABLE;
1554                 cmd->transceiver = XCVR_INTERNAL;
1555                 cmd->port = 0;
1556                 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1557 
1558                 ret = 0;
1559         }
1560 
1561         return ret;
1562 }
1563 
1564 static int
1565 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1566 {
1567         struct smc_local *lp = netdev_priv(dev);
1568         int ret;
1569 
1570         if (lp->phy_type != 0) {
1571                 spin_lock_irq(&lp->lock);
1572                 ret = mii_ethtool_sset(&lp->mii, cmd);
1573                 spin_unlock_irq(&lp->lock);
1574         } else {
1575                 if (cmd->autoneg != AUTONEG_DISABLE ||
1576                     cmd->speed != SPEED_10 ||
1577                     (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1578                     (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1579                         return -EINVAL;
1580 
1581 //              lp->port = cmd->port;
1582                 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1583 
1584 //              if (netif_running(dev))
1585 //                      smc_set_port(dev);
1586 
1587                 ret = 0;
1588         }
1589 
1590         return ret;
1591 }
1592 
1593 static void
1594 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1595 {
1596         strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1597         strlcpy(info->version, version, sizeof(info->version));
1598         strlcpy(info->bus_info, dev_name(dev->dev.parent),
1599                 sizeof(info->bus_info));
1600 }
1601 
1602 static int smc_ethtool_nwayreset(struct net_device *dev)
1603 {
1604         struct smc_local *lp = netdev_priv(dev);
1605         int ret = -EINVAL;
1606 
1607         if (lp->phy_type != 0) {
1608                 spin_lock_irq(&lp->lock);
1609                 ret = mii_nway_restart(&lp->mii);
1610                 spin_unlock_irq(&lp->lock);
1611         }
1612 
1613         return ret;
1614 }
1615 
1616 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1617 {
1618         struct smc_local *lp = netdev_priv(dev);
1619         return lp->msg_enable;
1620 }
1621 
1622 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1623 {
1624         struct smc_local *lp = netdev_priv(dev);
1625         lp->msg_enable = level;
1626 }
1627 
1628 static int smc_write_eeprom_word(struct net_device *dev, u16 addr, u16 word)
1629 {
1630         u16 ctl;
1631         struct smc_local *lp = netdev_priv(dev);
1632         void __iomem *ioaddr = lp->base;
1633 
1634         spin_lock_irq(&lp->lock);
1635         /* load word into GP register */
1636         SMC_SELECT_BANK(lp, 1);
1637         SMC_SET_GP(lp, word);
1638         /* set the address to put the data in EEPROM */
1639         SMC_SELECT_BANK(lp, 2);
1640         SMC_SET_PTR(lp, addr);
1641         /* tell it to write */
1642         SMC_SELECT_BANK(lp, 1);
1643         ctl = SMC_GET_CTL(lp);
1644         SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_STORE));
1645         /* wait for it to finish */
1646         do {
1647                 udelay(1);
1648         } while (SMC_GET_CTL(lp) & CTL_STORE);
1649         /* clean up */
1650         SMC_SET_CTL(lp, ctl);
1651         SMC_SELECT_BANK(lp, 2);
1652         spin_unlock_irq(&lp->lock);
1653         return 0;
1654 }
1655 
1656 static int smc_read_eeprom_word(struct net_device *dev, u16 addr, u16 *word)
1657 {
1658         u16 ctl;
1659         struct smc_local *lp = netdev_priv(dev);
1660         void __iomem *ioaddr = lp->base;
1661 
1662         spin_lock_irq(&lp->lock);
1663         /* set the EEPROM address to get the data from */
1664         SMC_SELECT_BANK(lp, 2);
1665         SMC_SET_PTR(lp, addr | PTR_READ);
1666         /* tell it to load */
1667         SMC_SELECT_BANK(lp, 1);
1668         SMC_SET_GP(lp, 0xffff); /* init to known */
1669         ctl = SMC_GET_CTL(lp);
1670         SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_RELOAD));
1671         /* wait for it to finish */
1672         do {
1673                 udelay(1);
1674         } while (SMC_GET_CTL(lp) & CTL_RELOAD);
1675         /* read word from GP register */
1676         *word = SMC_GET_GP(lp);
1677         /* clean up */
1678         SMC_SET_CTL(lp, ctl);
1679         SMC_SELECT_BANK(lp, 2);
1680         spin_unlock_irq(&lp->lock);
1681         return 0;
1682 }
1683 
1684 static int smc_ethtool_geteeprom_len(struct net_device *dev)
1685 {
1686         return 0x23 * 2;
1687 }
1688 
1689 static int smc_ethtool_geteeprom(struct net_device *dev,
1690                 struct ethtool_eeprom *eeprom, u8 *data)
1691 {
1692         int i;
1693         int imax;
1694 
1695         DBG(1, dev, "Reading %d bytes at %d(0x%x)\n",
1696                 eeprom->len, eeprom->offset, eeprom->offset);
1697         imax = smc_ethtool_geteeprom_len(dev);
1698         for (i = 0; i < eeprom->len; i += 2) {
1699                 int ret;
1700                 u16 wbuf;
1701                 int offset = i + eeprom->offset;
1702                 if (offset > imax)
1703                         break;
1704                 ret = smc_read_eeprom_word(dev, offset >> 1, &wbuf);
1705                 if (ret != 0)
1706                         return ret;
1707                 DBG(2, dev, "Read 0x%x from 0x%x\n", wbuf, offset >> 1);
1708                 data[i] = (wbuf >> 8) & 0xff;
1709                 data[i+1] = wbuf & 0xff;
1710         }
1711         return 0;
1712 }
1713 
1714 static int smc_ethtool_seteeprom(struct net_device *dev,
1715                 struct ethtool_eeprom *eeprom, u8 *data)
1716 {
1717         int i;
1718         int imax;
1719 
1720         DBG(1, dev, "Writing %d bytes to %d(0x%x)\n",
1721             eeprom->len, eeprom->offset, eeprom->offset);
1722         imax = smc_ethtool_geteeprom_len(dev);
1723         for (i = 0; i < eeprom->len; i += 2) {
1724                 int ret;
1725                 u16 wbuf;
1726                 int offset = i + eeprom->offset;
1727                 if (offset > imax)
1728                         break;
1729                 wbuf = (data[i] << 8) | data[i + 1];
1730                 DBG(2, dev, "Writing 0x%x to 0x%x\n", wbuf, offset >> 1);
1731                 ret = smc_write_eeprom_word(dev, offset >> 1, wbuf);
1732                 if (ret != 0)
1733                         return ret;
1734         }
1735         return 0;
1736 }
1737 
1738 
1739 static const struct ethtool_ops smc_ethtool_ops = {
1740         .get_settings   = smc_ethtool_getsettings,
1741         .set_settings   = smc_ethtool_setsettings,
1742         .get_drvinfo    = smc_ethtool_getdrvinfo,
1743 
1744         .get_msglevel   = smc_ethtool_getmsglevel,
1745         .set_msglevel   = smc_ethtool_setmsglevel,
1746         .nway_reset     = smc_ethtool_nwayreset,
1747         .get_link       = ethtool_op_get_link,
1748         .get_eeprom_len = smc_ethtool_geteeprom_len,
1749         .get_eeprom     = smc_ethtool_geteeprom,
1750         .set_eeprom     = smc_ethtool_seteeprom,
1751 };
1752 
1753 static const struct net_device_ops smc_netdev_ops = {
1754         .ndo_open               = smc_open,
1755         .ndo_stop               = smc_close,
1756         .ndo_start_xmit         = smc_hard_start_xmit,
1757         .ndo_tx_timeout         = smc_timeout,
1758         .ndo_set_rx_mode        = smc_set_multicast_list,
1759         .ndo_change_mtu         = eth_change_mtu,
1760         .ndo_validate_addr      = eth_validate_addr,
1761         .ndo_set_mac_address    = eth_mac_addr,
1762 #ifdef CONFIG_NET_POLL_CONTROLLER
1763         .ndo_poll_controller    = smc_poll_controller,
1764 #endif
1765 };
1766 
1767 /*
1768  * smc_findirq
1769  *
1770  * This routine has a simple purpose -- make the SMC chip generate an
1771  * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1772  */
1773 /*
1774  * does this still work?
1775  *
1776  * I just deleted auto_irq.c, since it was never built...
1777  *   --jgarzik
1778  */
1779 static int smc_findirq(struct smc_local *lp)
1780 {
1781         void __iomem *ioaddr = lp->base;
1782         int timeout = 20;
1783         unsigned long cookie;
1784 
1785         DBG(2, lp->dev, "%s: %s\n", CARDNAME, __func__);
1786 
1787         cookie = probe_irq_on();
1788 
1789         /*
1790          * What I try to do here is trigger an ALLOC_INT. This is done
1791          * by allocating a small chunk of memory, which will give an interrupt
1792          * when done.
1793          */
1794         /* enable ALLOCation interrupts ONLY */
1795         SMC_SELECT_BANK(lp, 2);
1796         SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1797 
1798         /*
1799          * Allocate 512 bytes of memory.  Note that the chip was just
1800          * reset so all the memory is available
1801          */
1802         SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1803 
1804         /*
1805          * Wait until positive that the interrupt has been generated
1806          */
1807         do {
1808                 int int_status;
1809                 udelay(10);
1810                 int_status = SMC_GET_INT(lp);
1811                 if (int_status & IM_ALLOC_INT)
1812                         break;          /* got the interrupt */
1813         } while (--timeout);
1814 
1815         /*
1816          * there is really nothing that I can do here if timeout fails,
1817          * as autoirq_report will return a 0 anyway, which is what I
1818          * want in this case.   Plus, the clean up is needed in both
1819          * cases.
1820          */
1821 
1822         /* and disable all interrupts again */
1823         SMC_SET_INT_MASK(lp, 0);
1824 
1825         /* and return what I found */
1826         return probe_irq_off(cookie);
1827 }
1828 
1829 /*
1830  * Function: smc_probe(unsigned long ioaddr)
1831  *
1832  * Purpose:
1833  *      Tests to see if a given ioaddr points to an SMC91x chip.
1834  *      Returns a 0 on success
1835  *
1836  * Algorithm:
1837  *      (1) see if the high byte of BANK_SELECT is 0x33
1838  *      (2) compare the ioaddr with the base register's address
1839  *      (3) see if I recognize the chip ID in the appropriate register
1840  *
1841  * Here I do typical initialization tasks.
1842  *
1843  * o  Initialize the structure if needed
1844  * o  print out my vanity message if not done so already
1845  * o  print out what type of hardware is detected
1846  * o  print out the ethernet address
1847  * o  find the IRQ
1848  * o  set up my private data
1849  * o  configure the dev structure with my subroutines
1850  * o  actually GRAB the irq.
1851  * o  GRAB the region
1852  */
1853 static int smc_probe(struct net_device *dev, void __iomem *ioaddr,
1854                      unsigned long irq_flags)
1855 {
1856         struct smc_local *lp = netdev_priv(dev);
1857         int retval;
1858         unsigned int val, revision_register;
1859         const char *version_string;
1860 
1861         DBG(2, dev, "%s: %s\n", CARDNAME, __func__);
1862 
1863         /* First, see if the high byte is 0x33 */
1864         val = SMC_CURRENT_BANK(lp);
1865         DBG(2, dev, "%s: bank signature probe returned 0x%04x\n",
1866             CARDNAME, val);
1867         if ((val & 0xFF00) != 0x3300) {
1868                 if ((val & 0xFF) == 0x33) {
1869                         netdev_warn(dev,
1870                                     "%s: Detected possible byte-swapped interface at IOADDR %p\n",
1871                                     CARDNAME, ioaddr);
1872                 }
1873                 retval = -ENODEV;
1874                 goto err_out;
1875         }
1876 
1877         /*
1878          * The above MIGHT indicate a device, but I need to write to
1879          * further test this.
1880          */
1881         SMC_SELECT_BANK(lp, 0);
1882         val = SMC_CURRENT_BANK(lp);
1883         if ((val & 0xFF00) != 0x3300) {
1884                 retval = -ENODEV;
1885                 goto err_out;
1886         }
1887 
1888         /*
1889          * well, we've already written once, so hopefully another
1890          * time won't hurt.  This time, I need to switch the bank
1891          * register to bank 1, so I can access the base address
1892          * register
1893          */
1894         SMC_SELECT_BANK(lp, 1);
1895         val = SMC_GET_BASE(lp);
1896         val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1897         if (((unsigned long)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1898                 netdev_warn(dev, "%s: IOADDR %p doesn't match configuration (%x).\n",
1899                             CARDNAME, ioaddr, val);
1900         }
1901 
1902         /*
1903          * check if the revision register is something that I
1904          * recognize.  These might need to be added to later,
1905          * as future revisions could be added.
1906          */
1907         SMC_SELECT_BANK(lp, 3);
1908         revision_register = SMC_GET_REV(lp);
1909         DBG(2, dev, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1910         version_string = chip_ids[ (revision_register >> 4) & 0xF];
1911         if (!version_string || (revision_register & 0xff00) != 0x3300) {
1912                 /* I don't recognize this chip, so... */
1913                 netdev_warn(dev, "%s: IO %p: Unrecognized revision register 0x%04x, Contact author.\n",
1914                             CARDNAME, ioaddr, revision_register);
1915 
1916                 retval = -ENODEV;
1917                 goto err_out;
1918         }
1919 
1920         /* At this point I'll assume that the chip is an SMC91x. */
1921         pr_info_once("%s\n", version);
1922 
1923         /* fill in some of the fields */
1924         dev->base_addr = (unsigned long)ioaddr;
1925         lp->base = ioaddr;
1926         lp->version = revision_register & 0xff;
1927         spin_lock_init(&lp->lock);
1928 
1929         /* Get the MAC address */
1930         SMC_SELECT_BANK(lp, 1);
1931         SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1932 
1933         /* now, reset the chip, and put it into a known state */
1934         smc_reset(dev);
1935 
1936         /*
1937          * If dev->irq is 0, then the device has to be banged on to see
1938          * what the IRQ is.
1939          *
1940          * This banging doesn't always detect the IRQ, for unknown reasons.
1941          * a workaround is to reset the chip and try again.
1942          *
1943          * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1944          * be what is requested on the command line.   I don't do that, mostly
1945          * because the card that I have uses a non-standard method of accessing
1946          * the IRQs, and because this _should_ work in most configurations.
1947          *
1948          * Specifying an IRQ is done with the assumption that the user knows
1949          * what (s)he is doing.  No checking is done!!!!
1950          */
1951         if (dev->irq < 1) {
1952                 int trials;
1953 
1954                 trials = 3;
1955                 while (trials--) {
1956                         dev->irq = smc_findirq(lp);
1957                         if (dev->irq)
1958                                 break;
1959                         /* kick the card and try again */
1960                         smc_reset(dev);
1961                 }
1962         }
1963         if (dev->irq == 0) {
1964                 netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1965                 retval = -ENODEV;
1966                 goto err_out;
1967         }
1968         dev->irq = irq_canonicalize(dev->irq);
1969 
1970         /* Fill in the fields of the device structure with ethernet values. */
1971         ether_setup(dev);
1972 
1973         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1974         dev->netdev_ops = &smc_netdev_ops;
1975         dev->ethtool_ops = &smc_ethtool_ops;
1976 
1977         tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1978         INIT_WORK(&lp->phy_configure, smc_phy_configure);
1979         lp->dev = dev;
1980         lp->mii.phy_id_mask = 0x1f;
1981         lp->mii.reg_num_mask = 0x1f;
1982         lp->mii.force_media = 0;
1983         lp->mii.full_duplex = 0;
1984         lp->mii.dev = dev;
1985         lp->mii.mdio_read = smc_phy_read;
1986         lp->mii.mdio_write = smc_phy_write;
1987 
1988         /*
1989          * Locate the phy, if any.
1990          */
1991         if (lp->version >= (CHIP_91100 << 4))
1992                 smc_phy_detect(dev);
1993 
1994         /* then shut everything down to save power */
1995         smc_shutdown(dev);
1996         smc_phy_powerdown(dev);
1997 
1998         /* Set default parameters */
1999         lp->msg_enable = NETIF_MSG_LINK;
2000         lp->ctl_rfduplx = 0;
2001         lp->ctl_rspeed = 10;
2002 
2003         if (lp->version >= (CHIP_91100 << 4)) {
2004                 lp->ctl_rfduplx = 1;
2005                 lp->ctl_rspeed = 100;
2006         }
2007 
2008         /* Grab the IRQ */
2009         retval = request_irq(dev->irq, smc_interrupt, irq_flags, dev->name, dev);
2010         if (retval)
2011                 goto err_out;
2012 
2013 #ifdef CONFIG_ARCH_PXA
2014 #  ifdef SMC_USE_PXA_DMA
2015         lp->cfg.flags |= SMC91X_USE_DMA;
2016 #  endif
2017         if (lp->cfg.flags & SMC91X_USE_DMA) {
2018                 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2019                                           smc_pxa_dma_irq, NULL);
2020                 if (dma >= 0)
2021                         dev->dma = dma;
2022         }
2023 #endif
2024 
2025         retval = register_netdev(dev);
2026         if (retval == 0) {
2027                 /* now, print out the card info, in a short format.. */
2028                 netdev_info(dev, "%s (rev %d) at %p IRQ %d",
2029                             version_string, revision_register & 0x0f,
2030                             lp->base, dev->irq);
2031 
2032                 if (dev->dma != (unsigned char)-1)
2033                         pr_cont(" DMA %d", dev->dma);
2034 
2035                 pr_cont("%s%s\n",
2036                         lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
2037                         THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2038 
2039                 if (!is_valid_ether_addr(dev->dev_addr)) {
2040                         netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
2041                 } else {
2042                         /* Print the Ethernet address */
2043                         netdev_info(dev, "Ethernet addr: %pM\n",
2044                                     dev->dev_addr);
2045                 }
2046 
2047                 if (lp->phy_type == 0) {
2048                         PRINTK(dev, "No PHY found\n");
2049                 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2050                         PRINTK(dev, "PHY LAN83C183 (LAN91C111 Internal)\n");
2051                 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2052                         PRINTK(dev, "PHY LAN83C180\n");
2053                 }
2054         }
2055 
2056 err_out:
2057 #ifdef CONFIG_ARCH_PXA
2058         if (retval && dev->dma != (unsigned char)-1)
2059                 pxa_free_dma(dev->dma);
2060 #endif
2061         return retval;
2062 }
2063 
2064 static int smc_enable_device(struct platform_device *pdev)
2065 {
2066         struct net_device *ndev = platform_get_drvdata(pdev);
2067         struct smc_local *lp = netdev_priv(ndev);
2068         unsigned long flags;
2069         unsigned char ecor, ecsr;
2070         void __iomem *addr;
2071         struct resource * res;
2072 
2073         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2074         if (!res)
2075                 return 0;
2076 
2077         /*
2078          * Map the attribute space.  This is overkill, but clean.
2079          */
2080         addr = ioremap(res->start, ATTRIB_SIZE);
2081         if (!addr)
2082                 return -ENOMEM;
2083 
2084         /*
2085          * Reset the device.  We must disable IRQs around this
2086          * since a reset causes the IRQ line become active.
2087          */
2088         local_irq_save(flags);
2089         ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2090         writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2091         readb(addr + (ECOR << SMC_IO_SHIFT));
2092 
2093         /*
2094          * Wait 100us for the chip to reset.
2095          */
2096         udelay(100);
2097 
2098         /*
2099          * The device will ignore all writes to the enable bit while
2100          * reset is asserted, even if the reset bit is cleared in the
2101          * same write.  Must clear reset first, then enable the device.
2102          */
2103         writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2104         writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2105 
2106         /*
2107          * Set the appropriate byte/word mode.
2108          */
2109         ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2110         if (!SMC_16BIT(lp))
2111                 ecsr |= ECSR_IOIS8;
2112         writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2113         local_irq_restore(flags);
2114 
2115         iounmap(addr);
2116 
2117         /*
2118          * Wait for the chip to wake up.  We could poll the control
2119          * register in the main register space, but that isn't mapped
2120          * yet.  We know this is going to take 750us.
2121          */
2122         msleep(1);
2123 
2124         return 0;
2125 }
2126 
2127 static int smc_request_attrib(struct platform_device *pdev,
2128                               struct net_device *ndev)
2129 {
2130         struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2131         struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2132 
2133         if (!res)
2134                 return 0;
2135 
2136         if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2137                 return -EBUSY;
2138 
2139         return 0;
2140 }
2141 
2142 static void smc_release_attrib(struct platform_device *pdev,
2143                                struct net_device *ndev)
2144 {
2145         struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2146         struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2147 
2148         if (res)
2149                 release_mem_region(res->start, ATTRIB_SIZE);
2150 }
2151 
2152 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2153 {
2154         if (SMC_CAN_USE_DATACS) {
2155                 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2156                 struct smc_local *lp = netdev_priv(ndev);
2157 
2158                 if (!res)
2159                         return;
2160 
2161                 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2162                         netdev_info(ndev, "%s: failed to request datacs memory region.\n",
2163                                     CARDNAME);
2164                         return;
2165                 }
2166 
2167                 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2168         }
2169 }
2170 
2171 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2172 {
2173         if (SMC_CAN_USE_DATACS) {
2174                 struct smc_local *lp = netdev_priv(ndev);
2175                 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2176 
2177                 if (lp->datacs)
2178                         iounmap(lp->datacs);
2179 
2180                 lp->datacs = NULL;
2181 
2182                 if (res)
2183                         release_mem_region(res->start, SMC_DATA_EXTENT);
2184         }
2185 }
2186 
2187 #if IS_BUILTIN(CONFIG_OF)
2188 static const struct of_device_id smc91x_match[] = {
2189         { .compatible = "smsc,lan91c94", },
2190         { .compatible = "smsc,lan91c111", },
2191         {},
2192 };
2193 MODULE_DEVICE_TABLE(of, smc91x_match);
2194 #endif
2195 
2196 /*
2197  * smc_init(void)
2198  *   Input parameters:
2199  *      dev->base_addr == 0, try to find all possible locations
2200  *      dev->base_addr > 0x1ff, this is the address to check
2201  *      dev->base_addr == <anything else>, return failure code
2202  *
2203  *   Output:
2204  *      0 --> there is a device
2205  *      anything else, error
2206  */
2207 static int smc_drv_probe(struct platform_device *pdev)
2208 {
2209         struct smc91x_platdata *pd = dev_get_platdata(&pdev->dev);
2210         const struct of_device_id *match = NULL;
2211         struct smc_local *lp;
2212         struct net_device *ndev;
2213         struct resource *res, *ires;
2214         unsigned int __iomem *addr;
2215         unsigned long irq_flags = SMC_IRQ_FLAGS;
2216         int ret;
2217 
2218         ndev = alloc_etherdev(sizeof(struct smc_local));
2219         if (!ndev) {
2220                 ret = -ENOMEM;
2221                 goto out;
2222         }
2223         SET_NETDEV_DEV(ndev, &pdev->dev);
2224 
2225         /* get configuration from platform data, only allow use of
2226          * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2227          */
2228 
2229         lp = netdev_priv(ndev);
2230         lp->cfg.flags = 0;
2231 
2232         if (pd) {
2233                 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2234                 lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
2235         }
2236 
2237 #if IS_BUILTIN(CONFIG_OF)
2238         match = of_match_device(of_match_ptr(smc91x_match), &pdev->dev);
2239         if (match) {
2240                 struct device_node *np = pdev->dev.of_node;
2241                 u32 val;
2242 
2243                 /* Combination of IO widths supported, default to 16-bit */
2244                 if (!of_property_read_u32(np, "reg-io-width", &val)) {
2245                         if (val & 1)
2246                                 lp->cfg.flags |= SMC91X_USE_8BIT;
2247                         if ((val == 0) || (val & 2))
2248                                 lp->cfg.flags |= SMC91X_USE_16BIT;
2249                         if (val & 4)
2250                                 lp->cfg.flags |= SMC91X_USE_32BIT;
2251                 } else {
2252                         lp->cfg.flags |= SMC91X_USE_16BIT;
2253                 }
2254         }
2255 #endif
2256 
2257         if (!pd && !match) {
2258                 lp->cfg.flags |= (SMC_CAN_USE_8BIT)  ? SMC91X_USE_8BIT  : 0;
2259                 lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
2260                 lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
2261                 lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
2262         }
2263 
2264         if (!lp->cfg.leda && !lp->cfg.ledb) {
2265                 lp->cfg.leda = RPC_LSA_DEFAULT;
2266                 lp->cfg.ledb = RPC_LSB_DEFAULT;
2267         }
2268 
2269         ndev->dma = (unsigned char)-1;
2270 
2271         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2272         if (!res)
2273                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2274         if (!res) {
2275                 ret = -ENODEV;
2276                 goto out_free_netdev;
2277         }
2278 
2279 
2280         if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2281                 ret = -EBUSY;
2282                 goto out_free_netdev;
2283         }
2284 
2285         ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2286         if (!ires) {
2287                 ret = -ENODEV;
2288                 goto out_release_io;
2289         }
2290 
2291         ndev->irq = ires->start;
2292 
2293         if (irq_flags == -1 || ires->flags & IRQF_TRIGGER_MASK)
2294                 irq_flags = ires->flags & IRQF_TRIGGER_MASK;
2295 
2296         ret = smc_request_attrib(pdev, ndev);
2297         if (ret)
2298                 goto out_release_io;
2299 #if defined(CONFIG_SA1100_ASSABET)
2300         neponset_ncr_set(NCR_ENET_OSC_EN);
2301 #endif
2302         platform_set_drvdata(pdev, ndev);
2303         ret = smc_enable_device(pdev);
2304         if (ret)
2305                 goto out_release_attrib;
2306 
2307         addr = ioremap(res->start, SMC_IO_EXTENT);
2308         if (!addr) {
2309                 ret = -ENOMEM;
2310                 goto out_release_attrib;
2311         }
2312 
2313 #ifdef CONFIG_ARCH_PXA
2314         {
2315                 struct smc_local *lp = netdev_priv(ndev);
2316                 lp->device = &pdev->dev;
2317                 lp->physaddr = res->start;
2318         }
2319 #endif
2320 
2321         ret = smc_probe(ndev, addr, irq_flags);
2322         if (ret != 0)
2323                 goto out_iounmap;
2324 
2325         smc_request_datacs(pdev, ndev);
2326 
2327         return 0;
2328 
2329  out_iounmap:
2330         iounmap(addr);
2331  out_release_attrib:
2332         smc_release_attrib(pdev, ndev);
2333  out_release_io:
2334         release_mem_region(res->start, SMC_IO_EXTENT);
2335  out_free_netdev:
2336         free_netdev(ndev);
2337  out:
2338         pr_info("%s: not found (%d).\n", CARDNAME, ret);
2339 
2340         return ret;
2341 }
2342 
2343 static int smc_drv_remove(struct platform_device *pdev)
2344 {
2345         struct net_device *ndev = platform_get_drvdata(pdev);
2346         struct smc_local *lp = netdev_priv(ndev);
2347         struct resource *res;
2348 
2349         unregister_netdev(ndev);
2350 
2351         free_irq(ndev->irq, ndev);
2352 
2353 #ifdef CONFIG_ARCH_PXA
2354         if (ndev->dma != (unsigned char)-1)
2355                 pxa_free_dma(ndev->dma);
2356 #endif
2357         iounmap(lp->base);
2358 
2359         smc_release_datacs(pdev,ndev);
2360         smc_release_attrib(pdev,ndev);
2361 
2362         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2363         if (!res)
2364                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2365         release_mem_region(res->start, SMC_IO_EXTENT);
2366 
2367         free_netdev(ndev);
2368 
2369         return 0;
2370 }
2371 
2372 static int smc_drv_suspend(struct device *dev)
2373 {
2374         struct platform_device *pdev = to_platform_device(dev);
2375         struct net_device *ndev = platform_get_drvdata(pdev);
2376 
2377         if (ndev) {
2378                 if (netif_running(ndev)) {
2379                         netif_device_detach(ndev);
2380                         smc_shutdown(ndev);
2381                         smc_phy_powerdown(ndev);
2382                 }
2383         }
2384         return 0;
2385 }
2386 
2387 static int smc_drv_resume(struct device *dev)
2388 {
2389         struct platform_device *pdev = to_platform_device(dev);
2390         struct net_device *ndev = platform_get_drvdata(pdev);
2391 
2392         if (ndev) {
2393                 struct smc_local *lp = netdev_priv(ndev);
2394                 smc_enable_device(pdev);
2395                 if (netif_running(ndev)) {
2396                         smc_reset(ndev);
2397                         smc_enable(ndev);
2398                         if (lp->phy_type != 0)
2399                                 smc_phy_configure(&lp->phy_configure);
2400                         netif_device_attach(ndev);
2401                 }
2402         }
2403         return 0;
2404 }
2405 
2406 static struct dev_pm_ops smc_drv_pm_ops = {
2407         .suspend        = smc_drv_suspend,
2408         .resume         = smc_drv_resume,
2409 };
2410 
2411 static struct platform_driver smc_driver = {
2412         .probe          = smc_drv_probe,
2413         .remove         = smc_drv_remove,
2414         .driver         = {
2415                 .name   = CARDNAME,
2416                 .owner  = THIS_MODULE,
2417                 .pm     = &smc_drv_pm_ops,
2418                 .of_match_table = of_match_ptr(smc91x_match),
2419         },
2420 };
2421 
2422 module_platform_driver(smc_driver);
2423 

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