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Linux/drivers/net/ethernet/smsc/smc91x.c

  1 /*
  2  * smc91x.c
  3  * This is a driver for SMSC's 91C9x/91C1xx single-chip Ethernet devices.
  4  *
  5  * Copyright (C) 1996 by Erik Stahlman
  6  * Copyright (C) 2001 Standard Microsystems Corporation
  7  *      Developed by Simple Network Magic Corporation
  8  * Copyright (C) 2003 Monta Vista Software, Inc.
  9  *      Unified SMC91x driver by Nicolas Pitre
 10  *
 11  * This program is free software; you can redistribute it and/or modify
 12  * it under the terms of the GNU General Public License as published by
 13  * the Free Software Foundation; either version 2 of the License, or
 14  * (at your option) any later version.
 15  *
 16  * This program is distributed in the hope that it will be useful,
 17  * but WITHOUT ANY WARRANTY; without even the implied warranty of
 18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19  * GNU General Public License for more details.
 20  *
 21  * You should have received a copy of the GNU General Public License
 22  * along with this program; if not, see <http://www.gnu.org/licenses/>.
 23  *
 24  * Arguments:
 25  *      io      = for the base address
 26  *      irq     = for the IRQ
 27  *      nowait  = 0 for normal wait states, 1 eliminates additional wait states
 28  *
 29  * original author:
 30  *      Erik Stahlman <erik@vt.edu>
 31  *
 32  * hardware multicast code:
 33  *    Peter Cammaert <pc@denkart.be>
 34  *
 35  * contributors:
 36  *      Daris A Nevil <dnevil@snmc.com>
 37  *      Nicolas Pitre <nico@fluxnic.net>
 38  *      Russell King <rmk@arm.linux.org.uk>
 39  *
 40  * History:
 41  *   08/20/00  Arnaldo Melo       fix kfree(skb) in smc_hardware_send_packet
 42  *   12/15/00  Christian Jullien  fix "Warning: kfree_skb on hard IRQ"
 43  *   03/16/01  Daris A Nevil      modified smc9194.c for use with LAN91C111
 44  *   08/22/01  Scott Anderson     merge changes from smc9194 to smc91111
 45  *   08/21/01  Pramod B Bhardwaj  added support for RevB of LAN91C111
 46  *   12/20/01  Jeff Sutherland    initial port to Xscale PXA with DMA support
 47  *   04/07/03  Nicolas Pitre      unified SMC91x driver, killed irq races,
 48  *                                more bus abstraction, big cleanup, etc.
 49  *   29/09/03  Russell King       - add driver model support
 50  *                                - ethtool support
 51  *                                - convert to use generic MII interface
 52  *                                - add link up/down notification
 53  *                                - don't try to handle full negotiation in
 54  *                                  smc_phy_configure
 55  *                                - clean up (and fix stack overrun) in PHY
 56  *                                  MII read/write functions
 57  *   22/09/04  Nicolas Pitre      big update (see commit log for details)
 58  */
 59 static const char version[] =
 60         "smc91x.c: v1.1, sep 22 2004 by Nicolas Pitre <nico@fluxnic.net>";
 61 
 62 /* Debugging level */
 63 #ifndef SMC_DEBUG
 64 #define SMC_DEBUG               0
 65 #endif
 66 
 67 
 68 #include <linux/module.h>
 69 #include <linux/kernel.h>
 70 #include <linux/sched.h>
 71 #include <linux/delay.h>
 72 #include <linux/interrupt.h>
 73 #include <linux/irq.h>
 74 #include <linux/errno.h>
 75 #include <linux/ioport.h>
 76 #include <linux/crc32.h>
 77 #include <linux/platform_device.h>
 78 #include <linux/spinlock.h>
 79 #include <linux/ethtool.h>
 80 #include <linux/mii.h>
 81 #include <linux/workqueue.h>
 82 #include <linux/of.h>
 83 #include <linux/of_device.h>
 84 #include <linux/of_gpio.h>
 85 
 86 #include <linux/netdevice.h>
 87 #include <linux/etherdevice.h>
 88 #include <linux/skbuff.h>
 89 
 90 #include <asm/io.h>
 91 
 92 #include "smc91x.h"
 93 
 94 #if defined(CONFIG_ASSABET_NEPONSET)
 95 #include <mach/assabet.h>
 96 #include <mach/neponset.h>
 97 #endif
 98 
 99 #ifndef SMC_NOWAIT
100 # define SMC_NOWAIT             0
101 #endif
102 static int nowait = SMC_NOWAIT;
103 module_param(nowait, int, 0400);
104 MODULE_PARM_DESC(nowait, "set to 1 for no wait state");
105 
106 /*
107  * Transmit timeout, default 5 seconds.
108  */
109 static int watchdog = 1000;
110 module_param(watchdog, int, 0400);
111 MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
112 
113 MODULE_LICENSE("GPL");
114 MODULE_ALIAS("platform:smc91x");
115 
116 /*
117  * The internal workings of the driver.  If you are changing anything
118  * here with the SMC stuff, you should have the datasheet and know
119  * what you are doing.
120  */
121 #define CARDNAME "smc91x"
122 
123 /*
124  * Use power-down feature of the chip
125  */
126 #define POWER_DOWN              1
127 
128 /*
129  * Wait time for memory to be free.  This probably shouldn't be
130  * tuned that much, as waiting for this means nothing else happens
131  * in the system
132  */
133 #define MEMORY_WAIT_TIME        16
134 
135 /*
136  * The maximum number of processing loops allowed for each call to the
137  * IRQ handler.
138  */
139 #define MAX_IRQ_LOOPS           8
140 
141 /*
142  * This selects whether TX packets are sent one by one to the SMC91x internal
143  * memory and throttled until transmission completes.  This may prevent
144  * RX overruns a litle by keeping much of the memory free for RX packets
145  * but to the expense of reduced TX throughput and increased IRQ overhead.
146  * Note this is not a cure for a too slow data bus or too high IRQ latency.
147  */
148 #define THROTTLE_TX_PKTS        0
149 
150 /*
151  * The MII clock high/low times.  2x this number gives the MII clock period
152  * in microseconds. (was 50, but this gives 6.4ms for each MII transaction!)
153  */
154 #define MII_DELAY               1
155 
156 #define DBG(n, dev, fmt, ...)                                   \
157         do {                                                    \
158                 if (SMC_DEBUG >= (n))                           \
159                         netdev_dbg(dev, fmt, ##__VA_ARGS__);    \
160         } while (0)
161 
162 #define PRINTK(dev, fmt, ...)                                   \
163         do {                                                    \
164                 if (SMC_DEBUG > 0)                              \
165                         netdev_info(dev, fmt, ##__VA_ARGS__);   \
166                 else                                            \
167                         netdev_dbg(dev, fmt, ##__VA_ARGS__);    \
168         } while (0)
169 
170 #if SMC_DEBUG > 3
171 static void PRINT_PKT(u_char *buf, int length)
172 {
173         int i;
174         int remainder;
175         int lines;
176 
177         lines = length / 16;
178         remainder = length % 16;
179 
180         for (i = 0; i < lines ; i ++) {
181                 int cur;
182                 printk(KERN_DEBUG);
183                 for (cur = 0; cur < 8; cur++) {
184                         u_char a, b;
185                         a = *buf++;
186                         b = *buf++;
187                         pr_cont("%02x%02x ", a, b);
188                 }
189                 pr_cont("\n");
190         }
191         printk(KERN_DEBUG);
192         for (i = 0; i < remainder/2 ; i++) {
193                 u_char a, b;
194                 a = *buf++;
195                 b = *buf++;
196                 pr_cont("%02x%02x ", a, b);
197         }
198         pr_cont("\n");
199 }
200 #else
201 static inline void PRINT_PKT(u_char *buf, int length) { }
202 #endif
203 
204 
205 /* this enables an interrupt in the interrupt mask register */
206 #define SMC_ENABLE_INT(lp, x) do {                                      \
207         unsigned char mask;                                             \
208         unsigned long smc_enable_flags;                                 \
209         spin_lock_irqsave(&lp->lock, smc_enable_flags);                 \
210         mask = SMC_GET_INT_MASK(lp);                                    \
211         mask |= (x);                                                    \
212         SMC_SET_INT_MASK(lp, mask);                                     \
213         spin_unlock_irqrestore(&lp->lock, smc_enable_flags);            \
214 } while (0)
215 
216 /* this disables an interrupt from the interrupt mask register */
217 #define SMC_DISABLE_INT(lp, x) do {                                     \
218         unsigned char mask;                                             \
219         unsigned long smc_disable_flags;                                \
220         spin_lock_irqsave(&lp->lock, smc_disable_flags);                \
221         mask = SMC_GET_INT_MASK(lp);                                    \
222         mask &= ~(x);                                                   \
223         SMC_SET_INT_MASK(lp, mask);                                     \
224         spin_unlock_irqrestore(&lp->lock, smc_disable_flags);           \
225 } while (0)
226 
227 /*
228  * Wait while MMU is busy.  This is usually in the order of a few nanosecs
229  * if at all, but let's avoid deadlocking the system if the hardware
230  * decides to go south.
231  */
232 #define SMC_WAIT_MMU_BUSY(lp) do {                                      \
233         if (unlikely(SMC_GET_MMU_CMD(lp) & MC_BUSY)) {          \
234                 unsigned long timeout = jiffies + 2;                    \
235                 while (SMC_GET_MMU_CMD(lp) & MC_BUSY) {         \
236                         if (time_after(jiffies, timeout)) {             \
237                                 netdev_dbg(dev, "timeout %s line %d\n", \
238                                            __FILE__, __LINE__);         \
239                                 break;                                  \
240                         }                                               \
241                         cpu_relax();                                    \
242                 }                                                       \
243         }                                                               \
244 } while (0)
245 
246 
247 /*
248  * this does a soft reset on the device
249  */
250 static void smc_reset(struct net_device *dev)
251 {
252         struct smc_local *lp = netdev_priv(dev);
253         void __iomem *ioaddr = lp->base;
254         unsigned int ctl, cfg;
255         struct sk_buff *pending_skb;
256 
257         DBG(2, dev, "%s\n", __func__);
258 
259         /* Disable all interrupts, block TX tasklet */
260         spin_lock_irq(&lp->lock);
261         SMC_SELECT_BANK(lp, 2);
262         SMC_SET_INT_MASK(lp, 0);
263         pending_skb = lp->pending_tx_skb;
264         lp->pending_tx_skb = NULL;
265         spin_unlock_irq(&lp->lock);
266 
267         /* free any pending tx skb */
268         if (pending_skb) {
269                 dev_kfree_skb(pending_skb);
270                 dev->stats.tx_errors++;
271                 dev->stats.tx_aborted_errors++;
272         }
273 
274         /*
275          * This resets the registers mostly to defaults, but doesn't
276          * affect EEPROM.  That seems unnecessary
277          */
278         SMC_SELECT_BANK(lp, 0);
279         SMC_SET_RCR(lp, RCR_SOFTRST);
280 
281         /*
282          * Setup the Configuration Register
283          * This is necessary because the CONFIG_REG is not affected
284          * by a soft reset
285          */
286         SMC_SELECT_BANK(lp, 1);
287 
288         cfg = CONFIG_DEFAULT;
289 
290         /*
291          * Setup for fast accesses if requested.  If the card/system
292          * can't handle it then there will be no recovery except for
293          * a hard reset or power cycle
294          */
295         if (lp->cfg.flags & SMC91X_NOWAIT)
296                 cfg |= CONFIG_NO_WAIT;
297 
298         /*
299          * Release from possible power-down state
300          * Configuration register is not affected by Soft Reset
301          */
302         cfg |= CONFIG_EPH_POWER_EN;
303 
304         SMC_SET_CONFIG(lp, cfg);
305 
306         /* this should pause enough for the chip to be happy */
307         /*
308          * elaborate?  What does the chip _need_? --jgarzik
309          *
310          * This seems to be undocumented, but something the original
311          * driver(s) have always done.  Suspect undocumented timing
312          * info/determined empirically. --rmk
313          */
314         udelay(1);
315 
316         /* Disable transmit and receive functionality */
317         SMC_SELECT_BANK(lp, 0);
318         SMC_SET_RCR(lp, RCR_CLEAR);
319         SMC_SET_TCR(lp, TCR_CLEAR);
320 
321         SMC_SELECT_BANK(lp, 1);
322         ctl = SMC_GET_CTL(lp) | CTL_LE_ENABLE;
323 
324         /*
325          * Set the control register to automatically release successfully
326          * transmitted packets, to make the best use out of our limited
327          * memory
328          */
329         if(!THROTTLE_TX_PKTS)
330                 ctl |= CTL_AUTO_RELEASE;
331         else
332                 ctl &= ~CTL_AUTO_RELEASE;
333         SMC_SET_CTL(lp, ctl);
334 
335         /* Reset the MMU */
336         SMC_SELECT_BANK(lp, 2);
337         SMC_SET_MMU_CMD(lp, MC_RESET);
338         SMC_WAIT_MMU_BUSY(lp);
339 }
340 
341 /*
342  * Enable Interrupts, Receive, and Transmit
343  */
344 static void smc_enable(struct net_device *dev)
345 {
346         struct smc_local *lp = netdev_priv(dev);
347         void __iomem *ioaddr = lp->base;
348         int mask;
349 
350         DBG(2, dev, "%s\n", __func__);
351 
352         /* see the header file for options in TCR/RCR DEFAULT */
353         SMC_SELECT_BANK(lp, 0);
354         SMC_SET_TCR(lp, lp->tcr_cur_mode);
355         SMC_SET_RCR(lp, lp->rcr_cur_mode);
356 
357         SMC_SELECT_BANK(lp, 1);
358         SMC_SET_MAC_ADDR(lp, dev->dev_addr);
359 
360         /* now, enable interrupts */
361         mask = IM_EPH_INT|IM_RX_OVRN_INT|IM_RCV_INT;
362         if (lp->version >= (CHIP_91100 << 4))
363                 mask |= IM_MDINT;
364         SMC_SELECT_BANK(lp, 2);
365         SMC_SET_INT_MASK(lp, mask);
366 
367         /*
368          * From this point the register bank must _NOT_ be switched away
369          * to something else than bank 2 without proper locking against
370          * races with any tasklet or interrupt handlers until smc_shutdown()
371          * or smc_reset() is called.
372          */
373 }
374 
375 /*
376  * this puts the device in an inactive state
377  */
378 static void smc_shutdown(struct net_device *dev)
379 {
380         struct smc_local *lp = netdev_priv(dev);
381         void __iomem *ioaddr = lp->base;
382         struct sk_buff *pending_skb;
383 
384         DBG(2, dev, "%s: %s\n", CARDNAME, __func__);
385 
386         /* no more interrupts for me */
387         spin_lock_irq(&lp->lock);
388         SMC_SELECT_BANK(lp, 2);
389         SMC_SET_INT_MASK(lp, 0);
390         pending_skb = lp->pending_tx_skb;
391         lp->pending_tx_skb = NULL;
392         spin_unlock_irq(&lp->lock);
393         if (pending_skb)
394                 dev_kfree_skb(pending_skb);
395 
396         /* and tell the card to stay away from that nasty outside world */
397         SMC_SELECT_BANK(lp, 0);
398         SMC_SET_RCR(lp, RCR_CLEAR);
399         SMC_SET_TCR(lp, TCR_CLEAR);
400 
401 #ifdef POWER_DOWN
402         /* finally, shut the chip down */
403         SMC_SELECT_BANK(lp, 1);
404         SMC_SET_CONFIG(lp, SMC_GET_CONFIG(lp) & ~CONFIG_EPH_POWER_EN);
405 #endif
406 }
407 
408 /*
409  * This is the procedure to handle the receipt of a packet.
410  */
411 static inline void  smc_rcv(struct net_device *dev)
412 {
413         struct smc_local *lp = netdev_priv(dev);
414         void __iomem *ioaddr = lp->base;
415         unsigned int packet_number, status, packet_len;
416 
417         DBG(3, dev, "%s\n", __func__);
418 
419         packet_number = SMC_GET_RXFIFO(lp);
420         if (unlikely(packet_number & RXFIFO_REMPTY)) {
421                 PRINTK(dev, "smc_rcv with nothing on FIFO.\n");
422                 return;
423         }
424 
425         /* read from start of packet */
426         SMC_SET_PTR(lp, PTR_READ | PTR_RCV | PTR_AUTOINC);
427 
428         /* First two words are status and packet length */
429         SMC_GET_PKT_HDR(lp, status, packet_len);
430         packet_len &= 0x07ff;  /* mask off top bits */
431         DBG(2, dev, "RX PNR 0x%x STATUS 0x%04x LENGTH 0x%04x (%d)\n",
432             packet_number, status, packet_len, packet_len);
433 
434         back:
435         if (unlikely(packet_len < 6 || status & RS_ERRORS)) {
436                 if (status & RS_TOOLONG && packet_len <= (1514 + 4 + 6)) {
437                         /* accept VLAN packets */
438                         status &= ~RS_TOOLONG;
439                         goto back;
440                 }
441                 if (packet_len < 6) {
442                         /* bloody hardware */
443                         netdev_err(dev, "fubar (rxlen %u status %x\n",
444                                    packet_len, status);
445                         status |= RS_TOOSHORT;
446                 }
447                 SMC_WAIT_MMU_BUSY(lp);
448                 SMC_SET_MMU_CMD(lp, MC_RELEASE);
449                 dev->stats.rx_errors++;
450                 if (status & RS_ALGNERR)
451                         dev->stats.rx_frame_errors++;
452                 if (status & (RS_TOOSHORT | RS_TOOLONG))
453                         dev->stats.rx_length_errors++;
454                 if (status & RS_BADCRC)
455                         dev->stats.rx_crc_errors++;
456         } else {
457                 struct sk_buff *skb;
458                 unsigned char *data;
459                 unsigned int data_len;
460 
461                 /* set multicast stats */
462                 if (status & RS_MULTICAST)
463                         dev->stats.multicast++;
464 
465                 /*
466                  * Actual payload is packet_len - 6 (or 5 if odd byte).
467                  * We want skb_reserve(2) and the final ctrl word
468                  * (2 bytes, possibly containing the payload odd byte).
469                  * Furthermore, we add 2 bytes to allow rounding up to
470                  * multiple of 4 bytes on 32 bit buses.
471                  * Hence packet_len - 6 + 2 + 2 + 2.
472                  */
473                 skb = netdev_alloc_skb(dev, packet_len);
474                 if (unlikely(skb == NULL)) {
475                         SMC_WAIT_MMU_BUSY(lp);
476                         SMC_SET_MMU_CMD(lp, MC_RELEASE);
477                         dev->stats.rx_dropped++;
478                         return;
479                 }
480 
481                 /* Align IP header to 32 bits */
482                 skb_reserve(skb, 2);
483 
484                 /* BUG: the LAN91C111 rev A never sets this bit. Force it. */
485                 if (lp->version == 0x90)
486                         status |= RS_ODDFRAME;
487 
488                 /*
489                  * If odd length: packet_len - 5,
490                  * otherwise packet_len - 6.
491                  * With the trailing ctrl byte it's packet_len - 4.
492                  */
493                 data_len = packet_len - ((status & RS_ODDFRAME) ? 5 : 6);
494                 data = skb_put(skb, data_len);
495                 SMC_PULL_DATA(lp, data, packet_len - 4);
496 
497                 SMC_WAIT_MMU_BUSY(lp);
498                 SMC_SET_MMU_CMD(lp, MC_RELEASE);
499 
500                 PRINT_PKT(data, packet_len - 4);
501 
502                 skb->protocol = eth_type_trans(skb, dev);
503                 netif_rx(skb);
504                 dev->stats.rx_packets++;
505                 dev->stats.rx_bytes += data_len;
506         }
507 }
508 
509 #ifdef CONFIG_SMP
510 /*
511  * On SMP we have the following problem:
512  *
513  *      A = smc_hardware_send_pkt()
514  *      B = smc_hard_start_xmit()
515  *      C = smc_interrupt()
516  *
517  * A and B can never be executed simultaneously.  However, at least on UP,
518  * it is possible (and even desirable) for C to interrupt execution of
519  * A or B in order to have better RX reliability and avoid overruns.
520  * C, just like A and B, must have exclusive access to the chip and
521  * each of them must lock against any other concurrent access.
522  * Unfortunately this is not possible to have C suspend execution of A or
523  * B taking place on another CPU. On UP this is no an issue since A and B
524  * are run from softirq context and C from hard IRQ context, and there is
525  * no other CPU where concurrent access can happen.
526  * If ever there is a way to force at least B and C to always be executed
527  * on the same CPU then we could use read/write locks to protect against
528  * any other concurrent access and C would always interrupt B. But life
529  * isn't that easy in a SMP world...
530  */
531 #define smc_special_trylock(lock, flags)                                \
532 ({                                                                      \
533         int __ret;                                                      \
534         local_irq_save(flags);                                          \
535         __ret = spin_trylock(lock);                                     \
536         if (!__ret)                                                     \
537                 local_irq_restore(flags);                               \
538         __ret;                                                          \
539 })
540 #define smc_special_lock(lock, flags)           spin_lock_irqsave(lock, flags)
541 #define smc_special_unlock(lock, flags)         spin_unlock_irqrestore(lock, flags)
542 #else
543 #define smc_special_trylock(lock, flags)        (flags == flags)
544 #define smc_special_lock(lock, flags)           do { flags = 0; } while (0)
545 #define smc_special_unlock(lock, flags) do { flags = 0; } while (0)
546 #endif
547 
548 /*
549  * This is called to actually send a packet to the chip.
550  */
551 static void smc_hardware_send_pkt(unsigned long data)
552 {
553         struct net_device *dev = (struct net_device *)data;
554         struct smc_local *lp = netdev_priv(dev);
555         void __iomem *ioaddr = lp->base;
556         struct sk_buff *skb;
557         unsigned int packet_no, len;
558         unsigned char *buf;
559         unsigned long flags;
560 
561         DBG(3, dev, "%s\n", __func__);
562 
563         if (!smc_special_trylock(&lp->lock, flags)) {
564                 netif_stop_queue(dev);
565                 tasklet_schedule(&lp->tx_task);
566                 return;
567         }
568 
569         skb = lp->pending_tx_skb;
570         if (unlikely(!skb)) {
571                 smc_special_unlock(&lp->lock, flags);
572                 return;
573         }
574         lp->pending_tx_skb = NULL;
575 
576         packet_no = SMC_GET_AR(lp);
577         if (unlikely(packet_no & AR_FAILED)) {
578                 netdev_err(dev, "Memory allocation failed.\n");
579                 dev->stats.tx_errors++;
580                 dev->stats.tx_fifo_errors++;
581                 smc_special_unlock(&lp->lock, flags);
582                 goto done;
583         }
584 
585         /* point to the beginning of the packet */
586         SMC_SET_PN(lp, packet_no);
587         SMC_SET_PTR(lp, PTR_AUTOINC);
588 
589         buf = skb->data;
590         len = skb->len;
591         DBG(2, dev, "TX PNR 0x%x LENGTH 0x%04x (%d) BUF 0x%p\n",
592             packet_no, len, len, buf);
593         PRINT_PKT(buf, len);
594 
595         /*
596          * Send the packet length (+6 for status words, length, and ctl.
597          * The card will pad to 64 bytes with zeroes if packet is too small.
598          */
599         SMC_PUT_PKT_HDR(lp, 0, len + 6);
600 
601         /* send the actual data */
602         SMC_PUSH_DATA(lp, buf, len & ~1);
603 
604         /* Send final ctl word with the last byte if there is one */
605         SMC_outw(((len & 1) ? (0x2000 | buf[len-1]) : 0), ioaddr, DATA_REG(lp));
606 
607         /*
608          * If THROTTLE_TX_PKTS is set, we stop the queue here. This will
609          * have the effect of having at most one packet queued for TX
610          * in the chip's memory at all time.
611          *
612          * If THROTTLE_TX_PKTS is not set then the queue is stopped only
613          * when memory allocation (MC_ALLOC) does not succeed right away.
614          */
615         if (THROTTLE_TX_PKTS)
616                 netif_stop_queue(dev);
617 
618         /* queue the packet for TX */
619         SMC_SET_MMU_CMD(lp, MC_ENQUEUE);
620         smc_special_unlock(&lp->lock, flags);
621 
622         dev->trans_start = jiffies;
623         dev->stats.tx_packets++;
624         dev->stats.tx_bytes += len;
625 
626         SMC_ENABLE_INT(lp, IM_TX_INT | IM_TX_EMPTY_INT);
627 
628 done:   if (!THROTTLE_TX_PKTS)
629                 netif_wake_queue(dev);
630 
631         dev_consume_skb_any(skb);
632 }
633 
634 /*
635  * Since I am not sure if I will have enough room in the chip's ram
636  * to store the packet, I call this routine which either sends it
637  * now, or set the card to generates an interrupt when ready
638  * for the packet.
639  */
640 static int smc_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
641 {
642         struct smc_local *lp = netdev_priv(dev);
643         void __iomem *ioaddr = lp->base;
644         unsigned int numPages, poll_count, status;
645         unsigned long flags;
646 
647         DBG(3, dev, "%s\n", __func__);
648 
649         BUG_ON(lp->pending_tx_skb != NULL);
650 
651         /*
652          * The MMU wants the number of pages to be the number of 256 bytes
653          * 'pages', minus 1 (since a packet can't ever have 0 pages :))
654          *
655          * The 91C111 ignores the size bits, but earlier models don't.
656          *
657          * Pkt size for allocating is data length +6 (for additional status
658          * words, length and ctl)
659          *
660          * If odd size then last byte is included in ctl word.
661          */
662         numPages = ((skb->len & ~1) + (6 - 1)) >> 8;
663         if (unlikely(numPages > 7)) {
664                 netdev_warn(dev, "Far too big packet error.\n");
665                 dev->stats.tx_errors++;
666                 dev->stats.tx_dropped++;
667                 dev_kfree_skb_any(skb);
668                 return NETDEV_TX_OK;
669         }
670 
671         smc_special_lock(&lp->lock, flags);
672 
673         /* now, try to allocate the memory */
674         SMC_SET_MMU_CMD(lp, MC_ALLOC | numPages);
675 
676         /*
677          * Poll the chip for a short amount of time in case the
678          * allocation succeeds quickly.
679          */
680         poll_count = MEMORY_WAIT_TIME;
681         do {
682                 status = SMC_GET_INT(lp);
683                 if (status & IM_ALLOC_INT) {
684                         SMC_ACK_INT(lp, IM_ALLOC_INT);
685                         break;
686                 }
687         } while (--poll_count);
688 
689         smc_special_unlock(&lp->lock, flags);
690 
691         lp->pending_tx_skb = skb;
692         if (!poll_count) {
693                 /* oh well, wait until the chip finds memory later */
694                 netif_stop_queue(dev);
695                 DBG(2, dev, "TX memory allocation deferred.\n");
696                 SMC_ENABLE_INT(lp, IM_ALLOC_INT);
697         } else {
698                 /*
699                  * Allocation succeeded: push packet to the chip's own memory
700                  * immediately.
701                  */
702                 smc_hardware_send_pkt((unsigned long)dev);
703         }
704 
705         return NETDEV_TX_OK;
706 }
707 
708 /*
709  * This handles a TX interrupt, which is only called when:
710  * - a TX error occurred, or
711  * - CTL_AUTO_RELEASE is not set and TX of a packet completed.
712  */
713 static void smc_tx(struct net_device *dev)
714 {
715         struct smc_local *lp = netdev_priv(dev);
716         void __iomem *ioaddr = lp->base;
717         unsigned int saved_packet, packet_no, tx_status, pkt_len;
718 
719         DBG(3, dev, "%s\n", __func__);
720 
721         /* If the TX FIFO is empty then nothing to do */
722         packet_no = SMC_GET_TXFIFO(lp);
723         if (unlikely(packet_no & TXFIFO_TEMPTY)) {
724                 PRINTK(dev, "smc_tx with nothing on FIFO.\n");
725                 return;
726         }
727 
728         /* select packet to read from */
729         saved_packet = SMC_GET_PN(lp);
730         SMC_SET_PN(lp, packet_no);
731 
732         /* read the first word (status word) from this packet */
733         SMC_SET_PTR(lp, PTR_AUTOINC | PTR_READ);
734         SMC_GET_PKT_HDR(lp, tx_status, pkt_len);
735         DBG(2, dev, "TX STATUS 0x%04x PNR 0x%02x\n",
736             tx_status, packet_no);
737 
738         if (!(tx_status & ES_TX_SUC))
739                 dev->stats.tx_errors++;
740 
741         if (tx_status & ES_LOSTCARR)
742                 dev->stats.tx_carrier_errors++;
743 
744         if (tx_status & (ES_LATCOL | ES_16COL)) {
745                 PRINTK(dev, "%s occurred on last xmit\n",
746                        (tx_status & ES_LATCOL) ?
747                         "late collision" : "too many collisions");
748                 dev->stats.tx_window_errors++;
749                 if (!(dev->stats.tx_window_errors & 63) && net_ratelimit()) {
750                         netdev_info(dev, "unexpectedly large number of bad collisions. Please check duplex setting.\n");
751                 }
752         }
753 
754         /* kill the packet */
755         SMC_WAIT_MMU_BUSY(lp);
756         SMC_SET_MMU_CMD(lp, MC_FREEPKT);
757 
758         /* Don't restore Packet Number Reg until busy bit is cleared */
759         SMC_WAIT_MMU_BUSY(lp);
760         SMC_SET_PN(lp, saved_packet);
761 
762         /* re-enable transmit */
763         SMC_SELECT_BANK(lp, 0);
764         SMC_SET_TCR(lp, lp->tcr_cur_mode);
765         SMC_SELECT_BANK(lp, 2);
766 }
767 
768 
769 /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
770 
771 static void smc_mii_out(struct net_device *dev, unsigned int val, int bits)
772 {
773         struct smc_local *lp = netdev_priv(dev);
774         void __iomem *ioaddr = lp->base;
775         unsigned int mii_reg, mask;
776 
777         mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
778         mii_reg |= MII_MDOE;
779 
780         for (mask = 1 << (bits - 1); mask; mask >>= 1) {
781                 if (val & mask)
782                         mii_reg |= MII_MDO;
783                 else
784                         mii_reg &= ~MII_MDO;
785 
786                 SMC_SET_MII(lp, mii_reg);
787                 udelay(MII_DELAY);
788                 SMC_SET_MII(lp, mii_reg | MII_MCLK);
789                 udelay(MII_DELAY);
790         }
791 }
792 
793 static unsigned int smc_mii_in(struct net_device *dev, int bits)
794 {
795         struct smc_local *lp = netdev_priv(dev);
796         void __iomem *ioaddr = lp->base;
797         unsigned int mii_reg, mask, val;
798 
799         mii_reg = SMC_GET_MII(lp) & ~(MII_MCLK | MII_MDOE | MII_MDO);
800         SMC_SET_MII(lp, mii_reg);
801 
802         for (mask = 1 << (bits - 1), val = 0; mask; mask >>= 1) {
803                 if (SMC_GET_MII(lp) & MII_MDI)
804                         val |= mask;
805 
806                 SMC_SET_MII(lp, mii_reg);
807                 udelay(MII_DELAY);
808                 SMC_SET_MII(lp, mii_reg | MII_MCLK);
809                 udelay(MII_DELAY);
810         }
811 
812         return val;
813 }
814 
815 /*
816  * Reads a register from the MII Management serial interface
817  */
818 static int smc_phy_read(struct net_device *dev, int phyaddr, int phyreg)
819 {
820         struct smc_local *lp = netdev_priv(dev);
821         void __iomem *ioaddr = lp->base;
822         unsigned int phydata;
823 
824         SMC_SELECT_BANK(lp, 3);
825 
826         /* Idle - 32 ones */
827         smc_mii_out(dev, 0xffffffff, 32);
828 
829         /* Start code (01) + read (10) + phyaddr + phyreg */
830         smc_mii_out(dev, 6 << 10 | phyaddr << 5 | phyreg, 14);
831 
832         /* Turnaround (2bits) + phydata */
833         phydata = smc_mii_in(dev, 18);
834 
835         /* Return to idle state */
836         SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
837 
838         DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
839             __func__, phyaddr, phyreg, phydata);
840 
841         SMC_SELECT_BANK(lp, 2);
842         return phydata;
843 }
844 
845 /*
846  * Writes a register to the MII Management serial interface
847  */
848 static void smc_phy_write(struct net_device *dev, int phyaddr, int phyreg,
849                           int phydata)
850 {
851         struct smc_local *lp = netdev_priv(dev);
852         void __iomem *ioaddr = lp->base;
853 
854         SMC_SELECT_BANK(lp, 3);
855 
856         /* Idle - 32 ones */
857         smc_mii_out(dev, 0xffffffff, 32);
858 
859         /* Start code (01) + write (01) + phyaddr + phyreg + turnaround + phydata */
860         smc_mii_out(dev, 5 << 28 | phyaddr << 23 | phyreg << 18 | 2 << 16 | phydata, 32);
861 
862         /* Return to idle state */
863         SMC_SET_MII(lp, SMC_GET_MII(lp) & ~(MII_MCLK|MII_MDOE|MII_MDO));
864 
865         DBG(3, dev, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
866             __func__, phyaddr, phyreg, phydata);
867 
868         SMC_SELECT_BANK(lp, 2);
869 }
870 
871 /*
872  * Finds and reports the PHY address
873  */
874 static void smc_phy_detect(struct net_device *dev)
875 {
876         struct smc_local *lp = netdev_priv(dev);
877         int phyaddr;
878 
879         DBG(2, dev, "%s\n", __func__);
880 
881         lp->phy_type = 0;
882 
883         /*
884          * Scan all 32 PHY addresses if necessary, starting at
885          * PHY#1 to PHY#31, and then PHY#0 last.
886          */
887         for (phyaddr = 1; phyaddr < 33; ++phyaddr) {
888                 unsigned int id1, id2;
889 
890                 /* Read the PHY identifiers */
891                 id1 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID1);
892                 id2 = smc_phy_read(dev, phyaddr & 31, MII_PHYSID2);
893 
894                 DBG(3, dev, "phy_id1=0x%x, phy_id2=0x%x\n",
895                     id1, id2);
896 
897                 /* Make sure it is a valid identifier */
898                 if (id1 != 0x0000 && id1 != 0xffff && id1 != 0x8000 &&
899                     id2 != 0x0000 && id2 != 0xffff && id2 != 0x8000) {
900                         /* Save the PHY's address */
901                         lp->mii.phy_id = phyaddr & 31;
902                         lp->phy_type = id1 << 16 | id2;
903                         break;
904                 }
905         }
906 }
907 
908 /*
909  * Sets the PHY to a configuration as determined by the user
910  */
911 static int smc_phy_fixed(struct net_device *dev)
912 {
913         struct smc_local *lp = netdev_priv(dev);
914         void __iomem *ioaddr = lp->base;
915         int phyaddr = lp->mii.phy_id;
916         int bmcr, cfg1;
917 
918         DBG(3, dev, "%s\n", __func__);
919 
920         /* Enter Link Disable state */
921         cfg1 = smc_phy_read(dev, phyaddr, PHY_CFG1_REG);
922         cfg1 |= PHY_CFG1_LNKDIS;
923         smc_phy_write(dev, phyaddr, PHY_CFG1_REG, cfg1);
924 
925         /*
926          * Set our fixed capabilities
927          * Disable auto-negotiation
928          */
929         bmcr = 0;
930 
931         if (lp->ctl_rfduplx)
932                 bmcr |= BMCR_FULLDPLX;
933 
934         if (lp->ctl_rspeed == 100)
935                 bmcr |= BMCR_SPEED100;
936 
937         /* Write our capabilities to the phy control register */
938         smc_phy_write(dev, phyaddr, MII_BMCR, bmcr);
939 
940         /* Re-Configure the Receive/Phy Control register */
941         SMC_SELECT_BANK(lp, 0);
942         SMC_SET_RPC(lp, lp->rpc_cur_mode);
943         SMC_SELECT_BANK(lp, 2);
944 
945         return 1;
946 }
947 
948 /**
949  * smc_phy_reset - reset the phy
950  * @dev: net device
951  * @phy: phy address
952  *
953  * Issue a software reset for the specified PHY and
954  * wait up to 100ms for the reset to complete.  We should
955  * not access the PHY for 50ms after issuing the reset.
956  *
957  * The time to wait appears to be dependent on the PHY.
958  *
959  * Must be called with lp->lock locked.
960  */
961 static int smc_phy_reset(struct net_device *dev, int phy)
962 {
963         struct smc_local *lp = netdev_priv(dev);
964         unsigned int bmcr;
965         int timeout;
966 
967         smc_phy_write(dev, phy, MII_BMCR, BMCR_RESET);
968 
969         for (timeout = 2; timeout; timeout--) {
970                 spin_unlock_irq(&lp->lock);
971                 msleep(50);
972                 spin_lock_irq(&lp->lock);
973 
974                 bmcr = smc_phy_read(dev, phy, MII_BMCR);
975                 if (!(bmcr & BMCR_RESET))
976                         break;
977         }
978 
979         return bmcr & BMCR_RESET;
980 }
981 
982 /**
983  * smc_phy_powerdown - powerdown phy
984  * @dev: net device
985  *
986  * Power down the specified PHY
987  */
988 static void smc_phy_powerdown(struct net_device *dev)
989 {
990         struct smc_local *lp = netdev_priv(dev);
991         unsigned int bmcr;
992         int phy = lp->mii.phy_id;
993 
994         if (lp->phy_type == 0)
995                 return;
996 
997         /* We need to ensure that no calls to smc_phy_configure are
998            pending.
999         */
1000         cancel_work_sync(&lp->phy_configure);
1001 
1002         bmcr = smc_phy_read(dev, phy, MII_BMCR);
1003         smc_phy_write(dev, phy, MII_BMCR, bmcr | BMCR_PDOWN);
1004 }
1005 
1006 /**
1007  * smc_phy_check_media - check the media status and adjust TCR
1008  * @dev: net device
1009  * @init: set true for initialisation
1010  *
1011  * Select duplex mode depending on negotiation state.  This
1012  * also updates our carrier state.
1013  */
1014 static void smc_phy_check_media(struct net_device *dev, int init)
1015 {
1016         struct smc_local *lp = netdev_priv(dev);
1017         void __iomem *ioaddr = lp->base;
1018 
1019         if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
1020                 /* duplex state has changed */
1021                 if (lp->mii.full_duplex) {
1022                         lp->tcr_cur_mode |= TCR_SWFDUP;
1023                 } else {
1024                         lp->tcr_cur_mode &= ~TCR_SWFDUP;
1025                 }
1026 
1027                 SMC_SELECT_BANK(lp, 0);
1028                 SMC_SET_TCR(lp, lp->tcr_cur_mode);
1029         }
1030 }
1031 
1032 /*
1033  * Configures the specified PHY through the MII management interface
1034  * using Autonegotiation.
1035  * Calls smc_phy_fixed() if the user has requested a certain config.
1036  * If RPC ANEG bit is set, the media selection is dependent purely on
1037  * the selection by the MII (either in the MII BMCR reg or the result
1038  * of autonegotiation.)  If the RPC ANEG bit is cleared, the selection
1039  * is controlled by the RPC SPEED and RPC DPLX bits.
1040  */
1041 static void smc_phy_configure(struct work_struct *work)
1042 {
1043         struct smc_local *lp =
1044                 container_of(work, struct smc_local, phy_configure);
1045         struct net_device *dev = lp->dev;
1046         void __iomem *ioaddr = lp->base;
1047         int phyaddr = lp->mii.phy_id;
1048         int my_phy_caps; /* My PHY capabilities */
1049         int my_ad_caps; /* My Advertised capabilities */
1050         int status;
1051 
1052         DBG(3, dev, "smc_program_phy()\n");
1053 
1054         spin_lock_irq(&lp->lock);
1055 
1056         /*
1057          * We should not be called if phy_type is zero.
1058          */
1059         if (lp->phy_type == 0)
1060                 goto smc_phy_configure_exit;
1061 
1062         if (smc_phy_reset(dev, phyaddr)) {
1063                 netdev_info(dev, "PHY reset timed out\n");
1064                 goto smc_phy_configure_exit;
1065         }
1066 
1067         /*
1068          * Enable PHY Interrupts (for register 18)
1069          * Interrupts listed here are disabled
1070          */
1071         smc_phy_write(dev, phyaddr, PHY_MASK_REG,
1072                 PHY_INT_LOSSSYNC | PHY_INT_CWRD | PHY_INT_SSD |
1073                 PHY_INT_ESD | PHY_INT_RPOL | PHY_INT_JAB |
1074                 PHY_INT_SPDDET | PHY_INT_DPLXDET);
1075 
1076         /* Configure the Receive/Phy Control register */
1077         SMC_SELECT_BANK(lp, 0);
1078         SMC_SET_RPC(lp, lp->rpc_cur_mode);
1079 
1080         /* If the user requested no auto neg, then go set his request */
1081         if (lp->mii.force_media) {
1082                 smc_phy_fixed(dev);
1083                 goto smc_phy_configure_exit;
1084         }
1085 
1086         /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
1087         my_phy_caps = smc_phy_read(dev, phyaddr, MII_BMSR);
1088 
1089         if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
1090                 netdev_info(dev, "Auto negotiation NOT supported\n");
1091                 smc_phy_fixed(dev);
1092                 goto smc_phy_configure_exit;
1093         }
1094 
1095         my_ad_caps = ADVERTISE_CSMA; /* I am CSMA capable */
1096 
1097         if (my_phy_caps & BMSR_100BASE4)
1098                 my_ad_caps |= ADVERTISE_100BASE4;
1099         if (my_phy_caps & BMSR_100FULL)
1100                 my_ad_caps |= ADVERTISE_100FULL;
1101         if (my_phy_caps & BMSR_100HALF)
1102                 my_ad_caps |= ADVERTISE_100HALF;
1103         if (my_phy_caps & BMSR_10FULL)
1104                 my_ad_caps |= ADVERTISE_10FULL;
1105         if (my_phy_caps & BMSR_10HALF)
1106                 my_ad_caps |= ADVERTISE_10HALF;
1107 
1108         /* Disable capabilities not selected by our user */
1109         if (lp->ctl_rspeed != 100)
1110                 my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
1111 
1112         if (!lp->ctl_rfduplx)
1113                 my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
1114 
1115         /* Update our Auto-Neg Advertisement Register */
1116         smc_phy_write(dev, phyaddr, MII_ADVERTISE, my_ad_caps);
1117         lp->mii.advertising = my_ad_caps;
1118 
1119         /*
1120          * Read the register back.  Without this, it appears that when
1121          * auto-negotiation is restarted, sometimes it isn't ready and
1122          * the link does not come up.
1123          */
1124         status = smc_phy_read(dev, phyaddr, MII_ADVERTISE);
1125 
1126         DBG(2, dev, "phy caps=%x\n", my_phy_caps);
1127         DBG(2, dev, "phy advertised caps=%x\n", my_ad_caps);
1128 
1129         /* Restart auto-negotiation process in order to advertise my caps */
1130         smc_phy_write(dev, phyaddr, MII_BMCR, BMCR_ANENABLE | BMCR_ANRESTART);
1131 
1132         smc_phy_check_media(dev, 1);
1133 
1134 smc_phy_configure_exit:
1135         SMC_SELECT_BANK(lp, 2);
1136         spin_unlock_irq(&lp->lock);
1137 }
1138 
1139 /*
1140  * smc_phy_interrupt
1141  *
1142  * Purpose:  Handle interrupts relating to PHY register 18. This is
1143  *  called from the "hard" interrupt handler under our private spinlock.
1144  */
1145 static void smc_phy_interrupt(struct net_device *dev)
1146 {
1147         struct smc_local *lp = netdev_priv(dev);
1148         int phyaddr = lp->mii.phy_id;
1149         int phy18;
1150 
1151         DBG(2, dev, "%s\n", __func__);
1152 
1153         if (lp->phy_type == 0)
1154                 return;
1155 
1156         for(;;) {
1157                 smc_phy_check_media(dev, 0);
1158 
1159                 /* Read PHY Register 18, Status Output */
1160                 phy18 = smc_phy_read(dev, phyaddr, PHY_INT_REG);
1161                 if ((phy18 & PHY_INT_INT) == 0)
1162                         break;
1163         }
1164 }
1165 
1166 /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
1167 
1168 static void smc_10bt_check_media(struct net_device *dev, int init)
1169 {
1170         struct smc_local *lp = netdev_priv(dev);
1171         void __iomem *ioaddr = lp->base;
1172         unsigned int old_carrier, new_carrier;
1173 
1174         old_carrier = netif_carrier_ok(dev) ? 1 : 0;
1175 
1176         SMC_SELECT_BANK(lp, 0);
1177         new_carrier = (SMC_GET_EPH_STATUS(lp) & ES_LINK_OK) ? 1 : 0;
1178         SMC_SELECT_BANK(lp, 2);
1179 
1180         if (init || (old_carrier != new_carrier)) {
1181                 if (!new_carrier) {
1182                         netif_carrier_off(dev);
1183                 } else {
1184                         netif_carrier_on(dev);
1185                 }
1186                 if (netif_msg_link(lp))
1187                         netdev_info(dev, "link %s\n",
1188                                     new_carrier ? "up" : "down");
1189         }
1190 }
1191 
1192 static void smc_eph_interrupt(struct net_device *dev)
1193 {
1194         struct smc_local *lp = netdev_priv(dev);
1195         void __iomem *ioaddr = lp->base;
1196         unsigned int ctl;
1197 
1198         smc_10bt_check_media(dev, 0);
1199 
1200         SMC_SELECT_BANK(lp, 1);
1201         ctl = SMC_GET_CTL(lp);
1202         SMC_SET_CTL(lp, ctl & ~CTL_LE_ENABLE);
1203         SMC_SET_CTL(lp, ctl);
1204         SMC_SELECT_BANK(lp, 2);
1205 }
1206 
1207 /*
1208  * This is the main routine of the driver, to handle the device when
1209  * it needs some attention.
1210  */
1211 static irqreturn_t smc_interrupt(int irq, void *dev_id)
1212 {
1213         struct net_device *dev = dev_id;
1214         struct smc_local *lp = netdev_priv(dev);
1215         void __iomem *ioaddr = lp->base;
1216         int status, mask, timeout, card_stats;
1217         int saved_pointer;
1218 
1219         DBG(3, dev, "%s\n", __func__);
1220 
1221         spin_lock(&lp->lock);
1222 
1223         /* A preamble may be used when there is a potential race
1224          * between the interruptible transmit functions and this
1225          * ISR. */
1226         SMC_INTERRUPT_PREAMBLE;
1227 
1228         saved_pointer = SMC_GET_PTR(lp);
1229         mask = SMC_GET_INT_MASK(lp);
1230         SMC_SET_INT_MASK(lp, 0);
1231 
1232         /* set a timeout value, so I don't stay here forever */
1233         timeout = MAX_IRQ_LOOPS;
1234 
1235         do {
1236                 status = SMC_GET_INT(lp);
1237 
1238                 DBG(2, dev, "INT 0x%02x MASK 0x%02x MEM 0x%04x FIFO 0x%04x\n",
1239                     status, mask,
1240                     ({ int meminfo; SMC_SELECT_BANK(lp, 0);
1241                        meminfo = SMC_GET_MIR(lp);
1242                        SMC_SELECT_BANK(lp, 2); meminfo; }),
1243                     SMC_GET_FIFO(lp));
1244 
1245                 status &= mask;
1246                 if (!status)
1247                         break;
1248 
1249                 if (status & IM_TX_INT) {
1250                         /* do this before RX as it will free memory quickly */
1251                         DBG(3, dev, "TX int\n");
1252                         smc_tx(dev);
1253                         SMC_ACK_INT(lp, IM_TX_INT);
1254                         if (THROTTLE_TX_PKTS)
1255                                 netif_wake_queue(dev);
1256                 } else if (status & IM_RCV_INT) {
1257                         DBG(3, dev, "RX irq\n");
1258                         smc_rcv(dev);
1259                 } else if (status & IM_ALLOC_INT) {
1260                         DBG(3, dev, "Allocation irq\n");
1261                         tasklet_hi_schedule(&lp->tx_task);
1262                         mask &= ~IM_ALLOC_INT;
1263                 } else if (status & IM_TX_EMPTY_INT) {
1264                         DBG(3, dev, "TX empty\n");
1265                         mask &= ~IM_TX_EMPTY_INT;
1266 
1267                         /* update stats */
1268                         SMC_SELECT_BANK(lp, 0);
1269                         card_stats = SMC_GET_COUNTER(lp);
1270                         SMC_SELECT_BANK(lp, 2);
1271 
1272                         /* single collisions */
1273                         dev->stats.collisions += card_stats & 0xF;
1274                         card_stats >>= 4;
1275 
1276                         /* multiple collisions */
1277                         dev->stats.collisions += card_stats & 0xF;
1278                 } else if (status & IM_RX_OVRN_INT) {
1279                         DBG(1, dev, "RX overrun (EPH_ST 0x%04x)\n",
1280                             ({ int eph_st; SMC_SELECT_BANK(lp, 0);
1281                                eph_st = SMC_GET_EPH_STATUS(lp);
1282                                SMC_SELECT_BANK(lp, 2); eph_st; }));
1283                         SMC_ACK_INT(lp, IM_RX_OVRN_INT);
1284                         dev->stats.rx_errors++;
1285                         dev->stats.rx_fifo_errors++;
1286                 } else if (status & IM_EPH_INT) {
1287                         smc_eph_interrupt(dev);
1288                 } else if (status & IM_MDINT) {
1289                         SMC_ACK_INT(lp, IM_MDINT);
1290                         smc_phy_interrupt(dev);
1291                 } else if (status & IM_ERCV_INT) {
1292                         SMC_ACK_INT(lp, IM_ERCV_INT);
1293                         PRINTK(dev, "UNSUPPORTED: ERCV INTERRUPT\n");
1294                 }
1295         } while (--timeout);
1296 
1297         /* restore register states */
1298         SMC_SET_PTR(lp, saved_pointer);
1299         SMC_SET_INT_MASK(lp, mask);
1300         spin_unlock(&lp->lock);
1301 
1302 #ifndef CONFIG_NET_POLL_CONTROLLER
1303         if (timeout == MAX_IRQ_LOOPS)
1304                 PRINTK(dev, "spurious interrupt (mask = 0x%02x)\n",
1305                        mask);
1306 #endif
1307         DBG(3, dev, "Interrupt done (%d loops)\n",
1308             MAX_IRQ_LOOPS - timeout);
1309 
1310         /*
1311          * We return IRQ_HANDLED unconditionally here even if there was
1312          * nothing to do.  There is a possibility that a packet might
1313          * get enqueued into the chip right after TX_EMPTY_INT is raised
1314          * but just before the CPU acknowledges the IRQ.
1315          * Better take an unneeded IRQ in some occasions than complexifying
1316          * the code for all cases.
1317          */
1318         return IRQ_HANDLED;
1319 }
1320 
1321 #ifdef CONFIG_NET_POLL_CONTROLLER
1322 /*
1323  * Polling receive - used by netconsole and other diagnostic tools
1324  * to allow network i/o with interrupts disabled.
1325  */
1326 static void smc_poll_controller(struct net_device *dev)
1327 {
1328         disable_irq(dev->irq);
1329         smc_interrupt(dev->irq, dev);
1330         enable_irq(dev->irq);
1331 }
1332 #endif
1333 
1334 /* Our watchdog timed out. Called by the networking layer */
1335 static void smc_timeout(struct net_device *dev)
1336 {
1337         struct smc_local *lp = netdev_priv(dev);
1338         void __iomem *ioaddr = lp->base;
1339         int status, mask, eph_st, meminfo, fifo;
1340 
1341         DBG(2, dev, "%s\n", __func__);
1342 
1343         spin_lock_irq(&lp->lock);
1344         status = SMC_GET_INT(lp);
1345         mask = SMC_GET_INT_MASK(lp);
1346         fifo = SMC_GET_FIFO(lp);
1347         SMC_SELECT_BANK(lp, 0);
1348         eph_st = SMC_GET_EPH_STATUS(lp);
1349         meminfo = SMC_GET_MIR(lp);
1350         SMC_SELECT_BANK(lp, 2);
1351         spin_unlock_irq(&lp->lock);
1352         PRINTK(dev, "TX timeout (INT 0x%02x INTMASK 0x%02x MEM 0x%04x FIFO 0x%04x EPH_ST 0x%04x)\n",
1353                status, mask, meminfo, fifo, eph_st);
1354 
1355         smc_reset(dev);
1356         smc_enable(dev);
1357 
1358         /*
1359          * Reconfiguring the PHY doesn't seem like a bad idea here, but
1360          * smc_phy_configure() calls msleep() which calls schedule_timeout()
1361          * which calls schedule().  Hence we use a work queue.
1362          */
1363         if (lp->phy_type != 0)
1364                 schedule_work(&lp->phy_configure);
1365 
1366         /* We can accept TX packets again */
1367         dev->trans_start = jiffies; /* prevent tx timeout */
1368         netif_wake_queue(dev);
1369 }
1370 
1371 /*
1372  * This routine will, depending on the values passed to it,
1373  * either make it accept multicast packets, go into
1374  * promiscuous mode (for TCPDUMP and cousins) or accept
1375  * a select set of multicast packets
1376  */
1377 static void smc_set_multicast_list(struct net_device *dev)
1378 {
1379         struct smc_local *lp = netdev_priv(dev);
1380         void __iomem *ioaddr = lp->base;
1381         unsigned char multicast_table[8];
1382         int update_multicast = 0;
1383 
1384         DBG(2, dev, "%s\n", __func__);
1385 
1386         if (dev->flags & IFF_PROMISC) {
1387                 DBG(2, dev, "RCR_PRMS\n");
1388                 lp->rcr_cur_mode |= RCR_PRMS;
1389         }
1390 
1391 /* BUG?  I never disable promiscuous mode if multicasting was turned on.
1392    Now, I turn off promiscuous mode, but I don't do anything to multicasting
1393    when promiscuous mode is turned on.
1394 */
1395 
1396         /*
1397          * Here, I am setting this to accept all multicast packets.
1398          * I don't need to zero the multicast table, because the flag is
1399          * checked before the table is
1400          */
1401         else if (dev->flags & IFF_ALLMULTI || netdev_mc_count(dev) > 16) {
1402                 DBG(2, dev, "RCR_ALMUL\n");
1403                 lp->rcr_cur_mode |= RCR_ALMUL;
1404         }
1405 
1406         /*
1407          * This sets the internal hardware table to filter out unwanted
1408          * multicast packets before they take up memory.
1409          *
1410          * The SMC chip uses a hash table where the high 6 bits of the CRC of
1411          * address are the offset into the table.  If that bit is 1, then the
1412          * multicast packet is accepted.  Otherwise, it's dropped silently.
1413          *
1414          * To use the 6 bits as an offset into the table, the high 3 bits are
1415          * the number of the 8 bit register, while the low 3 bits are the bit
1416          * within that register.
1417          */
1418         else if (!netdev_mc_empty(dev)) {
1419                 struct netdev_hw_addr *ha;
1420 
1421                 /* table for flipping the order of 3 bits */
1422                 static const unsigned char invert3[] = {0, 4, 2, 6, 1, 5, 3, 7};
1423 
1424                 /* start with a table of all zeros: reject all */
1425                 memset(multicast_table, 0, sizeof(multicast_table));
1426 
1427                 netdev_for_each_mc_addr(ha, dev) {
1428                         int position;
1429 
1430                         /* only use the low order bits */
1431                         position = crc32_le(~0, ha->addr, 6) & 0x3f;
1432 
1433                         /* do some messy swapping to put the bit in the right spot */
1434                         multicast_table[invert3[position&7]] |=
1435                                 (1<<invert3[(position>>3)&7]);
1436                 }
1437 
1438                 /* be sure I get rid of flags I might have set */
1439                 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1440 
1441                 /* now, the table can be loaded into the chipset */
1442                 update_multicast = 1;
1443         } else  {
1444                 DBG(2, dev, "~(RCR_PRMS|RCR_ALMUL)\n");
1445                 lp->rcr_cur_mode &= ~(RCR_PRMS | RCR_ALMUL);
1446 
1447                 /*
1448                  * since I'm disabling all multicast entirely, I need to
1449                  * clear the multicast list
1450                  */
1451                 memset(multicast_table, 0, sizeof(multicast_table));
1452                 update_multicast = 1;
1453         }
1454 
1455         spin_lock_irq(&lp->lock);
1456         SMC_SELECT_BANK(lp, 0);
1457         SMC_SET_RCR(lp, lp->rcr_cur_mode);
1458         if (update_multicast) {
1459                 SMC_SELECT_BANK(lp, 3);
1460                 SMC_SET_MCAST(lp, multicast_table);
1461         }
1462         SMC_SELECT_BANK(lp, 2);
1463         spin_unlock_irq(&lp->lock);
1464 }
1465 
1466 
1467 /*
1468  * Open and Initialize the board
1469  *
1470  * Set up everything, reset the card, etc..
1471  */
1472 static int
1473 smc_open(struct net_device *dev)
1474 {
1475         struct smc_local *lp = netdev_priv(dev);
1476 
1477         DBG(2, dev, "%s\n", __func__);
1478 
1479         /* Setup the default Register Modes */
1480         lp->tcr_cur_mode = TCR_DEFAULT;
1481         lp->rcr_cur_mode = RCR_DEFAULT;
1482         lp->rpc_cur_mode = RPC_DEFAULT |
1483                                 lp->cfg.leda << RPC_LSXA_SHFT |
1484                                 lp->cfg.ledb << RPC_LSXB_SHFT;
1485 
1486         /*
1487          * If we are not using a MII interface, we need to
1488          * monitor our own carrier signal to detect faults.
1489          */
1490         if (lp->phy_type == 0)
1491                 lp->tcr_cur_mode |= TCR_MON_CSN;
1492 
1493         /* reset the hardware */
1494         smc_reset(dev);
1495         smc_enable(dev);
1496 
1497         /* Configure the PHY, initialize the link state */
1498         if (lp->phy_type != 0)
1499                 smc_phy_configure(&lp->phy_configure);
1500         else {
1501                 spin_lock_irq(&lp->lock);
1502                 smc_10bt_check_media(dev, 1);
1503                 spin_unlock_irq(&lp->lock);
1504         }
1505 
1506         netif_start_queue(dev);
1507         return 0;
1508 }
1509 
1510 /*
1511  * smc_close
1512  *
1513  * this makes the board clean up everything that it can
1514  * and not talk to the outside world.   Caused by
1515  * an 'ifconfig ethX down'
1516  */
1517 static int smc_close(struct net_device *dev)
1518 {
1519         struct smc_local *lp = netdev_priv(dev);
1520 
1521         DBG(2, dev, "%s\n", __func__);
1522 
1523         netif_stop_queue(dev);
1524         netif_carrier_off(dev);
1525 
1526         /* clear everything */
1527         smc_shutdown(dev);
1528         tasklet_kill(&lp->tx_task);
1529         smc_phy_powerdown(dev);
1530         return 0;
1531 }
1532 
1533 /*
1534  * Ethtool support
1535  */
1536 static int
1537 smc_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1538 {
1539         struct smc_local *lp = netdev_priv(dev);
1540         int ret;
1541 
1542         cmd->maxtxpkt = 1;
1543         cmd->maxrxpkt = 1;
1544 
1545         if (lp->phy_type != 0) {
1546                 spin_lock_irq(&lp->lock);
1547                 ret = mii_ethtool_gset(&lp->mii, cmd);
1548                 spin_unlock_irq(&lp->lock);
1549         } else {
1550                 cmd->supported = SUPPORTED_10baseT_Half |
1551                                  SUPPORTED_10baseT_Full |
1552                                  SUPPORTED_TP | SUPPORTED_AUI;
1553 
1554                 if (lp->ctl_rspeed == 10)
1555                         ethtool_cmd_speed_set(cmd, SPEED_10);
1556                 else if (lp->ctl_rspeed == 100)
1557                         ethtool_cmd_speed_set(cmd, SPEED_100);
1558 
1559                 cmd->autoneg = AUTONEG_DISABLE;
1560                 cmd->transceiver = XCVR_INTERNAL;
1561                 cmd->port = 0;
1562                 cmd->duplex = lp->tcr_cur_mode & TCR_SWFDUP ? DUPLEX_FULL : DUPLEX_HALF;
1563 
1564                 ret = 0;
1565         }
1566 
1567         return ret;
1568 }
1569 
1570 static int
1571 smc_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
1572 {
1573         struct smc_local *lp = netdev_priv(dev);
1574         int ret;
1575 
1576         if (lp->phy_type != 0) {
1577                 spin_lock_irq(&lp->lock);
1578                 ret = mii_ethtool_sset(&lp->mii, cmd);
1579                 spin_unlock_irq(&lp->lock);
1580         } else {
1581                 if (cmd->autoneg != AUTONEG_DISABLE ||
1582                     cmd->speed != SPEED_10 ||
1583                     (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
1584                     (cmd->port != PORT_TP && cmd->port != PORT_AUI))
1585                         return -EINVAL;
1586 
1587 //              lp->port = cmd->port;
1588                 lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
1589 
1590 //              if (netif_running(dev))
1591 //                      smc_set_port(dev);
1592 
1593                 ret = 0;
1594         }
1595 
1596         return ret;
1597 }
1598 
1599 static void
1600 smc_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
1601 {
1602         strlcpy(info->driver, CARDNAME, sizeof(info->driver));
1603         strlcpy(info->version, version, sizeof(info->version));
1604         strlcpy(info->bus_info, dev_name(dev->dev.parent),
1605                 sizeof(info->bus_info));
1606 }
1607 
1608 static int smc_ethtool_nwayreset(struct net_device *dev)
1609 {
1610         struct smc_local *lp = netdev_priv(dev);
1611         int ret = -EINVAL;
1612 
1613         if (lp->phy_type != 0) {
1614                 spin_lock_irq(&lp->lock);
1615                 ret = mii_nway_restart(&lp->mii);
1616                 spin_unlock_irq(&lp->lock);
1617         }
1618 
1619         return ret;
1620 }
1621 
1622 static u32 smc_ethtool_getmsglevel(struct net_device *dev)
1623 {
1624         struct smc_local *lp = netdev_priv(dev);
1625         return lp->msg_enable;
1626 }
1627 
1628 static void smc_ethtool_setmsglevel(struct net_device *dev, u32 level)
1629 {
1630         struct smc_local *lp = netdev_priv(dev);
1631         lp->msg_enable = level;
1632 }
1633 
1634 static int smc_write_eeprom_word(struct net_device *dev, u16 addr, u16 word)
1635 {
1636         u16 ctl;
1637         struct smc_local *lp = netdev_priv(dev);
1638         void __iomem *ioaddr = lp->base;
1639 
1640         spin_lock_irq(&lp->lock);
1641         /* load word into GP register */
1642         SMC_SELECT_BANK(lp, 1);
1643         SMC_SET_GP(lp, word);
1644         /* set the address to put the data in EEPROM */
1645         SMC_SELECT_BANK(lp, 2);
1646         SMC_SET_PTR(lp, addr);
1647         /* tell it to write */
1648         SMC_SELECT_BANK(lp, 1);
1649         ctl = SMC_GET_CTL(lp);
1650         SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_STORE));
1651         /* wait for it to finish */
1652         do {
1653                 udelay(1);
1654         } while (SMC_GET_CTL(lp) & CTL_STORE);
1655         /* clean up */
1656         SMC_SET_CTL(lp, ctl);
1657         SMC_SELECT_BANK(lp, 2);
1658         spin_unlock_irq(&lp->lock);
1659         return 0;
1660 }
1661 
1662 static int smc_read_eeprom_word(struct net_device *dev, u16 addr, u16 *word)
1663 {
1664         u16 ctl;
1665         struct smc_local *lp = netdev_priv(dev);
1666         void __iomem *ioaddr = lp->base;
1667 
1668         spin_lock_irq(&lp->lock);
1669         /* set the EEPROM address to get the data from */
1670         SMC_SELECT_BANK(lp, 2);
1671         SMC_SET_PTR(lp, addr | PTR_READ);
1672         /* tell it to load */
1673         SMC_SELECT_BANK(lp, 1);
1674         SMC_SET_GP(lp, 0xffff); /* init to known */
1675         ctl = SMC_GET_CTL(lp);
1676         SMC_SET_CTL(lp, ctl | (CTL_EEPROM_SELECT | CTL_RELOAD));
1677         /* wait for it to finish */
1678         do {
1679                 udelay(1);
1680         } while (SMC_GET_CTL(lp) & CTL_RELOAD);
1681         /* read word from GP register */
1682         *word = SMC_GET_GP(lp);
1683         /* clean up */
1684         SMC_SET_CTL(lp, ctl);
1685         SMC_SELECT_BANK(lp, 2);
1686         spin_unlock_irq(&lp->lock);
1687         return 0;
1688 }
1689 
1690 static int smc_ethtool_geteeprom_len(struct net_device *dev)
1691 {
1692         return 0x23 * 2;
1693 }
1694 
1695 static int smc_ethtool_geteeprom(struct net_device *dev,
1696                 struct ethtool_eeprom *eeprom, u8 *data)
1697 {
1698         int i;
1699         int imax;
1700 
1701         DBG(1, dev, "Reading %d bytes at %d(0x%x)\n",
1702                 eeprom->len, eeprom->offset, eeprom->offset);
1703         imax = smc_ethtool_geteeprom_len(dev);
1704         for (i = 0; i < eeprom->len; i += 2) {
1705                 int ret;
1706                 u16 wbuf;
1707                 int offset = i + eeprom->offset;
1708                 if (offset > imax)
1709                         break;
1710                 ret = smc_read_eeprom_word(dev, offset >> 1, &wbuf);
1711                 if (ret != 0)
1712                         return ret;
1713                 DBG(2, dev, "Read 0x%x from 0x%x\n", wbuf, offset >> 1);
1714                 data[i] = (wbuf >> 8) & 0xff;
1715                 data[i+1] = wbuf & 0xff;
1716         }
1717         return 0;
1718 }
1719 
1720 static int smc_ethtool_seteeprom(struct net_device *dev,
1721                 struct ethtool_eeprom *eeprom, u8 *data)
1722 {
1723         int i;
1724         int imax;
1725 
1726         DBG(1, dev, "Writing %d bytes to %d(0x%x)\n",
1727             eeprom->len, eeprom->offset, eeprom->offset);
1728         imax = smc_ethtool_geteeprom_len(dev);
1729         for (i = 0; i < eeprom->len; i += 2) {
1730                 int ret;
1731                 u16 wbuf;
1732                 int offset = i + eeprom->offset;
1733                 if (offset > imax)
1734                         break;
1735                 wbuf = (data[i] << 8) | data[i + 1];
1736                 DBG(2, dev, "Writing 0x%x to 0x%x\n", wbuf, offset >> 1);
1737                 ret = smc_write_eeprom_word(dev, offset >> 1, wbuf);
1738                 if (ret != 0)
1739                         return ret;
1740         }
1741         return 0;
1742 }
1743 
1744 
1745 static const struct ethtool_ops smc_ethtool_ops = {
1746         .get_settings   = smc_ethtool_getsettings,
1747         .set_settings   = smc_ethtool_setsettings,
1748         .get_drvinfo    = smc_ethtool_getdrvinfo,
1749 
1750         .get_msglevel   = smc_ethtool_getmsglevel,
1751         .set_msglevel   = smc_ethtool_setmsglevel,
1752         .nway_reset     = smc_ethtool_nwayreset,
1753         .get_link       = ethtool_op_get_link,
1754         .get_eeprom_len = smc_ethtool_geteeprom_len,
1755         .get_eeprom     = smc_ethtool_geteeprom,
1756         .set_eeprom     = smc_ethtool_seteeprom,
1757 };
1758 
1759 static const struct net_device_ops smc_netdev_ops = {
1760         .ndo_open               = smc_open,
1761         .ndo_stop               = smc_close,
1762         .ndo_start_xmit         = smc_hard_start_xmit,
1763         .ndo_tx_timeout         = smc_timeout,
1764         .ndo_set_rx_mode        = smc_set_multicast_list,
1765         .ndo_change_mtu         = eth_change_mtu,
1766         .ndo_validate_addr      = eth_validate_addr,
1767         .ndo_set_mac_address    = eth_mac_addr,
1768 #ifdef CONFIG_NET_POLL_CONTROLLER
1769         .ndo_poll_controller    = smc_poll_controller,
1770 #endif
1771 };
1772 
1773 /*
1774  * smc_findirq
1775  *
1776  * This routine has a simple purpose -- make the SMC chip generate an
1777  * interrupt, so an auto-detect routine can detect it, and find the IRQ,
1778  */
1779 /*
1780  * does this still work?
1781  *
1782  * I just deleted auto_irq.c, since it was never built...
1783  *   --jgarzik
1784  */
1785 static int smc_findirq(struct smc_local *lp)
1786 {
1787         void __iomem *ioaddr = lp->base;
1788         int timeout = 20;
1789         unsigned long cookie;
1790 
1791         DBG(2, lp->dev, "%s: %s\n", CARDNAME, __func__);
1792 
1793         cookie = probe_irq_on();
1794 
1795         /*
1796          * What I try to do here is trigger an ALLOC_INT. This is done
1797          * by allocating a small chunk of memory, which will give an interrupt
1798          * when done.
1799          */
1800         /* enable ALLOCation interrupts ONLY */
1801         SMC_SELECT_BANK(lp, 2);
1802         SMC_SET_INT_MASK(lp, IM_ALLOC_INT);
1803 
1804         /*
1805          * Allocate 512 bytes of memory.  Note that the chip was just
1806          * reset so all the memory is available
1807          */
1808         SMC_SET_MMU_CMD(lp, MC_ALLOC | 1);
1809 
1810         /*
1811          * Wait until positive that the interrupt has been generated
1812          */
1813         do {
1814                 int int_status;
1815                 udelay(10);
1816                 int_status = SMC_GET_INT(lp);
1817                 if (int_status & IM_ALLOC_INT)
1818                         break;          /* got the interrupt */
1819         } while (--timeout);
1820 
1821         /*
1822          * there is really nothing that I can do here if timeout fails,
1823          * as autoirq_report will return a 0 anyway, which is what I
1824          * want in this case.   Plus, the clean up is needed in both
1825          * cases.
1826          */
1827 
1828         /* and disable all interrupts again */
1829         SMC_SET_INT_MASK(lp, 0);
1830 
1831         /* and return what I found */
1832         return probe_irq_off(cookie);
1833 }
1834 
1835 /*
1836  * Function: smc_probe(unsigned long ioaddr)
1837  *
1838  * Purpose:
1839  *      Tests to see if a given ioaddr points to an SMC91x chip.
1840  *      Returns a 0 on success
1841  *
1842  * Algorithm:
1843  *      (1) see if the high byte of BANK_SELECT is 0x33
1844  *      (2) compare the ioaddr with the base register's address
1845  *      (3) see if I recognize the chip ID in the appropriate register
1846  *
1847  * Here I do typical initialization tasks.
1848  *
1849  * o  Initialize the structure if needed
1850  * o  print out my vanity message if not done so already
1851  * o  print out what type of hardware is detected
1852  * o  print out the ethernet address
1853  * o  find the IRQ
1854  * o  set up my private data
1855  * o  configure the dev structure with my subroutines
1856  * o  actually GRAB the irq.
1857  * o  GRAB the region
1858  */
1859 static int smc_probe(struct net_device *dev, void __iomem *ioaddr,
1860                      unsigned long irq_flags)
1861 {
1862         struct smc_local *lp = netdev_priv(dev);
1863         int retval;
1864         unsigned int val, revision_register;
1865         const char *version_string;
1866 
1867         DBG(2, dev, "%s: %s\n", CARDNAME, __func__);
1868 
1869         /* First, see if the high byte is 0x33 */
1870         val = SMC_CURRENT_BANK(lp);
1871         DBG(2, dev, "%s: bank signature probe returned 0x%04x\n",
1872             CARDNAME, val);
1873         if ((val & 0xFF00) != 0x3300) {
1874                 if ((val & 0xFF) == 0x33) {
1875                         netdev_warn(dev,
1876                                     "%s: Detected possible byte-swapped interface at IOADDR %p\n",
1877                                     CARDNAME, ioaddr);
1878                 }
1879                 retval = -ENODEV;
1880                 goto err_out;
1881         }
1882 
1883         /*
1884          * The above MIGHT indicate a device, but I need to write to
1885          * further test this.
1886          */
1887         SMC_SELECT_BANK(lp, 0);
1888         val = SMC_CURRENT_BANK(lp);
1889         if ((val & 0xFF00) != 0x3300) {
1890                 retval = -ENODEV;
1891                 goto err_out;
1892         }
1893 
1894         /*
1895          * well, we've already written once, so hopefully another
1896          * time won't hurt.  This time, I need to switch the bank
1897          * register to bank 1, so I can access the base address
1898          * register
1899          */
1900         SMC_SELECT_BANK(lp, 1);
1901         val = SMC_GET_BASE(lp);
1902         val = ((val & 0x1F00) >> 3) << SMC_IO_SHIFT;
1903         if (((unsigned long)ioaddr & (0x3e0 << SMC_IO_SHIFT)) != val) {
1904                 netdev_warn(dev, "%s: IOADDR %p doesn't match configuration (%x).\n",
1905                             CARDNAME, ioaddr, val);
1906         }
1907 
1908         /*
1909          * check if the revision register is something that I
1910          * recognize.  These might need to be added to later,
1911          * as future revisions could be added.
1912          */
1913         SMC_SELECT_BANK(lp, 3);
1914         revision_register = SMC_GET_REV(lp);
1915         DBG(2, dev, "%s: revision = 0x%04x\n", CARDNAME, revision_register);
1916         version_string = chip_ids[ (revision_register >> 4) & 0xF];
1917         if (!version_string || (revision_register & 0xff00) != 0x3300) {
1918                 /* I don't recognize this chip, so... */
1919                 netdev_warn(dev, "%s: IO %p: Unrecognized revision register 0x%04x, Contact author.\n",
1920                             CARDNAME, ioaddr, revision_register);
1921 
1922                 retval = -ENODEV;
1923                 goto err_out;
1924         }
1925 
1926         /* At this point I'll assume that the chip is an SMC91x. */
1927         pr_info_once("%s\n", version);
1928 
1929         /* fill in some of the fields */
1930         dev->base_addr = (unsigned long)ioaddr;
1931         lp->base = ioaddr;
1932         lp->version = revision_register & 0xff;
1933         spin_lock_init(&lp->lock);
1934 
1935         /* Get the MAC address */
1936         SMC_SELECT_BANK(lp, 1);
1937         SMC_GET_MAC_ADDR(lp, dev->dev_addr);
1938 
1939         /* now, reset the chip, and put it into a known state */
1940         smc_reset(dev);
1941 
1942         /*
1943          * If dev->irq is 0, then the device has to be banged on to see
1944          * what the IRQ is.
1945          *
1946          * This banging doesn't always detect the IRQ, for unknown reasons.
1947          * a workaround is to reset the chip and try again.
1948          *
1949          * Interestingly, the DOS packet driver *SETS* the IRQ on the card to
1950          * be what is requested on the command line.   I don't do that, mostly
1951          * because the card that I have uses a non-standard method of accessing
1952          * the IRQs, and because this _should_ work in most configurations.
1953          *
1954          * Specifying an IRQ is done with the assumption that the user knows
1955          * what (s)he is doing.  No checking is done!!!!
1956          */
1957         if (dev->irq < 1) {
1958                 int trials;
1959 
1960                 trials = 3;
1961                 while (trials--) {
1962                         dev->irq = smc_findirq(lp);
1963                         if (dev->irq)
1964                                 break;
1965                         /* kick the card and try again */
1966                         smc_reset(dev);
1967                 }
1968         }
1969         if (dev->irq == 0) {
1970                 netdev_warn(dev, "Couldn't autodetect your IRQ. Use irq=xx.\n");
1971                 retval = -ENODEV;
1972                 goto err_out;
1973         }
1974         dev->irq = irq_canonicalize(dev->irq);
1975 
1976         dev->watchdog_timeo = msecs_to_jiffies(watchdog);
1977         dev->netdev_ops = &smc_netdev_ops;
1978         dev->ethtool_ops = &smc_ethtool_ops;
1979 
1980         tasklet_init(&lp->tx_task, smc_hardware_send_pkt, (unsigned long)dev);
1981         INIT_WORK(&lp->phy_configure, smc_phy_configure);
1982         lp->dev = dev;
1983         lp->mii.phy_id_mask = 0x1f;
1984         lp->mii.reg_num_mask = 0x1f;
1985         lp->mii.force_media = 0;
1986         lp->mii.full_duplex = 0;
1987         lp->mii.dev = dev;
1988         lp->mii.mdio_read = smc_phy_read;
1989         lp->mii.mdio_write = smc_phy_write;
1990 
1991         /*
1992          * Locate the phy, if any.
1993          */
1994         if (lp->version >= (CHIP_91100 << 4))
1995                 smc_phy_detect(dev);
1996 
1997         /* then shut everything down to save power */
1998         smc_shutdown(dev);
1999         smc_phy_powerdown(dev);
2000 
2001         /* Set default parameters */
2002         lp->msg_enable = NETIF_MSG_LINK;
2003         lp->ctl_rfduplx = 0;
2004         lp->ctl_rspeed = 10;
2005 
2006         if (lp->version >= (CHIP_91100 << 4)) {
2007                 lp->ctl_rfduplx = 1;
2008                 lp->ctl_rspeed = 100;
2009         }
2010 
2011         /* Grab the IRQ */
2012         retval = request_irq(dev->irq, smc_interrupt, irq_flags, dev->name, dev);
2013         if (retval)
2014                 goto err_out;
2015 
2016 #ifdef CONFIG_ARCH_PXA
2017 #  ifdef SMC_USE_PXA_DMA
2018         lp->cfg.flags |= SMC91X_USE_DMA;
2019 #  endif
2020         if (lp->cfg.flags & SMC91X_USE_DMA) {
2021                 int dma = pxa_request_dma(dev->name, DMA_PRIO_LOW,
2022                                           smc_pxa_dma_irq, NULL);
2023                 if (dma >= 0)
2024                         dev->dma = dma;
2025         }
2026 #endif
2027 
2028         retval = register_netdev(dev);
2029         if (retval == 0) {
2030                 /* now, print out the card info, in a short format.. */
2031                 netdev_info(dev, "%s (rev %d) at %p IRQ %d",
2032                             version_string, revision_register & 0x0f,
2033                             lp->base, dev->irq);
2034 
2035                 if (dev->dma != (unsigned char)-1)
2036                         pr_cont(" DMA %d", dev->dma);
2037 
2038                 pr_cont("%s%s\n",
2039                         lp->cfg.flags & SMC91X_NOWAIT ? " [nowait]" : "",
2040                         THROTTLE_TX_PKTS ? " [throttle_tx]" : "");
2041 
2042                 if (!is_valid_ether_addr(dev->dev_addr)) {
2043                         netdev_warn(dev, "Invalid ethernet MAC address. Please set using ifconfig\n");
2044                 } else {
2045                         /* Print the Ethernet address */
2046                         netdev_info(dev, "Ethernet addr: %pM\n",
2047                                     dev->dev_addr);
2048                 }
2049 
2050                 if (lp->phy_type == 0) {
2051                         PRINTK(dev, "No PHY found\n");
2052                 } else if ((lp->phy_type & 0xfffffff0) == 0x0016f840) {
2053                         PRINTK(dev, "PHY LAN83C183 (LAN91C111 Internal)\n");
2054                 } else if ((lp->phy_type & 0xfffffff0) == 0x02821c50) {
2055                         PRINTK(dev, "PHY LAN83C180\n");
2056                 }
2057         }
2058 
2059 err_out:
2060 #ifdef CONFIG_ARCH_PXA
2061         if (retval && dev->dma != (unsigned char)-1)
2062                 pxa_free_dma(dev->dma);
2063 #endif
2064         return retval;
2065 }
2066 
2067 static int smc_enable_device(struct platform_device *pdev)
2068 {
2069         struct net_device *ndev = platform_get_drvdata(pdev);
2070         struct smc_local *lp = netdev_priv(ndev);
2071         unsigned long flags;
2072         unsigned char ecor, ecsr;
2073         void __iomem *addr;
2074         struct resource * res;
2075 
2076         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2077         if (!res)
2078                 return 0;
2079 
2080         /*
2081          * Map the attribute space.  This is overkill, but clean.
2082          */
2083         addr = ioremap(res->start, ATTRIB_SIZE);
2084         if (!addr)
2085                 return -ENOMEM;
2086 
2087         /*
2088          * Reset the device.  We must disable IRQs around this
2089          * since a reset causes the IRQ line become active.
2090          */
2091         local_irq_save(flags);
2092         ecor = readb(addr + (ECOR << SMC_IO_SHIFT)) & ~ECOR_RESET;
2093         writeb(ecor | ECOR_RESET, addr + (ECOR << SMC_IO_SHIFT));
2094         readb(addr + (ECOR << SMC_IO_SHIFT));
2095 
2096         /*
2097          * Wait 100us for the chip to reset.
2098          */
2099         udelay(100);
2100 
2101         /*
2102          * The device will ignore all writes to the enable bit while
2103          * reset is asserted, even if the reset bit is cleared in the
2104          * same write.  Must clear reset first, then enable the device.
2105          */
2106         writeb(ecor, addr + (ECOR << SMC_IO_SHIFT));
2107         writeb(ecor | ECOR_ENABLE, addr + (ECOR << SMC_IO_SHIFT));
2108 
2109         /*
2110          * Set the appropriate byte/word mode.
2111          */
2112         ecsr = readb(addr + (ECSR << SMC_IO_SHIFT)) & ~ECSR_IOIS8;
2113         if (!SMC_16BIT(lp))
2114                 ecsr |= ECSR_IOIS8;
2115         writeb(ecsr, addr + (ECSR << SMC_IO_SHIFT));
2116         local_irq_restore(flags);
2117 
2118         iounmap(addr);
2119 
2120         /*
2121          * Wait for the chip to wake up.  We could poll the control
2122          * register in the main register space, but that isn't mapped
2123          * yet.  We know this is going to take 750us.
2124          */
2125         msleep(1);
2126 
2127         return 0;
2128 }
2129 
2130 static int smc_request_attrib(struct platform_device *pdev,
2131                               struct net_device *ndev)
2132 {
2133         struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2134         struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2135 
2136         if (!res)
2137                 return 0;
2138 
2139         if (!request_mem_region(res->start, ATTRIB_SIZE, CARDNAME))
2140                 return -EBUSY;
2141 
2142         return 0;
2143 }
2144 
2145 static void smc_release_attrib(struct platform_device *pdev,
2146                                struct net_device *ndev)
2147 {
2148         struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-attrib");
2149         struct smc_local *lp __maybe_unused = netdev_priv(ndev);
2150 
2151         if (res)
2152                 release_mem_region(res->start, ATTRIB_SIZE);
2153 }
2154 
2155 static inline void smc_request_datacs(struct platform_device *pdev, struct net_device *ndev)
2156 {
2157         if (SMC_CAN_USE_DATACS) {
2158                 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2159                 struct smc_local *lp = netdev_priv(ndev);
2160 
2161                 if (!res)
2162                         return;
2163 
2164                 if(!request_mem_region(res->start, SMC_DATA_EXTENT, CARDNAME)) {
2165                         netdev_info(ndev, "%s: failed to request datacs memory region.\n",
2166                                     CARDNAME);
2167                         return;
2168                 }
2169 
2170                 lp->datacs = ioremap(res->start, SMC_DATA_EXTENT);
2171         }
2172 }
2173 
2174 static void smc_release_datacs(struct platform_device *pdev, struct net_device *ndev)
2175 {
2176         if (SMC_CAN_USE_DATACS) {
2177                 struct smc_local *lp = netdev_priv(ndev);
2178                 struct resource * res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-data32");
2179 
2180                 if (lp->datacs)
2181                         iounmap(lp->datacs);
2182 
2183                 lp->datacs = NULL;
2184 
2185                 if (res)
2186                         release_mem_region(res->start, SMC_DATA_EXTENT);
2187         }
2188 }
2189 
2190 #if IS_BUILTIN(CONFIG_OF)
2191 static const struct of_device_id smc91x_match[] = {
2192         { .compatible = "smsc,lan91c94", },
2193         { .compatible = "smsc,lan91c111", },
2194         {},
2195 };
2196 MODULE_DEVICE_TABLE(of, smc91x_match);
2197 
2198 /**
2199  * of_try_set_control_gpio - configure a gpio if it exists
2200  */
2201 static int try_toggle_control_gpio(struct device *dev,
2202                                    struct gpio_desc **desc,
2203                                    const char *name, int index,
2204                                    int value, unsigned int nsdelay)
2205 {
2206         struct gpio_desc *gpio = *desc;
2207         enum gpiod_flags flags = value ? GPIOD_OUT_LOW : GPIOD_OUT_HIGH;
2208 
2209         gpio = devm_gpiod_get_index_optional(dev, name, index, flags);
2210         if (IS_ERR(gpio))
2211                 return PTR_ERR(gpio);
2212 
2213         if (gpio) {
2214                 if (nsdelay)
2215                         usleep_range(nsdelay, 2 * nsdelay);
2216                 gpiod_set_value_cansleep(gpio, value);
2217         }
2218         *desc = gpio;
2219 
2220         return 0;
2221 }
2222 #endif
2223 
2224 /*
2225  * smc_init(void)
2226  *   Input parameters:
2227  *      dev->base_addr == 0, try to find all possible locations
2228  *      dev->base_addr > 0x1ff, this is the address to check
2229  *      dev->base_addr == <anything else>, return failure code
2230  *
2231  *   Output:
2232  *      0 --> there is a device
2233  *      anything else, error
2234  */
2235 static int smc_drv_probe(struct platform_device *pdev)
2236 {
2237         struct smc91x_platdata *pd = dev_get_platdata(&pdev->dev);
2238         const struct of_device_id *match = NULL;
2239         struct smc_local *lp;
2240         struct net_device *ndev;
2241         struct resource *res;
2242         unsigned int __iomem *addr;
2243         unsigned long irq_flags = SMC_IRQ_FLAGS;
2244         unsigned long irq_resflags;
2245         int ret;
2246 
2247         ndev = alloc_etherdev(sizeof(struct smc_local));
2248         if (!ndev) {
2249                 ret = -ENOMEM;
2250                 goto out;
2251         }
2252         SET_NETDEV_DEV(ndev, &pdev->dev);
2253 
2254         /* get configuration from platform data, only allow use of
2255          * bus width if both SMC_CAN_USE_xxx and SMC91X_USE_xxx are set.
2256          */
2257 
2258         lp = netdev_priv(ndev);
2259         lp->cfg.flags = 0;
2260 
2261         if (pd) {
2262                 memcpy(&lp->cfg, pd, sizeof(lp->cfg));
2263                 lp->io_shift = SMC91X_IO_SHIFT(lp->cfg.flags);
2264         }
2265 
2266 #if IS_BUILTIN(CONFIG_OF)
2267         match = of_match_device(of_match_ptr(smc91x_match), &pdev->dev);
2268         if (match) {
2269                 struct device_node *np = pdev->dev.of_node;
2270                 u32 val;
2271 
2272                 /* Optional pwrdwn GPIO configured? */
2273                 ret = try_toggle_control_gpio(&pdev->dev, &lp->power_gpio,
2274                                               "power", 0, 0, 100);
2275                 if (ret)
2276                         return ret;
2277 
2278                 /*
2279                  * Optional reset GPIO configured? Minimum 100 ns reset needed
2280                  * according to LAN91C96 datasheet page 14.
2281                  */
2282                 ret = try_toggle_control_gpio(&pdev->dev, &lp->reset_gpio,
2283                                               "reset", 0, 0, 100);
2284                 if (ret)
2285                         return ret;
2286 
2287                 /*
2288                  * Need to wait for optional EEPROM to load, max 750 us according
2289                  * to LAN91C96 datasheet page 55.
2290                  */
2291                 if (lp->reset_gpio)
2292                         usleep_range(750, 1000);
2293 
2294                 /* Combination of IO widths supported, default to 16-bit */
2295                 if (!of_property_read_u32(np, "reg-io-width", &val)) {
2296                         if (val & 1)
2297                                 lp->cfg.flags |= SMC91X_USE_8BIT;
2298                         if ((val == 0) || (val & 2))
2299                                 lp->cfg.flags |= SMC91X_USE_16BIT;
2300                         if (val & 4)
2301                                 lp->cfg.flags |= SMC91X_USE_32BIT;
2302                 } else {
2303                         lp->cfg.flags |= SMC91X_USE_16BIT;
2304                 }
2305         }
2306 #endif
2307 
2308         if (!pd && !match) {
2309                 lp->cfg.flags |= (SMC_CAN_USE_8BIT)  ? SMC91X_USE_8BIT  : 0;
2310                 lp->cfg.flags |= (SMC_CAN_USE_16BIT) ? SMC91X_USE_16BIT : 0;
2311                 lp->cfg.flags |= (SMC_CAN_USE_32BIT) ? SMC91X_USE_32BIT : 0;
2312                 lp->cfg.flags |= (nowait) ? SMC91X_NOWAIT : 0;
2313         }
2314 
2315         if (!lp->cfg.leda && !lp->cfg.ledb) {
2316                 lp->cfg.leda = RPC_LSA_DEFAULT;
2317                 lp->cfg.ledb = RPC_LSB_DEFAULT;
2318         }
2319 
2320         ndev->dma = (unsigned char)-1;
2321 
2322         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2323         if (!res)
2324                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2325         if (!res) {
2326                 ret = -ENODEV;
2327                 goto out_free_netdev;
2328         }
2329 
2330 
2331         if (!request_mem_region(res->start, SMC_IO_EXTENT, CARDNAME)) {
2332                 ret = -EBUSY;
2333                 goto out_free_netdev;
2334         }
2335 
2336         ndev->irq = platform_get_irq(pdev, 0);
2337         if (ndev->irq <= 0) {
2338                 ret = -ENODEV;
2339                 goto out_release_io;
2340         }
2341         /*
2342          * If this platform does not specify any special irqflags, or if
2343          * the resource supplies a trigger, override the irqflags with
2344          * the trigger flags from the resource.
2345          */
2346         irq_resflags = irqd_get_trigger_type(irq_get_irq_data(ndev->irq));
2347         if (irq_flags == -1 || irq_resflags & IRQF_TRIGGER_MASK)
2348                 irq_flags = irq_resflags & IRQF_TRIGGER_MASK;
2349 
2350         ret = smc_request_attrib(pdev, ndev);
2351         if (ret)
2352                 goto out_release_io;
2353 #if defined(CONFIG_ASSABET_NEPONSET)
2354         if (machine_is_assabet() && machine_has_neponset())
2355                 neponset_ncr_set(NCR_ENET_OSC_EN);
2356 #endif
2357         platform_set_drvdata(pdev, ndev);
2358         ret = smc_enable_device(pdev);
2359         if (ret)
2360                 goto out_release_attrib;
2361 
2362         addr = ioremap(res->start, SMC_IO_EXTENT);
2363         if (!addr) {
2364                 ret = -ENOMEM;
2365                 goto out_release_attrib;
2366         }
2367 
2368 #ifdef CONFIG_ARCH_PXA
2369         {
2370                 struct smc_local *lp = netdev_priv(ndev);
2371                 lp->device = &pdev->dev;
2372                 lp->physaddr = res->start;
2373         }
2374 #endif
2375 
2376         ret = smc_probe(ndev, addr, irq_flags);
2377         if (ret != 0)
2378                 goto out_iounmap;
2379 
2380         smc_request_datacs(pdev, ndev);
2381 
2382         return 0;
2383 
2384  out_iounmap:
2385         iounmap(addr);
2386  out_release_attrib:
2387         smc_release_attrib(pdev, ndev);
2388  out_release_io:
2389         release_mem_region(res->start, SMC_IO_EXTENT);
2390  out_free_netdev:
2391         free_netdev(ndev);
2392  out:
2393         pr_info("%s: not found (%d).\n", CARDNAME, ret);
2394 
2395         return ret;
2396 }
2397 
2398 static int smc_drv_remove(struct platform_device *pdev)
2399 {
2400         struct net_device *ndev = platform_get_drvdata(pdev);
2401         struct smc_local *lp = netdev_priv(ndev);
2402         struct resource *res;
2403 
2404         unregister_netdev(ndev);
2405 
2406         free_irq(ndev->irq, ndev);
2407 
2408 #ifdef CONFIG_ARCH_PXA
2409         if (ndev->dma != (unsigned char)-1)
2410                 pxa_free_dma(ndev->dma);
2411 #endif
2412         iounmap(lp->base);
2413 
2414         smc_release_datacs(pdev,ndev);
2415         smc_release_attrib(pdev,ndev);
2416 
2417         res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "smc91x-regs");
2418         if (!res)
2419                 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2420         release_mem_region(res->start, SMC_IO_EXTENT);
2421 
2422         free_netdev(ndev);
2423 
2424         return 0;
2425 }
2426 
2427 static int smc_drv_suspend(struct device *dev)
2428 {
2429         struct platform_device *pdev = to_platform_device(dev);
2430         struct net_device *ndev = platform_get_drvdata(pdev);
2431 
2432         if (ndev) {
2433                 if (netif_running(ndev)) {
2434                         netif_device_detach(ndev);
2435                         smc_shutdown(ndev);
2436                         smc_phy_powerdown(ndev);
2437                 }
2438         }
2439         return 0;
2440 }
2441 
2442 static int smc_drv_resume(struct device *dev)
2443 {
2444         struct platform_device *pdev = to_platform_device(dev);
2445         struct net_device *ndev = platform_get_drvdata(pdev);
2446 
2447         if (ndev) {
2448                 struct smc_local *lp = netdev_priv(ndev);
2449                 smc_enable_device(pdev);
2450                 if (netif_running(ndev)) {
2451                         smc_reset(ndev);
2452                         smc_enable(ndev);
2453                         if (lp->phy_type != 0)
2454                                 smc_phy_configure(&lp->phy_configure);
2455                         netif_device_attach(ndev);
2456                 }
2457         }
2458         return 0;
2459 }
2460 
2461 static struct dev_pm_ops smc_drv_pm_ops = {
2462         .suspend        = smc_drv_suspend,
2463         .resume         = smc_drv_resume,
2464 };
2465 
2466 static struct platform_driver smc_driver = {
2467         .probe          = smc_drv_probe,
2468         .remove         = smc_drv_remove,
2469         .driver         = {
2470                 .name   = CARDNAME,
2471                 .pm     = &smc_drv_pm_ops,
2472                 .of_match_table = of_match_ptr(smc91x_match),
2473         },
2474 };
2475 
2476 module_platform_driver(smc_driver);
2477 

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