Version:  2.0.40 2.2.26 2.4.37 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6

Linux/drivers/net/ethernet/lantiq_etop.c

  1 /*
  2  *   This program is free software; you can redistribute it and/or modify it
  3  *   under the terms of the GNU General Public License version 2 as published
  4  *   by the Free Software Foundation.
  5  *
  6  *   This program is distributed in the hope that it will be useful,
  7  *   but WITHOUT ANY WARRANTY; without even the implied warranty of
  8  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  9  *   GNU General Public License for more details.
 10  *
 11  *   You should have received a copy of the GNU General Public License
 12  *   along with this program; if not, see <http://www.gnu.org/licenses/>.
 13  *
 14  *   Copyright (C) 2011 John Crispin <blogic@openwrt.org>
 15  */
 16 
 17 #include <linux/kernel.h>
 18 #include <linux/slab.h>
 19 #include <linux/errno.h>
 20 #include <linux/types.h>
 21 #include <linux/interrupt.h>
 22 #include <linux/uaccess.h>
 23 #include <linux/in.h>
 24 #include <linux/netdevice.h>
 25 #include <linux/etherdevice.h>
 26 #include <linux/phy.h>
 27 #include <linux/ip.h>
 28 #include <linux/tcp.h>
 29 #include <linux/skbuff.h>
 30 #include <linux/mm.h>
 31 #include <linux/platform_device.h>
 32 #include <linux/ethtool.h>
 33 #include <linux/init.h>
 34 #include <linux/delay.h>
 35 #include <linux/io.h>
 36 #include <linux/dma-mapping.h>
 37 #include <linux/module.h>
 38 
 39 #include <asm/checksum.h>
 40 
 41 #include <lantiq_soc.h>
 42 #include <xway_dma.h>
 43 #include <lantiq_platform.h>
 44 
 45 #define LTQ_ETOP_MDIO           0x11804
 46 #define MDIO_REQUEST            0x80000000
 47 #define MDIO_READ               0x40000000
 48 #define MDIO_ADDR_MASK          0x1f
 49 #define MDIO_ADDR_OFFSET        0x15
 50 #define MDIO_REG_MASK           0x1f
 51 #define MDIO_REG_OFFSET         0x10
 52 #define MDIO_VAL_MASK           0xffff
 53 
 54 #define PPE32_CGEN              0x800
 55 #define LQ_PPE32_ENET_MAC_CFG   0x1840
 56 
 57 #define LTQ_ETOP_ENETS0         0x11850
 58 #define LTQ_ETOP_MAC_DA0        0x1186C
 59 #define LTQ_ETOP_MAC_DA1        0x11870
 60 #define LTQ_ETOP_CFG            0x16020
 61 #define LTQ_ETOP_IGPLEN         0x16080
 62 
 63 #define MAX_DMA_CHAN            0x8
 64 #define MAX_DMA_CRC_LEN         0x4
 65 #define MAX_DMA_DATA_LEN        0x600
 66 
 67 #define ETOP_FTCU               BIT(28)
 68 #define ETOP_MII_MASK           0xf
 69 #define ETOP_MII_NORMAL         0xd
 70 #define ETOP_MII_REVERSE        0xe
 71 #define ETOP_PLEN_UNDER         0x40
 72 #define ETOP_CGEN               0x800
 73 
 74 /* use 2 static channels for TX/RX */
 75 #define LTQ_ETOP_TX_CHANNEL     1
 76 #define LTQ_ETOP_RX_CHANNEL     6
 77 #define IS_TX(x)                (x == LTQ_ETOP_TX_CHANNEL)
 78 #define IS_RX(x)                (x == LTQ_ETOP_RX_CHANNEL)
 79 
 80 #define ltq_etop_r32(x)         ltq_r32(ltq_etop_membase + (x))
 81 #define ltq_etop_w32(x, y)      ltq_w32(x, ltq_etop_membase + (y))
 82 #define ltq_etop_w32_mask(x, y, z)      \
 83                 ltq_w32_mask(x, y, ltq_etop_membase + (z))
 84 
 85 #define DRV_VERSION     "1.0"
 86 
 87 static void __iomem *ltq_etop_membase;
 88 
 89 struct ltq_etop_chan {
 90         int idx;
 91         int tx_free;
 92         struct net_device *netdev;
 93         struct napi_struct napi;
 94         struct ltq_dma_channel dma;
 95         struct sk_buff *skb[LTQ_DESC_NUM];
 96 };
 97 
 98 struct ltq_etop_priv {
 99         struct net_device *netdev;
100         struct platform_device *pdev;
101         struct ltq_eth_data *pldata;
102         struct resource *res;
103 
104         struct mii_bus *mii_bus;
105         struct phy_device *phydev;
106 
107         struct ltq_etop_chan ch[MAX_DMA_CHAN];
108         int tx_free[MAX_DMA_CHAN >> 1];
109 
110         spinlock_t lock;
111 };
112 
113 static int
114 ltq_etop_alloc_skb(struct ltq_etop_chan *ch)
115 {
116         ch->skb[ch->dma.desc] = netdev_alloc_skb(ch->netdev, MAX_DMA_DATA_LEN);
117         if (!ch->skb[ch->dma.desc])
118                 return -ENOMEM;
119         ch->dma.desc_base[ch->dma.desc].addr = dma_map_single(NULL,
120                 ch->skb[ch->dma.desc]->data, MAX_DMA_DATA_LEN,
121                 DMA_FROM_DEVICE);
122         ch->dma.desc_base[ch->dma.desc].addr =
123                 CPHYSADDR(ch->skb[ch->dma.desc]->data);
124         ch->dma.desc_base[ch->dma.desc].ctl =
125                 LTQ_DMA_OWN | LTQ_DMA_RX_OFFSET(NET_IP_ALIGN) |
126                 MAX_DMA_DATA_LEN;
127         skb_reserve(ch->skb[ch->dma.desc], NET_IP_ALIGN);
128         return 0;
129 }
130 
131 static void
132 ltq_etop_hw_receive(struct ltq_etop_chan *ch)
133 {
134         struct ltq_etop_priv *priv = netdev_priv(ch->netdev);
135         struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
136         struct sk_buff *skb = ch->skb[ch->dma.desc];
137         int len = (desc->ctl & LTQ_DMA_SIZE_MASK) - MAX_DMA_CRC_LEN;
138         unsigned long flags;
139 
140         spin_lock_irqsave(&priv->lock, flags);
141         if (ltq_etop_alloc_skb(ch)) {
142                 netdev_err(ch->netdev,
143                         "failed to allocate new rx buffer, stopping DMA\n");
144                 ltq_dma_close(&ch->dma);
145         }
146         ch->dma.desc++;
147         ch->dma.desc %= LTQ_DESC_NUM;
148         spin_unlock_irqrestore(&priv->lock, flags);
149 
150         skb_put(skb, len);
151         skb->protocol = eth_type_trans(skb, ch->netdev);
152         netif_receive_skb(skb);
153 }
154 
155 static int
156 ltq_etop_poll_rx(struct napi_struct *napi, int budget)
157 {
158         struct ltq_etop_chan *ch = container_of(napi,
159                                 struct ltq_etop_chan, napi);
160         int rx = 0;
161         int complete = 0;
162 
163         while ((rx < budget) && !complete) {
164                 struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
165 
166                 if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) {
167                         ltq_etop_hw_receive(ch);
168                         rx++;
169                 } else {
170                         complete = 1;
171                 }
172         }
173         if (complete || !rx) {
174                 napi_complete(&ch->napi);
175                 ltq_dma_ack_irq(&ch->dma);
176         }
177         return rx;
178 }
179 
180 static int
181 ltq_etop_poll_tx(struct napi_struct *napi, int budget)
182 {
183         struct ltq_etop_chan *ch =
184                 container_of(napi, struct ltq_etop_chan, napi);
185         struct ltq_etop_priv *priv = netdev_priv(ch->netdev);
186         struct netdev_queue *txq =
187                 netdev_get_tx_queue(ch->netdev, ch->idx >> 1);
188         unsigned long flags;
189 
190         spin_lock_irqsave(&priv->lock, flags);
191         while ((ch->dma.desc_base[ch->tx_free].ctl &
192                         (LTQ_DMA_OWN | LTQ_DMA_C)) == LTQ_DMA_C) {
193                 dev_kfree_skb_any(ch->skb[ch->tx_free]);
194                 ch->skb[ch->tx_free] = NULL;
195                 memset(&ch->dma.desc_base[ch->tx_free], 0,
196                         sizeof(struct ltq_dma_desc));
197                 ch->tx_free++;
198                 ch->tx_free %= LTQ_DESC_NUM;
199         }
200         spin_unlock_irqrestore(&priv->lock, flags);
201 
202         if (netif_tx_queue_stopped(txq))
203                 netif_tx_start_queue(txq);
204         napi_complete(&ch->napi);
205         ltq_dma_ack_irq(&ch->dma);
206         return 1;
207 }
208 
209 static irqreturn_t
210 ltq_etop_dma_irq(int irq, void *_priv)
211 {
212         struct ltq_etop_priv *priv = _priv;
213         int ch = irq - LTQ_DMA_CH0_INT;
214 
215         napi_schedule(&priv->ch[ch].napi);
216         return IRQ_HANDLED;
217 }
218 
219 static void
220 ltq_etop_free_channel(struct net_device *dev, struct ltq_etop_chan *ch)
221 {
222         struct ltq_etop_priv *priv = netdev_priv(dev);
223 
224         ltq_dma_free(&ch->dma);
225         if (ch->dma.irq)
226                 free_irq(ch->dma.irq, priv);
227         if (IS_RX(ch->idx)) {
228                 int desc;
229                 for (desc = 0; desc < LTQ_DESC_NUM; desc++)
230                         dev_kfree_skb_any(ch->skb[ch->dma.desc]);
231         }
232 }
233 
234 static void
235 ltq_etop_hw_exit(struct net_device *dev)
236 {
237         struct ltq_etop_priv *priv = netdev_priv(dev);
238         int i;
239 
240         ltq_pmu_disable(PMU_PPE);
241         for (i = 0; i < MAX_DMA_CHAN; i++)
242                 if (IS_TX(i) || IS_RX(i))
243                         ltq_etop_free_channel(dev, &priv->ch[i]);
244 }
245 
246 static int
247 ltq_etop_hw_init(struct net_device *dev)
248 {
249         struct ltq_etop_priv *priv = netdev_priv(dev);
250         int i;
251 
252         ltq_pmu_enable(PMU_PPE);
253 
254         switch (priv->pldata->mii_mode) {
255         case PHY_INTERFACE_MODE_RMII:
256                 ltq_etop_w32_mask(ETOP_MII_MASK,
257                         ETOP_MII_REVERSE, LTQ_ETOP_CFG);
258                 break;
259 
260         case PHY_INTERFACE_MODE_MII:
261                 ltq_etop_w32_mask(ETOP_MII_MASK,
262                         ETOP_MII_NORMAL, LTQ_ETOP_CFG);
263                 break;
264 
265         default:
266                 netdev_err(dev, "unknown mii mode %d\n",
267                         priv->pldata->mii_mode);
268                 return -ENOTSUPP;
269         }
270 
271         /* enable crc generation */
272         ltq_etop_w32(PPE32_CGEN, LQ_PPE32_ENET_MAC_CFG);
273 
274         ltq_dma_init_port(DMA_PORT_ETOP);
275 
276         for (i = 0; i < MAX_DMA_CHAN; i++) {
277                 int irq = LTQ_DMA_CH0_INT + i;
278                 struct ltq_etop_chan *ch = &priv->ch[i];
279 
280                 ch->idx = ch->dma.nr = i;
281 
282                 if (IS_TX(i)) {
283                         ltq_dma_alloc_tx(&ch->dma);
284                         request_irq(irq, ltq_etop_dma_irq, 0, "etop_tx", priv);
285                 } else if (IS_RX(i)) {
286                         ltq_dma_alloc_rx(&ch->dma);
287                         for (ch->dma.desc = 0; ch->dma.desc < LTQ_DESC_NUM;
288                                         ch->dma.desc++)
289                                 if (ltq_etop_alloc_skb(ch))
290                                         return -ENOMEM;
291                         ch->dma.desc = 0;
292                         request_irq(irq, ltq_etop_dma_irq, 0, "etop_rx", priv);
293                 }
294                 ch->dma.irq = irq;
295         }
296         return 0;
297 }
298 
299 static void
300 ltq_etop_get_drvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
301 {
302         strlcpy(info->driver, "Lantiq ETOP", sizeof(info->driver));
303         strlcpy(info->bus_info, "internal", sizeof(info->bus_info));
304         strlcpy(info->version, DRV_VERSION, sizeof(info->version));
305 }
306 
307 static int
308 ltq_etop_get_settings(struct net_device *dev, struct ethtool_cmd *cmd)
309 {
310         struct ltq_etop_priv *priv = netdev_priv(dev);
311 
312         return phy_ethtool_gset(priv->phydev, cmd);
313 }
314 
315 static int
316 ltq_etop_set_settings(struct net_device *dev, struct ethtool_cmd *cmd)
317 {
318         struct ltq_etop_priv *priv = netdev_priv(dev);
319 
320         return phy_ethtool_sset(priv->phydev, cmd);
321 }
322 
323 static int
324 ltq_etop_nway_reset(struct net_device *dev)
325 {
326         struct ltq_etop_priv *priv = netdev_priv(dev);
327 
328         return phy_start_aneg(priv->phydev);
329 }
330 
331 static const struct ethtool_ops ltq_etop_ethtool_ops = {
332         .get_drvinfo = ltq_etop_get_drvinfo,
333         .get_settings = ltq_etop_get_settings,
334         .set_settings = ltq_etop_set_settings,
335         .nway_reset = ltq_etop_nway_reset,
336 };
337 
338 static int
339 ltq_etop_mdio_wr(struct mii_bus *bus, int phy_addr, int phy_reg, u16 phy_data)
340 {
341         u32 val = MDIO_REQUEST |
342                 ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) |
343                 ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET) |
344                 phy_data;
345 
346         while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST)
347                 ;
348         ltq_etop_w32(val, LTQ_ETOP_MDIO);
349         return 0;
350 }
351 
352 static int
353 ltq_etop_mdio_rd(struct mii_bus *bus, int phy_addr, int phy_reg)
354 {
355         u32 val = MDIO_REQUEST | MDIO_READ |
356                 ((phy_addr & MDIO_ADDR_MASK) << MDIO_ADDR_OFFSET) |
357                 ((phy_reg & MDIO_REG_MASK) << MDIO_REG_OFFSET);
358 
359         while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST)
360                 ;
361         ltq_etop_w32(val, LTQ_ETOP_MDIO);
362         while (ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_REQUEST)
363                 ;
364         val = ltq_etop_r32(LTQ_ETOP_MDIO) & MDIO_VAL_MASK;
365         return val;
366 }
367 
368 static void
369 ltq_etop_mdio_link(struct net_device *dev)
370 {
371         /* nothing to do  */
372 }
373 
374 static int
375 ltq_etop_mdio_probe(struct net_device *dev)
376 {
377         struct ltq_etop_priv *priv = netdev_priv(dev);
378         struct phy_device *phydev;
379 
380         phydev = phy_find_first(priv->mii_bus);
381 
382         if (!phydev) {
383                 netdev_err(dev, "no PHY found\n");
384                 return -ENODEV;
385         }
386 
387         phydev = phy_connect(dev, phydev_name(phydev),
388                              &ltq_etop_mdio_link, priv->pldata->mii_mode);
389 
390         if (IS_ERR(phydev)) {
391                 netdev_err(dev, "Could not attach to PHY\n");
392                 return PTR_ERR(phydev);
393         }
394 
395         phydev->supported &= (SUPPORTED_10baseT_Half
396                               | SUPPORTED_10baseT_Full
397                               | SUPPORTED_100baseT_Half
398                               | SUPPORTED_100baseT_Full
399                               | SUPPORTED_Autoneg
400                               | SUPPORTED_MII
401                               | SUPPORTED_TP);
402 
403         phydev->advertising = phydev->supported;
404         priv->phydev = phydev;
405         phy_attached_info(phydev);
406 
407         return 0;
408 }
409 
410 static int
411 ltq_etop_mdio_init(struct net_device *dev)
412 {
413         struct ltq_etop_priv *priv = netdev_priv(dev);
414         int i;
415         int err;
416 
417         priv->mii_bus = mdiobus_alloc();
418         if (!priv->mii_bus) {
419                 netdev_err(dev, "failed to allocate mii bus\n");
420                 err = -ENOMEM;
421                 goto err_out;
422         }
423 
424         priv->mii_bus->priv = dev;
425         priv->mii_bus->read = ltq_etop_mdio_rd;
426         priv->mii_bus->write = ltq_etop_mdio_wr;
427         priv->mii_bus->name = "ltq_mii";
428         snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
429                 priv->pdev->name, priv->pdev->id);
430         if (mdiobus_register(priv->mii_bus)) {
431                 err = -ENXIO;
432                 goto err_out_free_mdiobus;
433         }
434 
435         if (ltq_etop_mdio_probe(dev)) {
436                 err = -ENXIO;
437                 goto err_out_unregister_bus;
438         }
439         return 0;
440 
441 err_out_unregister_bus:
442         mdiobus_unregister(priv->mii_bus);
443 err_out_free_mdiobus:
444         mdiobus_free(priv->mii_bus);
445 err_out:
446         return err;
447 }
448 
449 static void
450 ltq_etop_mdio_cleanup(struct net_device *dev)
451 {
452         struct ltq_etop_priv *priv = netdev_priv(dev);
453 
454         phy_disconnect(priv->phydev);
455         mdiobus_unregister(priv->mii_bus);
456         mdiobus_free(priv->mii_bus);
457 }
458 
459 static int
460 ltq_etop_open(struct net_device *dev)
461 {
462         struct ltq_etop_priv *priv = netdev_priv(dev);
463         int i;
464 
465         for (i = 0; i < MAX_DMA_CHAN; i++) {
466                 struct ltq_etop_chan *ch = &priv->ch[i];
467 
468                 if (!IS_TX(i) && (!IS_RX(i)))
469                         continue;
470                 ltq_dma_open(&ch->dma);
471                 napi_enable(&ch->napi);
472         }
473         phy_start(priv->phydev);
474         netif_tx_start_all_queues(dev);
475         return 0;
476 }
477 
478 static int
479 ltq_etop_stop(struct net_device *dev)
480 {
481         struct ltq_etop_priv *priv = netdev_priv(dev);
482         int i;
483 
484         netif_tx_stop_all_queues(dev);
485         phy_stop(priv->phydev);
486         for (i = 0; i < MAX_DMA_CHAN; i++) {
487                 struct ltq_etop_chan *ch = &priv->ch[i];
488 
489                 if (!IS_RX(i) && !IS_TX(i))
490                         continue;
491                 napi_disable(&ch->napi);
492                 ltq_dma_close(&ch->dma);
493         }
494         return 0;
495 }
496 
497 static int
498 ltq_etop_tx(struct sk_buff *skb, struct net_device *dev)
499 {
500         int queue = skb_get_queue_mapping(skb);
501         struct netdev_queue *txq = netdev_get_tx_queue(dev, queue);
502         struct ltq_etop_priv *priv = netdev_priv(dev);
503         struct ltq_etop_chan *ch = &priv->ch[(queue << 1) | 1];
504         struct ltq_dma_desc *desc = &ch->dma.desc_base[ch->dma.desc];
505         int len;
506         unsigned long flags;
507         u32 byte_offset;
508 
509         len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
510 
511         if ((desc->ctl & (LTQ_DMA_OWN | LTQ_DMA_C)) || ch->skb[ch->dma.desc]) {
512                 dev_kfree_skb_any(skb);
513                 netdev_err(dev, "tx ring full\n");
514                 netif_tx_stop_queue(txq);
515                 return NETDEV_TX_BUSY;
516         }
517 
518         /* dma needs to start on a 16 byte aligned address */
519         byte_offset = CPHYSADDR(skb->data) % 16;
520         ch->skb[ch->dma.desc] = skb;
521 
522         dev->trans_start = jiffies;
523 
524         spin_lock_irqsave(&priv->lock, flags);
525         desc->addr = ((unsigned int) dma_map_single(NULL, skb->data, len,
526                                                 DMA_TO_DEVICE)) - byte_offset;
527         wmb();
528         desc->ctl = LTQ_DMA_OWN | LTQ_DMA_SOP | LTQ_DMA_EOP |
529                 LTQ_DMA_TX_OFFSET(byte_offset) | (len & LTQ_DMA_SIZE_MASK);
530         ch->dma.desc++;
531         ch->dma.desc %= LTQ_DESC_NUM;
532         spin_unlock_irqrestore(&priv->lock, flags);
533 
534         if (ch->dma.desc_base[ch->dma.desc].ctl & LTQ_DMA_OWN)
535                 netif_tx_stop_queue(txq);
536 
537         return NETDEV_TX_OK;
538 }
539 
540 static int
541 ltq_etop_change_mtu(struct net_device *dev, int new_mtu)
542 {
543         int ret = eth_change_mtu(dev, new_mtu);
544 
545         if (!ret) {
546                 struct ltq_etop_priv *priv = netdev_priv(dev);
547                 unsigned long flags;
548 
549                 spin_lock_irqsave(&priv->lock, flags);
550                 ltq_etop_w32((ETOP_PLEN_UNDER << 16) | new_mtu,
551                         LTQ_ETOP_IGPLEN);
552                 spin_unlock_irqrestore(&priv->lock, flags);
553         }
554         return ret;
555 }
556 
557 static int
558 ltq_etop_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
559 {
560         struct ltq_etop_priv *priv = netdev_priv(dev);
561 
562         /* TODO: mii-toll reports "No MII transceiver present!." ?!*/
563         return phy_mii_ioctl(priv->phydev, rq, cmd);
564 }
565 
566 static int
567 ltq_etop_set_mac_address(struct net_device *dev, void *p)
568 {
569         int ret = eth_mac_addr(dev, p);
570 
571         if (!ret) {
572                 struct ltq_etop_priv *priv = netdev_priv(dev);
573                 unsigned long flags;
574 
575                 /* store the mac for the unicast filter */
576                 spin_lock_irqsave(&priv->lock, flags);
577                 ltq_etop_w32(*((u32 *)dev->dev_addr), LTQ_ETOP_MAC_DA0);
578                 ltq_etop_w32(*((u16 *)&dev->dev_addr[4]) << 16,
579                         LTQ_ETOP_MAC_DA1);
580                 spin_unlock_irqrestore(&priv->lock, flags);
581         }
582         return ret;
583 }
584 
585 static void
586 ltq_etop_set_multicast_list(struct net_device *dev)
587 {
588         struct ltq_etop_priv *priv = netdev_priv(dev);
589         unsigned long flags;
590 
591         /* ensure that the unicast filter is not enabled in promiscious mode */
592         spin_lock_irqsave(&priv->lock, flags);
593         if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI))
594                 ltq_etop_w32_mask(ETOP_FTCU, 0, LTQ_ETOP_ENETS0);
595         else
596                 ltq_etop_w32_mask(0, ETOP_FTCU, LTQ_ETOP_ENETS0);
597         spin_unlock_irqrestore(&priv->lock, flags);
598 }
599 
600 static u16
601 ltq_etop_select_queue(struct net_device *dev, struct sk_buff *skb,
602                       void *accel_priv, select_queue_fallback_t fallback)
603 {
604         /* we are currently only using the first queue */
605         return 0;
606 }
607 
608 static int
609 ltq_etop_init(struct net_device *dev)
610 {
611         struct ltq_etop_priv *priv = netdev_priv(dev);
612         struct sockaddr mac;
613         int err;
614         bool random_mac = false;
615 
616         dev->watchdog_timeo = 10 * HZ;
617         err = ltq_etop_hw_init(dev);
618         if (err)
619                 goto err_hw;
620         ltq_etop_change_mtu(dev, 1500);
621 
622         memcpy(&mac, &priv->pldata->mac, sizeof(struct sockaddr));
623         if (!is_valid_ether_addr(mac.sa_data)) {
624                 pr_warn("etop: invalid MAC, using random\n");
625                 eth_random_addr(mac.sa_data);
626                 random_mac = true;
627         }
628 
629         err = ltq_etop_set_mac_address(dev, &mac);
630         if (err)
631                 goto err_netdev;
632 
633         /* Set addr_assign_type here, ltq_etop_set_mac_address would reset it. */
634         if (random_mac)
635                 dev->addr_assign_type = NET_ADDR_RANDOM;
636 
637         ltq_etop_set_multicast_list(dev);
638         err = ltq_etop_mdio_init(dev);
639         if (err)
640                 goto err_netdev;
641         return 0;
642 
643 err_netdev:
644         unregister_netdev(dev);
645         free_netdev(dev);
646 err_hw:
647         ltq_etop_hw_exit(dev);
648         return err;
649 }
650 
651 static void
652 ltq_etop_tx_timeout(struct net_device *dev)
653 {
654         int err;
655 
656         ltq_etop_hw_exit(dev);
657         err = ltq_etop_hw_init(dev);
658         if (err)
659                 goto err_hw;
660         dev->trans_start = jiffies;
661         netif_wake_queue(dev);
662         return;
663 
664 err_hw:
665         ltq_etop_hw_exit(dev);
666         netdev_err(dev, "failed to restart etop after TX timeout\n");
667 }
668 
669 static const struct net_device_ops ltq_eth_netdev_ops = {
670         .ndo_open = ltq_etop_open,
671         .ndo_stop = ltq_etop_stop,
672         .ndo_start_xmit = ltq_etop_tx,
673         .ndo_change_mtu = ltq_etop_change_mtu,
674         .ndo_do_ioctl = ltq_etop_ioctl,
675         .ndo_set_mac_address = ltq_etop_set_mac_address,
676         .ndo_validate_addr = eth_validate_addr,
677         .ndo_set_rx_mode = ltq_etop_set_multicast_list,
678         .ndo_select_queue = ltq_etop_select_queue,
679         .ndo_init = ltq_etop_init,
680         .ndo_tx_timeout = ltq_etop_tx_timeout,
681 };
682 
683 static int __init
684 ltq_etop_probe(struct platform_device *pdev)
685 {
686         struct net_device *dev;
687         struct ltq_etop_priv *priv;
688         struct resource *res;
689         int err;
690         int i;
691 
692         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
693         if (!res) {
694                 dev_err(&pdev->dev, "failed to get etop resource\n");
695                 err = -ENOENT;
696                 goto err_out;
697         }
698 
699         res = devm_request_mem_region(&pdev->dev, res->start,
700                 resource_size(res), dev_name(&pdev->dev));
701         if (!res) {
702                 dev_err(&pdev->dev, "failed to request etop resource\n");
703                 err = -EBUSY;
704                 goto err_out;
705         }
706 
707         ltq_etop_membase = devm_ioremap_nocache(&pdev->dev,
708                 res->start, resource_size(res));
709         if (!ltq_etop_membase) {
710                 dev_err(&pdev->dev, "failed to remap etop engine %d\n",
711                         pdev->id);
712                 err = -ENOMEM;
713