Version:  2.0.40 2.2.26 2.4.37 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4 4.5 4.6

Linux/drivers/net/ethernet/intel/e1000e/netdev.c

  1 /* Intel PRO/1000 Linux driver
  2  * Copyright(c) 1999 - 2015 Intel Corporation.
  3  *
  4  * This program is free software; you can redistribute it and/or modify it
  5  * under the terms and conditions of the GNU General Public License,
  6  * version 2, as published by the Free Software Foundation.
  7  *
  8  * This program is distributed in the hope it will be useful, but WITHOUT
  9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 11  * more details.
 12  *
 13  * The full GNU General Public License is included in this distribution in
 14  * the file called "COPYING".
 15  *
 16  * Contact Information:
 17  * Linux NICS <linux.nics@intel.com>
 18  * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
 19  * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 20  */
 21 
 22 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
 23 
 24 #include <linux/module.h>
 25 #include <linux/types.h>
 26 #include <linux/init.h>
 27 #include <linux/pci.h>
 28 #include <linux/vmalloc.h>
 29 #include <linux/pagemap.h>
 30 #include <linux/delay.h>
 31 #include <linux/netdevice.h>
 32 #include <linux/interrupt.h>
 33 #include <linux/tcp.h>
 34 #include <linux/ipv6.h>
 35 #include <linux/slab.h>
 36 #include <net/checksum.h>
 37 #include <net/ip6_checksum.h>
 38 #include <linux/ethtool.h>
 39 #include <linux/if_vlan.h>
 40 #include <linux/cpu.h>
 41 #include <linux/smp.h>
 42 #include <linux/pm_qos.h>
 43 #include <linux/pm_runtime.h>
 44 #include <linux/aer.h>
 45 #include <linux/prefetch.h>
 46 
 47 #include "e1000.h"
 48 
 49 #define DRV_EXTRAVERSION "-k"
 50 
 51 #define DRV_VERSION "3.2.6" DRV_EXTRAVERSION
 52 char e1000e_driver_name[] = "e1000e";
 53 const char e1000e_driver_version[] = DRV_VERSION;
 54 
 55 #define DEFAULT_MSG_ENABLE (NETIF_MSG_DRV|NETIF_MSG_PROBE|NETIF_MSG_LINK)
 56 static int debug = -1;
 57 module_param(debug, int, 0);
 58 MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
 59 
 60 static const struct e1000_info *e1000_info_tbl[] = {
 61         [board_82571]           = &e1000_82571_info,
 62         [board_82572]           = &e1000_82572_info,
 63         [board_82573]           = &e1000_82573_info,
 64         [board_82574]           = &e1000_82574_info,
 65         [board_82583]           = &e1000_82583_info,
 66         [board_80003es2lan]     = &e1000_es2_info,
 67         [board_ich8lan]         = &e1000_ich8_info,
 68         [board_ich9lan]         = &e1000_ich9_info,
 69         [board_ich10lan]        = &e1000_ich10_info,
 70         [board_pchlan]          = &e1000_pch_info,
 71         [board_pch2lan]         = &e1000_pch2_info,
 72         [board_pch_lpt]         = &e1000_pch_lpt_info,
 73         [board_pch_spt]         = &e1000_pch_spt_info,
 74 };
 75 
 76 struct e1000_reg_info {
 77         u32 ofs;
 78         char *name;
 79 };
 80 
 81 static const struct e1000_reg_info e1000_reg_info_tbl[] = {
 82         /* General Registers */
 83         {E1000_CTRL, "CTRL"},
 84         {E1000_STATUS, "STATUS"},
 85         {E1000_CTRL_EXT, "CTRL_EXT"},
 86 
 87         /* Interrupt Registers */
 88         {E1000_ICR, "ICR"},
 89 
 90         /* Rx Registers */
 91         {E1000_RCTL, "RCTL"},
 92         {E1000_RDLEN(0), "RDLEN"},
 93         {E1000_RDH(0), "RDH"},
 94         {E1000_RDT(0), "RDT"},
 95         {E1000_RDTR, "RDTR"},
 96         {E1000_RXDCTL(0), "RXDCTL"},
 97         {E1000_ERT, "ERT"},
 98         {E1000_RDBAL(0), "RDBAL"},
 99         {E1000_RDBAH(0), "RDBAH"},
100         {E1000_RDFH, "RDFH"},
101         {E1000_RDFT, "RDFT"},
102         {E1000_RDFHS, "RDFHS"},
103         {E1000_RDFTS, "RDFTS"},
104         {E1000_RDFPC, "RDFPC"},
105 
106         /* Tx Registers */
107         {E1000_TCTL, "TCTL"},
108         {E1000_TDBAL(0), "TDBAL"},
109         {E1000_TDBAH(0), "TDBAH"},
110         {E1000_TDLEN(0), "TDLEN"},
111         {E1000_TDH(0), "TDH"},
112         {E1000_TDT(0), "TDT"},
113         {E1000_TIDV, "TIDV"},
114         {E1000_TXDCTL(0), "TXDCTL"},
115         {E1000_TADV, "TADV"},
116         {E1000_TARC(0), "TARC"},
117         {E1000_TDFH, "TDFH"},
118         {E1000_TDFT, "TDFT"},
119         {E1000_TDFHS, "TDFHS"},
120         {E1000_TDFTS, "TDFTS"},
121         {E1000_TDFPC, "TDFPC"},
122 
123         /* List Terminator */
124         {0, NULL}
125 };
126 
127 /**
128  * __ew32_prepare - prepare to write to MAC CSR register on certain parts
129  * @hw: pointer to the HW structure
130  *
131  * When updating the MAC CSR registers, the Manageability Engine (ME) could
132  * be accessing the registers at the same time.  Normally, this is handled in
133  * h/w by an arbiter but on some parts there is a bug that acknowledges Host
134  * accesses later than it should which could result in the register to have
135  * an incorrect value.  Workaround this by checking the FWSM register which
136  * has bit 24 set while ME is accessing MAC CSR registers, wait if it is set
137  * and try again a number of times.
138  **/
139 s32 __ew32_prepare(struct e1000_hw *hw)
140 {
141         s32 i = E1000_ICH_FWSM_PCIM2PCI_COUNT;
142 
143         while ((er32(FWSM) & E1000_ICH_FWSM_PCIM2PCI) && --i)
144                 udelay(50);
145 
146         return i;
147 }
148 
149 void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
150 {
151         if (hw->adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
152                 __ew32_prepare(hw);
153 
154         writel(val, hw->hw_addr + reg);
155 }
156 
157 /**
158  * e1000_regdump - register printout routine
159  * @hw: pointer to the HW structure
160  * @reginfo: pointer to the register info table
161  **/
162 static void e1000_regdump(struct e1000_hw *hw, struct e1000_reg_info *reginfo)
163 {
164         int n = 0;
165         char rname[16];
166         u32 regs[8];
167 
168         switch (reginfo->ofs) {
169         case E1000_RXDCTL(0):
170                 for (n = 0; n < 2; n++)
171                         regs[n] = __er32(hw, E1000_RXDCTL(n));
172                 break;
173         case E1000_TXDCTL(0):
174                 for (n = 0; n < 2; n++)
175                         regs[n] = __er32(hw, E1000_TXDCTL(n));
176                 break;
177         case E1000_TARC(0):
178                 for (n = 0; n < 2; n++)
179                         regs[n] = __er32(hw, E1000_TARC(n));
180                 break;
181         default:
182                 pr_info("%-15s %08x\n",
183                         reginfo->name, __er32(hw, reginfo->ofs));
184                 return;
185         }
186 
187         snprintf(rname, 16, "%s%s", reginfo->name, "[0-1]");
188         pr_info("%-15s %08x %08x\n", rname, regs[0], regs[1]);
189 }
190 
191 static void e1000e_dump_ps_pages(struct e1000_adapter *adapter,
192                                  struct e1000_buffer *bi)
193 {
194         int i;
195         struct e1000_ps_page *ps_page;
196 
197         for (i = 0; i < adapter->rx_ps_pages; i++) {
198                 ps_page = &bi->ps_pages[i];
199 
200                 if (ps_page->page) {
201                         pr_info("packet dump for ps_page %d:\n", i);
202                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
203                                        16, 1, page_address(ps_page->page),
204                                        PAGE_SIZE, true);
205                 }
206         }
207 }
208 
209 /**
210  * e1000e_dump - Print registers, Tx-ring and Rx-ring
211  * @adapter: board private structure
212  **/
213 static void e1000e_dump(struct e1000_adapter *adapter)
214 {
215         struct net_device *netdev = adapter->netdev;
216         struct e1000_hw *hw = &adapter->hw;
217         struct e1000_reg_info *reginfo;
218         struct e1000_ring *tx_ring = adapter->tx_ring;
219         struct e1000_tx_desc *tx_desc;
220         struct my_u0 {
221                 __le64 a;
222                 __le64 b;
223         } *u0;
224         struct e1000_buffer *buffer_info;
225         struct e1000_ring *rx_ring = adapter->rx_ring;
226         union e1000_rx_desc_packet_split *rx_desc_ps;
227         union e1000_rx_desc_extended *rx_desc;
228         struct my_u1 {
229                 __le64 a;
230                 __le64 b;
231                 __le64 c;
232                 __le64 d;
233         } *u1;
234         u32 staterr;
235         int i = 0;
236 
237         if (!netif_msg_hw(adapter))
238                 return;
239 
240         /* Print netdevice Info */
241         if (netdev) {
242                 dev_info(&adapter->pdev->dev, "Net device Info\n");
243                 pr_info("Device Name     state            trans_start      last_rx\n");
244                 pr_info("%-15s %016lX %016lX %016lX\n", netdev->name,
245                         netdev->state, netdev->trans_start, netdev->last_rx);
246         }
247 
248         /* Print Registers */
249         dev_info(&adapter->pdev->dev, "Register Dump\n");
250         pr_info(" Register Name   Value\n");
251         for (reginfo = (struct e1000_reg_info *)e1000_reg_info_tbl;
252              reginfo->name; reginfo++) {
253                 e1000_regdump(hw, reginfo);
254         }
255 
256         /* Print Tx Ring Summary */
257         if (!netdev || !netif_running(netdev))
258                 return;
259 
260         dev_info(&adapter->pdev->dev, "Tx Ring Summary\n");
261         pr_info("Queue [NTU] [NTC] [bi(ntc)->dma  ] leng ntw timestamp\n");
262         buffer_info = &tx_ring->buffer_info[tx_ring->next_to_clean];
263         pr_info(" %5d %5X %5X %016llX %04X %3X %016llX\n",
264                 0, tx_ring->next_to_use, tx_ring->next_to_clean,
265                 (unsigned long long)buffer_info->dma,
266                 buffer_info->length,
267                 buffer_info->next_to_watch,
268                 (unsigned long long)buffer_info->time_stamp);
269 
270         /* Print Tx Ring */
271         if (!netif_msg_tx_done(adapter))
272                 goto rx_ring_summary;
273 
274         dev_info(&adapter->pdev->dev, "Tx Ring Dump\n");
275 
276         /* Transmit Descriptor Formats - DEXT[29] is 0 (Legacy) or 1 (Extended)
277          *
278          * Legacy Transmit Descriptor
279          *   +--------------------------------------------------------------+
280          * 0 |         Buffer Address [63:0] (Reserved on Write Back)       |
281          *   +--------------------------------------------------------------+
282          * 8 | Special  |    CSS     | Status |  CMD    |  CSO   |  Length  |
283          *   +--------------------------------------------------------------+
284          *   63       48 47        36 35    32 31     24 23    16 15        0
285          *
286          * Extended Context Descriptor (DTYP=0x0) for TSO or checksum offload
287          *   63      48 47    40 39       32 31             16 15    8 7      0
288          *   +----------------------------------------------------------------+
289          * 0 |  TUCSE  | TUCS0  |   TUCSS   |     IPCSE       | IPCS0 | IPCSS |
290          *   +----------------------------------------------------------------+
291          * 8 |   MSS   | HDRLEN | RSV | STA | TUCMD | DTYP |      PAYLEN      |
292          *   +----------------------------------------------------------------+
293          *   63      48 47    40 39 36 35 32 31   24 23  20 19                0
294          *
295          * Extended Data Descriptor (DTYP=0x1)
296          *   +----------------------------------------------------------------+
297          * 0 |                     Buffer Address [63:0]                      |
298          *   +----------------------------------------------------------------+
299          * 8 | VLAN tag |  POPTS  | Rsvd | Status | Command | DTYP |  DTALEN  |
300          *   +----------------------------------------------------------------+
301          *   63       48 47     40 39  36 35    32 31     24 23  20 19        0
302          */
303         pr_info("Tl[desc]     [address 63:0  ] [SpeCssSCmCsLen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Legacy format\n");
304         pr_info("Tc[desc]     [Ce CoCsIpceCoS] [MssHlRSCm0Plen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Context format\n");
305         pr_info("Td[desc]     [address 63:0  ] [VlaPoRSCm1Dlen] [bi->dma       ] leng  ntw timestamp        bi->skb <-- Ext Data format\n");
306         for (i = 0; tx_ring->desc && (i < tx_ring->count); i++) {
307                 const char *next_desc;
308                 tx_desc = E1000_TX_DESC(*tx_ring, i);
309                 buffer_info = &tx_ring->buffer_info[i];
310                 u0 = (struct my_u0 *)tx_desc;
311                 if (i == tx_ring->next_to_use && i == tx_ring->next_to_clean)
312                         next_desc = " NTC/U";
313                 else if (i == tx_ring->next_to_use)
314                         next_desc = " NTU";
315                 else if (i == tx_ring->next_to_clean)
316                         next_desc = " NTC";
317                 else
318                         next_desc = "";
319                 pr_info("T%c[0x%03X]    %016llX %016llX %016llX %04X  %3X %016llX %p%s\n",
320                         (!(le64_to_cpu(u0->b) & (1 << 29)) ? 'l' :
321                          ((le64_to_cpu(u0->b) & (1 << 20)) ? 'd' : 'c')),
322                         i,
323                         (unsigned long long)le64_to_cpu(u0->a),
324                         (unsigned long long)le64_to_cpu(u0->b),
325                         (unsigned long long)buffer_info->dma,
326                         buffer_info->length, buffer_info->next_to_watch,
327                         (unsigned long long)buffer_info->time_stamp,
328                         buffer_info->skb, next_desc);
329 
330                 if (netif_msg_pktdata(adapter) && buffer_info->skb)
331                         print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS,
332                                        16, 1, buffer_info->skb->data,
333                                        buffer_info->skb->len, true);
334         }
335 
336         /* Print Rx Ring Summary */
337 rx_ring_summary:
338         dev_info(&adapter->pdev->dev, "Rx Ring Summary\n");
339         pr_info("Queue [NTU] [NTC]\n");
340         pr_info(" %5d %5X %5X\n",
341                 0, rx_ring->next_to_use, rx_ring->next_to_clean);
342 
343         /* Print Rx Ring */
344         if (!netif_msg_rx_status(adapter))
345                 return;
346 
347         dev_info(&adapter->pdev->dev, "Rx Ring Dump\n");
348         switch (adapter->rx_ps_pages) {
349         case 1:
350         case 2:
351         case 3:
352                 /* [Extended] Packet Split Receive Descriptor Format
353                  *
354                  *    +-----------------------------------------------------+
355                  *  0 |                Buffer Address 0 [63:0]              |
356                  *    +-----------------------------------------------------+
357                  *  8 |                Buffer Address 1 [63:0]              |
358                  *    +-----------------------------------------------------+
359                  * 16 |                Buffer Address 2 [63:0]              |
360                  *    +-----------------------------------------------------+
361                  * 24 |                Buffer Address 3 [63:0]              |
362                  *    +-----------------------------------------------------+
363                  */
364                 pr_info("R  [desc]      [buffer 0 63:0 ] [buffer 1 63:0 ] [buffer 2 63:0 ] [buffer 3 63:0 ] [bi->dma       ] [bi->skb] <-- Ext Pkt Split format\n");
365                 /* [Extended] Receive Descriptor (Write-Back) Format
366                  *
367                  *   63       48 47    32 31     13 12    8 7    4 3        0
368                  *   +------------------------------------------------------+
369                  * 0 | Packet   | IP     |  Rsvd   | MRQ   | Rsvd | MRQ RSS |
370                  *   | Checksum | Ident  |         | Queue |      |  Type   |
371                  *   +------------------------------------------------------+
372                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
373                  *   +------------------------------------------------------+
374                  *   63       48 47    32 31            20 19               0
375                  */
376                 pr_info("RWB[desc]      [ck ipid mrqhsh] [vl   l0 ee  es] [ l3  l2  l1 hs] [reserved      ] ---------------- [bi->skb] <-- Ext Rx Write-Back format\n");
377                 for (i = 0; i < rx_ring->count; i++) {
378                         const char *next_desc;
379                         buffer_info = &rx_ring->buffer_info[i];
380                         rx_desc_ps = E1000_RX_DESC_PS(*rx_ring, i);
381                         u1 = (struct my_u1 *)rx_desc_ps;
382                         staterr =
383                             le32_to_cpu(rx_desc_ps->wb.middle.status_error);
384 
385                         if (i == rx_ring->next_to_use)
386                                 next_desc = " NTU";
387                         else if (i == rx_ring->next_to_clean)
388                                 next_desc = " NTC";
389                         else
390                                 next_desc = "";
391 
392                         if (staterr & E1000_RXD_STAT_DD) {
393                                 /* Descriptor Done */
394                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX ---------------- %p%s\n",
395                                         "RWB", i,
396                                         (unsigned long long)le64_to_cpu(u1->a),
397                                         (unsigned long long)le64_to_cpu(u1->b),
398                                         (unsigned long long)le64_to_cpu(u1->c),
399                                         (unsigned long long)le64_to_cpu(u1->d),
400                                         buffer_info->skb, next_desc);
401                         } else {
402                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %016llX %016llX %p%s\n",
403                                         "R  ", i,
404                                         (unsigned long long)le64_to_cpu(u1->a),
405                                         (unsigned long long)le64_to_cpu(u1->b),
406                                         (unsigned long long)le64_to_cpu(u1->c),
407                                         (unsigned long long)le64_to_cpu(u1->d),
408                                         (unsigned long long)buffer_info->dma,
409                                         buffer_info->skb, next_desc);
410 
411                                 if (netif_msg_pktdata(adapter))
412                                         e1000e_dump_ps_pages(adapter,
413                                                              buffer_info);
414                         }
415                 }
416                 break;
417         default:
418         case 0:
419                 /* Extended Receive Descriptor (Read) Format
420                  *
421                  *   +-----------------------------------------------------+
422                  * 0 |                Buffer Address [63:0]                |
423                  *   +-----------------------------------------------------+
424                  * 8 |                      Reserved                       |
425                  *   +-----------------------------------------------------+
426                  */
427                 pr_info("R  [desc]      [buf addr 63:0 ] [reserved 63:0 ] [bi->dma       ] [bi->skb] <-- Ext (Read) format\n");
428                 /* Extended Receive Descriptor (Write-Back) Format
429                  *
430                  *   63       48 47    32 31    24 23            4 3        0
431                  *   +------------------------------------------------------+
432                  *   |     RSS Hash      |        |               |         |
433                  * 0 +-------------------+  Rsvd  |   Reserved    | MRQ RSS |
434                  *   | Packet   | IP     |        |               |  Type   |
435                  *   | Checksum | Ident  |        |               |         |
436                  *   +------------------------------------------------------+
437                  * 8 | VLAN Tag | Length | Extended Error | Extended Status |
438                  *   +------------------------------------------------------+
439                  *   63       48 47    32 31            20 19               0
440                  */
441                 pr_info("RWB[desc]      [cs ipid    mrq] [vt   ln xe  xs] [bi->skb] <-- Ext (Write-Back) format\n");
442 
443                 for (i = 0; i < rx_ring->count; i++) {
444                         const char *next_desc;
445 
446                         buffer_info = &rx_ring->buffer_info[i];
447                         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
448                         u1 = (struct my_u1 *)rx_desc;
449                         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
450 
451                         if (i == rx_ring->next_to_use)
452                                 next_desc = " NTU";
453                         else if (i == rx_ring->next_to_clean)
454                                 next_desc = " NTC";
455                         else
456                                 next_desc = "";
457 
458                         if (staterr & E1000_RXD_STAT_DD) {
459                                 /* Descriptor Done */
460                                 pr_info("%s[0x%03X]     %016llX %016llX ---------------- %p%s\n",
461                                         "RWB", i,
462                                         (unsigned long long)le64_to_cpu(u1->a),
463                                         (unsigned long long)le64_to_cpu(u1->b),
464                                         buffer_info->skb, next_desc);
465                         } else {
466                                 pr_info("%s[0x%03X]     %016llX %016llX %016llX %p%s\n",
467                                         "R  ", i,
468                                         (unsigned long long)le64_to_cpu(u1->a),
469                                         (unsigned long long)le64_to_cpu(u1->b),
470                                         (unsigned long long)buffer_info->dma,
471                                         buffer_info->skb, next_desc);
472 
473                                 if (netif_msg_pktdata(adapter) &&
474                                     buffer_info->skb)
475                                         print_hex_dump(KERN_INFO, "",
476                                                        DUMP_PREFIX_ADDRESS, 16,
477                                                        1,
478                                                        buffer_info->skb->data,
479                                                        adapter->rx_buffer_len,
480                                                        true);
481                         }
482                 }
483         }
484 }
485 
486 /**
487  * e1000_desc_unused - calculate if we have unused descriptors
488  **/
489 static int e1000_desc_unused(struct e1000_ring *ring)
490 {
491         if (ring->next_to_clean > ring->next_to_use)
492                 return ring->next_to_clean - ring->next_to_use - 1;
493 
494         return ring->count + ring->next_to_clean - ring->next_to_use - 1;
495 }
496 
497 /**
498  * e1000e_systim_to_hwtstamp - convert system time value to hw time stamp
499  * @adapter: board private structure
500  * @hwtstamps: time stamp structure to update
501  * @systim: unsigned 64bit system time value.
502  *
503  * Convert the system time value stored in the RX/TXSTMP registers into a
504  * hwtstamp which can be used by the upper level time stamping functions.
505  *
506  * The 'systim_lock' spinlock is used to protect the consistency of the
507  * system time value. This is needed because reading the 64 bit time
508  * value involves reading two 32 bit registers. The first read latches the
509  * value.
510  **/
511 static void e1000e_systim_to_hwtstamp(struct e1000_adapter *adapter,
512                                       struct skb_shared_hwtstamps *hwtstamps,
513                                       u64 systim)
514 {
515         u64 ns;
516         unsigned long flags;
517 
518         spin_lock_irqsave(&adapter->systim_lock, flags);
519         ns = timecounter_cyc2time(&adapter->tc, systim);
520         spin_unlock_irqrestore(&adapter->systim_lock, flags);
521 
522         memset(hwtstamps, 0, sizeof(*hwtstamps));
523         hwtstamps->hwtstamp = ns_to_ktime(ns);
524 }
525 
526 /**
527  * e1000e_rx_hwtstamp - utility function which checks for Rx time stamp
528  * @adapter: board private structure
529  * @status: descriptor extended error and status field
530  * @skb: particular skb to include time stamp
531  *
532  * If the time stamp is valid, convert it into the timecounter ns value
533  * and store that result into the shhwtstamps structure which is passed
534  * up the network stack.
535  **/
536 static void e1000e_rx_hwtstamp(struct e1000_adapter *adapter, u32 status,
537                                struct sk_buff *skb)
538 {
539         struct e1000_hw *hw = &adapter->hw;
540         u64 rxstmp;
541 
542         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP) ||
543             !(status & E1000_RXDEXT_STATERR_TST) ||
544             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID))
545                 return;
546 
547         /* The Rx time stamp registers contain the time stamp.  No other
548          * received packet will be time stamped until the Rx time stamp
549          * registers are read.  Because only one packet can be time stamped
550          * at a time, the register values must belong to this packet and
551          * therefore none of the other additional attributes need to be
552          * compared.
553          */
554         rxstmp = (u64)er32(RXSTMPL);
555         rxstmp |= (u64)er32(RXSTMPH) << 32;
556         e1000e_systim_to_hwtstamp(adapter, skb_hwtstamps(skb), rxstmp);
557 
558         adapter->flags2 &= ~FLAG2_CHECK_RX_HWTSTAMP;
559 }
560 
561 /**
562  * e1000_receive_skb - helper function to handle Rx indications
563  * @adapter: board private structure
564  * @staterr: descriptor extended error and status field as written by hardware
565  * @vlan: descriptor vlan field as written by hardware (no le/be conversion)
566  * @skb: pointer to sk_buff to be indicated to stack
567  **/
568 static void e1000_receive_skb(struct e1000_adapter *adapter,
569                               struct net_device *netdev, struct sk_buff *skb,
570                               u32 staterr, __le16 vlan)
571 {
572         u16 tag = le16_to_cpu(vlan);
573 
574         e1000e_rx_hwtstamp(adapter, staterr, skb);
575 
576         skb->protocol = eth_type_trans(skb, netdev);
577 
578         if (staterr & E1000_RXD_STAT_VP)
579                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), tag);
580 
581         napi_gro_receive(&adapter->napi, skb);
582 }
583 
584 /**
585  * e1000_rx_checksum - Receive Checksum Offload
586  * @adapter: board private structure
587  * @status_err: receive descriptor status and error fields
588  * @csum: receive descriptor csum field
589  * @sk_buff: socket buffer with received data
590  **/
591 static void e1000_rx_checksum(struct e1000_adapter *adapter, u32 status_err,
592                               struct sk_buff *skb)
593 {
594         u16 status = (u16)status_err;
595         u8 errors = (u8)(status_err >> 24);
596 
597         skb_checksum_none_assert(skb);
598 
599         /* Rx checksum disabled */
600         if (!(adapter->netdev->features & NETIF_F_RXCSUM))
601                 return;
602 
603         /* Ignore Checksum bit is set */
604         if (status & E1000_RXD_STAT_IXSM)
605                 return;
606 
607         /* TCP/UDP checksum error bit or IP checksum error bit is set */
608         if (errors & (E1000_RXD_ERR_TCPE | E1000_RXD_ERR_IPE)) {
609                 /* let the stack verify checksum errors */
610                 adapter->hw_csum_err++;
611                 return;
612         }
613 
614         /* TCP/UDP Checksum has not been calculated */
615         if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
616                 return;
617 
618         /* It must be a TCP or UDP packet with a valid checksum */
619         skb->ip_summed = CHECKSUM_UNNECESSARY;
620         adapter->hw_csum_good++;
621 }
622 
623 static void e1000e_update_rdt_wa(struct e1000_ring *rx_ring, unsigned int i)
624 {
625         struct e1000_adapter *adapter = rx_ring->adapter;
626         struct e1000_hw *hw = &adapter->hw;
627         s32 ret_val = __ew32_prepare(hw);
628 
629         writel(i, rx_ring->tail);
630 
631         if (unlikely(!ret_val && (i != readl(rx_ring->tail)))) {
632                 u32 rctl = er32(RCTL);
633 
634                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
635                 e_err("ME firmware caused invalid RDT - resetting\n");
636                 schedule_work(&adapter->reset_task);
637         }
638 }
639 
640 static void e1000e_update_tdt_wa(struct e1000_ring *tx_ring, unsigned int i)
641 {
642         struct e1000_adapter *adapter = tx_ring->adapter;
643         struct e1000_hw *hw = &adapter->hw;
644         s32 ret_val = __ew32_prepare(hw);
645 
646         writel(i, tx_ring->tail);
647 
648         if (unlikely(!ret_val && (i != readl(tx_ring->tail)))) {
649                 u32 tctl = er32(TCTL);
650 
651                 ew32(TCTL, tctl & ~E1000_TCTL_EN);
652                 e_err("ME firmware caused invalid TDT - resetting\n");
653                 schedule_work(&adapter->reset_task);
654         }
655 }
656 
657 /**
658  * e1000_alloc_rx_buffers - Replace used receive buffers
659  * @rx_ring: Rx descriptor ring
660  **/
661 static void e1000_alloc_rx_buffers(struct e1000_ring *rx_ring,
662                                    int cleaned_count, gfp_t gfp)
663 {
664         struct e1000_adapter *adapter = rx_ring->adapter;
665         struct net_device *netdev = adapter->netdev;
666         struct pci_dev *pdev = adapter->pdev;
667         union e1000_rx_desc_extended *rx_desc;
668         struct e1000_buffer *buffer_info;
669         struct sk_buff *skb;
670         unsigned int i;
671         unsigned int bufsz = adapter->rx_buffer_len;
672 
673         i = rx_ring->next_to_use;
674         buffer_info = &rx_ring->buffer_info[i];
675 
676         while (cleaned_count--) {
677                 skb = buffer_info->skb;
678                 if (skb) {
679                         skb_trim(skb, 0);
680                         goto map_skb;
681                 }
682 
683                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
684                 if (!skb) {
685                         /* Better luck next round */
686                         adapter->alloc_rx_buff_failed++;
687                         break;
688                 }
689 
690                 buffer_info->skb = skb;
691 map_skb:
692                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
693                                                   adapter->rx_buffer_len,
694                                                   DMA_FROM_DEVICE);
695                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
696                         dev_err(&pdev->dev, "Rx DMA map failed\n");
697                         adapter->rx_dma_failed++;
698                         break;
699                 }
700 
701                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
702                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
703 
704                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
705                         /* Force memory writes to complete before letting h/w
706                          * know there are new descriptors to fetch.  (Only
707                          * applicable for weak-ordered memory model archs,
708                          * such as IA-64).
709                          */
710                         wmb();
711                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
712                                 e1000e_update_rdt_wa(rx_ring, i);
713                         else
714                                 writel(i, rx_ring->tail);
715                 }
716                 i++;
717                 if (i == rx_ring->count)
718                         i = 0;
719                 buffer_info = &rx_ring->buffer_info[i];
720         }
721 
722         rx_ring->next_to_use = i;
723 }
724 
725 /**
726  * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
727  * @rx_ring: Rx descriptor ring
728  **/
729 static void e1000_alloc_rx_buffers_ps(struct e1000_ring *rx_ring,
730                                       int cleaned_count, gfp_t gfp)
731 {
732         struct e1000_adapter *adapter = rx_ring->adapter;
733         struct net_device *netdev = adapter->netdev;
734         struct pci_dev *pdev = adapter->pdev;
735         union e1000_rx_desc_packet_split *rx_desc;
736         struct e1000_buffer *buffer_info;
737         struct e1000_ps_page *ps_page;
738         struct sk_buff *skb;
739         unsigned int i, j;
740 
741         i = rx_ring->next_to_use;
742         buffer_info = &rx_ring->buffer_info[i];
743 
744         while (cleaned_count--) {
745                 rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
746 
747                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
748                         ps_page = &buffer_info->ps_pages[j];
749                         if (j >= adapter->rx_ps_pages) {
750                                 /* all unused desc entries get hw null ptr */
751                                 rx_desc->read.buffer_addr[j + 1] =
752                                     ~cpu_to_le64(0);
753                                 continue;
754                         }
755                         if (!ps_page->page) {
756                                 ps_page->page = alloc_page(gfp);
757                                 if (!ps_page->page) {
758                                         adapter->alloc_rx_buff_failed++;
759                                         goto no_buffers;
760                                 }
761                                 ps_page->dma = dma_map_page(&pdev->dev,
762                                                             ps_page->page,
763                                                             0, PAGE_SIZE,
764                                                             DMA_FROM_DEVICE);
765                                 if (dma_mapping_error(&pdev->dev,
766                                                       ps_page->dma)) {
767                                         dev_err(&adapter->pdev->dev,
768                                                 "Rx DMA page map failed\n");
769                                         adapter->rx_dma_failed++;
770                                         goto no_buffers;
771                                 }
772                         }
773                         /* Refresh the desc even if buffer_addrs
774                          * didn't change because each write-back
775                          * erases this info.
776                          */
777                         rx_desc->read.buffer_addr[j + 1] =
778                             cpu_to_le64(ps_page->dma);
779                 }
780 
781                 skb = __netdev_alloc_skb_ip_align(netdev, adapter->rx_ps_bsize0,
782                                                   gfp);
783 
784                 if (!skb) {
785                         adapter->alloc_rx_buff_failed++;
786                         break;
787                 }
788 
789                 buffer_info->skb = skb;
790                 buffer_info->dma = dma_map_single(&pdev->dev, skb->data,
791                                                   adapter->rx_ps_bsize0,
792                                                   DMA_FROM_DEVICE);
793                 if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
794                         dev_err(&pdev->dev, "Rx DMA map failed\n");
795                         adapter->rx_dma_failed++;
796                         /* cleanup skb */
797                         dev_kfree_skb_any(skb);
798                         buffer_info->skb = NULL;
799                         break;
800                 }
801 
802                 rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
803 
804                 if (unlikely(!(i & (E1000_RX_BUFFER_WRITE - 1)))) {
805                         /* Force memory writes to complete before letting h/w
806                          * know there are new descriptors to fetch.  (Only
807                          * applicable for weak-ordered memory model archs,
808                          * such as IA-64).
809                          */
810                         wmb();
811                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
812                                 e1000e_update_rdt_wa(rx_ring, i << 1);
813                         else
814                                 writel(i << 1, rx_ring->tail);
815                 }
816 
817                 i++;
818                 if (i == rx_ring->count)
819                         i = 0;
820                 buffer_info = &rx_ring->buffer_info[i];
821         }
822 
823 no_buffers:
824         rx_ring->next_to_use = i;
825 }
826 
827 /**
828  * e1000_alloc_jumbo_rx_buffers - Replace used jumbo receive buffers
829  * @rx_ring: Rx descriptor ring
830  * @cleaned_count: number of buffers to allocate this pass
831  **/
832 
833 static void e1000_alloc_jumbo_rx_buffers(struct e1000_ring *rx_ring,
834                                          int cleaned_count, gfp_t gfp)
835 {
836         struct e1000_adapter *adapter = rx_ring->adapter;
837         struct net_device *netdev = adapter->netdev;
838         struct pci_dev *pdev = adapter->pdev;
839         union e1000_rx_desc_extended *rx_desc;
840         struct e1000_buffer *buffer_info;
841         struct sk_buff *skb;
842         unsigned int i;
843         unsigned int bufsz = 256 - 16;  /* for skb_reserve */
844 
845         i = rx_ring->next_to_use;
846         buffer_info = &rx_ring->buffer_info[i];
847 
848         while (cleaned_count--) {
849                 skb = buffer_info->skb;
850                 if (skb) {
851                         skb_trim(skb, 0);
852                         goto check_page;
853                 }
854 
855                 skb = __netdev_alloc_skb_ip_align(netdev, bufsz, gfp);
856                 if (unlikely(!skb)) {
857                         /* Better luck next round */
858                         adapter->alloc_rx_buff_failed++;
859                         break;
860                 }
861 
862                 buffer_info->skb = skb;
863 check_page:
864                 /* allocate a new page if necessary */
865                 if (!buffer_info->page) {
866                         buffer_info->page = alloc_page(gfp);
867                         if (unlikely(!buffer_info->page)) {
868                                 adapter->alloc_rx_buff_failed++;
869                                 break;
870                         }
871                 }
872 
873                 if (!buffer_info->dma) {
874                         buffer_info->dma = dma_map_page(&pdev->dev,
875                                                         buffer_info->page, 0,
876                                                         PAGE_SIZE,
877                                                         DMA_FROM_DEVICE);
878                         if (dma_mapping_error(&pdev->dev, buffer_info->dma)) {
879                                 adapter->alloc_rx_buff_failed++;
880                                 break;
881                         }
882                 }
883 
884                 rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
885                 rx_desc->read.buffer_addr = cpu_to_le64(buffer_info->dma);
886 
887                 if (unlikely(++i == rx_ring->count))
888                         i = 0;
889                 buffer_info = &rx_ring->buffer_info[i];
890         }
891 
892         if (likely(rx_ring->next_to_use != i)) {
893                 rx_ring->next_to_use = i;
894                 if (unlikely(i-- == 0))
895                         i = (rx_ring->count - 1);
896 
897                 /* Force memory writes to complete before letting h/w
898                  * know there are new descriptors to fetch.  (Only
899                  * applicable for weak-ordered memory model archs,
900                  * such as IA-64).
901                  */
902                 wmb();
903                 if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
904                         e1000e_update_rdt_wa(rx_ring, i);
905                 else
906                         writel(i, rx_ring->tail);
907         }
908 }
909 
910 static inline void e1000_rx_hash(struct net_device *netdev, __le32 rss,
911                                  struct sk_buff *skb)
912 {
913         if (netdev->features & NETIF_F_RXHASH)
914                 skb_set_hash(skb, le32_to_cpu(rss), PKT_HASH_TYPE_L3);
915 }
916 
917 /**
918  * e1000_clean_rx_irq - Send received data up the network stack
919  * @rx_ring: Rx descriptor ring
920  *
921  * the return value indicates whether actual cleaning was done, there
922  * is no guarantee that everything was cleaned
923  **/
924 static bool e1000_clean_rx_irq(struct e1000_ring *rx_ring, int *work_done,
925                                int work_to_do)
926 {
927         struct e1000_adapter *adapter = rx_ring->adapter;
928         struct net_device *netdev = adapter->netdev;
929         struct pci_dev *pdev = adapter->pdev;
930         struct e1000_hw *hw = &adapter->hw;
931         union e1000_rx_desc_extended *rx_desc, *next_rxd;
932         struct e1000_buffer *buffer_info, *next_buffer;
933         u32 length, staterr;
934         unsigned int i;
935         int cleaned_count = 0;
936         bool cleaned = false;
937         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
938 
939         i = rx_ring->next_to_clean;
940         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
941         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
942         buffer_info = &rx_ring->buffer_info[i];
943 
944         while (staterr & E1000_RXD_STAT_DD) {
945                 struct sk_buff *skb;
946 
947                 if (*work_done >= work_to_do)
948                         break;
949                 (*work_done)++;
950                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
951 
952                 skb = buffer_info->skb;
953                 buffer_info->skb = NULL;
954 
955                 prefetch(skb->data - NET_IP_ALIGN);
956 
957                 i++;
958                 if (i == rx_ring->count)
959                         i = 0;
960                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
961                 prefetch(next_rxd);
962 
963                 next_buffer = &rx_ring->buffer_info[i];
964 
965                 cleaned = true;
966                 cleaned_count++;
967                 dma_unmap_single(&pdev->dev, buffer_info->dma,
968                                  adapter->rx_buffer_len, DMA_FROM_DEVICE);
969                 buffer_info->dma = 0;
970 
971                 length = le16_to_cpu(rx_desc->wb.upper.length);
972 
973                 /* !EOP means multiple descriptors were used to store a single
974                  * packet, if that's the case we need to toss it.  In fact, we
975                  * need to toss every packet with the EOP bit clear and the
976                  * next frame that _does_ have the EOP bit set, as it is by
977                  * definition only a frame fragment
978                  */
979                 if (unlikely(!(staterr & E1000_RXD_STAT_EOP)))
980                         adapter->flags2 |= FLAG2_IS_DISCARDING;
981 
982                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
983                         /* All receives must fit into a single buffer */
984                         e_dbg("Receive packet consumed multiple buffers\n");
985                         /* recycle */
986                         buffer_info->skb = skb;
987                         if (staterr & E1000_RXD_STAT_EOP)
988                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
989                         goto next_desc;
990                 }
991 
992                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
993                              !(netdev->features & NETIF_F_RXALL))) {
994                         /* recycle */
995                         buffer_info->skb = skb;
996                         goto next_desc;
997                 }
998 
999                 /* adjust length to remove Ethernet CRC */
1000                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1001                         /* If configured to store CRC, don't subtract FCS,
1002                          * but keep the FCS bytes out of the total_rx_bytes
1003                          * counter
1004                          */
1005                         if (netdev->features & NETIF_F_RXFCS)
1006                                 total_rx_bytes -= 4;
1007                         else
1008                                 length -= 4;
1009                 }
1010 
1011                 total_rx_bytes += length;
1012                 total_rx_packets++;
1013 
1014                 /* code added for copybreak, this should improve
1015                  * performance for small packets with large amounts
1016                  * of reassembly being done in the stack
1017                  */
1018                 if (length < copybreak) {
1019                         struct sk_buff *new_skb =
1020                                 napi_alloc_skb(&adapter->napi, length);
1021                         if (new_skb) {
1022                                 skb_copy_to_linear_data_offset(new_skb,
1023                                                                -NET_IP_ALIGN,
1024                                                                (skb->data -
1025                                                                 NET_IP_ALIGN),
1026                                                                (length +
1027                                                                 NET_IP_ALIGN));
1028                                 /* save the skb in buffer_info as good */
1029                                 buffer_info->skb = skb;
1030                                 skb = new_skb;
1031                         }
1032                         /* else just continue with the old one */
1033                 }
1034                 /* end copybreak code */
1035                 skb_put(skb, length);
1036 
1037                 /* Receive Checksum Offload */
1038                 e1000_rx_checksum(adapter, staterr, skb);
1039 
1040                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1041 
1042                 e1000_receive_skb(adapter, netdev, skb, staterr,
1043                                   rx_desc->wb.upper.vlan);
1044 
1045 next_desc:
1046                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1047 
1048                 /* return some buffers to hardware, one at a time is too slow */
1049                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1050                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1051                                               GFP_ATOMIC);
1052                         cleaned_count = 0;
1053                 }
1054 
1055                 /* use prefetched values */
1056                 rx_desc = next_rxd;
1057                 buffer_info = next_buffer;
1058 
1059                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1060         }
1061         rx_ring->next_to_clean = i;
1062 
1063         cleaned_count = e1000_desc_unused(rx_ring);
1064         if (cleaned_count)
1065                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1066 
1067         adapter->total_rx_bytes += total_rx_bytes;
1068         adapter->total_rx_packets += total_rx_packets;
1069         return cleaned;
1070 }
1071 
1072 static void e1000_put_txbuf(struct e1000_ring *tx_ring,
1073                             struct e1000_buffer *buffer_info)
1074 {
1075         struct e1000_adapter *adapter = tx_ring->adapter;
1076 
1077         if (buffer_info->dma) {
1078                 if (buffer_info->mapped_as_page)
1079                         dma_unmap_page(&adapter->pdev->dev, buffer_info->dma,
1080                                        buffer_info->length, DMA_TO_DEVICE);
1081                 else
1082                         dma_unmap_single(&adapter->pdev->dev, buffer_info->dma,
1083                                          buffer_info->length, DMA_TO_DEVICE);
1084                 buffer_info->dma = 0;
1085         }
1086         if (buffer_info->skb) {
1087                 dev_kfree_skb_any(buffer_info->skb);
1088                 buffer_info->skb = NULL;
1089         }
1090         buffer_info->time_stamp = 0;
1091 }
1092 
1093 static void e1000_print_hw_hang(struct work_struct *work)
1094 {
1095         struct e1000_adapter *adapter = container_of(work,
1096                                                      struct e1000_adapter,
1097                                                      print_hang_task);
1098         struct net_device *netdev = adapter->netdev;
1099         struct e1000_ring *tx_ring = adapter->tx_ring;
1100         unsigned int i = tx_ring->next_to_clean;
1101         unsigned int eop = tx_ring->buffer_info[i].next_to_watch;
1102         struct e1000_tx_desc *eop_desc = E1000_TX_DESC(*tx_ring, eop);
1103         struct e1000_hw *hw = &adapter->hw;
1104         u16 phy_status, phy_1000t_status, phy_ext_status;
1105         u16 pci_status;
1106 
1107         if (test_bit(__E1000_DOWN, &adapter->state))
1108                 return;
1109 
1110         if (!adapter->tx_hang_recheck && (adapter->flags2 & FLAG2_DMA_BURST)) {
1111                 /* May be block on write-back, flush and detect again
1112                  * flush pending descriptor writebacks to memory
1113                  */
1114                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1115                 /* execute the writes immediately */
1116                 e1e_flush();
1117                 /* Due to rare timing issues, write to TIDV again to ensure
1118                  * the write is successful
1119                  */
1120                 ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
1121                 /* execute the writes immediately */
1122                 e1e_flush();
1123                 adapter->tx_hang_recheck = true;
1124                 return;
1125         }
1126         adapter->tx_hang_recheck = false;
1127 
1128         if (er32(TDH(0)) == er32(TDT(0))) {
1129                 e_dbg("false hang detected, ignoring\n");
1130                 return;
1131         }
1132 
1133         /* Real hang detected */
1134         netif_stop_queue(netdev);
1135 
1136         e1e_rphy(hw, MII_BMSR, &phy_status);
1137         e1e_rphy(hw, MII_STAT1000, &phy_1000t_status);
1138         e1e_rphy(hw, MII_ESTATUS, &phy_ext_status);
1139 
1140         pci_read_config_word(adapter->pdev, PCI_STATUS, &pci_status);
1141 
1142         /* detected Hardware unit hang */
1143         e_err("Detected Hardware Unit Hang:\n"
1144               "  TDH                  <%x>\n"
1145               "  TDT                  <%x>\n"
1146               "  next_to_use          <%x>\n"
1147               "  next_to_clean        <%x>\n"
1148               "buffer_info[next_to_clean]:\n"
1149               "  time_stamp           <%lx>\n"
1150               "  next_to_watch        <%x>\n"
1151               "  jiffies              <%lx>\n"
1152               "  next_to_watch.status <%x>\n"
1153               "MAC Status             <%x>\n"
1154               "PHY Status             <%x>\n"
1155               "PHY 1000BASE-T Status  <%x>\n"
1156               "PHY Extended Status    <%x>\n"
1157               "PCI Status             <%x>\n",
1158               readl(tx_ring->head), readl(tx_ring->tail), tx_ring->next_to_use,
1159               tx_ring->next_to_clean, tx_ring->buffer_info[eop].time_stamp,
1160               eop, jiffies, eop_desc->upper.fields.status, er32(STATUS),
1161               phy_status, phy_1000t_status, phy_ext_status, pci_status);
1162 
1163         e1000e_dump(adapter);
1164 
1165         /* Suggest workaround for known h/w issue */
1166         if ((hw->mac.type == e1000_pchlan) && (er32(CTRL) & E1000_CTRL_TFCE))
1167                 e_err("Try turning off Tx pause (flow control) via ethtool\n");
1168 }
1169 
1170 /**
1171  * e1000e_tx_hwtstamp_work - check for Tx time stamp
1172  * @work: pointer to work struct
1173  *
1174  * This work function polls the TSYNCTXCTL valid bit to determine when a
1175  * timestamp has been taken for the current stored skb.  The timestamp must
1176  * be for this skb because only one such packet is allowed in the queue.
1177  */
1178 static void e1000e_tx_hwtstamp_work(struct work_struct *work)
1179 {
1180         struct e1000_adapter *adapter = container_of(work, struct e1000_adapter,
1181                                                      tx_hwtstamp_work);
1182         struct e1000_hw *hw = &adapter->hw;
1183 
1184         if (er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_VALID) {
1185                 struct skb_shared_hwtstamps shhwtstamps;
1186                 u64 txstmp;
1187 
1188                 txstmp = er32(TXSTMPL);
1189                 txstmp |= (u64)er32(TXSTMPH) << 32;
1190 
1191                 e1000e_systim_to_hwtstamp(adapter, &shhwtstamps, txstmp);
1192 
1193                 skb_tstamp_tx(adapter->tx_hwtstamp_skb, &shhwtstamps);
1194                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1195                 adapter->tx_hwtstamp_skb = NULL;
1196         } else if (time_after(jiffies, adapter->tx_hwtstamp_start
1197                               + adapter->tx_timeout_factor * HZ)) {
1198                 dev_kfree_skb_any(adapter->tx_hwtstamp_skb);
1199                 adapter->tx_hwtstamp_skb = NULL;
1200                 adapter->tx_hwtstamp_timeouts++;
1201                 e_warn("clearing Tx timestamp hang\n");
1202         } else {
1203                 /* reschedule to check later */
1204                 schedule_work(&adapter->tx_hwtstamp_work);
1205         }
1206 }
1207 
1208 /**
1209  * e1000_clean_tx_irq - Reclaim resources after transmit completes
1210  * @tx_ring: Tx descriptor ring
1211  *
1212  * the return value indicates whether actual cleaning was done, there
1213  * is no guarantee that everything was cleaned
1214  **/
1215 static bool e1000_clean_tx_irq(struct e1000_ring *tx_ring)
1216 {
1217         struct e1000_adapter *adapter = tx_ring->adapter;
1218         struct net_device *netdev = adapter->netdev;
1219         struct e1000_hw *hw = &adapter->hw;
1220         struct e1000_tx_desc *tx_desc, *eop_desc;
1221         struct e1000_buffer *buffer_info;
1222         unsigned int i, eop;
1223         unsigned int count = 0;
1224         unsigned int total_tx_bytes = 0, total_tx_packets = 0;
1225         unsigned int bytes_compl = 0, pkts_compl = 0;
1226 
1227         i = tx_ring->next_to_clean;
1228         eop = tx_ring->buffer_info[i].next_to_watch;
1229         eop_desc = E1000_TX_DESC(*tx_ring, eop);
1230 
1231         while ((eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) &&
1232                (count < tx_ring->count)) {
1233                 bool cleaned = false;
1234 
1235                 dma_rmb();              /* read buffer_info after eop_desc */
1236                 for (; !cleaned; count++) {
1237                         tx_desc = E1000_TX_DESC(*tx_ring, i);
1238                         buffer_info = &tx_ring->buffer_info[i];
1239                         cleaned = (i == eop);
1240 
1241                         if (cleaned) {
1242                                 total_tx_packets += buffer_info->segs;
1243                                 total_tx_bytes += buffer_info->bytecount;
1244                                 if (buffer_info->skb) {
1245                                         bytes_compl += buffer_info->skb->len;
1246                                         pkts_compl++;
1247                                 }
1248                         }
1249 
1250                         e1000_put_txbuf(tx_ring, buffer_info);
1251                         tx_desc->upper.data = 0;
1252 
1253                         i++;
1254                         if (i == tx_ring->count)
1255                                 i = 0;
1256                 }
1257 
1258                 if (i == tx_ring->next_to_use)
1259                         break;
1260                 eop = tx_ring->buffer_info[i].next_to_watch;
1261                 eop_desc = E1000_TX_DESC(*tx_ring, eop);
1262         }
1263 
1264         tx_ring->next_to_clean = i;
1265 
1266         netdev_completed_queue(netdev, pkts_compl, bytes_compl);
1267 
1268 #define TX_WAKE_THRESHOLD 32
1269         if (count && netif_carrier_ok(netdev) &&
1270             e1000_desc_unused(tx_ring) >= TX_WAKE_THRESHOLD) {
1271                 /* Make sure that anybody stopping the queue after this
1272                  * sees the new next_to_clean.
1273                  */
1274                 smp_mb();
1275 
1276                 if (netif_queue_stopped(netdev) &&
1277                     !(test_bit(__E1000_DOWN, &adapter->state))) {
1278                         netif_wake_queue(netdev);
1279                         ++adapter->restart_queue;
1280                 }
1281         }
1282 
1283         if (adapter->detect_tx_hung) {
1284                 /* Detect a transmit hang in hardware, this serializes the
1285                  * check with the clearing of time_stamp and movement of i
1286                  */
1287                 adapter->detect_tx_hung = false;
1288                 if (tx_ring->buffer_info[i].time_stamp &&
1289                     time_after(jiffies, tx_ring->buffer_info[i].time_stamp
1290                                + (adapter->tx_timeout_factor * HZ)) &&
1291                     !(er32(STATUS) & E1000_STATUS_TXOFF))
1292                         schedule_work(&adapter->print_hang_task);
1293                 else
1294                         adapter->tx_hang_recheck = false;
1295         }
1296         adapter->total_tx_bytes += total_tx_bytes;
1297         adapter->total_tx_packets += total_tx_packets;
1298         return count < tx_ring->count;
1299 }
1300 
1301 /**
1302  * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
1303  * @rx_ring: Rx descriptor ring
1304  *
1305  * the return value indicates whether actual cleaning was done, there
1306  * is no guarantee that everything was cleaned
1307  **/
1308 static bool e1000_clean_rx_irq_ps(struct e1000_ring *rx_ring, int *work_done,
1309                                   int work_to_do)
1310 {
1311         struct e1000_adapter *adapter = rx_ring->adapter;
1312         struct e1000_hw *hw = &adapter->hw;
1313         union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
1314         struct net_device *netdev = adapter->netdev;
1315         struct pci_dev *pdev = adapter->pdev;
1316         struct e1000_buffer *buffer_info, *next_buffer;
1317         struct e1000_ps_page *ps_page;
1318         struct sk_buff *skb;
1319         unsigned int i, j;
1320         u32 length, staterr;
1321         int cleaned_count = 0;
1322         bool cleaned = false;
1323         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1324 
1325         i = rx_ring->next_to_clean;
1326         rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
1327         staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1328         buffer_info = &rx_ring->buffer_info[i];
1329 
1330         while (staterr & E1000_RXD_STAT_DD) {
1331                 if (*work_done >= work_to_do)
1332                         break;
1333                 (*work_done)++;
1334                 skb = buffer_info->skb;
1335                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1336 
1337                 /* in the packet split case this is header only */
1338                 prefetch(skb->data - NET_IP_ALIGN);
1339 
1340                 i++;
1341                 if (i == rx_ring->count)
1342                         i = 0;
1343                 next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
1344                 prefetch(next_rxd);
1345 
1346                 next_buffer = &rx_ring->buffer_info[i];
1347 
1348                 cleaned = true;
1349                 cleaned_count++;
1350                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1351                                  adapter->rx_ps_bsize0, DMA_FROM_DEVICE);
1352                 buffer_info->dma = 0;
1353 
1354                 /* see !EOP comment in other Rx routine */
1355                 if (!(staterr & E1000_RXD_STAT_EOP))
1356                         adapter->flags2 |= FLAG2_IS_DISCARDING;
1357 
1358                 if (adapter->flags2 & FLAG2_IS_DISCARDING) {
1359                         e_dbg("Packet Split buffers didn't pick up the full packet\n");
1360                         dev_kfree_skb_irq(skb);
1361                         if (staterr & E1000_RXD_STAT_EOP)
1362                                 adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1363                         goto next_desc;
1364                 }
1365 
1366                 if (unlikely((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1367                              !(netdev->features & NETIF_F_RXALL))) {
1368                         dev_kfree_skb_irq(skb);
1369                         goto next_desc;
1370                 }
1371 
1372                 length = le16_to_cpu(rx_desc->wb.middle.length0);
1373 
1374                 if (!length) {
1375                         e_dbg("Last part of the packet spanning multiple descriptors\n");
1376                         dev_kfree_skb_irq(skb);
1377                         goto next_desc;
1378                 }
1379 
1380                 /* Good Receive */
1381                 skb_put(skb, length);
1382 
1383                 {
1384                         /* this looks ugly, but it seems compiler issues make
1385                          * it more efficient than reusing j
1386                          */
1387                         int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
1388 
1389                         /* page alloc/put takes too long and effects small
1390                          * packet throughput, so unsplit small packets and
1391                          * save the alloc/put only valid in softirq (napi)
1392                          * context to call kmap_*
1393                          */
1394                         if (l1 && (l1 <= copybreak) &&
1395                             ((length + l1) <= adapter->rx_ps_bsize0)) {
1396                                 u8 *vaddr;
1397 
1398                                 ps_page = &buffer_info->ps_pages[0];
1399 
1400                                 /* there is no documentation about how to call
1401                                  * kmap_atomic, so we can't hold the mapping
1402                                  * very long
1403                                  */
1404                                 dma_sync_single_for_cpu(&pdev->dev,
1405                                                         ps_page->dma,
1406                                                         PAGE_SIZE,
1407                                                         DMA_FROM_DEVICE);
1408                                 vaddr = kmap_atomic(ps_page->page);
1409                                 memcpy(skb_tail_pointer(skb), vaddr, l1);
1410                                 kunmap_atomic(vaddr);
1411                                 dma_sync_single_for_device(&pdev->dev,
1412                                                            ps_page->dma,
1413                                                            PAGE_SIZE,
1414                                                            DMA_FROM_DEVICE);
1415 
1416                                 /* remove the CRC */
1417                                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1418                                         if (!(netdev->features & NETIF_F_RXFCS))
1419                                                 l1 -= 4;
1420                                 }
1421 
1422                                 skb_put(skb, l1);
1423                                 goto copydone;
1424                         }       /* if */
1425                 }
1426 
1427                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1428                         length = le16_to_cpu(rx_desc->wb.upper.length[j]);
1429                         if (!length)
1430                                 break;
1431 
1432                         ps_page = &buffer_info->ps_pages[j];
1433                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1434                                        DMA_FROM_DEVICE);
1435                         ps_page->dma = 0;
1436                         skb_fill_page_desc(skb, j, ps_page->page, 0, length);
1437                         ps_page->page = NULL;
1438                         skb->len += length;
1439                         skb->data_len += length;
1440                         skb->truesize += PAGE_SIZE;
1441                 }
1442 
1443                 /* strip the ethernet crc, problem is we're using pages now so
1444                  * this whole operation can get a little cpu intensive
1445                  */
1446                 if (!(adapter->flags2 & FLAG2_CRC_STRIPPING)) {
1447                         if (!(netdev->features & NETIF_F_RXFCS))
1448                                 pskb_trim(skb, skb->len - 4);
1449                 }
1450 
1451 copydone:
1452                 total_rx_bytes += skb->len;
1453                 total_rx_packets++;
1454 
1455                 e1000_rx_checksum(adapter, staterr, skb);
1456 
1457                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1458 
1459                 if (rx_desc->wb.upper.header_status &
1460                     cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP))
1461                         adapter->rx_hdr_split++;
1462 
1463                 e1000_receive_skb(adapter, netdev, skb, staterr,
1464                                   rx_desc->wb.middle.vlan);
1465 
1466 next_desc:
1467                 rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
1468                 buffer_info->skb = NULL;
1469 
1470                 /* return some buffers to hardware, one at a time is too slow */
1471                 if (cleaned_count >= E1000_RX_BUFFER_WRITE) {
1472                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1473                                               GFP_ATOMIC);
1474                         cleaned_count = 0;
1475                 }
1476 
1477                 /* use prefetched values */
1478                 rx_desc = next_rxd;
1479                 buffer_info = next_buffer;
1480 
1481                 staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
1482         }
1483         rx_ring->next_to_clean = i;
1484 
1485         cleaned_count = e1000_desc_unused(rx_ring);
1486         if (cleaned_count)
1487                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1488 
1489         adapter->total_rx_bytes += total_rx_bytes;
1490         adapter->total_rx_packets += total_rx_packets;
1491         return cleaned;
1492 }
1493 
1494 /**
1495  * e1000_consume_page - helper function
1496  **/
1497 static void e1000_consume_page(struct e1000_buffer *bi, struct sk_buff *skb,
1498                                u16 length)
1499 {
1500         bi->page = NULL;
1501         skb->len += length;
1502         skb->data_len += length;
1503         skb->truesize += PAGE_SIZE;
1504 }
1505 
1506 /**
1507  * e1000_clean_jumbo_rx_irq - Send received data up the network stack; legacy
1508  * @adapter: board private structure
1509  *
1510  * the return value indicates whether actual cleaning was done, there
1511  * is no guarantee that everything was cleaned
1512  **/
1513 static bool e1000_clean_jumbo_rx_irq(struct e1000_ring *rx_ring, int *work_done,
1514                                      int work_to_do)
1515 {
1516         struct e1000_adapter *adapter = rx_ring->adapter;
1517         struct net_device *netdev = adapter->netdev;
1518         struct pci_dev *pdev = adapter->pdev;
1519         union e1000_rx_desc_extended *rx_desc, *next_rxd;
1520         struct e1000_buffer *buffer_info, *next_buffer;
1521         u32 length, staterr;
1522         unsigned int i;
1523         int cleaned_count = 0;
1524         bool cleaned = false;
1525         unsigned int total_rx_bytes = 0, total_rx_packets = 0;
1526         struct skb_shared_info *shinfo;
1527 
1528         i = rx_ring->next_to_clean;
1529         rx_desc = E1000_RX_DESC_EXT(*rx_ring, i);
1530         staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1531         buffer_info = &rx_ring->buffer_info[i];
1532 
1533         while (staterr & E1000_RXD_STAT_DD) {
1534                 struct sk_buff *skb;
1535 
1536                 if (*work_done >= work_to_do)
1537                         break;
1538                 (*work_done)++;
1539                 dma_rmb();      /* read descriptor and rx_buffer_info after status DD */
1540 
1541                 skb = buffer_info->skb;
1542                 buffer_info->skb = NULL;
1543 
1544                 ++i;
1545                 if (i == rx_ring->count)
1546                         i = 0;
1547                 next_rxd = E1000_RX_DESC_EXT(*rx_ring, i);
1548                 prefetch(next_rxd);
1549 
1550                 next_buffer = &rx_ring->buffer_info[i];
1551 
1552                 cleaned = true;
1553                 cleaned_count++;
1554                 dma_unmap_page(&pdev->dev, buffer_info->dma, PAGE_SIZE,
1555                                DMA_FROM_DEVICE);
1556                 buffer_info->dma = 0;
1557 
1558                 length = le16_to_cpu(rx_desc->wb.upper.length);
1559 
1560                 /* errors is only valid for DD + EOP descriptors */
1561                 if (unlikely((staterr & E1000_RXD_STAT_EOP) &&
1562                              ((staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK) &&
1563                               !(netdev->features & NETIF_F_RXALL)))) {
1564                         /* recycle both page and skb */
1565                         buffer_info->skb = skb;
1566                         /* an error means any chain goes out the window too */
1567                         if (rx_ring->rx_skb_top)
1568                                 dev_kfree_skb_irq(rx_ring->rx_skb_top);
1569                         rx_ring->rx_skb_top = NULL;
1570                         goto next_desc;
1571                 }
1572 #define rxtop (rx_ring->rx_skb_top)
1573                 if (!(staterr & E1000_RXD_STAT_EOP)) {
1574                         /* this descriptor is only the beginning (or middle) */
1575                         if (!rxtop) {
1576                                 /* this is the beginning of a chain */
1577                                 rxtop = skb;
1578                                 skb_fill_page_desc(rxtop, 0, buffer_info->page,
1579                                                    0, length);
1580                         } else {
1581                                 /* this is the middle of a chain */
1582                                 shinfo = skb_shinfo(rxtop);
1583                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1584                                                    buffer_info->page, 0,
1585                                                    length);
1586                                 /* re-use the skb, only consumed the page */
1587                                 buffer_info->skb = skb;
1588                         }
1589                         e1000_consume_page(buffer_info, rxtop, length);
1590                         goto next_desc;
1591                 } else {
1592                         if (rxtop) {
1593                                 /* end of the chain */
1594                                 shinfo = skb_shinfo(rxtop);
1595                                 skb_fill_page_desc(rxtop, shinfo->nr_frags,
1596                                                    buffer_info->page, 0,
1597                                                    length);
1598                                 /* re-use the current skb, we only consumed the
1599                                  * page
1600                                  */
1601                                 buffer_info->skb = skb;
1602                                 skb = rxtop;
1603                                 rxtop = NULL;
1604                                 e1000_consume_page(buffer_info, skb, length);
1605                         } else {
1606                                 /* no chain, got EOP, this buf is the packet
1607                                  * copybreak to save the put_page/alloc_page
1608                                  */
1609                                 if (length <= copybreak &&
1610                                     skb_tailroom(skb) >= length) {
1611                                         u8 *vaddr;
1612                                         vaddr = kmap_atomic(buffer_info->page);
1613                                         memcpy(skb_tail_pointer(skb), vaddr,
1614                                                length);
1615                                         kunmap_atomic(vaddr);
1616                                         /* re-use the page, so don't erase
1617                                          * buffer_info->page
1618                                          */
1619                                         skb_put(skb, length);
1620                                 } else {
1621                                         skb_fill_page_desc(skb, 0,
1622                                                            buffer_info->page, 0,
1623                                                            length);
1624                                         e1000_consume_page(buffer_info, skb,
1625                                                            length);
1626                                 }
1627                         }
1628                 }
1629 
1630                 /* Receive Checksum Offload */
1631                 e1000_rx_checksum(adapter, staterr, skb);
1632 
1633                 e1000_rx_hash(netdev, rx_desc->wb.lower.hi_dword.rss, skb);
1634 
1635                 /* probably a little skewed due to removing CRC */
1636                 total_rx_bytes += skb->len;
1637                 total_rx_packets++;
1638 
1639                 /* eth type trans needs skb->data to point to something */
1640                 if (!pskb_may_pull(skb, ETH_HLEN)) {
1641                         e_err("pskb_may_pull failed.\n");
1642                         dev_kfree_skb_irq(skb);
1643                         goto next_desc;
1644                 }
1645 
1646                 e1000_receive_skb(adapter, netdev, skb, staterr,
1647                                   rx_desc->wb.upper.vlan);
1648 
1649 next_desc:
1650                 rx_desc->wb.upper.status_error &= cpu_to_le32(~0xFF);
1651 
1652                 /* return some buffers to hardware, one at a time is too slow */
1653                 if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
1654                         adapter->alloc_rx_buf(rx_ring, cleaned_count,
1655                                               GFP_ATOMIC);
1656                         cleaned_count = 0;
1657                 }
1658 
1659                 /* use prefetched values */
1660                 rx_desc = next_rxd;
1661                 buffer_info = next_buffer;
1662 
1663                 staterr = le32_to_cpu(rx_desc->wb.upper.status_error);
1664         }
1665         rx_ring->next_to_clean = i;
1666 
1667         cleaned_count = e1000_desc_unused(rx_ring);
1668         if (cleaned_count)
1669                 adapter->alloc_rx_buf(rx_ring, cleaned_count, GFP_ATOMIC);
1670 
1671         adapter->total_rx_bytes += total_rx_bytes;
1672         adapter->total_rx_packets += total_rx_packets;
1673         return cleaned;
1674 }
1675 
1676 /**
1677  * e1000_clean_rx_ring - Free Rx Buffers per Queue
1678  * @rx_ring: Rx descriptor ring
1679  **/
1680 static void e1000_clean_rx_ring(struct e1000_ring *rx_ring)
1681 {
1682         struct e1000_adapter *adapter = rx_ring->adapter;
1683         struct e1000_buffer *buffer_info;
1684         struct e1000_ps_page *ps_page;
1685         struct pci_dev *pdev = adapter->pdev;
1686         unsigned int i, j;
1687 
1688         /* Free all the Rx ring sk_buffs */
1689         for (i = 0; i < rx_ring->count; i++) {
1690                 buffer_info = &rx_ring->buffer_info[i];
1691                 if (buffer_info->dma) {
1692                         if (adapter->clean_rx == e1000_clean_rx_irq)
1693                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1694                                                  adapter->rx_buffer_len,
1695                                                  DMA_FROM_DEVICE);
1696                         else if (adapter->clean_rx == e1000_clean_jumbo_rx_irq)
1697                                 dma_unmap_page(&pdev->dev, buffer_info->dma,
1698                                                PAGE_SIZE, DMA_FROM_DEVICE);
1699                         else if (adapter->clean_rx == e1000_clean_rx_irq_ps)
1700                                 dma_unmap_single(&pdev->dev, buffer_info->dma,
1701                                                  adapter->rx_ps_bsize0,
1702                                                  DMA_FROM_DEVICE);
1703                         buffer_info->dma = 0;
1704                 }
1705 
1706                 if (buffer_info->page) {
1707                         put_page(buffer_info->page);
1708                         buffer_info->page = NULL;
1709                 }
1710 
1711                 if (buffer_info->skb) {
1712                         dev_kfree_skb(buffer_info->skb);
1713                         buffer_info->skb = NULL;
1714                 }
1715 
1716                 for (j = 0; j < PS_PAGE_BUFFERS; j++) {
1717                         ps_page = &buffer_info->ps_pages[j];
1718                         if (!ps_page->page)
1719                                 break;
1720                         dma_unmap_page(&pdev->dev, ps_page->dma, PAGE_SIZE,
1721                                        DMA_FROM_DEVICE);
1722                         ps_page->dma = 0;
1723                         put_page(ps_page->page);
1724                         ps_page->page = NULL;
1725                 }
1726         }
1727 
1728         /* there also may be some cached data from a chained receive */
1729         if (rx_ring->rx_skb_top) {
1730                 dev_kfree_skb(rx_ring->rx_skb_top);
1731                 rx_ring->rx_skb_top = NULL;
1732         }
1733 
1734         /* Zero out the descriptor ring */
1735         memset(rx_ring->desc, 0, rx_ring->size);
1736 
1737         rx_ring->next_to_clean = 0;
1738         rx_ring->next_to_use = 0;
1739         adapter->flags2 &= ~FLAG2_IS_DISCARDING;
1740 }
1741 
1742 static void e1000e_downshift_workaround(struct work_struct *work)
1743 {
1744         struct e1000_adapter *adapter = container_of(work,
1745                                                      struct e1000_adapter,
1746                                                      downshift_task);
1747 
1748         if (test_bit(__E1000_DOWN, &adapter->state))
1749                 return;
1750 
1751         e1000e_gig_downshift_workaround_ich8lan(&adapter->hw);
1752 }
1753 
1754 /**
1755  * e1000_intr_msi - Interrupt Handler
1756  * @irq: interrupt number
1757  * @data: pointer to a network interface device structure
1758  **/
1759 static irqreturn_t e1000_intr_msi(int __always_unused irq, void *data)
1760 {
1761         struct net_device *netdev = data;
1762         struct e1000_adapter *adapter = netdev_priv(netdev);
1763         struct e1000_hw *hw = &adapter->hw;
1764         u32 icr = er32(ICR);
1765 
1766         /* read ICR disables interrupts using IAM */
1767         if (icr & E1000_ICR_LSC) {
1768                 hw->mac.get_link_status = true;
1769                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1770                  * disconnect (LSC) before accessing any PHY registers
1771                  */
1772                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1773                     (!(er32(STATUS) & E1000_STATUS_LU)))
1774                         schedule_work(&adapter->downshift_task);
1775 
1776                 /* 80003ES2LAN workaround-- For packet buffer work-around on
1777                  * link down event; disable receives here in the ISR and reset
1778                  * adapter in watchdog
1779                  */
1780                 if (netif_carrier_ok(netdev) &&
1781                     adapter->flags & FLAG_RX_NEEDS_RESTART) {
1782                         /* disable receives */
1783                         u32 rctl = er32(RCTL);
1784 
1785                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1786                         adapter->flags |= FLAG_RESTART_NOW;
1787                 }
1788                 /* guard against interrupt when we're going down */
1789                 if (!test_bit(__E1000_DOWN, &adapter->state))
1790                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1791         }
1792 
1793         /* Reset on uncorrectable ECC error */
1794         if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1795                                         (hw->mac.type == e1000_pch_spt))) {
1796                 u32 pbeccsts = er32(PBECCSTS);
1797 
1798                 adapter->corr_errors +=
1799                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1800                 adapter->uncorr_errors +=
1801                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1802                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1803 
1804                 /* Do the reset outside of interrupt context */
1805                 schedule_work(&adapter->reset_task);
1806 
1807                 /* return immediately since reset is imminent */
1808                 return IRQ_HANDLED;
1809         }
1810 
1811         if (napi_schedule_prep(&adapter->napi)) {
1812                 adapter->total_tx_bytes = 0;
1813                 adapter->total_tx_packets = 0;
1814                 adapter->total_rx_bytes = 0;
1815                 adapter->total_rx_packets = 0;
1816                 __napi_schedule(&adapter->napi);
1817         }
1818 
1819         return IRQ_HANDLED;
1820 }
1821 
1822 /**
1823  * e1000_intr - Interrupt Handler
1824  * @irq: interrupt number
1825  * @data: pointer to a network interface device structure
1826  **/
1827 static irqreturn_t e1000_intr(int __always_unused irq, void *data)
1828 {
1829         struct net_device *netdev = data;
1830         struct e1000_adapter *adapter = netdev_priv(netdev);
1831         struct e1000_hw *hw = &adapter->hw;
1832         u32 rctl, icr = er32(ICR);
1833 
1834         if (!icr || test_bit(__E1000_DOWN, &adapter->state))
1835                 return IRQ_NONE;        /* Not our interrupt */
1836 
1837         /* IMS will not auto-mask if INT_ASSERTED is not set, and if it is
1838          * not set, then the adapter didn't send an interrupt
1839          */
1840         if (!(icr & E1000_ICR_INT_ASSERTED))
1841                 return IRQ_NONE;
1842 
1843         /* Interrupt Auto-Mask...upon reading ICR,
1844          * interrupts are masked.  No need for the
1845          * IMC write
1846          */
1847 
1848         if (icr & E1000_ICR_LSC) {
1849                 hw->mac.get_link_status = true;
1850                 /* ICH8 workaround-- Call gig speed drop workaround on cable
1851                  * disconnect (LSC) before accessing any PHY registers
1852                  */
1853                 if ((adapter->flags & FLAG_LSC_GIG_SPEED_DROP) &&
1854                     (!(er32(STATUS) & E1000_STATUS_LU)))
1855                         schedule_work(&adapter->downshift_task);
1856 
1857                 /* 80003ES2LAN workaround--
1858                  * For packet buffer work-around on link down event;
1859                  * disable receives here in the ISR and
1860                  * reset adapter in watchdog
1861                  */
1862                 if (netif_carrier_ok(netdev) &&
1863                     (adapter->flags & FLAG_RX_NEEDS_RESTART)) {
1864                         /* disable receives */
1865                         rctl = er32(RCTL);
1866                         ew32(RCTL, rctl & ~E1000_RCTL_EN);
1867                         adapter->flags |= FLAG_RESTART_NOW;
1868                 }
1869                 /* guard against interrupt when we're going down */
1870                 if (!test_bit(__E1000_DOWN, &adapter->state))
1871                         mod_timer(&adapter->watchdog_timer, jiffies + 1);
1872         }
1873 
1874         /* Reset on uncorrectable ECC error */
1875         if ((icr & E1000_ICR_ECCER) && ((hw->mac.type == e1000_pch_lpt) ||
1876                                         (hw->mac.type == e1000_pch_spt))) {
1877                 u32 pbeccsts = er32(PBECCSTS);
1878 
1879                 adapter->corr_errors +=
1880                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
1881                 adapter->uncorr_errors +=
1882                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
1883                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
1884 
1885                 /* Do the reset outside of interrupt context */
1886                 schedule_work(&adapter->reset_task);
1887 
1888                 /* return immediately since reset is imminent */
1889                 return IRQ_HANDLED;
1890         }
1891 
1892         if (napi_schedule_prep(&adapter->napi)) {
1893                 adapter->total_tx_bytes = 0;
1894                 adapter->total_tx_packets = 0;
1895                 adapter->total_rx_bytes = 0;
1896                 adapter->total_rx_packets = 0;
1897                 __napi_schedule(&adapter->napi);
1898         }
1899 
1900         return IRQ_HANDLED;
1901 }
1902 
1903 static irqreturn_t e1000_msix_other(int __always_unused irq, void *data)
1904 {
1905         struct net_device *netdev = data;
1906         struct e1000_adapter *adapter = netdev_priv(netdev);
1907         struct e1000_hw *hw = &adapter->hw;
1908 
1909         hw->mac.get_link_status = true;
1910 
1911         /* guard against interrupt when we're going down */
1912         if (!test_bit(__E1000_DOWN, &adapter->state)) {
1913                 mod_timer(&adapter->watchdog_timer, jiffies + 1);
1914                 ew32(IMS, E1000_IMS_OTHER);
1915         }
1916 
1917         return IRQ_HANDLED;
1918 }
1919 
1920 static irqreturn_t e1000_intr_msix_tx(int __always_unused irq, void *data)
1921 {
1922         struct net_device *netdev = data;
1923         struct e1000_adapter *adapter = netdev_priv(netdev);
1924         struct e1000_hw *hw = &adapter->hw;
1925         struct e1000_ring *tx_ring = adapter->tx_ring;
1926 
1927         adapter->total_tx_bytes = 0;
1928         adapter->total_tx_packets = 0;
1929 
1930         if (!e1000_clean_tx_irq(tx_ring))
1931                 /* Ring was not completely cleaned, so fire another interrupt */
1932                 ew32(ICS, tx_ring->ims_val);
1933 
1934         if (!test_bit(__E1000_DOWN, &adapter->state))
1935                 ew32(IMS, adapter->tx_ring->ims_val);
1936 
1937         return IRQ_HANDLED;
1938 }
1939 
1940 static irqreturn_t e1000_intr_msix_rx(int __always_unused irq, void *data)
1941 {
1942         struct net_device *netdev = data;
1943         struct e1000_adapter *adapter = netdev_priv(netdev);
1944         struct e1000_ring *rx_ring = adapter->rx_ring;
1945 
1946         /* Write the ITR value calculated at the end of the
1947          * previous interrupt.
1948          */
1949         if (rx_ring->set_itr) {
1950                 u32 itr = rx_ring->itr_val ?
1951                           1000000000 / (rx_ring->itr_val * 256) : 0;
1952 
1953                 writel(itr, rx_ring->itr_register);
1954                 rx_ring->set_itr = 0;
1955         }
1956 
1957         if (napi_schedule_prep(&adapter->napi)) {
1958                 adapter->total_rx_bytes = 0;
1959                 adapter->total_rx_packets = 0;
1960                 __napi_schedule(&adapter->napi);
1961         }
1962         return IRQ_HANDLED;
1963 }
1964 
1965 /**
1966  * e1000_configure_msix - Configure MSI-X hardware
1967  *
1968  * e1000_configure_msix sets up the hardware to properly
1969  * generate MSI-X interrupts.
1970  **/
1971 static void e1000_configure_msix(struct e1000_adapter *adapter)
1972 {
1973         struct e1000_hw *hw = &adapter->hw;
1974         struct e1000_ring *rx_ring = adapter->rx_ring;
1975         struct e1000_ring *tx_ring = adapter->tx_ring;
1976         int vector = 0;
1977         u32 ctrl_ext, ivar = 0;
1978 
1979         adapter->eiac_mask = 0;
1980 
1981         /* Workaround issue with spurious interrupts on 82574 in MSI-X mode */
1982         if (hw->mac.type == e1000_82574) {
1983                 u32 rfctl = er32(RFCTL);
1984 
1985                 rfctl |= E1000_RFCTL_ACK_DIS;
1986                 ew32(RFCTL, rfctl);
1987         }
1988 
1989         /* Configure Rx vector */
1990         rx_ring->ims_val = E1000_IMS_RXQ0;
1991         adapter->eiac_mask |= rx_ring->ims_val;
1992         if (rx_ring->itr_val)
1993                 writel(1000000000 / (rx_ring->itr_val * 256),
1994                        rx_ring->itr_register);
1995         else
1996                 writel(1, rx_ring->itr_register);
1997         ivar = E1000_IVAR_INT_ALLOC_VALID | vector;
1998 
1999         /* Configure Tx vector */
2000         tx_ring->ims_val = E1000_IMS_TXQ0;
2001         vector++;
2002         if (tx_ring->itr_val)
2003                 writel(1000000000 / (tx_ring->itr_val * 256),
2004                        tx_ring->itr_register);
2005         else
2006                 writel(1, tx_ring->itr_register);
2007         adapter->eiac_mask |= tx_ring->ims_val;
2008         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 8);
2009 
2010         /* set vector for Other Causes, e.g. link changes */
2011         vector++;
2012         ivar |= ((E1000_IVAR_INT_ALLOC_VALID | vector) << 16);
2013         if (rx_ring->itr_val)
2014                 writel(1000000000 / (rx_ring->itr_val * 256),
2015                        hw->hw_addr + E1000_EITR_82574(vector));
2016         else
2017                 writel(1, hw->hw_addr + E1000_EITR_82574(vector));
2018         adapter->eiac_mask |= E1000_IMS_OTHER;
2019 
2020         /* Cause Tx interrupts on every write back */
2021         ivar |= (1 << 31);
2022 
2023         ew32(IVAR, ivar);
2024 
2025         /* enable MSI-X PBA support */
2026         ctrl_ext = er32(CTRL_EXT) & ~E1000_CTRL_EXT_IAME;
2027         ctrl_ext |= E1000_CTRL_EXT_PBA_CLR | E1000_CTRL_EXT_EIAME;
2028         ew32(CTRL_EXT, ctrl_ext);
2029         e1e_flush();
2030 }
2031 
2032 void e1000e_reset_interrupt_capability(struct e1000_adapter *adapter)
2033 {
2034         if (adapter->msix_entries) {
2035                 pci_disable_msix(adapter->pdev);
2036                 kfree(adapter->msix_entries);
2037                 adapter->msix_entries = NULL;
2038         } else if (adapter->flags & FLAG_MSI_ENABLED) {
2039                 pci_disable_msi(adapter->pdev);
2040                 adapter->flags &= ~FLAG_MSI_ENABLED;
2041         }
2042 }
2043 
2044 /**
2045  * e1000e_set_interrupt_capability - set MSI or MSI-X if supported
2046  *
2047  * Attempt to configure interrupts using the best available
2048  * capabilities of the hardware and kernel.
2049  **/
2050 void e1000e_set_interrupt_capability(struct e1000_adapter *adapter)
2051 {
2052         int err;
2053         int i;
2054 
2055         switch (adapter->int_mode) {
2056         case E1000E_INT_MODE_MSIX:
2057                 if (adapter->flags & FLAG_HAS_MSIX) {
2058                         adapter->num_vectors = 3; /* RxQ0, TxQ0 and other */
2059                         adapter->msix_entries = kcalloc(adapter->num_vectors,
2060                                                         sizeof(struct
2061                                                                msix_entry),
2062                                                         GFP_KERNEL);
2063                         if (adapter->msix_entries) {
2064                                 struct e1000_adapter *a = adapter;
2065 
2066                                 for (i = 0; i < adapter->num_vectors; i++)
2067                                         adapter->msix_entries[i].entry = i;
2068 
2069                                 err = pci_enable_msix_range(a->pdev,
2070                                                             a->msix_entries,
2071                                                             a->num_vectors,
2072                                                             a->num_vectors);
2073                                 if (err > 0)
2074                                         return;
2075                         }
2076                         /* MSI-X failed, so fall through and try MSI */
2077                         e_err("Failed to initialize MSI-X interrupts.  Falling back to MSI interrupts.\n");
2078                         e1000e_reset_interrupt_capability(adapter);
2079                 }
2080                 adapter->int_mode = E1000E_INT_MODE_MSI;
2081                 /* Fall through */
2082         case E1000E_INT_MODE_MSI:
2083                 if (!pci_enable_msi(adapter->pdev)) {
2084                         adapter->flags |= FLAG_MSI_ENABLED;
2085                 } else {
2086                         adapter->int_mode = E1000E_INT_MODE_LEGACY;
2087                         e_err("Failed to initialize MSI interrupts.  Falling back to legacy interrupts.\n");
2088                 }
2089                 /* Fall through */
2090         case E1000E_INT_MODE_LEGACY:
2091                 /* Don't do anything; this is the system default */
2092                 break;
2093         }
2094 
2095         /* store the number of vectors being used */
2096         adapter->num_vectors = 1;
2097 }
2098 
2099 /**
2100  * e1000_request_msix - Initialize MSI-X interrupts
2101  *
2102  * e1000_request_msix allocates MSI-X vectors and requests interrupts from the
2103  * kernel.
2104  **/
2105 static int e1000_request_msix(struct e1000_adapter *adapter)
2106 {
2107         struct net_device *netdev = adapter->netdev;
2108         int err = 0, vector = 0;
2109 
2110         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2111                 snprintf(adapter->rx_ring->name,
2112                          sizeof(adapter->rx_ring->name) - 1,
2113                          "%s-rx-0", netdev->name);
2114         else
2115                 memcpy(adapter->rx_ring->name, netdev->name, IFNAMSIZ);
2116         err = request_irq(adapter->msix_entries[vector].vector,
2117                           e1000_intr_msix_rx, 0, adapter->rx_ring->name,
2118                           netdev);
2119         if (err)
2120                 return err;
2121         adapter->rx_ring->itr_register = adapter->hw.hw_addr +
2122             E1000_EITR_82574(vector);
2123         adapter->rx_ring->itr_val = adapter->itr;
2124         vector++;
2125 
2126         if (strlen(netdev->name) < (IFNAMSIZ - 5))
2127                 snprintf(adapter->tx_ring->name,
2128                          sizeof(adapter->tx_ring->name) - 1,
2129                          "%s-tx-0", netdev->name);
2130         else
2131                 memcpy(adapter->tx_ring->name, netdev->name, IFNAMSIZ);
2132         err = request_irq(adapter->msix_entries[vector].vector,
2133                           e1000_intr_msix_tx, 0, adapter->tx_ring->name,
2134                           netdev);
2135         if (err)
2136                 return err;
2137         adapter->tx_ring->itr_register = adapter->hw.hw_addr +
2138             E1000_EITR_82574(vector);
2139         adapter->tx_ring->itr_val = adapter->itr;
2140         vector++;
2141 
2142         err = request_irq(adapter->msix_entries[vector].vector,
2143                           e1000_msix_other, 0, netdev->name, netdev);
2144         if (err)
2145                 return err;
2146 
2147         e1000_configure_msix(adapter);
2148 
2149         return 0;
2150 }
2151 
2152 /**
2153  * e1000_request_irq - initialize interrupts
2154  *
2155  * Attempts to configure interrupts using the best available
2156  * capabilities of the hardware and kernel.
2157  **/
2158 static int e1000_request_irq(struct e1000_adapter *adapter)
2159 {
2160         struct net_device *netdev = adapter->netdev;
2161         int err;
2162 
2163         if (adapter->msix_entries) {
2164                 err = e1000_request_msix(adapter);
2165                 if (!err)
2166                         return err;
2167                 /* fall back to MSI */
2168                 e1000e_reset_interrupt_capability(adapter);
2169                 adapter->int_mode = E1000E_INT_MODE_MSI;
2170                 e1000e_set_interrupt_capability(adapter);
2171         }
2172         if (adapter->flags & FLAG_MSI_ENABLED) {
2173                 err = request_irq(adapter->pdev->irq, e1000_intr_msi, 0,
2174                                   netdev->name, netdev);
2175                 if (!err)
2176                         return err;
2177 
2178                 /* fall back to legacy interrupt */
2179                 e1000e_reset_interrupt_capability(adapter);
2180                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
2181         }
2182 
2183         err = request_irq(adapter->pdev->irq, e1000_intr, IRQF_SHARED,
2184                           netdev->name, netdev);
2185         if (err)
2186                 e_err("Unable to allocate interrupt, Error: %d\n", err);
2187 
2188         return err;
2189 }
2190 
2191 static void e1000_free_irq(struct e1000_adapter *adapter)
2192 {
2193         struct net_device *netdev = adapter->netdev;
2194 
2195         if (adapter->msix_entries) {
2196                 int vector = 0;
2197 
2198                 free_irq(adapter->msix_entries[vector].vector, netdev);
2199                 vector++;
2200 
2201                 free_irq(adapter->msix_entries[vector].vector, netdev);
2202                 vector++;
2203 
2204                 /* Other Causes interrupt vector */
2205                 free_irq(adapter->msix_entries[vector].vector, netdev);
2206                 return;
2207         }
2208 
2209         free_irq(adapter->pdev->irq, netdev);
2210 }
2211 
2212 /**
2213  * e1000_irq_disable - Mask off interrupt generation on the NIC
2214  **/
2215 static void e1000_irq_disable(struct e1000_adapter *adapter)
2216 {
2217         struct e1000_hw *hw = &adapter->hw;
2218 
2219         ew32(IMC, ~0);
2220         if (adapter->msix_entries)
2221                 ew32(EIAC_82574, 0);
2222         e1e_flush();
2223 
2224         if (adapter->msix_entries) {
2225                 int i;
2226 
2227                 for (i = 0; i < adapter->num_vectors; i++)
2228                         synchronize_irq(adapter->msix_entries[i].vector);
2229         } else {
2230                 synchronize_irq(adapter->pdev->irq);
2231         }
2232 }
2233 
2234 /**
2235  * e1000_irq_enable - Enable default interrupt generation settings
2236  **/
2237 static void e1000_irq_enable(struct e1000_adapter *adapter)
2238 {
2239         struct e1000_hw *hw = &adapter->hw;
2240 
2241         if (adapter->msix_entries) {
2242                 ew32(EIAC_82574, adapter->eiac_mask & E1000_EIAC_MASK_82574);
2243                 ew32(IMS, adapter->eiac_mask | E1000_IMS_LSC);
2244         } else if ((hw->mac.type == e1000_pch_lpt) ||
2245                    (hw->mac.type == e1000_pch_spt)) {
2246                 ew32(IMS, IMS_ENABLE_MASK | E1000_IMS_ECCER);
2247         } else {
2248                 ew32(IMS, IMS_ENABLE_MASK);
2249         }
2250         e1e_flush();
2251 }
2252 
2253 /**
2254  * e1000e_get_hw_control - get control of the h/w from f/w
2255  * @adapter: address of board private structure
2256  *
2257  * e1000e_get_hw_control sets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2258  * For ASF and Pass Through versions of f/w this means that
2259  * the driver is loaded. For AMT version (only with 82573)
2260  * of the f/w this means that the network i/f is open.
2261  **/
2262 void e1000e_get_hw_control(struct e1000_adapter *adapter)
2263 {
2264         struct e1000_hw *hw = &adapter->hw;
2265         u32 ctrl_ext;
2266         u32 swsm;
2267 
2268         /* Let firmware know the driver has taken over */
2269         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2270                 swsm = er32(SWSM);
2271                 ew32(SWSM, swsm | E1000_SWSM_DRV_LOAD);
2272         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2273                 ctrl_ext = er32(CTRL_EXT);
2274                 ew32(CTRL_EXT, ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
2275         }
2276 }
2277 
2278 /**
2279  * e1000e_release_hw_control - release control of the h/w to f/w
2280  * @adapter: address of board private structure
2281  *
2282  * e1000e_release_hw_control resets {CTRL_EXT|SWSM}:DRV_LOAD bit.
2283  * For ASF and Pass Through versions of f/w this means that the
2284  * driver is no longer loaded. For AMT version (only with 82573) i
2285  * of the f/w this means that the network i/f is closed.
2286  *
2287  **/
2288 void e1000e_release_hw_control(struct e1000_adapter *adapter)
2289 {
2290         struct e1000_hw *hw = &adapter->hw;
2291         u32 ctrl_ext;
2292         u32 swsm;
2293 
2294         /* Let firmware taken over control of h/w */
2295         if (adapter->flags & FLAG_HAS_SWSM_ON_LOAD) {
2296                 swsm = er32(SWSM);
2297                 ew32(SWSM, swsm & ~E1000_SWSM_DRV_LOAD);
2298         } else if (adapter->flags & FLAG_HAS_CTRLEXT_ON_LOAD) {
2299                 ctrl_ext = er32(CTRL_EXT);
2300                 ew32(CTRL_EXT, ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
2301         }
2302 }
2303 
2304 /**
2305  * e1000_alloc_ring_dma - allocate memory for a ring structure
2306  **/
2307 static int e1000_alloc_ring_dma(struct e1000_adapter *adapter,
2308                                 struct e1000_ring *ring)
2309 {
2310         struct pci_dev *pdev = adapter->pdev;
2311 
2312         ring->desc = dma_alloc_coherent(&pdev->dev, ring->size, &ring->dma,
2313                                         GFP_KERNEL);
2314         if (!ring->desc)
2315                 return -ENOMEM;
2316 
2317         return 0;
2318 }
2319 
2320 /**
2321  * e1000e_setup_tx_resources - allocate Tx resources (Descriptors)
2322  * @tx_ring: Tx descriptor ring
2323  *
2324  * Return 0 on success, negative on failure
2325  **/
2326 int e1000e_setup_tx_resources(struct e1000_ring *tx_ring)
2327 {
2328         struct e1000_adapter *adapter = tx_ring->adapter;
2329         int err = -ENOMEM, size;
2330 
2331         size = sizeof(struct e1000_buffer) * tx_ring->count;
2332         tx_ring->buffer_info = vzalloc(size);
2333         if (!tx_ring->buffer_info)
2334                 goto err;
2335 
2336         /* round up to nearest 4K */
2337         tx_ring->size = tx_ring->count * sizeof(struct e1000_tx_desc);
2338         tx_ring->size = ALIGN(tx_ring->size, 4096);
2339 
2340         err = e1000_alloc_ring_dma(adapter, tx_ring);
2341         if (err)
2342                 goto err;
2343 
2344         tx_ring->next_to_use = 0;
2345         tx_ring->next_to_clean = 0;
2346 
2347         return 0;
2348 err:
2349         vfree(tx_ring->buffer_info);
2350         e_err("Unable to allocate memory for the transmit descriptor ring\n");
2351         return err;
2352 }
2353 
2354 /**
2355  * e1000e_setup_rx_resources - allocate Rx resources (Descriptors)
2356  * @rx_ring: Rx descriptor ring
2357  *
2358  * Returns 0 on success, negative on failure
2359  **/
2360 int e1000e_setup_rx_resources(struct e1000_ring *rx_ring)
2361 {
2362         struct e1000_adapter *adapter = rx_ring->adapter;
2363         struct e1000_buffer *buffer_info;
2364         int i, size, desc_len, err = -ENOMEM;
2365 
2366         size = sizeof(struct e1000_buffer) * rx_ring->count;
2367         rx_ring->buffer_info = vzalloc(size);
2368         if (!rx_ring->buffer_info)
2369                 goto err;
2370 
2371         for (i = 0; i < rx_ring->count; i++) {
2372                 buffer_info = &rx_ring->buffer_info[i];
2373                 buffer_info->ps_pages = kcalloc(PS_PAGE_BUFFERS,
2374                                                 sizeof(struct e1000_ps_page),
2375                                                 GFP_KERNEL);
2376                 if (!buffer_info->ps_pages)
2377                         goto err_pages;
2378         }
2379 
2380         desc_len = sizeof(union e1000_rx_desc_packet_split);
2381 
2382         /* Round up to nearest 4K */
2383         rx_ring->size = rx_ring->count * desc_len;
2384         rx_ring->size = ALIGN(rx_ring->size, 4096);
2385 
2386         err = e1000_alloc_ring_dma(adapter, rx_ring);
2387         if (err)
2388                 goto err_pages;
2389 
2390         rx_ring->next_to_clean = 0;
2391         rx_ring->next_to_use = 0;
2392         rx_ring->rx_skb_top = NULL;
2393 
2394         return 0;
2395 
2396 err_pages:
2397         for (i = 0; i < rx_ring->count; i++) {
2398                 buffer_info = &rx_ring->buffer_info[i];
2399                 kfree(buffer_info->ps_pages);
2400         }
2401 err:
2402         vfree(rx_ring->buffer_info);
2403         e_err("Unable to allocate memory for the receive descriptor ring\n");
2404         return err;
2405 }
2406 
2407 /**
2408  * e1000_clean_tx_ring - Free Tx Buffers
2409  * @tx_ring: Tx descriptor ring
2410  **/
2411 static void e1000_clean_tx_ring(struct e1000_ring *tx_ring)
2412 {
2413         struct e1000_adapter *adapter = tx_ring->adapter;
2414         struct e1000_buffer *buffer_info;
2415         unsigned long size;
2416         unsigned int i;
2417 
2418         for (i = 0; i < tx_ring->count; i++) {
2419                 buffer_info = &tx_ring->buffer_info[i];
2420                 e1000_put_txbuf(tx_ring, buffer_info);
2421         }
2422 
2423         netdev_reset_queue(adapter->netdev);
2424         size = sizeof(struct e1000_buffer) * tx_ring->count;
2425         memset(tx_ring->buffer_info, 0, size);
2426 
2427         memset(tx_ring->desc, 0, tx_ring->size);
2428 
2429         tx_ring->next_to_use = 0;
2430         tx_ring->next_to_clean = 0;
2431 }
2432 
2433 /**
2434  * e1000e_free_tx_resources - Free Tx Resources per Queue
2435  * @tx_ring: Tx descriptor ring
2436  *
2437  * Free all transmit software resources
2438  **/
2439 void e1000e_free_tx_resources(struct e1000_ring *tx_ring)
2440 {
2441         struct e1000_adapter *adapter = tx_ring->adapter;
2442         struct pci_dev *pdev = adapter->pdev;
2443 
2444         e1000_clean_tx_ring(tx_ring);
2445 
2446         vfree(tx_ring->buffer_info);
2447         tx_ring->buffer_info = NULL;
2448 
2449         dma_free_coherent(&pdev->dev, tx_ring->size, tx_ring->desc,
2450                           tx_ring->dma);
2451         tx_ring->desc = NULL;
2452 }
2453 
2454 /**
2455  * e1000e_free_rx_resources - Free Rx Resources
2456  * @rx_ring: Rx descriptor ring
2457  *
2458  * Free all receive software resources
2459  **/
2460 void e1000e_free_rx_resources(struct e1000_ring *rx_ring)
2461 {
2462         struct e1000_adapter *adapter = rx_ring->adapter;
2463         struct pci_dev *pdev = adapter->pdev;
2464         int i;
2465 
2466         e1000_clean_rx_ring(rx_ring);
2467 
2468         for (i = 0; i < rx_ring->count; i++)
2469                 kfree(rx_ring->buffer_info[i].ps_pages);
2470 
2471         vfree(rx_ring->buffer_info);
2472         rx_ring->buffer_info = NULL;
2473 
2474         dma_free_coherent(&pdev->dev, rx_ring->size, rx_ring->desc,
2475                           rx_ring->dma);
2476         rx_ring->desc = NULL;
2477 }
2478 
2479 /**
2480  * e1000_update_itr - update the dynamic ITR value based on statistics
2481  * @adapter: pointer to adapter
2482  * @itr_setting: current adapter->itr
2483  * @packets: the number of packets during this measurement interval
2484  * @bytes: the number of bytes during this measurement interval
2485  *
2486  *      Stores a new ITR value based on packets and byte
2487  *      counts during the last interrupt.  The advantage of per interrupt
2488  *      computation is faster updates and more accurate ITR for the current
2489  *      traffic pattern.  Constants in this function were computed
2490  *      based on theoretical maximum wire speed and thresholds were set based
2491  *      on testing data as well as attempting to minimize response time
2492  *      while increasing bulk throughput.  This functionality is controlled
2493  *      by the InterruptThrottleRate module parameter.
2494  **/
2495 static unsigned int e1000_update_itr(u16 itr_setting, int packets, int bytes)
2496 {
2497         unsigned int retval = itr_setting;
2498 
2499         if (packets == 0)
2500                 return itr_setting;
2501 
2502         switch (itr_setting) {
2503         case lowest_latency:
2504                 /* handle TSO and jumbo frames */
2505                 if (bytes / packets > 8000)
2506                         retval = bulk_latency;
2507                 else if ((packets < 5) && (bytes > 512))
2508                         retval = low_latency;
2509                 break;
2510         case low_latency:       /* 50 usec aka 20000 ints/s */
2511                 if (bytes > 10000) {
2512                         /* this if handles the TSO accounting */
2513                         if (bytes / packets > 8000)
2514                                 retval = bulk_latency;
2515                         else if ((packets < 10) || ((bytes / packets) > 1200))
2516                                 retval = bulk_latency;
2517                         else if ((packets > 35))
2518                                 retval = lowest_latency;
2519                 } else if (bytes / packets > 2000) {
2520                         retval = bulk_latency;
2521                 } else if (packets <= 2 && bytes < 512) {
2522                         retval = lowest_latency;
2523                 }
2524                 break;
2525         case bulk_latency:      /* 250 usec aka 4000 ints/s */
2526                 if (bytes > 25000) {
2527                         if (packets > 35)
2528                                 retval = low_latency;
2529                 } else if (bytes < 6000) {
2530                         retval = low_latency;
2531                 }
2532                 break;
2533         }
2534 
2535         return retval;
2536 }
2537 
2538 static void e1000_set_itr(struct e1000_adapter *adapter)
2539 {
2540         u16 current_itr;
2541         u32 new_itr = adapter->itr;
2542 
2543         /* for non-gigabit speeds, just fix the interrupt rate at 4000 */
2544         if (adapter->link_speed != SPEED_1000) {
2545                 current_itr = 0;
2546                 new_itr = 4000;
2547                 goto set_itr_now;
2548         }
2549 
2550         if (adapter->flags2 & FLAG2_DISABLE_AIM) {
2551                 new_itr = 0;
2552                 goto set_itr_now;
2553         }
2554 
2555         adapter->tx_itr = e1000_update_itr(adapter->tx_itr,
2556                                            adapter->total_tx_packets,
2557                                            adapter->total_tx_bytes);
2558         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2559         if (adapter->itr_setting == 3 && adapter->tx_itr == lowest_latency)
2560                 adapter->tx_itr = low_latency;
2561 
2562         adapter->rx_itr = e1000_update_itr(adapter->rx_itr,
2563                                            adapter->total_rx_packets,
2564                                            adapter->total_rx_bytes);
2565         /* conservative mode (itr 3) eliminates the lowest_latency setting */
2566         if (adapter->itr_setting == 3 && adapter->rx_itr == lowest_latency)
2567                 adapter->rx_itr = low_latency;
2568 
2569         current_itr = max(adapter->rx_itr, adapter->tx_itr);
2570 
2571         /* counts and packets in update_itr are dependent on these numbers */
2572         switch (current_itr) {
2573         case lowest_latency:
2574                 new_itr = 70000;
2575                 break;
2576         case low_latency:
2577                 new_itr = 20000;        /* aka hwitr = ~200 */
2578                 break;
2579         case bulk_latency:
2580                 new_itr = 4000;
2581                 break;
2582         default:
2583                 break;
2584         }
2585 
2586 set_itr_now:
2587         if (new_itr != adapter->itr) {
2588                 /* this attempts to bias the interrupt rate towards Bulk
2589                  * by adding intermediate steps when interrupt rate is
2590                  * increasing
2591                  */
2592                 new_itr = new_itr > adapter->itr ?
2593                     min(adapter->itr + (new_itr >> 2), new_itr) : new_itr;
2594                 adapter->itr = new_itr;
2595                 adapter->rx_ring->itr_val = new_itr;
2596                 if (adapter->msix_entries)
2597                         adapter->rx_ring->set_itr = 1;
2598                 else
2599                         e1000e_write_itr(adapter, new_itr);
2600         }
2601 }
2602 
2603 /**
2604  * e1000e_write_itr - write the ITR value to the appropriate registers
2605  * @adapter: address of board private structure
2606  * @itr: new ITR value to program
2607  *
2608  * e1000e_write_itr determines if the adapter is in MSI-X mode
2609  * and, if so, writes the EITR registers with the ITR value.
2610  * Otherwise, it writes the ITR value into the ITR register.
2611  **/
2612 void e1000e_write_itr(struct e1000_adapter *adapter, u32 itr)
2613 {
2614         struct e1000_hw *hw = &adapter->hw;
2615         u32 new_itr = itr ? 1000000000 / (itr * 256) : 0;
2616 
2617         if (adapter->msix_entries) {
2618                 int vector;
2619 
2620                 for (vector = 0; vector < adapter->num_vectors; vector++)
2621                         writel(new_itr, hw->hw_addr + E1000_EITR_82574(vector));
2622         } else {
2623                 ew32(ITR, new_itr);
2624         }
2625 }
2626 
2627 /**
2628  * e1000_alloc_queues - Allocate memory for all rings
2629  * @adapter: board private structure to initialize
2630  **/
2631 static int e1000_alloc_queues(struct e1000_adapter *adapter)
2632 {
2633         int size = sizeof(struct e1000_ring);
2634 
2635         adapter->tx_ring = kzalloc(size, GFP_KERNEL);
2636         if (!adapter->tx_ring)
2637                 goto err;
2638         adapter->tx_ring->count = adapter->tx_ring_count;
2639         adapter->tx_ring->adapter = adapter;
2640 
2641         adapter->rx_ring = kzalloc(size, GFP_KERNEL);
2642         if (!adapter->rx_ring)
2643                 goto err;
2644         adapter->rx_ring->count = adapter->rx_ring_count;
2645         adapter->rx_ring->adapter = adapter;
2646 
2647         return 0;
2648 err:
2649         e_err("Unable to allocate memory for queues\n");
2650         kfree(adapter->rx_ring);
2651         kfree(adapter->tx_ring);
2652         return -ENOMEM;
2653 }
2654 
2655 /**
2656  * e1000e_poll - NAPI Rx polling callback
2657  * @napi: struct associated with this polling callback
2658  * @weight: number of packets driver is allowed to process this poll
2659  **/
2660 static int e1000e_poll(struct napi_struct *napi, int weight)
2661 {
2662         struct e1000_adapter *adapter = container_of(napi, struct e1000_adapter,
2663                                                      napi);
2664         struct e1000_hw *hw = &adapter->hw;
2665         struct net_device *poll_dev = adapter->netdev;
2666         int tx_cleaned = 1, work_done = 0;
2667 
2668         adapter = netdev_priv(poll_dev);
2669 
2670         if (!adapter->msix_entries ||
2671             (adapter->rx_ring->ims_val & adapter->tx_ring->ims_val))
2672                 tx_cleaned = e1000_clean_tx_irq(adapter->tx_ring);
2673 
2674         adapter->clean_rx(adapter->rx_ring, &work_done, weight);
2675 
2676         if (!tx_cleaned)
2677                 work_done = weight;
2678 
2679         /* If weight not fully consumed, exit the polling mode */
2680         if (work_done < weight) {
2681                 if (adapter->itr_setting & 3)
2682                         e1000_set_itr(adapter);
2683                 napi_complete_done(napi, work_done);
2684                 if (!test_bit(__E1000_DOWN, &adapter->state)) {
2685                         if (adapter->msix_entries)
2686                                 ew32(IMS, adapter->rx_ring->ims_val);
2687                         else
2688                                 e1000_irq_enable(adapter);
2689                 }
2690         }
2691 
2692         return work_done;
2693 }
2694 
2695 static int e1000_vlan_rx_add_vid(struct net_device *netdev,
2696                                  __always_unused __be16 proto, u16 vid)
2697 {
2698         struct e1000_adapter *adapter = netdev_priv(netdev);
2699         struct e1000_hw *hw = &adapter->hw;
2700         u32 vfta, index;
2701 
2702         /* don't update vlan cookie if already programmed */
2703         if ((adapter->hw.mng_cookie.status &
2704              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2705             (vid == adapter->mng_vlan_id))
2706                 return 0;
2707 
2708         /* add VID to filter table */
2709         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2710                 index = (vid >> 5) & 0x7F;
2711                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2712                 vfta |= (1 << (vid & 0x1F));
2713                 hw->mac.ops.write_vfta(hw, index, vfta);
2714         }
2715 
2716         set_bit(vid, adapter->active_vlans);
2717 
2718         return 0;
2719 }
2720 
2721 static int e1000_vlan_rx_kill_vid(struct net_device *netdev,
2722                                   __always_unused __be16 proto, u16 vid)
2723 {
2724         struct e1000_adapter *adapter = netdev_priv(netdev);
2725         struct e1000_hw *hw = &adapter->hw;
2726         u32 vfta, index;
2727 
2728         if ((adapter->hw.mng_cookie.status &
2729              E1000_MNG_DHCP_COOKIE_STATUS_VLAN) &&
2730             (vid == adapter->mng_vlan_id)) {
2731                 /* release control to f/w */
2732                 e1000e_release_hw_control(adapter);
2733                 return 0;
2734         }
2735 
2736         /* remove VID from filter table */
2737         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2738                 index = (vid >> 5) & 0x7F;
2739                 vfta = E1000_READ_REG_ARRAY(hw, E1000_VFTA, index);
2740                 vfta &= ~(1 << (vid & 0x1F));
2741                 hw->mac.ops.write_vfta(hw, index, vfta);
2742         }
2743 
2744         clear_bit(vid, adapter->active_vlans);
2745 
2746         return 0;
2747 }
2748 
2749 /**
2750  * e1000e_vlan_filter_disable - helper to disable hw VLAN filtering
2751  * @adapter: board private structure to initialize
2752  **/
2753 static void e1000e_vlan_filter_disable(struct e1000_adapter *adapter)
2754 {
2755         struct net_device *netdev = adapter->netdev;
2756         struct e1000_hw *hw = &adapter->hw;
2757         u32 rctl;
2758 
2759         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2760                 /* disable VLAN receive filtering */
2761                 rctl = er32(RCTL);
2762                 rctl &= ~(E1000_RCTL_VFE | E1000_RCTL_CFIEN);
2763                 ew32(RCTL, rctl);
2764 
2765                 if (adapter->mng_vlan_id != (u16)E1000_MNG_VLAN_NONE) {
2766                         e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
2767                                                adapter->mng_vlan_id);
2768                         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
2769                 }
2770         }
2771 }
2772 
2773 /**
2774  * e1000e_vlan_filter_enable - helper to enable HW VLAN filtering
2775  * @adapter: board private structure to initialize
2776  **/
2777 static void e1000e_vlan_filter_enable(struct e1000_adapter *adapter)
2778 {
2779         struct e1000_hw *hw = &adapter->hw;
2780         u32 rctl;
2781 
2782         if (adapter->flags & FLAG_HAS_HW_VLAN_FILTER) {
2783                 /* enable VLAN receive filtering */
2784                 rctl = er32(RCTL);
2785                 rctl |= E1000_RCTL_VFE;
2786                 rctl &= ~E1000_RCTL_CFIEN;
2787                 ew32(RCTL, rctl);
2788         }
2789 }
2790 
2791 /**
2792  * e1000e_vlan_strip_enable - helper to disable HW VLAN stripping
2793  * @adapter: board private structure to initialize
2794  **/
2795 static void e1000e_vlan_strip_disable(struct e1000_adapter *adapter)
2796 {
2797         struct e1000_hw *hw = &adapter->hw;
2798         u32 ctrl;
2799 
2800         /* disable VLAN tag insert/strip */
2801         ctrl = er32(CTRL);
2802         ctrl &= ~E1000_CTRL_VME;
2803         ew32(CTRL, ctrl);
2804 }
2805 
2806 /**
2807  * e1000e_vlan_strip_enable - helper to enable HW VLAN stripping
2808  * @adapter: board private structure to initialize
2809  **/
2810 static void e1000e_vlan_strip_enable(struct e1000_adapter *adapter)
2811 {
2812         struct e1000_hw *hw = &adapter->hw;
2813         u32 ctrl;
2814 
2815         /* enable VLAN tag insert/strip */
2816         ctrl = er32(CTRL);
2817         ctrl |= E1000_CTRL_VME;
2818         ew32(CTRL, ctrl);
2819 }
2820 
2821 static void e1000_update_mng_vlan(struct e1000_adapter *adapter)
2822 {
2823         struct net_device *netdev = adapter->netdev;
2824         u16 vid = adapter->hw.mng_cookie.vlan_id;
2825         u16 old_vid = adapter->mng_vlan_id;
2826 
2827         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN) {
2828                 e1000_vlan_rx_add_vid(netdev, htons(ETH_P_8021Q), vid);
2829                 adapter->mng_vlan_id = vid;
2830         }
2831 
2832         if ((old_vid != (u16)E1000_MNG_VLAN_NONE) && (vid != old_vid))
2833                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q), old_vid);
2834 }
2835 
2836 static void e1000_restore_vlan(struct e1000_adapter *adapter)
2837 {
2838         u16 vid;
2839 
2840         e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), 0);
2841 
2842         for_each_set_bit(vid, adapter->active_vlans, VLAN_N_VID)
2843             e1000_vlan_rx_add_vid(adapter->netdev, htons(ETH_P_8021Q), vid);
2844 }
2845 
2846 static void e1000_init_manageability_pt(struct e1000_adapter *adapter)
2847 {
2848         struct e1000_hw *hw = &adapter->hw;
2849         u32 manc, manc2h, mdef, i, j;
2850 
2851         if (!(adapter->flags & FLAG_MNG_PT_ENABLED))
2852                 return;
2853 
2854         manc = er32(MANC);
2855 
2856         /* enable receiving management packets to the host. this will probably
2857          * generate destination unreachable messages from the host OS, but
2858          * the packets will be handled on SMBUS
2859          */
2860         manc |= E1000_MANC_EN_MNG2HOST;
2861         manc2h = er32(MANC2H);
2862 
2863         switch (hw->mac.type) {
2864         default:
2865                 manc2h |= (E1000_MANC2H_PORT_623 | E1000_MANC2H_PORT_664);
2866                 break;
2867         case e1000_82574:
2868         case e1000_82583:
2869                 /* Check if IPMI pass-through decision filter already exists;
2870                  * if so, enable it.
2871                  */
2872                 for (i = 0, j = 0; i < 8; i++) {
2873                         mdef = er32(MDEF(i));
2874 
2875                         /* Ignore filters with anything other than IPMI ports */
2876                         if (mdef & ~(E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2877                                 continue;
2878 
2879                         /* Enable this decision filter in MANC2H */
2880                         if (mdef)
2881                                 manc2h |= (1 << i);
2882 
2883                         j |= mdef;
2884                 }
2885 
2886                 if (j == (E1000_MDEF_PORT_623 | E1000_MDEF_PORT_664))
2887                         break;
2888 
2889                 /* Create new decision filter in an empty filter */
2890                 for (i = 0, j = 0; i < 8; i++)
2891                         if (er32(MDEF(i)) == 0) {
2892                                 ew32(MDEF(i), (E1000_MDEF_PORT_623 |
2893                                                E1000_MDEF_PORT_664));
2894                                 manc2h |= (1 << 1);
2895                                 j++;
2896                                 break;
2897                         }
2898 
2899                 if (!j)
2900                         e_warn("Unable to create IPMI pass-through filter\n");
2901                 break;
2902         }
2903 
2904         ew32(MANC2H, manc2h);
2905         ew32(MANC, manc);
2906 }
2907 
2908 /**
2909  * e1000_configure_tx - Configure Transmit Unit after Reset
2910  * @adapter: board private structure
2911  *
2912  * Configure the Tx unit of the MAC after a reset.
2913  **/
2914 static void e1000_configure_tx(struct e1000_adapter *adapter)
2915 {
2916         struct e1000_hw *hw = &adapter->hw;
2917         struct e1000_ring *tx_ring = adapter->tx_ring;
2918         u64 tdba;
2919         u32 tdlen, tctl, tarc;
2920 
2921         /* Setup the HW Tx Head and Tail descriptor pointers */
2922         tdba = tx_ring->dma;
2923         tdlen = tx_ring->count * sizeof(struct e1000_tx_desc);
2924         ew32(TDBAL(0), (tdba & DMA_BIT_MASK(32)));
2925         ew32(TDBAH(0), (tdba >> 32));
2926         ew32(TDLEN(0), tdlen);
2927         ew32(TDH(0), 0);
2928         ew32(TDT(0), 0);
2929         tx_ring->head = adapter->hw.hw_addr + E1000_TDH(0);
2930         tx_ring->tail = adapter->hw.hw_addr + E1000_TDT(0);
2931 
2932         writel(0, tx_ring->head);
2933         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
2934                 e1000e_update_tdt_wa(tx_ring, 0);
2935         else
2936                 writel(0, tx_ring->tail);
2937 
2938         /* Set the Tx Interrupt Delay register */
2939         ew32(TIDV, adapter->tx_int_delay);
2940         /* Tx irq moderation */
2941         ew32(TADV, adapter->tx_abs_int_delay);
2942 
2943         if (adapter->flags2 & FLAG2_DMA_BURST) {
2944                 u32 txdctl = er32(TXDCTL(0));
2945 
2946                 txdctl &= ~(E1000_TXDCTL_PTHRESH | E1000_TXDCTL_HTHRESH |
2947                             E1000_TXDCTL_WTHRESH);
2948                 /* set up some performance related parameters to encourage the
2949                  * hardware to use the bus more efficiently in bursts, depends
2950                  * on the tx_int_delay to be enabled,
2951                  * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2952                  * hthresh = 1 ==> prefetch when one or more available
2953                  * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2954                  * BEWARE: this seems to work but should be considered first if
2955                  * there are Tx hangs or other Tx related bugs
2956                  */
2957                 txdctl |= E1000_TXDCTL_DMA_BURST_ENABLE;
2958                 ew32(TXDCTL(0), txdctl);
2959         }
2960         /* erratum work around: set txdctl the same for both queues */
2961         ew32(TXDCTL(1), er32(TXDCTL(0)));
2962 
2963         /* Program the Transmit Control Register */
2964         tctl = er32(TCTL);
2965         tctl &= ~E1000_TCTL_CT;
2966         tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
2967                 (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
2968 
2969         if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) {
2970                 tarc = er32(TARC(0));
2971                 /* set the speed mode bit, we'll clear it if we're not at
2972                  * gigabit link later
2973                  */
2974 #define SPEED_MODE_BIT (1 << 21)
2975                 tarc |= SPEED_MODE_BIT;
2976                 ew32(TARC(0), tarc);
2977         }
2978 
2979         /* errata: program both queues to unweighted RR */
2980         if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) {
2981                 tarc = er32(TARC(0));
2982                 tarc |= 1;
2983                 ew32(TARC(0), tarc);
2984                 tarc = er32(TARC(1));
2985                 tarc |= 1;
2986                 ew32(TARC(1), tarc);
2987         }
2988 
2989         /* Setup Transmit Descriptor Settings for eop descriptor */
2990         adapter->txd_cmd = E1000_TXD_CMD_EOP | E1000_TXD_CMD_IFCS;
2991 
2992         /* only set IDE if we are delaying interrupts using the timers */
2993         if (adapter->tx_int_delay)
2994                 adapter->txd_cmd |= E1000_TXD_CMD_IDE;
2995 
2996         /* enable Report Status bit */
2997         adapter->txd_cmd |= E1000_TXD_CMD_RS;
2998 
2999         ew32(TCTL, tctl);
3000 
3001         hw->mac.ops.config_collision_dist(hw);
3002 
3003         /* SPT Si errata workaround to avoid data corruption */
3004         if (hw->mac.type == e1000_pch_spt) {
3005                 u32 reg_val;
3006 
3007                 reg_val = er32(IOSFPC);
3008                 reg_val |= E1000_RCTL_RDMTS_HEX;
3009                 ew32(IOSFPC, reg_val);
3010 
3011                 reg_val = er32(TARC(0));
3012                 reg_val |= E1000_TARC0_CB_MULTIQ_3_REQ;
3013                 ew32(TARC(0), reg_val);
3014         }
3015 }
3016 
3017 /**
3018  * e1000_setup_rctl - configure the receive control registers
3019  * @adapter: Board private structure
3020  **/
3021 #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
3022                            (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
3023 static void e1000_setup_rctl(struct e1000_adapter *adapter)
3024 {
3025         struct e1000_hw *hw = &adapter->hw;
3026         u32 rctl, rfctl;
3027         u32 pages = 0;
3028 
3029         /* Workaround Si errata on PCHx - configure jumbo frame flow.
3030          * If jumbo frames not set, program related MAC/PHY registers
3031          * to h/w defaults
3032          */
3033         if (hw->mac.type >= e1000_pch2lan) {
3034                 s32 ret_val;
3035 
3036                 if (adapter->netdev->mtu > ETH_DATA_LEN)
3037                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, true);
3038                 else
3039                         ret_val = e1000_lv_jumbo_workaround_ich8lan(hw, false);
3040 
3041                 if (ret_val)
3042                         e_dbg("failed to enable|disable jumbo frame workaround mode\n");
3043         }
3044 
3045         /* Program MC offset vector base */
3046         rctl = er32(RCTL);
3047         rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
3048         rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
3049             E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
3050             (adapter->hw.mac.mc_filter_type << E1000_RCTL_MO_SHIFT);
3051 
3052         /* Do not Store bad packets */
3053         rctl &= ~E1000_RCTL_SBP;
3054 
3055         /* Enable Long Packet receive */
3056         if (adapter->netdev->mtu <= ETH_DATA_LEN)
3057                 rctl &= ~E1000_RCTL_LPE;
3058         else
3059                 rctl |= E1000_RCTL_LPE;
3060 
3061         /* Some systems expect that the CRC is included in SMBUS traffic. The
3062          * hardware strips the CRC before sending to both SMBUS (BMC) and to
3063          * host memory when this is enabled
3064          */
3065         if (adapter->flags2 & FLAG2_CRC_STRIPPING)
3066                 rctl |= E1000_RCTL_SECRC;
3067 
3068         /* Workaround Si errata on 82577 PHY - configure IPG for jumbos */
3069         if ((hw->phy.type == e1000_phy_82577) && (rctl & E1000_RCTL_LPE)) {
3070                 u16 phy_data;
3071 
3072                 e1e_rphy(hw, PHY_REG(770, 26), &phy_data);
3073                 phy_data &= 0xfff8;
3074                 phy_data |= (1 << 2);
3075                 e1e_wphy(hw, PHY_REG(770, 26), phy_data);
3076 
3077                 e1e_rphy(hw, 22, &phy_data);
3078                 phy_data &= 0x0fff;
3079                 phy_data |= (1 << 14);
3080                 e1e_wphy(hw, 0x10, 0x2823);
3081                 e1e_wphy(hw, 0x11, 0x0003);
3082                 e1e_wphy(hw, 22, phy_data);
3083         }
3084 
3085         /* Setup buffer sizes */
3086         rctl &= ~E1000_RCTL_SZ_4096;
3087         rctl |= E1000_RCTL_BSEX;
3088         switch (adapter->rx_buffer_len) {
3089         case 2048:
3090         default:
3091                 rctl |= E1000_RCTL_SZ_2048;
3092                 rctl &= ~E1000_RCTL_BSEX;
3093                 break;
3094         case 4096:
3095                 rctl |= E1000_RCTL_SZ_4096;
3096                 break;
3097         case 8192:
3098                 rctl |= E1000_RCTL_SZ_8192;
3099                 break;
3100         case 16384:
3101                 rctl |= E1000_RCTL_SZ_16384;
3102                 break;
3103         }
3104 
3105         /* Enable Extended Status in all Receive Descriptors */
3106         rfctl = er32(RFCTL);
3107         rfctl |= E1000_RFCTL_EXTEN;
3108         ew32(RFCTL, rfctl);
3109 
3110         /* 82571 and greater support packet-split where the protocol
3111          * header is placed in skb->data and the packet data is
3112          * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
3113          * In the case of a non-split, skb->data is linearly filled,
3114          * followed by the page buffers.  Therefore, skb->data is
3115          * sized to hold the largest protocol header.
3116          *
3117          * allocations using alloc_page take too long for regular MTU
3118          * so only enable packet split for jumbo frames
3119          *
3120          * Using pages when the page size is greater than 16k wastes
3121          * a lot of memory, since we allocate 3 pages at all times
3122          * per packet.
3123          */
3124         pages = PAGE_USE_COUNT(adapter->netdev->mtu);
3125         if ((pages <= 3) && (PAGE_SIZE <= 16384) && (rctl & E1000_RCTL_LPE))
3126                 adapter->rx_ps_pages = pages;
3127         else
3128                 adapter->rx_ps_pages = 0;
3129 
3130         if (adapter->rx_ps_pages) {
3131                 u32 psrctl = 0;
3132 
3133                 /* Enable Packet split descriptors */
3134                 rctl |= E1000_RCTL_DTYP_PS;
3135 
3136                 psrctl |= adapter->rx_ps_bsize0 >> E1000_PSRCTL_BSIZE0_SHIFT;
3137 
3138                 switch (adapter->rx_ps_pages) {
3139                 case 3:
3140                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE3_SHIFT;
3141                         /* fall-through */
3142                 case 2:
3143                         psrctl |= PAGE_SIZE << E1000_PSRCTL_BSIZE2_SHIFT;
3144                         /* fall-through */
3145                 case 1:
3146                         psrctl |= PAGE_SIZE >> E1000_PSRCTL_BSIZE1_SHIFT;
3147                         break;
3148                 }
3149 
3150                 ew32(PSRCTL, psrctl);
3151         }
3152 
3153         /* This is useful for sniffing bad packets. */
3154         if (adapter->netdev->features & NETIF_F_RXALL) {
3155                 /* UPE and MPE will be handled by normal PROMISC logic
3156                  * in e1000e_set_rx_mode
3157                  */
3158                 rctl |= (E1000_RCTL_SBP |       /* Receive bad packets */
3159                          E1000_RCTL_BAM |       /* RX All Bcast Pkts */
3160                          E1000_RCTL_PMCF);      /* RX All MAC Ctrl Pkts */
3161 
3162                 rctl &= ~(E1000_RCTL_VFE |      /* Disable VLAN filter */
3163                           E1000_RCTL_DPF |      /* Allow filtered pause */
3164                           E1000_RCTL_CFIEN);    /* Dis VLAN CFIEN Filter */
3165                 /* Do not mess with E1000_CTRL_VME, it affects transmit as well,
3166                  * and that breaks VLANs.
3167                  */
3168         }
3169 
3170         ew32(RCTL, rctl);
3171         /* just started the receive unit, no need to restart */
3172         adapter->flags &= ~FLAG_RESTART_NOW;
3173 }
3174 
3175 /**
3176  * e1000_configure_rx - Configure Receive Unit after Reset
3177  * @adapter: board private structure
3178  *
3179  * Configure the Rx unit of the MAC after a reset.
3180  **/
3181 static void e1000_configure_rx(struct e1000_adapter *adapter)
3182 {
3183         struct e1000_hw *hw = &adapter->hw;
3184         struct e1000_ring *rx_ring = adapter->rx_ring;
3185         u64 rdba;
3186         u32 rdlen, rctl, rxcsum, ctrl_ext;
3187 
3188         if (adapter->rx_ps_pages) {
3189                 /* this is a 32 byte descriptor */
3190                 rdlen = rx_ring->count *
3191                     sizeof(union e1000_rx_desc_packet_split);
3192                 adapter->clean_rx = e1000_clean_rx_irq_ps;
3193                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
3194         } else if (adapter->netdev->mtu > ETH_FRAME_LEN + ETH_FCS_LEN) {
3195                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3196                 adapter->clean_rx = e1000_clean_jumbo_rx_irq;
3197                 adapter->alloc_rx_buf = e1000_alloc_jumbo_rx_buffers;
3198         } else {
3199                 rdlen = rx_ring->count * sizeof(union e1000_rx_desc_extended);
3200                 adapter->clean_rx = e1000_clean_rx_irq;
3201                 adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
3202         }
3203 
3204         /* disable receives while setting up the descriptors */
3205         rctl = er32(RCTL);
3206         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
3207                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
3208         e1e_flush();
3209         usleep_range(10000, 20000);
3210 
3211         if (adapter->flags2 & FLAG2_DMA_BURST) {
3212                 /* set the writeback threshold (only takes effect if the RDTR
3213                  * is set). set GRAN=1 and write back up to 0x4 worth, and
3214                  * enable prefetching of 0x20 Rx descriptors
3215                  * granularity = 01
3216                  * wthresh = 04,
3217                  * hthresh = 04,
3218                  * pthresh = 0x20
3219                  */
3220                 ew32(RXDCTL(0), E1000_RXDCTL_DMA_BURST_ENABLE);
3221                 ew32(RXDCTL(1), E1000_RXDCTL_DMA_BURST_ENABLE);
3222 
3223                 /* override the delay timers for enabling bursting, only if
3224                  * the value was not set by the user via module options
3225                  */
3226                 if (adapter->rx_int_delay == DEFAULT_RDTR)
3227                         adapter->rx_int_delay = BURST_RDTR;
3228                 if (adapter->rx_abs_int_delay == DEFAULT_RADV)
3229                         adapter->rx_abs_int_delay = BURST_RADV;
3230         }
3231 
3232         /* set the Receive Delay Timer Register */
3233         ew32(RDTR, adapter->rx_int_delay);
3234 
3235         /* irq moderation */
3236         ew32(RADV, adapter->rx_abs_int_delay);
3237         if ((adapter->itr_setting != 0) && (adapter->itr != 0))
3238                 e1000e_write_itr(adapter, adapter->itr);
3239 
3240         ctrl_ext = er32(CTRL_EXT);
3241         /* Auto-Mask interrupts upon ICR access */
3242         ctrl_ext |= E1000_CTRL_EXT_IAME;
3243         ew32(IAM, 0xffffffff);
3244         ew32(CTRL_EXT, ctrl_ext);
3245         e1e_flush();
3246 
3247         /* Setup the HW Rx Head and Tail Descriptor Pointers and
3248          * the Base and Length of the Rx Descriptor Ring
3249          */
3250         rdba = rx_ring->dma;
3251         ew32(RDBAL(0), (rdba & DMA_BIT_MASK(32)));
3252         ew32(RDBAH(0), (rdba >> 32));
3253         ew32(RDLEN(0), rdlen);
3254         ew32(RDH(0), 0);
3255         ew32(RDT(0), 0);
3256         rx_ring->head = adapter->hw.hw_addr + E1000_RDH(0);
3257         rx_ring->tail = adapter->hw.hw_addr + E1000_RDT(0);
3258 
3259         writel(0, rx_ring->head);
3260         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
3261                 e1000e_update_rdt_wa(rx_ring, 0);
3262         else
3263                 writel(0, rx_ring->tail);
3264 
3265         /* Enable Receive Checksum Offload for TCP and UDP */
3266         rxcsum = er32(RXCSUM);
3267         if (adapter->netdev->features & NETIF_F_RXCSUM)
3268                 rxcsum |= E1000_RXCSUM_TUOFL;
3269         else
3270                 rxcsum &= ~E1000_RXCSUM_TUOFL;
3271         ew32(RXCSUM, rxcsum);
3272 
3273         /* With jumbo frames, excessive C-state transition latencies result
3274          * in dropped transactions.
3275          */
3276         if (adapter->netdev->mtu > ETH_DATA_LEN) {
3277                 u32 lat =
3278                     ((er32(PBA) & E1000_PBA_RXA_MASK) * 1024 -
3279                      adapter->max_frame_size) * 8 / 1000;
3280 
3281                 if (adapter->flags & FLAG_IS_ICH) {
3282                         u32 rxdctl = er32(RXDCTL(0));
3283 
3284                         ew32(RXDCTL(0), rxdctl | 0x3);
3285                 }
3286 
3287                 pm_qos_update_request(&adapter->pm_qos_req, lat);
3288         } else {
3289                 pm_qos_update_request(&adapter->pm_qos_req,
3290                                       PM_QOS_DEFAULT_VALUE);
3291         }
3292 
3293         /* Enable Receives */
3294         ew32(RCTL, rctl);
3295 }
3296 
3297 /**
3298  * e1000e_write_mc_addr_list - write multicast addresses to MTA
3299  * @netdev: network interface device structure
3300  *
3301  * Writes multicast address list to the MTA hash table.
3302  * Returns: -ENOMEM on failure
3303  *                0 on no addresses written
3304  *                X on writing X addresses to MTA
3305  */
3306 static int e1000e_write_mc_addr_list(struct net_device *netdev)
3307 {
3308         struct e1000_adapter *adapter = netdev_priv(netdev);
3309         struct e1000_hw *hw = &adapter->hw;
3310         struct netdev_hw_addr *ha;
3311         u8 *mta_list;
3312         int i;
3313 
3314         if (netdev_mc_empty(netdev)) {
3315                 /* nothing to program, so clear mc list */
3316                 hw->mac.ops.update_mc_addr_list(hw, NULL, 0);
3317                 return 0;
3318         }
3319 
3320         mta_list = kzalloc(netdev_mc_count(netdev) * ETH_ALEN, GFP_ATOMIC);
3321         if (!mta_list)
3322                 return -ENOMEM;
3323 
3324         /* update_mc_addr_list expects a packed array of only addresses. */
3325         i = 0;
3326         netdev_for_each_mc_addr(ha, netdev)
3327             memcpy(mta_list + (i++ * ETH_ALEN), ha->addr, ETH_ALEN);
3328 
3329         hw->mac.ops.update_mc_addr_list(hw, mta_list, i);
3330         kfree(mta_list);
3331 
3332         return netdev_mc_count(netdev);
3333 }
3334 
3335 /**
3336  * e1000e_write_uc_addr_list - write unicast addresses to RAR table
3337  * @netdev: network interface device structure
3338  *
3339  * Writes unicast address list to the RAR table.
3340  * Returns: -ENOMEM on failure/insufficient address space
3341  *                0 on no addresses written
3342  *                X on writing X addresses to the RAR table
3343  **/
3344 static int e1000e_write_uc_addr_list(struct net_device *netdev)
3345 {
3346         struct e1000_adapter *adapter = netdev_priv(netdev);
3347         struct e1000_hw *hw = &adapter->hw;
3348         unsigned int rar_entries;
3349         int count = 0;
3350 
3351         rar_entries = hw->mac.ops.rar_get_count(hw);
3352 
3353         /* save a rar entry for our hardware address */
3354         rar_entries--;
3355 
3356         /* save a rar entry for the LAA workaround */
3357         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA)
3358                 rar_entries--;
3359 
3360         /* return ENOMEM indicating insufficient memory for addresses */
3361         if (netdev_uc_count(netdev) > rar_entries)
3362                 return -ENOMEM;
3363 
3364         if (!netdev_uc_empty(netdev) && rar_entries) {
3365                 struct netdev_hw_addr *ha;
3366 
3367                 /* write the addresses in reverse order to avoid write
3368                  * combining
3369                  */
3370                 netdev_for_each_uc_addr(ha, netdev) {
3371                         int rval;
3372 
3373                         if (!rar_entries)
3374                                 break;
3375                         rval = hw->mac.ops.rar_set(hw, ha->addr, rar_entries--);
3376                         if (rval < 0)
3377                                 return -ENOMEM;
3378                         count++;
3379                 }
3380         }
3381 
3382         /* zero out the remaining RAR entries not used above */
3383         for (; rar_entries > 0; rar_entries--) {
3384                 ew32(RAH(rar_entries), 0);
3385                 ew32(RAL(rar_entries), 0);
3386         }
3387         e1e_flush();
3388 
3389         return count;
3390 }
3391 
3392 /**
3393  * e1000e_set_rx_mode - secondary unicast, Multicast and Promiscuous mode set
3394  * @netdev: network interface device structure
3395  *
3396  * The ndo_set_rx_mode entry point is called whenever the unicast or multicast
3397  * address list or the network interface flags are updated.  This routine is
3398  * responsible for configuring the hardware for proper unicast, multicast,
3399  * promiscuous mode, and all-multi behavior.
3400  **/
3401 static void e1000e_set_rx_mode(struct net_device *netdev)
3402 {
3403         struct e1000_adapter *adapter = netdev_priv(netdev);
3404         struct e1000_hw *hw = &adapter->hw;
3405         u32 rctl;
3406 
3407         if (pm_runtime_suspended(netdev->dev.parent))
3408                 return;
3409 
3410         /* Check for Promiscuous and All Multicast modes */
3411         rctl = er32(RCTL);
3412 
3413         /* clear the affected bits */
3414         rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
3415 
3416         if (netdev->flags & IFF_PROMISC) {
3417                 rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
3418                 /* Do not hardware filter VLANs in promisc mode */
3419                 e1000e_vlan_filter_disable(adapter);
3420         } else {
3421                 int count;
3422 
3423                 if (netdev->flags & IFF_ALLMULTI) {
3424                         rctl |= E1000_RCTL_MPE;
3425                 } else {
3426                         /* Write addresses to the MTA, if the attempt fails
3427                          * then we should just turn on promiscuous mode so
3428                          * that we can at least receive multicast traffic
3429                          */
3430                         count = e1000e_write_mc_addr_list(netdev);
3431                         if (count < 0)
3432                                 rctl |= E1000_RCTL_MPE;
3433                 }
3434                 e1000e_vlan_filter_enable(adapter);
3435                 /* Write addresses to available RAR registers, if there is not
3436                  * sufficient space to store all the addresses then enable
3437                  * unicast promiscuous mode
3438                  */
3439                 count = e1000e_write_uc_addr_list(netdev);
3440                 if (count < 0)
3441                         rctl |= E1000_RCTL_UPE;
3442         }
3443 
3444         ew32(RCTL, rctl);
3445 
3446         if (netdev->features & NETIF_F_HW_VLAN_CTAG_RX)
3447                 e1000e_vlan_strip_enable(adapter);
3448         else
3449                 e1000e_vlan_strip_disable(adapter);
3450 }
3451 
3452 static void e1000e_setup_rss_hash(struct e1000_adapter *adapter)
3453 {
3454         struct e1000_hw *hw = &adapter->hw;
3455         u32 mrqc, rxcsum;
3456         u32 rss_key[10];
3457         int i;
3458 
3459         netdev_rss_key_fill(rss_key, sizeof(rss_key));
3460         for (i = 0; i < 10; i++)
3461                 ew32(RSSRK(i), rss_key[i]);
3462 
3463         /* Direct all traffic to queue 0 */
3464         for (i = 0; i < 32; i++)
3465                 ew32(RETA(i), 0);
3466 
3467         /* Disable raw packet checksumming so that RSS hash is placed in
3468          * descriptor on writeback.
3469          */
3470         rxcsum = er32(RXCSUM);
3471         rxcsum |= E1000_RXCSUM_PCSD;
3472 
3473         ew32(RXCSUM, rxcsum);
3474 
3475         mrqc = (E1000_MRQC_RSS_FIELD_IPV4 |
3476                 E1000_MRQC_RSS_FIELD_IPV4_TCP |
3477                 E1000_MRQC_RSS_FIELD_IPV6 |
3478                 E1000_MRQC_RSS_FIELD_IPV6_TCP |
3479                 E1000_MRQC_RSS_FIELD_IPV6_TCP_EX);
3480 
3481         ew32(MRQC, mrqc);
3482 }
3483 
3484 /**
3485  * e1000e_get_base_timinca - get default SYSTIM time increment attributes
3486  * @adapter: board private structure
3487  * @timinca: pointer to returned time increment attributes
3488  *
3489  * Get attributes for incrementing the System Time Register SYSTIML/H at
3490  * the default base frequency, and set the cyclecounter shift value.
3491  **/
3492 s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
3493 {
3494         struct e1000_hw *hw = &adapter->hw;
3495         u32 incvalue, incperiod, shift;
3496 
3497         /* Make sure clock is enabled on I217/I218/I219  before checking
3498          * the frequency
3499          */
3500         if (((hw->mac.type == e1000_pch_lpt) ||
3501              (hw->mac.type == e1000_pch_spt)) &&
3502             !(er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) &&
3503             !(er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_ENABLED)) {
3504                 u32 fextnvm7 = er32(FEXTNVM7);
3505 
3506                 if (!(fextnvm7 & (1 << 0))) {
3507                         ew32(FEXTNVM7, fextnvm7 | (1 << 0));
3508                         e1e_flush();
3509                 }
3510         }
3511 
3512         switch (hw->mac.type) {
3513         case e1000_pch2lan:
3514         case e1000_pch_lpt:
3515                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3516                         /* Stable 96MHz frequency */
3517                         incperiod = INCPERIOD_96MHz;
3518                         incvalue = INCVALUE_96MHz;
3519                         shift = INCVALUE_SHIFT_96MHz;
3520                         adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
3521                 } else {
3522                         /* Stable 25MHz frequency */
3523                         incperiod = INCPERIOD_25MHz;
3524                         incvalue = INCVALUE_25MHz;
3525                         shift = INCVALUE_SHIFT_25MHz;
3526                         adapter->cc.shift = shift;
3527                 }
3528                 break;
3529         case e1000_pch_spt:
3530                 if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
3531                         /* Stable 24MHz frequency */
3532                         incperiod = INCPERIOD_24MHz;
3533                         incvalue = INCVALUE_24MHz;
3534                         shift = INCVALUE_SHIFT_24MHz;
3535                         adapter->cc.shift = shift;
3536                         break;
3537                 }
3538                 return -EINVAL;
3539         case e1000_82574:
3540         case e1000_82583:
3541                 /* Stable 25MHz frequency */
3542                 incperiod = INCPERIOD_25MHz;
3543                 incvalue = INCVALUE_25MHz;
3544                 shift = INCVALUE_SHIFT_25MHz;
3545                 adapter->cc.shift = shift;
3546                 break;
3547         default:
3548                 return -EINVAL;
3549         }
3550 
3551         *timinca = ((incperiod << E1000_TIMINCA_INCPERIOD_SHIFT) |
3552                     ((incvalue << shift) & E1000_TIMINCA_INCVALUE_MASK));
3553 
3554         return 0;
3555 }
3556 
3557 /**
3558  * e1000e_config_hwtstamp - configure the hwtstamp registers and enable/disable
3559  * @adapter: board private structure
3560  *
3561  * Outgoing time stamping can be enabled and disabled. Play nice and
3562  * disable it when requested, although it shouldn't cause any overhead
3563  * when no packet needs it. At most one packet in the queue may be
3564  * marked for time stamping, otherwise it would be impossible to tell
3565  * for sure to which packet the hardware time stamp belongs.
3566  *
3567  * Incoming time stamping has to be configured via the hardware filters.
3568  * Not all combinations are supported, in particular event type has to be
3569  * specified. Matching the kind of event packet is not supported, with the
3570  * exception of "all V2 events regardless of level 2 or 4".
3571  **/
3572 static int e1000e_config_hwtstamp(struct e1000_adapter *adapter,
3573                                   struct hwtstamp_config *config)
3574 {
3575         struct e1000_hw *hw = &adapter->hw;
3576         u32 tsync_tx_ctl = E1000_TSYNCTXCTL_ENABLED;
3577         u32 tsync_rx_ctl = E1000_TSYNCRXCTL_ENABLED;
3578         u32 rxmtrl = 0;
3579         u16 rxudp = 0;
3580         bool is_l4 = false;
3581         bool is_l2 = false;
3582         u32 regval;
3583         s32 ret_val;
3584 
3585         if (!(adapter->flags & FLAG_HAS_HW_TIMESTAMP))
3586                 return -EINVAL;
3587 
3588         /* flags reserved for future extensions - must be zero */
3589         if (config->flags)
3590                 return -EINVAL;
3591 
3592         switch (config->tx_type) {
3593         case HWTSTAMP_TX_OFF:
3594                 tsync_tx_ctl = 0;
3595                 break;
3596         case HWTSTAMP_TX_ON:
3597                 break;
3598         default:
3599                 return -ERANGE;
3600         }
3601 
3602         switch (config->rx_filter) {
3603         case HWTSTAMP_FILTER_NONE:
3604                 tsync_rx_ctl = 0;
3605                 break;
3606         case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
3607                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3608                 rxmtrl = E1000_RXMTRL_PTP_V1_SYNC_MESSAGE;
3609                 is_l4 = true;
3610                 break;
3611         case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
3612                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L4_V1;
3613                 rxmtrl = E1000_RXMTRL_PTP_V1_DELAY_REQ_MESSAGE;
3614                 is_l4 = true;
3615                 break;
3616         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
3617                 /* Also time stamps V2 L2 Path Delay Request/Response */
3618                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3619                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3620                 is_l2 = true;
3621                 break;
3622         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
3623                 /* Also time stamps V2 L2 Path Delay Request/Response. */
3624                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_V2;
3625                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3626                 is_l2 = true;
3627                 break;
3628         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
3629                 /* Hardware cannot filter just V2 L4 Sync messages;
3630                  * fall-through to V2 (both L2 and L4) Sync.
3631                  */
3632         case HWTSTAMP_FILTER_PTP_V2_SYNC:
3633                 /* Also time stamps V2 Path Delay Request/Response. */
3634                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3635                 rxmtrl = E1000_RXMTRL_PTP_V2_SYNC_MESSAGE;
3636                 is_l2 = true;
3637                 is_l4 = true;
3638                 break;
3639         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
3640                 /* Hardware cannot filter just V2 L4 Delay Request messages;
3641                  * fall-through to V2 (both L2 and L4) Delay Request.
3642                  */
3643         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
3644                 /* Also time stamps V2 Path Delay Request/Response. */
3645                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_L2_L4_V2;
3646                 rxmtrl = E1000_RXMTRL_PTP_V2_DELAY_REQ_MESSAGE;
3647                 is_l2 = true;
3648                 is_l4 = true;
3649                 break;
3650         case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
3651         case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
3652                 /* Hardware cannot filter just V2 L4 or L2 Event messages;
3653                  * fall-through to all V2 (both L2 and L4) Events.
3654                  */
3655         case HWTSTAMP_FILTER_PTP_V2_EVENT:
3656                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_EVENT_V2;
3657                 config->rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
3658                 is_l2 = true;
3659                 is_l4 = true;
3660                 break;
3661         case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
3662                 /* For V1, the hardware can only filter Sync messages or
3663                  * Delay Request messages but not both so fall-through to
3664                  * time stamp all packets.
3665                  */
3666         case HWTSTAMP_FILTER_ALL:
3667                 is_l2 = true;
3668                 is_l4 = true;
3669                 tsync_rx_ctl |= E1000_TSYNCRXCTL_TYPE_ALL;
3670                 config->rx_filter = HWTSTAMP_FILTER_ALL;
3671                 break;
3672         default:
3673                 return -ERANGE;
3674         }
3675 
3676         adapter->hwtstamp_config = *config;
3677 
3678         /* enable/disable Tx h/w time stamping */
3679         regval = er32(TSYNCTXCTL);
3680         regval &= ~E1000_TSYNCTXCTL_ENABLED;
3681         regval |= tsync_tx_ctl;
3682         ew32(TSYNCTXCTL, regval);
3683         if ((er32(TSYNCTXCTL) & E1000_TSYNCTXCTL_ENABLED) !=
3684             (regval & E1000_TSYNCTXCTL_ENABLED)) {
3685                 e_err("Timesync Tx Control register not set as expected\n");
3686                 return -EAGAIN;
3687         }
3688 
3689         /* enable/disable Rx h/w time stamping */
3690         regval = er32(TSYNCRXCTL);
3691         regval &= ~(E1000_TSYNCRXCTL_ENABLED | E1000_TSYNCRXCTL_TYPE_MASK);
3692         regval |= tsync_rx_ctl;
3693         ew32(TSYNCRXCTL, regval);
3694         if ((er32(TSYNCRXCTL) & (E1000_TSYNCRXCTL_ENABLED |
3695                                  E1000_TSYNCRXCTL_TYPE_MASK)) !=
3696             (regval & (E1000_TSYNCRXCTL_ENABLED |
3697                        E1000_TSYNCRXCTL_TYPE_MASK))) {
3698                 e_err("Timesync Rx Control register not set as expected\n");
3699                 return -EAGAIN;
3700         }
3701 
3702         /* L2: define ethertype filter for time stamped packets */
3703         if (is_l2)
3704                 rxmtrl |= ETH_P_1588;
3705 
3706         /* define which PTP packets get time stamped */
3707         ew32(RXMTRL, rxmtrl);
3708 
3709         /* Filter by destination port */
3710         if (is_l4) {
3711                 rxudp = PTP_EV_PORT;
3712                 cpu_to_be16s(&rxudp);
3713         }
3714         ew32(RXUDP, rxudp);
3715 
3716         e1e_flush();
3717 
3718         /* Clear TSYNCRXCTL_VALID & TSYNCTXCTL_VALID bit */
3719         er32(RXSTMPH);
3720         er32(TXSTMPH);
3721 
3722         /* Get and set the System Time Register SYSTIM base frequency */
3723         ret_val = e1000e_get_base_timinca(adapter, &regval);
3724         if (ret_val)
3725                 return ret_val;
3726         ew32(TIMINCA, regval);
3727 
3728         /* reset the ns time counter */
3729         timecounter_init(&adapter->tc, &adapter->cc,
3730                          ktime_to_ns(ktime_get_real()));
3731 
3732         return 0;
3733 }
3734 
3735 /**
3736  * e1000_configure - configure the hardware for Rx and Tx
3737  * @adapter: private board structure
3738  **/
3739 static void e1000_configure(struct e1000_adapter *adapter)
3740 {
3741         struct e1000_ring *rx_ring = adapter->rx_ring;
3742 
3743         e1000e_set_rx_mode(adapter->netdev);
3744 
3745         e1000_restore_vlan(adapter);
3746         e1000_init_manageability_pt(adapter);
3747 
3748         e1000_configure_tx(adapter);
3749 
3750         if (adapter->netdev->features & NETIF_F_RXHASH)
3751                 e1000e_setup_rss_hash(adapter);
3752         e1000_setup_rctl(adapter);
3753         e1000_configure_rx(adapter);
3754         adapter->alloc_rx_buf(rx_ring, e1000_desc_unused(rx_ring), GFP_KERNEL);
3755 }
3756 
3757 /**
3758  * e1000e_power_up_phy - restore link in case the phy was powered down
3759  * @adapter: address of board private structure
3760  *
3761  * The phy may be powered down to save power and turn off link when the
3762  * driver is unloaded and wake on lan is not enabled (among others)
3763  * *** this routine MUST be followed by a call to e1000e_reset ***
3764  **/
3765 void e1000e_power_up_phy(struct e1000_adapter *adapter)
3766 {
3767         if (adapter->hw.phy.ops.power_up)
3768                 adapter->hw.phy.ops.power_up(&adapter->hw);
3769 
3770         adapter->hw.mac.ops.setup_link(&adapter->hw);
3771 }
3772 
3773 /**
3774  * e1000_power_down_phy - Power down the PHY
3775  *
3776  * Power down the PHY so no link is implied when interface is down.
3777  * The PHY cannot be powered down if management or WoL is active.
3778  */
3779 static void e1000_power_down_phy(struct e1000_adapter *adapter)
3780 {
3781         if (adapter->hw.phy.ops.power_down)
3782                 adapter->hw.phy.ops.power_down(&adapter->hw);
3783 }
3784 
3785 /**
3786  * e1000_flush_tx_ring - remove all descriptors from the tx_ring
3787  *
3788  * We want to clear all pending descriptors from the TX ring.
3789  * zeroing happens when the HW reads the regs. We  assign the ring itself as
3790  * the data of the next descriptor. We don't care about the data we are about
3791  * to reset the HW.
3792  */
3793 static void e1000_flush_tx_ring(struct e1000_adapter *adapter)
3794 {
3795         struct e1000_hw *hw = &adapter->hw;
3796         struct e1000_ring *tx_ring = adapter->tx_ring;
3797         struct e1000_tx_desc *tx_desc = NULL;
3798         u32 tdt, tctl, txd_lower = E1000_TXD_CMD_IFCS;
3799         u16 size = 512;
3800 
3801         tctl = er32(TCTL);
3802         ew32(TCTL, tctl | E1000_TCTL_EN);
3803         tdt = er32(TDT(0));
3804         BUG_ON(tdt != tx_ring->next_to_use);
3805         tx_desc =  E1000_TX_DESC(*tx_ring, tx_ring->next_to_use);
3806         tx_desc->buffer_addr = tx_ring->dma;
3807 
3808         tx_desc->lower.data = cpu_to_le32(txd_lower | size);
3809         tx_desc->upper.data = 0;
3810         /* flush descriptors to memory before notifying the HW */
3811         wmb();
3812         tx_ring->next_to_use++;
3813         if (tx_ring->next_to_use == tx_ring->count)
3814                 tx_ring->next_to_use = 0;
3815         ew32(TDT(0), tx_ring->next_to_use);
3816         mmiowb();
3817         usleep_range(200, 250);
3818 }
3819 
3820 /**
3821  * e1000_flush_rx_ring - remove all descriptors from the rx_ring
3822  *
3823  * Mark all descriptors in the RX ring as consumed and disable the rx ring
3824  */
3825 static void e1000_flush_rx_ring(struct e1000_adapter *adapter)
3826 {
3827         u32 rctl, rxdctl;
3828         struct e1000_hw *hw = &adapter->hw;
3829 
3830         rctl = er32(RCTL);
3831         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3832         e1e_flush();
3833         usleep_range(100, 150);
3834 
3835         rxdctl = er32(RXDCTL(0));
3836         /* zero the lower 14 bits (prefetch and host thresholds) */
3837         rxdctl &= 0xffffc000;
3838 
3839         /* update thresholds: prefetch threshold to 31, host threshold to 1
3840          * and make sure the granularity is "descriptors" and not "cache lines"
3841          */
3842         rxdctl |= (0x1F | (1 << 8) | E1000_RXDCTL_THRESH_UNIT_DESC);
3843 
3844         ew32(RXDCTL(0), rxdctl);
3845         /* momentarily enable the RX ring for the changes to take effect */
3846         ew32(RCTL, rctl | E1000_RCTL_EN);
3847         e1e_flush();
3848         usleep_range(100, 150);
3849         ew32(RCTL, rctl & ~E1000_RCTL_EN);
3850 }
3851 
3852 /**
3853  * e1000_flush_desc_rings - remove all descriptors from the descriptor rings
3854  *
3855  * In i219, the descriptor rings must be emptied before resetting the HW
3856  * or before changing the device state to D3 during runtime (runtime PM).
3857  *
3858  * Failure to do this will cause the HW to enter a unit hang state which can
3859  * only be released by PCI reset on the device
3860  *
3861  */
3862 
3863 static void e1000_flush_desc_rings(struct e1000_adapter *adapter)
3864 {
3865         u16 hang_state;
3866         u32 fext_nvm11, tdlen;
3867         struct e1000_hw *hw = &adapter->hw;
3868 
3869         /* First, disable MULR fix in FEXTNVM11 */
3870         fext_nvm11 = er32(FEXTNVM11);
3871         fext_nvm11 |= E1000_FEXTNVM11_DISABLE_MULR_FIX;
3872         ew32(FEXTNVM11, fext_nvm11);
3873         /* do nothing if we're not in faulty state, or if the queue is empty */
3874         tdlen = er32(TDLEN(0));
3875         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3876                              &hang_state);
3877         if (!(hang_state & FLUSH_DESC_REQUIRED) || !tdlen)
3878                 return;
3879         e1000_flush_tx_ring(adapter);
3880         /* recheck, maybe the fault is caused by the rx ring */
3881         pci_read_config_word(adapter->pdev, PCICFG_DESC_RING_STATUS,
3882                              &hang_state);
3883         if (hang_state & FLUSH_DESC_REQUIRED)
3884                 e1000_flush_rx_ring(adapter);
3885 }
3886 
3887 /**
3888  * e1000e_reset - bring the hardware into a known good state
3889  *
3890  * This function boots the hardware and enables some settings that
3891  * require a configuration cycle of the hardware - those cannot be
3892  * set/changed during runtime. After reset the device needs to be
3893  * properly configured for Rx, Tx etc.
3894  */
3895 void e1000e_reset(struct e1000_adapter *adapter)
3896 {
3897         struct e1000_mac_info *mac = &adapter->hw.mac;
3898         struct e1000_fc_info *fc = &adapter->hw.fc;
3899         struct e1000_hw *hw = &adapter->hw;
3900         u32 tx_space, min_tx_space, min_rx_space;
3901         u32 pba = adapter->pba;
3902         u16 hwm;
3903 
3904         /* reset Packet Buffer Allocation to default */
3905         ew32(PBA, pba);
3906 
3907         if (adapter->max_frame_size > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) {
3908                 /* To maintain wire speed transmits, the Tx FIFO should be
3909                  * large enough to accommodate two full transmit packets,
3910                  * rounded up to the next 1KB and expressed in KB.  Likewise,
3911                  * the Rx FIFO should be large enough to accommodate at least
3912                  * one full receive packet and is similarly rounded up and
3913                  * expressed in KB.
3914                  */
3915                 pba = er32(PBA);
3916                 /* upper 16 bits has Tx packet buffer allocation size in KB */
3917                 tx_space = pba >> 16;
3918                 /* lower 16 bits has Rx packet buffer allocation size in KB */
3919                 pba &= 0xffff;
3920                 /* the Tx fifo also stores 16 bytes of information about the Tx
3921                  * but don't include ethernet FCS because hardware appends it
3922                  */
3923                 min_tx_space = (adapter->max_frame_size +
3924                                 sizeof(struct e1000_tx_desc) - ETH_FCS_LEN) * 2;
3925                 min_tx_space = ALIGN(min_tx_space, 1024);
3926                 min_tx_space >>= 10;
3927                 /* software strips receive CRC, so leave room for it */
3928                 min_rx_space = adapter->max_frame_size;
3929                 min_rx_space = ALIGN(min_rx_space, 1024);
3930                 min_rx_space >>= 10;
3931 
3932                 /* If current Tx allocation is less than the min Tx FIFO size,
3933                  * and the min Tx FIFO size is less than the current Rx FIFO
3934                  * allocation, take space away from current Rx allocation
3935                  */
3936                 if ((tx_space < min_tx_space) &&
3937                     ((min_tx_space - tx_space) < pba)) {
3938                         pba -= min_tx_space - tx_space;
3939 
3940                         /* if short on Rx space, Rx wins and must trump Tx
3941                          * adjustment
3942                          */
3943                         if (pba < min_rx_space)
3944                                 pba = min_rx_space;
3945                 }
3946 
3947                 ew32(PBA, pba);
3948         }
3949 
3950         /* flow control settings
3951          *
3952          * The high water mark must be low enough to fit one full frame
3953          * (or the size used for early receive) above it in the Rx FIFO.
3954          * Set it to the lower of:
3955          * - 90% of the Rx FIFO size, and
3956          * - the full Rx FIFO size minus one full frame
3957          */
3958         if (adapter->flags & FLAG_DISABLE_FC_PAUSE_TIME)
3959                 fc->pause_time = 0xFFFF;
3960         else
3961                 fc->pause_time = E1000_FC_PAUSE_TIME;
3962         fc->send_xon = true;
3963         fc->current_mode = fc->requested_mode;
3964 
3965         switch (hw->mac.type) {
3966         case e1000_ich9lan:
3967         case e1000_ich10lan:
3968                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3969                         pba = 14;
3970                         ew32(PBA, pba);
3971                         fc->high_water = 0x2800;
3972                         fc->low_water = fc->high_water - 8;
3973                         break;
3974                 }
3975                 /* fall-through */
3976         default:
3977                 hwm = min(((pba << 10) * 9 / 10),
3978                           ((pba << 10) - adapter->max_frame_size));
3979 
3980                 fc->high_water = hwm & E1000_FCRTH_RTH; /* 8-byte granularity */
3981                 fc->low_water = fc->high_water - 8;
3982                 break;
3983         case e1000_pchlan:
3984                 /* Workaround PCH LOM adapter hangs with certain network
3985                  * loads.  If hangs persist, try disabling Tx flow control.
3986                  */
3987                 if (adapter->netdev->mtu > ETH_DATA_LEN) {
3988                         fc->high_water = 0x3500;
3989                         fc->low_water = 0x1500;
3990                 } else {
3991                         fc->high_water = 0x5000;
3992                         fc->low_water = 0x3000;
3993                 }
3994                 fc->refresh_time = 0x1000;
3995                 break;
3996         case e1000_pch2lan:
3997         case e1000_pch_lpt:
3998         case e1000_pch_spt:
3999                 fc->refresh_time = 0x0400;
4000 
4001                 if (adapter->netdev->mtu <= ETH_DATA_LEN) {
4002                         fc->high_water = 0x05C20;
4003                         fc->low_water = 0x05048;
4004                         fc->pause_time = 0x0650;
4005                         break;
4006                 }
4007 
4008                 pba = 14;
4009                 ew32(PBA, pba);
4010                 fc->high_water = ((pba << 10) * 9 / 10) & E1000_FCRTH_RTH;
4011                 fc->low_water = ((pba << 10) * 8 / 10) & E1000_FCRTL_RTL;
4012                 break;
4013         }
4014 
4015         /* Alignment of Tx data is on an arbitrary byte boundary with the
4016          * maximum size per Tx descriptor limited only to the transmit
4017          * allocation of the packet buffer minus 96 bytes with an upper
4018          * limit of 24KB due to receive synchronization limitations.
4019          */
4020         adapter->tx_fifo_limit = min_t(u32, ((er32(PBA) >> 16) << 10) - 96,
4021                                        24 << 10);
4022 
4023         /* Disable Adaptive Interrupt Moderation if 2 full packets cannot
4024          * fit in receive buffer.
4025          */
4026         if (adapter->itr_setting & 0x3) {
4027                 if ((adapter->max_frame_size * 2) > (pba << 10)) {
4028                         if (!(adapter->flags2 & FLAG2_DISABLE_AIM)) {
4029                                 dev_info(&adapter->pdev->dev,
4030                                          "Interrupt Throttle Rate off\n");
4031                                 adapter->flags2 |= FLAG2_DISABLE_AIM;
4032                                 e1000e_write_itr(adapter, 0);
4033                         }
4034                 } else if (adapter->flags2 & FLAG2_DISABLE_AIM) {
4035                         dev_info(&adapter->pdev->dev,
4036                                  "Interrupt Throttle Rate on\n");
4037                         adapter->flags2 &= ~FLAG2_DISABLE_AIM;
4038                         adapter->itr = 20000;
4039                         e1000e_write_itr(adapter, adapter->itr);
4040                 }
4041         }
4042 
4043         if (hw->mac.type == e1000_pch_spt)
4044                 e1000_flush_desc_rings(adapter);
4045         /* Allow time for pending master requests to run */
4046         mac->ops.reset_hw(hw);
4047 
4048         /* For parts with AMT enabled, let the firmware know
4049          * that the network interface is in control
4050          */
4051         if (adapter->flags & FLAG_HAS_AMT)
4052                 e1000e_get_hw_control(adapter);
4053 
4054         ew32(WUC, 0);
4055 
4056         if (mac->ops.init_hw(hw))
4057                 e_err("Hardware Error\n");
4058 
4059         e1000_update_mng_vlan(adapter);
4060 
4061         /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
4062         ew32(VET, ETH_P_8021Q);
4063 
4064         e1000e_reset_adaptive(hw);
4065 
4066         /* initialize systim and reset the ns time counter */
4067         e1000e_config_hwtstamp(adapter, &adapter->hwtstamp_config);
4068 
4069         /* Set EEE advertisement as appropriate */
4070         if (adapter->flags2 & FLAG2_HAS_EEE) {
4071                 s32 ret_val;
4072                 u16 adv_addr;
4073 
4074                 switch (hw->phy.type) {
4075                 case e1000_phy_82579:
4076                         adv_addr = I82579_EEE_ADVERTISEMENT;
4077                         break;
4078                 case e1000_phy_i217:
4079                         adv_addr = I217_EEE_ADVERTISEMENT;
4080                         break;
4081                 default:
4082                         dev_err(&adapter->pdev->dev,
4083                                 "Invalid PHY type setting EEE advertisement\n");
4084                         return;
4085                 }
4086 
4087                 ret_val = hw->phy.ops.acquire(hw);
4088                 if (ret_val) {
4089                         dev_err(&adapter->pdev->dev,
4090                                 "EEE advertisement - unable to acquire PHY\n");
4091                         return;
4092                 }
4093 
4094                 e1000_write_emi_reg_locked(hw, adv_addr,
4095                                            hw->dev_spec.ich8lan.eee_disable ?
4096                                            0 : adapter->eee_advert);
4097 
4098                 hw->phy.ops.release(hw);
4099         }
4100 
4101         if (!netif_running(adapter->netdev) &&
4102             !test_bit(__E1000_TESTING, &adapter->state))
4103                 e1000_power_down_phy(adapter);
4104 
4105         e1000_get_phy_info(hw);
4106 
4107         if ((adapter->flags & FLAG_HAS_SMART_POWER_DOWN) &&
4108             !(adapter->flags & FLAG_SMART_POWER_DOWN)) {
4109                 u16 phy_data = 0;
4110                 /* speed up time to link by disabling smart power down, ignore
4111                  * the return value of this function because there is nothing
4112                  * different we would do if it failed
4113                  */
4114                 e1e_rphy(hw, IGP02E1000_PHY_POWER_MGMT, &phy_data);
4115                 phy_data &= ~IGP02E1000_PM_SPD;
4116                 e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, phy_data);
4117         }
4118         if (hw->mac.type == e1000_pch_spt && adapter->int_mode == 0) {
4119                 u32 reg;
4120 
4121                 /* Fextnvm7 @ 0xe4[2] = 1 */
4122                 reg = er32(FEXTNVM7);
4123                 reg |= E1000_FEXTNVM7_SIDE_CLK_UNGATE;
4124                 ew32(FEXTNVM7, reg);
4125                 /* Fextnvm9 @ 0x5bb4[13:12] = 11 */
4126                 reg = er32(FEXTNVM9);
4127                 reg |= E1000_FEXTNVM9_IOSFSB_CLKGATE_DIS |
4128                        E1000_FEXTNVM9_IOSFSB_CLKREQ_DIS;
4129                 ew32(FEXTNVM9, reg);
4130         }
4131 
4132 }
4133 
4134 /**
4135  * e1000e_trigger_lsc - trigger an LSC interrupt
4136  * @adapter: 
4137  *
4138  * Fire a link status change interrupt to start the watchdog.
4139  **/
4140 static void e1000e_trigger_lsc(struct e1000_adapter *adapter)
4141 {
4142         struct e1000_hw *hw = &adapter->hw;
4143 
4144         if (adapter->msix_entries)
4145                 ew32(ICS, E1000_ICS_OTHER);
4146         else
4147                 ew32(ICS, E1000_ICS_LSC);
4148 }
4149 
4150 void e1000e_up(struct e1000_adapter *adapter)
4151 {
4152         /* hardware has been reset, we need to reload some things */
4153         e1000_configure(adapter);
4154 
4155         clear_bit(__E1000_DOWN, &adapter->state);
4156 
4157         if (adapter->msix_entries)
4158                 e1000_configure_msix(adapter);
4159         e1000_irq_enable(adapter);
4160 
4161         netif_start_queue(adapter->netdev);
4162 
4163         e1000e_trigger_lsc(adapter);
4164 }
4165 
4166 static void e1000e_flush_descriptors(struct e1000_adapter *adapter)
4167 {
4168         struct e1000_hw *hw = &adapter->hw;
4169 
4170         if (!(adapter->flags2 & FLAG2_DMA_BURST))
4171                 return;
4172 
4173         /* flush pending descriptor writebacks to memory */
4174         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4175         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4176 
4177         /* execute the writes immediately */
4178         e1e_flush();
4179 
4180         /* due to rare timing issues, write to TIDV/RDTR again to ensure the
4181          * write is successful
4182          */
4183         ew32(TIDV, adapter->tx_int_delay | E1000_TIDV_FPD);
4184         ew32(RDTR, adapter->rx_int_delay | E1000_RDTR_FPD);
4185 
4186         /* execute the writes immediately */
4187         e1e_flush();
4188 }
4189 
4190 static void e1000e_update_stats(struct e1000_adapter *adapter);
4191 
4192 /**
4193  * e1000e_down - quiesce the device and optionally reset the hardware
4194  * @adapter: board private structure
4195  * @reset: boolean flag to reset the hardware or not
4196  */
4197 void e1000e_down(struct e1000_adapter *adapter, bool reset)
4198 {
4199         struct net_device *netdev = adapter->netdev;
4200         struct e1000_hw *hw = &adapter->hw;
4201         u32 tctl, rctl;
4202 
4203         /* signal that we're down so the interrupt handler does not
4204          * reschedule our watchdog timer
4205          */
4206         set_bit(__E1000_DOWN, &adapter->state);
4207 
4208         netif_carrier_off(netdev);
4209 
4210         /* disable receives in the hardware */
4211         rctl = er32(RCTL);
4212         if (!(adapter->flags2 & FLAG2_NO_DISABLE_RX))
4213                 ew32(RCTL, rctl & ~E1000_RCTL_EN);
4214         /* flush and sleep below */
4215 
4216         netif_stop_queue(netdev);
4217 
4218         /* disable transmits in the hardware */
4219         tctl = er32(TCTL);
4220         tctl &= ~E1000_TCTL_EN;
4221         ew32(TCTL, tctl);
4222 
4223         /* flush both disables and wait for them to finish */
4224         e1e_flush();
4225         usleep_range(10000, 20000);
4226 
4227         e1000_irq_disable(adapter);
4228 
4229         napi_synchronize(&adapter->napi);
4230 
4231         del_timer_sync(&adapter->watchdog_timer);
4232         del_timer_sync(&adapter->phy_info_timer);
4233 
4234         spin_lock(&adapter->stats64_lock);
4235         e1000e_update_stats(adapter);
4236         spin_unlock(&adapter->stats64_lock);
4237 
4238         e1000e_flush_descriptors(adapter);
4239 
4240         adapter->link_speed = 0;
4241         adapter->link_duplex = 0;
4242 
4243         /* Disable Si errata workaround on PCHx for jumbo frame flow */
4244         if ((hw->mac.type >= e1000_pch2lan) &&
4245             (adapter->netdev->mtu > ETH_DATA_LEN) &&
4246             e1000_lv_jumbo_workaround_ich8lan(hw, false))
4247                 e_dbg("failed to disable jumbo frame workaround mode\n");
4248 
4249         if (!pci_channel_offline(adapter->pdev)) {
4250                 if (reset)
4251                         e1000e_reset(adapter);
4252                 else if (hw->mac.type == e1000_pch_spt)
4253                         e1000_flush_desc_rings(adapter);
4254         }
4255         e1000_clean_tx_ring(adapter->tx_ring);
4256         e1000_clean_rx_ring(adapter->rx_ring);
4257 }
4258 
4259 void e1000e_reinit_locked(struct e1000_adapter *adapter)
4260 {
4261         might_sleep();
4262         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
4263                 usleep_range(1000, 2000);
4264         e1000e_down(adapter, true);
4265         e1000e_up(adapter);
4266         clear_bit(__E1000_RESETTING, &adapter->state);
4267 }
4268 
4269 /**
4270  * e1000e_cyclecounter_read - read raw cycle counter (used by time counter)
4271  * @cc: cyclecounter structure
4272  **/
4273 static cycle_t e1000e_cyclecounter_read(const struct cyclecounter *cc)
4274 {
4275         struct e1000_adapter *adapter = container_of(cc, struct e1000_adapter,
4276                                                      cc);
4277         struct e1000_hw *hw = &adapter->hw;
4278         u32 systimel_1, systimel_2, systimeh;
4279         cycle_t systim, systim_next;
4280         /* SYSTIMH latching upon SYSTIML read does not work well.
4281          * This means that if SYSTIML overflows after we read it but before
4282          * we read SYSTIMH, the value of SYSTIMH has been incremented and we
4283          * will experience a huge non linear increment in the systime value
4284          * to fix that we test for overflow and if true, we re-read systime.
4285          */
4286         systimel_1 = er32(SYSTIML);
4287         systimeh = er32(SYSTIMH);
4288         systimel_2 = er32(SYSTIML);
4289         /* Check for overflow. If there was no overflow, use the values */
4290         if (systimel_1 < systimel_2) {
4291                 systim = (cycle_t)systimel_1;
4292                 systim |= (cycle_t)systimeh << 32;
4293         } else {
4294                 /* There was an overflow, read again SYSTIMH, and use
4295                  * systimel_2
4296                  */
4297                 systimeh = er32(SYSTIMH);
4298                 systim = (cycle_t)systimel_2;
4299                 systim |= (cycle_t)systimeh << 32;
4300         }
4301 
4302         if ((hw->mac.type == e1000_82574) || (hw->mac.type == e1000_82583)) {
4303                 u64 incvalue, time_delta, rem, temp;
4304                 int i;
4305 
4306                 /* errata for 82574/82583 possible bad bits read from SYSTIMH/L
4307                  * check to see that the time is incrementing at a reasonable
4308                  * rate and is a multiple of incvalue
4309                  */
4310                 incvalue = er32(TIMINCA) & E1000_TIMINCA_INCVALUE_MASK;
4311                 for (i = 0; i < E1000_MAX_82574_SYSTIM_REREADS; i++) {
4312                         /* latch SYSTIMH on read of SYSTIML */
4313                         systim_next = (cycle_t)er32(SYSTIML);
4314                         systim_next |= (cycle_t)er32(SYSTIMH) << 32;
4315 
4316                         time_delta = systim_next - systim;
4317                         temp = time_delta;
4318                         rem = do_div(temp, incvalue);
4319 
4320                         systim = systim_next;
4321 
4322                         if ((time_delta < E1000_82574_SYSTIM_EPSILON) &&
4323                             (rem == 0))
4324                                 break;
4325                 }
4326         }
4327         return systim;
4328 }
4329 
4330 /**
4331  * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
4332  * @adapter: board private structure to initialize
4333  *
4334  * e1000_sw_init initializes the Adapter private data structure.
4335  * Fields are initialized based on PCI device information and
4336  * OS network device settings (MTU size).
4337  **/
4338 static int e1000_sw_init(struct e1000_adapter *adapter)
4339 {
4340         struct net_device *netdev = adapter->netdev;
4341 
4342         adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
4343         adapter->rx_ps_bsize0 = 128;
4344         adapter->max_frame_size = netdev->mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
4345         adapter->min_frame_size = ETH_ZLEN + ETH_FCS_LEN;
4346         adapter->tx_ring_count = E1000_DEFAULT_TXD;
4347         adapter->rx_ring_count = E1000_DEFAULT_RXD;
4348 
4349         spin_lock_init(&adapter->stats64_lock);
4350 
4351         e1000e_set_interrupt_capability(adapter);
4352 
4353         if (e1000_alloc_queues(adapter))
4354                 return -ENOMEM;
4355 
4356         /* Setup hardware time stamping cyclecounter */
4357         if (adapter->flags & FLAG_HAS_HW_TIMESTAMP) {
4358                 adapter->cc.read = e1000e_cyclecounter_read;
4359                 adapter->cc.mask = CYCLECOUNTER_MASK(64);
4360                 adapter->cc.mult = 1;
4361                 /* cc.shift set in e1000e_get_base_tininca() */
4362 
4363                 spin_lock_init(&adapter->systim_lock);
4364                 INIT_WORK(&adapter->tx_hwtstamp_work, e1000e_tx_hwtstamp_work);
4365         }
4366 
4367         /* Explicitly disable IRQ since the NIC can be in any state. */
4368         e1000_irq_disable(adapter);
4369 
4370         set_bit(__E1000_DOWN, &adapter->state);
4371         return 0;
4372 }
4373 
4374 /**
4375  * e1000_intr_msi_test - Interrupt Handler
4376  * @irq: interrupt number
4377  * @data: pointer to a network interface device structure
4378  **/
4379 static irqreturn_t e1000_intr_msi_test(int __always_unused irq, void *data)
4380 {
4381         struct net_device *netdev = data;
4382         struct e1000_adapter *adapter = netdev_priv(netdev);
4383         struct e1000_hw *hw = &adapter->hw;
4384         u32 icr = er32(ICR);
4385 
4386         e_dbg("icr is %08X\n", icr);
4387         if (icr & E1000_ICR_RXSEQ) {
4388                 adapter->flags &= ~FLAG_MSI_TEST_FAILED;
4389                 /* Force memory writes to complete before acknowledging the
4390                  * interrupt is handled.
4391                  */
4392                 wmb();
4393         }
4394 
4395         return IRQ_HANDLED;
4396 }
4397 
4398 /**
4399  * e1000_test_msi_interrupt - Returns 0 for successful test
4400  * @adapter: board private struct
4401  *
4402  * code flow taken from tg3.c
4403  **/
4404 static int e1000_test_msi_interrupt(struct e1000_adapter *adapter)
4405 {
4406         struct net_device *netdev = adapter->netdev;
4407         struct e1000_hw *hw = &adapter->hw;
4408         int err;
4409 
4410         /* poll_enable hasn't been called yet, so don't need disable */
4411         /* clear any pending events */
4412         er32(ICR);
4413 
4414         /* free the real vector and request a test handler */
4415         e1000_free_irq(adapter);
4416         e1000e_reset_interrupt_capability(adapter);
4417 
4418         /* Assume that the test fails, if it succeeds then the test
4419          * MSI irq handler will unset this flag
4420          */
4421         adapter->flags |= FLAG_MSI_TEST_FAILED;
4422 
4423         err = pci_enable_msi(adapter->pdev);
4424         if (err)
4425                 goto msi_test_failed;
4426 
4427         err = request_irq(adapter->pdev->irq, e1000_intr_msi_test, 0,
4428                           netdev->name, netdev);
4429         if (err) {
4430                 pci_disable_msi(adapter->pdev);
4431                 goto msi_test_failed;
4432         }
4433 
4434         /* Force memory writes to complete before enabling and firing an
4435          * interrupt.
4436          */
4437         wmb();
4438 
4439         e1000_irq_enable(adapter);
4440 
4441         /* fire an unusual interrupt on the test handler */
4442         ew32(ICS, E1000_ICS_RXSEQ);
4443         e1e_flush();
4444         msleep(100);
4445 
4446         e1000_irq_disable(adapter);
4447 
4448         rmb();                  /* read flags after interrupt has been fired */
4449 
4450         if (adapter->flags & FLAG_MSI_TEST_FAILED) {
4451                 adapter->int_mode = E1000E_INT_MODE_LEGACY;
4452                 e_info("MSI interrupt test failed, using legacy interrupt.\n");
4453         } else {
4454                 e_dbg("MSI interrupt test succeeded!\n");
4455         }
4456 
4457         free_irq(adapter->pdev->irq, netdev);
4458         pci_disable_msi(adapter->pdev);
4459 
4460 msi_test_failed:
4461         e1000e_set_interrupt_capability(adapter);
4462         return e1000_request_irq(adapter);
4463 }
4464 
4465 /**
4466  * e1000_test_msi - Returns 0 if MSI test succeeds or INTx mode is restored
4467  * @adapter: board private struct
4468  *
4469  * code flow taken from tg3.c, called with e1000 interrupts disabled.
4470  **/
4471 static int e1000_test_msi(struct e1000_adapter *adapter)
4472 {
4473         int err;
4474         u16 pci_cmd;
4475 
4476         if (!(adapter->flags & FLAG_MSI_ENABLED))
4477                 return 0;
4478 
4479         /* disable SERR in case the MSI write causes a master abort */
4480         pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4481         if (pci_cmd & PCI_COMMAND_SERR)
4482                 pci_write_config_word(adapter->pdev, PCI_COMMAND,
4483                                       pci_cmd & ~PCI_COMMAND_SERR);
4484 
4485         err = e1000_test_msi_interrupt(adapter);
4486 
4487         /* re-enable SERR */
4488         if (pci_cmd & PCI_COMMAND_SERR) {
4489                 pci_read_config_word(adapter->pdev, PCI_COMMAND, &pci_cmd);
4490                 pci_cmd |= PCI_COMMAND_SERR;
4491                 pci_write_config_word(adapter->pdev, PCI_COMMAND, pci_cmd);
4492         }
4493 
4494         return err;
4495 }
4496 
4497 /**
4498  * e1000_open - Called when a network interface is made active
4499  * @netdev: network interface device structure
4500  *
4501  * Returns 0 on success, negative value on failure
4502  *
4503  * The open entry point is called when a network interface is made
4504  * active by the system (IFF_UP).  At this point all resources needed
4505  * for transmit and receive operations are allocated, the interrupt
4506  * handler is registered with the OS, the watchdog timer is started,
4507  * and the stack is notified that the interface is ready.
4508  **/
4509 static int e1000_open(struct net_device *netdev)
4510 {
4511         struct e1000_adapter *adapter = netdev_priv(netdev);
4512         struct e1000_hw *hw = &adapter->hw;
4513         struct pci_dev *pdev = adapter->pdev;
4514         int err;
4515 
4516         /* disallow open during test */
4517         if (test_bit(__E1000_TESTING, &adapter->state))
4518                 return -EBUSY;
4519 
4520         pm_runtime_get_sync(&pdev->dev);
4521 
4522         netif_carrier_off(netdev);
4523 
4524         /* allocate transmit descriptors */
4525         err = e1000e_setup_tx_resources(adapter->tx_ring);
4526         if (err)
4527                 goto err_setup_tx;
4528 
4529         /* allocate receive descriptors */
4530         err = e1000e_setup_rx_resources(adapter->rx_ring);
4531         if (err)
4532                 goto err_setup_rx;
4533 
4534         /* If AMT is enabled, let the firmware know that the network
4535          * interface is now open and reset the part to a known state.
4536          */
4537         if (adapter->flags & FLAG_HAS_AMT) {
4538                 e1000e_get_hw_control(adapter);
4539                 e1000e_reset(adapter);
4540         }
4541 
4542         e1000e_power_up_phy(adapter);
4543 
4544         adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
4545         if ((adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN))
4546                 e1000_update_mng_vlan(adapter);
4547 
4548         /* DMA latency requirement to workaround jumbo issue */
4549         pm_qos_add_request(&adapter->pm_qos_req, PM_QOS_CPU_DMA_LATENCY,
4550                            PM_QOS_DEFAULT_VALUE);
4551 
4552         /* before we allocate an interrupt, we must be ready to handle it.
4553          * Setting DEBUG_SHIRQ in the kernel makes it fire an interrupt
4554          * as soon as we call pci_request_irq, so we have to setup our
4555          * clean_rx handler before we do so.
4556          */
4557         e1000_configure(adapter);
4558 
4559         err = e1000_request_irq(adapter);
4560         if (err)
4561                 goto err_req_irq;
4562 
4563         /* Work around PCIe errata with MSI interrupts causing some chipsets to
4564          * ignore e1000e MSI messages, which means we need to test our MSI
4565          * interrupt now
4566          */
4567         if (adapter->int_mode != E1000E_INT_MODE_LEGACY) {
4568                 err = e1000_test_msi(adapter);
4569                 if (err) {
4570                         e_err("Interrupt allocation failed\n");
4571                         goto err_req_irq;
4572                 }
4573         }
4574 
4575         /* From here on the code is the same as e1000e_up() */
4576         clear_bit(__E1000_DOWN, &adapter->state);
4577 
4578         napi_enable(&adapter->napi);
4579 
4580         e1000_irq_enable(adapter);
4581 
4582         adapter->tx_hang_recheck = false;
4583         netif_start_queue(netdev);
4584 
4585         hw->mac.get_link_status = true;
4586         pm_runtime_put(&pdev->dev);
4587 
4588         e1000e_trigger_lsc(adapter);
4589 
4590         return 0;
4591 
4592 err_req_irq:
4593         pm_qos_remove_request(&adapter->pm_qos_req);
4594         e1000e_release_hw_control(adapter);
4595         e1000_power_down_phy(adapter);
4596         e1000e_free_rx_resources(adapter->rx_ring);
4597 err_setup_rx:
4598         e1000e_free_tx_resources(adapter->tx_ring);
4599 err_setup_tx:
4600         e1000e_reset(adapter);
4601         pm_runtime_put_sync(&pdev->dev);
4602 
4603         return err;
4604 }
4605 
4606 /**
4607  * e1000_close - Disables a network interface
4608  * @netdev: network interface device structure
4609  *
4610  * Returns 0, this is not allowed to fail
4611  *
4612  * The close entry point is called when an interface is de-activated
4613  * by the OS.  The hardware is still under the drivers control, but
4614  * needs to be disabled.  A global MAC reset is issued to stop the
4615  * hardware, and all transmit and receive resources are freed.
4616  **/
4617 static int e1000_close(struct net_device *netdev)
4618 {
4619         struct e1000_adapter *adapter = netdev_priv(netdev);
4620         struct pci_dev *pdev = adapter->pdev;
4621         int count = E1000_CHECK_RESET_COUNT;
4622 
4623         while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
4624                 usleep_range(10000, 20000);
4625 
4626         WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
4627 
4628         pm_runtime_get_sync(&pdev->dev);
4629 
4630         if (!test_bit(__E1000_DOWN, &adapter->state)) {
4631                 e1000e_down(adapter, true);
4632                 e1000_free_irq(adapter);
4633 
4634                 /* Link status message must follow this format */
4635                 pr_info("%s NIC Link is Down\n", adapter->netdev->name);
4636         }
4637 
4638         napi_disable(&adapter->napi);
4639 
4640         e1000e_free_tx_resources(adapter->tx_ring);
4641         e1000e_free_rx_resources(adapter->rx_ring);
4642 
4643         /* kill manageability vlan ID if supported, but not if a vlan with
4644          * the same ID is registered on the host OS (let 8021q kill it)
4645          */
4646         if (adapter->hw.mng_cookie.status & E1000_MNG_DHCP_COOKIE_STATUS_VLAN)
4647                 e1000_vlan_rx_kill_vid(netdev, htons(ETH_P_8021Q),
4648                                        adapter->mng_vlan_id);
4649 
4650         /* If AMT is enabled, let the firmware know that the network
4651          * interface is now closed
4652          */
4653         if ((adapter->flags & FLAG_HAS_AMT) &&
4654             !test_bit(__E1000_TESTING, &adapter->state))
4655                 e1000e_release_hw_control(adapter);
4656 
4657         pm_qos_remove_request(&adapter->pm_qos_req);
4658 
4659         pm_runtime_put_sync(&pdev->dev);
4660 
4661         return 0;
4662 }
4663 
4664 /**
4665  * e1000_set_mac - Change the Ethernet Address of the NIC
4666  * @netdev: network interface device structure
4667  * @p: pointer to an address structure
4668  *
4669  * Returns 0 on success, negative on failure
4670  **/
4671 static int e1000_set_mac(struct net_device *netdev, void *p)
4672 {
4673         struct e1000_adapter *adapter = netdev_priv(netdev);
4674         struct e1000_hw *hw = &adapter->hw;
4675         struct sockaddr *addr = p;
4676 
4677         if (!is_valid_ether_addr(addr->sa_data))
4678                 return -EADDRNOTAVAIL;
4679 
4680         memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
4681         memcpy(adapter->hw.mac.addr, addr->sa_data, netdev->addr_len);
4682 
4683         hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr, 0);
4684 
4685         if (adapter->flags & FLAG_RESET_OVERWRITES_LAA) {
4686                 /* activate the work around */
4687                 e1000e_set_laa_state_82571(&adapter->hw, 1);
4688 
4689                 /* Hold a copy of the LAA in RAR[14] This is done so that
4690                  * between the time RAR[0] gets clobbered  and the time it
4691                  * gets fixed (in e1000_watchdog), the actual LAA is in one
4692                  * of the RARs and no incoming packets directed to this port
4693                  * are dropped. Eventually the LAA will be in RAR[0] and
4694                  * RAR[14]
4695                  */
4696                 hw->mac.ops.rar_set(&adapter->hw, adapter->hw.mac.addr,
4697                                     adapter->hw.mac.rar_entry_count - 1);
4698         }
4699 
4700         return 0;
4701 }
4702 
4703 /**
4704  * e1000e_update_phy_task - work thread to update phy
4705  * @work: pointer to our work struct
4706  *
4707  * this worker thread exists because we must acquire a
4708  * semaphore to read the phy, which we could msleep while
4709  * waiting for it, and we can't msleep in a timer.
4710  **/
4711 static void e1000e_update_phy_task(struct work_struct *work)
4712 {
4713         struct e1000_adapter *adapter = container_of(work,
4714                                                      struct e1000_adapter,
4715                                                      update_phy_task);
4716         struct e1000_hw *hw = &adapter->hw;
4717 
4718         if (test_bit(__E1000_DOWN, &adapter->state))
4719                 return;
4720 
4721         e1000_get_phy_info(hw);
4722 
4723         /* Enable EEE on 82579 after link up */
4724         if (hw->phy.type >= e1000_phy_82579)
4725                 e1000_set_eee_pchlan(hw);
4726 }
4727 
4728 /**
4729  * e1000_update_phy_info - timre call-back to update PHY info
4730  * @data: pointer to adapter cast into an unsigned long
4731  *
4732  * Need to wait a few seconds after link up to get diagnostic information from
4733  * the phy
4734  **/
4735 static void e1000_update_phy_info(unsigned long data)
4736 {
4737         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
4738 
4739         if (test_bit(__E1000_DOWN, &adapter->state))
4740                 return;
4741 
4742         schedule_work(&adapter->update_phy_task);
4743 }
4744 
4745 /**
4746  * e1000e_update_phy_stats - Update the PHY statistics counters
4747  * @adapter: board private structure
4748  *
4749  * Read/clear the upper 16-bit PHY registers and read/accumulate lower
4750  **/
4751 static void e1000e_update_phy_stats(struct e1000_adapter *adapter)
4752 {
4753         struct e1000_hw *hw = &adapter->hw;
4754         s32 ret_val;
4755         u16 phy_data;
4756 
4757         ret_val = hw->phy.ops.acquire(hw);
4758         if (ret_val)
4759                 return;
4760 
4761         /* A page set is expensive so check if already on desired page.
4762          * If not, set to the page with the PHY status registers.
4763          */
4764         hw->phy.addr = 1;
4765         ret_val = e1000e_read_phy_reg_mdic(hw, IGP01E1000_PHY_PAGE_SELECT,
4766                                            &phy_data);
4767         if (ret_val)
4768                 goto release;
4769         if (phy_data != (HV_STATS_PAGE << IGP_PAGE_SHIFT)) {
4770                 ret_val = hw->phy.ops.set_page(hw,
4771                                                HV_STATS_PAGE << IGP_PAGE_SHIFT);
4772                 if (ret_val)
4773                         goto release;
4774         }
4775 
4776         /* Single Collision Count */
4777         hw->phy.ops.read_reg_page(hw, HV_SCC_UPPER, &phy_data);
4778         ret_val = hw->phy.ops.read_reg_page(hw, HV_SCC_LOWER, &phy_data);
4779         if (!ret_val)
4780                 adapter->stats.scc += phy_data;
4781 
4782         /* Excessive Collision Count */
4783         hw->phy.ops.read_reg_page(hw, HV_ECOL_UPPER, &phy_data);
4784         ret_val = hw->phy.ops.read_reg_page(hw, HV_ECOL_LOWER, &phy_data);
4785         if (!ret_val)
4786                 adapter->stats.ecol += phy_data;
4787 
4788         /* Multiple Collision Count */
4789         hw->phy.ops.read_reg_page(hw, HV_MCC_UPPER, &phy_data);
4790         ret_val = hw->phy.ops.read_reg_page(hw, HV_MCC_LOWER, &phy_data);
4791         if (!ret_val)
4792                 adapter->stats.mcc += phy_data;
4793 
4794         /* Late Collision Count */
4795         hw->phy.ops.read_reg_page(hw, HV_LATECOL_UPPER, &phy_data);
4796         ret_val = hw->phy.ops.read_reg_page(hw, HV_LATECOL_LOWER, &phy_data);
4797         if (!ret_val)
4798                 adapter->stats.latecol += phy_data;
4799 
4800         /* Collision Count - also used for adaptive IFS */
4801         hw->phy.ops.read_reg_page(hw, HV_COLC_UPPER, &phy_data);
4802         ret_val = hw->phy.ops.read_reg_page(hw, HV_COLC_LOWER, &phy_data);
4803         if (!ret_val)
4804                 hw->mac.collision_delta = phy_data;
4805 
4806         /* Defer Count */
4807         hw->phy.ops.read_reg_page(hw, HV_DC_UPPER, &phy_data);
4808         ret_val = hw->phy.ops.read_reg_page(hw, HV_DC_LOWER, &phy_data);
4809         if (!ret_val)
4810                 adapter->stats.dc += phy_data;
4811 
4812         /* Transmit with no CRS */
4813         hw->phy.ops.read_reg_page(hw, HV_TNCRS_UPPER, &phy_data);
4814         ret_val = hw->phy.ops.read_reg_page(hw, HV_TNCRS_LOWER, &phy_data);
4815         if (!ret_val)
4816                 adapter->stats.tncrs += phy_data;
4817 
4818 release:
4819         hw->phy.ops.release(hw);
4820 }
4821 
4822 /**
4823  * e1000e_update_stats - Update the board statistics counters
4824  * @adapter: board private structure
4825  **/
4826 static void e1000e_update_stats(struct e1000_adapter *adapter)
4827 {
4828         struct net_device *netdev = adapter->netdev;
4829         struct e1000_hw *hw = &adapter->hw;
4830         struct pci_dev *pdev = adapter->pdev;
4831 
4832         /* Prevent stats update while adapter is being reset, or if the pci
4833          * connection is down.
4834          */
4835         if (adapter->link_speed == 0)
4836                 return;
4837         if (pci_channel_offline(pdev))
4838                 return;
4839 
4840         adapter->stats.crcerrs += er32(CRCERRS);
4841         adapter->stats.gprc += er32(GPRC);
4842         adapter->stats.gorc += er32(GORCL);
4843         er32(GORCH);            /* Clear gorc */
4844         adapter->stats.bprc += er32(BPRC);
4845         adapter->stats.mprc += er32(MPRC);
4846         adapter->stats.roc += er32(ROC);
4847 
4848         adapter->stats.mpc += er32(MPC);
4849 
4850         /* Half-duplex statistics */
4851         if (adapter->link_duplex == HALF_DUPLEX) {
4852                 if (adapter->flags2 & FLAG2_HAS_PHY_STATS) {
4853                         e1000e_update_phy_stats(adapter);
4854                 } else {
4855                         adapter->stats.scc += er32(SCC);
4856                         adapter->stats.ecol += er32(ECOL);
4857                         adapter->stats.mcc += er32(MCC);
4858                         adapter->stats.latecol += er32(LATECOL);
4859                         adapter->stats.dc += er32(DC);
4860 
4861                         hw->mac.collision_delta = er32(COLC);
4862 
4863                         if ((hw->mac.type != e1000_82574) &&
4864                             (hw->mac.type != e1000_82583))
4865                                 adapter->stats.tncrs += er32(TNCRS);
4866                 }
4867                 adapter->stats.colc += hw->mac.collision_delta;
4868         }
4869 
4870         adapter->stats.xonrxc += er32(XONRXC);
4871         adapter->stats.xontxc += er32(XONTXC);
4872         adapter->stats.xoffrxc += er32(XOFFRXC);
4873         adapter->stats.xofftxc += er32(XOFFTXC);
4874         adapter->stats.gptc += er32(GPTC);
4875         adapter->stats.gotc += er32(GOTCL);
4876         er32(GOTCH);            /* Clear gotc */
4877         adapter->stats.rnbc += er32(RNBC);
4878         adapter->stats.ruc += er32(RUC);
4879 
4880         adapter->stats.mptc += er32(MPTC);
4881         adapter->stats.bptc += er32(BPTC);
4882 
4883         /* used for adaptive IFS */
4884 
4885         hw->mac.tx_packet_delta = er32(TPT);
4886         adapter->stats.tpt += hw->mac.tx_packet_delta;
4887 
4888         adapter->stats.algnerrc += er32(ALGNERRC);
4889         adapter->stats.rxerrc += er32(RXERRC);
4890         adapter->stats.cexterr += er32(CEXTERR);
4891         adapter->stats.tsctc += er32(TSCTC);
4892         adapter->stats.tsctfc += er32(TSCTFC);
4893 
4894         /* Fill out the OS statistics structure */
4895         netdev->stats.multicast = adapter->stats.mprc;
4896         netdev->stats.collisions = adapter->stats.colc;
4897 
4898         /* Rx Errors */
4899 
4900         /* RLEC on some newer hardware can be incorrect so build
4901          * our own version based on RUC and ROC
4902          */
4903         netdev->stats.rx_errors = adapter->stats.rxerrc +
4904             adapter->stats.crcerrs + adapter->stats.algnerrc +
4905             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
4906         netdev->stats.rx_length_errors = adapter->stats.ruc +
4907             adapter->stats.roc;
4908         netdev->stats.rx_crc_errors = adapter->stats.crcerrs;
4909         netdev->stats.rx_frame_errors = adapter->stats.algnerrc;
4910         netdev->stats.rx_missed_errors = adapter->stats.mpc;
4911 
4912         /* Tx Errors */
4913         netdev->stats.tx_errors = adapter->stats.ecol + adapter->stats.latecol;
4914         netdev->stats.tx_aborted_errors = adapter->stats.ecol;
4915         netdev->stats.tx_window_errors = adapter->stats.latecol;
4916         netdev->stats.tx_carrier_errors = adapter->stats.tncrs;
4917 
4918         /* Tx Dropped needs to be maintained elsewhere */
4919 
4920         /* Management Stats */
4921         adapter->stats.mgptc += er32(MGTPTC);
4922         adapter->stats.mgprc += er32(MGTPRC);
4923         adapter->stats.mgpdc += er32(MGTPDC);
4924 
4925         /* Correctable ECC Errors */
4926         if ((hw->mac.type == e1000_pch_lpt) ||
4927             (hw->mac.type == e1000_pch_spt)) {
4928                 u32 pbeccsts = er32(PBECCSTS);
4929 
4930                 adapter->corr_errors +=
4931                     pbeccsts & E1000_PBECCSTS_CORR_ERR_CNT_MASK;
4932                 adapter->uncorr_errors +=
4933                     (pbeccsts & E1000_PBECCSTS_UNCORR_ERR_CNT_MASK) >>
4934                     E1000_PBECCSTS_UNCORR_ERR_CNT_SHIFT;
4935         }
4936 }
4937 
4938 /**
4939  * e1000_phy_read_status - Update the PHY register status snapshot
4940  * @adapter: board private structure
4941  **/
4942 static void e1000_phy_read_status(struct e1000_adapter *adapter)
4943 {
4944         struct e1000_hw *hw = &adapter->hw;
4945         struct e1000_phy_regs *phy = &adapter->phy_regs;
4946 
4947         if (!pm_runtime_suspended((&adapter->pdev->dev)->parent) &&
4948             (er32(STATUS) & E1000_STATUS_LU) &&
4949             (adapter->hw.phy.media_type == e1000_media_type_copper)) {
4950                 int ret_val;
4951 
4952                 ret_val = e1e_rphy(hw, MII_BMCR, &phy->bmcr);
4953                 ret_val |= e1e_rphy(hw, MII_BMSR, &phy->bmsr);
4954                 ret_val |= e1e_rphy(hw, MII_ADVERTISE, &phy->advertise);
4955                 ret_val |= e1e_rphy(hw, MII_LPA, &phy->lpa);
4956                 ret_val |= e1e_rphy(hw, MII_EXPANSION, &phy->expansion);
4957                 ret_val |= e1e_rphy(hw, MII_CTRL1000, &phy->ctrl1000);
4958                 ret_val |= e1e_rphy(hw, MII_STAT1000, &phy->stat1000);
4959                 ret_val |= e1e_rphy(hw, MII_ESTATUS, &phy->estatus);
4960                 if (ret_val)
4961                         e_warn("Error reading PHY register\n");
4962         } else {
4963                 /* Do not read PHY registers if link is not up
4964                  * Set values to typical power-on defaults
4965                  */
4966                 phy->bmcr = (BMCR_SPEED1000 | BMCR_ANENABLE | BMCR_FULLDPLX);
4967                 phy->bmsr = (BMSR_100FULL | BMSR_100HALF | BMSR_10FULL |
4968                              BMSR_10HALF | BMSR_ESTATEN | BMSR_ANEGCAPABLE |
4969                              BMSR_ERCAP);
4970                 phy->advertise = (ADVERTISE_PAUSE_ASYM | ADVERTISE_PAUSE_CAP |
4971                                   ADVERTISE_ALL | ADVERTISE_CSMA);
4972                 phy->lpa = 0;
4973                 phy->expansion = EXPANSION_ENABLENPAGE;
4974                 phy->ctrl1000 = ADVERTISE_1000FULL;
4975                 phy->stat1000 = 0;
4976                 phy->estatus = (ESTATUS_1000_TFULL | ESTATUS_1000_THALF);
4977         }
4978 }
4979 
4980 static void e1000_print_link_info(struct e1000_adapter *adapter)
4981 {
4982         struct e1000_hw *hw = &adapter->hw;
4983         u32 ctrl = er32(CTRL);
4984 
4985         /* Link status message must follow this format for user tools */
4986         pr_info("%s NIC Link is Up %d Mbps %s Duplex, Flow Control: %s\n",
4987                 adapter->netdev->name, adapter->link_speed,
4988                 adapter->link_duplex == FULL_DUPLEX ? "Full" : "Half",
4989                 (ctrl & E1000_CTRL_TFCE) && (ctrl & E1000_CTRL_RFCE) ? "Rx/Tx" :
4990                 (ctrl & E1000_CTRL_RFCE) ? "Rx" :
4991                 (ctrl & E1000_CTRL_TFCE) ? "Tx" : "None");
4992 }
4993 
4994 static bool e1000e_has_link(struct e1000_adapter *adapter)
4995 {
4996         struct e1000_hw *hw = &adapter->hw;
4997         bool link_active = false;
4998         s32 ret_val = 0;
4999 
5000         /* get_link_status is set on LSC (link status) interrupt or
5001          * Rx sequence error interrupt.  get_link_status will stay
5002          * false until the check_for_link establishes link
5003          * for copper adapters ONLY
5004          */
5005         switch (hw->phy.media_type) {
5006         case e1000_media_type_copper:
5007                 if (hw->mac.get_link_status) {
5008                         ret_val = hw->mac.ops.check_for_link(hw);
5009                         link_active = !hw->mac.get_link_status;
5010                 } else {
5011                         link_active = true;
5012                 }
5013                 break;
5014         case e1000_media_type_fiber:
5015                 ret_val = hw->mac.ops.check_for_link(hw);
5016                 link_active = !!(er32(STATUS) & E1000_STATUS_LU);
5017                 break;
5018         case e1000_media_type_internal_serdes:
5019                 ret_val = hw->mac.ops.check_for_link(hw);
5020                 link_active = adapter->hw.mac.serdes_has_link;
5021                 break;
5022         default:
5023         case e1000_media_type_unknown:
5024                 break;
5025         }
5026 
5027         if ((ret_val == E1000_ERR_PHY) && (hw->phy.type == e1000_phy_igp_3) &&
5028             (er32(CTRL) & E1000_PHY_CTRL_GBE_DISABLE)) {
5029                 /* See e1000_kmrn_lock_loss_workaround_ich8lan() */
5030                 e_info("Gigabit has been disabled, downgrading speed\n");
5031         }
5032 
5033         return link_active;
5034 }
5035 
5036 static void e1000e_enable_receives(struct e1000_adapter *adapter)
5037 {
5038         /* make sure the receive unit is started */
5039         if ((adapter->flags & FLAG_RX_NEEDS_RESTART) &&
5040             (adapter->flags & FLAG_RESTART_NOW)) {
5041                 struct e1000_hw *hw = &adapter->hw;
5042                 u32 rctl = er32(RCTL);
5043 
5044                 ew32(RCTL, rctl | E1000_RCTL_EN);
5045                 adapter->flags &= ~FLAG_RESTART_NOW;
5046         }
5047 }
5048 
5049 static void e1000e_check_82574_phy_workaround(struct e1000_adapter *adapter)
5050 {
5051         struct e1000_hw *hw = &adapter->hw;
5052 
5053         /* With 82574 controllers, PHY needs to be checked periodically
5054          * for hung state and reset, if two calls return true
5055          */
5056         if (e1000_check_phy_82574(hw))
5057                 adapter->phy_hang_count++;
5058         else
5059                 adapter->phy_hang_count = 0;
5060 
5061         if (adapter->phy_hang_count > 1) {
5062                 adapter->phy_hang_count = 0;
5063                 e_dbg("PHY appears hung - resetting\n");
5064                 schedule_work(&adapter->reset_task);
5065         }
5066 }
5067 
5068 /**
5069  * e1000_watchdog - Timer Call-back
5070  * @data: pointer to adapter cast into an unsigned long
5071  **/
5072 static void e1000_watchdog(unsigned long data)
5073 {
5074         struct e1000_adapter *adapter = (struct e1000_adapter *)data;
5075 
5076         /* Do the rest outside of interrupt context */
5077         schedule_work(&adapter->watchdog_task);
5078 
5079         /* TODO: make this use queue_delayed_work() */
5080 }
5081 
5082 static void e1000_watchdog_task(struct work_struct *work)
5083 {
5084         struct e1000_adapter *adapter = container_of(work,
5085                                                      struct e1000_adapter,
5086                                                      watchdog_task);
5087         struct net_device *netdev = adapter->netdev;
5088         struct e1000_mac_info *mac = &adapter->hw.mac;
5089         struct e1000_phy_info *phy = &adapter->hw.phy;
5090         struct e1000_ring *tx_ring = adapter->tx_ring;
5091         struct e1000_hw *hw = &adapter->hw;
5092         u32 link, tctl;
5093 
5094         if (test_bit(__E1000_DOWN, &adapter->state))
5095                 return;
5096 
5097         link = e1000e_has_link(adapter);
5098         if ((netif_carrier_ok(netdev)) && link) {
5099                 /* Cancel scheduled suspend requests. */
5100                 pm_runtime_resume(netdev->dev.parent);
5101 
5102                 e1000e_enable_receives(adapter);
5103                 goto link_up;
5104         }
5105 
5106         if ((e1000e_enable_tx_pkt_filtering(hw)) &&
5107             (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id))
5108                 e1000_update_mng_vlan(adapter);
5109 
5110         if (link) {
5111                 if (!netif_carrier_ok(netdev)) {
5112                         bool txb2b = true;
5113 
5114                         /* Cancel scheduled suspend requests. */
5115                         pm_runtime_resume(netdev->dev.parent);
5116 
5117                         /* update snapshot of PHY registers on LSC */
5118                         e1000_phy_read_status(adapter);
5119                         mac->ops.get_link_up_info(&adapter->hw,
5120                                                   &adapter->link_speed,
5121                                                   &adapter->link_duplex);
5122                         e1000_print_link_info(adapter);
5123 
5124                         /* check if SmartSpeed worked */
5125                         e1000e_check_downshift(hw);
5126                         if (phy->speed_downgraded)
5127                                 netdev_warn(netdev,
5128                                             "Link Speed was downgraded by SmartSpeed\n");
5129 
5130                         /* On supported PHYs, check for duplex mismatch only
5131                          * if link has autonegotiated at 10/100 half
5132                          */
5133                         if ((hw->phy.type == e1000_phy_igp_3 ||
5134                              hw->phy.type == e1000_phy_bm) &&
5135                             hw->mac.autoneg &&
5136                             (adapter->link_speed == SPEED_10 ||
5137                              adapter->link_speed == SPEED_100) &&
5138                             (adapter->link_duplex == HALF_DUPLEX)) {
5139                                 u16 autoneg_exp;
5140 
5141                                 e1e_rphy(hw, MII_EXPANSION, &autoneg_exp);
5142 
5143                                 if (!(autoneg_exp & EXPANSION_NWAY))
5144                                         e_info("Autonegotiated half duplex but link partner cannot autoneg.  Try forcing full duplex if link gets many collisions.\n");
5145                         }
5146 
5147                         /* adjust timeout factor according to speed/duplex */
5148                         adapter->tx_timeout_factor = 1;
5149                         switch (adapter->link_speed) {
5150                         case SPEED_10:
5151                                 txb2b = false;
5152                                 adapter->tx_timeout_factor = 16;
5153                                 break;
5154                         case SPEED_100:
5155                                 txb2b = false;
5156                                 adapter->tx_timeout_factor = 10;
5157                                 break;
5158                         }
5159 
5160                         /* workaround: re-program speed mode bit after
5161                          * link-up event
5162                          */
5163                         if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) &&
5164                             !txb2b) {
5165                                 u32 tarc0;
5166 
5167                                 tarc0 = er32(TARC(0));
5168                                 tarc0 &= ~SPEED_MODE_BIT;
5169                                 ew32(TARC(0), tarc0);
5170                         }
5171 
5172                         /* disable TSO for pcie and 10/100 speeds, to avoid
5173                          * some hardware issues
5174                          */
5175                         if (!(adapter->flags & FLAG_TSO_FORCE)) {
5176                                 switch (adapter->link_speed) {
5177                                 case SPEED_10:
5178                                 case SPEED_100:
5179                                         e_info("10/100 speed: disabling TSO\n");
5180                                         netdev->features &= ~NETIF_F_TSO;
5181                                         netdev->features &= ~NETIF_F_TSO6;
5182                                         break;
5183                                 case SPEED_1000:
5184                                         netdev->features |= NETIF_F_TSO;
5185                                         netdev->features |= NETIF_F_TSO6;
5186                                         break;
5187                                 default:
5188                                         /* oops */
5189                                         break;
5190                                 }
5191                         }
5192 
5193                         /* enable transmits in the hardware, need to do this
5194                          * after setting TARC(0)
5195                          */
5196                         tctl = er32(TCTL);
5197                         tctl |= E1000_TCTL_EN;
5198                         ew32(TCTL, tctl);
5199 
5200                         /* Perform any post-link-up configuration before
5201                          * reporting link up.
5202                          */
5203                         if (phy->ops.cfg_on_link_up)
5204                                 phy->ops.cfg_on_link_up(hw);
5205 
5206                         netif_carrier_on(netdev);
5207 
5208                         if (!test_bit(__E1000_DOWN, &adapter->state))
5209                                 mod_timer(&adapter->phy_info_timer,
5210                                           round_jiffies(jiffies + 2 * HZ));
5211                 }
5212         } else {
5213                 if (netif_carrier_ok(netdev)) {
5214                         adapter->link_speed = 0;
5215                         adapter->link_duplex = 0;
5216                         /* Link status message must follow this format */
5217                         pr_info("%s NIC Link is Down\n", adapter->netdev->name);
5218                         netif_carrier_off(netdev);
5219                         if (!test_bit(__E1000_DOWN, &adapter->state))
5220                                 mod_timer(&adapter->phy_info_timer,
5221                                           round_jiffies(jiffies + 2 * HZ));
5222 
5223                         /* 8000ES2LAN requires a Rx packet buffer work-around
5224                          * on link down event; reset the controller to flush
5225                          * the Rx packet buffer.
5226                          */
5227                         if (adapter->flags & FLAG_RX_NEEDS_RESTART)
5228                                 adapter->flags |= FLAG_RESTART_NOW;
5229                         else
5230                                 pm_schedule_suspend(netdev->dev.parent,
5231                                                     LINK_TIMEOUT);
5232                 }
5233         }
5234 
5235 link_up:
5236         spin_lock(&adapter->stats64_lock);
5237         e1000e_update_stats(adapter);
5238 
5239         mac->tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
5240         adapter->tpt_old = adapter->stats.tpt;
5241         mac->collision_delta = adapter->stats.colc - adapter->colc_old;
5242         adapter->colc_old = adapter->stats.colc;
5243 
5244         adapter->gorc = adapter->stats.gorc - adapter->gorc_old;
5245         adapter->gorc_old = adapter->stats.gorc;
5246         adapter->gotc = adapter->stats.gotc - adapter->gotc_old;
5247         adapter->gotc_old = adapter->stats.gotc;
5248         spin_unlock(&adapter->stats64_lock);
5249 
5250         /* If the link is lost the controller stops DMA, but
5251          * if there is queued Tx work it cannot be done.  So
5252          * reset the controller to flush the Tx packet buffers.
5253          */
5254         if (!netif_carrier_ok(netdev) &&
5255             (e1000_desc_unused(tx_ring) + 1 < tx_ring->count))
5256                 adapter->flags |= FLAG_RESTART_NOW;
5257 
5258         /* If reset is necessary, do it outside of interrupt context. */
5259         if (adapter->flags & FLAG_RESTART_NOW) {
5260                 schedule_work(&adapter->reset_task);
5261                 /* return immediately since reset is imminent */
5262                 return;
5263         }
5264 
5265         e1000e_update_adaptive(&adapter->hw);
5266 
5267         /* Simple mode for Interrupt Throttle Rate (ITR) */
5268         if (adapter->itr_setting == 4) {
5269                 /* Symmetric Tx/Rx gets a reduced ITR=2000;
5270                  * Total asymmetrical Tx or Rx gets ITR=8000;
5271                  * everyone else is between 2000-8000.
5272                  */
5273                 u32 goc = (adapter->gotc + adapter->gorc) / 10000;
5274                 u32 dif = (adapter->gotc > adapter->gorc ?
5275                            adapter->gotc - adapter->gorc :
5276                            adapter->gorc - adapter->gotc) / 10000;
5277                 u32 itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
5278 
5279                 e1000e_write_itr(adapter, itr);
5280         }
5281 
5282         /* Cause software interrupt to ensure Rx ring is cleaned */
5283         if (adapter->msix_entries)
5284                 ew32(ICS, adapter->rx_ring->ims_val);
5285         else
5286                 ew32(ICS, E1000_ICS_RXDMT0);
5287 
5288         /* flush pending descriptors to memory before detecting Tx hang */
5289         e1000e_flush_descriptors(adapter);
5290 
5291         /* Force detection of hung controller every watchdog period */
5292         adapter->detect_tx_hung = true;
5293 
5294         /* With 82571 controllers, LAA may be overwritten due to controller
5295          * reset from the other port. Set the appropriate LAA in RAR[0]
5296          */
5297         if (e1000e_get_laa_state_82571(hw))
5298                 hw->mac.ops.rar_set(hw, adapter->hw.mac.addr, 0);
5299 
5300         if (adapter->flags2 & FLAG2_CHECK_PHY_HANG)
5301                 e1000e_check_82574_phy_workaround(adapter);
5302 
5303         /* Clear valid timestamp stuck in RXSTMPL/H due to a Rx error */
5304         if (adapter->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE) {
5305                 if ((adapter->flags2 & FLAG2_CHECK_RX_HWTSTAMP) &&
5306                     (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_VALID)) {
5307                         er32(RXSTMPH);
5308                         adapter->rx_hwtstamp_cleared++;
5309                 } else {
5310                         adapter->flags2 |= FLAG2_CHECK_RX_HWTSTAMP;
5311                 }
5312         }
5313 
5314         /* Reset the timer */
5315         if (!test_bit(__E1000_DOWN, &adapter->state))
5316                 mod_timer(&adapter->watchdog_timer,
5317                           round_jiffies(jiffies + 2 * HZ));
5318 }
5319 
5320 #define E1000_TX_FLAGS_CSUM             0x00000001
5321 #define E1000_TX_FLAGS_VLAN             0x00000002
5322 #define E1000_TX_FLAGS_TSO              0x00000004
5323 #define E1000_TX_FLAGS_IPV4             0x00000008
5324 #define E1000_TX_FLAGS_NO_FCS           0x00000010
5325 #define E1000_TX_FLAGS_HWTSTAMP         0x00000020
5326 #define E1000_TX_FLAGS_VLAN_MASK        0xffff0000
5327 #define E1000_TX_FLAGS_VLAN_SHIFT       16
5328 
5329 static int e1000_tso(struct e1000_ring *tx_ring, struct sk_buff *skb,
5330                      __be16 protocol)
5331 {
5332         struct e1000_context_desc *context_desc;
5333         struct e1000_buffer *buffer_info;
5334         unsigned int i;
5335         u32 cmd_length = 0;
5336         u16 ipcse = 0, mss;
5337         u8 ipcss, ipcso, tucss, tucso, hdr_len;
5338         int err;
5339 
5340         if (!skb_is_gso(skb))
5341                 return 0;
5342 
5343         err = skb_cow_head(skb, 0);
5344         if (err < 0)
5345                 return err;
5346 
5347         hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5348         mss = skb_shinfo(skb)->gso_size;
5349         if (protocol == htons(ETH_P_IP)) {
5350                 struct iphdr *iph = ip_hdr(skb);
5351                 iph->tot_len = 0;
5352                 iph->check = 0;
5353                 tcp_hdr(skb)->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
5354                                                          0, IPPROTO_TCP, 0);
5355                 cmd_length = E1000_TXD_CMD_IP;
5356                 ipcse = skb_transport_offset(skb) - 1;
5357         } else if (skb_is_gso_v6(skb)) {
5358                 ipv6_hdr(skb)->payload_len = 0;
5359                 tcp_hdr(skb)->check = ~csum_ipv6_magic(&ipv6_hdr(skb)->saddr,
5360                                                        &ipv6_hdr(skb)->daddr,
5361                                                        0, IPPROTO_TCP, 0);
5362                 ipcse = 0;
5363         }
5364         ipcss = skb_network_offset(skb);
5365         ipcso = (void *)&(ip_hdr(skb)->check) - (void *)skb->data;
5366         tucss = skb_transport_offset(skb);
5367         tucso = (void *)&(tcp_hdr(skb)->check) - (void *)skb->data;
5368 
5369         cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
5370                        E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
5371 
5372         i = tx_ring->next_to_use;
5373         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5374         buffer_info = &tx_ring->buffer_info[i];
5375 
5376         context_desc->lower_setup.ip_fields.ipcss = ipcss;
5377         context_desc->lower_setup.ip_fields.ipcso = ipcso;
5378         context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
5379         context_desc->upper_setup.tcp_fields.tucss = tucss;
5380         context_desc->upper_setup.tcp_fields.tucso = tucso;
5381         context_desc->upper_setup.tcp_fields.tucse = 0;
5382         context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
5383         context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
5384         context_desc->cmd_and_length = cpu_to_le32(cmd_length);
5385 
5386         buffer_info->time_stamp = jiffies;
5387         buffer_info->next_to_watch = i;
5388 
5389         i++;
5390         if (i == tx_ring->count)
5391                 i = 0;
5392         tx_ring->next_to_use = i;
5393 
5394         return 1;
5395 }
5396 
5397 static bool e1000_tx_csum(struct e1000_ring *tx_ring, struct sk_buff *skb,
5398                           __be16 protocol)
5399 {
5400         struct e1000_adapter *adapter = tx_ring->adapter;
5401         struct e1000_context_desc *context_desc;
5402         struct e1000_buffer *buffer_info;
5403         unsigned int i;
5404         u8 css;
5405         u32 cmd_len = E1000_TXD_CMD_DEXT;
5406 
5407         if (skb->ip_summed != CHECKSUM_PARTIAL)
5408                 return false;
5409 
5410         switch (protocol) {
5411         case cpu_to_be16(ETH_P_IP):
5412                 if (ip_hdr(skb)->protocol == IPPROTO_TCP)
5413                         cmd_len |= E1000_TXD_CMD_TCP;
5414                 break;
5415         case cpu_to_be16(ETH_P_IPV6):
5416                 /* XXX not handling all IPV6 headers */
5417                 if (ipv6_hdr(skb)->nexthdr == IPPROTO_TCP)
5418                         cmd_len |= E1000_TXD_CMD_TCP;
5419                 break;
5420         default:
5421                 if (unlikely(net_ratelimit()))
5422                         e_warn("checksum_partial proto=%x!\n",
5423                                be16_to_cpu(protocol));
5424                 break;
5425         }
5426 
5427         css = skb_checksum_start_offset(skb);
5428 
5429         i = tx_ring->next_to_use;
5430         buffer_info = &tx_ring->buffer_info[i];
5431         context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
5432 
5433         context_desc->lower_setup.ip_config = 0;
5434         context_desc->upper_setup.tcp_fields.tucss = css;
5435         context_desc->upper_setup.tcp_fields.tucso = css + skb->csum_offset;
5436         context_desc->upper_setup.tcp_fields.tucse = 0;
5437         context_desc->tcp_seg_setup.data = 0;
5438         context_desc->cmd_and_length = cpu_to_le32(cmd_len);
5439 
5440         buffer_info->time_stamp = jiffies;
5441         buffer_info->next_to_watch = i;
5442 
5443         i++;
5444         if (i == tx_ring->count)
5445                 i = 0;
5446         tx_ring->next_to_use = i;
5447 
5448         return true;
5449 }
5450 
5451 static int e1000_tx_map(struct e1000_ring *tx_ring, struct sk_buff *skb,
5452                         unsigned int first, unsigned int max_per_txd,
5453                         unsigned int nr_frags)
5454 {
5455         struct e1000_adapter *adapter = tx_ring->adapter;
5456         struct pci_dev *pdev = adapter->pdev;
5457         struct e1000_buffer *buffer_info;
5458         unsigned int len = skb_headlen(skb);
5459         unsigned int offset = 0, size, count = 0, i;
5460         unsigned int f, bytecount, segs;
5461 
5462         i = tx_ring->next_to_use;
5463 
5464         while (len) {
5465                 buffer_info = &tx_ring->buffer_info[i];
5466                 size = min(len, max_per_txd);
5467 
5468                 buffer_info->length = size;
5469                 buffer_info->time_stamp = jiffies;
5470                 buffer_info->next_to_watch = i;
5471                 buffer_info->dma = dma_map_single(&pdev->dev,
5472                                                   skb->data + offset,
5473                                                   size, DMA_TO_DEVICE);
5474                 buffer_info->mapped_as_page = false;
5475                 if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5476                         goto dma_error;
5477 
5478                 len -= size;
5479                 offset += size;
5480                 count++;
5481 
5482                 if (len) {
5483                         i++;
5484                         if (i == tx_ring->count)
5485                                 i = 0;
5486                 }
5487         }
5488 
5489         for (f = 0; f < nr_frags; f++) {
5490                 const struct skb_frag_struct *frag;
5491 
5492                 frag = &skb_shinfo(skb)->frags[f];
5493                 len = skb_frag_size(frag);
5494                 offset = 0;
5495 
5496                 while (len) {
5497                         i++;
5498                         if (i == tx_ring->count)
5499                                 i = 0;
5500 
5501                         buffer_info = &tx_ring->buffer_info[i];
5502                         size = min(len, max_per_txd);
5503 
5504                         buffer_info->length = size;
5505                         buffer_info->time_stamp = jiffies;
5506                         buffer_info->next_to_watch = i;
5507                         buffer_info->dma = skb_frag_dma_map(&pdev->dev, frag,
5508                                                             offset, size,
5509                                                             DMA_TO_DEVICE);
5510                         buffer_info->mapped_as_page = true;
5511                         if (dma_mapping_error(&pdev->dev, buffer_info->dma))
5512                                 goto dma_error;
5513 
5514                         len -= size;
5515                         offset += size;
5516                         count++;
5517                 }
5518         }
5519 
5520         segs = skb_shinfo(skb)->gso_segs ? : 1;
5521         /* multiply data chunks by size of headers */
5522         bytecount = ((segs - 1) * skb_headlen(skb)) + skb->len;
5523 
5524         tx_ring->buffer_info[i].skb = skb;
5525         tx_ring->buffer_info[i].segs = segs;
5526         tx_ring->buffer_info[i].bytecount = bytecount;
5527         tx_ring->buffer_info[first].next_to_watch = i;
5528 
5529         return count;
5530 
5531 dma_error:
5532         dev_err(&pdev->dev, "Tx DMA map failed\n");
5533         buffer_info->dma = 0;
5534         if (count)
5535                 count--;
5536 
5537         while (count--) {
5538                 if (i == 0)
5539                         i += tx_ring->count;
5540                 i--;
5541                 buffer_info = &tx_ring->buffer_info[i];
5542                 e1000_put_txbuf(tx_ring, buffer_info);
5543         }
5544 
5545         return 0;
5546 }
5547 
5548 static void e1000_tx_queue(struct e1000_ring *tx_ring, int tx_flags, int count)
5549 {
5550         struct e1000_adapter *adapter = tx_ring->adapter;
5551         struct e1000_tx_desc *tx_desc = NULL;
5552         struct e1000_buffer *buffer_info;
5553         u32 txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
5554         unsigned int i;
5555 
5556         if (tx_flags & E1000_TX_FLAGS_TSO) {
5557                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
5558                     E1000_TXD_CMD_TSE;
5559                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5560 
5561                 if (tx_flags & E1000_TX_FLAGS_IPV4)
5562                         txd_upper |= E1000_TXD_POPTS_IXSM << 8;
5563         }
5564 
5565         if (tx_flags & E1000_TX_FLAGS_CSUM) {
5566                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5567                 txd_upper |= E1000_TXD_POPTS_TXSM << 8;
5568         }
5569 
5570         if (tx_flags & E1000_TX_FLAGS_VLAN) {
5571                 txd_lower |= E1000_TXD_CMD_VLE;
5572                 txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
5573         }
5574 
5575         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5576                 txd_lower &= ~(E1000_TXD_CMD_IFCS);
5577 
5578         if (unlikely(tx_flags & E1000_TX_FLAGS_HWTSTAMP)) {
5579                 txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
5580                 txd_upper |= E1000_TXD_EXTCMD_TSTAMP;
5581         }
5582 
5583         i = tx_ring->next_to_use;
5584 
5585         do {
5586                 buffer_info = &tx_ring->buffer_info[i];
5587                 tx_desc = E1000_TX_DESC(*tx_ring, i);
5588                 tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
5589                 tx_desc->lower.data = cpu_to_le32(txd_lower |
5590                                                   buffer_info->length);
5591                 tx_desc->upper.data = cpu_to_le32(txd_upper);
5592 
5593                 i++;
5594                 if (i == tx_ring->count)
5595                         i = 0;
5596         } while (--count > 0);
5597 
5598         tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
5599 
5600         /* txd_cmd re-enables FCS, so we'll re-disable it here as desired. */
5601         if (unlikely(tx_flags & E1000_TX_FLAGS_NO_FCS))
5602                 tx_desc->lower.data &= ~(cpu_to_le32(E1000_TXD_CMD_IFCS));
5603 
5604         /* Force memory writes to complete before letting h/w
5605          * know there are new descriptors to fetch.  (Only
5606          * applicable for weak-ordered memory model archs,
5607          * such as IA-64).
5608          */
5609         wmb();
5610 
5611         tx_ring->next_to_use = i;
5612 }
5613 
5614 #define MINIMUM_DHCP_PACKET_SIZE 282
5615 static int e1000_transfer_dhcp_info(struct e1000_adapter *adapter,
5616                                     struct sk_buff *skb)
5617 {
5618         struct e1000_hw *hw = &adapter->hw;
5619         u16 length, offset;
5620 
5621         if (skb_vlan_tag_present(skb) &&
5622             !((skb_vlan_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
5623               (adapter->hw.mng_cookie.status &
5624                E1000_MNG_DHCP_COOKIE_STATUS_VLAN)))
5625                 return 0;
5626 
5627         if (skb->len <= MINIMUM_DHCP_PACKET_SIZE)
5628                 return 0;
5629 
5630         if (((struct ethhdr *)skb->data)->h_proto != htons(ETH_P_IP))
5631                 return 0;
5632 
5633         {
5634                 const struct iphdr *ip = (struct iphdr *)((u8 *)skb->data + 14);
5635                 struct udphdr *udp;
5636 
5637                 if (ip->protocol != IPPROTO_UDP)
5638                         return 0;
5639 
5640                 udp = (struct udphdr *)((u8 *)ip + (ip->ihl << 2));
5641                 if (ntohs(udp->dest) != 67)
5642                         return 0;
5643 
5644                 offset = (u8 *)udp + 8 - skb->data;
5645                 length = skb->len - offset;
5646                 return e1000e_mng_write_dhcp_info(hw, (u8 *)udp + 8, length);
5647         }
5648 
5649         return 0;
5650 }
5651 
5652 static int __e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5653 {
5654         struct e1000_adapter *adapter = tx_ring->adapter;
5655 
5656         netif_stop_queue(adapter->netdev);
5657         /* Herbert's original patch had:
5658          *  smp_mb__after_netif_stop_queue();
5659          * but since that doesn't exist yet, just open code it.
5660          */
5661         smp_mb();
5662 
5663         /* We need to check again in a case another CPU has just
5664          * made room available.
5665          */
5666         if (e1000_desc_unused(tx_ring) < size)
5667                 return -EBUSY;
5668 
5669         /* A reprieve! */
5670         netif_start_queue(adapter->netdev);
5671         ++adapter->restart_queue;
5672         return 0;
5673 }
5674 
5675 static int e1000_maybe_stop_tx(struct e1000_ring *tx_ring, int size)
5676 {
5677         BUG_ON(size > tx_ring->count);
5678 
5679         if (e1000_desc_unused(tx_ring) >= size)
5680                 return 0;
5681         return __e1000_maybe_stop_tx(tx_ring, size);
5682 }
5683 
5684 static netdev_tx_t e1000_xmit_frame(struct sk_buff *skb,
5685                                     struct net_device *netdev)
5686 {
5687         struct e1000_adapter *adapter = netdev_priv(netdev);
5688         struct e1000_ring *tx_ring = adapter->tx_ring;
5689         unsigned int first;
5690         unsigned int tx_flags = 0;
5691         unsigned int len = skb_headlen(skb);
5692         unsigned int nr_frags;
5693         unsigned int mss;
5694         int count = 0;
5695         int tso;
5696         unsigned int f;
5697         __be16 protocol = vlan_get_protocol(skb);
5698 
5699         if (test_bit(__E1000_DOWN, &adapter->state)) {
5700                 dev_kfree_skb_any(skb);
5701                 return NETDEV_TX_OK;
5702         }
5703 
5704         if (skb->len <= 0) {
5705                 dev_kfree_skb_any(skb);
5706                 return NETDEV_TX_OK;
5707         }
5708 
5709         /* The minimum packet size with TCTL.PSP set is 17 bytes so
5710          * pad skb in order to meet this minimum size requirement
5711          */
5712         if (skb_put_padto(skb, 17))
5713                 return NETDEV_TX_OK;
5714 
5715         mss = skb_shinfo(skb)->gso_size;
5716         if (mss) {
5717                 u8 hdr_len;
5718 
5719                 /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
5720                  * points to just header, pull a few bytes of payload from
5721                  * frags into skb->data
5722                  */
5723                 hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
5724                 /* we do this workaround for ES2LAN, but it is un-necessary,
5725                  * avoiding it could save a lot of cycles
5726                  */
5727                 if (skb->data_len && (hdr_len == len)) {
5728                         unsigned int pull_size;
5729 
5730                         pull_size = min_t(unsigned int, 4, skb->data_len);
5731                         if (!__pskb_pull_tail(skb, pull_size)) {
5732                                 e_err("__pskb_pull_tail failed.\n");
5733                                 dev_kfree_skb_any(skb);
5734                                 return NETDEV_TX_OK;
5735                         }
5736                         len = skb_headlen(skb);
5737                 }
5738         }
5739 
5740         /* reserve a descriptor for the offload context */
5741         if ((mss) || (skb->ip_summed == CHECKSUM_PARTIAL))
5742                 count++;
5743         count++;
5744 
5745         count += DIV_ROUND_UP(len, adapter->tx_fifo_limit);
5746 
5747         nr_frags = skb_shinfo(skb)->nr_frags;
5748         for (f = 0; f < nr_frags; f++)
5749                 count += DIV_ROUND_UP(skb_frag_size(&skb_shinfo(skb)->frags[f]),
5750                                       adapter->tx_fifo_limit);
5751 
5752         if (adapter->hw.mac.tx_pkt_filtering)
5753                 e1000_transfer_dhcp_info(adapter, skb);
5754 
5755         /* need: count + 2 desc gap to keep tail from touching
5756          * head, otherwise try next time
5757          */
5758         if (e1000_maybe_stop_tx(tx_ring, count + 2))
5759                 return NETDEV_TX_BUSY;
5760 
5761         if (skb_vlan_tag_present(skb)) {
5762                 tx_flags |= E1000_TX_FLAGS_VLAN;
5763                 tx_flags |= (skb_vlan_tag_get(skb) <<
5764                              E1000_TX_FLAGS_VLAN_SHIFT);
5765         }
5766 
5767         first = tx_ring->next_to_use;
5768 
5769         tso = e1000_tso(tx_ring, skb, protocol);
5770         if (tso < 0) {
5771                 dev_kfree_skb_any(skb);
5772                 return NETDEV_TX_OK;
5773         }
5774 
5775         if (tso)
5776                 tx_flags |= E1000_TX_FLAGS_TSO;
5777         else if (e1000_tx_csum(tx_ring, skb, protocol))
5778                 tx_flags |= E1000_TX_FLAGS_CSUM;
5779 
5780         /* Old method was to assume IPv4 packet by default if TSO was enabled.
5781          * 82571 hardware supports TSO capabilities for IPv6 as well...
5782          * no longer assume, we must.
5783          */
5784         if (protocol == htons(ETH_P_IP))
5785                 tx_flags |= E1000_TX_FLAGS_IPV4;
5786 
5787         if (unlikely(skb->no_fcs))
5788                 tx_flags |= E1000_TX_FLAGS_NO_FCS;
5789 
5790         /* if count is 0 then mapping error has occurred */
5791         count = e1000_tx_map(tx_ring, skb, first, adapter->tx_fifo_limit,
5792                              nr_frags);
5793         if (count) {
5794                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP) &&
5795                     (adapter->flags & FLAG_HAS_HW_TIMESTAMP) &&
5796                     !adapter->tx_hwtstamp_skb) {
5797                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
5798                         tx_flags |= E1000_TX_FLAGS_HWTSTAMP;
5799                         adapter->tx_hwtstamp_skb = skb_get(skb);
5800                         adapter->tx_hwtstamp_start = jiffies;
5801                         schedule_work(&adapter->tx_hwtstamp_work);
5802                 } else {
5803                         skb_tx_timestamp(skb);
5804                 }
5805 
5806                 netdev_sent_queue(netdev, skb->len);
5807                 e1000_tx_queue(tx_ring, tx_flags, count);
5808                 /* Make sure there is space in the ring for the next send. */
5809                 e1000_maybe_stop_tx(tx_ring,
5810                                     (MAX_SKB_FRAGS *
5811                                      DIV_ROUND_UP(PAGE_SIZE,
5812                                                   adapter->tx_fifo_limit) + 2));
5813 
5814                 if (!skb->xmit_more ||
5815                     netif_xmit_stopped(netdev_get_tx_queue(netdev, 0))) {
5816                         if (adapter->flags2 & FLAG2_PCIM2PCI_ARBITER_WA)
5817                                 e1000e_update_tdt_wa(tx_ring,
5818                                                      tx_ring->next_to_use);
5819                         else
5820                                 writel(tx_ring->next_to_use, tx_ring->tail);
5821 
5822                         /* we need this if more than one processor can write
5823                          * to our tail at a time, it synchronizes IO on
5824                          *IA64/Altix systems
5825                          */
5826                         mmiowb();
5827                 }
5828         } else {
5829                 dev_kfree_skb_any(skb);
5830                 tx_ring->buffer_info[first].time_stamp = 0;
5831                 tx_ring->next_to_use = first;
5832         }
5833 
5834         return NETDEV_TX_OK;
5835 }
5836 
5837 /**
5838  * e1000_tx_timeout - Respond to a Tx Hang
5839  * @netdev: network interface device structure
5840  **/
5841 static void e1000_tx_timeout(struct net_device *netdev)
5842 {
5843         struct e1000_adapter *adapter = netdev_priv(netdev);
5844 
5845         /* Do the reset outside of interrupt context */
5846         adapter->tx_timeout_count++;
5847         schedule_work(&adapter->reset_task);
5848 }
5849 
5850 static void e1000_reset_task(struct work_struct *work)
5851 {
5852         struct e1000_adapter *adapter;
5853         adapter = container_of(work, struct e1000_adapter, reset_task);
5854 
5855         /* don't run the task if already down */
5856         if (test_bit(__E1000_DOWN, &adapter->state))
5857                 return;
5858 
5859         if (!(adapter->flags & FLAG_RESTART_NOW)) {
5860                 e1000e_dump(adapter);
5861                 e_err("Reset adapter unexpectedly\n");
5862         }
5863         e1000e_reinit_locked(adapter);
5864 }
5865 
5866 /**
5867  * e1000_get_stats64 - Get System Network Statistics
5868  * @netdev: network interface device structure
5869  * @stats: rtnl_link_stats64 pointer
5870  *
5871  * Returns the address of the device statistics structure.
5872  **/
5873 struct rtnl_link_stats64 *e1000e_get_stats64(struct net_device *netdev,
5874                                              struct rtnl_link_stats64 *stats)
5875 {
5876         struct e1000_adapter *adapter = netdev_priv(netdev);
5877 
5878         memset(stats, 0, sizeof(struct rtnl_link_stats64));
5879         spin_lock(&adapter->stats64_lock);
5880         e1000e_update_stats(adapter);
5881         /* Fill out the OS statistics structure */
5882         stats->rx_bytes = adapter->stats.gorc;
5883         stats->rx_packets = adapter->stats.gprc;
5884         stats->tx_bytes = adapter->stats.gotc;
5885         stats->tx_packets = adapter->stats.gptc;
5886         stats->multicast = adapter->stats.mprc;
5887         stats->collisions = adapter->stats.colc;
5888 
5889         /* Rx Errors */
5890 
5891         /* RLEC on some newer hardware can be incorrect so build
5892          * our own version based on RUC and ROC
5893          */
5894         stats->rx_errors = adapter->stats.rxerrc +
5895             adapter->stats.crcerrs + adapter->stats.algnerrc +
5896             adapter->stats.ruc + adapter->stats.roc + adapter->stats.cexterr;
5897         stats->rx_length_errors = adapter->stats.ruc + adapter->stats.roc;
5898         stats->rx_crc_errors = adapter->stats.crcerrs;
5899         stats->rx_frame_errors = adapter->stats.algnerrc;
5900         stats->rx_missed_errors = adapter->stats.mpc;
5901 
5902         /* Tx Errors */
5903         stats->tx_errors = adapter->stats.ecol + adapter->stats.latecol;
5904         stats->tx_aborted_errors = adapter->stats.ecol;
5905         stats->tx_window_errors = adapter->stats.latecol;
5906         stats->tx_carrier_errors = adapter->stats.tncrs;
5907 
5908         /* Tx Dropped needs to be maintained elsewhere */
5909 
5910         spin_unlock(&adapter->stats64_lock);
5911         return stats;
5912 }
5913 
5914 /**
5915  * e1000_change_mtu - Change the Maximum Transfer Unit
5916  * @netdev: network interface device structure
5917  * @new_mtu: new value for maximum frame size
5918  *
5919  * Returns 0 on success, negative on failure
5920  **/
5921 static int e1000_change_mtu(struct net_device *netdev, int new_mtu)
5922 {
5923         struct e1000_adapter *adapter = netdev_priv(netdev);
5924         int max_frame = new_mtu + VLAN_ETH_HLEN + ETH_FCS_LEN;
5925 
5926         /* Jumbo frame support */
5927         if ((max_frame > (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN)) &&
5928             !(adapter->flags & FLAG_HAS_JUMBO_FRAMES)) {
5929                 e_err("Jumbo Frames not supported.\n");
5930                 return -EINVAL;
5931         }
5932 
5933         /* Supported frame sizes */
5934         if ((new_mtu < (VLAN_ETH_ZLEN + ETH_FCS_LEN)) ||
5935             (max_frame > adapter->max_hw_frame_size)) {
5936                 e_err("Unsupported MTU setting\n");
5937                 return -EINVAL;
5938         }
5939 
5940         /* Jumbo frame workaround on 82579 and newer requires CRC be stripped */
5941         if ((adapter->hw.mac.type >= e1000_pch2lan) &&
5942             !(adapter->flags2 & FLAG2_CRC_STRIPPING) &&
5943             (new_mtu > ETH_DATA_LEN)) {
5944                 e_err("Jumbo Frames not supported on this device when CRC stripping is disabled.\n");
5945                 return -EINVAL;
5946         }
5947 
5948         while (test_and_set_bit(__E1000_RESETTING, &adapter->state))
5949                 usleep_range(1000, 2000);
5950         /* e1000e_down -> e1000e_reset dependent on max_frame_size & mtu */
5951         adapter->max_frame_size = max_frame;
5952         e_info("changing MTU from %d to %d\n", netdev->mtu, new_mtu);
5953         netdev->mtu = new_mtu;
5954 
5955         pm_runtime_get_sync(netdev->dev.parent);
5956 
5957         if (netif_running(netdev))
5958                 e1000e_down(adapter, true);
5959 
5960         /* NOTE: netdev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
5961          * means we reserve 2 more, this pushes us to allocate from the next
5962          * larger slab size.
5963          * i.e. RXBUFFER_2048 --> size-4096 slab
5964          * However with the new *_jumbo_rx* routines, jumbo receives will use
5965          * fragmented skbs
5966          */
5967 
5968         if (max_frame <= 2048)
5969                 adapter->rx_buffer_len = 2048;
5970         else
5971                 adapter->rx_buffer_len = 4096;
5972 
5973         /* adjust allocation if LPE protects us, and we aren't using SBP */
5974         if (max_frame <= (VLAN_ETH_FRAME_LEN + ETH_FCS_LEN))
5975                 adapter->rx_buffer_len = VLAN_ETH_FRAME_LEN + ETH_FCS_LEN;
5976 
5977         if (netif_running(netdev))
5978                 e1000e_up(adapter);
5979         else
5980                 e1000e_reset(adapter);
5981 
5982         pm_runtime_put_sync(netdev->dev.parent);
5983 
5984         clear_bit(__E1000_RESETTING, &adapter->state);
5985 
5986         return 0;
5987 }
5988 
5989 static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
5990                            int cmd)
5991 {
5992         struct e1000_adapter *adapter = netdev_priv(netdev);
5993         struct mii_ioctl_data *data = if_mii(ifr);
5994 
5995         if (adapter->hw.phy.media_type != e1000_media_type_copper)
5996                 return -EOPNOTSUPP;
5997 
5998         switch (cmd) {
5999         case SIOCGMIIPHY:
6000                 data->phy_id = adapter->hw.phy.addr;
6001                 break;
6002         case SIOCGMIIREG:
6003                 e1000_phy_read_status(adapter);
6004 
6005                 switch (data->reg_num & 0x1F) {
6006                 case MII_BMCR:
6007                         data->val_out = adapter->phy_regs.bmcr;
6008                         break;
6009                 case MII_BMSR:
6010                         data->val_out = adapter->phy_regs.bmsr;
6011                         break;
6012                 case MII_PHYSID1:
6013                         data->val_out = (adapter->hw.phy.id >> 16);
6014                         break;
6015                 case MII_PHYSID2:
6016                         data->val_out = (adapter->hw.phy.id & 0xFFFF);
6017                         break;
6018                 case MII_ADVERTISE:
6019                         data->val_out = adapter->phy_regs.advertise;
6020                         break;
6021                 case MII_LPA:
6022                         data->val_out = adapter->phy_regs.lpa;
6023                         break;
6024                 case MII_EXPANSION:
6025                         data->val_out = adapter->phy_regs.expansion;
6026                         break;
6027                 case MII_CTRL1000:
6028                         data->val_out = adapter->phy_regs.ctrl1000;
6029                         break;
6030                 case MII_STAT1000:
6031                         data->val_out = adapter->phy_regs.stat1000;
6032                         break;
6033                 case MII_ESTATUS:
6034                         data->val_out = adapter->phy_regs.estatus;
6035                         break;
6036                 default:
6037                         return -EIO;
6038                 }
6039                 break;
6040         case SIOCSMIIREG:
6041         default:
6042                 return -EOPNOTSUPP;
6043         }
6044         return 0;
6045 }
6046 
6047 /**
6048  * e1000e_hwtstamp_ioctl - control hardware time stamping
6049  * @netdev: network interface device structure
6050  * @ifreq: interface request
6051  *
6052  * Outgoing time stamping can be enabled and disabled. Play nice and
6053  * disable it when requested, although it shouldn't cause any overhead
6054  * when no packet needs it. At most one packet in the queue may be
6055  * marked for time stamping, otherwise it would be impossible to tell
6056  * for sure to which packet the hardware time stamp belongs.
6057  *
6058  * Incoming time stamping has to be configured via the hardware filters.
6059  * Not all combinations are supported, in particular event type has to be
6060  * specified. Matching the kind of event packet is not supported, with the
6061  * exception of "all V2 events regardless of level 2 or 4".
6062  **/
6063 static int e1000e_hwtstamp_set(struct net_device *netdev, struct ifreq *ifr)
6064 {
6065         struct e1000_adapter *adapter = netdev_priv(netdev);
6066         struct hwtstamp_config config;
6067         int ret_val;
6068 
6069         if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
6070                 return -EFAULT;
6071 
6072         ret_val = e1000e_config_hwtstamp(adapter, &config);
6073         if (ret_val)
6074                 return ret_val;
6075 
6076         switch (config.rx_filter) {
6077         case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
6078         case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
6079         case HWTSTAMP_FILTER_PTP_V2_SYNC:
6080         case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
6081         case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
6082         case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
6083                 /* With V2 type filters which specify a Sync or Delay Request,
6084                  * Path Delay Request/Response messages are also time stamped
6085                  * by hardware so notify the caller the requested packets plus
6086                  * some others are time stamped.
6087                  */
6088                 config.rx_filter = HWTSTAMP_FILTER_SOME;
6089                 break;
6090         default:
6091                 break;
6092         }
6093 
6094         return copy_to_user(ifr->ifr_data, &config,
6095                             sizeof(config)) ? -EFAULT : 0;
6096 }
6097 
6098 static int e1000e_hwtstamp_get(struct net_device *netdev, struct ifreq *ifr)
6099 {
6100         struct e1000_adapter *adapter = netdev_priv(netdev);
6101 
6102         return copy_to_user(ifr->ifr_data, &adapter->hwtstamp_config,
6103                             sizeof(adapter->hwtstamp_config)) ? -EFAULT : 0;
6104 }
6105 
6106 static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
6107 {
6108         switch (cmd) {
6109         case SIOCGMIIPHY:
6110         case SIOCGMIIREG:
6111         case SIOCSMIIREG:
6112                 return e1000_mii_ioctl(netdev, ifr, cmd);
6113         case SIOCSHWTSTAMP:
6114                 return e1000e_hwtstamp_set(netdev, ifr);
6115         case SIOCGHWTSTAMP:
6116                 return e1000e_hwtstamp_get(netdev, ifr);
6117         default:
6118                 return -EOPNOTSUPP;
6119         }
6120 }
6121 
6122 static int e1000_init_phy_wakeup(struct e1000_adapter *adapter, u32 wufc)
6123 {
6124         struct e1000_hw *hw = &adapter->hw;
6125         u32 i, mac_reg, wuc;
6126         u16 phy_reg, wuc_enable;
6127         int retval;
6128 
6129         /* copy MAC RARs to PHY RARs */
6130         e1000_copy_rx_addrs_to_phy_ich8lan(hw);
6131 
6132         retval = hw->phy.ops.acquire(hw);
6133         if (retval) {
6134                 e_err("Could not acquire PHY\n");
6135                 return retval;
6136         }
6137 
6138         /* Enable access to wakeup registers on and set page to BM_WUC_PAGE */
6139         retval = e1000_enable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6140         if (retval)
6141                 goto release;
6142 
6143         /* copy MAC MTA to PHY MTA - only needed for pchlan */
6144         for (i = 0; i < adapter->hw.mac.mta_reg_count; i++) {
6145                 mac_reg = E1000_READ_REG_ARRAY(hw, E1000_MTA, i);
6146                 hw->phy.ops.write_reg_page(hw, BM_MTA(i),
6147                                            (u16)(mac_reg & 0xFFFF));
6148                 hw->phy.ops.write_reg_page(hw, BM_MTA(i) + 1,
6149                                            (u16)((mac_reg >> 16) & 0xFFFF));
6150         }
6151 
6152         /* configure PHY Rx Control register */
6153         hw->phy.ops.read_reg_page(&adapter->hw, BM_RCTL, &phy_reg);
6154         mac_reg = er32(RCTL);
6155         if (mac_reg & E1000_RCTL_UPE)
6156                 phy_reg |= BM_RCTL_UPE;
6157         if (mac_reg & E1000_RCTL_MPE)
6158                 phy_reg |= BM_RCTL_MPE;
6159         phy_reg &= ~(BM_RCTL_MO_MASK);
6160         if (mac_reg & E1000_RCTL_MO_3)
6161                 phy_reg |= (((mac_reg & E1000_RCTL_MO_3) >> E1000_RCTL_MO_SHIFT)
6162                             << BM_RCTL_MO_SHIFT);
6163         if (mac_reg & E1000_RCTL_BAM)
6164                 phy_reg |= BM_RCTL_BAM;
6165         if (mac_reg & E1000_RCTL_PMCF)
6166                 phy_reg |= BM_RCTL_PMCF;
6167         mac_reg = er32(CTRL);
6168         if (mac_reg & E1000_CTRL_RFCE)
6169                 phy_reg |= BM_RCTL_RFCE;
6170         hw->phy.ops.write_reg_page(&adapter->hw, BM_RCTL, phy_reg);
6171 
6172         wuc = E1000_WUC_PME_EN;
6173         if (wufc & (E1000_WUFC_MAG | E1000_WUFC_LNKC))
6174                 wuc |= E1000_WUC_APME;
6175 
6176         /* enable PHY wakeup in MAC register */
6177         ew32(WUFC, wufc);
6178         ew32(WUC, (E1000_WUC_PHY_WAKE | E1000_WUC_APMPME |
6179                    E1000_WUC_PME_STATUS | wuc));
6180 
6181         /* configure and enable PHY wakeup in PHY registers */
6182         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUFC, wufc);
6183         hw->phy.ops.write_reg_page(&adapter->hw, BM_WUC, wuc);
6184 
6185         /* activate PHY wakeup */
6186         wuc_enable |= BM_WUC_ENABLE_BIT | BM_WUC_HOST_WU_BIT;
6187         retval = e1000_disable_phy_wakeup_reg_access_bm(hw, &wuc_enable);
6188         if (retval)
6189                 e_err("Could not set PHY Host Wakeup bit\n");
6190 release:
6191         hw->phy.ops.release(hw);
6192 
6193         return retval;
6194 }
6195 
6196 static void e1000e_flush_lpic(struct pci_dev *pdev)
6197 {
6198         struct net_device *netdev = pci_get_drvdata(pdev);
6199         struct e1000_adapter *adapter = netdev_priv(netdev);
6200         struct e1000_hw *hw = &adapter->hw;
6201         u32 ret_val;
6202 
6203         pm_runtime_get_sync(netdev->dev.parent);
6204 
6205         ret_val = hw->phy.ops.acquire(hw);
6206         if (ret_val)
6207                 goto fl_out;
6208 
6209         pr_info("EEE TX LPI TIMER: %08X\n",
6210                 er32(LPIC) >> E1000_LPIC_LPIET_SHIFT);
6211 
6212         hw->phy.ops.release(hw);
6213 
6214 fl_out:
6215         pm_runtime_put_sync(netdev->dev.parent);
6216 }
6217 
6218 static int e1000e_pm_freeze(struct device *dev)
6219 {
6220         struct net_device *netdev = pci_get_drvdata(to_pci_dev(dev));
6221         struct e1000_adapter *adapter = netdev_priv(netdev);
6222 
6223         netif_device_detach(netdev);
6224 
6225         if (netif_running(netdev)) {
6226                 int count = E1000_CHECK_RESET_COUNT;
6227 
6228                 while (test_bit(__E1000_RESETTING, &adapter->state) && count--)
6229                         usleep_range(10000, 20000);
6230 
6231                 WARN_ON(test_bit(__E1000_RESETTING, &adapter->state));
6232 
6233                 /* Quiesce the device without resetting the hardware */
6234                 e1000e_down(adapter, false);
6235                 e1000_free_irq(adapter);
6236         }
6237         e1000e_reset_interrupt_capability(adapter);
6238 
6239         /* Allow time for pending master requests to run */
6240         e1000e_disable_pcie_master(&adapter->hw);
6241 
6242         return 0;
6243 }
6244 
6245 static int __e1000_shutdown(struct pci_dev *pdev, bool runtime)
6246 {
6247         struct net_device *netdev = pci_get_drvdata(pdev);
6248         struct e1000_adapter *adapter = netdev_priv(netdev);
6249         struct e1000_hw *hw = &adapter->hw;
6250         u32 ctrl, ctrl_ext, rctl, status;
6251         /* Runtime suspend should only enable wakeup for link changes */
6252         u32 wufc = runtime ? E1000_WUFC_LNKC : adapter->wol;
6253         int retval = 0;
6254 
6255         status = er32(STATUS);
6256         if (status & E1000_STATUS_LU)
6257                 wufc &= ~E1000_WUFC_LNKC;
6258 
6259         if (wufc) {
6260                 e1000_setup_rctl(adapter);
6261                 e1000e_set_rx_mode(netdev);
6262 
6263                 /* turn on all-multi mode if wake on multicast is enabled */
6264                 if (wufc & E1000_WUFC_MC) {
6265                         rctl = er32(RCTL);
6266                         rctl |= E1000_RCTL_MPE;
6267                         ew32(RCTL, rctl);
6268                 }
6269 
6270                 ctrl = er32(CTRL);
6271                 ctrl |= E1000_CTRL_ADVD3WUC;
6272                 if (!(adapter->flags2 & FLAG2_HAS_PHY_WAKEUP))
6273                         ctrl |= E1000_CTRL_EN_PHY_PWR_MGMT;
6274                 ew32(CTRL, ctrl);
6275 
6276                 if (adapter->hw.phy.media_type == e1000_media_type_fiber ||
6277                     adapter->hw.phy.media_type ==
6278                     e1000_media_type_internal_serdes) {
6279                         /* keep the laser running in D3 */
6280                         ctrl_ext = er32(CTRL_EXT);
6281                         ctrl_ext |= E1000_CTRL_EXT_SDP3_DATA;
6282                         ew32(CTRL_EXT, ctrl_ext);
6283                 }
6284 
6285                 if (!runtime)
6286                         e1000e_power_up_phy(adapter);
6287 
6288                 if (adapter->flags & FLAG_IS_ICH)
6289                         e1000_suspend_workarounds_ich8lan(&adapter->hw);
6290 
6291                 if (adapter->flags2 & FLAG2_HAS_PHY_WAKEUP) {
6292                         /* enable wakeup by the PHY */
6293                         retval = e1000_init_phy_wakeup(adapter, wufc);
6294                         if (retval)
6295                                 return retval;
6296                 } else {
6297                         /* enable wakeup by the MAC */
6298                         ew32(WUFC, wufc);
6299                         ew32(WUC, E1000_WUC_PME_EN);
6300                 }
6301         } else {
6302                 ew32(WUC, 0);
6303                 ew32(WUFC, 0);
6304 
6305                 e1000_power_down_phy(adapter);
6306         }
6307 
6308         if (adapter->hw.phy.type == e1000_phy_igp_3) {
6309                 e1000e_igp3_phy_powerdown_workaround_ich8lan(&adapter->hw);
6310         } else if ((hw->mac.type == e1000_pch_lpt) ||
6311                    (hw->mac.type == e1000_pch_spt)) {
6312                 if (!(wufc & (E1000_WUFC_EX | E1000_WUFC_MC | E1000_WUFC_BC)))
6313                         /* ULP does not support wake from unicast, multicast
6314                          * or broadcast.
6315                          */
6316                         retval = e1000_enable_ulp_lpt_lp(hw, !runtime);
6317 
6318                 if (retval)
6319                         return retval;
6320         }
6321 
6322         /* Ensure that the appropriate bits are set in LPI_CTRL
6323          * for EEE in Sx