Version:  2.0.40 2.2.26 2.4.37 2.6.39 3.0 3.1 3.2 3.3 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15

Linux/drivers/net/ethernet/ibm/emac/core.c

  1 /*
  2  * drivers/net/ethernet/ibm/emac/core.c
  3  *
  4  * Driver for PowerPC 4xx on-chip ethernet controller.
  5  *
  6  * Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
  7  *                <benh@kernel.crashing.org>
  8  *
  9  * Based on the arch/ppc version of the driver:
 10  *
 11  * Copyright (c) 2004, 2005 Zultys Technologies.
 12  * Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>
 13  *
 14  * Based on original work by
 15  *      Matt Porter <mporter@kernel.crashing.org>
 16  *      (c) 2003 Benjamin Herrenschmidt <benh@kernel.crashing.org>
 17  *      Armin Kuster <akuster@mvista.com>
 18  *      Johnnie Peters <jpeters@mvista.com>
 19  *
 20  * This program is free software; you can redistribute  it and/or modify it
 21  * under  the terms of  the GNU General  Public License as published by the
 22  * Free Software Foundation;  either version 2 of the  License, or (at your
 23  * option) any later version.
 24  *
 25  */
 26 
 27 #include <linux/module.h>
 28 #include <linux/sched.h>
 29 #include <linux/string.h>
 30 #include <linux/errno.h>
 31 #include <linux/delay.h>
 32 #include <linux/types.h>
 33 #include <linux/pci.h>
 34 #include <linux/etherdevice.h>
 35 #include <linux/skbuff.h>
 36 #include <linux/crc32.h>
 37 #include <linux/ethtool.h>
 38 #include <linux/mii.h>
 39 #include <linux/bitops.h>
 40 #include <linux/workqueue.h>
 41 #include <linux/of.h>
 42 #include <linux/of_address.h>
 43 #include <linux/of_irq.h>
 44 #include <linux/of_net.h>
 45 #include <linux/slab.h>
 46 
 47 #include <asm/processor.h>
 48 #include <asm/io.h>
 49 #include <asm/dma.h>
 50 #include <asm/uaccess.h>
 51 #include <asm/dcr.h>
 52 #include <asm/dcr-regs.h>
 53 
 54 #include "core.h"
 55 
 56 /*
 57  * Lack of dma_unmap_???? calls is intentional.
 58  *
 59  * API-correct usage requires additional support state information to be
 60  * maintained for every RX and TX buffer descriptor (BD). Unfortunately, due to
 61  * EMAC design (e.g. TX buffer passed from network stack can be split into
 62  * several BDs, dma_map_single/dma_map_page can be used to map particular BD),
 63  * maintaining such information will add additional overhead.
 64  * Current DMA API implementation for 4xx processors only ensures cache coherency
 65  * and dma_unmap_???? routines are empty and are likely to stay this way.
 66  * I decided to omit dma_unmap_??? calls because I don't want to add additional
 67  * complexity just for the sake of following some abstract API, when it doesn't
 68  * add any real benefit to the driver. I understand that this decision maybe
 69  * controversial, but I really tried to make code API-correct and efficient
 70  * at the same time and didn't come up with code I liked :(.                --ebs
 71  */
 72 
 73 #define DRV_NAME        "emac"
 74 #define DRV_VERSION     "3.54"
 75 #define DRV_DESC        "PPC 4xx OCP EMAC driver"
 76 
 77 MODULE_DESCRIPTION(DRV_DESC);
 78 MODULE_AUTHOR
 79     ("Eugene Surovegin <eugene.surovegin@zultys.com> or <ebs@ebshome.net>");
 80 MODULE_LICENSE("GPL");
 81 
 82 /*
 83  * PPC64 doesn't (yet) have a cacheable_memcpy
 84  */
 85 #ifdef CONFIG_PPC64
 86 #define cacheable_memcpy(d,s,n) memcpy((d),(s),(n))
 87 #endif
 88 
 89 /* minimum number of free TX descriptors required to wake up TX process */
 90 #define EMAC_TX_WAKEUP_THRESH           (NUM_TX_BUFF / 4)
 91 
 92 /* If packet size is less than this number, we allocate small skb and copy packet
 93  * contents into it instead of just sending original big skb up
 94  */
 95 #define EMAC_RX_COPY_THRESH             CONFIG_IBM_EMAC_RX_COPY_THRESHOLD
 96 
 97 /* Since multiple EMACs share MDIO lines in various ways, we need
 98  * to avoid re-using the same PHY ID in cases where the arch didn't
 99  * setup precise phy_map entries
100  *
101  * XXX This is something that needs to be reworked as we can have multiple
102  * EMAC "sets" (multiple ASICs containing several EMACs) though we can
103  * probably require in that case to have explicit PHY IDs in the device-tree
104  */
105 static u32 busy_phy_map;
106 static DEFINE_MUTEX(emac_phy_map_lock);
107 
108 /* This is the wait queue used to wait on any event related to probe, that
109  * is discovery of MALs, other EMACs, ZMII/RGMIIs, etc...
110  */
111 static DECLARE_WAIT_QUEUE_HEAD(emac_probe_wait);
112 
113 /* Having stable interface names is a doomed idea. However, it would be nice
114  * if we didn't have completely random interface names at boot too :-) It's
115  * just a matter of making everybody's life easier. Since we are doing
116  * threaded probing, it's a bit harder though. The base idea here is that
117  * we make up a list of all emacs in the device-tree before we register the
118  * driver. Every emac will then wait for the previous one in the list to
119  * initialize before itself. We should also keep that list ordered by
120  * cell_index.
121  * That list is only 4 entries long, meaning that additional EMACs don't
122  * get ordering guarantees unless EMAC_BOOT_LIST_SIZE is increased.
123  */
124 
125 #define EMAC_BOOT_LIST_SIZE     4
126 static struct device_node *emac_boot_list[EMAC_BOOT_LIST_SIZE];
127 
128 /* How long should I wait for dependent devices ? */
129 #define EMAC_PROBE_DEP_TIMEOUT  (HZ * 5)
130 
131 /* I don't want to litter system log with timeout errors
132  * when we have brain-damaged PHY.
133  */
134 static inline void emac_report_timeout_error(struct emac_instance *dev,
135                                              const char *error)
136 {
137         if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX |
138                                   EMAC_FTR_460EX_PHY_CLK_FIX |
139                                   EMAC_FTR_440EP_PHY_CLK_FIX))
140                 DBG(dev, "%s" NL, error);
141         else if (net_ratelimit())
142                 printk(KERN_ERR "%s: %s\n", dev->ofdev->dev.of_node->full_name,
143                         error);
144 }
145 
146 /* EMAC PHY clock workaround:
147  * 440EP/440GR has more sane SDR0_MFR register implementation than 440GX,
148  * which allows controlling each EMAC clock
149  */
150 static inline void emac_rx_clk_tx(struct emac_instance *dev)
151 {
152 #ifdef CONFIG_PPC_DCR_NATIVE
153         if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
154                 dcri_clrset(SDR0, SDR0_MFR,
155                             0, SDR0_MFR_ECS >> dev->cell_index);
156 #endif
157 }
158 
159 static inline void emac_rx_clk_default(struct emac_instance *dev)
160 {
161 #ifdef CONFIG_PPC_DCR_NATIVE
162         if (emac_has_feature(dev, EMAC_FTR_440EP_PHY_CLK_FIX))
163                 dcri_clrset(SDR0, SDR0_MFR,
164                             SDR0_MFR_ECS >> dev->cell_index, 0);
165 #endif
166 }
167 
168 /* PHY polling intervals */
169 #define PHY_POLL_LINK_ON        HZ
170 #define PHY_POLL_LINK_OFF       (HZ / 5)
171 
172 /* Graceful stop timeouts in us.
173  * We should allow up to 1 frame time (full-duplex, ignoring collisions)
174  */
175 #define STOP_TIMEOUT_10         1230
176 #define STOP_TIMEOUT_100        124
177 #define STOP_TIMEOUT_1000       13
178 #define STOP_TIMEOUT_1000_JUMBO 73
179 
180 static unsigned char default_mcast_addr[] = {
181         0x01, 0x80, 0xC2, 0x00, 0x00, 0x01
182 };
183 
184 /* Please, keep in sync with struct ibm_emac_stats/ibm_emac_error_stats */
185 static const char emac_stats_keys[EMAC_ETHTOOL_STATS_COUNT][ETH_GSTRING_LEN] = {
186         "rx_packets", "rx_bytes", "tx_packets", "tx_bytes", "rx_packets_csum",
187         "tx_packets_csum", "tx_undo", "rx_dropped_stack", "rx_dropped_oom",
188         "rx_dropped_error", "rx_dropped_resize", "rx_dropped_mtu",
189         "rx_stopped", "rx_bd_errors", "rx_bd_overrun", "rx_bd_bad_packet",
190         "rx_bd_runt_packet", "rx_bd_short_event", "rx_bd_alignment_error",
191         "rx_bd_bad_fcs", "rx_bd_packet_too_long", "rx_bd_out_of_range",
192         "rx_bd_in_range", "rx_parity", "rx_fifo_overrun", "rx_overrun",
193         "rx_bad_packet", "rx_runt_packet", "rx_short_event",
194         "rx_alignment_error", "rx_bad_fcs", "rx_packet_too_long",
195         "rx_out_of_range", "rx_in_range", "tx_dropped", "tx_bd_errors",
196         "tx_bd_bad_fcs", "tx_bd_carrier_loss", "tx_bd_excessive_deferral",
197         "tx_bd_excessive_collisions", "tx_bd_late_collision",
198         "tx_bd_multple_collisions", "tx_bd_single_collision",
199         "tx_bd_underrun", "tx_bd_sqe", "tx_parity", "tx_underrun", "tx_sqe",
200         "tx_errors"
201 };
202 
203 static irqreturn_t emac_irq(int irq, void *dev_instance);
204 static void emac_clean_tx_ring(struct emac_instance *dev);
205 static void __emac_set_multicast_list(struct emac_instance *dev);
206 
207 static inline int emac_phy_supports_gige(int phy_mode)
208 {
209         return  phy_mode == PHY_MODE_GMII ||
210                 phy_mode == PHY_MODE_RGMII ||
211                 phy_mode == PHY_MODE_SGMII ||
212                 phy_mode == PHY_MODE_TBI ||
213                 phy_mode == PHY_MODE_RTBI;
214 }
215 
216 static inline int emac_phy_gpcs(int phy_mode)
217 {
218         return  phy_mode == PHY_MODE_SGMII ||
219                 phy_mode == PHY_MODE_TBI ||
220                 phy_mode == PHY_MODE_RTBI;
221 }
222 
223 static inline void emac_tx_enable(struct emac_instance *dev)
224 {
225         struct emac_regs __iomem *p = dev->emacp;
226         u32 r;
227 
228         DBG(dev, "tx_enable" NL);
229 
230         r = in_be32(&p->mr0);
231         if (!(r & EMAC_MR0_TXE))
232                 out_be32(&p->mr0, r | EMAC_MR0_TXE);
233 }
234 
235 static void emac_tx_disable(struct emac_instance *dev)
236 {
237         struct emac_regs __iomem *p = dev->emacp;
238         u32 r;
239 
240         DBG(dev, "tx_disable" NL);
241 
242         r = in_be32(&p->mr0);
243         if (r & EMAC_MR0_TXE) {
244                 int n = dev->stop_timeout;
245                 out_be32(&p->mr0, r & ~EMAC_MR0_TXE);
246                 while (!(in_be32(&p->mr0) & EMAC_MR0_TXI) && n) {
247                         udelay(1);
248                         --n;
249                 }
250                 if (unlikely(!n))
251                         emac_report_timeout_error(dev, "TX disable timeout");
252         }
253 }
254 
255 static void emac_rx_enable(struct emac_instance *dev)
256 {
257         struct emac_regs __iomem *p = dev->emacp;
258         u32 r;
259 
260         if (unlikely(test_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags)))
261                 goto out;
262 
263         DBG(dev, "rx_enable" NL);
264 
265         r = in_be32(&p->mr0);
266         if (!(r & EMAC_MR0_RXE)) {
267                 if (unlikely(!(r & EMAC_MR0_RXI))) {
268                         /* Wait if previous async disable is still in progress */
269                         int n = dev->stop_timeout;
270                         while (!(r = in_be32(&p->mr0) & EMAC_MR0_RXI) && n) {
271                                 udelay(1);
272                                 --n;
273                         }
274                         if (unlikely(!n))
275                                 emac_report_timeout_error(dev,
276                                                           "RX disable timeout");
277                 }
278                 out_be32(&p->mr0, r | EMAC_MR0_RXE);
279         }
280  out:
281         ;
282 }
283 
284 static void emac_rx_disable(struct emac_instance *dev)
285 {
286         struct emac_regs __iomem *p = dev->emacp;
287         u32 r;
288 
289         DBG(dev, "rx_disable" NL);
290 
291         r = in_be32(&p->mr0);
292         if (r & EMAC_MR0_RXE) {
293                 int n = dev->stop_timeout;
294                 out_be32(&p->mr0, r & ~EMAC_MR0_RXE);
295                 while (!(in_be32(&p->mr0) & EMAC_MR0_RXI) && n) {
296                         udelay(1);
297                         --n;
298                 }
299                 if (unlikely(!n))
300                         emac_report_timeout_error(dev, "RX disable timeout");
301         }
302 }
303 
304 static inline void emac_netif_stop(struct emac_instance *dev)
305 {
306         netif_tx_lock_bh(dev->ndev);
307         netif_addr_lock(dev->ndev);
308         dev->no_mcast = 1;
309         netif_addr_unlock(dev->ndev);
310         netif_tx_unlock_bh(dev->ndev);
311         dev->ndev->trans_start = jiffies;       /* prevent tx timeout */
312         mal_poll_disable(dev->mal, &dev->commac);
313         netif_tx_disable(dev->ndev);
314 }
315 
316 static inline void emac_netif_start(struct emac_instance *dev)
317 {
318         netif_tx_lock_bh(dev->ndev);
319         netif_addr_lock(dev->ndev);
320         dev->no_mcast = 0;
321         if (dev->mcast_pending && netif_running(dev->ndev))
322                 __emac_set_multicast_list(dev);
323         netif_addr_unlock(dev->ndev);
324         netif_tx_unlock_bh(dev->ndev);
325 
326         netif_wake_queue(dev->ndev);
327 
328         /* NOTE: unconditional netif_wake_queue is only appropriate
329          * so long as all callers are assured to have free tx slots
330          * (taken from tg3... though the case where that is wrong is
331          *  not terribly harmful)
332          */
333         mal_poll_enable(dev->mal, &dev->commac);
334 }
335 
336 static inline void emac_rx_disable_async(struct emac_instance *dev)
337 {
338         struct emac_regs __iomem *p = dev->emacp;
339         u32 r;
340 
341         DBG(dev, "rx_disable_async" NL);
342 
343         r = in_be32(&p->mr0);
344         if (r & EMAC_MR0_RXE)
345                 out_be32(&p->mr0, r & ~EMAC_MR0_RXE);
346 }
347 
348 static int emac_reset(struct emac_instance *dev)
349 {
350         struct emac_regs __iomem *p = dev->emacp;
351         int n = 20;
352 
353         DBG(dev, "reset" NL);
354 
355         if (!dev->reset_failed) {
356                 /* 40x erratum suggests stopping RX channel before reset,
357                  * we stop TX as well
358                  */
359                 emac_rx_disable(dev);
360                 emac_tx_disable(dev);
361         }
362 
363 #ifdef CONFIG_PPC_DCR_NATIVE
364         /*
365          * PPC460EX/GT Embedded Processor Advanced User's Manual
366          * section 28.10.1 Mode Register 0 (EMACx_MR0) states:
367          * Note: The PHY must provide a TX Clk in order to perform a soft reset
368          * of the EMAC. If none is present, select the internal clock
369          * (SDR0_ETH_CFG[EMACx_PHY_CLK] = 1).
370          * After a soft reset, select the external clock.
371          */
372         if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) {
373                 if (dev->phy_address == 0xffffffff &&
374                     dev->phy_map == 0xffffffff) {
375                         /* No PHY: select internal loop clock before reset */
376                         dcri_clrset(SDR0, SDR0_ETH_CFG,
377                                     0, SDR0_ETH_CFG_ECS << dev->cell_index);
378                 } else {
379                         /* PHY present: select external clock before reset */
380                         dcri_clrset(SDR0, SDR0_ETH_CFG,
381                                     SDR0_ETH_CFG_ECS << dev->cell_index, 0);
382                 }
383         }
384 #endif
385 
386         out_be32(&p->mr0, EMAC_MR0_SRST);
387         while ((in_be32(&p->mr0) & EMAC_MR0_SRST) && n)
388                 --n;
389 
390 #ifdef CONFIG_PPC_DCR_NATIVE
391         if (emac_has_feature(dev, EMAC_FTR_460EX_PHY_CLK_FIX)) {
392                 if (dev->phy_address == 0xffffffff &&
393                     dev->phy_map == 0xffffffff) {
394                         /* No PHY: restore external clock source after reset */
395                         dcri_clrset(SDR0, SDR0_ETH_CFG,
396                                     SDR0_ETH_CFG_ECS << dev->cell_index, 0);
397                 }
398         }
399 #endif
400 
401         if (n) {
402                 dev->reset_failed = 0;
403                 return 0;
404         } else {
405                 emac_report_timeout_error(dev, "reset timeout");
406                 dev->reset_failed = 1;
407                 return -ETIMEDOUT;
408         }
409 }
410 
411 static void emac_hash_mc(struct emac_instance *dev)
412 {
413         const int regs = EMAC_XAHT_REGS(dev);
414         u32 *gaht_base = emac_gaht_base(dev);
415         u32 gaht_temp[regs];
416         struct netdev_hw_addr *ha;
417         int i;
418 
419         DBG(dev, "hash_mc %d" NL, netdev_mc_count(dev->ndev));
420 
421         memset(gaht_temp, 0, sizeof (gaht_temp));
422 
423         netdev_for_each_mc_addr(ha, dev->ndev) {
424                 int slot, reg, mask;
425                 DBG2(dev, "mc %pM" NL, ha->addr);
426 
427                 slot = EMAC_XAHT_CRC_TO_SLOT(dev,
428                                              ether_crc(ETH_ALEN, ha->addr));
429                 reg = EMAC_XAHT_SLOT_TO_REG(dev, slot);
430                 mask = EMAC_XAHT_SLOT_TO_MASK(dev, slot);
431 
432                 gaht_temp[reg] |= mask;
433         }
434 
435         for (i = 0; i < regs; i++)
436                 out_be32(gaht_base + i, gaht_temp[i]);
437 }
438 
439 static inline u32 emac_iff2rmr(struct net_device *ndev)
440 {
441         struct emac_instance *dev = netdev_priv(ndev);
442         u32 r;
443 
444         r = EMAC_RMR_SP | EMAC_RMR_SFCS | EMAC_RMR_IAE | EMAC_RMR_BAE;
445 
446         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
447             r |= EMAC4_RMR_BASE;
448         else
449             r |= EMAC_RMR_BASE;
450 
451         if (ndev->flags & IFF_PROMISC)
452                 r |= EMAC_RMR_PME;
453         else if (ndev->flags & IFF_ALLMULTI ||
454                          (netdev_mc_count(ndev) > EMAC_XAHT_SLOTS(dev)))
455                 r |= EMAC_RMR_PMME;
456         else if (!netdev_mc_empty(ndev))
457                 r |= EMAC_RMR_MAE;
458 
459         if (emac_has_feature(dev, EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE)) {
460                 r &= ~EMAC4_RMR_MJS_MASK;
461                 r |= EMAC4_RMR_MJS(ndev->mtu);
462         }
463 
464         return r;
465 }
466 
467 static u32 __emac_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size)
468 {
469         u32 ret = EMAC_MR1_VLE | EMAC_MR1_IST | EMAC_MR1_TR0_MULT;
470 
471         DBG2(dev, "__emac_calc_base_mr1" NL);
472 
473         switch(tx_size) {
474         case 2048:
475                 ret |= EMAC_MR1_TFS_2K;
476                 break;
477         default:
478                 printk(KERN_WARNING "%s: Unknown Tx FIFO size %d\n",
479                        dev->ndev->name, tx_size);
480         }
481 
482         switch(rx_size) {
483         case 16384:
484                 ret |= EMAC_MR1_RFS_16K;
485                 break;
486         case 4096:
487                 ret |= EMAC_MR1_RFS_4K;
488                 break;
489         default:
490                 printk(KERN_WARNING "%s: Unknown Rx FIFO size %d\n",
491                        dev->ndev->name, rx_size);
492         }
493 
494         return ret;
495 }
496 
497 static u32 __emac4_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size)
498 {
499         u32 ret = EMAC_MR1_VLE | EMAC_MR1_IST | EMAC4_MR1_TR |
500                 EMAC4_MR1_OBCI(dev->opb_bus_freq / 1000000);
501 
502         DBG2(dev, "__emac4_calc_base_mr1" NL);
503 
504         switch(tx_size) {
505         case 16384:
506                 ret |= EMAC4_MR1_TFS_16K;
507                 break;
508         case 4096:
509                 ret |= EMAC4_MR1_TFS_4K;
510                 break;
511         case 2048:
512                 ret |= EMAC4_MR1_TFS_2K;
513                 break;
514         default:
515                 printk(KERN_WARNING "%s: Unknown Tx FIFO size %d\n",
516                        dev->ndev->name, tx_size);
517         }
518 
519         switch(rx_size) {
520         case 16384:
521                 ret |= EMAC4_MR1_RFS_16K;
522                 break;
523         case 4096:
524                 ret |= EMAC4_MR1_RFS_4K;
525                 break;
526         case 2048:
527                 ret |= EMAC4_MR1_RFS_2K;
528                 break;
529         default:
530                 printk(KERN_WARNING "%s: Unknown Rx FIFO size %d\n",
531                        dev->ndev->name, rx_size);
532         }
533 
534         return ret;
535 }
536 
537 static u32 emac_calc_base_mr1(struct emac_instance *dev, int tx_size, int rx_size)
538 {
539         return emac_has_feature(dev, EMAC_FTR_EMAC4) ?
540                 __emac4_calc_base_mr1(dev, tx_size, rx_size) :
541                 __emac_calc_base_mr1(dev, tx_size, rx_size);
542 }
543 
544 static inline u32 emac_calc_trtr(struct emac_instance *dev, unsigned int size)
545 {
546         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
547                 return ((size >> 6) - 1) << EMAC_TRTR_SHIFT_EMAC4;
548         else
549                 return ((size >> 6) - 1) << EMAC_TRTR_SHIFT;
550 }
551 
552 static inline u32 emac_calc_rwmr(struct emac_instance *dev,
553                                  unsigned int low, unsigned int high)
554 {
555         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
556                 return (low << 22) | ( (high & 0x3ff) << 6);
557         else
558                 return (low << 23) | ( (high & 0x1ff) << 7);
559 }
560 
561 static int emac_configure(struct emac_instance *dev)
562 {
563         struct emac_regs __iomem *p = dev->emacp;
564         struct net_device *ndev = dev->ndev;
565         int tx_size, rx_size, link = netif_carrier_ok(dev->ndev);
566         u32 r, mr1 = 0;
567 
568         DBG(dev, "configure" NL);
569 
570         if (!link) {
571                 out_be32(&p->mr1, in_be32(&p->mr1)
572                          | EMAC_MR1_FDE | EMAC_MR1_ILE);
573                 udelay(100);
574         } else if (emac_reset(dev) < 0)
575                 return -ETIMEDOUT;
576 
577         if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
578                 tah_reset(dev->tah_dev);
579 
580         DBG(dev, " link = %d duplex = %d, pause = %d, asym_pause = %d\n",
581             link, dev->phy.duplex, dev->phy.pause, dev->phy.asym_pause);
582 
583         /* Default fifo sizes */
584         tx_size = dev->tx_fifo_size;
585         rx_size = dev->rx_fifo_size;
586 
587         /* No link, force loopback */
588         if (!link)
589                 mr1 = EMAC_MR1_FDE | EMAC_MR1_ILE;
590 
591         /* Check for full duplex */
592         else if (dev->phy.duplex == DUPLEX_FULL)
593                 mr1 |= EMAC_MR1_FDE | EMAC_MR1_MWSW_001;
594 
595         /* Adjust fifo sizes, mr1 and timeouts based on link speed */
596         dev->stop_timeout = STOP_TIMEOUT_10;
597         switch (dev->phy.speed) {
598         case SPEED_1000:
599                 if (emac_phy_gpcs(dev->phy.mode)) {
600                         mr1 |= EMAC_MR1_MF_1000GPCS | EMAC_MR1_MF_IPPA(
601                                 (dev->phy.gpcs_address != 0xffffffff) ?
602                                  dev->phy.gpcs_address : dev->phy.address);
603 
604                         /* Put some arbitrary OUI, Manuf & Rev IDs so we can
605                          * identify this GPCS PHY later.
606                          */
607                         out_be32(&p->u1.emac4.ipcr, 0xdeadbeef);
608                 } else
609                         mr1 |= EMAC_MR1_MF_1000;
610 
611                 /* Extended fifo sizes */
612                 tx_size = dev->tx_fifo_size_gige;
613                 rx_size = dev->rx_fifo_size_gige;
614 
615                 if (dev->ndev->mtu > ETH_DATA_LEN) {
616                         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
617                                 mr1 |= EMAC4_MR1_JPSM;
618                         else
619                                 mr1 |= EMAC_MR1_JPSM;
620                         dev->stop_timeout = STOP_TIMEOUT_1000_JUMBO;
621                 } else
622                         dev->stop_timeout = STOP_TIMEOUT_1000;
623                 break;
624         case SPEED_100:
625                 mr1 |= EMAC_MR1_MF_100;
626                 dev->stop_timeout = STOP_TIMEOUT_100;
627                 break;
628         default: /* make gcc happy */
629                 break;
630         }
631 
632         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
633                 rgmii_set_speed(dev->rgmii_dev, dev->rgmii_port,
634                                 dev->phy.speed);
635         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
636                 zmii_set_speed(dev->zmii_dev, dev->zmii_port, dev->phy.speed);
637 
638         /* on 40x erratum forces us to NOT use integrated flow control,
639          * let's hope it works on 44x ;)
640          */
641         if (!emac_has_feature(dev, EMAC_FTR_NO_FLOW_CONTROL_40x) &&
642             dev->phy.duplex == DUPLEX_FULL) {
643                 if (dev->phy.pause)
644                         mr1 |= EMAC_MR1_EIFC | EMAC_MR1_APP;
645                 else if (dev->phy.asym_pause)
646                         mr1 |= EMAC_MR1_APP;
647         }
648 
649         /* Add base settings & fifo sizes & program MR1 */
650         mr1 |= emac_calc_base_mr1(dev, tx_size, rx_size);
651         out_be32(&p->mr1, mr1);
652 
653         /* Set individual MAC address */
654         out_be32(&p->iahr, (ndev->dev_addr[0] << 8) | ndev->dev_addr[1]);
655         out_be32(&p->ialr, (ndev->dev_addr[2] << 24) |
656                  (ndev->dev_addr[3] << 16) | (ndev->dev_addr[4] << 8) |
657                  ndev->dev_addr[5]);
658 
659         /* VLAN Tag Protocol ID */
660         out_be32(&p->vtpid, 0x8100);
661 
662         /* Receive mode register */
663         r = emac_iff2rmr(ndev);
664         if (r & EMAC_RMR_MAE)
665                 emac_hash_mc(dev);
666         out_be32(&p->rmr, r);
667 
668         /* FIFOs thresholds */
669         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
670                 r = EMAC4_TMR1((dev->mal_burst_size / dev->fifo_entry_size) + 1,
671                                tx_size / 2 / dev->fifo_entry_size);
672         else
673                 r = EMAC_TMR1((dev->mal_burst_size / dev->fifo_entry_size) + 1,
674                               tx_size / 2 / dev->fifo_entry_size);
675         out_be32(&p->tmr1, r);
676         out_be32(&p->trtr, emac_calc_trtr(dev, tx_size / 2));
677 
678         /* PAUSE frame is sent when RX FIFO reaches its high-water mark,
679            there should be still enough space in FIFO to allow the our link
680            partner time to process this frame and also time to send PAUSE
681            frame itself.
682 
683            Here is the worst case scenario for the RX FIFO "headroom"
684            (from "The Switch Book") (100Mbps, without preamble, inter-frame gap):
685 
686            1) One maximum-length frame on TX                    1522 bytes
687            2) One PAUSE frame time                                64 bytes
688            3) PAUSE frame decode time allowance                   64 bytes
689            4) One maximum-length frame on RX                    1522 bytes
690            5) Round-trip propagation delay of the link (100Mb)    15 bytes
691            ----------
692            3187 bytes
693 
694            I chose to set high-water mark to RX_FIFO_SIZE / 4 (1024 bytes)
695            low-water mark  to RX_FIFO_SIZE / 8 (512 bytes)
696          */
697         r = emac_calc_rwmr(dev, rx_size / 8 / dev->fifo_entry_size,
698                            rx_size / 4 / dev->fifo_entry_size);
699         out_be32(&p->rwmr, r);
700 
701         /* Set PAUSE timer to the maximum */
702         out_be32(&p->ptr, 0xffff);
703 
704         /* IRQ sources */
705         r = EMAC_ISR_OVR | EMAC_ISR_BP | EMAC_ISR_SE |
706                 EMAC_ISR_ALE | EMAC_ISR_BFCS | EMAC_ISR_PTLE | EMAC_ISR_ORE |
707                 EMAC_ISR_IRE | EMAC_ISR_TE;
708         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
709             r |= EMAC4_ISR_TXPE | EMAC4_ISR_RXPE /* | EMAC4_ISR_TXUE |
710                                                   EMAC4_ISR_RXOE | */;
711         out_be32(&p->iser,  r);
712 
713         /* We need to take GPCS PHY out of isolate mode after EMAC reset */
714         if (emac_phy_gpcs(dev->phy.mode)) {
715                 if (dev->phy.gpcs_address != 0xffffffff)
716                         emac_mii_reset_gpcs(&dev->phy);
717                 else
718                         emac_mii_reset_phy(&dev->phy);
719         }
720 
721         return 0;
722 }
723 
724 static void emac_reinitialize(struct emac_instance *dev)
725 {
726         DBG(dev, "reinitialize" NL);
727 
728         emac_netif_stop(dev);
729         if (!emac_configure(dev)) {
730                 emac_tx_enable(dev);
731                 emac_rx_enable(dev);
732         }
733         emac_netif_start(dev);
734 }
735 
736 static void emac_full_tx_reset(struct emac_instance *dev)
737 {
738         DBG(dev, "full_tx_reset" NL);
739 
740         emac_tx_disable(dev);
741         mal_disable_tx_channel(dev->mal, dev->mal_tx_chan);
742         emac_clean_tx_ring(dev);
743         dev->tx_cnt = dev->tx_slot = dev->ack_slot = 0;
744 
745         emac_configure(dev);
746 
747         mal_enable_tx_channel(dev->mal, dev->mal_tx_chan);
748         emac_tx_enable(dev);
749         emac_rx_enable(dev);
750 }
751 
752 static void emac_reset_work(struct work_struct *work)
753 {
754         struct emac_instance *dev = container_of(work, struct emac_instance, reset_work);
755 
756         DBG(dev, "reset_work" NL);
757 
758         mutex_lock(&dev->link_lock);
759         if (dev->opened) {
760                 emac_netif_stop(dev);
761                 emac_full_tx_reset(dev);
762                 emac_netif_start(dev);
763         }
764         mutex_unlock(&dev->link_lock);
765 }
766 
767 static void emac_tx_timeout(struct net_device *ndev)
768 {
769         struct emac_instance *dev = netdev_priv(ndev);
770 
771         DBG(dev, "tx_timeout" NL);
772 
773         schedule_work(&dev->reset_work);
774 }
775 
776 
777 static inline int emac_phy_done(struct emac_instance *dev, u32 stacr)
778 {
779         int done = !!(stacr & EMAC_STACR_OC);
780 
781         if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT))
782                 done = !done;
783 
784         return done;
785 };
786 
787 static int __emac_mdio_read(struct emac_instance *dev, u8 id, u8 reg)
788 {
789         struct emac_regs __iomem *p = dev->emacp;
790         u32 r = 0;
791         int n, err = -ETIMEDOUT;
792 
793         mutex_lock(&dev->mdio_lock);
794 
795         DBG2(dev, "mdio_read(%02x,%02x)" NL, id, reg);
796 
797         /* Enable proper MDIO port */
798         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
799                 zmii_get_mdio(dev->zmii_dev, dev->zmii_port);
800         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
801                 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port);
802 
803         /* Wait for management interface to become idle */
804         n = 20;
805         while (!emac_phy_done(dev, in_be32(&p->stacr))) {
806                 udelay(1);
807                 if (!--n) {
808                         DBG2(dev, " -> timeout wait idle\n");
809                         goto bail;
810                 }
811         }
812 
813         /* Issue read command */
814         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
815                 r = EMAC4_STACR_BASE(dev->opb_bus_freq);
816         else
817                 r = EMAC_STACR_BASE(dev->opb_bus_freq);
818         if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT))
819                 r |= EMAC_STACR_OC;
820         if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR))
821                 r |= EMACX_STACR_STAC_READ;
822         else
823                 r |= EMAC_STACR_STAC_READ;
824         r |= (reg & EMAC_STACR_PRA_MASK)
825                 | ((id & EMAC_STACR_PCDA_MASK) << EMAC_STACR_PCDA_SHIFT);
826         out_be32(&p->stacr, r);
827 
828         /* Wait for read to complete */
829         n = 200;
830         while (!emac_phy_done(dev, (r = in_be32(&p->stacr)))) {
831                 udelay(1);
832                 if (!--n) {
833                         DBG2(dev, " -> timeout wait complete\n");
834                         goto bail;
835                 }
836         }
837 
838         if (unlikely(r & EMAC_STACR_PHYE)) {
839                 DBG(dev, "mdio_read(%02x, %02x) failed" NL, id, reg);
840                 err = -EREMOTEIO;
841                 goto bail;
842         }
843 
844         r = ((r >> EMAC_STACR_PHYD_SHIFT) & EMAC_STACR_PHYD_MASK);
845 
846         DBG2(dev, "mdio_read -> %04x" NL, r);
847         err = 0;
848  bail:
849         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
850                 rgmii_put_mdio(dev->rgmii_dev, dev->rgmii_port);
851         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
852                 zmii_put_mdio(dev->zmii_dev, dev->zmii_port);
853         mutex_unlock(&dev->mdio_lock);
854 
855         return err == 0 ? r : err;
856 }
857 
858 static void __emac_mdio_write(struct emac_instance *dev, u8 id, u8 reg,
859                               u16 val)
860 {
861         struct emac_regs __iomem *p = dev->emacp;
862         u32 r = 0;
863         int n, err = -ETIMEDOUT;
864 
865         mutex_lock(&dev->mdio_lock);
866 
867         DBG2(dev, "mdio_write(%02x,%02x,%04x)" NL, id, reg, val);
868 
869         /* Enable proper MDIO port */
870         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
871                 zmii_get_mdio(dev->zmii_dev, dev->zmii_port);
872         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
873                 rgmii_get_mdio(dev->rgmii_dev, dev->rgmii_port);
874 
875         /* Wait for management interface to be idle */
876         n = 20;
877         while (!emac_phy_done(dev, in_be32(&p->stacr))) {
878                 udelay(1);
879                 if (!--n) {
880                         DBG2(dev, " -> timeout wait idle\n");
881                         goto bail;
882                 }
883         }
884 
885         /* Issue write command */
886         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
887                 r = EMAC4_STACR_BASE(dev->opb_bus_freq);
888         else
889                 r = EMAC_STACR_BASE(dev->opb_bus_freq);
890         if (emac_has_feature(dev, EMAC_FTR_STACR_OC_INVERT))
891                 r |= EMAC_STACR_OC;
892         if (emac_has_feature(dev, EMAC_FTR_HAS_NEW_STACR))
893                 r |= EMACX_STACR_STAC_WRITE;
894         else
895                 r |= EMAC_STACR_STAC_WRITE;
896         r |= (reg & EMAC_STACR_PRA_MASK) |
897                 ((id & EMAC_STACR_PCDA_MASK) << EMAC_STACR_PCDA_SHIFT) |
898                 (val << EMAC_STACR_PHYD_SHIFT);
899         out_be32(&p->stacr, r);
900 
901         /* Wait for write to complete */
902         n = 200;
903         while (!emac_phy_done(dev, in_be32(&p->stacr))) {
904                 udelay(1);
905                 if (!--n) {
906                         DBG2(dev, " -> timeout wait complete\n");
907                         goto bail;
908                 }
909         }
910         err = 0;
911  bail:
912         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
913                 rgmii_put_mdio(dev->rgmii_dev, dev->rgmii_port);
914         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
915                 zmii_put_mdio(dev->zmii_dev, dev->zmii_port);
916         mutex_unlock(&dev->mdio_lock);
917 }
918 
919 static int emac_mdio_read(struct net_device *ndev, int id, int reg)
920 {
921         struct emac_instance *dev = netdev_priv(ndev);
922         int res;
923 
924         res = __emac_mdio_read((dev->mdio_instance &&
925                                 dev->phy.gpcs_address != id) ?
926                                 dev->mdio_instance : dev,
927                                (u8) id, (u8) reg);
928         return res;
929 }
930 
931 static void emac_mdio_write(struct net_device *ndev, int id, int reg, int val)
932 {
933         struct emac_instance *dev = netdev_priv(ndev);
934 
935         __emac_mdio_write((dev->mdio_instance &&
936                            dev->phy.gpcs_address != id) ?
937                            dev->mdio_instance : dev,
938                           (u8) id, (u8) reg, (u16) val);
939 }
940 
941 /* Tx lock BH */
942 static void __emac_set_multicast_list(struct emac_instance *dev)
943 {
944         struct emac_regs __iomem *p = dev->emacp;
945         u32 rmr = emac_iff2rmr(dev->ndev);
946 
947         DBG(dev, "__multicast %08x" NL, rmr);
948 
949         /* I decided to relax register access rules here to avoid
950          * full EMAC reset.
951          *
952          * There is a real problem with EMAC4 core if we use MWSW_001 bit
953          * in MR1 register and do a full EMAC reset.
954          * One TX BD status update is delayed and, after EMAC reset, it
955          * never happens, resulting in TX hung (it'll be recovered by TX
956          * timeout handler eventually, but this is just gross).
957          * So we either have to do full TX reset or try to cheat here :)
958          *
959          * The only required change is to RX mode register, so I *think* all
960          * we need is just to stop RX channel. This seems to work on all
961          * tested SoCs.                                                --ebs
962          *
963          * If we need the full reset, we might just trigger the workqueue
964          * and do it async... a bit nasty but should work --BenH
965          */
966         dev->mcast_pending = 0;
967         emac_rx_disable(dev);
968         if (rmr & EMAC_RMR_MAE)
969                 emac_hash_mc(dev);
970         out_be32(&p->rmr, rmr);
971         emac_rx_enable(dev);
972 }
973 
974 /* Tx lock BH */
975 static void emac_set_multicast_list(struct net_device *ndev)
976 {
977         struct emac_instance *dev = netdev_priv(ndev);
978 
979         DBG(dev, "multicast" NL);
980 
981         BUG_ON(!netif_running(dev->ndev));
982 
983         if (dev->no_mcast) {
984                 dev->mcast_pending = 1;
985                 return;
986         }
987         __emac_set_multicast_list(dev);
988 }
989 
990 static int emac_resize_rx_ring(struct emac_instance *dev, int new_mtu)
991 {
992         int rx_sync_size = emac_rx_sync_size(new_mtu);
993         int rx_skb_size = emac_rx_skb_size(new_mtu);
994         int i, ret = 0;
995         int mr1_jumbo_bit_change = 0;
996 
997         mutex_lock(&dev->link_lock);
998         emac_netif_stop(dev);
999         emac_rx_disable(dev);
1000         mal_disable_rx_channel(dev->mal, dev->mal_rx_chan);
1001 
1002         if (dev->rx_sg_skb) {
1003                 ++dev->estats.rx_dropped_resize;
1004                 dev_kfree_skb(dev->rx_sg_skb);
1005                 dev->rx_sg_skb = NULL;
1006         }
1007 
1008         /* Make a first pass over RX ring and mark BDs ready, dropping
1009          * non-processed packets on the way. We need this as a separate pass
1010          * to simplify error recovery in the case of allocation failure later.
1011          */
1012         for (i = 0; i < NUM_RX_BUFF; ++i) {
1013                 if (dev->rx_desc[i].ctrl & MAL_RX_CTRL_FIRST)
1014                         ++dev->estats.rx_dropped_resize;
1015 
1016                 dev->rx_desc[i].data_len = 0;
1017                 dev->rx_desc[i].ctrl = MAL_RX_CTRL_EMPTY |
1018                     (i == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
1019         }
1020 
1021         /* Reallocate RX ring only if bigger skb buffers are required */
1022         if (rx_skb_size <= dev->rx_skb_size)
1023                 goto skip;
1024 
1025         /* Second pass, allocate new skbs */
1026         for (i = 0; i < NUM_RX_BUFF; ++i) {
1027                 struct sk_buff *skb = alloc_skb(rx_skb_size, GFP_ATOMIC);
1028                 if (!skb) {
1029                         ret = -ENOMEM;
1030                         goto oom;
1031                 }
1032 
1033                 BUG_ON(!dev->rx_skb[i]);
1034                 dev_kfree_skb(dev->rx_skb[i]);
1035 
1036                 skb_reserve(skb, EMAC_RX_SKB_HEADROOM + 2);
1037                 dev->rx_desc[i].data_ptr =
1038                     dma_map_single(&dev->ofdev->dev, skb->data - 2, rx_sync_size,
1039                                    DMA_FROM_DEVICE) + 2;
1040                 dev->rx_skb[i] = skb;
1041         }
1042  skip:
1043         /* Check if we need to change "Jumbo" bit in MR1 */
1044         if (emac_has_feature(dev, EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE)) {
1045                 mr1_jumbo_bit_change = (new_mtu > ETH_DATA_LEN) ||
1046                                 (dev->ndev->mtu > ETH_DATA_LEN);
1047         } else {
1048                 mr1_jumbo_bit_change = (new_mtu > ETH_DATA_LEN) ^
1049                                 (dev->ndev->mtu > ETH_DATA_LEN);
1050         }
1051 
1052         if (mr1_jumbo_bit_change) {
1053                 /* This is to prevent starting RX channel in emac_rx_enable() */
1054                 set_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags);
1055 
1056                 dev->ndev->mtu = new_mtu;
1057                 emac_full_tx_reset(dev);
1058         }
1059 
1060         mal_set_rcbs(dev->mal, dev->mal_rx_chan, emac_rx_size(new_mtu));
1061  oom:
1062         /* Restart RX */
1063         clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags);
1064         dev->rx_slot = 0;
1065         mal_enable_rx_channel(dev->mal, dev->mal_rx_chan);
1066         emac_rx_enable(dev);
1067         emac_netif_start(dev);
1068         mutex_unlock(&dev->link_lock);
1069 
1070         return ret;
1071 }
1072 
1073 /* Process ctx, rtnl_lock semaphore */
1074 static int emac_change_mtu(struct net_device *ndev, int new_mtu)
1075 {
1076         struct emac_instance *dev = netdev_priv(ndev);
1077         int ret = 0;
1078 
1079         if (new_mtu < EMAC_MIN_MTU || new_mtu > dev->max_mtu)
1080                 return -EINVAL;
1081 
1082         DBG(dev, "change_mtu(%d)" NL, new_mtu);
1083 
1084         if (netif_running(ndev)) {
1085                 /* Check if we really need to reinitialize RX ring */
1086                 if (emac_rx_skb_size(ndev->mtu) != emac_rx_skb_size(new_mtu))
1087                         ret = emac_resize_rx_ring(dev, new_mtu);
1088         }
1089 
1090         if (!ret) {
1091                 ndev->mtu = new_mtu;
1092                 dev->rx_skb_size = emac_rx_skb_size(new_mtu);
1093                 dev->rx_sync_size = emac_rx_sync_size(new_mtu);
1094         }
1095 
1096         return ret;
1097 }
1098 
1099 static void emac_clean_tx_ring(struct emac_instance *dev)
1100 {
1101         int i;
1102 
1103         for (i = 0; i < NUM_TX_BUFF; ++i) {
1104                 if (dev->tx_skb[i]) {
1105                         dev_kfree_skb(dev->tx_skb[i]);
1106                         dev->tx_skb[i] = NULL;
1107                         if (dev->tx_desc[i].ctrl & MAL_TX_CTRL_READY)
1108                                 ++dev->estats.tx_dropped;
1109                 }
1110                 dev->tx_desc[i].ctrl = 0;
1111                 dev->tx_desc[i].data_ptr = 0;
1112         }
1113 }
1114 
1115 static void emac_clean_rx_ring(struct emac_instance *dev)
1116 {
1117         int i;
1118 
1119         for (i = 0; i < NUM_RX_BUFF; ++i)
1120                 if (dev->rx_skb[i]) {
1121                         dev->rx_desc[i].ctrl = 0;
1122                         dev_kfree_skb(dev->rx_skb[i]);
1123                         dev->rx_skb[i] = NULL;
1124                         dev->rx_desc[i].data_ptr = 0;
1125                 }
1126 
1127         if (dev->rx_sg_skb) {
1128                 dev_kfree_skb(dev->rx_sg_skb);
1129                 dev->rx_sg_skb = NULL;
1130         }
1131 }
1132 
1133 static inline int emac_alloc_rx_skb(struct emac_instance *dev, int slot,
1134                                     gfp_t flags)
1135 {
1136         struct sk_buff *skb = alloc_skb(dev->rx_skb_size, flags);
1137         if (unlikely(!skb))
1138                 return -ENOMEM;
1139 
1140         dev->rx_skb[slot] = skb;
1141         dev->rx_desc[slot].data_len = 0;
1142 
1143         skb_reserve(skb, EMAC_RX_SKB_HEADROOM + 2);
1144         dev->rx_desc[slot].data_ptr =
1145             dma_map_single(&dev->ofdev->dev, skb->data - 2, dev->rx_sync_size,
1146                            DMA_FROM_DEVICE) + 2;
1147         wmb();
1148         dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY |
1149             (slot == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
1150 
1151         return 0;
1152 }
1153 
1154 static void emac_print_link_status(struct emac_instance *dev)
1155 {
1156         if (netif_carrier_ok(dev->ndev))
1157                 printk(KERN_INFO "%s: link is up, %d %s%s\n",
1158                        dev->ndev->name, dev->phy.speed,
1159                        dev->phy.duplex == DUPLEX_FULL ? "FDX" : "HDX",
1160                        dev->phy.pause ? ", pause enabled" :
1161                        dev->phy.asym_pause ? ", asymmetric pause enabled" : "");
1162         else
1163                 printk(KERN_INFO "%s: link is down\n", dev->ndev->name);
1164 }
1165 
1166 /* Process ctx, rtnl_lock semaphore */
1167 static int emac_open(struct net_device *ndev)
1168 {
1169         struct emac_instance *dev = netdev_priv(ndev);
1170         int err, i;
1171 
1172         DBG(dev, "open" NL);
1173 
1174         /* Setup error IRQ handler */
1175         err = request_irq(dev->emac_irq, emac_irq, 0, "EMAC", dev);
1176         if (err) {
1177                 printk(KERN_ERR "%s: failed to request IRQ %d\n",
1178                        ndev->name, dev->emac_irq);
1179                 return err;
1180         }
1181 
1182         /* Allocate RX ring */
1183         for (i = 0; i < NUM_RX_BUFF; ++i)
1184                 if (emac_alloc_rx_skb(dev, i, GFP_KERNEL)) {
1185                         printk(KERN_ERR "%s: failed to allocate RX ring\n",
1186                                ndev->name);
1187                         goto oom;
1188                 }
1189 
1190         dev->tx_cnt = dev->tx_slot = dev->ack_slot = dev->rx_slot = 0;
1191         clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags);
1192         dev->rx_sg_skb = NULL;
1193 
1194         mutex_lock(&dev->link_lock);
1195         dev->opened = 1;
1196 
1197         /* Start PHY polling now.
1198          */
1199         if (dev->phy.address >= 0) {
1200                 int link_poll_interval;
1201                 if (dev->phy.def->ops->poll_link(&dev->phy)) {
1202                         dev->phy.def->ops->read_link(&dev->phy);
1203                         emac_rx_clk_default(dev);
1204                         netif_carrier_on(dev->ndev);
1205                         link_poll_interval = PHY_POLL_LINK_ON;
1206                 } else {
1207                         emac_rx_clk_tx(dev);
1208                         netif_carrier_off(dev->ndev);
1209                         link_poll_interval = PHY_POLL_LINK_OFF;
1210                 }
1211                 dev->link_polling = 1;
1212                 wmb();
1213                 schedule_delayed_work(&dev->link_work, link_poll_interval);
1214                 emac_print_link_status(dev);
1215         } else
1216                 netif_carrier_on(dev->ndev);
1217 
1218         /* Required for Pause packet support in EMAC */
1219         dev_mc_add_global(ndev, default_mcast_addr);
1220 
1221         emac_configure(dev);
1222         mal_poll_add(dev->mal, &dev->commac);
1223         mal_enable_tx_channel(dev->mal, dev->mal_tx_chan);
1224         mal_set_rcbs(dev->mal, dev->mal_rx_chan, emac_rx_size(ndev->mtu));
1225         mal_enable_rx_channel(dev->mal, dev->mal_rx_chan);
1226         emac_tx_enable(dev);
1227         emac_rx_enable(dev);
1228         emac_netif_start(dev);
1229 
1230         mutex_unlock(&dev->link_lock);
1231 
1232         return 0;
1233  oom:
1234         emac_clean_rx_ring(dev);
1235         free_irq(dev->emac_irq, dev);
1236 
1237         return -ENOMEM;
1238 }
1239 
1240 /* BHs disabled */
1241 #if 0
1242 static int emac_link_differs(struct emac_instance *dev)
1243 {
1244         u32 r = in_be32(&dev->emacp->mr1);
1245 
1246         int duplex = r & EMAC_MR1_FDE ? DUPLEX_FULL : DUPLEX_HALF;
1247         int speed, pause, asym_pause;
1248 
1249         if (r & EMAC_MR1_MF_1000)
1250                 speed = SPEED_1000;
1251         else if (r & EMAC_MR1_MF_100)
1252                 speed = SPEED_100;
1253         else
1254                 speed = SPEED_10;
1255 
1256         switch (r & (EMAC_MR1_EIFC | EMAC_MR1_APP)) {
1257         case (EMAC_MR1_EIFC | EMAC_MR1_APP):
1258                 pause = 1;
1259                 asym_pause = 0;
1260                 break;
1261         case EMAC_MR1_APP:
1262                 pause = 0;
1263                 asym_pause = 1;
1264                 break;
1265         default:
1266                 pause = asym_pause = 0;
1267         }
1268         return speed != dev->phy.speed || duplex != dev->phy.duplex ||
1269             pause != dev->phy.pause || asym_pause != dev->phy.asym_pause;
1270 }
1271 #endif
1272 
1273 static void emac_link_timer(struct work_struct *work)
1274 {
1275         struct emac_instance *dev =
1276                 container_of(to_delayed_work(work),
1277                              struct emac_instance, link_work);
1278         int link_poll_interval;
1279 
1280         mutex_lock(&dev->link_lock);
1281         DBG2(dev, "link timer" NL);
1282 
1283         if (!dev->opened)
1284                 goto bail;
1285 
1286         if (dev->phy.def->ops->poll_link(&dev->phy)) {
1287                 if (!netif_carrier_ok(dev->ndev)) {
1288                         emac_rx_clk_default(dev);
1289                         /* Get new link parameters */
1290                         dev->phy.def->ops->read_link(&dev->phy);
1291 
1292                         netif_carrier_on(dev->ndev);
1293                         emac_netif_stop(dev);
1294                         emac_full_tx_reset(dev);
1295                         emac_netif_start(dev);
1296                         emac_print_link_status(dev);
1297                 }
1298                 link_poll_interval = PHY_POLL_LINK_ON;
1299         } else {
1300                 if (netif_carrier_ok(dev->ndev)) {
1301                         emac_rx_clk_tx(dev);
1302                         netif_carrier_off(dev->ndev);
1303                         netif_tx_disable(dev->ndev);
1304                         emac_reinitialize(dev);
1305                         emac_print_link_status(dev);
1306                 }
1307                 link_poll_interval = PHY_POLL_LINK_OFF;
1308         }
1309         schedule_delayed_work(&dev->link_work, link_poll_interval);
1310  bail:
1311         mutex_unlock(&dev->link_lock);
1312 }
1313 
1314 static void emac_force_link_update(struct emac_instance *dev)
1315 {
1316         netif_carrier_off(dev->ndev);
1317         smp_rmb();
1318         if (dev->link_polling) {
1319                 cancel_delayed_work_sync(&dev->link_work);
1320                 if (dev->link_polling)
1321                         schedule_delayed_work(&dev->link_work,  PHY_POLL_LINK_OFF);
1322         }
1323 }
1324 
1325 /* Process ctx, rtnl_lock semaphore */
1326 static int emac_close(struct net_device *ndev)
1327 {
1328         struct emac_instance *dev = netdev_priv(ndev);
1329 
1330         DBG(dev, "close" NL);
1331 
1332         if (dev->phy.address >= 0) {
1333                 dev->link_polling = 0;
1334                 cancel_delayed_work_sync(&dev->link_work);
1335         }
1336         mutex_lock(&dev->link_lock);
1337         emac_netif_stop(dev);
1338         dev->opened = 0;
1339         mutex_unlock(&dev->link_lock);
1340 
1341         emac_rx_disable(dev);
1342         emac_tx_disable(dev);
1343         mal_disable_rx_channel(dev->mal, dev->mal_rx_chan);
1344         mal_disable_tx_channel(dev->mal, dev->mal_tx_chan);
1345         mal_poll_del(dev->mal, &dev->commac);
1346 
1347         emac_clean_tx_ring(dev);
1348         emac_clean_rx_ring(dev);
1349 
1350         free_irq(dev->emac_irq, dev);
1351 
1352         netif_carrier_off(ndev);
1353 
1354         return 0;
1355 }
1356 
1357 static inline u16 emac_tx_csum(struct emac_instance *dev,
1358                                struct sk_buff *skb)
1359 {
1360         if (emac_has_feature(dev, EMAC_FTR_HAS_TAH) &&
1361                 (skb->ip_summed == CHECKSUM_PARTIAL)) {
1362                 ++dev->stats.tx_packets_csum;
1363                 return EMAC_TX_CTRL_TAH_CSUM;
1364         }
1365         return 0;
1366 }
1367 
1368 static inline int emac_xmit_finish(struct emac_instance *dev, int len)
1369 {
1370         struct emac_regs __iomem *p = dev->emacp;
1371         struct net_device *ndev = dev->ndev;
1372 
1373         /* Send the packet out. If the if makes a significant perf
1374          * difference, then we can store the TMR0 value in "dev"
1375          * instead
1376          */
1377         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
1378                 out_be32(&p->tmr0, EMAC4_TMR0_XMIT);
1379         else
1380                 out_be32(&p->tmr0, EMAC_TMR0_XMIT);
1381 
1382         if (unlikely(++dev->tx_cnt == NUM_TX_BUFF)) {
1383                 netif_stop_queue(ndev);
1384                 DBG2(dev, "stopped TX queue" NL);
1385         }
1386 
1387         ndev->trans_start = jiffies;
1388         ++dev->stats.tx_packets;
1389         dev->stats.tx_bytes += len;
1390 
1391         return NETDEV_TX_OK;
1392 }
1393 
1394 /* Tx lock BH */
1395 static int emac_start_xmit(struct sk_buff *skb, struct net_device *ndev)
1396 {
1397         struct emac_instance *dev = netdev_priv(ndev);
1398         unsigned int len = skb->len;
1399         int slot;
1400 
1401         u16 ctrl = EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP | MAL_TX_CTRL_READY |
1402             MAL_TX_CTRL_LAST | emac_tx_csum(dev, skb);
1403 
1404         slot = dev->tx_slot++;
1405         if (dev->tx_slot == NUM_TX_BUFF) {
1406                 dev->tx_slot = 0;
1407                 ctrl |= MAL_TX_CTRL_WRAP;
1408         }
1409 
1410         DBG2(dev, "xmit(%u) %d" NL, len, slot);
1411 
1412         dev->tx_skb[slot] = skb;
1413         dev->tx_desc[slot].data_ptr = dma_map_single(&dev->ofdev->dev,
1414                                                      skb->data, len,
1415                                                      DMA_TO_DEVICE);
1416         dev->tx_desc[slot].data_len = (u16) len;
1417         wmb();
1418         dev->tx_desc[slot].ctrl = ctrl;
1419 
1420         return emac_xmit_finish(dev, len);
1421 }
1422 
1423 static inline int emac_xmit_split(struct emac_instance *dev, int slot,
1424                                   u32 pd, int len, int last, u16 base_ctrl)
1425 {
1426         while (1) {
1427                 u16 ctrl = base_ctrl;
1428                 int chunk = min(len, MAL_MAX_TX_SIZE);
1429                 len -= chunk;
1430 
1431                 slot = (slot + 1) % NUM_TX_BUFF;
1432 
1433                 if (last && !len)
1434                         ctrl |= MAL_TX_CTRL_LAST;
1435                 if (slot == NUM_TX_BUFF - 1)
1436                         ctrl |= MAL_TX_CTRL_WRAP;
1437 
1438                 dev->tx_skb[slot] = NULL;
1439                 dev->tx_desc[slot].data_ptr = pd;
1440                 dev->tx_desc[slot].data_len = (u16) chunk;
1441                 dev->tx_desc[slot].ctrl = ctrl;
1442                 ++dev->tx_cnt;
1443 
1444                 if (!len)
1445                         break;
1446 
1447                 pd += chunk;
1448         }
1449         return slot;
1450 }
1451 
1452 /* Tx lock BH disabled (SG version for TAH equipped EMACs) */
1453 static int emac_start_xmit_sg(struct sk_buff *skb, struct net_device *ndev)
1454 {
1455         struct emac_instance *dev = netdev_priv(ndev);
1456         int nr_frags = skb_shinfo(skb)->nr_frags;
1457         int len = skb->len, chunk;
1458         int slot, i;
1459         u16 ctrl;
1460         u32 pd;
1461 
1462         /* This is common "fast" path */
1463         if (likely(!nr_frags && len <= MAL_MAX_TX_SIZE))
1464                 return emac_start_xmit(skb, ndev);
1465 
1466         len -= skb->data_len;
1467 
1468         /* Note, this is only an *estimation*, we can still run out of empty
1469          * slots because of the additional fragmentation into
1470          * MAL_MAX_TX_SIZE-sized chunks
1471          */
1472         if (unlikely(dev->tx_cnt + nr_frags + mal_tx_chunks(len) > NUM_TX_BUFF))
1473                 goto stop_queue;
1474 
1475         ctrl = EMAC_TX_CTRL_GFCS | EMAC_TX_CTRL_GP | MAL_TX_CTRL_READY |
1476             emac_tx_csum(dev, skb);
1477         slot = dev->tx_slot;
1478 
1479         /* skb data */
1480         dev->tx_skb[slot] = NULL;
1481         chunk = min(len, MAL_MAX_TX_SIZE);
1482         dev->tx_desc[slot].data_ptr = pd =
1483             dma_map_single(&dev->ofdev->dev, skb->data, len, DMA_TO_DEVICE);
1484         dev->tx_desc[slot].data_len = (u16) chunk;
1485         len -= chunk;
1486         if (unlikely(len))
1487                 slot = emac_xmit_split(dev, slot, pd + chunk, len, !nr_frags,
1488                                        ctrl);
1489         /* skb fragments */
1490         for (i = 0; i < nr_frags; ++i) {
1491                 struct skb_frag_struct *frag = &skb_shinfo(skb)->frags[i];
1492                 len = skb_frag_size(frag);
1493 
1494                 if (unlikely(dev->tx_cnt + mal_tx_chunks(len) >= NUM_TX_BUFF))
1495                         goto undo_frame;
1496 
1497                 pd = skb_frag_dma_map(&dev->ofdev->dev, frag, 0, len,
1498                                       DMA_TO_DEVICE);
1499 
1500                 slot = emac_xmit_split(dev, slot, pd, len, i == nr_frags - 1,
1501                                        ctrl);
1502         }
1503 
1504         DBG2(dev, "xmit_sg(%u) %d - %d" NL, skb->len, dev->tx_slot, slot);
1505 
1506         /* Attach skb to the last slot so we don't release it too early */
1507         dev->tx_skb[slot] = skb;
1508 
1509         /* Send the packet out */
1510         if (dev->tx_slot == NUM_TX_BUFF - 1)
1511                 ctrl |= MAL_TX_CTRL_WRAP;
1512         wmb();
1513         dev->tx_desc[dev->tx_slot].ctrl = ctrl;
1514         dev->tx_slot = (slot + 1) % NUM_TX_BUFF;
1515 
1516         return emac_xmit_finish(dev, skb->len);
1517 
1518  undo_frame:
1519         /* Well, too bad. Our previous estimation was overly optimistic.
1520          * Undo everything.
1521          */
1522         while (slot != dev->tx_slot) {
1523                 dev->tx_desc[slot].ctrl = 0;
1524                 --dev->tx_cnt;
1525                 if (--slot < 0)
1526                         slot = NUM_TX_BUFF - 1;
1527         }
1528         ++dev->estats.tx_undo;
1529 
1530  stop_queue:
1531         netif_stop_queue(ndev);
1532         DBG2(dev, "stopped TX queue" NL);
1533         return NETDEV_TX_BUSY;
1534 }
1535 
1536 /* Tx lock BHs */
1537 static void emac_parse_tx_error(struct emac_instance *dev, u16 ctrl)
1538 {
1539         struct emac_error_stats *st = &dev->estats;
1540 
1541         DBG(dev, "BD TX error %04x" NL, ctrl);
1542 
1543         ++st->tx_bd_errors;
1544         if (ctrl & EMAC_TX_ST_BFCS)
1545                 ++st->tx_bd_bad_fcs;
1546         if (ctrl & EMAC_TX_ST_LCS)
1547                 ++st->tx_bd_carrier_loss;
1548         if (ctrl & EMAC_TX_ST_ED)
1549                 ++st->tx_bd_excessive_deferral;
1550         if (ctrl & EMAC_TX_ST_EC)
1551                 ++st->tx_bd_excessive_collisions;
1552         if (ctrl & EMAC_TX_ST_LC)
1553                 ++st->tx_bd_late_collision;
1554         if (ctrl & EMAC_TX_ST_MC)
1555                 ++st->tx_bd_multple_collisions;
1556         if (ctrl & EMAC_TX_ST_SC)
1557                 ++st->tx_bd_single_collision;
1558         if (ctrl & EMAC_TX_ST_UR)
1559                 ++st->tx_bd_underrun;
1560         if (ctrl & EMAC_TX_ST_SQE)
1561                 ++st->tx_bd_sqe;
1562 }
1563 
1564 static void emac_poll_tx(void *param)
1565 {
1566         struct emac_instance *dev = param;
1567         u32 bad_mask;
1568 
1569         DBG2(dev, "poll_tx, %d %d" NL, dev->tx_cnt, dev->ack_slot);
1570 
1571         if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
1572                 bad_mask = EMAC_IS_BAD_TX_TAH;
1573         else
1574                 bad_mask = EMAC_IS_BAD_TX;
1575 
1576         netif_tx_lock_bh(dev->ndev);
1577         if (dev->tx_cnt) {
1578                 u16 ctrl;
1579                 int slot = dev->ack_slot, n = 0;
1580         again:
1581                 ctrl = dev->tx_desc[slot].ctrl;
1582                 if (!(ctrl & MAL_TX_CTRL_READY)) {
1583                         struct sk_buff *skb = dev->tx_skb[slot];
1584                         ++n;
1585 
1586                         if (skb) {
1587                                 dev_kfree_skb(skb);
1588                                 dev->tx_skb[slot] = NULL;
1589                         }
1590                         slot = (slot + 1) % NUM_TX_BUFF;
1591 
1592                         if (unlikely(ctrl & bad_mask))
1593                                 emac_parse_tx_error(dev, ctrl);
1594 
1595                         if (--dev->tx_cnt)
1596                                 goto again;
1597                 }
1598                 if (n) {
1599                         dev->ack_slot = slot;
1600                         if (netif_queue_stopped(dev->ndev) &&
1601                             dev->tx_cnt < EMAC_TX_WAKEUP_THRESH)
1602                                 netif_wake_queue(dev->ndev);
1603 
1604                         DBG2(dev, "tx %d pkts" NL, n);
1605                 }
1606         }
1607         netif_tx_unlock_bh(dev->ndev);
1608 }
1609 
1610 static inline void emac_recycle_rx_skb(struct emac_instance *dev, int slot,
1611                                        int len)
1612 {
1613         struct sk_buff *skb = dev->rx_skb[slot];
1614 
1615         DBG2(dev, "recycle %d %d" NL, slot, len);
1616 
1617         if (len)
1618                 dma_map_single(&dev->ofdev->dev, skb->data - 2,
1619                                EMAC_DMA_ALIGN(len + 2), DMA_FROM_DEVICE);
1620 
1621         dev->rx_desc[slot].data_len = 0;
1622         wmb();
1623         dev->rx_desc[slot].ctrl = MAL_RX_CTRL_EMPTY |
1624             (slot == (NUM_RX_BUFF - 1) ? MAL_RX_CTRL_WRAP : 0);
1625 }
1626 
1627 static void emac_parse_rx_error(struct emac_instance *dev, u16 ctrl)
1628 {
1629         struct emac_error_stats *st = &dev->estats;
1630 
1631         DBG(dev, "BD RX error %04x" NL, ctrl);
1632 
1633         ++st->rx_bd_errors;
1634         if (ctrl & EMAC_RX_ST_OE)
1635                 ++st->rx_bd_overrun;
1636         if (ctrl & EMAC_RX_ST_BP)
1637                 ++st->rx_bd_bad_packet;
1638         if (ctrl & EMAC_RX_ST_RP)
1639                 ++st->rx_bd_runt_packet;
1640         if (ctrl & EMAC_RX_ST_SE)
1641                 ++st->rx_bd_short_event;
1642         if (ctrl & EMAC_RX_ST_AE)
1643                 ++st->rx_bd_alignment_error;
1644         if (ctrl & EMAC_RX_ST_BFCS)
1645                 ++st->rx_bd_bad_fcs;
1646         if (ctrl & EMAC_RX_ST_PTL)
1647                 ++st->rx_bd_packet_too_long;
1648         if (ctrl & EMAC_RX_ST_ORE)
1649                 ++st->rx_bd_out_of_range;
1650         if (ctrl & EMAC_RX_ST_IRE)
1651                 ++st->rx_bd_in_range;
1652 }
1653 
1654 static inline void emac_rx_csum(struct emac_instance *dev,
1655                                 struct sk_buff *skb, u16 ctrl)
1656 {
1657 #ifdef CONFIG_IBM_EMAC_TAH
1658         if (!ctrl && dev->tah_dev) {
1659                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1660                 ++dev->stats.rx_packets_csum;
1661         }
1662 #endif
1663 }
1664 
1665 static inline int emac_rx_sg_append(struct emac_instance *dev, int slot)
1666 {
1667         if (likely(dev->rx_sg_skb != NULL)) {
1668                 int len = dev->rx_desc[slot].data_len;
1669                 int tot_len = dev->rx_sg_skb->len + len;
1670 
1671                 if (unlikely(tot_len + 2 > dev->rx_skb_size)) {
1672                         ++dev->estats.rx_dropped_mtu;
1673                         dev_kfree_skb(dev->rx_sg_skb);
1674                         dev->rx_sg_skb = NULL;
1675                 } else {
1676                         cacheable_memcpy(skb_tail_pointer(dev->rx_sg_skb),
1677                                          dev->rx_skb[slot]->data, len);
1678                         skb_put(dev->rx_sg_skb, len);
1679                         emac_recycle_rx_skb(dev, slot, len);
1680                         return 0;
1681                 }
1682         }
1683         emac_recycle_rx_skb(dev, slot, 0);
1684         return -1;
1685 }
1686 
1687 /* NAPI poll context */
1688 static int emac_poll_rx(void *param, int budget)
1689 {
1690         struct emac_instance *dev = param;
1691         int slot = dev->rx_slot, received = 0;
1692 
1693         DBG2(dev, "poll_rx(%d)" NL, budget);
1694 
1695  again:
1696         while (budget > 0) {
1697                 int len;
1698                 struct sk_buff *skb;
1699                 u16 ctrl = dev->rx_desc[slot].ctrl;
1700 
1701                 if (ctrl & MAL_RX_CTRL_EMPTY)
1702                         break;
1703 
1704                 skb = dev->rx_skb[slot];
1705                 mb();
1706                 len = dev->rx_desc[slot].data_len;
1707 
1708                 if (unlikely(!MAL_IS_SINGLE_RX(ctrl)))
1709                         goto sg;
1710 
1711                 ctrl &= EMAC_BAD_RX_MASK;
1712                 if (unlikely(ctrl && ctrl != EMAC_RX_TAH_BAD_CSUM)) {
1713                         emac_parse_rx_error(dev, ctrl);
1714                         ++dev->estats.rx_dropped_error;
1715                         emac_recycle_rx_skb(dev, slot, 0);
1716                         len = 0;
1717                         goto next;
1718                 }
1719 
1720                 if (len < ETH_HLEN) {
1721                         ++dev->estats.rx_dropped_stack;
1722                         emac_recycle_rx_skb(dev, slot, len);
1723                         goto next;
1724                 }
1725 
1726                 if (len && len < EMAC_RX_COPY_THRESH) {
1727                         struct sk_buff *copy_skb =
1728                             alloc_skb(len + EMAC_RX_SKB_HEADROOM + 2, GFP_ATOMIC);
1729                         if (unlikely(!copy_skb))
1730                                 goto oom;
1731 
1732                         skb_reserve(copy_skb, EMAC_RX_SKB_HEADROOM + 2);
1733                         cacheable_memcpy(copy_skb->data - 2, skb->data - 2,
1734                                          len + 2);
1735                         emac_recycle_rx_skb(dev, slot, len);
1736                         skb = copy_skb;
1737                 } else if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC)))
1738                         goto oom;
1739 
1740                 skb_put(skb, len);
1741         push_packet:
1742                 skb->protocol = eth_type_trans(skb, dev->ndev);
1743                 emac_rx_csum(dev, skb, ctrl);
1744 
1745                 if (unlikely(netif_receive_skb(skb) == NET_RX_DROP))
1746                         ++dev->estats.rx_dropped_stack;
1747         next:
1748                 ++dev->stats.rx_packets;
1749         skip:
1750                 dev->stats.rx_bytes += len;
1751                 slot = (slot + 1) % NUM_RX_BUFF;
1752                 --budget;
1753                 ++received;
1754                 continue;
1755         sg:
1756                 if (ctrl & MAL_RX_CTRL_FIRST) {
1757                         BUG_ON(dev->rx_sg_skb);
1758                         if (unlikely(emac_alloc_rx_skb(dev, slot, GFP_ATOMIC))) {
1759                                 DBG(dev, "rx OOM %d" NL, slot);
1760                                 ++dev->estats.rx_dropped_oom;
1761                                 emac_recycle_rx_skb(dev, slot, 0);
1762                         } else {
1763                                 dev->rx_sg_skb = skb;
1764                                 skb_put(skb, len);
1765                         }
1766                 } else if (!emac_rx_sg_append(dev, slot) &&
1767                            (ctrl & MAL_RX_CTRL_LAST)) {
1768 
1769                         skb = dev->rx_sg_skb;
1770                         dev->rx_sg_skb = NULL;
1771 
1772                         ctrl &= EMAC_BAD_RX_MASK;
1773                         if (unlikely(ctrl && ctrl != EMAC_RX_TAH_BAD_CSUM)) {
1774                                 emac_parse_rx_error(dev, ctrl);
1775                                 ++dev->estats.rx_dropped_error;
1776                                 dev_kfree_skb(skb);
1777                                 len = 0;
1778                         } else
1779                                 goto push_packet;
1780                 }
1781                 goto skip;
1782         oom:
1783                 DBG(dev, "rx OOM %d" NL, slot);
1784                 /* Drop the packet and recycle skb */
1785                 ++dev->estats.rx_dropped_oom;
1786                 emac_recycle_rx_skb(dev, slot, 0);
1787                 goto next;
1788         }
1789 
1790         if (received) {
1791                 DBG2(dev, "rx %d BDs" NL, received);
1792                 dev->rx_slot = slot;
1793         }
1794 
1795         if (unlikely(budget && test_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags))) {
1796                 mb();
1797                 if (!(dev->rx_desc[slot].ctrl & MAL_RX_CTRL_EMPTY)) {
1798                         DBG2(dev, "rx restart" NL);
1799                         received = 0;
1800                         goto again;
1801                 }
1802 
1803                 if (dev->rx_sg_skb) {
1804                         DBG2(dev, "dropping partial rx packet" NL);
1805                         ++dev->estats.rx_dropped_error;
1806                         dev_kfree_skb(dev->rx_sg_skb);
1807                         dev->rx_sg_skb = NULL;
1808                 }
1809 
1810                 clear_bit(MAL_COMMAC_RX_STOPPED, &dev->commac.flags);
1811                 mal_enable_rx_channel(dev->mal, dev->mal_rx_chan);
1812                 emac_rx_enable(dev);
1813                 dev->rx_slot = 0;
1814         }
1815         return received;
1816 }
1817 
1818 /* NAPI poll context */
1819 static int emac_peek_rx(void *param)
1820 {
1821         struct emac_instance *dev = param;
1822 
1823         return !(dev->rx_desc[dev->rx_slot].ctrl & MAL_RX_CTRL_EMPTY);
1824 }
1825 
1826 /* NAPI poll context */
1827 static int emac_peek_rx_sg(void *param)
1828 {
1829         struct emac_instance *dev = param;
1830 
1831         int slot = dev->rx_slot;
1832         while (1) {
1833                 u16 ctrl = dev->rx_desc[slot].ctrl;
1834                 if (ctrl & MAL_RX_CTRL_EMPTY)
1835                         return 0;
1836                 else if (ctrl & MAL_RX_CTRL_LAST)
1837                         return 1;
1838 
1839                 slot = (slot + 1) % NUM_RX_BUFF;
1840 
1841                 /* I'm just being paranoid here :) */
1842                 if (unlikely(slot == dev->rx_slot))
1843                         return 0;
1844         }
1845 }
1846 
1847 /* Hard IRQ */
1848 static void emac_rxde(void *param)
1849 {
1850         struct emac_instance *dev = param;
1851 
1852         ++dev->estats.rx_stopped;
1853         emac_rx_disable_async(dev);
1854 }
1855 
1856 /* Hard IRQ */
1857 static irqreturn_t emac_irq(int irq, void *dev_instance)
1858 {
1859         struct emac_instance *dev = dev_instance;
1860         struct emac_regs __iomem *p = dev->emacp;
1861         struct emac_error_stats *st = &dev->estats;
1862         u32 isr;
1863 
1864         spin_lock(&dev->lock);
1865 
1866         isr = in_be32(&p->isr);
1867         out_be32(&p->isr, isr);
1868 
1869         DBG(dev, "isr = %08x" NL, isr);
1870 
1871         if (isr & EMAC4_ISR_TXPE)
1872                 ++st->tx_parity;
1873         if (isr & EMAC4_ISR_RXPE)
1874                 ++st->rx_parity;
1875         if (isr & EMAC4_ISR_TXUE)
1876                 ++st->tx_underrun;
1877         if (isr & EMAC4_ISR_RXOE)
1878                 ++st->rx_fifo_overrun;
1879         if (isr & EMAC_ISR_OVR)
1880                 ++st->rx_overrun;
1881         if (isr & EMAC_ISR_BP)
1882                 ++st->rx_bad_packet;
1883         if (isr & EMAC_ISR_RP)
1884                 ++st->rx_runt_packet;
1885         if (isr & EMAC_ISR_SE)
1886                 ++st->rx_short_event;
1887         if (isr & EMAC_ISR_ALE)
1888                 ++st->rx_alignment_error;
1889         if (isr & EMAC_ISR_BFCS)
1890                 ++st->rx_bad_fcs;
1891         if (isr & EMAC_ISR_PTLE)
1892                 ++st->rx_packet_too_long;
1893         if (isr & EMAC_ISR_ORE)
1894                 ++st->rx_out_of_range;
1895         if (isr & EMAC_ISR_IRE)
1896                 ++st->rx_in_range;
1897         if (isr & EMAC_ISR_SQE)
1898                 ++st->tx_sqe;
1899         if (isr & EMAC_ISR_TE)
1900                 ++st->tx_errors;
1901 
1902         spin_unlock(&dev->lock);
1903 
1904         return IRQ_HANDLED;
1905 }
1906 
1907 static struct net_device_stats *emac_stats(struct net_device *ndev)
1908 {
1909         struct emac_instance *dev = netdev_priv(ndev);
1910         struct emac_stats *st = &dev->stats;
1911         struct emac_error_stats *est = &dev->estats;
1912         struct net_device_stats *nst = &dev->nstats;
1913         unsigned long flags;
1914 
1915         DBG2(dev, "stats" NL);
1916 
1917         /* Compute "legacy" statistics */
1918         spin_lock_irqsave(&dev->lock, flags);
1919         nst->rx_packets = (unsigned long)st->rx_packets;
1920         nst->rx_bytes = (unsigned long)st->rx_bytes;
1921         nst->tx_packets = (unsigned long)st->tx_packets;
1922         nst->tx_bytes = (unsigned long)st->tx_bytes;
1923         nst->rx_dropped = (unsigned long)(est->rx_dropped_oom +
1924                                           est->rx_dropped_error +
1925                                           est->rx_dropped_resize +
1926                                           est->rx_dropped_mtu);
1927         nst->tx_dropped = (unsigned long)est->tx_dropped;
1928 
1929         nst->rx_errors = (unsigned long)est->rx_bd_errors;
1930         nst->rx_fifo_errors = (unsigned long)(est->rx_bd_overrun +
1931                                               est->rx_fifo_overrun +
1932                                               est->rx_overrun);
1933         nst->rx_frame_errors = (unsigned long)(est->rx_bd_alignment_error +
1934                                                est->rx_alignment_error);
1935         nst->rx_crc_errors = (unsigned long)(est->rx_bd_bad_fcs +
1936                                              est->rx_bad_fcs);
1937         nst->rx_length_errors = (unsigned long)(est->rx_bd_runt_packet +
1938                                                 est->rx_bd_short_event +
1939                                                 est->rx_bd_packet_too_long +
1940                                                 est->rx_bd_out_of_range +
1941                                                 est->rx_bd_in_range +
1942                                                 est->rx_runt_packet +
1943                                                 est->rx_short_event +
1944                                                 est->rx_packet_too_long +
1945                                                 est->rx_out_of_range +
1946                                                 est->rx_in_range);
1947 
1948         nst->tx_errors = (unsigned long)(est->tx_bd_errors + est->tx_errors);
1949         nst->tx_fifo_errors = (unsigned long)(est->tx_bd_underrun +
1950                                               est->tx_underrun);
1951         nst->tx_carrier_errors = (unsigned long)est->tx_bd_carrier_loss;
1952         nst->collisions = (unsigned long)(est->tx_bd_excessive_deferral +
1953                                           est->tx_bd_excessive_collisions +
1954                                           est->tx_bd_late_collision +
1955                                           est->tx_bd_multple_collisions);
1956         spin_unlock_irqrestore(&dev->lock, flags);
1957         return nst;
1958 }
1959 
1960 static struct mal_commac_ops emac_commac_ops = {
1961         .poll_tx = &emac_poll_tx,
1962         .poll_rx = &emac_poll_rx,
1963         .peek_rx = &emac_peek_rx,
1964         .rxde = &emac_rxde,
1965 };
1966 
1967 static struct mal_commac_ops emac_commac_sg_ops = {
1968         .poll_tx = &emac_poll_tx,
1969         .poll_rx = &emac_poll_rx,
1970         .peek_rx = &emac_peek_rx_sg,
1971         .rxde = &emac_rxde,
1972 };
1973 
1974 /* Ethtool support */
1975 static int emac_ethtool_get_settings(struct net_device *ndev,
1976                                      struct ethtool_cmd *cmd)
1977 {
1978         struct emac_instance *dev = netdev_priv(ndev);
1979 
1980         cmd->supported = dev->phy.features;
1981         cmd->port = PORT_MII;
1982         cmd->phy_address = dev->phy.address;
1983         cmd->transceiver =
1984             dev->phy.address >= 0 ? XCVR_EXTERNAL : XCVR_INTERNAL;
1985 
1986         mutex_lock(&dev->link_lock);
1987         cmd->advertising = dev->phy.advertising;
1988         cmd->autoneg = dev->phy.autoneg;
1989         cmd->speed = dev->phy.speed;
1990         cmd->duplex = dev->phy.duplex;
1991         mutex_unlock(&dev->link_lock);
1992 
1993         return 0;
1994 }
1995 
1996 static int emac_ethtool_set_settings(struct net_device *ndev,
1997                                      struct ethtool_cmd *cmd)
1998 {
1999         struct emac_instance *dev = netdev_priv(ndev);
2000         u32 f = dev->phy.features;
2001 
2002         DBG(dev, "set_settings(%d, %d, %d, 0x%08x)" NL,
2003             cmd->autoneg, cmd->speed, cmd->duplex, cmd->advertising);
2004 
2005         /* Basic sanity checks */
2006         if (dev->phy.address < 0)
2007                 return -EOPNOTSUPP;
2008         if (cmd->autoneg != AUTONEG_ENABLE && cmd->autoneg != AUTONEG_DISABLE)
2009                 return -EINVAL;
2010         if (cmd->autoneg == AUTONEG_ENABLE && cmd->advertising == 0)
2011                 return -EINVAL;
2012         if (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL)
2013                 return -EINVAL;
2014 
2015         if (cmd->autoneg == AUTONEG_DISABLE) {
2016                 switch (cmd->speed) {
2017                 case SPEED_10:
2018                         if (cmd->duplex == DUPLEX_HALF &&
2019                             !(f & SUPPORTED_10baseT_Half))
2020                                 return -EINVAL;
2021                         if (cmd->duplex == DUPLEX_FULL &&
2022                             !(f & SUPPORTED_10baseT_Full))
2023                                 return -EINVAL;
2024                         break;
2025                 case SPEED_100:
2026                         if (cmd->duplex == DUPLEX_HALF &&
2027                             !(f & SUPPORTED_100baseT_Half))
2028                                 return -EINVAL;
2029                         if (cmd->duplex == DUPLEX_FULL &&
2030                             !(f & SUPPORTED_100baseT_Full))
2031                                 return -EINVAL;
2032                         break;
2033                 case SPEED_1000:
2034                         if (cmd->duplex == DUPLEX_HALF &&
2035                             !(f & SUPPORTED_1000baseT_Half))
2036                                 return -EINVAL;
2037                         if (cmd->duplex == DUPLEX_FULL &&
2038                             !(f & SUPPORTED_1000baseT_Full))
2039                                 return -EINVAL;
2040                         break;
2041                 default:
2042                         return -EINVAL;
2043                 }
2044 
2045                 mutex_lock(&dev->link_lock);
2046                 dev->phy.def->ops->setup_forced(&dev->phy, cmd->speed,
2047                                                 cmd->duplex);
2048                 mutex_unlock(&dev->link_lock);
2049 
2050         } else {
2051                 if (!(f & SUPPORTED_Autoneg))
2052                         return -EINVAL;
2053 
2054                 mutex_lock(&dev->link_lock);
2055                 dev->phy.def->ops->setup_aneg(&dev->phy,
2056                                               (cmd->advertising & f) |
2057                                               (dev->phy.advertising &
2058                                                (ADVERTISED_Pause |
2059                                                 ADVERTISED_Asym_Pause)));
2060                 mutex_unlock(&dev->link_lock);
2061         }
2062         emac_force_link_update(dev);
2063 
2064         return 0;
2065 }
2066 
2067 static void emac_ethtool_get_ringparam(struct net_device *ndev,
2068                                        struct ethtool_ringparam *rp)
2069 {
2070         rp->rx_max_pending = rp->rx_pending = NUM_RX_BUFF;
2071         rp->tx_max_pending = rp->tx_pending = NUM_TX_BUFF;
2072 }
2073 
2074 static void emac_ethtool_get_pauseparam(struct net_device *ndev,
2075                                         struct ethtool_pauseparam *pp)
2076 {
2077         struct emac_instance *dev = netdev_priv(ndev);
2078 
2079         mutex_lock(&dev->link_lock);
2080         if ((dev->phy.features & SUPPORTED_Autoneg) &&
2081             (dev->phy.advertising & (ADVERTISED_Pause | ADVERTISED_Asym_Pause)))
2082                 pp->autoneg = 1;
2083 
2084         if (dev->phy.duplex == DUPLEX_FULL) {
2085                 if (dev->phy.pause)
2086                         pp->rx_pause = pp->tx_pause = 1;
2087                 else if (dev->phy.asym_pause)
2088                         pp->tx_pause = 1;
2089         }
2090         mutex_unlock(&dev->link_lock);
2091 }
2092 
2093 static int emac_get_regs_len(struct emac_instance *dev)
2094 {
2095         if (emac_has_feature(dev, EMAC_FTR_EMAC4))
2096                 return sizeof(struct emac_ethtool_regs_subhdr) +
2097                         EMAC4_ETHTOOL_REGS_SIZE(dev);
2098         else
2099                 return sizeof(struct emac_ethtool_regs_subhdr) +
2100                         EMAC_ETHTOOL_REGS_SIZE(dev);
2101 }
2102 
2103 static int emac_ethtool_get_regs_len(struct net_device *ndev)
2104 {
2105         struct emac_instance *dev = netdev_priv(ndev);
2106         int size;
2107 
2108         size = sizeof(struct emac_ethtool_regs_hdr) +
2109                 emac_get_regs_len(dev) + mal_get_regs_len(dev->mal);
2110         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
2111                 size += zmii_get_regs_len(dev->zmii_dev);
2112         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
2113                 size += rgmii_get_regs_len(dev->rgmii_dev);
2114         if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
2115                 size += tah_get_regs_len(dev->tah_dev);
2116 
2117         return size;
2118 }
2119 
2120 static void *emac_dump_regs(struct emac_instance *dev, void *buf)
2121 {
2122         struct emac_ethtool_regs_subhdr *hdr = buf;
2123 
2124         hdr->index = dev->cell_index;
2125         if (emac_has_feature(dev, EMAC_FTR_EMAC4)) {
2126                 hdr->version = EMAC4_ETHTOOL_REGS_VER;
2127                 memcpy_fromio(hdr + 1, dev->emacp, EMAC4_ETHTOOL_REGS_SIZE(dev));
2128                 return (void *)(hdr + 1) + EMAC4_ETHTOOL_REGS_SIZE(dev);
2129         } else {
2130                 hdr->version = EMAC_ETHTOOL_REGS_VER;
2131                 memcpy_fromio(hdr + 1, dev->emacp, EMAC_ETHTOOL_REGS_SIZE(dev));
2132                 return (void *)(hdr + 1) + EMAC_ETHTOOL_REGS_SIZE(dev);
2133         }
2134 }
2135 
2136 static void emac_ethtool_get_regs(struct net_device *ndev,
2137                                   struct ethtool_regs *regs, void *buf)
2138 {
2139         struct emac_instance *dev = netdev_priv(ndev);
2140         struct emac_ethtool_regs_hdr *hdr = buf;
2141 
2142         hdr->components = 0;
2143         buf = hdr + 1;
2144 
2145         buf = mal_dump_regs(dev->mal, buf);
2146         buf = emac_dump_regs(dev, buf);
2147         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII)) {
2148                 hdr->components |= EMAC_ETHTOOL_REGS_ZMII;
2149                 buf = zmii_dump_regs(dev->zmii_dev, buf);
2150         }
2151         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII)) {
2152                 hdr->components |= EMAC_ETHTOOL_REGS_RGMII;
2153                 buf = rgmii_dump_regs(dev->rgmii_dev, buf);
2154         }
2155         if (emac_has_feature(dev, EMAC_FTR_HAS_TAH)) {
2156                 hdr->components |= EMAC_ETHTOOL_REGS_TAH;
2157                 buf = tah_dump_regs(dev->tah_dev, buf);
2158         }
2159 }
2160 
2161 static int emac_ethtool_nway_reset(struct net_device *ndev)
2162 {
2163         struct emac_instance *dev = netdev_priv(ndev);
2164         int res = 0;
2165 
2166         DBG(dev, "nway_reset" NL);
2167 
2168         if (dev->phy.address < 0)
2169                 return -EOPNOTSUPP;
2170 
2171         mutex_lock(&dev->link_lock);
2172         if (!dev->phy.autoneg) {
2173                 res = -EINVAL;
2174                 goto out;
2175         }
2176 
2177         dev->phy.def->ops->setup_aneg(&dev->phy, dev->phy.advertising);
2178  out:
2179         mutex_unlock(&dev->link_lock);
2180         emac_force_link_update(dev);
2181         return res;
2182 }
2183 
2184 static int emac_ethtool_get_sset_count(struct net_device *ndev, int stringset)
2185 {
2186         if (stringset == ETH_SS_STATS)
2187                 return EMAC_ETHTOOL_STATS_COUNT;
2188         else
2189                 return -EINVAL;
2190 }
2191 
2192 static void emac_ethtool_get_strings(struct net_device *ndev, u32 stringset,
2193                                      u8 * buf)
2194 {
2195         if (stringset == ETH_SS_STATS)
2196                 memcpy(buf, &emac_stats_keys, sizeof(emac_stats_keys));
2197 }
2198 
2199 static void emac_ethtool_get_ethtool_stats(struct net_device *ndev,
2200                                            struct ethtool_stats *estats,
2201                                            u64 * tmp_stats)
2202 {
2203         struct emac_instance *dev = netdev_priv(ndev);
2204 
2205         memcpy(tmp_stats, &dev->stats, sizeof(dev->stats));
2206         tmp_stats += sizeof(dev->stats) / sizeof(u64);
2207         memcpy(tmp_stats, &dev->estats, sizeof(dev->estats));
2208 }
2209 
2210 static void emac_ethtool_get_drvinfo(struct net_device *ndev,
2211                                      struct ethtool_drvinfo *info)
2212 {
2213         struct emac_instance *dev = netdev_priv(ndev);
2214 
2215         strlcpy(info->driver, "ibm_emac", sizeof(info->driver));
2216         strlcpy(info->version, DRV_VERSION, sizeof(info->version));
2217         snprintf(info->bus_info, sizeof(info->bus_info), "PPC 4xx EMAC-%d %s",
2218                  dev->cell_index, dev->ofdev->dev.of_node->full_name);
2219         info->regdump_len = emac_ethtool_get_regs_len(ndev);
2220 }
2221 
2222 static const struct ethtool_ops emac_ethtool_ops = {
2223         .get_settings = emac_ethtool_get_settings,
2224         .set_settings = emac_ethtool_set_settings,
2225         .get_drvinfo = emac_ethtool_get_drvinfo,
2226 
2227         .get_regs_len = emac_ethtool_get_regs_len,
2228         .get_regs = emac_ethtool_get_regs,
2229 
2230         .nway_reset = emac_ethtool_nway_reset,
2231 
2232         .get_ringparam = emac_ethtool_get_ringparam,
2233         .get_pauseparam = emac_ethtool_get_pauseparam,
2234 
2235         .get_strings = emac_ethtool_get_strings,
2236         .get_sset_count = emac_ethtool_get_sset_count,
2237         .get_ethtool_stats = emac_ethtool_get_ethtool_stats,
2238 
2239         .get_link = ethtool_op_get_link,
2240 };
2241 
2242 static int emac_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
2243 {
2244         struct emac_instance *dev = netdev_priv(ndev);
2245         struct mii_ioctl_data *data = if_mii(rq);
2246 
2247         DBG(dev, "ioctl %08x" NL, cmd);
2248 
2249         if (dev->phy.address < 0)
2250                 return -EOPNOTSUPP;
2251 
2252         switch (cmd) {
2253         case SIOCGMIIPHY:
2254                 data->phy_id = dev->phy.address;
2255                 /* Fall through */
2256         case SIOCGMIIREG:
2257                 data->val_out = emac_mdio_read(ndev, dev->phy.address,
2258                                                data->reg_num);
2259                 return 0;
2260 
2261         case SIOCSMIIREG:
2262                 emac_mdio_write(ndev, dev->phy.address, data->reg_num,
2263                                 data->val_in);
2264                 return 0;
2265         default:
2266                 return -EOPNOTSUPP;
2267         }
2268 }
2269 
2270 struct emac_depentry {
2271         u32                     phandle;
2272         struct device_node      *node;
2273         struct platform_device  *ofdev;
2274         void                    *drvdata;
2275 };
2276 
2277 #define EMAC_DEP_MAL_IDX        0
2278 #define EMAC_DEP_ZMII_IDX       1
2279 #define EMAC_DEP_RGMII_IDX      2
2280 #define EMAC_DEP_TAH_IDX        3
2281 #define EMAC_DEP_MDIO_IDX       4
2282 #define EMAC_DEP_PREV_IDX       5
2283 #define EMAC_DEP_COUNT          6
2284 
2285 static int emac_check_deps(struct emac_instance *dev,
2286                            struct emac_depentry *deps)
2287 {
2288         int i, there = 0;
2289         struct device_node *np;
2290 
2291         for (i = 0; i < EMAC_DEP_COUNT; i++) {
2292                 /* no dependency on that item, allright */
2293                 if (deps[i].phandle == 0) {
2294                         there++;
2295                         continue;
2296                 }
2297                 /* special case for blist as the dependency might go away */
2298                 if (i == EMAC_DEP_PREV_IDX) {
2299                         np = *(dev->blist - 1);
2300                         if (np == NULL) {
2301                                 deps[i].phandle = 0;
2302                                 there++;
2303                                 continue;
2304                         }
2305                         if (deps[i].node == NULL)
2306                                 deps[i].node = of_node_get(np);
2307                 }
2308                 if (deps[i].node == NULL)
2309                         deps[i].node = of_find_node_by_phandle(deps[i].phandle);
2310                 if (deps[i].node == NULL)
2311                         continue;
2312                 if (deps[i].ofdev == NULL)
2313                         deps[i].ofdev = of_find_device_by_node(deps[i].node);
2314                 if (deps[i].ofdev == NULL)
2315                         continue;
2316                 if (deps[i].drvdata == NULL)
2317                         deps[i].drvdata = platform_get_drvdata(deps[i].ofdev);
2318                 if (deps[i].drvdata != NULL)
2319                         there++;
2320         }
2321         return there == EMAC_DEP_COUNT;
2322 }
2323 
2324 static void emac_put_deps(struct emac_instance *dev)
2325 {
2326         if (dev->mal_dev)
2327                 of_dev_put(dev->mal_dev);
2328         if (dev->zmii_dev)
2329                 of_dev_put(dev->zmii_dev);
2330         if (dev->rgmii_dev)
2331                 of_dev_put(dev->rgmii_dev);
2332         if (dev->mdio_dev)
2333                 of_dev_put(dev->mdio_dev);
2334         if (dev->tah_dev)
2335                 of_dev_put(dev->tah_dev);
2336 }
2337 
2338 static int emac_of_bus_notify(struct notifier_block *nb, unsigned long action,
2339                               void *data)
2340 {
2341         /* We are only intereted in device addition */
2342         if (action == BUS_NOTIFY_BOUND_DRIVER)
2343                 wake_up_all(&emac_probe_wait);
2344         return 0;
2345 }
2346 
2347 static struct notifier_block emac_of_bus_notifier = {
2348         .notifier_call = emac_of_bus_notify
2349 };
2350 
2351 static int emac_wait_deps(struct emac_instance *dev)
2352 {
2353         struct emac_depentry deps[EMAC_DEP_COUNT];
2354         int i, err;
2355 
2356         memset(&deps, 0, sizeof(deps));
2357 
2358         deps[EMAC_DEP_MAL_IDX].phandle = dev->mal_ph;
2359         deps[EMAC_DEP_ZMII_IDX].phandle = dev->zmii_ph;
2360         deps[EMAC_DEP_RGMII_IDX].phandle = dev->rgmii_ph;
2361         if (dev->tah_ph)
2362                 deps[EMAC_DEP_TAH_IDX].phandle = dev->tah_ph;
2363         if (dev->mdio_ph)
2364                 deps[EMAC_DEP_MDIO_IDX].phandle = dev->mdio_ph;
2365         if (dev->blist && dev->blist > emac_boot_list)
2366                 deps[EMAC_DEP_PREV_IDX].phandle = 0xffffffffu;
2367         bus_register_notifier(&platform_bus_type, &emac_of_bus_notifier);
2368         wait_event_timeout(emac_probe_wait,
2369                            emac_check_deps(dev, deps),
2370                            EMAC_PROBE_DEP_TIMEOUT);
2371         bus_unregister_notifier(&platform_bus_type, &emac_of_bus_notifier);
2372         err = emac_check_deps(dev, deps) ? 0 : -ENODEV;
2373         for (i = 0; i < EMAC_DEP_COUNT; i++) {
2374                 if (deps[i].node)
2375                         of_node_put(deps[i].node);
2376                 if (err && deps[i].ofdev)
2377                         of_dev_put(deps[i].ofdev);
2378         }
2379         if (err == 0) {
2380                 dev->mal_dev = deps[EMAC_DEP_MAL_IDX].ofdev;
2381                 dev->zmii_dev = deps[EMAC_DEP_ZMII_IDX].ofdev;
2382                 dev->rgmii_dev = deps[EMAC_DEP_RGMII_IDX].ofdev;
2383                 dev->tah_dev = deps[EMAC_DEP_TAH_IDX].ofdev;
2384                 dev->mdio_dev = deps[EMAC_DEP_MDIO_IDX].ofdev;
2385         }
2386         if (deps[EMAC_DEP_PREV_IDX].ofdev)
2387                 of_dev_put(deps[EMAC_DEP_PREV_IDX].ofdev);
2388         return err;
2389 }
2390 
2391 static int emac_read_uint_prop(struct device_node *np, const char *name,
2392                                u32 *val, int fatal)
2393 {
2394         int len;
2395         const u32 *prop = of_get_property(np, name, &len);
2396         if (prop == NULL || len < sizeof(u32)) {
2397                 if (fatal)
2398                         printk(KERN_ERR "%s: missing %s property\n",
2399                                np->full_name, name);
2400                 return -ENODEV;
2401         }
2402         *val = *prop;
2403         return 0;
2404 }
2405 
2406 static int emac_init_phy(struct emac_instance *dev)
2407 {
2408         struct device_node *np = dev->ofdev->dev.of_node;
2409         struct net_device *ndev = dev->ndev;
2410         u32 phy_map, adv;
2411         int i;
2412 
2413         dev->phy.dev = ndev;
2414         dev->phy.mode = dev->phy_mode;
2415 
2416         /* PHY-less configuration.
2417          * XXX I probably should move these settings to the dev tree
2418          */
2419         if (dev->phy_address == 0xffffffff && dev->phy_map == 0xffffffff) {
2420                 emac_reset(dev);
2421 
2422                 /* PHY-less configuration.
2423                  * XXX I probably should move these settings to the dev tree
2424                  */
2425                 dev->phy.address = -1;
2426                 dev->phy.features = SUPPORTED_MII;
2427                 if (emac_phy_supports_gige(dev->phy_mode))
2428                         dev->phy.features |= SUPPORTED_1000baseT_Full;
2429                 else
2430                         dev->phy.features |= SUPPORTED_100baseT_Full;
2431                 dev->phy.pause = 1;
2432 
2433                 return 0;
2434         }
2435 
2436         mutex_lock(&emac_phy_map_lock);
2437         phy_map = dev->phy_map | busy_phy_map;
2438 
2439         DBG(dev, "PHY maps %08x %08x" NL, dev->phy_map, busy_phy_map);
2440 
2441         dev->phy.mdio_read = emac_mdio_read;
2442         dev->phy.mdio_write = emac_mdio_write;
2443 
2444         /* Enable internal clock source */
2445 #ifdef CONFIG_PPC_DCR_NATIVE
2446         if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
2447                 dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS);
2448 #endif
2449         /* PHY clock workaround */
2450         emac_rx_clk_tx(dev);
2451 
2452         /* Enable internal clock source on 440GX*/
2453 #ifdef CONFIG_PPC_DCR_NATIVE
2454         if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
2455                 dcri_clrset(SDR0, SDR0_MFR, 0, SDR0_MFR_ECS);
2456 #endif
2457         /* Configure EMAC with defaults so we can at least use MDIO
2458          * This is needed mostly for 440GX
2459          */
2460         if (emac_phy_gpcs(dev->phy.mode)) {
2461                 /* XXX
2462                  * Make GPCS PHY address equal to EMAC index.
2463                  * We probably should take into account busy_phy_map
2464                  * and/or phy_map here.
2465                  *
2466                  * Note that the busy_phy_map is currently global
2467                  * while it should probably be per-ASIC...
2468                  */
2469                 dev->phy.gpcs_address = dev->gpcs_address;
2470                 if (dev->phy.gpcs_address == 0xffffffff)
2471                         dev->phy.address = dev->cell_index;
2472         }
2473 
2474         emac_configure(dev);
2475 
2476         if (dev->phy_address != 0xffffffff)
2477                 phy_map = ~(1 << dev->phy_address);
2478 
2479         for (i = 0; i < 0x20; phy_map >>= 1, ++i)
2480                 if (!(phy_map & 1)) {
2481                         int r;
2482                         busy_phy_map |= 1 << i;
2483 
2484                         /* Quick check if there is a PHY at the address */
2485                         r = emac_mdio_read(dev->ndev, i, MII_BMCR);
2486                         if (r == 0xffff || r < 0)
2487                                 continue;
2488                         if (!emac_mii_phy_probe(&dev->phy, i))
2489                                 break;
2490                 }
2491 
2492         /* Enable external clock source */
2493 #ifdef CONFIG_PPC_DCR_NATIVE
2494         if (emac_has_feature(dev, EMAC_FTR_440GX_PHY_CLK_FIX))
2495                 dcri_clrset(SDR0, SDR0_MFR, SDR0_MFR_ECS, 0);
2496 #endif
2497         mutex_unlock(&emac_phy_map_lock);
2498         if (i == 0x20) {
2499                 printk(KERN_WARNING "%s: can't find PHY!\n", np->full_name);
2500                 return -ENXIO;
2501         }
2502 
2503         /* Init PHY */
2504         if (dev->phy.def->ops->init)
2505                 dev->phy.def->ops->init(&dev->phy);
2506 
2507         /* Disable any PHY features not supported by the platform */
2508         dev->phy.def->features &= ~dev->phy_feat_exc;
2509         dev->phy.features &= ~dev->phy_feat_exc;
2510 
2511         /* Setup initial link parameters */
2512         if (dev->phy.features & SUPPORTED_Autoneg) {
2513                 adv = dev->phy.features;
2514                 if (!emac_has_feature(dev, EMAC_FTR_NO_FLOW_CONTROL_40x))
2515                         adv |= ADVERTISED_Pause | ADVERTISED_Asym_Pause;
2516                 /* Restart autonegotiation */
2517                 dev->phy.def->ops->setup_aneg(&dev->phy, adv);
2518         } else {
2519                 u32 f = dev->phy.def->features;
2520                 int speed = SPEED_10, fd = DUPLEX_HALF;
2521 
2522                 /* Select highest supported speed/duplex */
2523                 if (f & SUPPORTED_1000baseT_Full) {
2524                         speed = SPEED_1000;
2525                         fd = DUPLEX_FULL;
2526                 } else if (f & SUPPORTED_1000baseT_Half)
2527                         speed = SPEED_1000;
2528                 else if (f & SUPPORTED_100baseT_Full) {
2529                         speed = SPEED_100;
2530                         fd = DUPLEX_FULL;
2531                 } else if (f & SUPPORTED_100baseT_Half)
2532                         speed = SPEED_100;
2533                 else if (f & SUPPORTED_10baseT_Full)
2534                         fd = DUPLEX_FULL;
2535 
2536                 /* Force link parameters */
2537                 dev->phy.def->ops->setup_forced(&dev->phy, speed, fd);
2538         }
2539         return 0;
2540 }
2541 
2542 static int emac_init_config(struct emac_instance *dev)
2543 {
2544         struct device_node *np = dev->ofdev->dev.of_node;
2545         const void *p;
2546 
2547         /* Read config from device-tree */
2548         if (emac_read_uint_prop(np, "mal-device", &dev->mal_ph, 1))
2549                 return -ENXIO;
2550         if (emac_read_uint_prop(np, "mal-tx-channel", &dev->mal_tx_chan, 1))
2551                 return -ENXIO;
2552         if (emac_read_uint_prop(np, "mal-rx-channel", &dev->mal_rx_chan, 1))
2553                 return -ENXIO;
2554         if (emac_read_uint_prop(np, "cell-index", &dev->cell_index, 1))
2555                 return -ENXIO;
2556         if (emac_read_uint_prop(np, "max-frame-size", &dev->max_mtu, 0))
2557                 dev->max_mtu = 1500;
2558         if (emac_read_uint_prop(np, "rx-fifo-size", &dev->rx_fifo_size, 0))
2559                 dev->rx_fifo_size = 2048;
2560         if (emac_read_uint_prop(np, "tx-fifo-size", &dev->tx_fifo_size, 0))
2561                 dev->tx_fifo_size = 2048;
2562         if (emac_read_uint_prop(np, "rx-fifo-size-gige", &dev->rx_fifo_size_gige, 0))
2563                 dev->rx_fifo_size_gige = dev->rx_fifo_size;
2564         if (emac_read_uint_prop(np, "tx-fifo-size-gige", &dev->tx_fifo_size_gige, 0))
2565                 dev->tx_fifo_size_gige = dev->tx_fifo_size;
2566         if (emac_read_uint_prop(np, "phy-address", &dev->phy_address, 0))
2567                 dev->phy_address = 0xffffffff;
2568         if (emac_read_uint_prop(np, "phy-map", &dev->phy_map, 0))
2569                 dev->phy_map = 0xffffffff;
2570         if (emac_read_uint_prop(np, "gpcs-address", &dev->gpcs_address, 0))
2571                 dev->gpcs_address = 0xffffffff;
2572         if (emac_read_uint_prop(np->parent, "clock-frequency", &dev->opb_bus_freq, 1))
2573                 return -ENXIO;
2574         if (emac_read_uint_prop(np, "tah-device", &dev->tah_ph, 0))
2575                 dev->tah_ph = 0;
2576         if (emac_read_uint_prop(np, "tah-channel", &dev->tah_port, 0))
2577                 dev->tah_port = 0;
2578         if (emac_read_uint_prop(np, "mdio-device", &dev->mdio_ph, 0))
2579                 dev->mdio_ph = 0;
2580         if (emac_read_uint_prop(np, "zmii-device", &dev->zmii_ph, 0))
2581                 dev->zmii_ph = 0;
2582         if (emac_read_uint_prop(np, "zmii-channel", &dev->zmii_port, 0))
2583                 dev->zmii_port = 0xffffffff;
2584         if (emac_read_uint_prop(np, "rgmii-device", &dev->rgmii_ph, 0))
2585                 dev->rgmii_ph = 0;
2586         if (emac_read_uint_prop(np, "rgmii-channel", &dev->rgmii_port, 0))
2587                 dev->rgmii_port = 0xffffffff;
2588         if (emac_read_uint_prop(np, "fifo-entry-size", &dev->fifo_entry_size, 0))
2589                 dev->fifo_entry_size = 16;
2590         if (emac_read_uint_prop(np, "mal-burst-size", &dev->mal_burst_size, 0))
2591                 dev->mal_burst_size = 256;
2592 
2593         /* PHY mode needs some decoding */
2594         dev->phy_mode = of_get_phy_mode(np);
2595         if (dev->phy_mode < 0)
2596                 dev->phy_mode = PHY_MODE_NA;
2597 
2598         /* Check EMAC version */
2599         if (of_device_is_compatible(np, "ibm,emac4sync")) {
2600                 dev->features |= (EMAC_FTR_EMAC4 | EMAC_FTR_EMAC4SYNC);
2601                 if (of_device_is_compatible(np, "ibm,emac-460ex") ||
2602                     of_device_is_compatible(np, "ibm,emac-460gt"))
2603                         dev->features |= EMAC_FTR_460EX_PHY_CLK_FIX;
2604                 if (of_device_is_compatible(np, "ibm,emac-405ex") ||
2605                     of_device_is_compatible(np, "ibm,emac-405exr"))
2606                         dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
2607                 if (of_device_is_compatible(np, "ibm,emac-apm821xx")) {
2608                         dev->features |= (EMAC_APM821XX_REQ_JUMBO_FRAME_SIZE |
2609                                           EMAC_FTR_APM821XX_NO_HALF_DUPLEX |
2610                                           EMAC_FTR_460EX_PHY_CLK_FIX);
2611                 }
2612         } else if (of_device_is_compatible(np, "ibm,emac4")) {
2613                 dev->features |= EMAC_FTR_EMAC4;
2614                 if (of_device_is_compatible(np, "ibm,emac-440gx"))
2615                         dev->features |= EMAC_FTR_440GX_PHY_CLK_FIX;
2616         } else {
2617                 if (of_device_is_compatible(np, "ibm,emac-440ep") ||
2618                     of_device_is_compatible(np, "ibm,emac-440gr"))
2619                         dev->features |= EMAC_FTR_440EP_PHY_CLK_FIX;
2620                 if (of_device_is_compatible(np, "ibm,emac-405ez")) {
2621 #ifdef CONFIG_IBM_EMAC_NO_FLOW_CTRL
2622                         dev->features |= EMAC_FTR_NO_FLOW_CONTROL_40x;
2623 #else
2624                         printk(KERN_ERR "%s: Flow control not disabled!\n",
2625                                         np->full_name);
2626                         return -ENXIO;
2627 #endif
2628                 }
2629 
2630         }
2631 
2632         /* Fixup some feature bits based on the device tree */
2633         if (of_get_property(np, "has-inverted-stacr-oc", NULL))
2634                 dev->features |= EMAC_FTR_STACR_OC_INVERT;
2635         if (of_get_property(np, "has-new-stacr-staopc", NULL))
2636                 dev->features |= EMAC_FTR_HAS_NEW_STACR;
2637 
2638         /* CAB lacks the appropriate properties */
2639         if (of_device_is_compatible(np, "ibm,emac-axon"))
2640                 dev->features |= EMAC_FTR_HAS_NEW_STACR |
2641                         EMAC_FTR_STACR_OC_INVERT;
2642 
2643         /* Enable TAH/ZMII/RGMII features as found */
2644         if (dev->tah_ph != 0) {
2645 #ifdef CONFIG_IBM_EMAC_TAH
2646                 dev->features |= EMAC_FTR_HAS_TAH;
2647 #else
2648                 printk(KERN_ERR "%s: TAH support not enabled !\n",
2649                        np->full_name);
2650                 return -ENXIO;
2651 #endif
2652         }
2653 
2654         if (dev->zmii_ph != 0) {
2655 #ifdef CONFIG_IBM_EMAC_ZMII
2656                 dev->features |= EMAC_FTR_HAS_ZMII;
2657 #else
2658                 printk(KERN_ERR "%s: ZMII support not enabled !\n",
2659                        np->full_name);
2660                 return -ENXIO;
2661 #endif
2662         }
2663 
2664         if (dev->rgmii_ph != 0) {
2665 #ifdef CONFIG_IBM_EMAC_RGMII
2666                 dev->features |= EMAC_FTR_HAS_RGMII;
2667 #else
2668                 printk(KERN_ERR "%s: RGMII support not enabled !\n",
2669                        np->full_name);
2670                 return -ENXIO;
2671 #endif
2672         }
2673 
2674         /* Read MAC-address */
2675         p = of_get_property(np, "local-mac-address", NULL);
2676         if (p == NULL) {
2677                 printk(KERN_ERR "%s: Can't find local-mac-address property\n",
2678                        np->full_name);
2679                 return -ENXIO;
2680         }
2681         memcpy(dev->ndev->dev_addr, p, ETH_ALEN);
2682 
2683         /* IAHT and GAHT filter parameterization */
2684         if (emac_has_feature(dev, EMAC_FTR_EMAC4SYNC)) {
2685                 dev->xaht_slots_shift = EMAC4SYNC_XAHT_SLOTS_SHIFT;
2686                 dev->xaht_width_shift = EMAC4SYNC_XAHT_WIDTH_SHIFT;
2687         } else {
2688                 dev->xaht_slots_shift = EMAC4_XAHT_SLOTS_SHIFT;
2689                 dev->xaht_width_shift = EMAC4_XAHT_WIDTH_SHIFT;
2690         }
2691 
2692         DBG(dev, "features     : 0x%08x / 0x%08x\n", dev->features, EMAC_FTRS_POSSIBLE);
2693         DBG(dev, "tx_fifo_size : %d (%d gige)\n", dev->tx_fifo_size, dev->tx_fifo_size_gige);
2694         DBG(dev, "rx_fifo_size : %d (%d gige)\n", dev->rx_fifo_size, dev->rx_fifo_size_gige);
2695         DBG(dev, "max_mtu      : %d\n", dev->max_mtu);
2696         DBG(dev, "OPB freq     : %d\n", dev->opb_bus_freq);
2697 
2698         return 0;
2699 }
2700 
2701 static const struct net_device_ops emac_netdev_ops = {
2702         .ndo_open               = emac_open,
2703         .ndo_stop               = emac_close,
2704         .ndo_get_stats          = emac_stats,
2705         .ndo_set_rx_mode        = emac_set_multicast_list,
2706         .ndo_do_ioctl           = emac_ioctl,
2707         .ndo_tx_timeout         = emac_tx_timeout,
2708         .ndo_validate_addr      = eth_validate_addr,
2709         .ndo_set_mac_address    = eth_mac_addr,
2710         .ndo_start_xmit         = emac_start_xmit,
2711         .ndo_change_mtu         = eth_change_mtu,
2712 };
2713 
2714 static const struct net_device_ops emac_gige_netdev_ops = {
2715         .ndo_open               = emac_open,
2716         .ndo_stop               = emac_close,
2717         .ndo_get_stats          = emac_stats,
2718         .ndo_set_rx_mode        = emac_set_multicast_list,
2719         .ndo_do_ioctl           = emac_ioctl,
2720         .ndo_tx_timeout         = emac_tx_timeout,
2721         .ndo_validate_addr      = eth_validate_addr,
2722         .ndo_set_mac_address    = eth_mac_addr,
2723         .ndo_start_xmit         = emac_start_xmit_sg,
2724         .ndo_change_mtu         = emac_change_mtu,
2725 };
2726 
2727 static int emac_probe(struct platform_device *ofdev)
2728 {
2729         struct net_device *ndev;
2730         struct emac_instance *dev;
2731         struct device_node *np = ofdev->dev.of_node;
2732         struct device_node **blist = NULL;
2733         int err, i;
2734 
2735         /* Skip unused/unwired EMACS.  We leave the check for an unused
2736          * property here for now, but new flat device trees should set a
2737          * status property to "disabled" instead.
2738          */
2739         if (of_get_property(np, "unused", NULL) || !of_device_is_available(np))
2740                 return -ENODEV;
2741 
2742         /* Find ourselves in the bootlist if we are there */
2743         for (i = 0; i < EMAC_BOOT_LIST_SIZE; i++)
2744                 if (emac_boot_list[i] == np)
2745                         blist = &emac_boot_list[i];
2746 
2747         /* Allocate our net_device structure */
2748         err = -ENOMEM;
2749         ndev = alloc_etherdev(sizeof(struct emac_instance));
2750         if (!ndev)
2751                 goto err_gone;
2752 
2753         dev = netdev_priv(ndev);
2754         dev->ndev = ndev;
2755         dev->ofdev = ofdev;
2756         dev->blist = blist;
2757         SET_NETDEV_DEV(ndev, &ofdev->dev);
2758 
2759         /* Initialize some embedded data structures */
2760         mutex_init(&dev->mdio_lock);
2761         mutex_init(&dev->link_lock);
2762         spin_lock_init(&dev->lock);
2763         INIT_WORK(&dev->reset_work, emac_reset_work);
2764 
2765         /* Init various config data based on device-tree */
2766         err = emac_init_config(dev);
2767         if (err != 0)
2768                 goto err_free;
2769 
2770         /* Get interrupts. EMAC irq is mandatory, WOL irq is optional */
2771         dev->emac_irq = irq_of_parse_and_map(np, 0);
2772         dev->wol_irq = irq_of_parse_and_map(np, 1);
2773         if (dev->emac_irq == NO_IRQ) {
2774                 printk(KERN_ERR "%s: Can't map main interrupt\n", np->full_name);
2775                 goto err_free;
2776         }
2777         ndev->irq = dev->emac_irq;
2778 
2779         /* Map EMAC regs */
2780         if (of_address_to_resource(np, 0, &dev->rsrc_regs)) {
2781                 printk(KERN_ERR "%s: Can't get registers address\n",
2782                        np->full_name);
2783                 goto err_irq_unmap;
2784         }
2785         // TODO : request_mem_region
2786         dev->emacp = ioremap(dev->rsrc_regs.start,
2787                              resource_size(&dev->rsrc_regs));
2788         if (dev->emacp == NULL) {
2789                 printk(KERN_ERR "%s: Can't map device registers!\n",
2790                        np->full_name);
2791                 err = -ENOMEM;
2792                 goto err_irq_unmap;
2793         }
2794 
2795         /* Wait for dependent devices */
2796         err = emac_wait_deps(dev);
2797         if (err) {
2798                 printk(KERN_ERR
2799                        "%s: Timeout waiting for dependent devices\n",
2800                        np->full_name);
2801                 /*  display more info about what's missing ? */
2802                 goto err_reg_unmap;
2803         }
2804         dev->mal = platform_get_drvdata(dev->mal_dev);
2805         if (dev->mdio_dev != NULL)
2806                 dev->mdio_instance = platform_get_drvdata(dev->mdio_dev);
2807 
2808         /* Register with MAL */
2809         dev->commac.ops = &emac_commac_ops;
2810         dev->commac.dev = dev;
2811         dev->commac.tx_chan_mask = MAL_CHAN_MASK(dev->mal_tx_chan);
2812         dev->commac.rx_chan_mask = MAL_CHAN_MASK(dev->mal_rx_chan);
2813         err = mal_register_commac(dev->mal, &dev->commac);
2814         if (err) {
2815                 printk(KERN_ERR "%s: failed to register with mal %s!\n",
2816                        np->full_name, dev->mal_dev->dev.of_node->full_name);
2817                 goto err_rel_deps;
2818         }
2819         dev->rx_skb_size = emac_rx_skb_size(ndev->mtu);
2820         dev->rx_sync_size = emac_rx_sync_size(ndev->mtu);
2821 
2822         /* Get pointers to BD rings */
2823         dev->tx_desc =
2824             dev->mal->bd_virt + mal_tx_bd_offset(dev->mal, dev->mal_tx_chan);
2825         dev->rx_desc =
2826             dev->mal->bd_virt + mal_rx_bd_offset(dev->mal, dev->mal_rx_chan);
2827 
2828         DBG(dev, "tx_desc %p" NL, dev->tx_desc);
2829         DBG(dev, "rx_desc %p" NL, dev->rx_desc);
2830 
2831         /* Clean rings */
2832         memset(dev->tx_desc, 0, NUM_TX_BUFF * sizeof(struct mal_descriptor));
2833         memset(dev->rx_desc, 0, NUM_RX_BUFF * sizeof(struct mal_descriptor));
2834         memset(dev->tx_skb, 0, NUM_TX_BUFF * sizeof(struct sk_buff *));
2835         memset(dev->rx_skb, 0, NUM_RX_BUFF * sizeof(struct sk_buff *));
2836 
2837         /* Attach to ZMII, if needed */
2838         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII) &&
2839             (err = zmii_attach(dev->zmii_dev, dev->zmii_port, &dev->phy_mode)) != 0)
2840                 goto err_unreg_commac;
2841 
2842         /* Attach to RGMII, if needed */
2843         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII) &&
2844             (err = rgmii_attach(dev->rgmii_dev, dev->rgmii_port, dev->phy_mode)) != 0)
2845                 goto err_detach_zmii;
2846 
2847         /* Attach to TAH, if needed */
2848         if (emac_has_feature(dev, EMAC_FTR_HAS_TAH) &&
2849             (err = tah_attach(dev->tah_dev, dev->tah_port)) != 0)
2850                 goto err_detach_rgmii;
2851 
2852         /* Set some link defaults before we can find out real parameters */
2853         dev->phy.speed = SPEED_100;
2854         dev->phy.duplex = DUPLEX_FULL;
2855         dev->phy.autoneg = AUTONEG_DISABLE;
2856         dev->phy.pause = dev->phy.asym_pause = 0;
2857         dev->stop_timeout = STOP_TIMEOUT_100;
2858         INIT_DELAYED_WORK(&dev->link_work, emac_link_timer);
2859 
2860         /* Some SoCs like APM821xx does not support Half Duplex mode. */
2861         if (emac_has_feature(dev, EMAC_FTR_APM821XX_NO_HALF_DUPLEX)) {
2862                 dev->phy_feat_exc = (SUPPORTED_1000baseT_Half |
2863                                      SUPPORTED_100baseT_Half |
2864                                      SUPPORTED_10baseT_Half);
2865         }
2866 
2867         /* Find PHY if any */
2868         err = emac_init_phy(dev);
2869         if (err != 0)
2870                 goto err_detach_tah;
2871 
2872         if (dev->tah_dev) {
2873                 ndev->hw_features = NETIF_F_IP_CSUM | NETIF_F_SG;
2874                 ndev->features |= ndev->hw_features | NETIF_F_RXCSUM;
2875         }
2876         ndev->watchdog_timeo = 5 * HZ;
2877         if (emac_phy_supports_gige(dev->phy_mode)) {
2878                 ndev->netdev_ops = &emac_gige_netdev_ops;
2879                 dev->commac.ops = &emac_commac_sg_ops;
2880         } else
2881                 ndev->netdev_ops = &emac_netdev_ops;
2882         SET_ETHTOOL_OPS(ndev, &emac_ethtool_ops);
2883 
2884         netif_carrier_off(ndev);
2885 
2886         err = register_netdev(ndev);
2887         if (err) {
2888                 printk(KERN_ERR "%s: failed to register net device (%d)!\n",
2889                        np->full_name, err);
2890                 goto err_detach_tah;
2891         }
2892 
2893         /* Set our drvdata last as we don't want them visible until we are
2894          * fully initialized
2895          */
2896         wmb();
2897         platform_set_drvdata(ofdev, dev);
2898 
2899         /* There's a new kid in town ! Let's tell everybody */
2900         wake_up_all(&emac_probe_wait);
2901 
2902 
2903         printk(KERN_INFO "%s: EMAC-%d %s, MAC %pM\n",
2904                ndev->name, dev->cell_index, np->full_name, ndev->dev_addr);
2905 
2906         if (dev->phy_mode == PHY_MODE_SGMII)
2907                 printk(KERN_NOTICE "%s: in SGMII mode\n", ndev->name);
2908 
2909         if (dev->phy.address >= 0)
2910                 printk("%s: found %s PHY (0x%02x)\n", ndev->name,
2911                        dev->phy.def->name, dev->phy.address);
2912 
2913         emac_dbg_register(dev);
2914 
2915         /* Life is good */
2916         return 0;
2917 
2918         /* I have a bad feeling about this ... */
2919 
2920  err_detach_tah:
2921         if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
2922                 tah_detach(dev->tah_dev, dev->tah_port);
2923  err_detach_rgmii:
2924         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
2925                 rgmii_detach(dev->rgmii_dev, dev->rgmii_port);
2926  err_detach_zmii:
2927         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
2928                 zmii_detach(dev->zmii_dev, dev->zmii_port);
2929  err_unreg_commac:
2930         mal_unregister_commac(dev->mal, &dev->commac);
2931  err_rel_deps:
2932         emac_put_deps(dev);
2933  err_reg_unmap:
2934         iounmap(dev->emacp);
2935  err_irq_unmap:
2936         if (dev->wol_irq != NO_IRQ)
2937                 irq_dispose_mapping(dev->wol_irq);
2938         if (dev->emac_irq != NO_IRQ)
2939                 irq_dispose_mapping(dev->emac_irq);
2940  err_free:
2941         free_netdev(ndev);
2942  err_gone:
2943         /* if we were on the bootlist, remove us as we won't show up and
2944          * wake up all waiters to notify them in case they were waiting
2945          * on us
2946          */
2947         if (blist) {
2948                 *blist = NULL;
2949                 wake_up_all(&emac_probe_wait);
2950         }
2951         return err;
2952 }
2953 
2954 static int emac_remove(struct platform_device *ofdev)
2955 {
2956         struct emac_instance *dev = platform_get_drvdata(ofdev);
2957 
2958         DBG(dev, "remove" NL);
2959 
2960         unregister_netdev(dev->ndev);
2961 
2962         cancel_work_sync(&dev->reset_work);
2963 
2964         if (emac_has_feature(dev, EMAC_FTR_HAS_TAH))
2965                 tah_detach(dev->tah_dev, dev->tah_port);
2966         if (emac_has_feature(dev, EMAC_FTR_HAS_RGMII))
2967                 rgmii_detach(dev->rgmii_dev, dev->rgmii_port);
2968         if (emac_has_feature(dev, EMAC_FTR_HAS_ZMII))
2969                 zmii_detach(dev->zmii_dev, dev->zmii_port);
2970 
2971         busy_phy_map &= ~(1 << dev->phy.address);
2972         DBG(dev, "busy_phy_map now %#x" NL, busy_phy_map);
2973 
2974         mal_unregister_commac(dev->mal, &dev->commac);
2975         emac_put_deps(dev);
2976 
2977         emac_dbg_unregister(dev);
2978         iounmap(dev->emacp);
2979 
2980         if (dev->wol_irq != NO_IRQ)
2981                 irq_dispose_mapping(dev->wol_irq);
2982         if (dev->emac_irq != NO_IRQ)
2983                 irq_dispose_mapping(dev->emac_irq);
2984 
2985         free_netdev(dev->ndev);
2986 
2987         return 0;
2988 }
2989 
2990 /* XXX Features in here should be replaced by properties... */
2991 static struct of_device_id emac_match[] =
2992 {
2993         {
2994                 .type           = "network",
2995                 .compatible     = "ibm,emac",
2996         },
2997         {
2998                 .type           = "network",
2999                 .compatible     = "ibm,emac4",
3000         },
3001         {
3002                 .type           = "network",
3003                 .compatible     = "ibm,emac4sync",
3004         },
3005         {},
3006 };
3007 MODULE_DEVICE_TABLE(of, emac_match);
3008 
3009 static struct platform_driver emac_driver = {
3010         .driver = {
3011                 .name = "emac",
3012                 .owner = THIS_MODULE,
3013                 .of_match_table = emac_match,
3014         },
3015         .probe = emac_probe,
3016         .remove = emac_remove,
3017 };
3018 
3019 static void __init emac_make_bootlist(void)
3020 {
3021         struct device_node *np = NULL;
3022         int j, max, i = 0, k;
3023         int cell_indices[EMAC_BOOT_LIST_SIZE];
3024 
3025         /* Collect EMACs */
3026         while((np = of_find_all_nodes(np)) != NULL) {
3027                 const u32 *idx;
3028 
3029                 if (of_match_node(emac_match, np) == NULL)
3030                         continue;
3031                 if (of_get_property(np, "unused", NULL))
3032                         continue;
3033                 idx = of_get_property(np, "cell-index", NULL);
3034                 if (idx == NULL)
3035                         continue;
3036                 cell_indices[i] = *idx;
3037                 emac_boot_list[i++] = of_node_get(np);
3038                 if (i >= EMAC_BOOT_LIST_SIZE) {
3039                         of_node_put(np);
3040                         break;
3041                 }
3042         }
3043         max = i;
3044 
3045         /* Bubble sort them (doh, what a creative algorithm :-) */
3046         for (i = 0; max > 1 && (i < (max - 1)); i++)
3047                 for (j = i; j < max; j++) {
3048                         if (cell_indices[i] > cell_indices[j]) {
3049                                 np = emac_boot_list[i];
3050                                 emac_boot_list[i] = emac_boot_list[j];
3051                                 emac_boot_list[j] = np;
3052                                 k = cell_indices[i];
3053                                 cell_indices[i] = cell_indices[j];
3054                                 cell_indices[j] = k;
3055                         }
3056                 }
3057 }
3058 
3059 static int __init emac_init(void)
3060 {
3061         int rc;
3062 
3063         printk(KERN_INFO DRV_DESC ", version " DRV_VERSION "\n");
3064 
3065         /* Init debug stuff */
3066         emac_init_debug();
3067 
3068         /* Build EMAC boot list */
3069         emac_make_bootlist();
3070 
3071         /* Init submodules */
3072         rc = mal_init();
3073         if (rc)
3074                 goto err;
3075         rc = zmii_init();
3076         if (rc)
3077                 goto err_mal;
3078         rc = rgmii_init();
3079         if (rc)
3080                 goto err_zmii;
3081         rc = tah_init();
3082         if (rc)
3083                 goto err_rgmii;
3084         rc = platform_driver_register(&emac_driver);
3085         if (rc)
3086                 goto err_tah;
3087 
3088         return 0;
3089 
3090  err_tah:
3091         tah_exit();
3092  err_rgmii:
3093         rgmii_exit();
3094  err_zmii:
3095         zmii_exit();
3096  err_mal:
3097         mal_exit();
3098  err:
3099         return rc;
3100 }
3101 
3102 static void __exit emac_exit(void)
3103 {
3104         int i;
3105 
3106         platform_driver_unregister(&emac_driver);
3107 
3108         tah_exit();
3109         rgmii_exit();
3110         zmii_exit();
3111         mal_exit();
3112         emac_fini_debug();
3113 
3114         /* Destroy EMAC boot list */
3115         for (i = 0; i < EMAC_BOOT_LIST_SIZE; i++)
3116                 if (emac_boot_list[i])
3117                         of_node_put(emac_boot_list[i]);
3118 }
3119 
3120 module_init(emac_init);
3121 module_exit(emac_exit);
3122 

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