Version:  2.0.40 2.2.26 2.4.37 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0

Linux/drivers/net/ethernet/freescale/fec_main.c

  1 /*
  2  * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
  3  * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
  4  *
  5  * Right now, I am very wasteful with the buffers.  I allocate memory
  6  * pages and then divide them into 2K frame buffers.  This way I know I
  7  * have buffers large enough to hold one frame within one buffer descriptor.
  8  * Once I get this working, I will use 64 or 128 byte CPM buffers, which
  9  * will be much more memory efficient and will easily handle lots of
 10  * small packets.
 11  *
 12  * Much better multiple PHY support by Magnus Damm.
 13  * Copyright (c) 2000 Ericsson Radio Systems AB.
 14  *
 15  * Support for FEC controller of ColdFire processors.
 16  * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
 17  *
 18  * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
 19  * Copyright (c) 2004-2006 Macq Electronique SA.
 20  *
 21  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
 22  */
 23 
 24 #include <linux/module.h>
 25 #include <linux/kernel.h>
 26 #include <linux/string.h>
 27 #include <linux/ptrace.h>
 28 #include <linux/errno.h>
 29 #include <linux/ioport.h>
 30 #include <linux/slab.h>
 31 #include <linux/interrupt.h>
 32 #include <linux/delay.h>
 33 #include <linux/netdevice.h>
 34 #include <linux/etherdevice.h>
 35 #include <linux/skbuff.h>
 36 #include <linux/in.h>
 37 #include <linux/ip.h>
 38 #include <net/ip.h>
 39 #include <net/tso.h>
 40 #include <linux/tcp.h>
 41 #include <linux/udp.h>
 42 #include <linux/icmp.h>
 43 #include <linux/spinlock.h>
 44 #include <linux/workqueue.h>
 45 #include <linux/bitops.h>
 46 #include <linux/io.h>
 47 #include <linux/irq.h>
 48 #include <linux/clk.h>
 49 #include <linux/platform_device.h>
 50 #include <linux/phy.h>
 51 #include <linux/fec.h>
 52 #include <linux/of.h>
 53 #include <linux/of_device.h>
 54 #include <linux/of_gpio.h>
 55 #include <linux/of_mdio.h>
 56 #include <linux/of_net.h>
 57 #include <linux/regulator/consumer.h>
 58 #include <linux/if_vlan.h>
 59 #include <linux/pinctrl/consumer.h>
 60 #include <linux/prefetch.h>
 61 
 62 #include <asm/cacheflush.h>
 63 
 64 #include "fec.h"
 65 
 66 static void set_multicast_list(struct net_device *ndev);
 67 static void fec_enet_itr_coal_init(struct net_device *ndev);
 68 
 69 #define DRIVER_NAME     "fec"
 70 
 71 #define FEC_ENET_GET_QUQUE(_x) ((_x == 0) ? 1 : ((_x == 1) ? 2 : 0))
 72 
 73 /* Pause frame feild and FIFO threshold */
 74 #define FEC_ENET_FCE    (1 << 5)
 75 #define FEC_ENET_RSEM_V 0x84
 76 #define FEC_ENET_RSFL_V 16
 77 #define FEC_ENET_RAEM_V 0x8
 78 #define FEC_ENET_RAFL_V 0x8
 79 #define FEC_ENET_OPD_V  0xFFF0
 80 
 81 static struct platform_device_id fec_devtype[] = {
 82         {
 83                 /* keep it for coldfire */
 84                 .name = DRIVER_NAME,
 85                 .driver_data = 0,
 86         }, {
 87                 .name = "imx25-fec",
 88                 .driver_data = FEC_QUIRK_USE_GASKET,
 89         }, {
 90                 .name = "imx27-fec",
 91                 .driver_data = 0,
 92         }, {
 93                 .name = "imx28-fec",
 94                 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME |
 95                                 FEC_QUIRK_SINGLE_MDIO,
 96         }, {
 97                 .name = "imx6q-fec",
 98                 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
 99                                 FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
100                                 FEC_QUIRK_HAS_VLAN | FEC_QUIRK_ERR006358,
101         }, {
102                 .name = "mvf600-fec",
103                 .driver_data = FEC_QUIRK_ENET_MAC,
104         }, {
105                 .name = "imx6sx-fec",
106                 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
107                                 FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
108                                 FEC_QUIRK_HAS_VLAN | FEC_QUIRK_HAS_AVB |
109                                 FEC_QUIRK_ERR007885 | FEC_QUIRK_BUG_CAPTURE,
110         }, {
111                 /* sentinel */
112         }
113 };
114 MODULE_DEVICE_TABLE(platform, fec_devtype);
115 
116 enum imx_fec_type {
117         IMX25_FEC = 1,  /* runs on i.mx25/50/53 */
118         IMX27_FEC,      /* runs on i.mx27/35/51 */
119         IMX28_FEC,
120         IMX6Q_FEC,
121         MVF600_FEC,
122         IMX6SX_FEC,
123 };
124 
125 static const struct of_device_id fec_dt_ids[] = {
126         { .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
127         { .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
128         { .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
129         { .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
130         { .compatible = "fsl,mvf600-fec", .data = &fec_devtype[MVF600_FEC], },
131         { .compatible = "fsl,imx6sx-fec", .data = &fec_devtype[IMX6SX_FEC], },
132         { /* sentinel */ }
133 };
134 MODULE_DEVICE_TABLE(of, fec_dt_ids);
135 
136 static unsigned char macaddr[ETH_ALEN];
137 module_param_array(macaddr, byte, NULL, 0);
138 MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
139 
140 #if defined(CONFIG_M5272)
141 /*
142  * Some hardware gets it MAC address out of local flash memory.
143  * if this is non-zero then assume it is the address to get MAC from.
144  */
145 #if defined(CONFIG_NETtel)
146 #define FEC_FLASHMAC    0xf0006006
147 #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
148 #define FEC_FLASHMAC    0xf0006000
149 #elif defined(CONFIG_CANCam)
150 #define FEC_FLASHMAC    0xf0020000
151 #elif defined (CONFIG_M5272C3)
152 #define FEC_FLASHMAC    (0xffe04000 + 4)
153 #elif defined(CONFIG_MOD5272)
154 #define FEC_FLASHMAC    0xffc0406b
155 #else
156 #define FEC_FLASHMAC    0
157 #endif
158 #endif /* CONFIG_M5272 */
159 
160 /* The FEC stores dest/src/type/vlan, data, and checksum for receive packets.
161  */
162 #define PKT_MAXBUF_SIZE         1522
163 #define PKT_MINBUF_SIZE         64
164 #define PKT_MAXBLR_SIZE         1536
165 
166 /* FEC receive acceleration */
167 #define FEC_RACC_IPDIS          (1 << 1)
168 #define FEC_RACC_PRODIS         (1 << 2)
169 #define FEC_RACC_OPTIONS        (FEC_RACC_IPDIS | FEC_RACC_PRODIS)
170 
171 /*
172  * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
173  * size bits. Other FEC hardware does not, so we need to take that into
174  * account when setting it.
175  */
176 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
177     defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM)
178 #define OPT_FRAME_SIZE  (PKT_MAXBUF_SIZE << 16)
179 #else
180 #define OPT_FRAME_SIZE  0
181 #endif
182 
183 /* FEC MII MMFR bits definition */
184 #define FEC_MMFR_ST             (1 << 30)
185 #define FEC_MMFR_OP_READ        (2 << 28)
186 #define FEC_MMFR_OP_WRITE       (1 << 28)
187 #define FEC_MMFR_PA(v)          ((v & 0x1f) << 23)
188 #define FEC_MMFR_RA(v)          ((v & 0x1f) << 18)
189 #define FEC_MMFR_TA             (2 << 16)
190 #define FEC_MMFR_DATA(v)        (v & 0xffff)
191 /* FEC ECR bits definition */
192 #define FEC_ECR_MAGICEN         (1 << 2)
193 #define FEC_ECR_SLEEP           (1 << 3)
194 
195 #define FEC_MII_TIMEOUT         30000 /* us */
196 
197 /* Transmitter timeout */
198 #define TX_TIMEOUT (2 * HZ)
199 
200 #define FEC_PAUSE_FLAG_AUTONEG  0x1
201 #define FEC_PAUSE_FLAG_ENABLE   0x2
202 #define FEC_WOL_HAS_MAGIC_PACKET        (0x1 << 0)
203 #define FEC_WOL_FLAG_ENABLE             (0x1 << 1)
204 #define FEC_WOL_FLAG_SLEEP_ON           (0x1 << 2)
205 
206 #define COPYBREAK_DEFAULT       256
207 
208 #define TSO_HEADER_SIZE         128
209 /* Max number of allowed TCP segments for software TSO */
210 #define FEC_MAX_TSO_SEGS        100
211 #define FEC_MAX_SKB_DESCS       (FEC_MAX_TSO_SEGS * 2 + MAX_SKB_FRAGS)
212 
213 #define IS_TSO_HEADER(txq, addr) \
214         ((addr >= txq->tso_hdrs_dma) && \
215         (addr < txq->tso_hdrs_dma + txq->tx_ring_size * TSO_HEADER_SIZE))
216 
217 static int mii_cnt;
218 
219 static inline
220 struct bufdesc *fec_enet_get_nextdesc(struct bufdesc *bdp,
221                                       struct fec_enet_private *fep,
222                                       int queue_id)
223 {
224         struct bufdesc *new_bd = bdp + 1;
225         struct bufdesc_ex *ex_new_bd = (struct bufdesc_ex *)bdp + 1;
226         struct fec_enet_priv_tx_q *txq = fep->tx_queue[queue_id];
227         struct fec_enet_priv_rx_q *rxq = fep->rx_queue[queue_id];
228         struct bufdesc_ex *ex_base;
229         struct bufdesc *base;
230         int ring_size;
231 
232         if (bdp >= txq->tx_bd_base) {
233                 base = txq->tx_bd_base;
234                 ring_size = txq->tx_ring_size;
235                 ex_base = (struct bufdesc_ex *)txq->tx_bd_base;
236         } else {
237                 base = rxq->rx_bd_base;
238                 ring_size = rxq->rx_ring_size;
239                 ex_base = (struct bufdesc_ex *)rxq->rx_bd_base;
240         }
241 
242         if (fep->bufdesc_ex)
243                 return (struct bufdesc *)((ex_new_bd >= (ex_base + ring_size)) ?
244                         ex_base : ex_new_bd);
245         else
246                 return (new_bd >= (base + ring_size)) ?
247                         base : new_bd;
248 }
249 
250 static inline
251 struct bufdesc *fec_enet_get_prevdesc(struct bufdesc *bdp,
252                                       struct fec_enet_private *fep,
253                                       int queue_id)
254 {
255         struct bufdesc *new_bd = bdp - 1;
256         struct bufdesc_ex *ex_new_bd = (struct bufdesc_ex *)bdp - 1;
257         struct fec_enet_priv_tx_q *txq = fep->tx_queue[queue_id];
258         struct fec_enet_priv_rx_q *rxq = fep->rx_queue[queue_id];
259         struct bufdesc_ex *ex_base;
260         struct bufdesc *base;
261         int ring_size;
262 
263         if (bdp >= txq->tx_bd_base) {
264                 base = txq->tx_bd_base;
265                 ring_size = txq->tx_ring_size;
266                 ex_base = (struct bufdesc_ex *)txq->tx_bd_base;
267         } else {
268                 base = rxq->rx_bd_base;
269                 ring_size = rxq->rx_ring_size;
270                 ex_base = (struct bufdesc_ex *)rxq->rx_bd_base;
271         }
272 
273         if (fep->bufdesc_ex)
274                 return (struct bufdesc *)((ex_new_bd < ex_base) ?
275                         (ex_new_bd + ring_size) : ex_new_bd);
276         else
277                 return (new_bd < base) ? (new_bd + ring_size) : new_bd;
278 }
279 
280 static int fec_enet_get_bd_index(struct bufdesc *base, struct bufdesc *bdp,
281                                 struct fec_enet_private *fep)
282 {
283         return ((const char *)bdp - (const char *)base) / fep->bufdesc_size;
284 }
285 
286 static int fec_enet_get_free_txdesc_num(struct fec_enet_private *fep,
287                                         struct fec_enet_priv_tx_q *txq)
288 {
289         int entries;
290 
291         entries = ((const char *)txq->dirty_tx -
292                         (const char *)txq->cur_tx) / fep->bufdesc_size - 1;
293 
294         return entries > 0 ? entries : entries + txq->tx_ring_size;
295 }
296 
297 static void swap_buffer(void *bufaddr, int len)
298 {
299         int i;
300         unsigned int *buf = bufaddr;
301 
302         for (i = 0; i < len; i += 4, buf++)
303                 swab32s(buf);
304 }
305 
306 static void swap_buffer2(void *dst_buf, void *src_buf, int len)
307 {
308         int i;
309         unsigned int *src = src_buf;
310         unsigned int *dst = dst_buf;
311 
312         for (i = 0; i < len; i += 4, src++, dst++)
313                 *dst = swab32p(src);
314 }
315 
316 static void fec_dump(struct net_device *ndev)
317 {
318         struct fec_enet_private *fep = netdev_priv(ndev);
319         struct bufdesc *bdp;
320         struct fec_enet_priv_tx_q *txq;
321         int index = 0;
322 
323         netdev_info(ndev, "TX ring dump\n");
324         pr_info("Nr     SC     addr       len  SKB\n");
325 
326         txq = fep->tx_queue[0];
327         bdp = txq->tx_bd_base;
328 
329         do {
330                 pr_info("%3u %c%c 0x%04x 0x%08lx %4u %p\n",
331                         index,
332                         bdp == txq->cur_tx ? 'S' : ' ',
333                         bdp == txq->dirty_tx ? 'H' : ' ',
334                         bdp->cbd_sc, bdp->cbd_bufaddr, bdp->cbd_datlen,
335                         txq->tx_skbuff[index]);
336                 bdp = fec_enet_get_nextdesc(bdp, fep, 0);
337                 index++;
338         } while (bdp != txq->tx_bd_base);
339 }
340 
341 static inline bool is_ipv4_pkt(struct sk_buff *skb)
342 {
343         return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
344 }
345 
346 static int
347 fec_enet_clear_csum(struct sk_buff *skb, struct net_device *ndev)
348 {
349         /* Only run for packets requiring a checksum. */
350         if (skb->ip_summed != CHECKSUM_PARTIAL)
351                 return 0;
352 
353         if (unlikely(skb_cow_head(skb, 0)))
354                 return -1;
355 
356         if (is_ipv4_pkt(skb))
357                 ip_hdr(skb)->check = 0;
358         *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0;
359 
360         return 0;
361 }
362 
363 static int
364 fec_enet_txq_submit_frag_skb(struct fec_enet_priv_tx_q *txq,
365                              struct sk_buff *skb,
366                              struct net_device *ndev)
367 {
368         struct fec_enet_private *fep = netdev_priv(ndev);
369         struct bufdesc *bdp = txq->cur_tx;
370         struct bufdesc_ex *ebdp;
371         int nr_frags = skb_shinfo(skb)->nr_frags;
372         unsigned short queue = skb_get_queue_mapping(skb);
373         int frag, frag_len;
374         unsigned short status;
375         unsigned int estatus = 0;
376         skb_frag_t *this_frag;
377         unsigned int index;
378         void *bufaddr;
379         dma_addr_t addr;
380         int i;
381 
382         for (frag = 0; frag < nr_frags; frag++) {
383                 this_frag = &skb_shinfo(skb)->frags[frag];
384                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
385                 ebdp = (struct bufdesc_ex *)bdp;
386 
387                 status = bdp->cbd_sc;
388                 status &= ~BD_ENET_TX_STATS;
389                 status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
390                 frag_len = skb_shinfo(skb)->frags[frag].size;
391 
392                 /* Handle the last BD specially */
393                 if (frag == nr_frags - 1) {
394                         status |= (BD_ENET_TX_INTR | BD_ENET_TX_LAST);
395                         if (fep->bufdesc_ex) {
396                                 estatus |= BD_ENET_TX_INT;
397                                 if (unlikely(skb_shinfo(skb)->tx_flags &
398                                         SKBTX_HW_TSTAMP && fep->hwts_tx_en))
399                                         estatus |= BD_ENET_TX_TS;
400                         }
401                 }
402 
403                 if (fep->bufdesc_ex) {
404                         if (fep->quirks & FEC_QUIRK_HAS_AVB)
405                                 estatus |= FEC_TX_BD_FTYPE(queue);
406                         if (skb->ip_summed == CHECKSUM_PARTIAL)
407                                 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
408                         ebdp->cbd_bdu = 0;
409                         ebdp->cbd_esc = estatus;
410                 }
411 
412                 bufaddr = page_address(this_frag->page.p) + this_frag->page_offset;
413 
414                 index = fec_enet_get_bd_index(txq->tx_bd_base, bdp, fep);
415                 if (((unsigned long) bufaddr) & fep->tx_align ||
416                         fep->quirks & FEC_QUIRK_SWAP_FRAME) {
417                         memcpy(txq->tx_bounce[index], bufaddr, frag_len);
418                         bufaddr = txq->tx_bounce[index];
419 
420                         if (fep->quirks & FEC_QUIRK_SWAP_FRAME)
421                                 swap_buffer(bufaddr, frag_len);
422                 }
423 
424                 addr = dma_map_single(&fep->pdev->dev, bufaddr, frag_len,
425                                       DMA_TO_DEVICE);
426                 if (dma_mapping_error(&fep->pdev->dev, addr)) {
427                         dev_kfree_skb_any(skb);
428                         if (net_ratelimit())
429                                 netdev_err(ndev, "Tx DMA memory map failed\n");
430                         goto dma_mapping_error;
431                 }
432 
433                 bdp->cbd_bufaddr = addr;
434                 bdp->cbd_datlen = frag_len;
435                 bdp->cbd_sc = status;
436         }
437 
438         txq->cur_tx = bdp;
439 
440         return 0;
441 
442 dma_mapping_error:
443         bdp = txq->cur_tx;
444         for (i = 0; i < frag; i++) {
445                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
446                 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
447                                 bdp->cbd_datlen, DMA_TO_DEVICE);
448         }
449         return NETDEV_TX_OK;
450 }
451 
452 static int fec_enet_txq_submit_skb(struct fec_enet_priv_tx_q *txq,
453                                    struct sk_buff *skb, struct net_device *ndev)
454 {
455         struct fec_enet_private *fep = netdev_priv(ndev);
456         int nr_frags = skb_shinfo(skb)->nr_frags;
457         struct bufdesc *bdp, *last_bdp;
458         void *bufaddr;
459         dma_addr_t addr;
460         unsigned short status;
461         unsigned short buflen;
462         unsigned short queue;
463         unsigned int estatus = 0;
464         unsigned int index;
465         int entries_free;
466         int ret;
467 
468         entries_free = fec_enet_get_free_txdesc_num(fep, txq);
469         if (entries_free < MAX_SKB_FRAGS + 1) {
470                 dev_kfree_skb_any(skb);
471                 if (net_ratelimit())
472                         netdev_err(ndev, "NOT enough BD for SG!\n");
473                 return NETDEV_TX_OK;
474         }
475 
476         /* Protocol checksum off-load for TCP and UDP. */
477         if (fec_enet_clear_csum(skb, ndev)) {
478                 dev_kfree_skb_any(skb);
479                 return NETDEV_TX_OK;
480         }
481 
482         /* Fill in a Tx ring entry */
483         bdp = txq->cur_tx;
484         status = bdp->cbd_sc;
485         status &= ~BD_ENET_TX_STATS;
486 
487         /* Set buffer length and buffer pointer */
488         bufaddr = skb->data;
489         buflen = skb_headlen(skb);
490 
491         queue = skb_get_queue_mapping(skb);
492         index = fec_enet_get_bd_index(txq->tx_bd_base, bdp, fep);
493         if (((unsigned long) bufaddr) & fep->tx_align ||
494                 fep->quirks & FEC_QUIRK_SWAP_FRAME) {
495                 memcpy(txq->tx_bounce[index], skb->data, buflen);
496                 bufaddr = txq->tx_bounce[index];
497 
498                 if (fep->quirks & FEC_QUIRK_SWAP_FRAME)
499                         swap_buffer(bufaddr, buflen);
500         }
501 
502         /* Push the data cache so the CPM does not get stale memory data. */
503         addr = dma_map_single(&fep->pdev->dev, bufaddr, buflen, DMA_TO_DEVICE);
504         if (dma_mapping_error(&fep->pdev->dev, addr)) {
505                 dev_kfree_skb_any(skb);
506                 if (net_ratelimit())
507                         netdev_err(ndev, "Tx DMA memory map failed\n");
508                 return NETDEV_TX_OK;
509         }
510 
511         if (nr_frags) {
512                 ret = fec_enet_txq_submit_frag_skb(txq, skb, ndev);
513                 if (ret)
514                         return ret;
515         } else {
516                 status |= (BD_ENET_TX_INTR | BD_ENET_TX_LAST);
517                 if (fep->bufdesc_ex) {
518                         estatus = BD_ENET_TX_INT;
519                         if (unlikely(skb_shinfo(skb)->tx_flags &
520                                 SKBTX_HW_TSTAMP && fep->hwts_tx_en))
521                                 estatus |= BD_ENET_TX_TS;
522                 }
523         }
524 
525         if (fep->bufdesc_ex) {
526 
527                 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
528 
529                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
530                         fep->hwts_tx_en))
531                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
532 
533                 if (fep->quirks & FEC_QUIRK_HAS_AVB)
534                         estatus |= FEC_TX_BD_FTYPE(queue);
535 
536                 if (skb->ip_summed == CHECKSUM_PARTIAL)
537                         estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
538 
539                 ebdp->cbd_bdu = 0;
540                 ebdp->cbd_esc = estatus;
541         }
542 
543         last_bdp = txq->cur_tx;
544         index = fec_enet_get_bd_index(txq->tx_bd_base, last_bdp, fep);
545         /* Save skb pointer */
546         txq->tx_skbuff[index] = skb;
547 
548         bdp->cbd_datlen = buflen;
549         bdp->cbd_bufaddr = addr;
550 
551         /* Send it on its way.  Tell FEC it's ready, interrupt when done,
552          * it's the last BD of the frame, and to put the CRC on the end.
553          */
554         status |= (BD_ENET_TX_READY | BD_ENET_TX_TC);
555         bdp->cbd_sc = status;
556 
557         /* If this was the last BD in the ring, start at the beginning again. */
558         bdp = fec_enet_get_nextdesc(last_bdp, fep, queue);
559 
560         skb_tx_timestamp(skb);
561 
562         txq->cur_tx = bdp;
563 
564         /* Trigger transmission start */
565         writel(0, fep->hwp + FEC_X_DES_ACTIVE(queue));
566 
567         return 0;
568 }
569 
570 static int
571 fec_enet_txq_put_data_tso(struct fec_enet_priv_tx_q *txq, struct sk_buff *skb,
572                           struct net_device *ndev,
573                           struct bufdesc *bdp, int index, char *data,
574                           int size, bool last_tcp, bool is_last)
575 {
576         struct fec_enet_private *fep = netdev_priv(ndev);
577         struct bufdesc_ex *ebdp = container_of(bdp, struct bufdesc_ex, desc);
578         unsigned short queue = skb_get_queue_mapping(skb);
579         unsigned short status;
580         unsigned int estatus = 0;
581         dma_addr_t addr;
582 
583         status = bdp->cbd_sc;
584         status &= ~BD_ENET_TX_STATS;
585 
586         status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
587 
588         if (((unsigned long) data) & fep->tx_align ||
589                 fep->quirks & FEC_QUIRK_SWAP_FRAME) {
590                 memcpy(txq->tx_bounce[index], data, size);
591                 data = txq->tx_bounce[index];
592 
593                 if (fep->quirks & FEC_QUIRK_SWAP_FRAME)
594                         swap_buffer(data, size);
595         }
596 
597         addr = dma_map_single(&fep->pdev->dev, data, size, DMA_TO_DEVICE);
598         if (dma_mapping_error(&fep->pdev->dev, addr)) {
599                 dev_kfree_skb_any(skb);
600                 if (net_ratelimit())
601                         netdev_err(ndev, "Tx DMA memory map failed\n");
602                 return NETDEV_TX_BUSY;
603         }
604 
605         bdp->cbd_datlen = size;
606         bdp->cbd_bufaddr = addr;
607 
608         if (fep->bufdesc_ex) {
609                 if (fep->quirks & FEC_QUIRK_HAS_AVB)
610                         estatus |= FEC_TX_BD_FTYPE(queue);
611                 if (skb->ip_summed == CHECKSUM_PARTIAL)
612                         estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
613                 ebdp->cbd_bdu = 0;
614                 ebdp->cbd_esc = estatus;
615         }
616 
617         /* Handle the last BD specially */
618         if (last_tcp)
619                 status |= (BD_ENET_TX_LAST | BD_ENET_TX_TC);
620         if (is_last) {
621                 status |= BD_ENET_TX_INTR;
622                 if (fep->bufdesc_ex)
623                         ebdp->cbd_esc |= BD_ENET_TX_INT;
624         }
625 
626         bdp->cbd_sc = status;
627 
628         return 0;
629 }
630 
631 static int
632 fec_enet_txq_put_hdr_tso(struct fec_enet_priv_tx_q *txq,
633                          struct sk_buff *skb, struct net_device *ndev,
634                          struct bufdesc *bdp, int index)
635 {
636         struct fec_enet_private *fep = netdev_priv(ndev);
637         int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
638         struct bufdesc_ex *ebdp = container_of(bdp, struct bufdesc_ex, desc);
639         unsigned short queue = skb_get_queue_mapping(skb);
640         void *bufaddr;
641         unsigned long dmabuf;
642         unsigned short status;
643         unsigned int estatus = 0;
644 
645         status = bdp->cbd_sc;
646         status &= ~BD_ENET_TX_STATS;
647         status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
648 
649         bufaddr = txq->tso_hdrs + index * TSO_HEADER_SIZE;
650         dmabuf = txq->tso_hdrs_dma + index * TSO_HEADER_SIZE;
651         if (((unsigned long)bufaddr) & fep->tx_align ||
652                 fep->quirks & FEC_QUIRK_SWAP_FRAME) {
653                 memcpy(txq->tx_bounce[index], skb->data, hdr_len);
654                 bufaddr = txq->tx_bounce[index];
655 
656                 if (fep->quirks & FEC_QUIRK_SWAP_FRAME)
657                         swap_buffer(bufaddr, hdr_len);
658 
659                 dmabuf = dma_map_single(&fep->pdev->dev, bufaddr,
660                                         hdr_len, DMA_TO_DEVICE);
661                 if (dma_mapping_error(&fep->pdev->dev, dmabuf)) {
662                         dev_kfree_skb_any(skb);
663                         if (net_ratelimit())
664                                 netdev_err(ndev, "Tx DMA memory map failed\n");
665                         return NETDEV_TX_BUSY;
666                 }
667         }
668 
669         bdp->cbd_bufaddr = dmabuf;
670         bdp->cbd_datlen = hdr_len;
671 
672         if (fep->bufdesc_ex) {
673                 if (fep->quirks & FEC_QUIRK_HAS_AVB)
674                         estatus |= FEC_TX_BD_FTYPE(queue);
675                 if (skb->ip_summed == CHECKSUM_PARTIAL)
676                         estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
677                 ebdp->cbd_bdu = 0;
678                 ebdp->cbd_esc = estatus;
679         }
680 
681         bdp->cbd_sc = status;
682 
683         return 0;
684 }
685 
686 static int fec_enet_txq_submit_tso(struct fec_enet_priv_tx_q *txq,
687                                    struct sk_buff *skb,
688                                    struct net_device *ndev)
689 {
690         struct fec_enet_private *fep = netdev_priv(ndev);
691         int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
692         int total_len, data_left;
693         struct bufdesc *bdp = txq->cur_tx;
694         unsigned short queue = skb_get_queue_mapping(skb);
695         struct tso_t tso;
696         unsigned int index = 0;
697         int ret;
698 
699         if (tso_count_descs(skb) >= fec_enet_get_free_txdesc_num(fep, txq)) {
700                 dev_kfree_skb_any(skb);
701                 if (net_ratelimit())
702                         netdev_err(ndev, "NOT enough BD for TSO!\n");
703                 return NETDEV_TX_OK;
704         }
705 
706         /* Protocol checksum off-load for TCP and UDP. */
707         if (fec_enet_clear_csum(skb, ndev)) {
708                 dev_kfree_skb_any(skb);
709                 return NETDEV_TX_OK;
710         }
711 
712         /* Initialize the TSO handler, and prepare the first payload */
713         tso_start(skb, &tso);
714 
715         total_len = skb->len - hdr_len;
716         while (total_len > 0) {
717                 char *hdr;
718 
719                 index = fec_enet_get_bd_index(txq->tx_bd_base, bdp, fep);
720                 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len);
721                 total_len -= data_left;
722 
723                 /* prepare packet headers: MAC + IP + TCP */
724                 hdr = txq->tso_hdrs + index * TSO_HEADER_SIZE;
725                 tso_build_hdr(skb, hdr, &tso, data_left, total_len == 0);
726                 ret = fec_enet_txq_put_hdr_tso(txq, skb, ndev, bdp, index);
727                 if (ret)
728                         goto err_release;
729 
730                 while (data_left > 0) {
731                         int size;
732 
733                         size = min_t(int, tso.size, data_left);
734                         bdp = fec_enet_get_nextdesc(bdp, fep, queue);
735                         index = fec_enet_get_bd_index(txq->tx_bd_base,
736                                                       bdp, fep);
737                         ret = fec_enet_txq_put_data_tso(txq, skb, ndev,
738                                                         bdp, index,
739                                                         tso.data, size,
740                                                         size == data_left,
741                                                         total_len == 0);
742                         if (ret)
743                                 goto err_release;
744 
745                         data_left -= size;
746                         tso_build_data(skb, &tso, size);
747                 }
748 
749                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
750         }
751 
752         /* Save skb pointer */
753         txq->tx_skbuff[index] = skb;
754 
755         skb_tx_timestamp(skb);
756         txq->cur_tx = bdp;
757 
758         /* Trigger transmission start */
759         if (!(fep->quirks & FEC_QUIRK_ERR007885) ||
760             !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)) ||
761             !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)) ||
762             !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)) ||
763             !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)))
764                 writel(0, fep->hwp + FEC_X_DES_ACTIVE(queue));
765 
766         return 0;
767 
768 err_release:
769         /* TODO: Release all used data descriptors for TSO */
770         return ret;
771 }
772 
773 static netdev_tx_t
774 fec_enet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
775 {
776         struct fec_enet_private *fep = netdev_priv(ndev);
777         int entries_free;
778         unsigned short queue;
779         struct fec_enet_priv_tx_q *txq;
780         struct netdev_queue *nq;
781         int ret;
782 
783         queue = skb_get_queue_mapping(skb);
784         txq = fep->tx_queue[queue];
785         nq = netdev_get_tx_queue(ndev, queue);
786 
787         if (skb_is_gso(skb))
788                 ret = fec_enet_txq_submit_tso(txq, skb, ndev);
789         else
790                 ret = fec_enet_txq_submit_skb(txq, skb, ndev);
791         if (ret)
792                 return ret;
793 
794         entries_free = fec_enet_get_free_txdesc_num(fep, txq);
795         if (entries_free <= txq->tx_stop_threshold)
796                 netif_tx_stop_queue(nq);
797 
798         return NETDEV_TX_OK;
799 }
800 
801 /* Init RX & TX buffer descriptors
802  */
803 static void fec_enet_bd_init(struct net_device *dev)
804 {
805         struct fec_enet_private *fep = netdev_priv(dev);
806         struct fec_enet_priv_tx_q *txq;
807         struct fec_enet_priv_rx_q *rxq;
808         struct bufdesc *bdp;
809         unsigned int i;
810         unsigned int q;
811 
812         for (q = 0; q < fep->num_rx_queues; q++) {
813                 /* Initialize the receive buffer descriptors. */
814                 rxq = fep->rx_queue[q];
815                 bdp = rxq->rx_bd_base;
816 
817                 for (i = 0; i < rxq->rx_ring_size; i++) {
818 
819                         /* Initialize the BD for every fragment in the page. */
820                         if (bdp->cbd_bufaddr)
821                                 bdp->cbd_sc = BD_ENET_RX_EMPTY;
822                         else
823                                 bdp->cbd_sc = 0;
824                         bdp = fec_enet_get_nextdesc(bdp, fep, q);
825                 }
826 
827                 /* Set the last buffer to wrap */
828                 bdp = fec_enet_get_prevdesc(bdp, fep, q);
829                 bdp->cbd_sc |= BD_SC_WRAP;
830 
831                 rxq->cur_rx = rxq->rx_bd_base;
832         }
833 
834         for (q = 0; q < fep->num_tx_queues; q++) {
835                 /* ...and the same for transmit */
836                 txq = fep->tx_queue[q];
837                 bdp = txq->tx_bd_base;
838                 txq->cur_tx = bdp;
839 
840                 for (i = 0; i < txq->tx_ring_size; i++) {
841                         /* Initialize the BD for every fragment in the page. */
842                         bdp->cbd_sc = 0;
843                         if (txq->tx_skbuff[i]) {
844                                 dev_kfree_skb_any(txq->tx_skbuff[i]);
845                                 txq->tx_skbuff[i] = NULL;
846                         }
847                         bdp->cbd_bufaddr = 0;
848                         bdp = fec_enet_get_nextdesc(bdp, fep, q);
849                 }
850 
851                 /* Set the last buffer to wrap */
852                 bdp = fec_enet_get_prevdesc(bdp, fep, q);
853                 bdp->cbd_sc |= BD_SC_WRAP;
854                 txq->dirty_tx = bdp;
855         }
856 }
857 
858 static void fec_enet_active_rxring(struct net_device *ndev)
859 {
860         struct fec_enet_private *fep = netdev_priv(ndev);
861         int i;
862 
863         for (i = 0; i < fep->num_rx_queues; i++)
864                 writel(0, fep->hwp + FEC_R_DES_ACTIVE(i));
865 }
866 
867 static void fec_enet_enable_ring(struct net_device *ndev)
868 {
869         struct fec_enet_private *fep = netdev_priv(ndev);
870         struct fec_enet_priv_tx_q *txq;
871         struct fec_enet_priv_rx_q *rxq;
872         int i;
873 
874         for (i = 0; i < fep->num_rx_queues; i++) {
875                 rxq = fep->rx_queue[i];
876                 writel(rxq->bd_dma, fep->hwp + FEC_R_DES_START(i));
877                 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE(i));
878 
879                 /* enable DMA1/2 */
880                 if (i)
881                         writel(RCMR_MATCHEN | RCMR_CMP(i),
882                                fep->hwp + FEC_RCMR(i));
883         }
884 
885         for (i = 0; i < fep->num_tx_queues; i++) {
886                 txq = fep->tx_queue[i];
887                 writel(txq->bd_dma, fep->hwp + FEC_X_DES_START(i));
888 
889                 /* enable DMA1/2 */
890                 if (i)
891                         writel(DMA_CLASS_EN | IDLE_SLOPE(i),
892                                fep->hwp + FEC_DMA_CFG(i));
893         }
894 }
895 
896 static void fec_enet_reset_skb(struct net_device *ndev)
897 {
898         struct fec_enet_private *fep = netdev_priv(ndev);
899         struct fec_enet_priv_tx_q *txq;
900         int i, j;
901 
902         for (i = 0; i < fep->num_tx_queues; i++) {
903                 txq = fep->tx_queue[i];
904 
905                 for (j = 0; j < txq->tx_ring_size; j++) {
906                         if (txq->tx_skbuff[j]) {
907                                 dev_kfree_skb_any(txq->tx_skbuff[j]);
908                                 txq->tx_skbuff[j] = NULL;
909                         }
910                 }
911         }
912 }
913 
914 /*
915  * This function is called to start or restart the FEC during a link
916  * change, transmit timeout, or to reconfigure the FEC.  The network
917  * packet processing for this device must be stopped before this call.
918  */
919 static void
920 fec_restart(struct net_device *ndev)
921 {
922         struct fec_enet_private *fep = netdev_priv(ndev);
923         u32 val;
924         u32 temp_mac[2];
925         u32 rcntl = OPT_FRAME_SIZE | 0x04;
926         u32 ecntl = 0x2; /* ETHEREN */
927 
928         /* Whack a reset.  We should wait for this.
929          * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
930          * instead of reset MAC itself.
931          */
932         if (fep->quirks & FEC_QUIRK_HAS_AVB) {
933                 writel(0, fep->hwp + FEC_ECNTRL);
934         } else {
935                 writel(1, fep->hwp + FEC_ECNTRL);
936                 udelay(10);
937         }
938 
939         /*
940          * enet-mac reset will reset mac address registers too,
941          * so need to reconfigure it.
942          */
943         if (fep->quirks & FEC_QUIRK_ENET_MAC) {
944                 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN);
945                 writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
946                 writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
947         }
948 
949         /* Clear any outstanding interrupt. */
950         writel(0xffffffff, fep->hwp + FEC_IEVENT);
951 
952         fec_enet_bd_init(ndev);
953 
954         fec_enet_enable_ring(ndev);
955 
956         /* Reset tx SKB buffers. */
957         fec_enet_reset_skb(ndev);
958 
959         /* Enable MII mode */
960         if (fep->full_duplex == DUPLEX_FULL) {
961                 /* FD enable */
962                 writel(0x04, fep->hwp + FEC_X_CNTRL);
963         } else {
964                 /* No Rcv on Xmit */
965                 rcntl |= 0x02;
966                 writel(0x0, fep->hwp + FEC_X_CNTRL);
967         }
968 
969         /* Set MII speed */
970         writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
971 
972 #if !defined(CONFIG_M5272)
973         /* set RX checksum */
974         val = readl(fep->hwp + FEC_RACC);
975         if (fep->csum_flags & FLAG_RX_CSUM_ENABLED)
976                 val |= FEC_RACC_OPTIONS;
977         else
978                 val &= ~FEC_RACC_OPTIONS;
979         writel(val, fep->hwp + FEC_RACC);
980 #endif
981 
982         /*
983          * The phy interface and speed need to get configured
984          * differently on enet-mac.
985          */
986         if (fep->quirks & FEC_QUIRK_ENET_MAC) {
987                 /* Enable flow control and length check */
988                 rcntl |= 0x40000000 | 0x00000020;
989 
990                 /* RGMII, RMII or MII */
991                 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII)
992                         rcntl |= (1 << 6);
993                 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
994                         rcntl |= (1 << 8);
995                 else
996                         rcntl &= ~(1 << 8);
997 
998                 /* 1G, 100M or 10M */
999                 if (fep->phy_dev) {
1000                         if (fep->phy_dev->speed == SPEED_1000)
1001                                 ecntl |= (1 << 5);
1002                         else if (fep->phy_dev->speed == SPEED_100)
1003                                 rcntl &= ~(1 << 9);
1004                         else
1005                                 rcntl |= (1 << 9);
1006                 }
1007         } else {
1008 #ifdef FEC_MIIGSK_ENR
1009                 if (fep->quirks & FEC_QUIRK_USE_GASKET) {
1010                         u32 cfgr;
1011                         /* disable the gasket and wait */
1012                         writel(0, fep->hwp + FEC_MIIGSK_ENR);
1013                         while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
1014                                 udelay(1);
1015 
1016                         /*
1017                          * configure the gasket:
1018                          *   RMII, 50 MHz, no loopback, no echo
1019                          *   MII, 25 MHz, no loopback, no echo
1020                          */
1021                         cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
1022                                 ? BM_MIIGSK_CFGR_RMII : BM_MIIGSK_CFGR_MII;
1023                         if (fep->phy_dev && fep->phy_dev->speed == SPEED_10)
1024                                 cfgr |= BM_MIIGSK_CFGR_FRCONT_10M;
1025                         writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR);
1026 
1027                         /* re-enable the gasket */
1028                         writel(2, fep->hwp + FEC_MIIGSK_ENR);
1029                 }
1030 #endif
1031         }
1032 
1033 #if !defined(CONFIG_M5272)
1034         /* enable pause frame*/
1035         if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) ||
1036             ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) &&
1037              fep->phy_dev && fep->phy_dev->pause)) {
1038                 rcntl |= FEC_ENET_FCE;
1039 
1040                 /* set FIFO threshold parameter to reduce overrun */
1041                 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM);
1042                 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL);
1043                 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM);
1044                 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL);
1045 
1046                 /* OPD */
1047                 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD);
1048         } else {
1049                 rcntl &= ~FEC_ENET_FCE;
1050         }
1051 #endif /* !defined(CONFIG_M5272) */
1052 
1053         writel(rcntl, fep->hwp + FEC_R_CNTRL);
1054 
1055         /* Setup multicast filter. */
1056         set_multicast_list(ndev);
1057 #ifndef CONFIG_M5272
1058         writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
1059         writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
1060 #endif
1061 
1062         if (fep->quirks & FEC_QUIRK_ENET_MAC) {
1063                 /* enable ENET endian swap */
1064                 ecntl |= (1 << 8);
1065                 /* enable ENET store and forward mode */
1066                 writel(1 << 8, fep->hwp + FEC_X_WMRK);
1067         }
1068 
1069         if (fep->bufdesc_ex)
1070                 ecntl |= (1 << 4);
1071 
1072 #ifndef CONFIG_M5272
1073         /* Enable the MIB statistic event counters */
1074         writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT);
1075 #endif
1076 
1077         /* And last, enable the transmit and receive processing */
1078         writel(ecntl, fep->hwp + FEC_ECNTRL);
1079         fec_enet_active_rxring(ndev);
1080 
1081         if (fep->bufdesc_ex)
1082                 fec_ptp_start_cyclecounter(ndev);
1083 
1084         /* Enable interrupts we wish to service */
1085         if (fep->link)
1086                 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1087         else
1088                 writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
1089 
1090         /* Init the interrupt coalescing */
1091         fec_enet_itr_coal_init(ndev);
1092 
1093 }
1094 
1095 static void
1096 fec_stop(struct net_device *ndev)
1097 {
1098         struct fec_enet_private *fep = netdev_priv(ndev);
1099         struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
1100         u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
1101         u32 val;
1102 
1103         /* We cannot expect a graceful transmit stop without link !!! */
1104         if (fep->link) {
1105                 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
1106                 udelay(10);
1107                 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
1108                         netdev_err(ndev, "Graceful transmit stop did not complete!\n");
1109         }
1110 
1111         /* Whack a reset.  We should wait for this.
1112          * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
1113          * instead of reset MAC itself.
1114          */
1115         if (!(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) {
1116                 if (fep->quirks & FEC_QUIRK_HAS_AVB) {
1117                         writel(0, fep->hwp + FEC_ECNTRL);
1118                 } else {
1119                         writel(1, fep->hwp + FEC_ECNTRL);
1120                         udelay(10);
1121                 }
1122                 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1123         } else {
1124                 writel(FEC_DEFAULT_IMASK | FEC_ENET_WAKEUP, fep->hwp + FEC_IMASK);
1125                 val = readl(fep->hwp + FEC_ECNTRL);
1126                 val |= (FEC_ECR_MAGICEN | FEC_ECR_SLEEP);
1127                 writel(val, fep->hwp + FEC_ECNTRL);
1128 
1129                 if (pdata && pdata->sleep_mode_enable)
1130                         pdata->sleep_mode_enable(true);
1131         }
1132         writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1133 
1134         /* We have to keep ENET enabled to have MII interrupt stay working */
1135         if (fep->quirks & FEC_QUIRK_ENET_MAC &&
1136                 !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) {
1137                 writel(2, fep->hwp + FEC_ECNTRL);
1138                 writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
1139         }
1140 }
1141 
1142 
1143 static void
1144 fec_timeout(struct net_device *ndev)
1145 {
1146         struct fec_enet_private *fep = netdev_priv(ndev);
1147 
1148         fec_dump(ndev);
1149 
1150         ndev->stats.tx_errors++;
1151 
1152         schedule_work(&fep->tx_timeout_work);
1153 }
1154 
1155 static void fec_enet_timeout_work(struct work_struct *work)
1156 {
1157         struct fec_enet_private *fep =
1158                 container_of(work, struct fec_enet_private, tx_timeout_work);
1159         struct net_device *ndev = fep->netdev;
1160 
1161         rtnl_lock();
1162         if (netif_device_present(ndev) || netif_running(ndev)) {
1163                 napi_disable(&fep->napi);
1164                 netif_tx_lock_bh(ndev);
1165                 fec_restart(ndev);
1166                 netif_wake_queue(ndev);
1167                 netif_tx_unlock_bh(ndev);
1168                 napi_enable(&fep->napi);
1169         }
1170         rtnl_unlock();
1171 }
1172 
1173 static void
1174 fec_enet_hwtstamp(struct fec_enet_private *fep, unsigned ts,
1175         struct skb_shared_hwtstamps *hwtstamps)
1176 {
1177         unsigned long flags;
1178         u64 ns;
1179 
1180         spin_lock_irqsave(&fep->tmreg_lock, flags);
1181         ns = timecounter_cyc2time(&fep->tc, ts);
1182         spin_unlock_irqrestore(&fep->tmreg_lock, flags);
1183 
1184         memset(hwtstamps, 0, sizeof(*hwtstamps));
1185         hwtstamps->hwtstamp = ns_to_ktime(ns);
1186 }
1187 
1188 static void
1189 fec_enet_tx_queue(struct net_device *ndev, u16 queue_id)
1190 {
1191         struct  fec_enet_private *fep;
1192         struct bufdesc *bdp;
1193         unsigned short status;
1194         struct  sk_buff *skb;
1195         struct fec_enet_priv_tx_q *txq;
1196         struct netdev_queue *nq;
1197         int     index = 0;
1198         int     entries_free;
1199 
1200         fep = netdev_priv(ndev);
1201 
1202         queue_id = FEC_ENET_GET_QUQUE(queue_id);
1203 
1204         txq = fep->tx_queue[queue_id];
1205         /* get next bdp of dirty_tx */
1206         nq = netdev_get_tx_queue(ndev, queue_id);
1207         bdp = txq->dirty_tx;
1208 
1209         /* get next bdp of dirty_tx */
1210         bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1211 
1212         while (((status = bdp->cbd_sc) & BD_ENET_TX_READY) == 0) {
1213 
1214                 /* current queue is empty */
1215                 if (bdp == txq->cur_tx)
1216                         break;
1217 
1218                 index = fec_enet_get_bd_index(txq->tx_bd_base, bdp, fep);
1219 
1220                 skb = txq->tx_skbuff[index];
1221                 txq->tx_skbuff[index] = NULL;
1222                 if (!IS_TSO_HEADER(txq, bdp->cbd_bufaddr))
1223                         dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1224                                         bdp->cbd_datlen, DMA_TO_DEVICE);
1225                 bdp->cbd_bufaddr = 0;
1226                 if (!skb) {
1227                         bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1228                         continue;
1229                 }
1230 
1231                 /* Check for errors. */
1232                 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
1233                                    BD_ENET_TX_RL | BD_ENET_TX_UN |
1234                                    BD_ENET_TX_CSL)) {
1235                         ndev->stats.tx_errors++;
1236                         if (status & BD_ENET_TX_HB)  /* No heartbeat */
1237                                 ndev->stats.tx_heartbeat_errors++;
1238                         if (status & BD_ENET_TX_LC)  /* Late collision */
1239                                 ndev->stats.tx_window_errors++;
1240                         if (status & BD_ENET_TX_RL)  /* Retrans limit */
1241                                 ndev->stats.tx_aborted_errors++;
1242                         if (status & BD_ENET_TX_UN)  /* Underrun */
1243                                 ndev->stats.tx_fifo_errors++;
1244                         if (status & BD_ENET_TX_CSL) /* Carrier lost */
1245                                 ndev->stats.tx_carrier_errors++;
1246                 } else {
1247                         ndev->stats.tx_packets++;
1248                         ndev->stats.tx_bytes += skb->len;
1249                 }
1250 
1251                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&
1252                         fep->bufdesc_ex) {
1253                         struct skb_shared_hwtstamps shhwtstamps;
1254                         struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1255 
1256                         fec_enet_hwtstamp(fep, ebdp->ts, &shhwtstamps);
1257                         skb_tstamp_tx(skb, &shhwtstamps);
1258                 }
1259 
1260                 /* Deferred means some collisions occurred during transmit,
1261                  * but we eventually sent the packet OK.
1262                  */
1263                 if (status & BD_ENET_TX_DEF)
1264                         ndev->stats.collisions++;
1265 
1266                 /* Free the sk buffer associated with this last transmit */
1267                 dev_kfree_skb_any(skb);
1268 
1269                 txq->dirty_tx = bdp;
1270 
1271                 /* Update pointer to next buffer descriptor to be transmitted */
1272                 bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1273 
1274                 /* Since we have freed up a buffer, the ring is no longer full
1275                  */
1276                 if (netif_queue_stopped(ndev)) {
1277                         entries_free = fec_enet_get_free_txdesc_num(fep, txq);
1278                         if (entries_free >= txq->tx_wake_threshold)
1279                                 netif_tx_wake_queue(nq);
1280                 }
1281         }
1282 
1283         /* ERR006538: Keep the transmitter going */
1284         if (bdp != txq->cur_tx &&
1285             readl(fep->hwp + FEC_X_DES_ACTIVE(queue_id)) == 0)
1286                 writel(0, fep->hwp + FEC_X_DES_ACTIVE(queue_id));
1287 }
1288 
1289 static void
1290 fec_enet_tx(struct net_device *ndev)
1291 {
1292         struct fec_enet_private *fep = netdev_priv(ndev);
1293         u16 queue_id;
1294         /* First process class A queue, then Class B and Best Effort queue */
1295         for_each_set_bit(queue_id, &fep->work_tx, FEC_ENET_MAX_TX_QS) {
1296                 clear_bit(queue_id, &fep->work_tx);
1297                 fec_enet_tx_queue(ndev, queue_id);
1298         }
1299         return;
1300 }
1301 
1302 static int
1303 fec_enet_new_rxbdp(struct net_device *ndev, struct bufdesc *bdp, struct sk_buff *skb)
1304 {
1305         struct  fec_enet_private *fep = netdev_priv(ndev);
1306         int off;
1307 
1308         off = ((unsigned long)skb->data) & fep->rx_align;
1309         if (off)
1310                 skb_reserve(skb, fep->rx_align + 1 - off);
1311 
1312         bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, skb->data,
1313                                           FEC_ENET_RX_FRSIZE - fep->rx_align,
1314                                           DMA_FROM_DEVICE);
1315         if (dma_mapping_error(&fep->pdev->dev, bdp->cbd_bufaddr)) {
1316                 if (net_ratelimit())
1317                         netdev_err(ndev, "Rx DMA memory map failed\n");
1318                 return -ENOMEM;
1319         }
1320 
1321         return 0;
1322 }
1323 
1324 static bool fec_enet_copybreak(struct net_device *ndev, struct sk_buff **skb,
1325                                struct bufdesc *bdp, u32 length, bool swap)
1326 {
1327         struct  fec_enet_private *fep = netdev_priv(ndev);
1328         struct sk_buff *new_skb;
1329 
1330         if (length > fep->rx_copybreak)
1331                 return false;
1332 
1333         new_skb = netdev_alloc_skb(ndev, length);
1334         if (!new_skb)
1335                 return false;
1336 
1337         dma_sync_single_for_cpu(&fep->pdev->dev, bdp->cbd_bufaddr,
1338                                 FEC_ENET_RX_FRSIZE - fep->rx_align,
1339                                 DMA_FROM_DEVICE);
1340         if (!swap)
1341                 memcpy(new_skb->data, (*skb)->data, length);
1342         else
1343                 swap_buffer2(new_skb->data, (*skb)->data, length);
1344         *skb = new_skb;
1345 
1346         return true;
1347 }
1348 
1349 /* During a receive, the cur_rx points to the current incoming buffer.
1350  * When we update through the ring, if the next incoming buffer has
1351  * not been given to the system, we just set the empty indicator,
1352  * effectively tossing the packet.
1353  */
1354 static int
1355 fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)
1356 {
1357         struct fec_enet_private *fep = netdev_priv(ndev);
1358         struct fec_enet_priv_rx_q *rxq;
1359         struct bufdesc *bdp;
1360         unsigned short status;
1361         struct  sk_buff *skb_new = NULL;
1362         struct  sk_buff *skb;
1363         ushort  pkt_len;
1364         __u8 *data;
1365         int     pkt_received = 0;
1366         struct  bufdesc_ex *ebdp = NULL;
1367         bool    vlan_packet_rcvd = false;
1368         u16     vlan_tag;
1369         int     index = 0;
1370         bool    is_copybreak;
1371         bool    need_swap = fep->quirks & FEC_QUIRK_SWAP_FRAME;
1372 
1373 #ifdef CONFIG_M532x
1374         flush_cache_all();
1375 #endif
1376         queue_id = FEC_ENET_GET_QUQUE(queue_id);
1377         rxq = fep->rx_queue[queue_id];
1378 
1379         /* First, grab all of the stats for the incoming packet.
1380          * These get messed up if we get called due to a busy condition.
1381          */
1382         bdp = rxq->cur_rx;
1383 
1384         while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
1385 
1386                 if (pkt_received >= budget)
1387                         break;
1388                 pkt_received++;
1389 
1390                 /* Since we have allocated space to hold a complete frame,
1391                  * the last indicator should be set.
1392                  */
1393                 if ((status & BD_ENET_RX_LAST) == 0)
1394                         netdev_err(ndev, "rcv is not +last\n");
1395 
1396 
1397                 /* Check for errors. */
1398                 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
1399                            BD_ENET_RX_CR | BD_ENET_RX_OV)) {
1400                         ndev->stats.rx_errors++;
1401                         if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
1402                                 /* Frame too long or too short. */
1403                                 ndev->stats.rx_length_errors++;
1404                         }
1405                         if (status & BD_ENET_RX_NO)     /* Frame alignment */
1406                                 ndev->stats.rx_frame_errors++;
1407                         if (status & BD_ENET_RX_CR)     /* CRC Error */
1408                                 ndev->stats.rx_crc_errors++;
1409                         if (status & BD_ENET_RX_OV)     /* FIFO overrun */
1410                                 ndev->stats.rx_fifo_errors++;
1411                 }
1412 
1413                 /* Report late collisions as a frame error.
1414                  * On this error, the BD is closed, but we don't know what we
1415                  * have in the buffer.  So, just drop this frame on the floor.
1416                  */
1417                 if (status & BD_ENET_RX_CL) {
1418                         ndev->stats.rx_errors++;
1419                         ndev->stats.rx_frame_errors++;
1420                         goto rx_processing_done;
1421                 }
1422 
1423                 /* Process the incoming frame. */
1424                 ndev->stats.rx_packets++;
1425                 pkt_len = bdp->cbd_datlen;
1426                 ndev->stats.rx_bytes += pkt_len;
1427 
1428                 index = fec_enet_get_bd_index(rxq->rx_bd_base, bdp, fep);
1429                 skb = rxq->rx_skbuff[index];
1430 
1431                 /* The packet length includes FCS, but we don't want to
1432                  * include that when passing upstream as it messes up
1433                  * bridging applications.
1434                  */
1435                 is_copybreak = fec_enet_copybreak(ndev, &skb, bdp, pkt_len - 4,
1436                                                   need_swap);
1437                 if (!is_copybreak) {
1438                         skb_new = netdev_alloc_skb(ndev, FEC_ENET_RX_FRSIZE);
1439                         if (unlikely(!skb_new)) {
1440                                 ndev->stats.rx_dropped++;
1441                                 goto rx_processing_done;
1442                         }
1443                         dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1444                                          FEC_ENET_RX_FRSIZE - fep->rx_align,
1445                                          DMA_FROM_DEVICE);
1446                 }
1447 
1448                 prefetch(skb->data - NET_IP_ALIGN);
1449                 skb_put(skb, pkt_len - 4);
1450                 data = skb->data;
1451                 if (!is_copybreak && need_swap)
1452                         swap_buffer(data, pkt_len);
1453 
1454                 /* Extract the enhanced buffer descriptor */
1455                 ebdp = NULL;
1456                 if (fep->bufdesc_ex)
1457                         ebdp = (struct bufdesc_ex *)bdp;
1458 
1459                 /* If this is a VLAN packet remove the VLAN Tag */
1460                 vlan_packet_rcvd = false;
1461                 if ((ndev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1462                         fep->bufdesc_ex && (ebdp->cbd_esc & BD_ENET_RX_VLAN)) {
1463                         /* Push and remove the vlan tag */
1464                         struct vlan_hdr *vlan_header =
1465                                         (struct vlan_hdr *) (data + ETH_HLEN);
1466                         vlan_tag = ntohs(vlan_header->h_vlan_TCI);
1467 
1468                         vlan_packet_rcvd = true;
1469 
1470                         memmove(skb->data + VLAN_HLEN, data, ETH_ALEN * 2);
1471                         skb_pull(skb, VLAN_HLEN);
1472                 }
1473 
1474                 skb->protocol = eth_type_trans(skb, ndev);
1475 
1476                 /* Get receive timestamp from the skb */
1477                 if (fep->hwts_rx_en && fep->bufdesc_ex)
1478                         fec_enet_hwtstamp(fep, ebdp->ts,
1479                                           skb_hwtstamps(skb));
1480 
1481                 if (fep->bufdesc_ex &&
1482                     (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) {
1483                         if (!(ebdp->cbd_esc & FLAG_RX_CSUM_ERROR)) {
1484                                 /* don't check it */
1485                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1486                         } else {
1487                                 skb_checksum_none_assert(skb);
1488                         }
1489                 }
1490 
1491                 /* Handle received VLAN packets */
1492                 if (vlan_packet_rcvd)
1493                         __vlan_hwaccel_put_tag(skb,
1494                                                htons(ETH_P_8021Q),
1495                                                vlan_tag);
1496 
1497                 napi_gro_receive(&fep->napi, skb);
1498 
1499                 if (is_copybreak) {
1500                         dma_sync_single_for_device(&fep->pdev->dev, bdp->cbd_bufaddr,
1501                                                    FEC_ENET_RX_FRSIZE - fep->rx_align,
1502                                                    DMA_FROM_DEVICE);
1503                 } else {
1504                         rxq->rx_skbuff[index] = skb_new;
1505                         fec_enet_new_rxbdp(ndev, bdp, skb_new);
1506                 }
1507 
1508 rx_processing_done:
1509                 /* Clear the status flags for this buffer */
1510                 status &= ~BD_ENET_RX_STATS;
1511 
1512                 /* Mark the buffer empty */
1513                 status |= BD_ENET_RX_EMPTY;
1514                 bdp->cbd_sc = status;
1515 
1516                 if (fep->bufdesc_ex) {
1517                         struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1518 
1519                         ebdp->cbd_esc = BD_ENET_RX_INT;
1520                         ebdp->cbd_prot = 0;
1521                         ebdp->cbd_bdu = 0;
1522                 }
1523 
1524                 /* Update BD pointer to next entry */
1525                 bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1526 
1527                 /* Doing this here will keep the FEC running while we process
1528                  * incoming frames.  On a heavily loaded network, we should be
1529                  * able to keep up at the expense of system resources.
1530                  */
1531                 writel(0, fep->hwp + FEC_R_DES_ACTIVE(queue_id));
1532         }
1533         rxq->cur_rx = bdp;
1534         return pkt_received;
1535 }
1536 
1537 static int
1538 fec_enet_rx(struct net_device *ndev, int budget)
1539 {
1540         int     pkt_received = 0;
1541         u16     queue_id;
1542         struct fec_enet_private *fep = netdev_priv(ndev);
1543 
1544         for_each_set_bit(queue_id, &fep->work_rx, FEC_ENET_MAX_RX_QS) {
1545                 clear_bit(queue_id, &fep->work_rx);
1546                 pkt_received += fec_enet_rx_queue(ndev,
1547                                         budget - pkt_received, queue_id);
1548         }
1549         return pkt_received;
1550 }
1551 
1552 static bool
1553 fec_enet_collect_events(struct fec_enet_private *fep, uint int_events)
1554 {
1555         if (int_events == 0)
1556                 return false;
1557 
1558         if (int_events & FEC_ENET_RXF)
1559                 fep->work_rx |= (1 << 2);
1560         if (int_events & FEC_ENET_RXF_1)
1561                 fep->work_rx |= (1 << 0);
1562         if (int_events & FEC_ENET_RXF_2)
1563                 fep->work_rx |= (1 << 1);
1564 
1565         if (int_events & FEC_ENET_TXF)
1566                 fep->work_tx |= (1 << 2);
1567         if (int_events & FEC_ENET_TXF_1)
1568                 fep->work_tx |= (1 << 0);
1569         if (int_events & FEC_ENET_TXF_2)
1570                 fep->work_tx |= (1 << 1);
1571 
1572         return true;
1573 }
1574 
1575 static irqreturn_t
1576 fec_enet_interrupt(int irq, void *dev_id)
1577 {
1578         struct net_device *ndev = dev_id;
1579         struct fec_enet_private *fep = netdev_priv(ndev);
1580         uint int_events;
1581         irqreturn_t ret = IRQ_NONE;
1582 
1583         int_events = readl(fep->hwp + FEC_IEVENT);
1584         writel(int_events, fep->hwp + FEC_IEVENT);
1585         fec_enet_collect_events(fep, int_events);
1586 
1587         if ((fep->work_tx || fep->work_rx) && fep->link) {
1588                 ret = IRQ_HANDLED;
1589 
1590                 if (napi_schedule_prep(&fep->napi)) {
1591                         /* Disable the NAPI interrupts */
1592                         writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
1593                         __napi_schedule(&fep->napi);
1594                 }
1595         }
1596 
1597         if (int_events & FEC_ENET_MII) {
1598                 ret = IRQ_HANDLED;
1599                 complete(&fep->mdio_done);
1600         }
1601 
1602         if (fep->ptp_clock)
1603                 fec_ptp_check_pps_event(fep);
1604 
1605         return ret;
1606 }
1607 
1608 static int fec_enet_rx_napi(struct napi_struct *napi, int budget)
1609 {
1610         struct net_device *ndev = napi->dev;
1611         struct fec_enet_private *fep = netdev_priv(ndev);
1612         int pkts;
1613 
1614         pkts = fec_enet_rx(ndev, budget);
1615 
1616         fec_enet_tx(ndev);
1617 
1618         if (pkts < budget) {
1619                 napi_complete(napi);
1620                 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1621         }
1622         return pkts;
1623 }
1624 
1625 /* ------------------------------------------------------------------------- */
1626 static void fec_get_mac(struct net_device *ndev)
1627 {
1628         struct fec_enet_private *fep = netdev_priv(ndev);
1629         struct fec_platform_data *pdata = dev_get_platdata(&fep->pdev->dev);
1630         unsigned char *iap, tmpaddr[ETH_ALEN];
1631 
1632         /*
1633          * try to get mac address in following order:
1634          *
1635          * 1) module parameter via kernel command line in form
1636          *    fec.macaddr=0x00,0x04,0x9f,0x01,0x30,0xe0
1637          */
1638         iap = macaddr;
1639 
1640         /*
1641          * 2) from device tree data
1642          */
1643         if (!is_valid_ether_addr(iap)) {
1644                 struct device_node *np = fep->pdev->dev.of_node;
1645                 if (np) {
1646                         const char *mac = of_get_mac_address(np);
1647                         if (mac)
1648                                 iap = (unsigned char *) mac;
1649                 }
1650         }
1651 
1652         /*
1653          * 3) from flash or fuse (via platform data)
1654          */
1655         if (!is_valid_ether_addr(iap)) {
1656 #ifdef CONFIG_M5272
1657                 if (FEC_FLASHMAC)
1658                         iap = (unsigned char *)FEC_FLASHMAC;
1659 #else
1660                 if (pdata)
1661                         iap = (unsigned char *)&pdata->mac;
1662 #endif
1663         }
1664 
1665         /*
1666          * 4) FEC mac registers set by bootloader
1667          */
1668         if (!is_valid_ether_addr(iap)) {
1669                 *((__be32 *) &tmpaddr[0]) =
1670                         cpu_to_be32(readl(fep->hwp + FEC_ADDR_LOW));
1671                 *((__be16 *) &tmpaddr[4]) =
1672                         cpu_to_be16(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
1673                 iap = &tmpaddr[0];
1674         }
1675 
1676         /*
1677          * 5) random mac address
1678          */
1679         if (!is_valid_ether_addr(iap)) {
1680                 /* Report it and use a random ethernet address instead */
1681                 netdev_err(ndev, "Invalid MAC address: %pM\n", iap);
1682                 eth_hw_addr_random(ndev);
1683                 netdev_info(ndev, "Using random MAC address: %pM\n",
1684                             ndev->dev_addr);
1685                 return;
1686         }
1687 
1688         memcpy(ndev->dev_addr, iap, ETH_ALEN);
1689 
1690         /* Adjust MAC if using macaddr */
1691         if (iap == macaddr)
1692                  ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->dev_id;
1693 }
1694 
1695 /* ------------------------------------------------------------------------- */
1696 
1697 /*
1698  * Phy section
1699  */
1700 static void fec_enet_adjust_link(struct net_device *ndev)
1701 {
1702         struct fec_enet_private *fep = netdev_priv(ndev);
1703         struct phy_device *phy_dev = fep->phy_dev;
1704         int status_change = 0;
1705 
1706         /* Prevent a state halted on mii error */
1707         if (fep->mii_timeout && phy_dev->state == PHY_HALTED) {
1708                 phy_dev->state = PHY_RESUMING;
1709                 return;
1710         }
1711 
1712         /*
1713          * If the netdev is down, or is going down, we're not interested
1714          * in link state events, so just mark our idea of the link as down
1715          * and ignore the event.
1716          */
1717         if (!netif_running(ndev) || !netif_device_present(ndev)) {
1718                 fep->link = 0;
1719         } else if (phy_dev->link) {
1720                 if (!fep->link) {
1721                         fep->link = phy_dev->link;
1722                         status_change = 1;
1723                 }
1724 
1725                 if (fep->full_duplex != phy_dev->duplex) {
1726                         fep->full_duplex = phy_dev->duplex;
1727                         status_change = 1;
1728                 }
1729 
1730                 if (phy_dev->speed != fep->speed) {
1731                         fep->speed = phy_dev->speed;
1732                         status_change = 1;
1733                 }
1734 
1735                 /* if any of the above changed restart the FEC */
1736                 if (status_change) {
1737                         napi_disable(&fep->napi);
1738                         netif_tx_lock_bh(ndev);
1739                         fec_restart(ndev);
1740                         netif_wake_queue(ndev);
1741                         netif_tx_unlock_bh(ndev);
1742                         napi_enable(&fep->napi);
1743                 }
1744         } else {
1745                 if (fep->link) {
1746                         napi_disable(&fep->napi);
1747                         netif_tx_lock_bh(ndev);
1748                         fec_stop(ndev);
1749                         netif_tx_unlock_bh(ndev);
1750                         napi_enable(&fep->napi);
1751                         fep->link = phy_dev->link;
1752                         status_change = 1;
1753                 }
1754         }
1755 
1756         if (status_change)
1757                 phy_print_status(phy_dev);
1758 }
1759 
1760 static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
1761 {
1762         struct fec_enet_private *fep = bus->priv;
1763         unsigned long time_left;
1764 
1765         fep->mii_timeout = 0;
1766         init_completion(&fep->mdio_done);
1767 
1768         /* start a read op */
1769         writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
1770                 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1771                 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
1772 
1773         /* wait for end of transfer */
1774         time_left = wait_for_completion_timeout(&fep->mdio_done,
1775                         usecs_to_jiffies(FEC_MII_TIMEOUT));
1776         if (time_left == 0) {
1777                 fep->mii_timeout = 1;
1778                 netdev_err(fep->netdev, "MDIO read timeout\n");
1779                 return -ETIMEDOUT;
1780         }
1781 
1782         /* return value */
1783         return FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
1784 }
1785 
1786 static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
1787                            u16 value)
1788 {
1789         struct fec_enet_private *fep = bus->priv;
1790         unsigned long time_left;
1791 
1792         fep->mii_timeout = 0;
1793         init_completion(&fep->mdio_done);
1794 
1795         /* start a write op */
1796         writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
1797                 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1798                 FEC_MMFR_TA | FEC_MMFR_DATA(value),
1799                 fep->hwp + FEC_MII_DATA);
1800 
1801         /* wait for end of transfer */
1802         time_left = wait_for_completion_timeout(&fep->mdio_done,
1803                         usecs_to_jiffies(FEC_MII_TIMEOUT));
1804         if (time_left == 0) {
1805                 fep->mii_timeout = 1;
1806                 netdev_err(fep->netdev, "MDIO write timeout\n");
1807                 return -ETIMEDOUT;
1808         }
1809 
1810         return 0;
1811 }
1812 
1813 static int fec_enet_clk_enable(struct net_device *ndev, bool enable)
1814 {
1815         struct fec_enet_private *fep = netdev_priv(ndev);
1816         int ret;
1817 
1818         if (enable) {
1819                 ret = clk_prepare_enable(fep->clk_ahb);
1820                 if (ret)
1821                         return ret;
1822                 ret = clk_prepare_enable(fep->clk_ipg);
1823                 if (ret)
1824                         goto failed_clk_ipg;
1825                 if (fep->clk_enet_out) {
1826                         ret = clk_prepare_enable(fep->clk_enet_out);
1827                         if (ret)
1828                                 goto failed_clk_enet_out;
1829                 }
1830                 if (fep->clk_ptp) {
1831                         mutex_lock(&fep->ptp_clk_mutex);
1832                         ret = clk_prepare_enable(fep->clk_ptp);
1833                         if (ret) {
1834                                 mutex_unlock(&fep->ptp_clk_mutex);
1835                                 goto failed_clk_ptp;
1836                         } else {
1837                                 fep->ptp_clk_on = true;
1838                         }
1839                         mutex_unlock(&fep->ptp_clk_mutex);
1840                 }
1841                 if (fep->clk_ref) {
1842                         ret = clk_prepare_enable(fep->clk_ref);
1843                         if (ret)
1844                                 goto failed_clk_ref;
1845                 }
1846         } else {
1847                 clk_disable_unprepare(fep->clk_ahb);
1848                 clk_disable_unprepare(fep->clk_ipg);
1849                 if (fep->clk_enet_out)
1850                         clk_disable_unprepare(fep->clk_enet_out);
1851                 if (fep->clk_ptp) {
1852                         mutex_lock(&fep->ptp_clk_mutex);
1853                         clk_disable_unprepare(fep->clk_ptp);
1854                         fep->ptp_clk_on = false;
1855                         mutex_unlock(&fep->ptp_clk_mutex);
1856                 }
1857                 if (fep->clk_ref)
1858                         clk_disable_unprepare(fep->clk_ref);
1859         }
1860 
1861         return 0;
1862 
1863 failed_clk_ref:
1864         if (fep->clk_ref)
1865                 clk_disable_unprepare(fep->clk_ref);
1866 failed_clk_ptp:
1867         if (fep->clk_enet_out)
1868                 clk_disable_unprepare(fep->clk_enet_out);
1869 failed_clk_enet_out:
1870                 clk_disable_unprepare(fep->clk_ipg);
1871 failed_clk_ipg:
1872                 clk_disable_unprepare(fep->clk_ahb);
1873 
1874         return ret;
1875 }
1876 
1877 static int fec_enet_mii_probe(struct net_device *ndev)
1878 {
1879         struct fec_enet_private *fep = netdev_priv(ndev);
1880         struct phy_device *phy_dev = NULL;
1881         char mdio_bus_id[MII_BUS_ID_SIZE];
1882         char phy_name[MII_BUS_ID_SIZE + 3];
1883         int phy_id;
1884         int dev_id = fep->dev_id;
1885 
1886         fep->phy_dev = NULL;
1887 
1888         if (fep->phy_node) {
1889                 phy_dev = of_phy_connect(ndev, fep->phy_node,
1890                                          &fec_enet_adjust_link, 0,
1891                                          fep->phy_interface);
1892                 if (!phy_dev)
1893                         return -ENODEV;
1894         } else {
1895                 /* check for attached phy */
1896                 for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
1897                         if ((fep->mii_bus->phy_mask & (1 << phy_id)))
1898                                 continue;
1899                         if (fep->mii_bus->phy_map[phy_id] == NULL)
1900                                 continue;
1901                         if (fep->mii_bus->phy_map[phy_id]->phy_id == 0)
1902                                 continue;
1903                         if (dev_id--)
1904                                 continue;
1905                         strlcpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE);
1906                         break;
1907                 }
1908 
1909                 if (phy_id >= PHY_MAX_ADDR) {
1910                         netdev_info(ndev, "no PHY, assuming direct connection to switch\n");
1911                         strlcpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);
1912                         phy_id = 0;
1913                 }
1914 
1915                 snprintf(phy_name, sizeof(phy_name),
1916                          PHY_ID_FMT, mdio_bus_id, phy_id);
1917                 phy_dev = phy_connect(ndev, phy_name, &fec_enet_adjust_link,
1918                                       fep->phy_interface);
1919         }
1920 
1921         if (IS_ERR(phy_dev)) {
1922                 netdev_err(ndev, "could not attach to PHY\n");
1923                 return PTR_ERR(phy_dev);
1924         }
1925 
1926         /* mask with MAC supported features */
1927         if (fep->quirks & FEC_QUIRK_HAS_GBIT) {
1928                 phy_dev->supported &= PHY_GBIT_FEATURES;
1929                 phy_dev->supported &= ~SUPPORTED_1000baseT_Half;
1930 #if !defined(CONFIG_M5272)
1931                 phy_dev->supported |= SUPPORTED_Pause;
1932 #endif
1933         }
1934         else
1935                 phy_dev->supported &= PHY_BASIC_FEATURES;
1936 
1937         phy_dev->advertising = phy_dev->supported;
1938 
1939         fep->phy_dev = phy_dev;
1940         fep->link = 0;
1941         fep->full_duplex = 0;
1942 
1943         netdev_info(ndev, "Freescale FEC PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1944                     fep->phy_dev->drv->name, dev_name(&fep->phy_dev->dev),
1945                     fep->phy_dev->irq);
1946 
1947         return 0;
1948 }
1949 
1950 static int fec_enet_mii_init(struct platform_device *pdev)
1951 {
1952         static struct mii_bus *fec0_mii_bus;
1953         struct net_device *ndev = platform_get_drvdata(pdev);
1954         struct fec_enet_private *fep = netdev_priv(ndev);
1955         struct device_node *node;
1956         int err = -ENXIO, i;
1957         u32 mii_speed, holdtime;
1958 
1959         /*
1960          * The i.MX28 dual fec interfaces are not equal.
1961          * Here are the differences:
1962          *
1963          *  - fec0 supports MII & RMII modes while fec1 only supports RMII
1964          *  - fec0 acts as the 1588 time master while fec1 is slave
1965          *  - external phys can only be configured by fec0
1966          *
1967          * That is to say fec1 can not work independently. It only works
1968          * when fec0 is working. The reason behind this design is that the
1969          * second interface is added primarily for Switch mode.
1970          *
1971          * Because of the last point above, both phys are attached on fec0
1972          * mdio interface in board design, and need to be configured by
1973          * fec0 mii_bus.
1974          */
1975         if ((fep->quirks & FEC_QUIRK_SINGLE_MDIO) && fep->dev_id > 0) {
1976                 /* fec1 uses fec0 mii_bus */
1977                 if (mii_cnt && fec0_mii_bus) {
1978                         fep->mii_bus = fec0_mii_bus;
1979                         mii_cnt++;
1980                         return 0;
1981                 }
1982                 return -ENOENT;
1983         }
1984 
1985         fep->mii_timeout = 0;
1986 
1987         /*
1988          * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
1989          *
1990          * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
1991          * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'.  The i.MX28
1992          * Reference Manual has an error on this, and gets fixed on i.MX6Q
1993          * document.
1994          */
1995         mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 5000000);
1996         if (fep->quirks & FEC_QUIRK_ENET_MAC)
1997                 mii_speed--;
1998         if (mii_speed > 63) {
1999                 dev_err(&pdev->dev,
2000                         "fec clock (%lu) to fast to get right mii speed\n",
2001                         clk_get_rate(fep->clk_ipg));
2002                 err = -EINVAL;
2003                 goto err_out;
2004         }
2005 
2006         /*
2007          * The i.MX28 and i.MX6 types have another filed in the MSCR (aka
2008          * MII_SPEED) register that defines the MDIO output hold time. Earlier
2009          * versions are RAZ there, so just ignore the difference and write the
2010          * register always.
2011          * The minimal hold time according to IEE802.3 (clause 22) is 10 ns.
2012          * HOLDTIME + 1 is the number of clk cycles the fec is holding the
2013          * output.
2014          * The HOLDTIME bitfield takes values between 0 and 7 (inclusive).
2015          * Given that ceil(clkrate / 5000000) <= 64, the calculation for
2016          * holdtime cannot result in a value greater than 3.
2017          */
2018         holdtime = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 100000000) - 1;
2019 
2020         fep->phy_speed = mii_speed << 1 | holdtime << 8;
2021 
2022         writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
2023 
2024         fep->mii_bus = mdiobus_alloc();
2025         if (fep->mii_bus == NULL) {
2026                 err = -ENOMEM;
2027                 goto err_out;
2028         }
2029 
2030         fep->mii_bus->name = "fec_enet_mii_bus";
2031         fep->mii_bus->read = fec_enet_mdio_read;
2032         fep->mii_bus->write = fec_enet_mdio_write;
2033         snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
2034                 pdev->name, fep->dev_id + 1);
2035         fep->mii_bus->priv = fep;
2036         fep->mii_bus->parent = &pdev->dev;
2037 
2038         fep->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
2039         if (!fep->mii_bus->irq) {
2040                 err = -ENOMEM;
2041                 goto err_out_free_mdiobus;
2042         }
2043 
2044         for (i = 0; i < PHY_MAX_ADDR; i++)
2045                 fep->mii_bus->irq[i] = PHY_POLL;
2046 
2047         node = of_get_child_by_name(pdev->dev.of_node, "mdio");
2048         if (node) {
2049                 err = of_mdiobus_register(fep->mii_bus, node);
2050                 of_node_put(node);
2051         } else {
2052                 err = mdiobus_register(fep->mii_bus);
2053         }
2054 
2055         if (err)
2056                 goto err_out_free_mdio_irq;
2057 
2058         mii_cnt++;
2059 
2060         /* save fec0 mii_bus */
2061         if (fep->quirks & FEC_QUIRK_SINGLE_MDIO)
2062                 fec0_mii_bus = fep->mii_bus;
2063 
2064         return 0;
2065 
2066 err_out_free_mdio_irq:
2067         kfree(fep->mii_bus->irq);
2068 err_out_free_mdiobus:
2069         mdiobus_free(fep->mii_bus);
2070 err_out:
2071         return err;
2072 }
2073 
2074 static void fec_enet_mii_remove(struct fec_enet_private *fep)
2075 {
2076         if (--mii_cnt == 0) {
2077                 mdiobus_unregister(fep->mii_bus);
2078                 kfree(fep->mii_bus->irq);
2079                 mdiobus_free(fep->mii_bus);
2080         }
2081 }
2082 
2083 static int fec_enet_get_settings(struct net_device *ndev,
2084                                   struct ethtool_cmd *cmd)
2085 {
2086         struct fec_enet_private *fep = netdev_priv(ndev);
2087         struct phy_device *phydev = fep->phy_dev;
2088 
2089         if (!phydev)
2090                 return -ENODEV;
2091 
2092         return phy_ethtool_gset(phydev, cmd);
2093 }
2094 
2095 static int fec_enet_set_settings(struct net_device *ndev,
2096                                  struct ethtool_cmd *cmd)
2097 {
2098         struct fec_enet_private *fep = netdev_priv(ndev);
2099         struct phy_device *phydev = fep->phy_dev;
2100 
2101         if (!phydev)
2102                 return -ENODEV;
2103 
2104         return phy_ethtool_sset(phydev, cmd);
2105 }
2106 
2107 static void fec_enet_get_drvinfo(struct net_device *ndev,
2108                                  struct ethtool_drvinfo *info)
2109 {
2110         struct fec_enet_private *fep = netdev_priv(ndev);
2111 
2112         strlcpy(info->driver, fep->pdev->dev.driver->name,
2113                 sizeof(info->driver));
2114         strlcpy(info->version, "Revision: 1.0", sizeof(info->version));
2115         strlcpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info));
2116 }
2117 
2118 static int fec_enet_get_ts_info(struct net_device *ndev,
2119                                 struct ethtool_ts_info *info)
2120 {
2121         struct fec_enet_private *fep = netdev_priv(ndev);
2122 
2123         if (fep->bufdesc_ex) {
2124 
2125                 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
2126                                         SOF_TIMESTAMPING_RX_SOFTWARE |
2127                                         SOF_TIMESTAMPING_SOFTWARE |
2128                                         SOF_TIMESTAMPING_TX_HARDWARE |
2129                                         SOF_TIMESTAMPING_RX_HARDWARE |
2130                                         SOF_TIMESTAMPING_RAW_HARDWARE;
2131                 if (fep->ptp_clock)
2132                         info->phc_index = ptp_clock_index(fep->ptp_clock);
2133                 else
2134                         info->phc_index = -1;
2135 
2136                 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
2137                                  (1 << HWTSTAMP_TX_ON);
2138 
2139                 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
2140                                    (1 << HWTSTAMP_FILTER_ALL);
2141                 return 0;
2142         } else {
2143                 return ethtool_op_get_ts_info(ndev, info);
2144         }
2145 }
2146 
2147 #if !defined(CONFIG_M5272)
2148 
2149 static void fec_enet_get_pauseparam(struct net_device *ndev,
2150                                     struct ethtool_pauseparam *pause)
2151 {
2152         struct fec_enet_private *fep = netdev_priv(ndev);
2153 
2154         pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0;
2155         pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0;
2156         pause->rx_pause = pause->tx_pause;
2157 }
2158 
2159 static int fec_enet_set_pauseparam(struct net_device *ndev,
2160                                    struct ethtool_pauseparam *pause)
2161 {
2162         struct fec_enet_private *fep = netdev_priv(ndev);
2163 
2164         if (!fep->phy_dev)
2165                 return -ENODEV;
2166 
2167         if (pause->tx_pause != pause->rx_pause) {
2168                 netdev_info(ndev,
2169                         "hardware only support enable/disable both tx and rx");
2170                 return -EINVAL;
2171         }
2172 
2173         fep->pause_flag = 0;
2174 
2175         /* tx pause must be same as rx pause */
2176         fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0;
2177         fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0;
2178 
2179         if (pause->rx_pause || pause->autoneg) {
2180                 fep->phy_dev->supported |= ADVERTISED_Pause;
2181                 fep->phy_dev->advertising |= ADVERTISED_Pause;
2182         } else {
2183                 fep->phy_dev->supported &= ~ADVERTISED_Pause;
2184                 fep->phy_dev->advertising &= ~ADVERTISED_Pause;
2185         }
2186 
2187         if (pause->autoneg) {
2188                 if (netif_running(ndev))
2189                         fec_stop(ndev);
2190                 phy_start_aneg(fep->phy_dev);
2191         }
2192         if (netif_running(ndev)) {
2193                 napi_disable(&fep->napi);
2194                 netif_tx_lock_bh(ndev);
2195                 fec_restart(ndev);
2196                 netif_wake_queue(ndev);
2197                 netif_tx_unlock_bh(ndev);
2198                 napi_enable(&fep->napi);
2199         }
2200 
2201         return 0;
2202 }
2203 
2204 static const struct fec_stat {
2205         char name[ETH_GSTRING_LEN];
2206         u16 offset;
2207 } fec_stats[] = {
2208         /* RMON TX */
2209         { "tx_dropped", RMON_T_DROP },
2210         { "tx_packets", RMON_T_PACKETS },
2211         { "tx_broadcast", RMON_T_BC_PKT },
2212         { "tx_multicast", RMON_T_MC_PKT },
2213         { "tx_crc_errors", RMON_T_CRC_ALIGN },
2214         { "tx_undersize", RMON_T_UNDERSIZE },
2215         { "tx_oversize", RMON_T_OVERSIZE },
2216         { "tx_fragment", RMON_T_FRAG },
2217         { "tx_jabber", RMON_T_JAB },
2218         { "tx_collision", RMON_T_COL },
2219         { "tx_64byte", RMON_T_P64 },
2220         { "tx_65to127byte", RMON_T_P65TO127 },
2221         { "tx_128to255byte", RMON_T_P128TO255 },
2222         { "tx_256to511byte", RMON_T_P256TO511 },
2223         { "tx_512to1023byte", RMON_T_P512TO1023 },
2224         { "tx_1024to2047byte", RMON_T_P1024TO2047 },
2225         { "tx_GTE2048byte", RMON_T_P_GTE2048 },
2226         { "tx_octets", RMON_T_OCTETS },
2227 
2228         /* IEEE TX */
2229         { "IEEE_tx_drop", IEEE_T_DROP },
2230         { "IEEE_tx_frame_ok", IEEE_T_FRAME_OK },
2231         { "IEEE_tx_1col", IEEE_T_1COL },
2232         { "IEEE_tx_mcol", IEEE_T_MCOL },
2233         { "IEEE_tx_def", IEEE_T_DEF },
2234         { "IEEE_tx_lcol", IEEE_T_LCOL },
2235         { "IEEE_tx_excol", IEEE_T_EXCOL },
2236         { "IEEE_tx_macerr", IEEE_T_MACERR },
2237         { "IEEE_tx_cserr", IEEE_T_CSERR },
2238         { "IEEE_tx_sqe", IEEE_T_SQE },
2239         { "IEEE_tx_fdxfc", IEEE_T_FDXFC },
2240         { "IEEE_tx_octets_ok", IEEE_T_OCTETS_OK },
2241 
2242         /* RMON RX */
2243         { "rx_packets", RMON_R_PACKETS },
2244         { "rx_broadcast", RMON_R_BC_PKT },
2245         { "rx_multicast", RMON_R_MC_PKT },
2246         { "rx_crc_errors", RMON_R_CRC_ALIGN },
2247         { "rx_undersize", RMON_R_UNDERSIZE },
2248         { "rx_oversize", RMON_R_OVERSIZE },
2249         { "rx_fragment", RMON_R_FRAG },
2250         { "rx_jabber", RMON_R_JAB },
2251         { "rx_64byte", RMON_R_P64 },
2252         { "rx_65to127byte", RMON_R_P65TO127 },
2253         { "rx_128to255byte", RMON_R_P128TO255 },
2254         { "rx_256to511byte", RMON_R_P256TO511 },
2255         { "rx_512to1023byte", RMON_R_P512TO1023 },
2256         { "rx_1024to2047byte", RMON_R_P1024TO2047 },
2257         { "rx_GTE2048byte", RMON_R_P_GTE2048 },
2258         { "rx_octets", RMON_R_OCTETS },
2259 
2260         /* IEEE RX */
2261         { "IEEE_rx_drop", IEEE_R_DROP },
2262         { "IEEE_rx_frame_ok", IEEE_R_FRAME_OK },
2263         { "IEEE_rx_crc", IEEE_R_CRC },
2264         { "IEEE_rx_align", IEEE_R_ALIGN },
2265         { "IEEE_rx_macerr", IEEE_R_MACERR },
2266         { "IEEE_rx_fdxfc", IEEE_R_FDXFC },
2267         { "IEEE_rx_octets_ok", IEEE_R_OCTETS_OK },
2268 };
2269 
2270 static void fec_enet_get_ethtool_stats(struct net_device *dev,
2271         struct ethtool_stats *stats, u64 *data)
2272 {
2273         struct fec_enet_private *fep = netdev_priv(dev);
2274         int i;
2275 
2276         for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
2277                 data[i] = readl(fep->hwp + fec_stats[i].offset);
2278 }
2279 
2280 static void fec_enet_get_strings(struct net_device *netdev,
2281         u32 stringset, u8 *data)
2282 {
2283         int i;
2284         switch (stringset) {
2285         case ETH_SS_STATS:
2286                 for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
2287                         memcpy(data + i * ETH_GSTRING_LEN,
2288                                 fec_stats[i].name, ETH_GSTRING_LEN);
2289                 break;
2290         }
2291 }
2292 
2293 static int fec_enet_get_sset_count(struct net_device *dev, int sset)
2294 {
2295         switch (sset) {
2296         case ETH_SS_STATS:
2297                 return ARRAY_SIZE(fec_stats);
2298         default:
2299                 return -EOPNOTSUPP;
2300         }
2301 }
2302 #endif /* !defined(CONFIG_M5272) */
2303 
2304 static int fec_enet_nway_reset(struct net_device *dev)
2305 {
2306         struct fec_enet_private *fep = netdev_priv(dev);
2307         struct phy_device *phydev = fep->phy_dev;
2308 
2309         if (!phydev)
2310                 return -ENODEV;
2311 
2312         return genphy_restart_aneg(phydev);
2313 }
2314 
2315 /* ITR clock source is enet system clock (clk_ahb).
2316  * TCTT unit is cycle_ns * 64 cycle
2317  * So, the ICTT value = X us / (cycle_ns * 64)
2318  */
2319 static int fec_enet_us_to_itr_clock(struct net_device *ndev, int us)
2320 {
2321         struct fec_enet_private *fep = netdev_priv(ndev);
2322 
2323         return us * (fep->itr_clk_rate / 64000) / 1000;
2324 }
2325 
2326 /* Set threshold for interrupt coalescing */
2327 static void fec_enet_itr_coal_set(struct net_device *ndev)
2328 {
2329         struct fec_enet_private *fep = netdev_priv(ndev);
2330         int rx_itr, tx_itr;
2331 
2332         if (!(fep->quirks & FEC_QUIRK_HAS_AVB))
2333                 return;
2334 
2335         /* Must be greater than zero to avoid unpredictable behavior */
2336         if (!fep->rx_time_itr || !fep->rx_pkts_itr ||
2337             !fep->tx_time_itr || !fep->tx_pkts_itr)
2338                 return;
2339 
2340         /* Select enet system clock as Interrupt Coalescing
2341          * timer Clock Source
2342          */
2343         rx_itr = FEC_ITR_CLK_SEL;
2344         tx_itr = FEC_ITR_CLK_SEL;
2345 
2346         /* set ICFT and ICTT */
2347         rx_itr |= FEC_ITR_ICFT(fep->rx_pkts_itr);
2348         rx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr));
2349         tx_itr |= FEC_ITR_ICFT(fep->tx_pkts_itr);
2350         tx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr));
2351 
2352         rx_itr |= FEC_ITR_EN;
2353         tx_itr |= FEC_ITR_EN;
2354 
2355         writel(tx_itr, fep->hwp + FEC_TXIC0);
2356         writel(rx_itr, fep->hwp + FEC_RXIC0);
2357         writel(tx_itr, fep->hwp + FEC_TXIC1);
2358         writel(rx_itr, fep->hwp + FEC_RXIC1);
2359         writel(tx_itr, fep->hwp + FEC_TXIC2);
2360         writel(rx_itr, fep->hwp + FEC_RXIC2);
2361 }
2362 
2363 static int
2364 fec_enet_get_coalesce(struct net_device *ndev, struct ethtool_coalesce *ec)
2365 {
2366         struct fec_enet_private *fep = netdev_priv(ndev);
2367 
2368         if (!(fep->quirks & FEC_QUIRK_HAS_AVB))
2369                 return -EOPNOTSUPP;
2370 
2371         ec->rx_coalesce_usecs = fep->rx_time_itr;
2372         ec->rx_max_coalesced_frames = fep->rx_pkts_itr;
2373 
2374         ec->tx_coalesce_usecs = fep->tx_time_itr;
2375         ec->tx_max_coalesced_frames = fep->tx_pkts_itr;
2376 
2377         return 0;
2378 }
2379 
2380 static int
2381 fec_enet_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *ec)
2382 {
2383         struct fec_enet_private *fep = netdev_priv(ndev);
2384         unsigned int cycle;
2385 
2386         if (!(fep->quirks & FEC_QUIRK_HAS_AVB))
2387                 return -EOPNOTSUPP;
2388 
2389         if (ec->rx_max_coalesced_frames > 255) {
2390                 pr_err("Rx coalesced frames exceed hardware limiation");
2391                 return -EINVAL;
2392         }
2393 
2394         if (ec->tx_max_coalesced_frames > 255) {
2395                 pr_err("Tx coalesced frame exceed hardware limiation");
2396                 return -EINVAL;
2397         }
2398 
2399         cycle = fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr);
2400         if (cycle > 0xFFFF) {
2401                 pr_err("Rx coalesed usec exceeed hardware limiation");
2402                 return -EINVAL;
2403         }
2404 
2405         cycle = fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr);
2406         if (cycle > 0xFFFF) {
2407                 pr_err("Rx coalesed usec exceeed hardware limiation");
2408                 return -EINVAL;
2409         }
2410 
2411         fep->rx_time_itr = ec->rx_coalesce_usecs;
2412         fep->rx_pkts_itr = ec->rx_max_coalesced_frames;
2413 
2414         fep->tx_time_itr = ec->tx_coalesce_usecs;
2415         fep->tx_pkts_itr = ec->tx_max_coalesced_frames;
2416 
2417         fec_enet_itr_coal_set(ndev);
2418 
2419         return 0;
2420 }
2421 
2422 static void fec_enet_itr_coal_init(struct net_device *ndev)
2423 {
2424         struct ethtool_coalesce ec;
2425 
2426         ec.rx_coalesce_usecs = FEC_ITR_ICTT_DEFAULT;
2427         ec.rx_max_coalesced_frames = FEC_ITR_ICFT_DEFAULT;
2428 
2429         ec.tx_coalesce_usecs = FEC_ITR_ICTT_DEFAULT;
2430         ec.tx_max_coalesced_frames = FEC_ITR_ICFT_DEFAULT;
2431 
2432         fec_enet_set_coalesce(ndev, &ec);
2433 }
2434 
2435 static int fec_enet_get_tunable(struct net_device *netdev,
2436                                 const struct ethtool_tunable *tuna,
2437                                 void *data)
2438 {
2439         struct fec_enet_private *fep = netdev_priv(netdev);
2440         int ret = 0;
2441 
2442         switch (tuna->id) {
2443         case ETHTOOL_RX_COPYBREAK:
2444                 *(u32 *)data = fep->rx_copybreak;
2445                 break;
2446         default:
2447                 ret = -EINVAL;
2448                 break;
2449         }
2450 
2451         return ret;
2452 }
2453 
2454 static int fec_enet_set_tunable(struct net_device *netdev,
2455                                 const struct ethtool_tunable *tuna,
2456                                 const void *data)
2457 {
2458         struct fec_enet_private *fep = netdev_priv(netdev);
2459         int ret = 0;
2460 
2461         switch (tuna->id) {
2462         case ETHTOOL_RX_COPYBREAK:
2463                 fep->rx_copybreak = *(u32 *)data;
2464                 break;
2465         default:
2466                 ret = -EINVAL;
2467                 break;
2468         }
2469 
2470         return ret;
2471 }
2472 
2473 static void
2474 fec_enet_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
2475 {
2476         struct fec_enet_private *fep = netdev_priv(ndev);
2477 
2478         if (fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET) {
2479                 wol->supported = WAKE_MAGIC;
2480                 wol->wolopts = fep->wol_flag & FEC_WOL_FLAG_ENABLE ? WAKE_MAGIC : 0;
2481         } else {
2482                 wol->supported = wol->wolopts = 0;
2483         }
2484 }
2485 
2486 static int
2487 fec_enet_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
2488 {
2489         struct fec_enet_private *fep = netdev_priv(ndev);
2490 
2491         if (!(fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET))
2492                 return -EINVAL;
2493 
2494         if (wol->wolopts & ~WAKE_MAGIC)
2495                 return -EINVAL;
2496 
2497         device_set_wakeup_enable(&ndev->dev, wol->wolopts & WAKE_MAGIC);
2498         if (device_may_wakeup(&ndev->dev)) {
2499                 fep->wol_flag |= FEC_WOL_FLAG_ENABLE;
2500                 if (fep->irq[0] > 0)
2501                         enable_irq_wake(fep->irq[0]);
2502         } else {
2503                 fep->wol_flag &= (~FEC_WOL_FLAG_ENABLE);
2504                 if (fep->irq[0] > 0)
2505                         disable_irq_wake(fep->irq[0]);
2506         }
2507 
2508         return 0;
2509 }
2510 
2511 static const struct ethtool_ops fec_enet_ethtool_ops = {
2512         .get_settings           = fec_enet_get_settings,
2513         .set_settings           = fec_enet_set_settings,
2514         .get_drvinfo            = fec_enet_get_drvinfo,
2515         .nway_reset             = fec_enet_nway_reset,
2516         .get_link               = ethtool_op_get_link,
2517         .get_coalesce           = fec_enet_get_coalesce,
2518         .set_coalesce           = fec_enet_set_coalesce,
2519 #ifndef CONFIG_M5272
2520         .get_pauseparam         = fec_enet_get_pauseparam,
2521         .set_pauseparam         = fec_enet_set_pauseparam,
2522         .get_strings            = fec_enet_get_strings,
2523         .get_ethtool_stats      = fec_enet_get_ethtool_stats,
2524         .get_sset_count         = fec_enet_get_sset_count,
2525 #endif
2526         .get_ts_info            = fec_enet_get_ts_info,
2527         .get_tunable            = fec_enet_get_tunable,
2528         .set_tunable            = fec_enet_set_tunable,
2529         .get_wol                = fec_enet_get_wol,
2530         .set_wol                = fec_enet_set_wol,
2531 };
2532 
2533 static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
2534 {
2535         struct fec_enet_private *fep = netdev_priv(ndev);
2536         struct phy_device *phydev = fep->phy_dev;
2537 
2538         if (!netif_running(ndev))
2539                 return -EINVAL;
2540 
2541         if (!phydev)
2542                 return -ENODEV;
2543 
2544         if (fep->bufdesc_ex) {
2545                 if (cmd == SIOCSHWTSTAMP)
2546                         return fec_ptp_set(ndev, rq);
2547                 if (cmd == SIOCGHWTSTAMP)
2548                         return fec_ptp_get(ndev, rq);
2549         }
2550 
2551         return phy_mii_ioctl(phydev, rq, cmd);
2552 }
2553 
2554 static void fec_enet_free_buffers(struct net_device *ndev)
2555 {
2556         struct fec_enet_private *fep = netdev_priv(ndev);
2557         unsigned int i;
2558         struct sk_buff *skb;
2559         struct bufdesc  *bdp;
2560         struct fec_enet_priv_tx_q *txq;
2561         struct fec_enet_priv_rx_q *rxq;
2562         unsigned int q;
2563 
2564         for (q = 0; q < fep->num_rx_queues; q++) {
2565                 rxq = fep->rx_queue[q];
2566                 bdp = rxq->rx_bd_base;
2567                 for (i = 0; i < rxq->rx_ring_size; i++) {
2568                         skb = rxq->rx_skbuff[i];
2569                         rxq->rx_skbuff[i] = NULL;
2570                         if (skb) {
2571                                 dma_unmap_single(&fep->pdev->dev,
2572                                                  bdp->cbd_bufaddr,
2573                                                  FEC_ENET_RX_FRSIZE - fep->rx_align,
2574                                                  DMA_FROM_DEVICE);
2575                                 dev_kfree_skb(skb);
2576                         }
2577                         bdp = fec_enet_get_nextdesc(bdp, fep, q);
2578                 }
2579         }
2580 
2581         for (q = 0; q < fep->num_tx_queues; q++) {
2582                 txq = fep->tx_queue[q];
2583                 bdp = txq->tx_bd_base;
2584                 for (i = 0; i < txq->tx_ring_size; i++) {
2585                         kfree(txq->tx_bounce[i]);
2586                         txq->tx_bounce[i] = NULL;
2587                         skb = txq->tx_skbuff[i];
2588                         txq->tx_skbuff[i] = NULL;
2589                         dev_kfree_skb(skb);
2590                 }
2591         }
2592 }
2593 
2594 static void fec_enet_free_queue(struct net_device *ndev)
2595 {
2596         struct fec_enet_private *fep = netdev_priv(ndev);
2597         int i;
2598         struct fec_enet_priv_tx_q *txq;
2599 
2600         for (i = 0; i < fep->num_tx_queues; i++)
2601                 if (fep->tx_queue[i] && fep->tx_queue[i]->tso_hdrs) {
2602                         txq = fep->tx_queue[i];
2603                         dma_free_coherent(NULL,
2604                                           txq->tx_ring_size * TSO_HEADER_SIZE,
2605                                           txq->tso_hdrs,
2606                                           txq->tso_hdrs_dma);
2607                 }
2608 
2609         for (i = 0; i < fep->num_rx_queues; i++)
2610                 kfree(fep->rx_queue[i]);
2611         for (i = 0; i < fep->num_tx_queues; i++)
2612                 kfree(fep->tx_queue[i]);
2613 }
2614 
2615 static int fec_enet_alloc_queue(struct net_device *ndev)
2616 {
2617         struct fec_enet_private *fep = netdev_priv(ndev);
2618         int i;
2619         int ret = 0;
2620         struct fec_enet_priv_tx_q *txq;
2621 
2622         for (i = 0; i < fep->num_tx_queues; i++) {
2623                 txq = kzalloc(sizeof(*txq), GFP_KERNEL);
2624                 if (!txq) {
2625                         ret = -ENOMEM;
2626                         goto alloc_failed;
2627                 }
2628 
2629                 fep->tx_queue[i] = txq;
2630                 txq->tx_ring_size = TX_RING_SIZE;
2631                 fep->total_tx_ring_size += fep->tx_queue[i]->tx_ring_size;
2632 
2633                 txq->tx_stop_threshold = FEC_MAX_SKB_DESCS;
2634                 txq->tx_wake_threshold =
2635                                 (txq->tx_ring_size - txq->tx_stop_threshold) / 2;
2636 
2637                 txq->tso_hdrs = dma_alloc_coherent(NULL,
2638                                         txq->tx_ring_size * TSO_HEADER_SIZE,
2639                                         &txq->tso_hdrs_dma,
2640                                         GFP_KERNEL);
2641                 if (!txq->tso_hdrs) {
2642                         ret = -ENOMEM;
2643                         goto alloc_failed;
2644                 }
2645         }
2646 
2647         for (i = 0; i < fep->num_rx_queues; i++) {
2648                 fep->rx_queue[i] = kzalloc(sizeof(*fep->rx_queue[i]),
2649                                            GFP_KERNEL);
2650                 if (!fep->rx_queue[i]) {
2651                         ret = -ENOMEM;
2652                         goto alloc_failed;
2653                 }
2654 
2655                 fep->rx_queue[i]->rx_ring_size = RX_RING_SIZE;
2656                 fep->total_rx_ring_size += fep->rx_queue[i]->rx_ring_size;
2657         }
2658         return ret;
2659 
2660 alloc_failed:
2661         fec_enet_free_queue(ndev);
2662         return ret;
2663 }
2664 
2665 static int
2666 fec_enet_alloc_rxq_buffers(struct net_device *ndev, unsigned int queue)
2667 {
2668         struct fec_enet_private *fep = netdev_priv(ndev);
2669         unsigned int i;
2670         struct sk_buff *skb;
2671         struct bufdesc  *bdp;
2672         struct fec_enet_priv_rx_q *rxq;
2673 
2674         rxq = fep->rx_queue[queue];
2675         bdp = rxq->rx_bd_base;
2676         for (i = 0; i < rxq->rx_ring_size; i++) {
2677                 skb = netdev_alloc_skb(ndev, FEC_ENET_RX_FRSIZE);
2678                 if (!skb)
2679                         goto err_alloc;
2680 
2681                 if (fec_enet_new_rxbdp(ndev, bdp, skb)) {
2682                         dev_kfree_skb(skb);
2683                         goto err_alloc;
2684                 }
2685 
2686                 rxq->rx_skbuff[i] = skb;
2687                 bdp->cbd_sc = BD_ENET_RX_EMPTY;
2688 
2689                 if (fep->bufdesc_ex) {
2690                         struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
2691                         ebdp->cbd_esc = BD_ENET_RX_INT;
2692                 }
2693 
2694                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
2695         }
2696 
2697         /* Set the last buffer to wrap. */
2698         bdp = fec_enet_get_prevdesc(bdp, fep, queue);
2699         bdp->cbd_sc |= BD_SC_WRAP;
2700         return 0;
2701 
2702  err_alloc:
2703         fec_enet_free_buffers(ndev);
2704         return -ENOMEM;
2705 }
2706 
2707 static int
2708 fec_enet_alloc_txq_buffers(struct net_device *ndev, unsigned int queue)
2709 {
2710         struct fec_enet_private *fep = netdev_priv(ndev);
2711         unsigned int i;
2712         struct bufdesc  *bdp;
2713         struct fec_enet_priv_tx_q *txq;
2714 
2715         txq = fep->tx_queue[queue];
2716         bdp = txq->tx_bd_base;
2717         for (i = 0; i < txq->tx_ring_size; i++) {
2718                 txq->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
2719                 if (!txq->tx_bounce[i])
2720                         goto err_alloc;
2721 
2722                 bdp->cbd_sc = 0;
2723                 bdp->cbd_bufaddr = 0;
2724 
2725                 if (fep->bufdesc_ex) {
2726                         struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
2727                         ebdp->cbd_esc = BD_ENET_TX_INT;
2728                 }
2729 
2730                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
2731         }
2732 
2733         /* Set the last buffer to wrap. */
2734         bdp = fec_enet_get_prevdesc(bdp, fep, queue);
2735         bdp->cbd_sc |= BD_SC_WRAP;
2736 
2737         return 0;
2738 
2739  err_alloc:
2740         fec_enet_free_buffers(ndev);
2741         return -ENOMEM;
2742 }
2743 
2744 static int fec_enet_alloc_buffers(struct net_device *ndev)
2745 {
2746         struct fec_enet_private *fep = netdev_priv(ndev);
2747         unsigned int i;
2748 
2749         for (i = 0; i < fep->num_rx_queues; i++)
2750                 if (fec_enet_alloc_rxq_buffers(ndev, i))
2751                         return -ENOMEM;
2752 
2753         for (i = 0; i < fep->num_tx_queues; i++)
2754                 if (fec_enet_alloc_txq_buffers(ndev, i))
2755                         return -ENOMEM;
2756         return 0;
2757 }
2758 
2759 static int
2760 fec_enet_open(struct net_device *ndev)
2761 {
2762         struct fec_enet_private *fep = netdev_priv(ndev);
2763         int ret;
2764 
2765         pinctrl_pm_select_default_state(&fep->pdev->dev);
2766         ret = fec_enet_clk_enable(ndev, true);
2767         if (ret)
2768                 return ret;
2769 
2770         /* I should reset the ring buffers here, but I don't yet know
2771          * a simple way to do that.
2772          */
2773 
2774         ret = fec_enet_alloc_buffers(ndev);
2775         if (ret)
2776                 goto err_enet_alloc;
2777 
2778         /* Probe and connect to PHY when open the interface */
2779         ret = fec_enet_mii_probe(ndev);
2780         if (ret)
2781                 goto err_enet_mii_probe;
2782 
2783         fec_restart(ndev);
2784         napi_enable(&fep->napi);
2785         phy_start(fep->phy_dev);
2786         netif_tx_start_all_queues(ndev);
2787 
2788         device_set_wakeup_enable(&ndev->dev, fep->wol_flag &
2789                                  FEC_WOL_FLAG_ENABLE);
2790 
2791         return 0;
2792 
2793 err_enet_mii_probe:
2794         fec_enet_free_buffers(ndev);
2795 err_enet_alloc:
2796         fec_enet_clk_enable(ndev, false);
2797         pinctrl_pm_select_sleep_state(&fep->pdev->dev);
2798         return ret;
2799 }
2800 
2801 static int
2802 fec_enet_close(struct net_device *ndev)
2803 {
2804         struct fec_enet_private *fep = netdev_priv(ndev);
2805 
2806         phy_stop(fep->phy_dev);
2807 
2808         if (netif_device_present(ndev)) {
2809                 napi_disable(&fep->napi);
2810                 netif_tx_disable(ndev);
2811                 fec_stop(ndev);
2812         }
2813 
2814         phy_disconnect(fep->phy_dev);
2815         fep->phy_dev = NULL;
2816 
2817         fec_enet_clk_enable(ndev, false);
2818         pinctrl_pm_select_sleep_state(&fep->pdev->dev);
2819         fec_enet_free_buffers(ndev);
2820 
2821         return 0;
2822 }
2823 
2824 /* Set or clear the multicast filter for this adaptor.
2825  * Skeleton taken from sunlance driver.
2826  * The CPM Ethernet implementation allows Multicast as well as individual
2827  * MAC address filtering.  Some of the drivers check to make sure it is
2828  * a group multicast address, and discard those that are not.  I guess I
2829  * will do the same for now, but just remove the test if you want
2830  * individual filtering as well (do the upper net layers want or support
2831  * this kind of feature?).
2832  */
2833 
2834 #define HASH_BITS       6               /* #bits in hash */
2835 #define CRC32_POLY      0xEDB88320
2836 
2837 static void set_multicast_list(struct net_device *ndev)
2838 {
2839         struct fec_enet_private *fep = netdev_priv(ndev);
2840         struct netdev_hw_addr *ha;
2841         unsigned int i, bit, data, crc, tmp;
2842         unsigned char hash;
2843 
2844         if (ndev->flags & IFF_PROMISC) {
2845                 tmp = readl(fep->hwp + FEC_R_CNTRL);
2846                 tmp |= 0x8;
2847                 writel(tmp, fep->hwp + FEC_R_CNTRL);
2848                 return;
2849         }
2850 
2851         tmp = readl(fep->hwp + FEC_R_CNTRL);
2852         tmp &= ~0x8;
2853         writel(tmp, fep->hwp + FEC_R_CNTRL);
2854 
2855         if (ndev->flags & IFF_ALLMULTI) {
2856                 /* Catch all multicast addresses, so set the
2857                  * filter to all 1's
2858                  */
2859                 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2860                 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2861 
2862                 return;
2863         }
2864 
2865         /* Clear filter and add the addresses in hash register
2866          */
2867         writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2868         writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2869 
2870         netdev_for_each_mc_addr(ha, ndev) {
2871                 /* calculate crc32 value of mac address */
2872                 crc = 0xffffffff;
2873 
2874                 for (i = 0; i < ndev->addr_len; i++) {
2875                         data = ha->addr[i];
2876                         for (bit = 0; bit < 8; bit++, data >>= 1) {
2877                                 crc = (crc >> 1) ^
2878                                 (((crc ^ data) & 1) ? CRC32_POLY : 0);
2879                         }
2880                 }
2881 
2882                 /* only upper 6 bits (HASH_BITS) are used
2883                  * which point to specific bit in he hash registers
2884                  */
2885                 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
2886 
2887                 if (hash > 31) {
2888                         tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2889                         tmp |= 1 << (hash - 32);
2890                         writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2891                 } else {
2892                         tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2893                         tmp |= 1 << hash;
2894                         writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2895                 }
2896         }
2897 }
2898 
2899 /* Set a MAC change in hardware. */
2900 static int
2901 fec_set_mac_address(struct net_device *ndev, void *p)
2902 {
2903         struct fec_enet_private *fep = netdev_priv(ndev);
2904         struct sockaddr *addr = p;
2905 
2906         if (addr) {
2907                 if (!is_valid_ether_addr(addr->sa_data))
2908                         return -EADDRNOTAVAIL;
2909                 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
2910         }
2911 
2912         writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) |
2913                 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24),
2914                 fep->hwp + FEC_ADDR_LOW);
2915         writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24),
2916                 fep->hwp + FEC_ADDR_HIGH);
2917         return 0;
2918 }
2919 
2920 #ifdef CONFIG_NET_POLL_CONTROLLER
2921 /**
2922  * fec_poll_controller - FEC Poll controller function
2923  * @dev: The FEC network adapter
2924  *
2925  * Polled functionality used by netconsole and others in non interrupt mode
2926  *
2927  */
2928 static void fec_poll_controller(struct net_device *dev)
2929 {
2930         int i;
2931         struct fec_enet_private *fep = netdev_priv(dev);
2932 
2933         for (i = 0; i < FEC_IRQ_NUM; i++) {
2934                 if (fep->irq[i] > 0) {
2935                         disable_irq(fep->irq[i]);
2936                         fec_enet_interrupt(fep->irq[i], dev);
2937                         enable_irq(fep->irq[i]);
2938                 }
2939         }
2940 }
2941 #endif
2942 
2943 #define FEATURES_NEED_QUIESCE NETIF_F_RXCSUM
2944 static inline void fec_enet_set_netdev_features(struct net_device *netdev,
2945         netdev_features_t features)
2946 {
2947         struct fec_enet_private *fep = netdev_priv(netdev);
2948         netdev_features_t changed = features ^ netdev->features;
2949 
2950         netdev->features = features;
2951 
2952         /* Receive checksum has been changed */
2953         if (changed & NETIF_F_RXCSUM) {
2954                 if (features & NETIF_F_RXCSUM)
2955                         fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
2956                 else
2957                         fep->csum_flags &= ~FLAG_RX_CSUM_ENABLED;
2958         }
2959 }
2960 
2961 static int fec_set_features(struct net_device *netdev,
2962         netdev_features_t features)
2963 {
2964         struct fec_enet_private *fep = netdev_priv(netdev);
2965         netdev_features_t changed = features ^ netdev->features;
2966 
2967         if (netif_running(netdev) && changed & FEATURES_NEED_QUIESCE) {
2968                 napi_disable(&fep->napi);
2969                 netif_tx_lock_bh(netdev);
2970                 fec_stop(netdev);
2971                 fec_enet_set_netdev_features(netdev, features);
2972                 fec_restart(netdev);
2973                 netif_tx_wake_all_queues(netdev);
2974                 netif_tx_unlock_bh(netdev);
2975                 napi_enable(&fep->napi);
2976         } else {
2977                 fec_enet_set_netdev_features(netdev, features);
2978         }
2979 
2980         return 0;
2981 }
2982 
2983 static const struct net_device_ops fec_netdev_ops = {
2984         .ndo_open               = fec_enet_open,
2985         .ndo_stop               = fec_enet_close,
2986         .ndo_start_xmit         = fec_enet_start_xmit,
2987         .ndo_set_rx_mode        = set_multicast_list,
2988         .ndo_change_mtu         = eth_change_mtu,
2989         .ndo_validate_addr      = eth_validate_addr,
2990         .ndo_tx_timeout         = fec_timeout,
2991         .ndo_set_mac_address    = fec_set_mac_address,
2992         .ndo_do_ioctl           = fec_enet_ioctl,
2993 #ifdef CONFIG_NET_POLL_CONTROLLER
2994         .ndo_poll_controller    = fec_poll_controller,
2995 #endif
2996         .ndo_set_features       = fec_set_features,
2997 };
2998 
2999  /*
3000   * XXX:  We need to clean up on failure exits here.
3001   *
3002   */
3003 static int fec_enet_init(struct net_device *ndev)
3004 {
3005         struct fec_enet_private *fep = netdev_priv(ndev);
3006         struct fec_enet_priv_tx_q *txq;
3007         struct fec_enet_priv_rx_q *rxq;
3008         struct bufdesc *cbd_base;
3009         dma_addr_t bd_dma;
3010         int bd_size;
3011         unsigned int i;
3012 
3013 #if defined(CONFIG_ARM)
3014         fep->rx_align = 0xf;
3015         fep->tx_align = 0xf;
3016 #else
3017         fep->rx_align = 0x3;
3018         fep->tx_align = 0x3;
3019 #endif
3020 
3021         fec_enet_alloc_queue(ndev);
3022 
3023         if (fep->bufdesc_ex)
3024                 fep->bufdesc_size = sizeof(struct bufdesc_ex);
3025         else
3026                 fep->bufdesc_size = sizeof(struct bufdesc);
3027         bd_size = (fep->total_tx_ring_size + fep->total_rx_ring_size) *
3028                         fep->bufdesc_size;
3029 
3030         /* Allocate memory for buffer descriptors. */
3031         cbd_base = dma_alloc_coherent(NULL, bd_size, &bd_dma,
3032                                       GFP_KERNEL);
3033         if (!cbd_base) {
3034                 return -ENOMEM;
3035         }
3036 
3037         memset(cbd_base, 0, bd_size);
3038 
3039         /* Get the Ethernet address */
3040         fec_get_mac(ndev);
3041         /* make sure MAC we just acquired is programmed into the hw */
3042         fec_set_mac_address(ndev, NULL);
3043 
3044         /* Set receive and transmit descriptor base. */
3045         for (i = 0; i < fep->num_rx_queues; i++) {
3046                 rxq = fep->rx_queue[i];
3047                 rxq->index = i;
3048                 rxq->rx_bd_base = (struct bufdesc *)cbd_base;
3049                 rxq->bd_dma = bd_dma;
3050                 if (fep->bufdesc_ex) {
3051                         bd_dma += sizeof(struct bufdesc_ex) * rxq->rx_ring_size;
3052                         cbd_base = (struct bufdesc *)
3053                                 (((struct bufdesc_ex *)cbd_base) + rxq->rx_ring_size);
3054                 } else {
3055                         bd_dma += sizeof(struct bufdesc) * rxq->rx_ring_size;
3056                         cbd_base += rxq->rx_ring_size;
3057                 }
3058         }
3059 
3060         for (i = 0; i < fep->num_tx_queues; i++) {
3061                 txq = fep->tx_queue[i];
3062                 txq->index = i;
3063                 txq->tx_bd_base = (struct bufdesc *)cbd_base;
3064                 txq->bd_dma = bd_dma;
3065                 if (fep->bufdesc_ex) {
3066                         bd_dma += sizeof(struct bufdesc_ex) * txq->tx_ring_size;
3067                         cbd_base = (struct bufdesc *)
3068                          (((struct bufdesc_ex *)cbd_base) + txq->tx_ring_size);
3069                 } else {
3070                         bd_dma += sizeof(struct bufdesc) * txq->tx_ring_size;
3071                         cbd_base += txq->tx_ring_size;
3072                 }
3073         }
3074 
3075 
3076         /* The FEC Ethernet specific entries in the device structure */
3077         ndev->watchdog_timeo = TX_TIMEOUT;
3078         ndev->netdev_ops = &fec_netdev_ops;
3079         ndev->ethtool_ops = &fec_enet_ethtool_ops;
3080 
3081         writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK);
3082         netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi, NAPI_POLL_WEIGHT);
3083 
3084         if (fep->quirks & FEC_QUIRK_HAS_VLAN)
3085                 /* enable hw VLAN support */
3086                 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3087 
3088         if (fep->quirks & FEC_QUIRK_HAS_CSUM) {
3089                 ndev->gso_max_segs = FEC_MAX_TSO_SEGS;
3090 
3091                 /* enable hw accelerator */
3092                 ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM
3093                                 | NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO);
3094                 fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
3095         }
3096 
3097         if (fep->quirks & FEC_QUIRK_HAS_AVB) {
3098                 fep->tx_align = 0;
3099                 fep->rx_align = 0x3f;
3100         }
3101 
3102         ndev->hw_features = ndev->features;
3103 
3104         fec_restart(ndev);
3105 
3106         return 0;
3107 }
3108 
3109 #ifdef CONFIG_OF
3110 static void fec_reset_phy(struct platform_device *pdev)
3111 {
3112         int err, phy_reset;
3113         int msec = 1;
3114         struct device_node *np = pdev->dev.of_node;
3115 
3116         if (!np)
3117                 return;
3118 
3119         of_property_read_u32(np, "phy-reset-duration", &msec);
3120         /* A sane reset duration should not be longer than 1s */
3121         if (msec > 1000)
3122                 msec = 1;
3123 
3124         phy_reset = of_get_named_gpio(np, "phy-reset-gpios", 0);
3125         if (!gpio_is_valid(phy_reset))
3126                 return;
3127 
3128         err = devm_gpio_request_one(&pdev->dev, phy_reset,
3129                                     GPIOF_OUT_INIT_LOW, "phy-reset");
3130         if (err) {
3131                 dev_err(&pdev->dev, "failed to get phy-reset-gpios: %d\n", err);
3132                 return;
3133         }
3134         msleep(msec);
3135         gpio_set_value(phy_reset, 1);
3136 }
3137 #else /* CONFIG_OF */
3138 static void fec_reset_phy(struct platform_device *pdev)
3139 {
3140         /*
3141          * In case of platform probe, the reset has been done
3142          * by machine code.
3143          */
3144 }
3145 #endif /* CONFIG_OF */
3146 
3147 static void
3148 fec_enet_get_queue_num(struct platform_device *pdev, int *num_tx, int *num_rx)
3149 {
3150         struct device_node *np = pdev->dev.of_node;
3151         int err;
3152 
3153         *num_tx = *num_rx = 1;
3154 
3155         if (!np || !of_device_is_available(np))
3156                 return;
3157 
3158         /* parse the num of tx and rx queues */
3159         err = of_property_read_u32(np, "fsl,num-tx-queues", num_tx);
3160         if (err)
3161                 *num_tx = 1;
3162 
3163         err = of_property_read_u32(np, "fsl,num-rx-queues", num_rx);
3164         if (err)
3165                 *num_rx = 1;
3166 
3167         if (*num_tx < 1 || *num_tx > FEC_ENET_MAX_TX_QS) {
3168                 dev_warn(&pdev->dev, "Invalid num_tx(=%d), fall back to 1\n",
3169                          *num_tx);
3170                 *num_tx = 1;
3171                 return;
3172         }
3173 
3174         if (*num_rx < 1 || *num_rx > FEC_ENET_MAX_RX_QS) {
3175                 dev_warn(&pdev->dev, "Invalid num_rx(=%d), fall back to 1\n",
3176                          *num_rx);
3177                 *num_rx = 1;
3178                 return;
3179         }
3180 
3181 }
3182 
3183 static int
3184 fec_probe(struct platform_device *pdev)
3185 {
3186         struct fec_enet_private *fep;
3187         struct fec_platform_data *pdata;
3188         struct net_device *ndev;
3189         int i, irq, ret = 0;
3190         struct resource *r;
3191         const struct of_device_id *of_id;
3192         static int dev_id;
3193         struct device_node *np = pdev->dev.of_node, *phy_node;
3194         int num_tx_qs;
3195         int num_rx_qs;
3196 
3197         fec_enet_get_queue_num(pdev, &num_tx_qs, &num_rx_qs);
3198 
3199         /* Init network device */
3200         ndev = alloc_etherdev_mqs(sizeof(struct fec_enet_private),
3201                                   num_tx_qs, num_rx_qs);
3202         if (!ndev)
3203                 return -ENOMEM;
3204 
3205         SET_NETDEV_DEV(ndev, &pdev->dev);
3206 
3207         /* setup board info structure */
3208         fep = netdev_priv(ndev);
3209 
3210         of_id = of_match_device(fec_dt_ids, &pdev->dev);
3211         if (of_id)
3212                 pdev->id_entry = of_id->data;
3213         fep->quirks = pdev->id_entry->driver_data;
3214 
3215         fep->netdev = ndev;
3216         fep->num_rx_queues = num_rx_qs;
3217         fep->num_tx_queues = num_tx_qs;
3218 
3219 #if !defined(CONFIG_M5272)
3220         /* default enable pause frame auto negotiation */
3221         if (fep->quirks & FEC_QUIRK_HAS_GBIT)
3222                 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG;
3223 #endif
3224 
3225         /* Select default pin state */
3226         pinctrl_pm_select_default_state(&pdev->dev);
3227 
3228         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3229         fep->hwp = devm_ioremap_resource(&pdev->dev, r);
3230         if (IS_ERR(fep->hwp)) {
3231                 ret = PTR_ERR(fep->hwp);
3232                 goto failed_ioremap;
3233         }
3234 
3235         fep->pdev = pdev;
3236         fep->dev_id = dev_id++;
3237 
3238         platform_set_drvdata(pdev, ndev);
3239 
3240         if (of_get_property(np, "fsl,magic-packet", NULL))
3241                 fep->wol_flag |= FEC_WOL_HAS_MAGIC_PACKET;
3242 
3243         phy_node = of_parse_phandle(np, "phy-handle", 0);
3244         if (!phy_node && of_phy_is_fixed_link(np)) {
3245                 ret = of_phy_register_fixed_link(np);
3246                 if (ret < 0) {
3247                         dev_err(&pdev->dev,
3248                                 "broken fixed-link specification\n");
3249                         goto failed_phy;
3250                 }
3251                 phy_node = of_node_get(np);
3252         }
3253         fep->phy_node = phy_node;
3254 
3255         ret = of_get_phy_mode(pdev->dev.of_node);
3256         if (ret < 0) {
3257                 pdata = dev_get_platdata(&pdev->dev);
3258                 if (pdata)
3259                         fep->phy_interface = pdata->phy;
3260                 else
3261                         fep->phy_interface = PHY_INTERFACE_MODE_MII;
3262         } else {
3263                 fep->phy_interface = ret;
3264         }
3265 
3266         fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
3267         if (IS_ERR(fep->clk_ipg)) {
3268                 ret = PTR_ERR(fep->clk_ipg);
3269                 goto failed_clk;
3270         }
3271 
3272         fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
3273         if (IS_ERR(fep->clk_ahb)) {
3274                 ret = PTR_ERR(fep->clk_ahb);
3275                 goto failed_clk;
3276         }
3277 
3278         fep->itr_clk_rate = clk_get_rate(fep->clk_ahb);
3279 
3280         /* enet_out is optional, depends on board */
3281         fep->clk_enet_out = devm_clk_get(&pdev->dev, "enet_out");
3282         if (IS_ERR(fep->clk_enet_out))
3283                 fep->clk_enet_out = NULL;
3284 
3285         fep->ptp_clk_on = false;
3286         mutex_init(&fep->ptp_clk_mutex);
3287 
3288         /* clk_ref is optional, depends on board */
3289         fep->clk_ref = devm_clk_get(&pdev->dev, "enet_clk_ref");
3290         if (IS_ERR(fep->clk_ref))
3291                 fep->clk_ref = NULL;
3292 
3293         fep->bufdesc_ex = fep->quirks & FEC_QUIRK_HAS_BUFDESC_EX;
3294         fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp");
3295         if (IS_ERR(fep->clk_ptp)) {
3296                 fep->clk_ptp = NULL;
3297                 fep->bufdesc_ex = false;
3298         }
3299 
3300         ret = fec_enet_clk_enable(ndev, true);
3301         if (ret)
3302                 goto failed_clk;
3303 
3304         fep->reg_phy = devm_regulator_get(&pdev->dev, "phy");
3305         if (!IS_ERR(fep->reg_phy)) {
3306                 ret = regulator_enable(fep->reg_phy);
3307                 if (ret) {
3308                         dev_err(&pdev->dev,
3309                                 "Failed to enable phy regulator: %d\n", ret);
3310                         goto failed_regulator;
3311                 }
3312         } else {
3313                 fep->reg_phy = NULL;
3314         }
3315 
3316         fec_reset_phy(pdev);
3317 
3318         if (fep->bufdesc_ex)
3319                 fec_ptp_init(pdev);
3320 
3321         ret = fec_enet_init(ndev);
3322         if (ret)
3323                 goto failed_init;
3324 
3325         for (i = 0; i < FEC_IRQ_NUM; i++) {
3326                 irq = platform_get_irq(pdev, i);
3327                 if (irq < 0) {
3328                         if (i)
3329                                 break;
3330                         ret = irq;
3331                         goto failed_irq;
3332                 }
3333                 ret = devm_request_irq(&pdev->dev, irq, fec_enet_interrupt,
3334                                        0, pdev->name, ndev);
3335                 if (ret)
3336                         goto failed_irq;
3337 
3338                 fep->irq[i] = irq;
3339         }
3340 
3341         init_completion(&fep->mdio_done);
3342         ret = fec_enet_mii_init(pdev);
3343         if (ret)
3344                 goto failed_mii_init;
3345 
3346         /* Carrier starts down, phylib will bring it up */
3347         netif_carrier_off(ndev);
3348         fec_enet_clk_enable(ndev, false);
3349         pinctrl_pm_select_sleep_state(&pdev->dev);
3350 
3351         ret = register_netdev(ndev);
3352         if (ret)
3353                 goto failed_register;
3354 
3355         device_init_wakeup(&ndev->dev, fep->wol_flag &
3356                            FEC_WOL_HAS_MAGIC_PACKET);
3357 
3358         if (fep->bufdesc_ex && fep->ptp_clock)
3359                 netdev_info(ndev, "registered PHC device %d\n", fep->dev_id);
3360 
3361         fep->rx_copybreak = COPYBREAK_DEFAULT;
3362         INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work);
3363         return 0;
3364 
3365 failed_register:
3366         fec_enet_mii_remove(fep);
3367 failed_mii_init:
3368 failed_irq:
3369 failed_init:
3370         if (fep->reg_phy)
3371                 regulator_disable(fep->reg_phy);
3372 failed_regulator:
3373         fec_enet_clk_enable(ndev, false);
3374 failed_clk:
3375 failed_phy:
3376         of_node_put(phy_node);
3377 failed_ioremap:
3378         free_netdev(ndev);
3379 
3380         return ret;
3381 }
3382 
3383 static int
3384 fec_drv_remove(struct platform_device *pdev)
3385 {
3386         struct net_device *ndev = platform_get_drvdata(pdev);
3387         struct fec_enet_private *fep = netdev_priv(ndev);
3388 
3389         cancel_delayed_work_sync(&fep->time_keep);
3390         cancel_work_sync(&fep->tx_timeout_work);
3391         unregister_netdev(ndev);
3392         fec_enet_mii_remove(fep);
3393         if (fep->reg_phy)
3394                 regulator_disable(fep->reg_phy);
3395         if (fep->ptp_clock)
3396                 ptp_clock_unregister(fep->ptp_clock);
3397         of_node_put(fep->phy_node);
3398         free_netdev(ndev);
3399 
3400         return 0;
3401 }
3402 
3403 static int __maybe_unused fec_suspend(struct device *dev)
3404 {
3405         struct net_device *ndev = dev_get_drvdata(dev);
3406         struct fec_enet_private *fep = netdev_priv(ndev);
3407 
3408         rtnl_lock();
3409         if (netif_running(ndev)) {
3410                 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE)
3411                         fep->wol_flag |= FEC_WOL_FLAG_SLEEP_ON;
3412                 phy_stop(fep->phy_dev);
3413                 napi_disable(&fep->napi);
3414                 netif_tx_lock_bh(ndev);
3415                 netif_device_detach(ndev);
3416                 netif_tx_unlock_bh(ndev);
3417                 fec_stop(ndev);
3418                 fec_enet_clk_enable(ndev, false);
3419                 if (!(fep->wol_flag & FEC_WOL_FLAG_ENABLE))
3420                         pinctrl_pm_select_sleep_state(&fep->pdev->dev);
3421         }
3422         rtnl_unlock();
3423 
3424         if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE))
3425                 regulator_disable(fep->reg_phy);
3426 
3427         /* SOC supply clock to phy, when clock is disabled, phy link down
3428          * SOC control phy regulator, when regulator is disabled, phy link down
3429          */
3430         if (fep->clk_enet_out || fep->reg_phy)
3431                 fep->link = 0;
3432 
3433         return 0;
3434 }
3435 
3436 static int __maybe_unused fec_resume(struct device *dev)
3437 {
3438         struct net_device *ndev = dev_get_drvdata(dev);
3439         struct fec_enet_private *fep = netdev_priv(ndev);
3440         struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
3441         int ret;
3442         int val;
3443 
3444         if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) {
3445                 ret = regulator_enable(fep->reg_phy);
3446                 if (ret)
3447                         return ret;
3448         }
3449 
3450         rtnl_lock();
3451         if (netif_running(ndev)) {
3452                 ret = fec_enet_clk_enable(ndev, true);
3453                 if (ret) {
3454                         rtnl_unlock();
3455                         goto failed_clk;
3456                 }
3457                 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) {
3458                         if (pdata && pdata->sleep_mode_enable)
3459                                 pdata->sleep_mode_enable(false);
3460                         val = readl(fep->hwp + FEC_ECNTRL);
3461                         val &= ~(FEC_ECR_MAGICEN | FEC_ECR_SLEEP);
3462                         writel(val, fep->hwp + FEC_ECNTRL);
3463                         fep->wol_flag &= ~FEC_WOL_FLAG_SLEEP_ON;
3464                 } else {
3465                         pinctrl_pm_select_default_state(&fep->pdev->dev);
3466                 }
3467                 fec_restart(ndev);
3468                 netif_tx_lock_bh(ndev);
3469                 netif_device_attach(ndev);
3470                 netif_tx_unlock_bh(ndev);
3471                 napi_enable(&fep->napi);
3472                 phy_start(fep->phy_dev);
3473         }
3474         rtnl_unlock();
3475 
3476         return 0;
3477 
3478 failed_clk:
3479         if (fep->reg_phy)
3480                 regulator_disable(fep->reg_phy);
3481         return ret;
3482 }
3483 
3484 static SIMPLE_DEV_PM_OPS(fec_pm_ops, fec_suspend, fec_resume);
3485 
3486 static struct platform_driver fec_driver = {
3487         .driver = {
3488                 .name   = DRIVER_NAME,
3489                 .pm     = &fec_pm_ops,
3490                 .of_match_table = fec_dt_ids,
3491         },
3492         .id_table = fec_devtype,
3493         .probe  = fec_probe,
3494         .remove = fec_drv_remove,
3495 };
3496 
3497 module_platform_driver(fec_driver);
3498 
3499 MODULE_ALIAS("platform:"DRIVER_NAME);
3500 MODULE_LICENSE("GPL");
3501 

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