Version:  2.0.40 2.2.26 2.4.37 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1 4.2 4.3 4.4

Linux/drivers/net/ethernet/freescale/fec_main.c

  1 /*
  2  * Fast Ethernet Controller (FEC) driver for Motorola MPC8xx.
  3  * Copyright (c) 1997 Dan Malek (dmalek@jlc.net)
  4  *
  5  * Right now, I am very wasteful with the buffers.  I allocate memory
  6  * pages and then divide them into 2K frame buffers.  This way I know I
  7  * have buffers large enough to hold one frame within one buffer descriptor.
  8  * Once I get this working, I will use 64 or 128 byte CPM buffers, which
  9  * will be much more memory efficient and will easily handle lots of
 10  * small packets.
 11  *
 12  * Much better multiple PHY support by Magnus Damm.
 13  * Copyright (c) 2000 Ericsson Radio Systems AB.
 14  *
 15  * Support for FEC controller of ColdFire processors.
 16  * Copyright (c) 2001-2005 Greg Ungerer (gerg@snapgear.com)
 17  *
 18  * Bug fixes and cleanup by Philippe De Muyter (phdm@macqel.be)
 19  * Copyright (c) 2004-2006 Macq Electronique SA.
 20  *
 21  * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
 22  */
 23 
 24 #include <linux/module.h>
 25 #include <linux/kernel.h>
 26 #include <linux/string.h>
 27 #include <linux/pm_runtime.h>
 28 #include <linux/ptrace.h>
 29 #include <linux/errno.h>
 30 #include <linux/ioport.h>
 31 #include <linux/slab.h>
 32 #include <linux/interrupt.h>
 33 #include <linux/delay.h>
 34 #include <linux/netdevice.h>
 35 #include <linux/etherdevice.h>
 36 #include <linux/skbuff.h>
 37 #include <linux/in.h>
 38 #include <linux/ip.h>
 39 #include <net/ip.h>
 40 #include <net/tso.h>
 41 #include <linux/tcp.h>
 42 #include <linux/udp.h>
 43 #include <linux/icmp.h>
 44 #include <linux/spinlock.h>
 45 #include <linux/workqueue.h>
 46 #include <linux/bitops.h>
 47 #include <linux/io.h>
 48 #include <linux/irq.h>
 49 #include <linux/clk.h>
 50 #include <linux/platform_device.h>
 51 #include <linux/phy.h>
 52 #include <linux/fec.h>
 53 #include <linux/of.h>
 54 #include <linux/of_device.h>
 55 #include <linux/of_gpio.h>
 56 #include <linux/of_mdio.h>
 57 #include <linux/of_net.h>
 58 #include <linux/regulator/consumer.h>
 59 #include <linux/if_vlan.h>
 60 #include <linux/pinctrl/consumer.h>
 61 #include <linux/prefetch.h>
 62 
 63 #include <asm/cacheflush.h>
 64 
 65 #include "fec.h"
 66 
 67 static void set_multicast_list(struct net_device *ndev);
 68 static void fec_enet_itr_coal_init(struct net_device *ndev);
 69 
 70 #define DRIVER_NAME     "fec"
 71 
 72 #define FEC_ENET_GET_QUQUE(_x) ((_x == 0) ? 1 : ((_x == 1) ? 2 : 0))
 73 
 74 /* Pause frame feild and FIFO threshold */
 75 #define FEC_ENET_FCE    (1 << 5)
 76 #define FEC_ENET_RSEM_V 0x84
 77 #define FEC_ENET_RSFL_V 16
 78 #define FEC_ENET_RAEM_V 0x8
 79 #define FEC_ENET_RAFL_V 0x8
 80 #define FEC_ENET_OPD_V  0xFFF0
 81 #define FEC_MDIO_PM_TIMEOUT  100 /* ms */
 82 
 83 static struct platform_device_id fec_devtype[] = {
 84         {
 85                 /* keep it for coldfire */
 86                 .name = DRIVER_NAME,
 87                 .driver_data = 0,
 88         }, {
 89                 .name = "imx25-fec",
 90                 .driver_data = FEC_QUIRK_USE_GASKET | FEC_QUIRK_HAS_RACC,
 91         }, {
 92                 .name = "imx27-fec",
 93                 .driver_data = FEC_QUIRK_HAS_RACC,
 94         }, {
 95                 .name = "imx28-fec",
 96                 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_SWAP_FRAME |
 97                                 FEC_QUIRK_SINGLE_MDIO | FEC_QUIRK_HAS_RACC,
 98         }, {
 99                 .name = "imx6q-fec",
100                 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
101                                 FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
102                                 FEC_QUIRK_HAS_VLAN | FEC_QUIRK_ERR006358 |
103                                 FEC_QUIRK_HAS_RACC,
104         }, {
105                 .name = "mvf600-fec",
106                 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_RACC,
107         }, {
108                 .name = "imx6sx-fec",
109                 .driver_data = FEC_QUIRK_ENET_MAC | FEC_QUIRK_HAS_GBIT |
110                                 FEC_QUIRK_HAS_BUFDESC_EX | FEC_QUIRK_HAS_CSUM |
111                                 FEC_QUIRK_HAS_VLAN | FEC_QUIRK_HAS_AVB |
112                                 FEC_QUIRK_ERR007885 | FEC_QUIRK_BUG_CAPTURE |
113                                 FEC_QUIRK_HAS_RACC,
114         }, {
115                 /* sentinel */
116         }
117 };
118 MODULE_DEVICE_TABLE(platform, fec_devtype);
119 
120 enum imx_fec_type {
121         IMX25_FEC = 1,  /* runs on i.mx25/50/53 */
122         IMX27_FEC,      /* runs on i.mx27/35/51 */
123         IMX28_FEC,
124         IMX6Q_FEC,
125         MVF600_FEC,
126         IMX6SX_FEC,
127 };
128 
129 static const struct of_device_id fec_dt_ids[] = {
130         { .compatible = "fsl,imx25-fec", .data = &fec_devtype[IMX25_FEC], },
131         { .compatible = "fsl,imx27-fec", .data = &fec_devtype[IMX27_FEC], },
132         { .compatible = "fsl,imx28-fec", .data = &fec_devtype[IMX28_FEC], },
133         { .compatible = "fsl,imx6q-fec", .data = &fec_devtype[IMX6Q_FEC], },
134         { .compatible = "fsl,mvf600-fec", .data = &fec_devtype[MVF600_FEC], },
135         { .compatible = "fsl,imx6sx-fec", .data = &fec_devtype[IMX6SX_FEC], },
136         { /* sentinel */ }
137 };
138 MODULE_DEVICE_TABLE(of, fec_dt_ids);
139 
140 static unsigned char macaddr[ETH_ALEN];
141 module_param_array(macaddr, byte, NULL, 0);
142 MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
143 
144 #if defined(CONFIG_M5272)
145 /*
146  * Some hardware gets it MAC address out of local flash memory.
147  * if this is non-zero then assume it is the address to get MAC from.
148  */
149 #if defined(CONFIG_NETtel)
150 #define FEC_FLASHMAC    0xf0006006
151 #elif defined(CONFIG_GILBARCONAP) || defined(CONFIG_SCALES)
152 #define FEC_FLASHMAC    0xf0006000
153 #elif defined(CONFIG_CANCam)
154 #define FEC_FLASHMAC    0xf0020000
155 #elif defined (CONFIG_M5272C3)
156 #define FEC_FLASHMAC    (0xffe04000 + 4)
157 #elif defined(CONFIG_MOD5272)
158 #define FEC_FLASHMAC    0xffc0406b
159 #else
160 #define FEC_FLASHMAC    0
161 #endif
162 #endif /* CONFIG_M5272 */
163 
164 /* The FEC stores dest/src/type/vlan, data, and checksum for receive packets.
165  */
166 #define PKT_MAXBUF_SIZE         1522
167 #define PKT_MINBUF_SIZE         64
168 #define PKT_MAXBLR_SIZE         1536
169 
170 /* FEC receive acceleration */
171 #define FEC_RACC_IPDIS          (1 << 1)
172 #define FEC_RACC_PRODIS         (1 << 2)
173 #define FEC_RACC_OPTIONS        (FEC_RACC_IPDIS | FEC_RACC_PRODIS)
174 
175 /*
176  * The 5270/5271/5280/5282/532x RX control register also contains maximum frame
177  * size bits. Other FEC hardware does not, so we need to take that into
178  * account when setting it.
179  */
180 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
181     defined(CONFIG_M520x) || defined(CONFIG_M532x) || defined(CONFIG_ARM)
182 #define OPT_FRAME_SIZE  (PKT_MAXBUF_SIZE << 16)
183 #else
184 #define OPT_FRAME_SIZE  0
185 #endif
186 
187 /* FEC MII MMFR bits definition */
188 #define FEC_MMFR_ST             (1 << 30)
189 #define FEC_MMFR_OP_READ        (2 << 28)
190 #define FEC_MMFR_OP_WRITE       (1 << 28)
191 #define FEC_MMFR_PA(v)          ((v & 0x1f) << 23)
192 #define FEC_MMFR_RA(v)          ((v & 0x1f) << 18)
193 #define FEC_MMFR_TA             (2 << 16)
194 #define FEC_MMFR_DATA(v)        (v & 0xffff)
195 /* FEC ECR bits definition */
196 #define FEC_ECR_MAGICEN         (1 << 2)
197 #define FEC_ECR_SLEEP           (1 << 3)
198 
199 #define FEC_MII_TIMEOUT         30000 /* us */
200 
201 /* Transmitter timeout */
202 #define TX_TIMEOUT (2 * HZ)
203 
204 #define FEC_PAUSE_FLAG_AUTONEG  0x1
205 #define FEC_PAUSE_FLAG_ENABLE   0x2
206 #define FEC_WOL_HAS_MAGIC_PACKET        (0x1 << 0)
207 #define FEC_WOL_FLAG_ENABLE             (0x1 << 1)
208 #define FEC_WOL_FLAG_SLEEP_ON           (0x1 << 2)
209 
210 #define COPYBREAK_DEFAULT       256
211 
212 #define TSO_HEADER_SIZE         128
213 /* Max number of allowed TCP segments for software TSO */
214 #define FEC_MAX_TSO_SEGS        100
215 #define FEC_MAX_SKB_DESCS       (FEC_MAX_TSO_SEGS * 2 + MAX_SKB_FRAGS)
216 
217 #define IS_TSO_HEADER(txq, addr) \
218         ((addr >= txq->tso_hdrs_dma) && \
219         (addr < txq->tso_hdrs_dma + txq->tx_ring_size * TSO_HEADER_SIZE))
220 
221 static int mii_cnt;
222 
223 static inline
224 struct bufdesc *fec_enet_get_nextdesc(struct bufdesc *bdp,
225                                       struct fec_enet_private *fep,
226                                       int queue_id)
227 {
228         struct bufdesc *new_bd = bdp + 1;
229         struct bufdesc_ex *ex_new_bd = (struct bufdesc_ex *)bdp + 1;
230         struct fec_enet_priv_tx_q *txq = fep->tx_queue[queue_id];
231         struct fec_enet_priv_rx_q *rxq = fep->rx_queue[queue_id];
232         struct bufdesc_ex *ex_base;
233         struct bufdesc *base;
234         int ring_size;
235 
236         if (bdp >= txq->tx_bd_base) {
237                 base = txq->tx_bd_base;
238                 ring_size = txq->tx_ring_size;
239                 ex_base = (struct bufdesc_ex *)txq->tx_bd_base;
240         } else {
241                 base = rxq->rx_bd_base;
242                 ring_size = rxq->rx_ring_size;
243                 ex_base = (struct bufdesc_ex *)rxq->rx_bd_base;
244         }
245 
246         if (fep->bufdesc_ex)
247                 return (struct bufdesc *)((ex_new_bd >= (ex_base + ring_size)) ?
248                         ex_base : ex_new_bd);
249         else
250                 return (new_bd >= (base + ring_size)) ?
251                         base : new_bd;
252 }
253 
254 static inline
255 struct bufdesc *fec_enet_get_prevdesc(struct bufdesc *bdp,
256                                       struct fec_enet_private *fep,
257                                       int queue_id)
258 {
259         struct bufdesc *new_bd = bdp - 1;
260         struct bufdesc_ex *ex_new_bd = (struct bufdesc_ex *)bdp - 1;
261         struct fec_enet_priv_tx_q *txq = fep->tx_queue[queue_id];
262         struct fec_enet_priv_rx_q *rxq = fep->rx_queue[queue_id];
263         struct bufdesc_ex *ex_base;
264         struct bufdesc *base;
265         int ring_size;
266 
267         if (bdp >= txq->tx_bd_base) {
268                 base = txq->tx_bd_base;
269                 ring_size = txq->tx_ring_size;
270                 ex_base = (struct bufdesc_ex *)txq->tx_bd_base;
271         } else {
272                 base = rxq->rx_bd_base;
273                 ring_size = rxq->rx_ring_size;
274                 ex_base = (struct bufdesc_ex *)rxq->rx_bd_base;
275         }
276 
277         if (fep->bufdesc_ex)
278                 return (struct bufdesc *)((ex_new_bd < ex_base) ?
279                         (ex_new_bd + ring_size) : ex_new_bd);
280         else
281                 return (new_bd < base) ? (new_bd + ring_size) : new_bd;
282 }
283 
284 static int fec_enet_get_bd_index(struct bufdesc *base, struct bufdesc *bdp,
285                                 struct fec_enet_private *fep)
286 {
287         return ((const char *)bdp - (const char *)base) / fep->bufdesc_size;
288 }
289 
290 static int fec_enet_get_free_txdesc_num(struct fec_enet_private *fep,
291                                         struct fec_enet_priv_tx_q *txq)
292 {
293         int entries;
294 
295         entries = ((const char *)txq->dirty_tx -
296                         (const char *)txq->cur_tx) / fep->bufdesc_size - 1;
297 
298         return entries > 0 ? entries : entries + txq->tx_ring_size;
299 }
300 
301 static void swap_buffer(void *bufaddr, int len)
302 {
303         int i;
304         unsigned int *buf = bufaddr;
305 
306         for (i = 0; i < len; i += 4, buf++)
307                 swab32s(buf);
308 }
309 
310 static void swap_buffer2(void *dst_buf, void *src_buf, int len)
311 {
312         int i;
313         unsigned int *src = src_buf;
314         unsigned int *dst = dst_buf;
315 
316         for (i = 0; i < len; i += 4, src++, dst++)
317                 *dst = swab32p(src);
318 }
319 
320 static void fec_dump(struct net_device *ndev)
321 {
322         struct fec_enet_private *fep = netdev_priv(ndev);
323         struct bufdesc *bdp;
324         struct fec_enet_priv_tx_q *txq;
325         int index = 0;
326 
327         netdev_info(ndev, "TX ring dump\n");
328         pr_info("Nr     SC     addr       len  SKB\n");
329 
330         txq = fep->tx_queue[0];
331         bdp = txq->tx_bd_base;
332 
333         do {
334                 pr_info("%3u %c%c 0x%04x 0x%08lx %4u %p\n",
335                         index,
336                         bdp == txq->cur_tx ? 'S' : ' ',
337                         bdp == txq->dirty_tx ? 'H' : ' ',
338                         bdp->cbd_sc, bdp->cbd_bufaddr, bdp->cbd_datlen,
339                         txq->tx_skbuff[index]);
340                 bdp = fec_enet_get_nextdesc(bdp, fep, 0);
341                 index++;
342         } while (bdp != txq->tx_bd_base);
343 }
344 
345 static inline bool is_ipv4_pkt(struct sk_buff *skb)
346 {
347         return skb->protocol == htons(ETH_P_IP) && ip_hdr(skb)->version == 4;
348 }
349 
350 static int
351 fec_enet_clear_csum(struct sk_buff *skb, struct net_device *ndev)
352 {
353         /* Only run for packets requiring a checksum. */
354         if (skb->ip_summed != CHECKSUM_PARTIAL)
355                 return 0;
356 
357         if (unlikely(skb_cow_head(skb, 0)))
358                 return -1;
359 
360         if (is_ipv4_pkt(skb))
361                 ip_hdr(skb)->check = 0;
362         *(__sum16 *)(skb->head + skb->csum_start + skb->csum_offset) = 0;
363 
364         return 0;
365 }
366 
367 static struct bufdesc *
368 fec_enet_txq_submit_frag_skb(struct fec_enet_priv_tx_q *txq,
369                              struct sk_buff *skb,
370                              struct net_device *ndev)
371 {
372         struct fec_enet_private *fep = netdev_priv(ndev);
373         struct bufdesc *bdp = txq->cur_tx;
374         struct bufdesc_ex *ebdp;
375         int nr_frags = skb_shinfo(skb)->nr_frags;
376         unsigned short queue = skb_get_queue_mapping(skb);
377         int frag, frag_len;
378         unsigned short status;
379         unsigned int estatus = 0;
380         skb_frag_t *this_frag;
381         unsigned int index;
382         void *bufaddr;
383         dma_addr_t addr;
384         int i;
385 
386         for (frag = 0; frag < nr_frags; frag++) {
387                 this_frag = &skb_shinfo(skb)->frags[frag];
388                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
389                 ebdp = (struct bufdesc_ex *)bdp;
390 
391                 status = bdp->cbd_sc;
392                 status &= ~BD_ENET_TX_STATS;
393                 status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
394                 frag_len = skb_shinfo(skb)->frags[frag].size;
395 
396                 /* Handle the last BD specially */
397                 if (frag == nr_frags - 1) {
398                         status |= (BD_ENET_TX_INTR | BD_ENET_TX_LAST);
399                         if (fep->bufdesc_ex) {
400                                 estatus |= BD_ENET_TX_INT;
401                                 if (unlikely(skb_shinfo(skb)->tx_flags &
402                                         SKBTX_HW_TSTAMP && fep->hwts_tx_en))
403                                         estatus |= BD_ENET_TX_TS;
404                         }
405                 }
406 
407                 if (fep->bufdesc_ex) {
408                         if (fep->quirks & FEC_QUIRK_HAS_AVB)
409                                 estatus |= FEC_TX_BD_FTYPE(queue);
410                         if (skb->ip_summed == CHECKSUM_PARTIAL)
411                                 estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
412                         ebdp->cbd_bdu = 0;
413                         ebdp->cbd_esc = estatus;
414                 }
415 
416                 bufaddr = page_address(this_frag->page.p) + this_frag->page_offset;
417 
418                 index = fec_enet_get_bd_index(txq->tx_bd_base, bdp, fep);
419                 if (((unsigned long) bufaddr) & fep->tx_align ||
420                         fep->quirks & FEC_QUIRK_SWAP_FRAME) {
421                         memcpy(txq->tx_bounce[index], bufaddr, frag_len);
422                         bufaddr = txq->tx_bounce[index];
423 
424                         if (fep->quirks & FEC_QUIRK_SWAP_FRAME)
425                                 swap_buffer(bufaddr, frag_len);
426                 }
427 
428                 addr = dma_map_single(&fep->pdev->dev, bufaddr, frag_len,
429                                       DMA_TO_DEVICE);
430                 if (dma_mapping_error(&fep->pdev->dev, addr)) {
431                         dev_kfree_skb_any(skb);
432                         if (net_ratelimit())
433                                 netdev_err(ndev, "Tx DMA memory map failed\n");
434                         goto dma_mapping_error;
435                 }
436 
437                 bdp->cbd_bufaddr = addr;
438                 bdp->cbd_datlen = frag_len;
439                 bdp->cbd_sc = status;
440         }
441 
442         return bdp;
443 dma_mapping_error:
444         bdp = txq->cur_tx;
445         for (i = 0; i < frag; i++) {
446                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
447                 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
448                                 bdp->cbd_datlen, DMA_TO_DEVICE);
449         }
450         return ERR_PTR(-ENOMEM);
451 }
452 
453 static int fec_enet_txq_submit_skb(struct fec_enet_priv_tx_q *txq,
454                                    struct sk_buff *skb, struct net_device *ndev)
455 {
456         struct fec_enet_private *fep = netdev_priv(ndev);
457         int nr_frags = skb_shinfo(skb)->nr_frags;
458         struct bufdesc *bdp, *last_bdp;
459         void *bufaddr;
460         dma_addr_t addr;
461         unsigned short status;
462         unsigned short buflen;
463         unsigned short queue;
464         unsigned int estatus = 0;
465         unsigned int index;
466         int entries_free;
467 
468         entries_free = fec_enet_get_free_txdesc_num(fep, txq);
469         if (entries_free < MAX_SKB_FRAGS + 1) {
470                 dev_kfree_skb_any(skb);
471                 if (net_ratelimit())
472                         netdev_err(ndev, "NOT enough BD for SG!\n");
473                 return NETDEV_TX_OK;
474         }
475 
476         /* Protocol checksum off-load for TCP and UDP. */
477         if (fec_enet_clear_csum(skb, ndev)) {
478                 dev_kfree_skb_any(skb);
479                 return NETDEV_TX_OK;
480         }
481 
482         /* Fill in a Tx ring entry */
483         bdp = txq->cur_tx;
484         last_bdp = bdp;
485         status = bdp->cbd_sc;
486         status &= ~BD_ENET_TX_STATS;
487 
488         /* Set buffer length and buffer pointer */
489         bufaddr = skb->data;
490         buflen = skb_headlen(skb);
491 
492         queue = skb_get_queue_mapping(skb);
493         index = fec_enet_get_bd_index(txq->tx_bd_base, bdp, fep);
494         if (((unsigned long) bufaddr) & fep->tx_align ||
495                 fep->quirks & FEC_QUIRK_SWAP_FRAME) {
496                 memcpy(txq->tx_bounce[index], skb->data, buflen);
497                 bufaddr = txq->tx_bounce[index];
498 
499                 if (fep->quirks & FEC_QUIRK_SWAP_FRAME)
500                         swap_buffer(bufaddr, buflen);
501         }
502 
503         /* Push the data cache so the CPM does not get stale memory data. */
504         addr = dma_map_single(&fep->pdev->dev, bufaddr, buflen, DMA_TO_DEVICE);
505         if (dma_mapping_error(&fep->pdev->dev, addr)) {
506                 dev_kfree_skb_any(skb);
507                 if (net_ratelimit())
508                         netdev_err(ndev, "Tx DMA memory map failed\n");
509                 return NETDEV_TX_OK;
510         }
511 
512         if (nr_frags) {
513                 last_bdp = fec_enet_txq_submit_frag_skb(txq, skb, ndev);
514                 if (IS_ERR(last_bdp))
515                         return NETDEV_TX_OK;
516         } else {
517                 status |= (BD_ENET_TX_INTR | BD_ENET_TX_LAST);
518                 if (fep->bufdesc_ex) {
519                         estatus = BD_ENET_TX_INT;
520                         if (unlikely(skb_shinfo(skb)->tx_flags &
521                                 SKBTX_HW_TSTAMP && fep->hwts_tx_en))
522                                 estatus |= BD_ENET_TX_TS;
523                 }
524         }
525 
526         if (fep->bufdesc_ex) {
527 
528                 struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
529 
530                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
531                         fep->hwts_tx_en))
532                         skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
533 
534                 if (fep->quirks & FEC_QUIRK_HAS_AVB)
535                         estatus |= FEC_TX_BD_FTYPE(queue);
536 
537                 if (skb->ip_summed == CHECKSUM_PARTIAL)
538                         estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
539 
540                 ebdp->cbd_bdu = 0;
541                 ebdp->cbd_esc = estatus;
542         }
543 
544         index = fec_enet_get_bd_index(txq->tx_bd_base, last_bdp, fep);
545         /* Save skb pointer */
546         txq->tx_skbuff[index] = skb;
547 
548         bdp->cbd_datlen = buflen;
549         bdp->cbd_bufaddr = addr;
550 
551         /* Send it on its way.  Tell FEC it's ready, interrupt when done,
552          * it's the last BD of the frame, and to put the CRC on the end.
553          */
554         status |= (BD_ENET_TX_READY | BD_ENET_TX_TC);
555         bdp->cbd_sc = status;
556 
557         /* If this was the last BD in the ring, start at the beginning again. */
558         bdp = fec_enet_get_nextdesc(last_bdp, fep, queue);
559 
560         skb_tx_timestamp(skb);
561 
562         /* Make sure the update to bdp and tx_skbuff are performed before
563          * cur_tx.
564          */
565         wmb();
566         txq->cur_tx = bdp;
567 
568         /* Trigger transmission start */
569         writel(0, fep->hwp + FEC_X_DES_ACTIVE(queue));
570 
571         return 0;
572 }
573 
574 static int
575 fec_enet_txq_put_data_tso(struct fec_enet_priv_tx_q *txq, struct sk_buff *skb,
576                           struct net_device *ndev,
577                           struct bufdesc *bdp, int index, char *data,
578                           int size, bool last_tcp, bool is_last)
579 {
580         struct fec_enet_private *fep = netdev_priv(ndev);
581         struct bufdesc_ex *ebdp = container_of(bdp, struct bufdesc_ex, desc);
582         unsigned short queue = skb_get_queue_mapping(skb);
583         unsigned short status;
584         unsigned int estatus = 0;
585         dma_addr_t addr;
586 
587         status = bdp->cbd_sc;
588         status &= ~BD_ENET_TX_STATS;
589 
590         status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
591 
592         if (((unsigned long) data) & fep->tx_align ||
593                 fep->quirks & FEC_QUIRK_SWAP_FRAME) {
594                 memcpy(txq->tx_bounce[index], data, size);
595                 data = txq->tx_bounce[index];
596 
597                 if (fep->quirks & FEC_QUIRK_SWAP_FRAME)
598                         swap_buffer(data, size);
599         }
600 
601         addr = dma_map_single(&fep->pdev->dev, data, size, DMA_TO_DEVICE);
602         if (dma_mapping_error(&fep->pdev->dev, addr)) {
603                 dev_kfree_skb_any(skb);
604                 if (net_ratelimit())
605                         netdev_err(ndev, "Tx DMA memory map failed\n");
606                 return NETDEV_TX_BUSY;
607         }
608 
609         bdp->cbd_datlen = size;
610         bdp->cbd_bufaddr = addr;
611 
612         if (fep->bufdesc_ex) {
613                 if (fep->quirks & FEC_QUIRK_HAS_AVB)
614                         estatus |= FEC_TX_BD_FTYPE(queue);
615                 if (skb->ip_summed == CHECKSUM_PARTIAL)
616                         estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
617                 ebdp->cbd_bdu = 0;
618                 ebdp->cbd_esc = estatus;
619         }
620 
621         /* Handle the last BD specially */
622         if (last_tcp)
623                 status |= (BD_ENET_TX_LAST | BD_ENET_TX_TC);
624         if (is_last) {
625                 status |= BD_ENET_TX_INTR;
626                 if (fep->bufdesc_ex)
627                         ebdp->cbd_esc |= BD_ENET_TX_INT;
628         }
629 
630         bdp->cbd_sc = status;
631 
632         return 0;
633 }
634 
635 static int
636 fec_enet_txq_put_hdr_tso(struct fec_enet_priv_tx_q *txq,
637                          struct sk_buff *skb, struct net_device *ndev,
638                          struct bufdesc *bdp, int index)
639 {
640         struct fec_enet_private *fep = netdev_priv(ndev);
641         int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
642         struct bufdesc_ex *ebdp = container_of(bdp, struct bufdesc_ex, desc);
643         unsigned short queue = skb_get_queue_mapping(skb);
644         void *bufaddr;
645         unsigned long dmabuf;
646         unsigned short status;
647         unsigned int estatus = 0;
648 
649         status = bdp->cbd_sc;
650         status &= ~BD_ENET_TX_STATS;
651         status |= (BD_ENET_TX_TC | BD_ENET_TX_READY);
652 
653         bufaddr = txq->tso_hdrs + index * TSO_HEADER_SIZE;
654         dmabuf = txq->tso_hdrs_dma + index * TSO_HEADER_SIZE;
655         if (((unsigned long)bufaddr) & fep->tx_align ||
656                 fep->quirks & FEC_QUIRK_SWAP_FRAME) {
657                 memcpy(txq->tx_bounce[index], skb->data, hdr_len);
658                 bufaddr = txq->tx_bounce[index];
659 
660                 if (fep->quirks & FEC_QUIRK_SWAP_FRAME)
661                         swap_buffer(bufaddr, hdr_len);
662 
663                 dmabuf = dma_map_single(&fep->pdev->dev, bufaddr,
664                                         hdr_len, DMA_TO_DEVICE);
665                 if (dma_mapping_error(&fep->pdev->dev, dmabuf)) {
666                         dev_kfree_skb_any(skb);
667                         if (net_ratelimit())
668                                 netdev_err(ndev, "Tx DMA memory map failed\n");
669                         return NETDEV_TX_BUSY;
670                 }
671         }
672 
673         bdp->cbd_bufaddr = dmabuf;
674         bdp->cbd_datlen = hdr_len;
675 
676         if (fep->bufdesc_ex) {
677                 if (fep->quirks & FEC_QUIRK_HAS_AVB)
678                         estatus |= FEC_TX_BD_FTYPE(queue);
679                 if (skb->ip_summed == CHECKSUM_PARTIAL)
680                         estatus |= BD_ENET_TX_PINS | BD_ENET_TX_IINS;
681                 ebdp->cbd_bdu = 0;
682                 ebdp->cbd_esc = estatus;
683         }
684 
685         bdp->cbd_sc = status;
686 
687         return 0;
688 }
689 
690 static int fec_enet_txq_submit_tso(struct fec_enet_priv_tx_q *txq,
691                                    struct sk_buff *skb,
692                                    struct net_device *ndev)
693 {
694         struct fec_enet_private *fep = netdev_priv(ndev);
695         int hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
696         int total_len, data_left;
697         struct bufdesc *bdp = txq->cur_tx;
698         unsigned short queue = skb_get_queue_mapping(skb);
699         struct tso_t tso;
700         unsigned int index = 0;
701         int ret;
702 
703         if (tso_count_descs(skb) >= fec_enet_get_free_txdesc_num(fep, txq)) {
704                 dev_kfree_skb_any(skb);
705                 if (net_ratelimit())
706                         netdev_err(ndev, "NOT enough BD for TSO!\n");
707                 return NETDEV_TX_OK;
708         }
709 
710         /* Protocol checksum off-load for TCP and UDP. */
711         if (fec_enet_clear_csum(skb, ndev)) {
712                 dev_kfree_skb_any(skb);
713                 return NETDEV_TX_OK;
714         }
715 
716         /* Initialize the TSO handler, and prepare the first payload */
717         tso_start(skb, &tso);
718 
719         total_len = skb->len - hdr_len;
720         while (total_len > 0) {
721                 char *hdr;
722 
723                 index = fec_enet_get_bd_index(txq->tx_bd_base, bdp, fep);
724                 data_left = min_t(int, skb_shinfo(skb)->gso_size, total_len);
725                 total_len -= data_left;
726 
727                 /* prepare packet headers: MAC + IP + TCP */
728                 hdr = txq->tso_hdrs + index * TSO_HEADER_SIZE;
729                 tso_build_hdr(skb, hdr, &tso, data_left, total_len == 0);
730                 ret = fec_enet_txq_put_hdr_tso(txq, skb, ndev, bdp, index);
731                 if (ret)
732                         goto err_release;
733 
734                 while (data_left > 0) {
735                         int size;
736 
737                         size = min_t(int, tso.size, data_left);
738                         bdp = fec_enet_get_nextdesc(bdp, fep, queue);
739                         index = fec_enet_get_bd_index(txq->tx_bd_base,
740                                                       bdp, fep);
741                         ret = fec_enet_txq_put_data_tso(txq, skb, ndev,
742                                                         bdp, index,
743                                                         tso.data, size,
744                                                         size == data_left,
745                                                         total_len == 0);
746                         if (ret)
747                                 goto err_release;
748 
749                         data_left -= size;
750                         tso_build_data(skb, &tso, size);
751                 }
752 
753                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
754         }
755 
756         /* Save skb pointer */
757         txq->tx_skbuff[index] = skb;
758 
759         skb_tx_timestamp(skb);
760         txq->cur_tx = bdp;
761 
762         /* Trigger transmission start */
763         if (!(fep->quirks & FEC_QUIRK_ERR007885) ||
764             !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)) ||
765             !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)) ||
766             !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)) ||
767             !readl(fep->hwp + FEC_X_DES_ACTIVE(queue)))
768                 writel(0, fep->hwp + FEC_X_DES_ACTIVE(queue));
769 
770         return 0;
771 
772 err_release:
773         /* TODO: Release all used data descriptors for TSO */
774         return ret;
775 }
776 
777 static netdev_tx_t
778 fec_enet_start_xmit(struct sk_buff *skb, struct net_device *ndev)
779 {
780         struct fec_enet_private *fep = netdev_priv(ndev);
781         int entries_free;
782         unsigned short queue;
783         struct fec_enet_priv_tx_q *txq;
784         struct netdev_queue *nq;
785         int ret;
786 
787         queue = skb_get_queue_mapping(skb);
788         txq = fep->tx_queue[queue];
789         nq = netdev_get_tx_queue(ndev, queue);
790 
791         if (skb_is_gso(skb))
792                 ret = fec_enet_txq_submit_tso(txq, skb, ndev);
793         else
794                 ret = fec_enet_txq_submit_skb(txq, skb, ndev);
795         if (ret)
796                 return ret;
797 
798         entries_free = fec_enet_get_free_txdesc_num(fep, txq);
799         if (entries_free <= txq->tx_stop_threshold)
800                 netif_tx_stop_queue(nq);
801 
802         return NETDEV_TX_OK;
803 }
804 
805 /* Init RX & TX buffer descriptors
806  */
807 static void fec_enet_bd_init(struct net_device *dev)
808 {
809         struct fec_enet_private *fep = netdev_priv(dev);
810         struct fec_enet_priv_tx_q *txq;
811         struct fec_enet_priv_rx_q *rxq;
812         struct bufdesc *bdp;
813         unsigned int i;
814         unsigned int q;
815 
816         for (q = 0; q < fep->num_rx_queues; q++) {
817                 /* Initialize the receive buffer descriptors. */
818                 rxq = fep->rx_queue[q];
819                 bdp = rxq->rx_bd_base;
820 
821                 for (i = 0; i < rxq->rx_ring_size; i++) {
822 
823                         /* Initialize the BD for every fragment in the page. */
824                         if (bdp->cbd_bufaddr)
825                                 bdp->cbd_sc = BD_ENET_RX_EMPTY;
826                         else
827                                 bdp->cbd_sc = 0;
828                         bdp = fec_enet_get_nextdesc(bdp, fep, q);
829                 }
830 
831                 /* Set the last buffer to wrap */
832                 bdp = fec_enet_get_prevdesc(bdp, fep, q);
833                 bdp->cbd_sc |= BD_SC_WRAP;
834 
835                 rxq->cur_rx = rxq->rx_bd_base;
836         }
837 
838         for (q = 0; q < fep->num_tx_queues; q++) {
839                 /* ...and the same for transmit */
840                 txq = fep->tx_queue[q];
841                 bdp = txq->tx_bd_base;
842                 txq->cur_tx = bdp;
843 
844                 for (i = 0; i < txq->tx_ring_size; i++) {
845                         /* Initialize the BD for every fragment in the page. */
846                         bdp->cbd_sc = 0;
847                         if (txq->tx_skbuff[i]) {
848                                 dev_kfree_skb_any(txq->tx_skbuff[i]);
849                                 txq->tx_skbuff[i] = NULL;
850                         }
851                         bdp->cbd_bufaddr = 0;
852                         bdp = fec_enet_get_nextdesc(bdp, fep, q);
853                 }
854 
855                 /* Set the last buffer to wrap */
856                 bdp = fec_enet_get_prevdesc(bdp, fep, q);
857                 bdp->cbd_sc |= BD_SC_WRAP;
858                 txq->dirty_tx = bdp;
859         }
860 }
861 
862 static void fec_enet_active_rxring(struct net_device *ndev)
863 {
864         struct fec_enet_private *fep = netdev_priv(ndev);
865         int i;
866 
867         for (i = 0; i < fep->num_rx_queues; i++)
868                 writel(0, fep->hwp + FEC_R_DES_ACTIVE(i));
869 }
870 
871 static void fec_enet_enable_ring(struct net_device *ndev)
872 {
873         struct fec_enet_private *fep = netdev_priv(ndev);
874         struct fec_enet_priv_tx_q *txq;
875         struct fec_enet_priv_rx_q *rxq;
876         int i;
877 
878         for (i = 0; i < fep->num_rx_queues; i++) {
879                 rxq = fep->rx_queue[i];
880                 writel(rxq->bd_dma, fep->hwp + FEC_R_DES_START(i));
881                 writel(PKT_MAXBLR_SIZE, fep->hwp + FEC_R_BUFF_SIZE(i));
882 
883                 /* enable DMA1/2 */
884                 if (i)
885                         writel(RCMR_MATCHEN | RCMR_CMP(i),
886                                fep->hwp + FEC_RCMR(i));
887         }
888 
889         for (i = 0; i < fep->num_tx_queues; i++) {
890                 txq = fep->tx_queue[i];
891                 writel(txq->bd_dma, fep->hwp + FEC_X_DES_START(i));
892 
893                 /* enable DMA1/2 */
894                 if (i)
895                         writel(DMA_CLASS_EN | IDLE_SLOPE(i),
896                                fep->hwp + FEC_DMA_CFG(i));
897         }
898 }
899 
900 static void fec_enet_reset_skb(struct net_device *ndev)
901 {
902         struct fec_enet_private *fep = netdev_priv(ndev);
903         struct fec_enet_priv_tx_q *txq;
904         int i, j;
905 
906         for (i = 0; i < fep->num_tx_queues; i++) {
907                 txq = fep->tx_queue[i];
908 
909                 for (j = 0; j < txq->tx_ring_size; j++) {
910                         if (txq->tx_skbuff[j]) {
911                                 dev_kfree_skb_any(txq->tx_skbuff[j]);
912                                 txq->tx_skbuff[j] = NULL;
913                         }
914                 }
915         }
916 }
917 
918 /*
919  * This function is called to start or restart the FEC during a link
920  * change, transmit timeout, or to reconfigure the FEC.  The network
921  * packet processing for this device must be stopped before this call.
922  */
923 static void
924 fec_restart(struct net_device *ndev)
925 {
926         struct fec_enet_private *fep = netdev_priv(ndev);
927         u32 val;
928         u32 temp_mac[2];
929         u32 rcntl = OPT_FRAME_SIZE | 0x04;
930         u32 ecntl = 0x2; /* ETHEREN */
931 
932         /* Whack a reset.  We should wait for this.
933          * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
934          * instead of reset MAC itself.
935          */
936         if (fep->quirks & FEC_QUIRK_HAS_AVB) {
937                 writel(0, fep->hwp + FEC_ECNTRL);
938         } else {
939                 writel(1, fep->hwp + FEC_ECNTRL);
940                 udelay(10);
941         }
942 
943         /*
944          * enet-mac reset will reset mac address registers too,
945          * so need to reconfigure it.
946          */
947         if (fep->quirks & FEC_QUIRK_ENET_MAC) {
948                 memcpy(&temp_mac, ndev->dev_addr, ETH_ALEN);
949                 writel(cpu_to_be32(temp_mac[0]), fep->hwp + FEC_ADDR_LOW);
950                 writel(cpu_to_be32(temp_mac[1]), fep->hwp + FEC_ADDR_HIGH);
951         }
952 
953         /* Clear any outstanding interrupt. */
954         writel(0xffffffff, fep->hwp + FEC_IEVENT);
955 
956         fec_enet_bd_init(ndev);
957 
958         fec_enet_enable_ring(ndev);
959 
960         /* Reset tx SKB buffers. */
961         fec_enet_reset_skb(ndev);
962 
963         /* Enable MII mode */
964         if (fep->full_duplex == DUPLEX_FULL) {
965                 /* FD enable */
966                 writel(0x04, fep->hwp + FEC_X_CNTRL);
967         } else {
968                 /* No Rcv on Xmit */
969                 rcntl |= 0x02;
970                 writel(0x0, fep->hwp + FEC_X_CNTRL);
971         }
972 
973         /* Set MII speed */
974         writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
975 
976 #if !defined(CONFIG_M5272)
977         if (fep->quirks & FEC_QUIRK_HAS_RACC) {
978                 /* set RX checksum */
979                 val = readl(fep->hwp + FEC_RACC);
980                 if (fep->csum_flags & FLAG_RX_CSUM_ENABLED)
981                         val |= FEC_RACC_OPTIONS;
982                 else
983                         val &= ~FEC_RACC_OPTIONS;
984                 writel(val, fep->hwp + FEC_RACC);
985         }
986 #endif
987 
988         /*
989          * The phy interface and speed need to get configured
990          * differently on enet-mac.
991          */
992         if (fep->quirks & FEC_QUIRK_ENET_MAC) {
993                 /* Enable flow control and length check */
994                 rcntl |= 0x40000000 | 0x00000020;
995 
996                 /* RGMII, RMII or MII */
997                 if (fep->phy_interface == PHY_INTERFACE_MODE_RGMII ||
998                     fep->phy_interface == PHY_INTERFACE_MODE_RGMII_ID ||
999                     fep->phy_interface == PHY_INTERFACE_MODE_RGMII_RXID ||
1000                     fep->phy_interface == PHY_INTERFACE_MODE_RGMII_TXID)
1001                         rcntl |= (1 << 6);
1002                 else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
1003                         rcntl |= (1 << 8);
1004                 else
1005                         rcntl &= ~(1 << 8);
1006 
1007                 /* 1G, 100M or 10M */
1008                 if (fep->phy_dev) {
1009                         if (fep->phy_dev->speed == SPEED_1000)
1010                                 ecntl |= (1 << 5);
1011                         else if (fep->phy_dev->speed == SPEED_100)
1012                                 rcntl &= ~(1 << 9);
1013                         else
1014                                 rcntl |= (1 << 9);
1015                 }
1016         } else {
1017 #ifdef FEC_MIIGSK_ENR
1018                 if (fep->quirks & FEC_QUIRK_USE_GASKET) {
1019                         u32 cfgr;
1020                         /* disable the gasket and wait */
1021                         writel(0, fep->hwp + FEC_MIIGSK_ENR);
1022                         while (readl(fep->hwp + FEC_MIIGSK_ENR) & 4)
1023                                 udelay(1);
1024 
1025                         /*
1026                          * configure the gasket:
1027                          *   RMII, 50 MHz, no loopback, no echo
1028                          *   MII, 25 MHz, no loopback, no echo
1029                          */
1030                         cfgr = (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
1031                                 ? BM_MIIGSK_CFGR_RMII : BM_MIIGSK_CFGR_MII;
1032                         if (fep->phy_dev && fep->phy_dev->speed == SPEED_10)
1033                                 cfgr |= BM_MIIGSK_CFGR_FRCONT_10M;
1034                         writel(cfgr, fep->hwp + FEC_MIIGSK_CFGR);
1035 
1036                         /* re-enable the gasket */
1037                         writel(2, fep->hwp + FEC_MIIGSK_ENR);
1038                 }
1039 #endif
1040         }
1041 
1042 #if !defined(CONFIG_M5272)
1043         /* enable pause frame*/
1044         if ((fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) ||
1045             ((fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) &&
1046              fep->phy_dev && fep->phy_dev->pause)) {
1047                 rcntl |= FEC_ENET_FCE;
1048 
1049                 /* set FIFO threshold parameter to reduce overrun */
1050                 writel(FEC_ENET_RSEM_V, fep->hwp + FEC_R_FIFO_RSEM);
1051                 writel(FEC_ENET_RSFL_V, fep->hwp + FEC_R_FIFO_RSFL);
1052                 writel(FEC_ENET_RAEM_V, fep->hwp + FEC_R_FIFO_RAEM);
1053                 writel(FEC_ENET_RAFL_V, fep->hwp + FEC_R_FIFO_RAFL);
1054 
1055                 /* OPD */
1056                 writel(FEC_ENET_OPD_V, fep->hwp + FEC_OPD);
1057         } else {
1058                 rcntl &= ~FEC_ENET_FCE;
1059         }
1060 #endif /* !defined(CONFIG_M5272) */
1061 
1062         writel(rcntl, fep->hwp + FEC_R_CNTRL);
1063 
1064         /* Setup multicast filter. */
1065         set_multicast_list(ndev);
1066 #ifndef CONFIG_M5272
1067         writel(0, fep->hwp + FEC_HASH_TABLE_HIGH);
1068         writel(0, fep->hwp + FEC_HASH_TABLE_LOW);
1069 #endif
1070 
1071         if (fep->quirks & FEC_QUIRK_ENET_MAC) {
1072                 /* enable ENET endian swap */
1073                 ecntl |= (1 << 8);
1074                 /* enable ENET store and forward mode */
1075                 writel(1 << 8, fep->hwp + FEC_X_WMRK);
1076         }
1077 
1078         if (fep->bufdesc_ex)
1079                 ecntl |= (1 << 4);
1080 
1081 #ifndef CONFIG_M5272
1082         /* Enable the MIB statistic event counters */
1083         writel(0 << 31, fep->hwp + FEC_MIB_CTRLSTAT);
1084 #endif
1085 
1086         /* And last, enable the transmit and receive processing */
1087         writel(ecntl, fep->hwp + FEC_ECNTRL);
1088         fec_enet_active_rxring(ndev);
1089 
1090         if (fep->bufdesc_ex)
1091                 fec_ptp_start_cyclecounter(ndev);
1092 
1093         /* Enable interrupts we wish to service */
1094         if (fep->link)
1095                 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1096         else
1097                 writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
1098 
1099         /* Init the interrupt coalescing */
1100         fec_enet_itr_coal_init(ndev);
1101 
1102 }
1103 
1104 static void
1105 fec_stop(struct net_device *ndev)
1106 {
1107         struct fec_enet_private *fep = netdev_priv(ndev);
1108         struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
1109         u32 rmii_mode = readl(fep->hwp + FEC_R_CNTRL) & (1 << 8);
1110         u32 val;
1111 
1112         /* We cannot expect a graceful transmit stop without link !!! */
1113         if (fep->link) {
1114                 writel(1, fep->hwp + FEC_X_CNTRL); /* Graceful transmit stop */
1115                 udelay(10);
1116                 if (!(readl(fep->hwp + FEC_IEVENT) & FEC_ENET_GRA))
1117                         netdev_err(ndev, "Graceful transmit stop did not complete!\n");
1118         }
1119 
1120         /* Whack a reset.  We should wait for this.
1121          * For i.MX6SX SOC, enet use AXI bus, we use disable MAC
1122          * instead of reset MAC itself.
1123          */
1124         if (!(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) {
1125                 if (fep->quirks & FEC_QUIRK_HAS_AVB) {
1126                         writel(0, fep->hwp + FEC_ECNTRL);
1127                 } else {
1128                         writel(1, fep->hwp + FEC_ECNTRL);
1129                         udelay(10);
1130                 }
1131                 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1132         } else {
1133                 writel(FEC_DEFAULT_IMASK | FEC_ENET_WAKEUP, fep->hwp + FEC_IMASK);
1134                 val = readl(fep->hwp + FEC_ECNTRL);
1135                 val |= (FEC_ECR_MAGICEN | FEC_ECR_SLEEP);
1136                 writel(val, fep->hwp + FEC_ECNTRL);
1137 
1138                 if (pdata && pdata->sleep_mode_enable)
1139                         pdata->sleep_mode_enable(true);
1140         }
1141         writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
1142 
1143         /* We have to keep ENET enabled to have MII interrupt stay working */
1144         if (fep->quirks & FEC_QUIRK_ENET_MAC &&
1145                 !(fep->wol_flag & FEC_WOL_FLAG_SLEEP_ON)) {
1146                 writel(2, fep->hwp + FEC_ECNTRL);
1147                 writel(rmii_mode, fep->hwp + FEC_R_CNTRL);
1148         }
1149 }
1150 
1151 
1152 static void
1153 fec_timeout(struct net_device *ndev)
1154 {
1155         struct fec_enet_private *fep = netdev_priv(ndev);
1156 
1157         fec_dump(ndev);
1158 
1159         ndev->stats.tx_errors++;
1160 
1161         schedule_work(&fep->tx_timeout_work);
1162 }
1163 
1164 static void fec_enet_timeout_work(struct work_struct *work)
1165 {
1166         struct fec_enet_private *fep =
1167                 container_of(work, struct fec_enet_private, tx_timeout_work);
1168         struct net_device *ndev = fep->netdev;
1169 
1170         rtnl_lock();
1171         if (netif_device_present(ndev) || netif_running(ndev)) {
1172                 napi_disable(&fep->napi);
1173                 netif_tx_lock_bh(ndev);
1174                 fec_restart(ndev);
1175                 netif_wake_queue(ndev);
1176                 netif_tx_unlock_bh(ndev);
1177                 napi_enable(&fep->napi);
1178         }
1179         rtnl_unlock();
1180 }
1181 
1182 static void
1183 fec_enet_hwtstamp(struct fec_enet_private *fep, unsigned ts,
1184         struct skb_shared_hwtstamps *hwtstamps)
1185 {
1186         unsigned long flags;
1187         u64 ns;
1188 
1189         spin_lock_irqsave(&fep->tmreg_lock, flags);
1190         ns = timecounter_cyc2time(&fep->tc, ts);
1191         spin_unlock_irqrestore(&fep->tmreg_lock, flags);
1192 
1193         memset(hwtstamps, 0, sizeof(*hwtstamps));
1194         hwtstamps->hwtstamp = ns_to_ktime(ns);
1195 }
1196 
1197 static void
1198 fec_enet_tx_queue(struct net_device *ndev, u16 queue_id)
1199 {
1200         struct  fec_enet_private *fep;
1201         struct bufdesc *bdp;
1202         unsigned short status;
1203         struct  sk_buff *skb;
1204         struct fec_enet_priv_tx_q *txq;
1205         struct netdev_queue *nq;
1206         int     index = 0;
1207         int     entries_free;
1208 
1209         fep = netdev_priv(ndev);
1210 
1211         queue_id = FEC_ENET_GET_QUQUE(queue_id);
1212 
1213         txq = fep->tx_queue[queue_id];
1214         /* get next bdp of dirty_tx */
1215         nq = netdev_get_tx_queue(ndev, queue_id);
1216         bdp = txq->dirty_tx;
1217 
1218         /* get next bdp of dirty_tx */
1219         bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1220 
1221         while (bdp != READ_ONCE(txq->cur_tx)) {
1222                 /* Order the load of cur_tx and cbd_sc */
1223                 rmb();
1224                 status = READ_ONCE(bdp->cbd_sc);
1225                 if (status & BD_ENET_TX_READY)
1226                         break;
1227 
1228                 index = fec_enet_get_bd_index(txq->tx_bd_base, bdp, fep);
1229 
1230                 skb = txq->tx_skbuff[index];
1231                 txq->tx_skbuff[index] = NULL;
1232                 if (!IS_TSO_HEADER(txq, bdp->cbd_bufaddr))
1233                         dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1234                                         bdp->cbd_datlen, DMA_TO_DEVICE);
1235                 bdp->cbd_bufaddr = 0;
1236                 if (!skb) {
1237                         bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1238                         continue;
1239                 }
1240 
1241                 /* Check for errors. */
1242                 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
1243                                    BD_ENET_TX_RL | BD_ENET_TX_UN |
1244                                    BD_ENET_TX_CSL)) {
1245                         ndev->stats.tx_errors++;
1246                         if (status & BD_ENET_TX_HB)  /* No heartbeat */
1247                                 ndev->stats.tx_heartbeat_errors++;
1248                         if (status & BD_ENET_TX_LC)  /* Late collision */
1249                                 ndev->stats.tx_window_errors++;
1250                         if (status & BD_ENET_TX_RL)  /* Retrans limit */
1251                                 ndev->stats.tx_aborted_errors++;
1252                         if (status & BD_ENET_TX_UN)  /* Underrun */
1253                                 ndev->stats.tx_fifo_errors++;
1254                         if (status & BD_ENET_TX_CSL) /* Carrier lost */
1255                                 ndev->stats.tx_carrier_errors++;
1256                 } else {
1257                         ndev->stats.tx_packets++;
1258                         ndev->stats.tx_bytes += skb->len;
1259                 }
1260 
1261                 if (unlikely(skb_shinfo(skb)->tx_flags & SKBTX_IN_PROGRESS) &&
1262                         fep->bufdesc_ex) {
1263                         struct skb_shared_hwtstamps shhwtstamps;
1264                         struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1265 
1266                         fec_enet_hwtstamp(fep, ebdp->ts, &shhwtstamps);
1267                         skb_tstamp_tx(skb, &shhwtstamps);
1268                 }
1269 
1270                 /* Deferred means some collisions occurred during transmit,
1271                  * but we eventually sent the packet OK.
1272                  */
1273                 if (status & BD_ENET_TX_DEF)
1274                         ndev->stats.collisions++;
1275 
1276                 /* Free the sk buffer associated with this last transmit */
1277                 dev_kfree_skb_any(skb);
1278 
1279                 /* Make sure the update to bdp and tx_skbuff are performed
1280                  * before dirty_tx
1281                  */
1282                 wmb();
1283                 txq->dirty_tx = bdp;
1284 
1285                 /* Update pointer to next buffer descriptor to be transmitted */
1286                 bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1287 
1288                 /* Since we have freed up a buffer, the ring is no longer full
1289                  */
1290                 if (netif_queue_stopped(ndev)) {
1291                         entries_free = fec_enet_get_free_txdesc_num(fep, txq);
1292                         if (entries_free >= txq->tx_wake_threshold)
1293                                 netif_tx_wake_queue(nq);
1294                 }
1295         }
1296 
1297         /* ERR006538: Keep the transmitter going */
1298         if (bdp != txq->cur_tx &&
1299             readl(fep->hwp + FEC_X_DES_ACTIVE(queue_id)) == 0)
1300                 writel(0, fep->hwp + FEC_X_DES_ACTIVE(queue_id));
1301 }
1302 
1303 static void
1304 fec_enet_tx(struct net_device *ndev)
1305 {
1306         struct fec_enet_private *fep = netdev_priv(ndev);
1307         u16 queue_id;
1308         /* First process class A queue, then Class B and Best Effort queue */
1309         for_each_set_bit(queue_id, &fep->work_tx, FEC_ENET_MAX_TX_QS) {
1310                 clear_bit(queue_id, &fep->work_tx);
1311                 fec_enet_tx_queue(ndev, queue_id);
1312         }
1313         return;
1314 }
1315 
1316 static int
1317 fec_enet_new_rxbdp(struct net_device *ndev, struct bufdesc *bdp, struct sk_buff *skb)
1318 {
1319         struct  fec_enet_private *fep = netdev_priv(ndev);
1320         int off;
1321 
1322         off = ((unsigned long)skb->data) & fep->rx_align;
1323         if (off)
1324                 skb_reserve(skb, fep->rx_align + 1 - off);
1325 
1326         bdp->cbd_bufaddr = dma_map_single(&fep->pdev->dev, skb->data,
1327                                           FEC_ENET_RX_FRSIZE - fep->rx_align,
1328                                           DMA_FROM_DEVICE);
1329         if (dma_mapping_error(&fep->pdev->dev, bdp->cbd_bufaddr)) {
1330                 if (net_ratelimit())
1331                         netdev_err(ndev, "Rx DMA memory map failed\n");
1332                 return -ENOMEM;
1333         }
1334 
1335         return 0;
1336 }
1337 
1338 static bool fec_enet_copybreak(struct net_device *ndev, struct sk_buff **skb,
1339                                struct bufdesc *bdp, u32 length, bool swap)
1340 {
1341         struct  fec_enet_private *fep = netdev_priv(ndev);
1342         struct sk_buff *new_skb;
1343 
1344         if (length > fep->rx_copybreak)
1345                 return false;
1346 
1347         new_skb = netdev_alloc_skb(ndev, length);
1348         if (!new_skb)
1349                 return false;
1350 
1351         dma_sync_single_for_cpu(&fep->pdev->dev, bdp->cbd_bufaddr,
1352                                 FEC_ENET_RX_FRSIZE - fep->rx_align,
1353                                 DMA_FROM_DEVICE);
1354         if (!swap)
1355                 memcpy(new_skb->data, (*skb)->data, length);
1356         else
1357                 swap_buffer2(new_skb->data, (*skb)->data, length);
1358         *skb = new_skb;
1359 
1360         return true;
1361 }
1362 
1363 /* During a receive, the cur_rx points to the current incoming buffer.
1364  * When we update through the ring, if the next incoming buffer has
1365  * not been given to the system, we just set the empty indicator,
1366  * effectively tossing the packet.
1367  */
1368 static int
1369 fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)
1370 {
1371         struct fec_enet_private *fep = netdev_priv(ndev);
1372         struct fec_enet_priv_rx_q *rxq;
1373         struct bufdesc *bdp;
1374         unsigned short status;
1375         struct  sk_buff *skb_new = NULL;
1376         struct  sk_buff *skb;
1377         ushort  pkt_len;
1378         __u8 *data;
1379         int     pkt_received = 0;
1380         struct  bufdesc_ex *ebdp = NULL;
1381         bool    vlan_packet_rcvd = false;
1382         u16     vlan_tag;
1383         int     index = 0;
1384         bool    is_copybreak;
1385         bool    need_swap = fep->quirks & FEC_QUIRK_SWAP_FRAME;
1386 
1387 #ifdef CONFIG_M532x
1388         flush_cache_all();
1389 #endif
1390         queue_id = FEC_ENET_GET_QUQUE(queue_id);
1391         rxq = fep->rx_queue[queue_id];
1392 
1393         /* First, grab all of the stats for the incoming packet.
1394          * These get messed up if we get called due to a busy condition.
1395          */
1396         bdp = rxq->cur_rx;
1397 
1398         while (!((status = bdp->cbd_sc) & BD_ENET_RX_EMPTY)) {
1399 
1400                 if (pkt_received >= budget)
1401                         break;
1402                 pkt_received++;
1403 
1404                 /* Since we have allocated space to hold a complete frame,
1405                  * the last indicator should be set.
1406                  */
1407                 if ((status & BD_ENET_RX_LAST) == 0)
1408                         netdev_err(ndev, "rcv is not +last\n");
1409 
1410                 writel(FEC_ENET_RXF, fep->hwp + FEC_IEVENT);
1411 
1412                 /* Check for errors. */
1413                 if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH | BD_ENET_RX_NO |
1414                            BD_ENET_RX_CR | BD_ENET_RX_OV)) {
1415                         ndev->stats.rx_errors++;
1416                         if (status & (BD_ENET_RX_LG | BD_ENET_RX_SH)) {
1417                                 /* Frame too long or too short. */
1418                                 ndev->stats.rx_length_errors++;
1419                         }
1420                         if (status & BD_ENET_RX_NO)     /* Frame alignment */
1421                                 ndev->stats.rx_frame_errors++;
1422                         if (status & BD_ENET_RX_CR)     /* CRC Error */
1423                                 ndev->stats.rx_crc_errors++;
1424                         if (status & BD_ENET_RX_OV)     /* FIFO overrun */
1425                                 ndev->stats.rx_fifo_errors++;
1426                 }
1427 
1428                 /* Report late collisions as a frame error.
1429                  * On this error, the BD is closed, but we don't know what we
1430                  * have in the buffer.  So, just drop this frame on the floor.
1431                  */
1432                 if (status & BD_ENET_RX_CL) {
1433                         ndev->stats.rx_errors++;
1434                         ndev->stats.rx_frame_errors++;
1435                         goto rx_processing_done;
1436                 }
1437 
1438                 /* Process the incoming frame. */
1439                 ndev->stats.rx_packets++;
1440                 pkt_len = bdp->cbd_datlen;
1441                 ndev->stats.rx_bytes += pkt_len;
1442 
1443                 index = fec_enet_get_bd_index(rxq->rx_bd_base, bdp, fep);
1444                 skb = rxq->rx_skbuff[index];
1445 
1446                 /* The packet length includes FCS, but we don't want to
1447                  * include that when passing upstream as it messes up
1448                  * bridging applications.
1449                  */
1450                 is_copybreak = fec_enet_copybreak(ndev, &skb, bdp, pkt_len - 4,
1451                                                   need_swap);
1452                 if (!is_copybreak) {
1453                         skb_new = netdev_alloc_skb(ndev, FEC_ENET_RX_FRSIZE);
1454                         if (unlikely(!skb_new)) {
1455                                 ndev->stats.rx_dropped++;
1456                                 goto rx_processing_done;
1457                         }
1458                         dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1459                                          FEC_ENET_RX_FRSIZE - fep->rx_align,
1460                                          DMA_FROM_DEVICE);
1461                 }
1462 
1463                 prefetch(skb->data - NET_IP_ALIGN);
1464                 skb_put(skb, pkt_len - 4);
1465                 data = skb->data;
1466                 if (!is_copybreak && need_swap)
1467                         swap_buffer(data, pkt_len);
1468 
1469                 /* Extract the enhanced buffer descriptor */
1470                 ebdp = NULL;
1471                 if (fep->bufdesc_ex)
1472                         ebdp = (struct bufdesc_ex *)bdp;
1473 
1474                 /* If this is a VLAN packet remove the VLAN Tag */
1475                 vlan_packet_rcvd = false;
1476                 if ((ndev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
1477                         fep->bufdesc_ex && (ebdp->cbd_esc & BD_ENET_RX_VLAN)) {
1478                         /* Push and remove the vlan tag */
1479                         struct vlan_hdr *vlan_header =
1480                                         (struct vlan_hdr *) (data + ETH_HLEN);
1481                         vlan_tag = ntohs(vlan_header->h_vlan_TCI);
1482 
1483                         vlan_packet_rcvd = true;
1484 
1485                         memmove(skb->data + VLAN_HLEN, data, ETH_ALEN * 2);
1486                         skb_pull(skb, VLAN_HLEN);
1487                 }
1488 
1489                 skb->protocol = eth_type_trans(skb, ndev);
1490 
1491                 /* Get receive timestamp from the skb */
1492                 if (fep->hwts_rx_en && fep->bufdesc_ex)
1493                         fec_enet_hwtstamp(fep, ebdp->ts,
1494                                           skb_hwtstamps(skb));
1495 
1496                 if (fep->bufdesc_ex &&
1497                     (fep->csum_flags & FLAG_RX_CSUM_ENABLED)) {
1498                         if (!(ebdp->cbd_esc & FLAG_RX_CSUM_ERROR)) {
1499                                 /* don't check it */
1500                                 skb->ip_summed = CHECKSUM_UNNECESSARY;
1501                         } else {
1502                                 skb_checksum_none_assert(skb);
1503                         }
1504                 }
1505 
1506                 /* Handle received VLAN packets */
1507                 if (vlan_packet_rcvd)
1508                         __vlan_hwaccel_put_tag(skb,
1509                                                htons(ETH_P_8021Q),
1510                                                vlan_tag);
1511 
1512                 napi_gro_receive(&fep->napi, skb);
1513 
1514                 if (is_copybreak) {
1515                         dma_sync_single_for_device(&fep->pdev->dev, bdp->cbd_bufaddr,
1516                                                    FEC_ENET_RX_FRSIZE - fep->rx_align,
1517                                                    DMA_FROM_DEVICE);
1518                 } else {
1519                         rxq->rx_skbuff[index] = skb_new;
1520                         fec_enet_new_rxbdp(ndev, bdp, skb_new);
1521                 }
1522 
1523 rx_processing_done:
1524                 /* Clear the status flags for this buffer */
1525                 status &= ~BD_ENET_RX_STATS;
1526 
1527                 /* Mark the buffer empty */
1528                 status |= BD_ENET_RX_EMPTY;
1529                 bdp->cbd_sc = status;
1530 
1531                 if (fep->bufdesc_ex) {
1532                         struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
1533 
1534                         ebdp->cbd_esc = BD_ENET_RX_INT;
1535                         ebdp->cbd_prot = 0;
1536                         ebdp->cbd_bdu = 0;
1537                 }
1538 
1539                 /* Update BD pointer to next entry */
1540                 bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1541 
1542                 /* Doing this here will keep the FEC running while we process
1543                  * incoming frames.  On a heavily loaded network, we should be
1544                  * able to keep up at the expense of system resources.
1545                  */
1546                 writel(0, fep->hwp + FEC_R_DES_ACTIVE(queue_id));
1547         }
1548         rxq->cur_rx = bdp;
1549         return pkt_received;
1550 }
1551 
1552 static int
1553 fec_enet_rx(struct net_device *ndev, int budget)
1554 {
1555         int     pkt_received = 0;
1556         u16     queue_id;
1557         struct fec_enet_private *fep = netdev_priv(ndev);
1558 
1559         for_each_set_bit(queue_id, &fep->work_rx, FEC_ENET_MAX_RX_QS) {
1560                 clear_bit(queue_id, &fep->work_rx);
1561                 pkt_received += fec_enet_rx_queue(ndev,
1562                                         budget - pkt_received, queue_id);
1563         }
1564         return pkt_received;
1565 }
1566 
1567 static bool
1568 fec_enet_collect_events(struct fec_enet_private *fep, uint int_events)
1569 {
1570         if (int_events == 0)
1571                 return false;
1572 
1573         if (int_events & FEC_ENET_RXF)
1574                 fep->work_rx |= (1 << 2);
1575         if (int_events & FEC_ENET_RXF_1)
1576                 fep->work_rx |= (1 << 0);
1577         if (int_events & FEC_ENET_RXF_2)
1578                 fep->work_rx |= (1 << 1);
1579 
1580         if (int_events & FEC_ENET_TXF)
1581                 fep->work_tx |= (1 << 2);
1582         if (int_events & FEC_ENET_TXF_1)
1583                 fep->work_tx |= (1 << 0);
1584         if (int_events & FEC_ENET_TXF_2)
1585                 fep->work_tx |= (1 << 1);
1586 
1587         return true;
1588 }
1589 
1590 static irqreturn_t
1591 fec_enet_interrupt(int irq, void *dev_id)
1592 {
1593         struct net_device *ndev = dev_id;
1594         struct fec_enet_private *fep = netdev_priv(ndev);
1595         uint int_events;
1596         irqreturn_t ret = IRQ_NONE;
1597 
1598         int_events = readl(fep->hwp + FEC_IEVENT);
1599         writel(int_events, fep->hwp + FEC_IEVENT);
1600         fec_enet_collect_events(fep, int_events);
1601 
1602         if ((fep->work_tx || fep->work_rx) && fep->link) {
1603                 ret = IRQ_HANDLED;
1604 
1605                 if (napi_schedule_prep(&fep->napi)) {
1606                         /* Disable the NAPI interrupts */
1607                         writel(FEC_ENET_MII, fep->hwp + FEC_IMASK);
1608                         __napi_schedule(&fep->napi);
1609                 }
1610         }
1611 
1612         if (int_events & FEC_ENET_MII) {
1613                 ret = IRQ_HANDLED;
1614                 complete(&fep->mdio_done);
1615         }
1616 
1617         if (fep->ptp_clock)
1618                 fec_ptp_check_pps_event(fep);
1619 
1620         return ret;
1621 }
1622 
1623 static int fec_enet_rx_napi(struct napi_struct *napi, int budget)
1624 {
1625         struct net_device *ndev = napi->dev;
1626         struct fec_enet_private *fep = netdev_priv(ndev);
1627         int pkts;
1628 
1629         pkts = fec_enet_rx(ndev, budget);
1630 
1631         fec_enet_tx(ndev);
1632 
1633         if (pkts < budget) {
1634                 napi_complete(napi);
1635                 writel(FEC_DEFAULT_IMASK, fep->hwp + FEC_IMASK);
1636         }
1637         return pkts;
1638 }
1639 
1640 /* ------------------------------------------------------------------------- */
1641 static void fec_get_mac(struct net_device *ndev)
1642 {
1643         struct fec_enet_private *fep = netdev_priv(ndev);
1644         struct fec_platform_data *pdata = dev_get_platdata(&fep->pdev->dev);
1645         unsigned char *iap, tmpaddr[ETH_ALEN];
1646 
1647         /*
1648          * try to get mac address in following order:
1649          *
1650          * 1) module parameter via kernel command line in form
1651          *    fec.macaddr=0x00,0x04,0x9f,0x01,0x30,0xe0
1652          */
1653         iap = macaddr;
1654 
1655         /*
1656          * 2) from device tree data
1657          */
1658         if (!is_valid_ether_addr(iap)) {
1659                 struct device_node *np = fep->pdev->dev.of_node;
1660                 if (np) {
1661                         const char *mac = of_get_mac_address(np);
1662                         if (mac)
1663                                 iap = (unsigned char *) mac;
1664                 }
1665         }
1666 
1667         /*
1668          * 3) from flash or fuse (via platform data)
1669          */
1670         if (!is_valid_ether_addr(iap)) {
1671 #ifdef CONFIG_M5272
1672                 if (FEC_FLASHMAC)
1673                         iap = (unsigned char *)FEC_FLASHMAC;
1674 #else
1675                 if (pdata)
1676                         iap = (unsigned char *)&pdata->mac;
1677 #endif
1678         }
1679 
1680         /*
1681          * 4) FEC mac registers set by bootloader
1682          */
1683         if (!is_valid_ether_addr(iap)) {
1684                 *((__be32 *) &tmpaddr[0]) =
1685                         cpu_to_be32(readl(fep->hwp + FEC_ADDR_LOW));
1686                 *((__be16 *) &tmpaddr[4]) =
1687                         cpu_to_be16(readl(fep->hwp + FEC_ADDR_HIGH) >> 16);
1688                 iap = &tmpaddr[0];
1689         }
1690 
1691         /*
1692          * 5) random mac address
1693          */
1694         if (!is_valid_ether_addr(iap)) {
1695                 /* Report it and use a random ethernet address instead */
1696                 netdev_err(ndev, "Invalid MAC address: %pM\n", iap);
1697                 eth_hw_addr_random(ndev);
1698                 netdev_info(ndev, "Using random MAC address: %pM\n",
1699                             ndev->dev_addr);
1700                 return;
1701         }
1702 
1703         memcpy(ndev->dev_addr, iap, ETH_ALEN);
1704 
1705         /* Adjust MAC if using macaddr */
1706         if (iap == macaddr)
1707                  ndev->dev_addr[ETH_ALEN-1] = macaddr[ETH_ALEN-1] + fep->dev_id;
1708 }
1709 
1710 /* ------------------------------------------------------------------------- */
1711 
1712 /*
1713  * Phy section
1714  */
1715 static void fec_enet_adjust_link(struct net_device *ndev)
1716 {
1717         struct fec_enet_private *fep = netdev_priv(ndev);
1718         struct phy_device *phy_dev = fep->phy_dev;
1719         int status_change = 0;
1720 
1721         /* Prevent a state halted on mii error */
1722         if (fep->mii_timeout && phy_dev->state == PHY_HALTED) {
1723                 phy_dev->state = PHY_RESUMING;
1724                 return;
1725         }
1726 
1727         /*
1728          * If the netdev is down, or is going down, we're not interested
1729          * in link state events, so just mark our idea of the link as down
1730          * and ignore the event.
1731          */
1732         if (!netif_running(ndev) || !netif_device_present(ndev)) {
1733                 fep->link = 0;
1734         } else if (phy_dev->link) {
1735                 if (!fep->link) {
1736                         fep->link = phy_dev->link;
1737                         status_change = 1;
1738                 }
1739 
1740                 if (fep->full_duplex != phy_dev->duplex) {
1741                         fep->full_duplex = phy_dev->duplex;
1742                         status_change = 1;
1743                 }
1744 
1745                 if (phy_dev->speed != fep->speed) {
1746                         fep->speed = phy_dev->speed;
1747                         status_change = 1;
1748                 }
1749 
1750                 /* if any of the above changed restart the FEC */
1751                 if (status_change) {
1752                         napi_disable(&fep->napi);
1753                         netif_tx_lock_bh(ndev);
1754                         fec_restart(ndev);
1755                         netif_wake_queue(ndev);
1756                         netif_tx_unlock_bh(ndev);
1757                         napi_enable(&fep->napi);
1758                 }
1759         } else {
1760                 if (fep->link) {
1761                         napi_disable(&fep->napi);
1762                         netif_tx_lock_bh(ndev);
1763                         fec_stop(ndev);
1764                         netif_tx_unlock_bh(ndev);
1765                         napi_enable(&fep->napi);
1766                         fep->link = phy_dev->link;
1767                         status_change = 1;
1768                 }
1769         }
1770 
1771         if (status_change)
1772                 phy_print_status(phy_dev);
1773 }
1774 
1775 static int fec_enet_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
1776 {
1777         struct fec_enet_private *fep = bus->priv;
1778         struct device *dev = &fep->pdev->dev;
1779         unsigned long time_left;
1780         int ret = 0;
1781 
1782         ret = pm_runtime_get_sync(dev);
1783         if (ret < 0)
1784                 return ret;
1785 
1786         fep->mii_timeout = 0;
1787         reinit_completion(&fep->mdio_done);
1788 
1789         /* start a read op */
1790         writel(FEC_MMFR_ST | FEC_MMFR_OP_READ |
1791                 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1792                 FEC_MMFR_TA, fep->hwp + FEC_MII_DATA);
1793 
1794         /* wait for end of transfer */
1795         time_left = wait_for_completion_timeout(&fep->mdio_done,
1796                         usecs_to_jiffies(FEC_MII_TIMEOUT));
1797         if (time_left == 0) {
1798                 fep->mii_timeout = 1;
1799                 netdev_err(fep->netdev, "MDIO read timeout\n");
1800                 ret = -ETIMEDOUT;
1801                 goto out;
1802         }
1803 
1804         ret = FEC_MMFR_DATA(readl(fep->hwp + FEC_MII_DATA));
1805 
1806 out:
1807         pm_runtime_mark_last_busy(dev);
1808         pm_runtime_put_autosuspend(dev);
1809 
1810         return ret;
1811 }
1812 
1813 static int fec_enet_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
1814                            u16 value)
1815 {
1816         struct fec_enet_private *fep = bus->priv;
1817         struct device *dev = &fep->pdev->dev;
1818         unsigned long time_left;
1819         int ret;
1820 
1821         ret = pm_runtime_get_sync(dev);
1822         if (ret < 0)
1823                 return ret;
1824         else
1825                 ret = 0;
1826 
1827         fep->mii_timeout = 0;
1828         reinit_completion(&fep->mdio_done);
1829 
1830         /* start a write op */
1831         writel(FEC_MMFR_ST | FEC_MMFR_OP_WRITE |
1832                 FEC_MMFR_PA(mii_id) | FEC_MMFR_RA(regnum) |
1833                 FEC_MMFR_TA | FEC_MMFR_DATA(value),
1834                 fep->hwp + FEC_MII_DATA);
1835 
1836         /* wait for end of transfer */
1837         time_left = wait_for_completion_timeout(&fep->mdio_done,
1838                         usecs_to_jiffies(FEC_MII_TIMEOUT));
1839         if (time_left == 0) {
1840                 fep->mii_timeout = 1;
1841                 netdev_err(fep->netdev, "MDIO write timeout\n");
1842                 ret  = -ETIMEDOUT;
1843         }
1844 
1845         pm_runtime_mark_last_busy(dev);
1846         pm_runtime_put_autosuspend(dev);
1847 
1848         return ret;
1849 }
1850 
1851 static int fec_enet_clk_enable(struct net_device *ndev, bool enable)
1852 {
1853         struct fec_enet_private *fep = netdev_priv(ndev);
1854         int ret;
1855 
1856         if (enable) {
1857                 ret = clk_prepare_enable(fep->clk_ahb);
1858                 if (ret)
1859                         return ret;
1860                 if (fep->clk_enet_out) {
1861                         ret = clk_prepare_enable(fep->clk_enet_out);
1862                         if (ret)
1863                                 goto failed_clk_enet_out;
1864                 }
1865                 if (fep->clk_ptp) {
1866                         mutex_lock(&fep->ptp_clk_mutex);
1867                         ret = clk_prepare_enable(fep->clk_ptp);
1868                         if (ret) {
1869                                 mutex_unlock(&fep->ptp_clk_mutex);
1870                                 goto failed_clk_ptp;
1871                         } else {
1872                                 fep->ptp_clk_on = true;
1873                         }
1874                         mutex_unlock(&fep->ptp_clk_mutex);
1875                 }
1876                 if (fep->clk_ref) {
1877                         ret = clk_prepare_enable(fep->clk_ref);
1878                         if (ret)
1879                                 goto failed_clk_ref;
1880                 }
1881         } else {
1882                 clk_disable_unprepare(fep->clk_ahb);
1883                 if (fep->clk_enet_out)
1884                         clk_disable_unprepare(fep->clk_enet_out);
1885                 if (fep->clk_ptp) {
1886                         mutex_lock(&fep->ptp_clk_mutex);
1887                         clk_disable_unprepare(fep->clk_ptp);
1888                         fep->ptp_clk_on = false;
1889                         mutex_unlock(&fep->ptp_clk_mutex);
1890                 }
1891                 if (fep->clk_ref)
1892                         clk_disable_unprepare(fep->clk_ref);
1893         }
1894 
1895         return 0;
1896 
1897 failed_clk_ref:
1898         if (fep->clk_ref)
1899                 clk_disable_unprepare(fep->clk_ref);
1900 failed_clk_ptp:
1901         if (fep->clk_enet_out)
1902                 clk_disable_unprepare(fep->clk_enet_out);
1903 failed_clk_enet_out:
1904                 clk_disable_unprepare(fep->clk_ahb);
1905 
1906         return ret;
1907 }
1908 
1909 static int fec_enet_mii_probe(struct net_device *ndev)
1910 {
1911         struct fec_enet_private *fep = netdev_priv(ndev);
1912         struct phy_device *phy_dev = NULL;
1913         char mdio_bus_id[MII_BUS_ID_SIZE];
1914         char phy_name[MII_BUS_ID_SIZE + 3];
1915         int phy_id;
1916         int dev_id = fep->dev_id;
1917 
1918         fep->phy_dev = NULL;
1919 
1920         if (fep->phy_node) {
1921                 phy_dev = of_phy_connect(ndev, fep->phy_node,
1922                                          &fec_enet_adjust_link, 0,
1923                                          fep->phy_interface);
1924                 if (!phy_dev)
1925                         return -ENODEV;
1926         } else {
1927                 /* check for attached phy */
1928                 for (phy_id = 0; (phy_id < PHY_MAX_ADDR); phy_id++) {
1929                         if ((fep->mii_bus->phy_mask & (1 << phy_id)))
1930                                 continue;
1931                         if (fep->mii_bus->phy_map[phy_id] == NULL)
1932                                 continue;
1933                         if (fep->mii_bus->phy_map[phy_id]->phy_id == 0)
1934                                 continue;
1935                         if (dev_id--)
1936                                 continue;
1937                         strlcpy(mdio_bus_id, fep->mii_bus->id, MII_BUS_ID_SIZE);
1938                         break;
1939                 }
1940 
1941                 if (phy_id >= PHY_MAX_ADDR) {
1942                         netdev_info(ndev, "no PHY, assuming direct connection to switch\n");
1943                         strlcpy(mdio_bus_id, "fixed-0", MII_BUS_ID_SIZE);
1944                         phy_id = 0;
1945                 }
1946 
1947                 snprintf(phy_name, sizeof(phy_name),
1948                          PHY_ID_FMT, mdio_bus_id, phy_id);
1949                 phy_dev = phy_connect(ndev, phy_name, &fec_enet_adjust_link,
1950                                       fep->phy_interface);
1951         }
1952 
1953         if (IS_ERR(phy_dev)) {
1954                 netdev_err(ndev, "could not attach to PHY\n");
1955                 return PTR_ERR(phy_dev);
1956         }
1957 
1958         /* mask with MAC supported features */
1959         if (fep->quirks & FEC_QUIRK_HAS_GBIT) {
1960                 phy_dev->supported &= PHY_GBIT_FEATURES;
1961                 phy_dev->supported &= ~SUPPORTED_1000baseT_Half;
1962 #if !defined(CONFIG_M5272)
1963                 phy_dev->supported |= SUPPORTED_Pause;
1964 #endif
1965         }
1966         else
1967                 phy_dev->supported &= PHY_BASIC_FEATURES;
1968 
1969         phy_dev->advertising = phy_dev->supported;
1970 
1971         fep->phy_dev = phy_dev;
1972         fep->link = 0;
1973         fep->full_duplex = 0;
1974 
1975         netdev_info(ndev, "Freescale FEC PHY driver [%s] (mii_bus:phy_addr=%s, irq=%d)\n",
1976                     fep->phy_dev->drv->name, dev_name(&fep->phy_dev->dev),
1977                     fep->phy_dev->irq);
1978 
1979         return 0;
1980 }
1981 
1982 static int fec_enet_mii_init(struct platform_device *pdev)
1983 {
1984         static struct mii_bus *fec0_mii_bus;
1985         struct net_device *ndev = platform_get_drvdata(pdev);
1986         struct fec_enet_private *fep = netdev_priv(ndev);
1987         struct device_node *node;
1988         int err = -ENXIO, i;
1989         u32 mii_speed, holdtime;
1990 
1991         /*
1992          * The i.MX28 dual fec interfaces are not equal.
1993          * Here are the differences:
1994          *
1995          *  - fec0 supports MII & RMII modes while fec1 only supports RMII
1996          *  - fec0 acts as the 1588 time master while fec1 is slave
1997          *  - external phys can only be configured by fec0
1998          *
1999          * That is to say fec1 can not work independently. It only works
2000          * when fec0 is working. The reason behind this design is that the
2001          * second interface is added primarily for Switch mode.
2002          *
2003          * Because of the last point above, both phys are attached on fec0
2004          * mdio interface in board design, and need to be configured by
2005          * fec0 mii_bus.
2006          */
2007         if ((fep->quirks & FEC_QUIRK_SINGLE_MDIO) && fep->dev_id > 0) {
2008                 /* fec1 uses fec0 mii_bus */
2009                 if (mii_cnt && fec0_mii_bus) {
2010                         fep->mii_bus = fec0_mii_bus;
2011                         mii_cnt++;
2012                         return 0;
2013                 }
2014                 return -ENOENT;
2015         }
2016 
2017         fep->mii_timeout = 0;
2018 
2019         /*
2020          * Set MII speed to 2.5 MHz (= clk_get_rate() / 2 * phy_speed)
2021          *
2022          * The formula for FEC MDC is 'ref_freq / (MII_SPEED x 2)' while
2023          * for ENET-MAC is 'ref_freq / ((MII_SPEED + 1) x 2)'.  The i.MX28
2024          * Reference Manual has an error on this, and gets fixed on i.MX6Q
2025          * document.
2026          */
2027         mii_speed = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 5000000);
2028         if (fep->quirks & FEC_QUIRK_ENET_MAC)
2029                 mii_speed--;
2030         if (mii_speed > 63) {
2031                 dev_err(&pdev->dev,
2032                         "fec clock (%lu) to fast to get right mii speed\n",
2033                         clk_get_rate(fep->clk_ipg));
2034                 err = -EINVAL;
2035                 goto err_out;
2036         }
2037 
2038         /*
2039          * The i.MX28 and i.MX6 types have another filed in the MSCR (aka
2040          * MII_SPEED) register that defines the MDIO output hold time. Earlier
2041          * versions are RAZ there, so just ignore the difference and write the
2042          * register always.
2043          * The minimal hold time according to IEE802.3 (clause 22) is 10 ns.
2044          * HOLDTIME + 1 is the number of clk cycles the fec is holding the
2045          * output.
2046          * The HOLDTIME bitfield takes values between 0 and 7 (inclusive).
2047          * Given that ceil(clkrate / 5000000) <= 64, the calculation for
2048          * holdtime cannot result in a value greater than 3.
2049          */
2050         holdtime = DIV_ROUND_UP(clk_get_rate(fep->clk_ipg), 100000000) - 1;
2051 
2052         fep->phy_speed = mii_speed << 1 | holdtime << 8;
2053 
2054         writel(fep->phy_speed, fep->hwp + FEC_MII_SPEED);
2055 
2056         fep->mii_bus = mdiobus_alloc();
2057         if (fep->mii_bus == NULL) {
2058                 err = -ENOMEM;
2059                 goto err_out;
2060         }
2061 
2062         fep->mii_bus->name = "fec_enet_mii_bus";
2063         fep->mii_bus->read = fec_enet_mdio_read;
2064         fep->mii_bus->write = fec_enet_mdio_write;
2065         snprintf(fep->mii_bus->id, MII_BUS_ID_SIZE, "%s-%x",
2066                 pdev->name, fep->dev_id + 1);
2067         fep->mii_bus->priv = fep;
2068         fep->mii_bus->parent = &pdev->dev;
2069 
2070         fep->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL);
2071         if (!fep->mii_bus->irq) {
2072                 err = -ENOMEM;
2073                 goto err_out_free_mdiobus;
2074         }
2075 
2076         for (i = 0; i < PHY_MAX_ADDR; i++)
2077                 fep->mii_bus->irq[i] = PHY_POLL;
2078 
2079         node = of_get_child_by_name(pdev->dev.of_node, "mdio");
2080         if (node) {
2081                 err = of_mdiobus_register(fep->mii_bus, node);
2082                 of_node_put(node);
2083         } else {
2084                 err = mdiobus_register(fep->mii_bus);
2085         }
2086 
2087         if (err)
2088                 goto err_out_free_mdio_irq;
2089 
2090         mii_cnt++;
2091 
2092         /* save fec0 mii_bus */
2093         if (fep->quirks & FEC_QUIRK_SINGLE_MDIO)
2094                 fec0_mii_bus = fep->mii_bus;
2095 
2096         return 0;
2097 
2098 err_out_free_mdio_irq:
2099         kfree(fep->mii_bus->irq);
2100 err_out_free_mdiobus:
2101         mdiobus_free(fep->mii_bus);
2102 err_out:
2103         return err;
2104 }
2105 
2106 static void fec_enet_mii_remove(struct fec_enet_private *fep)
2107 {
2108         if (--mii_cnt == 0) {
2109                 mdiobus_unregister(fep->mii_bus);
2110                 kfree(fep->mii_bus->irq);
2111                 mdiobus_free(fep->mii_bus);
2112         }
2113 }
2114 
2115 static int fec_enet_get_settings(struct net_device *ndev,
2116                                   struct ethtool_cmd *cmd)
2117 {
2118         struct fec_enet_private *fep = netdev_priv(ndev);
2119         struct phy_device *phydev = fep->phy_dev;
2120 
2121         if (!phydev)
2122                 return -ENODEV;
2123 
2124         return phy_ethtool_gset(phydev, cmd);
2125 }
2126 
2127 static int fec_enet_set_settings(struct net_device *ndev,
2128                                  struct ethtool_cmd *cmd)
2129 {
2130         struct fec_enet_private *fep = netdev_priv(ndev);
2131         struct phy_device *phydev = fep->phy_dev;
2132 
2133         if (!phydev)
2134                 return -ENODEV;
2135 
2136         return phy_ethtool_sset(phydev, cmd);
2137 }
2138 
2139 static void fec_enet_get_drvinfo(struct net_device *ndev,
2140                                  struct ethtool_drvinfo *info)
2141 {
2142         struct fec_enet_private *fep = netdev_priv(ndev);
2143 
2144         strlcpy(info->driver, fep->pdev->dev.driver->name,
2145                 sizeof(info->driver));
2146         strlcpy(info->version, "Revision: 1.0", sizeof(info->version));
2147         strlcpy(info->bus_info, dev_name(&ndev->dev), sizeof(info->bus_info));
2148 }
2149 
2150 static int fec_enet_get_regs_len(struct net_device *ndev)
2151 {
2152         struct fec_enet_private *fep = netdev_priv(ndev);
2153         struct resource *r;
2154         int s = 0;
2155 
2156         r = platform_get_resource(fep->pdev, IORESOURCE_MEM, 0);
2157         if (r)
2158                 s = resource_size(r);
2159 
2160         return s;
2161 }
2162 
2163 /* List of registers that can be safety be read to dump them with ethtool */
2164 #if defined(CONFIG_M523x) || defined(CONFIG_M527x) || defined(CONFIG_M528x) || \
2165         defined(CONFIG_M520x) || defined(CONFIG_M532x) ||               \
2166         defined(CONFIG_ARCH_MXC) || defined(CONFIG_SOC_IMX28)
2167 static u32 fec_enet_register_offset[] = {
2168         FEC_IEVENT, FEC_IMASK, FEC_R_DES_ACTIVE_0, FEC_X_DES_ACTIVE_0,
2169         FEC_ECNTRL, FEC_MII_DATA, FEC_MII_SPEED, FEC_MIB_CTRLSTAT, FEC_R_CNTRL,
2170         FEC_X_CNTRL, FEC_ADDR_LOW, FEC_ADDR_HIGH, FEC_OPD, FEC_TXIC0, FEC_TXIC1,
2171         FEC_TXIC2, FEC_RXIC0, FEC_RXIC1, FEC_RXIC2, FEC_HASH_TABLE_HIGH,
2172         FEC_HASH_TABLE_LOW, FEC_GRP_HASH_TABLE_HIGH, FEC_GRP_HASH_TABLE_LOW,
2173         FEC_X_WMRK, FEC_R_BOUND, FEC_R_FSTART, FEC_R_DES_START_1,
2174         FEC_X_DES_START_1, FEC_R_BUFF_SIZE_1, FEC_R_DES_START_2,
2175         FEC_X_DES_START_2, FEC_R_BUFF_SIZE_2, FEC_R_DES_START_0,
2176         FEC_X_DES_START_0, FEC_R_BUFF_SIZE_0, FEC_R_FIFO_RSFL, FEC_R_FIFO_RSEM,
2177         FEC_R_FIFO_RAEM, FEC_R_FIFO_RAFL, FEC_RACC, FEC_RCMR_1, FEC_RCMR_2,
2178         FEC_DMA_CFG_1, FEC_DMA_CFG_2, FEC_R_DES_ACTIVE_1, FEC_X_DES_ACTIVE_1,
2179         FEC_R_DES_ACTIVE_2, FEC_X_DES_ACTIVE_2, FEC_QOS_SCHEME,
2180         RMON_T_DROP, RMON_T_PACKETS, RMON_T_BC_PKT, RMON_T_MC_PKT,
2181         RMON_T_CRC_ALIGN, RMON_T_UNDERSIZE, RMON_T_OVERSIZE, RMON_T_FRAG,
2182         RMON_T_JAB, RMON_T_COL, RMON_T_P64, RMON_T_P65TO127, RMON_T_P128TO255,
2183         RMON_T_P256TO511, RMON_T_P512TO1023, RMON_T_P1024TO2047,
2184         RMON_T_P_GTE2048, RMON_T_OCTETS,
2185         IEEE_T_DROP, IEEE_T_FRAME_OK, IEEE_T_1COL, IEEE_T_MCOL, IEEE_T_DEF,
2186         IEEE_T_LCOL, IEEE_T_EXCOL, IEEE_T_MACERR, IEEE_T_CSERR, IEEE_T_SQE,
2187         IEEE_T_FDXFC, IEEE_T_OCTETS_OK,
2188         RMON_R_PACKETS, RMON_R_BC_PKT, RMON_R_MC_PKT, RMON_R_CRC_ALIGN,
2189         RMON_R_UNDERSIZE, RMON_R_OVERSIZE, RMON_R_FRAG, RMON_R_JAB,
2190         RMON_R_RESVD_O, RMON_R_P64, RMON_R_P65TO127, RMON_R_P128TO255,
2191         RMON_R_P256TO511, RMON_R_P512TO1023, RMON_R_P1024TO2047,
2192         RMON_R_P_GTE2048, RMON_R_OCTETS,
2193         IEEE_R_DROP, IEEE_R_FRAME_OK, IEEE_R_CRC, IEEE_R_ALIGN, IEEE_R_MACERR,
2194         IEEE_R_FDXFC, IEEE_R_OCTETS_OK
2195 };
2196 #else
2197 static u32 fec_enet_register_offset[] = {
2198         FEC_ECNTRL, FEC_IEVENT, FEC_IMASK, FEC_IVEC, FEC_R_DES_ACTIVE_0,
2199         FEC_R_DES_ACTIVE_1, FEC_R_DES_ACTIVE_2, FEC_X_DES_ACTIVE_0,
2200         FEC_X_DES_ACTIVE_1, FEC_X_DES_ACTIVE_2, FEC_MII_DATA, FEC_MII_SPEED,
2201         FEC_R_BOUND, FEC_R_FSTART, FEC_X_WMRK, FEC_X_FSTART, FEC_R_CNTRL,
2202         FEC_MAX_FRM_LEN, FEC_X_CNTRL, FEC_ADDR_LOW, FEC_ADDR_HIGH,
2203         FEC_GRP_HASH_TABLE_HIGH, FEC_GRP_HASH_TABLE_LOW, FEC_R_DES_START_0,
2204         FEC_R_DES_START_1, FEC_R_DES_START_2, FEC_X_DES_START_0,
2205         FEC_X_DES_START_1, FEC_X_DES_START_2, FEC_R_BUFF_SIZE_0,
2206         FEC_R_BUFF_SIZE_1, FEC_R_BUFF_SIZE_2
2207 };
2208 #endif
2209 
2210 static void fec_enet_get_regs(struct net_device *ndev,
2211                               struct ethtool_regs *regs, void *regbuf)
2212 {
2213         struct fec_enet_private *fep = netdev_priv(ndev);
2214         u32 __iomem *theregs = (u32 __iomem *)fep->hwp;
2215         u32 *buf = (u32 *)regbuf;
2216         u32 i, off;
2217 
2218         memset(buf, 0, regs->len);
2219 
2220         for (i = 0; i < ARRAY_SIZE(fec_enet_register_offset); i++) {
2221                 off = fec_enet_register_offset[i] / 4;
2222                 buf[off] = readl(&theregs[off]);
2223         }
2224 }
2225 
2226 static int fec_enet_get_ts_info(struct net_device *ndev,
2227                                 struct ethtool_ts_info *info)
2228 {
2229         struct fec_enet_private *fep = netdev_priv(ndev);
2230 
2231         if (fep->bufdesc_ex) {
2232 
2233                 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
2234                                         SOF_TIMESTAMPING_RX_SOFTWARE |
2235                                         SOF_TIMESTAMPING_SOFTWARE |
2236                                         SOF_TIMESTAMPING_TX_HARDWARE |
2237                                         SOF_TIMESTAMPING_RX_HARDWARE |
2238                                         SOF_TIMESTAMPING_RAW_HARDWARE;
2239                 if (fep->ptp_clock)
2240                         info->phc_index = ptp_clock_index(fep->ptp_clock);
2241                 else
2242                         info->phc_index = -1;
2243 
2244                 info->tx_types = (1 << HWTSTAMP_TX_OFF) |
2245                                  (1 << HWTSTAMP_TX_ON);
2246 
2247                 info->rx_filters = (1 << HWTSTAMP_FILTER_NONE) |
2248                                    (1 << HWTSTAMP_FILTER_ALL);
2249                 return 0;
2250         } else {
2251                 return ethtool_op_get_ts_info(ndev, info);
2252         }
2253 }
2254 
2255 #if !defined(CONFIG_M5272)
2256 
2257 static void fec_enet_get_pauseparam(struct net_device *ndev,
2258                                     struct ethtool_pauseparam *pause)
2259 {
2260         struct fec_enet_private *fep = netdev_priv(ndev);
2261 
2262         pause->autoneg = (fep->pause_flag & FEC_PAUSE_FLAG_AUTONEG) != 0;
2263         pause->tx_pause = (fep->pause_flag & FEC_PAUSE_FLAG_ENABLE) != 0;
2264         pause->rx_pause = pause->tx_pause;
2265 }
2266 
2267 static int fec_enet_set_pauseparam(struct net_device *ndev,
2268                                    struct ethtool_pauseparam *pause)
2269 {
2270         struct fec_enet_private *fep = netdev_priv(ndev);
2271 
2272         if (!fep->phy_dev)
2273                 return -ENODEV;
2274 
2275         if (pause->tx_pause != pause->rx_pause) {
2276                 netdev_info(ndev,
2277                         "hardware only support enable/disable both tx and rx");
2278                 return -EINVAL;
2279         }
2280 
2281         fep->pause_flag = 0;
2282 
2283         /* tx pause must be same as rx pause */
2284         fep->pause_flag |= pause->rx_pause ? FEC_PAUSE_FLAG_ENABLE : 0;
2285         fep->pause_flag |= pause->autoneg ? FEC_PAUSE_FLAG_AUTONEG : 0;
2286 
2287         if (pause->rx_pause || pause->autoneg) {
2288                 fep->phy_dev->supported |= ADVERTISED_Pause;
2289                 fep->phy_dev->advertising |= ADVERTISED_Pause;
2290         } else {
2291                 fep->phy_dev->supported &= ~ADVERTISED_Pause;
2292                 fep->phy_dev->advertising &= ~ADVERTISED_Pause;
2293         }
2294 
2295         if (pause->autoneg) {
2296                 if (netif_running(ndev))
2297                         fec_stop(ndev);
2298                 phy_start_aneg(fep->phy_dev);
2299         }
2300         if (netif_running(ndev)) {
2301                 napi_disable(&fep->napi);
2302                 netif_tx_lock_bh(ndev);
2303                 fec_restart(ndev);
2304                 netif_wake_queue(ndev);
2305                 netif_tx_unlock_bh(ndev);
2306                 napi_enable(&fep->napi);
2307         }
2308 
2309         return 0;
2310 }
2311 
2312 static const struct fec_stat {
2313         char name[ETH_GSTRING_LEN];
2314         u16 offset;
2315 } fec_stats[] = {
2316         /* RMON TX */
2317         { "tx_dropped", RMON_T_DROP },
2318         { "tx_packets", RMON_T_PACKETS },
2319         { "tx_broadcast", RMON_T_BC_PKT },
2320         { "tx_multicast", RMON_T_MC_PKT },
2321         { "tx_crc_errors", RMON_T_CRC_ALIGN },
2322         { "tx_undersize", RMON_T_UNDERSIZE },
2323         { "tx_oversize", RMON_T_OVERSIZE },
2324         { "tx_fragment", RMON_T_FRAG },
2325         { "tx_jabber", RMON_T_JAB },
2326         { "tx_collision", RMON_T_COL },
2327         { "tx_64byte", RMON_T_P64 },
2328         { "tx_65to127byte", RMON_T_P65TO127 },
2329         { "tx_128to255byte", RMON_T_P128TO255 },
2330         { "tx_256to511byte", RMON_T_P256TO511 },
2331         { "tx_512to1023byte", RMON_T_P512TO1023 },
2332         { "tx_1024to2047byte", RMON_T_P1024TO2047 },
2333         { "tx_GTE2048byte", RMON_T_P_GTE2048 },
2334         { "tx_octets", RMON_T_OCTETS },
2335 
2336         /* IEEE TX */
2337         { "IEEE_tx_drop", IEEE_T_DROP },
2338         { "IEEE_tx_frame_ok", IEEE_T_FRAME_OK },
2339         { "IEEE_tx_1col", IEEE_T_1COL },
2340         { "IEEE_tx_mcol", IEEE_T_MCOL },
2341         { "IEEE_tx_def", IEEE_T_DEF },
2342         { "IEEE_tx_lcol", IEEE_T_LCOL },
2343         { "IEEE_tx_excol", IEEE_T_EXCOL },
2344         { "IEEE_tx_macerr", IEEE_T_MACERR },
2345         { "IEEE_tx_cserr", IEEE_T_CSERR },
2346         { "IEEE_tx_sqe", IEEE_T_SQE },
2347         { "IEEE_tx_fdxfc", IEEE_T_FDXFC },
2348         { "IEEE_tx_octets_ok", IEEE_T_OCTETS_OK },
2349 
2350         /* RMON RX */
2351         { "rx_packets", RMON_R_PACKETS },
2352         { "rx_broadcast", RMON_R_BC_PKT },
2353         { "rx_multicast", RMON_R_MC_PKT },
2354         { "rx_crc_errors", RMON_R_CRC_ALIGN },
2355         { "rx_undersize", RMON_R_UNDERSIZE },
2356         { "rx_oversize", RMON_R_OVERSIZE },
2357         { "rx_fragment", RMON_R_FRAG },
2358         { "rx_jabber", RMON_R_JAB },
2359         { "rx_64byte", RMON_R_P64 },
2360         { "rx_65to127byte", RMON_R_P65TO127 },
2361         { "rx_128to255byte", RMON_R_P128TO255 },
2362         { "rx_256to511byte", RMON_R_P256TO511 },
2363         { "rx_512to1023byte", RMON_R_P512TO1023 },
2364         { "rx_1024to2047byte", RMON_R_P1024TO2047 },
2365         { "rx_GTE2048byte", RMON_R_P_GTE2048 },
2366         { "rx_octets", RMON_R_OCTETS },
2367 
2368         /* IEEE RX */
2369         { "IEEE_rx_drop", IEEE_R_DROP },
2370         { "IEEE_rx_frame_ok", IEEE_R_FRAME_OK },
2371         { "IEEE_rx_crc", IEEE_R_CRC },
2372         { "IEEE_rx_align", IEEE_R_ALIGN },
2373         { "IEEE_rx_macerr", IEEE_R_MACERR },
2374         { "IEEE_rx_fdxfc", IEEE_R_FDXFC },
2375         { "IEEE_rx_octets_ok", IEEE_R_OCTETS_OK },
2376 };
2377 
2378 static void fec_enet_get_ethtool_stats(struct net_device *dev,
2379         struct ethtool_stats *stats, u64 *data)
2380 {
2381         struct fec_enet_private *fep = netdev_priv(dev);
2382         int i;
2383 
2384         for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
2385                 data[i] = readl(fep->hwp + fec_stats[i].offset);
2386 }
2387 
2388 static void fec_enet_get_strings(struct net_device *netdev,
2389         u32 stringset, u8 *data)
2390 {
2391         int i;
2392         switch (stringset) {
2393         case ETH_SS_STATS:
2394                 for (i = 0; i < ARRAY_SIZE(fec_stats); i++)
2395                         memcpy(data + i * ETH_GSTRING_LEN,
2396                                 fec_stats[i].name, ETH_GSTRING_LEN);
2397                 break;
2398         }
2399 }
2400 
2401 static int fec_enet_get_sset_count(struct net_device *dev, int sset)
2402 {
2403         switch (sset) {
2404         case ETH_SS_STATS:
2405                 return ARRAY_SIZE(fec_stats);
2406         default:
2407                 return -EOPNOTSUPP;
2408         }
2409 }
2410 #endif /* !defined(CONFIG_M5272) */
2411 
2412 static int fec_enet_nway_reset(struct net_device *dev)
2413 {
2414         struct fec_enet_private *fep = netdev_priv(dev);
2415         struct phy_device *phydev = fep->phy_dev;
2416 
2417         if (!phydev)
2418                 return -ENODEV;
2419 
2420         return genphy_restart_aneg(phydev);
2421 }
2422 
2423 /* ITR clock source is enet system clock (clk_ahb).
2424  * TCTT unit is cycle_ns * 64 cycle
2425  * So, the ICTT value = X us / (cycle_ns * 64)
2426  */
2427 static int fec_enet_us_to_itr_clock(struct net_device *ndev, int us)
2428 {
2429         struct fec_enet_private *fep = netdev_priv(ndev);
2430 
2431         return us * (fep->itr_clk_rate / 64000) / 1000;
2432 }
2433 
2434 /* Set threshold for interrupt coalescing */
2435 static void fec_enet_itr_coal_set(struct net_device *ndev)
2436 {
2437         struct fec_enet_private *fep = netdev_priv(ndev);
2438         int rx_itr, tx_itr;
2439 
2440         if (!(fep->quirks & FEC_QUIRK_HAS_AVB))
2441                 return;
2442 
2443         /* Must be greater than zero to avoid unpredictable behavior */
2444         if (!fep->rx_time_itr || !fep->rx_pkts_itr ||
2445             !fep->tx_time_itr || !fep->tx_pkts_itr)
2446                 return;
2447 
2448         /* Select enet system clock as Interrupt Coalescing
2449          * timer Clock Source
2450          */
2451         rx_itr = FEC_ITR_CLK_SEL;
2452         tx_itr = FEC_ITR_CLK_SEL;
2453 
2454         /* set ICFT and ICTT */
2455         rx_itr |= FEC_ITR_ICFT(fep->rx_pkts_itr);
2456         rx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr));
2457         tx_itr |= FEC_ITR_ICFT(fep->tx_pkts_itr);
2458         tx_itr |= FEC_ITR_ICTT(fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr));
2459 
2460         rx_itr |= FEC_ITR_EN;
2461         tx_itr |= FEC_ITR_EN;
2462 
2463         writel(tx_itr, fep->hwp + FEC_TXIC0);
2464         writel(rx_itr, fep->hwp + FEC_RXIC0);
2465         writel(tx_itr, fep->hwp + FEC_TXIC1);
2466         writel(rx_itr, fep->hwp + FEC_RXIC1);
2467         writel(tx_itr, fep->hwp + FEC_TXIC2);
2468         writel(rx_itr, fep->hwp + FEC_RXIC2);
2469 }
2470 
2471 static int
2472 fec_enet_get_coalesce(struct net_device *ndev, struct ethtool_coalesce *ec)
2473 {
2474         struct fec_enet_private *fep = netdev_priv(ndev);
2475 
2476         if (!(fep->quirks & FEC_QUIRK_HAS_AVB))
2477                 return -EOPNOTSUPP;
2478 
2479         ec->rx_coalesce_usecs = fep->rx_time_itr;
2480         ec->rx_max_coalesced_frames = fep->rx_pkts_itr;
2481 
2482         ec->tx_coalesce_usecs = fep->tx_time_itr;
2483         ec->tx_max_coalesced_frames = fep->tx_pkts_itr;
2484 
2485         return 0;
2486 }
2487 
2488 static int
2489 fec_enet_set_coalesce(struct net_device *ndev, struct ethtool_coalesce *ec)
2490 {
2491         struct fec_enet_private *fep = netdev_priv(ndev);
2492         unsigned int cycle;
2493 
2494         if (!(fep->quirks & FEC_QUIRK_HAS_AVB))
2495                 return -EOPNOTSUPP;
2496 
2497         if (ec->rx_max_coalesced_frames > 255) {
2498                 pr_err("Rx coalesced frames exceed hardware limiation");
2499                 return -EINVAL;
2500         }
2501 
2502         if (ec->tx_max_coalesced_frames > 255) {
2503                 pr_err("Tx coalesced frame exceed hardware limiation");
2504                 return -EINVAL;
2505         }
2506 
2507         cycle = fec_enet_us_to_itr_clock(ndev, fep->rx_time_itr);
2508         if (cycle > 0xFFFF) {
2509                 pr_err("Rx coalesed usec exceeed hardware limiation");
2510                 return -EINVAL;
2511         }
2512 
2513         cycle = fec_enet_us_to_itr_clock(ndev, fep->tx_time_itr);
2514         if (cycle > 0xFFFF) {
2515                 pr_err("Rx coalesed usec exceeed hardware limiation");
2516                 return -EINVAL;
2517         }
2518 
2519         fep->rx_time_itr = ec->rx_coalesce_usecs;
2520         fep->rx_pkts_itr = ec->rx_max_coalesced_frames;
2521 
2522         fep->tx_time_itr = ec->tx_coalesce_usecs;
2523         fep->tx_pkts_itr = ec->tx_max_coalesced_frames;
2524 
2525         fec_enet_itr_coal_set(ndev);
2526 
2527         return 0;
2528 }
2529 
2530 static void fec_enet_itr_coal_init(struct net_device *ndev)
2531 {
2532         struct ethtool_coalesce ec;
2533 
2534         ec.rx_coalesce_usecs = FEC_ITR_ICTT_DEFAULT;
2535         ec.rx_max_coalesced_frames = FEC_ITR_ICFT_DEFAULT;
2536 
2537         ec.tx_coalesce_usecs = FEC_ITR_ICTT_DEFAULT;
2538         ec.tx_max_coalesced_frames = FEC_ITR_ICFT_DEFAULT;
2539 
2540         fec_enet_set_coalesce(ndev, &ec);
2541 }
2542 
2543 static int fec_enet_get_tunable(struct net_device *netdev,
2544                                 const struct ethtool_tunable *tuna,
2545                                 void *data)
2546 {
2547         struct fec_enet_private *fep = netdev_priv(netdev);
2548         int ret = 0;
2549 
2550         switch (tuna->id) {
2551         case ETHTOOL_RX_COPYBREAK:
2552                 *(u32 *)data = fep->rx_copybreak;
2553                 break;
2554         default:
2555                 ret = -EINVAL;
2556                 break;
2557         }
2558 
2559         return ret;
2560 }
2561 
2562 static int fec_enet_set_tunable(struct net_device *netdev,
2563                                 const struct ethtool_tunable *tuna,
2564                                 const void *data)
2565 {
2566         struct fec_enet_private *fep = netdev_priv(netdev);
2567         int ret = 0;
2568 
2569         switch (tuna->id) {
2570         case ETHTOOL_RX_COPYBREAK:
2571                 fep->rx_copybreak = *(u32 *)data;
2572                 break;
2573         default:
2574                 ret = -EINVAL;
2575                 break;
2576         }
2577 
2578         return ret;
2579 }
2580 
2581 static void
2582 fec_enet_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
2583 {
2584         struct fec_enet_private *fep = netdev_priv(ndev);
2585 
2586         if (fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET) {
2587                 wol->supported = WAKE_MAGIC;
2588                 wol->wolopts = fep->wol_flag & FEC_WOL_FLAG_ENABLE ? WAKE_MAGIC : 0;
2589         } else {
2590                 wol->supported = wol->wolopts = 0;
2591         }
2592 }
2593 
2594 static int
2595 fec_enet_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
2596 {
2597         struct fec_enet_private *fep = netdev_priv(ndev);
2598 
2599         if (!(fep->wol_flag & FEC_WOL_HAS_MAGIC_PACKET))
2600                 return -EINVAL;
2601 
2602         if (wol->wolopts & ~WAKE_MAGIC)
2603                 return -EINVAL;
2604 
2605         device_set_wakeup_enable(&ndev->dev, wol->wolopts & WAKE_MAGIC);
2606         if (device_may_wakeup(&ndev->dev)) {
2607                 fep->wol_flag |= FEC_WOL_FLAG_ENABLE;
2608                 if (fep->irq[0] > 0)
2609                         enable_irq_wake(fep->irq[0]);
2610         } else {
2611                 fep->wol_flag &= (~FEC_WOL_FLAG_ENABLE);
2612                 if (fep->irq[0] > 0)
2613                         disable_irq_wake(fep->irq[0]);
2614         }
2615 
2616         return 0;
2617 }
2618 
2619 static const struct ethtool_ops fec_enet_ethtool_ops = {
2620         .get_settings           = fec_enet_get_settings,
2621         .set_settings           = fec_enet_set_settings,
2622         .get_drvinfo            = fec_enet_get_drvinfo,
2623         .get_regs_len           = fec_enet_get_regs_len,
2624         .get_regs               = fec_enet_get_regs,
2625         .nway_reset             = fec_enet_nway_reset,
2626         .get_link               = ethtool_op_get_link,
2627         .get_coalesce           = fec_enet_get_coalesce,
2628         .set_coalesce           = fec_enet_set_coalesce,
2629 #ifndef CONFIG_M5272
2630         .get_pauseparam         = fec_enet_get_pauseparam,
2631         .set_pauseparam         = fec_enet_set_pauseparam,
2632         .get_strings            = fec_enet_get_strings,
2633         .get_ethtool_stats      = fec_enet_get_ethtool_stats,
2634         .get_sset_count         = fec_enet_get_sset_count,
2635 #endif
2636         .get_ts_info            = fec_enet_get_ts_info,
2637         .get_tunable            = fec_enet_get_tunable,
2638         .set_tunable            = fec_enet_set_tunable,
2639         .get_wol                = fec_enet_get_wol,
2640         .set_wol                = fec_enet_set_wol,
2641 };
2642 
2643 static int fec_enet_ioctl(struct net_device *ndev, struct ifreq *rq, int cmd)
2644 {
2645         struct fec_enet_private *fep = netdev_priv(ndev);
2646         struct phy_device *phydev = fep->phy_dev;
2647 
2648         if (!netif_running(ndev))
2649                 return -EINVAL;
2650 
2651         if (!phydev)
2652                 return -ENODEV;
2653 
2654         if (fep->bufdesc_ex) {
2655                 if (cmd == SIOCSHWTSTAMP)
2656                         return fec_ptp_set(ndev, rq);
2657                 if (cmd == SIOCGHWTSTAMP)
2658                         return fec_ptp_get(ndev, rq);
2659         }
2660 
2661         return phy_mii_ioctl(phydev, rq, cmd);
2662 }
2663 
2664 static void fec_enet_free_buffers(struct net_device *ndev)
2665 {
2666         struct fec_enet_private *fep = netdev_priv(ndev);
2667         unsigned int i;
2668         struct sk_buff *skb;
2669         struct bufdesc  *bdp;
2670         struct fec_enet_priv_tx_q *txq;
2671         struct fec_enet_priv_rx_q *rxq;
2672         unsigned int q;
2673 
2674         for (q = 0; q < fep->num_rx_queues; q++) {
2675                 rxq = fep->rx_queue[q];
2676                 bdp = rxq->rx_bd_base;
2677                 for (i = 0; i < rxq->rx_ring_size; i++) {
2678                         skb = rxq->rx_skbuff[i];
2679                         rxq->rx_skbuff[i] = NULL;
2680                         if (skb) {
2681                                 dma_unmap_single(&fep->pdev->dev,
2682                                                  bdp->cbd_bufaddr,
2683                                                  FEC_ENET_RX_FRSIZE - fep->rx_align,
2684                                                  DMA_FROM_DEVICE);
2685                                 dev_kfree_skb(skb);
2686                         }
2687                         bdp = fec_enet_get_nextdesc(bdp, fep, q);
2688                 }
2689         }
2690 
2691         for (q = 0; q < fep->num_tx_queues; q++) {
2692                 txq = fep->tx_queue[q];
2693                 bdp = txq->tx_bd_base;
2694                 for (i = 0; i < txq->tx_ring_size; i++) {
2695                         kfree(txq->tx_bounce[i]);
2696                         txq->tx_bounce[i] = NULL;
2697                         skb = txq->tx_skbuff[i];
2698                         txq->tx_skbuff[i] = NULL;
2699                         dev_kfree_skb(skb);
2700                 }
2701         }
2702 }
2703 
2704 static void fec_enet_free_queue(struct net_device *ndev)
2705 {
2706         struct fec_enet_private *fep = netdev_priv(ndev);
2707         int i;
2708         struct fec_enet_priv_tx_q *txq;
2709 
2710         for (i = 0; i < fep->num_tx_queues; i++)
2711                 if (fep->tx_queue[i] && fep->tx_queue[i]->tso_hdrs) {
2712                         txq = fep->tx_queue[i];
2713                         dma_free_coherent(NULL,
2714                                           txq->tx_ring_size * TSO_HEADER_SIZE,
2715                                           txq->tso_hdrs,
2716                                           txq->tso_hdrs_dma);
2717                 }
2718 
2719         for (i = 0; i < fep->num_rx_queues; i++)
2720                 kfree(fep->rx_queue[i]);
2721         for (i = 0; i < fep->num_tx_queues; i++)
2722                 kfree(fep->tx_queue[i]);
2723 }
2724 
2725 static int fec_enet_alloc_queue(struct net_device *ndev)
2726 {
2727         struct fec_enet_private *fep = netdev_priv(ndev);
2728         int i;
2729         int ret = 0;
2730         struct fec_enet_priv_tx_q *txq;
2731 
2732         for (i = 0; i < fep->num_tx_queues; i++) {
2733                 txq = kzalloc(sizeof(*txq), GFP_KERNEL);
2734                 if (!txq) {
2735                         ret = -ENOMEM;
2736                         goto alloc_failed;
2737                 }
2738 
2739                 fep->tx_queue[i] = txq;
2740                 txq->tx_ring_size = TX_RING_SIZE;
2741                 fep->total_tx_ring_size += fep->tx_queue[i]->tx_ring_size;
2742 
2743                 txq->tx_stop_threshold = FEC_MAX_SKB_DESCS;
2744                 txq->tx_wake_threshold =
2745                                 (txq->tx_ring_size - txq->tx_stop_threshold) / 2;
2746 
2747                 txq->tso_hdrs = dma_alloc_coherent(NULL,
2748                                         txq->tx_ring_size * TSO_HEADER_SIZE,
2749                                         &txq->tso_hdrs_dma,
2750                                         GFP_KERNEL);
2751                 if (!txq->tso_hdrs) {
2752                         ret = -ENOMEM;
2753                         goto alloc_failed;
2754                 }
2755         }
2756 
2757         for (i = 0; i < fep->num_rx_queues; i++) {
2758                 fep->rx_queue[i] = kzalloc(sizeof(*fep->rx_queue[i]),
2759                                            GFP_KERNEL);
2760                 if (!fep->rx_queue[i]) {
2761                         ret = -ENOMEM;
2762                         goto alloc_failed;
2763                 }
2764 
2765                 fep->rx_queue[i]->rx_ring_size = RX_RING_SIZE;
2766                 fep->total_rx_ring_size += fep->rx_queue[i]->rx_ring_size;
2767         }
2768         return ret;
2769 
2770 alloc_failed:
2771         fec_enet_free_queue(ndev);
2772         return ret;
2773 }
2774 
2775 static int
2776 fec_enet_alloc_rxq_buffers(struct net_device *ndev, unsigned int queue)
2777 {
2778         struct fec_enet_private *fep = netdev_priv(ndev);
2779         unsigned int i;
2780         struct sk_buff *skb;
2781         struct bufdesc  *bdp;
2782         struct fec_enet_priv_rx_q *rxq;
2783 
2784         rxq = fep->rx_queue[queue];
2785         bdp = rxq->rx_bd_base;
2786         for (i = 0; i < rxq->rx_ring_size; i++) {
2787                 skb = netdev_alloc_skb(ndev, FEC_ENET_RX_FRSIZE);
2788                 if (!skb)
2789                         goto err_alloc;
2790 
2791                 if (fec_enet_new_rxbdp(ndev, bdp, skb)) {
2792                         dev_kfree_skb(skb);
2793                         goto err_alloc;
2794                 }
2795 
2796                 rxq->rx_skbuff[i] = skb;
2797                 bdp->cbd_sc = BD_ENET_RX_EMPTY;
2798 
2799                 if (fep->bufdesc_ex) {
2800                         struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
2801                         ebdp->cbd_esc = BD_ENET_RX_INT;
2802                 }
2803 
2804                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
2805         }
2806 
2807         /* Set the last buffer to wrap. */
2808         bdp = fec_enet_get_prevdesc(bdp, fep, queue);
2809         bdp->cbd_sc |= BD_SC_WRAP;
2810         return 0;
2811 
2812  err_alloc:
2813         fec_enet_free_buffers(ndev);
2814         return -ENOMEM;
2815 }
2816 
2817 static int
2818 fec_enet_alloc_txq_buffers(struct net_device *ndev, unsigned int queue)
2819 {
2820         struct fec_enet_private *fep = netdev_priv(ndev);
2821         unsigned int i;
2822         struct bufdesc  *bdp;
2823         struct fec_enet_priv_tx_q *txq;
2824 
2825         txq = fep->tx_queue[queue];
2826         bdp = txq->tx_bd_base;
2827         for (i = 0; i < txq->tx_ring_size; i++) {
2828                 txq->tx_bounce[i] = kmalloc(FEC_ENET_TX_FRSIZE, GFP_KERNEL);
2829                 if (!txq->tx_bounce[i])
2830                         goto err_alloc;
2831 
2832                 bdp->cbd_sc = 0;
2833                 bdp->cbd_bufaddr = 0;
2834 
2835                 if (fep->bufdesc_ex) {
2836                         struct bufdesc_ex *ebdp = (struct bufdesc_ex *)bdp;
2837                         ebdp->cbd_esc = BD_ENET_TX_INT;
2838                 }
2839 
2840                 bdp = fec_enet_get_nextdesc(bdp, fep, queue);
2841         }
2842 
2843         /* Set the last buffer to wrap. */
2844         bdp = fec_enet_get_prevdesc(bdp, fep, queue);
2845         bdp->cbd_sc |= BD_SC_WRAP;
2846 
2847         return 0;
2848 
2849  err_alloc:
2850         fec_enet_free_buffers(ndev);
2851         return -ENOMEM;
2852 }
2853 
2854 static int fec_enet_alloc_buffers(struct net_device *ndev)
2855 {
2856         struct fec_enet_private *fep = netdev_priv(ndev);
2857         unsigned int i;
2858 
2859         for (i = 0; i < fep->num_rx_queues; i++)
2860                 if (fec_enet_alloc_rxq_buffers(ndev, i))
2861                         return -ENOMEM;
2862 
2863         for (i = 0; i < fep->num_tx_queues; i++)
2864                 if (fec_enet_alloc_txq_buffers(ndev, i))
2865                         return -ENOMEM;
2866         return 0;
2867 }
2868 
2869 static int
2870 fec_enet_open(struct net_device *ndev)
2871 {
2872         struct fec_enet_private *fep = netdev_priv(ndev);
2873         int ret;
2874 
2875         ret = pm_runtime_get_sync(&fep->pdev->dev);
2876         if (ret < 0)
2877                 return ret;
2878 
2879         pinctrl_pm_select_default_state(&fep->pdev->dev);
2880         ret = fec_enet_clk_enable(ndev, true);
2881         if (ret)
2882                 goto clk_enable;
2883 
2884         /* I should reset the ring buffers here, but I don't yet know
2885          * a simple way to do that.
2886          */
2887 
2888         ret = fec_enet_alloc_buffers(ndev);
2889         if (ret)
2890                 goto err_enet_alloc;
2891 
2892         /* Init MAC prior to mii bus probe */
2893         fec_restart(ndev);
2894 
2895         /* Probe and connect to PHY when open the interface */
2896         ret = fec_enet_mii_probe(ndev);
2897         if (ret)
2898                 goto err_enet_mii_probe;
2899 
2900         napi_enable(&fep->napi);
2901         phy_start(fep->phy_dev);
2902         netif_tx_start_all_queues(ndev);
2903 
2904         device_set_wakeup_enable(&ndev->dev, fep->wol_flag &
2905                                  FEC_WOL_FLAG_ENABLE);
2906 
2907         return 0;
2908 
2909 err_enet_mii_probe:
2910         fec_enet_free_buffers(ndev);
2911 err_enet_alloc:
2912         fec_enet_clk_enable(ndev, false);
2913 clk_enable:
2914         pm_runtime_mark_last_busy(&fep->pdev->dev);
2915         pm_runtime_put_autosuspend(&fep->pdev->dev);
2916         pinctrl_pm_select_sleep_state(&fep->pdev->dev);
2917         return ret;
2918 }
2919 
2920 static int
2921 fec_enet_close(struct net_device *ndev)
2922 {
2923         struct fec_enet_private *fep = netdev_priv(ndev);
2924 
2925         phy_stop(fep->phy_dev);
2926 
2927         if (netif_device_present(ndev)) {
2928                 napi_disable(&fep->napi);
2929                 netif_tx_disable(ndev);
2930                 fec_stop(ndev);
2931         }
2932 
2933         phy_disconnect(fep->phy_dev);
2934         fep->phy_dev = NULL;
2935 
2936         fec_enet_clk_enable(ndev, false);
2937         pinctrl_pm_select_sleep_state(&fep->pdev->dev);
2938         pm_runtime_mark_last_busy(&fep->pdev->dev);
2939         pm_runtime_put_autosuspend(&fep->pdev->dev);
2940 
2941         fec_enet_free_buffers(ndev);
2942 
2943         return 0;
2944 }
2945 
2946 /* Set or clear the multicast filter for this adaptor.
2947  * Skeleton taken from sunlance driver.
2948  * The CPM Ethernet implementation allows Multicast as well as individual
2949  * MAC address filtering.  Some of the drivers check to make sure it is
2950  * a group multicast address, and discard those that are not.  I guess I
2951  * will do the same for now, but just remove the test if you want
2952  * individual filtering as well (do the upper net layers want or support
2953  * this kind of feature?).
2954  */
2955 
2956 #define HASH_BITS       6               /* #bits in hash */
2957 #define CRC32_POLY      0xEDB88320
2958 
2959 static void set_multicast_list(struct net_device *ndev)
2960 {
2961         struct fec_enet_private *fep = netdev_priv(ndev);
2962         struct netdev_hw_addr *ha;
2963         unsigned int i, bit, data, crc, tmp;
2964         unsigned char hash;
2965 
2966         if (ndev->flags & IFF_PROMISC) {
2967                 tmp = readl(fep->hwp + FEC_R_CNTRL);
2968                 tmp |= 0x8;
2969                 writel(tmp, fep->hwp + FEC_R_CNTRL);
2970                 return;
2971         }
2972 
2973         tmp = readl(fep->hwp + FEC_R_CNTRL);
2974         tmp &= ~0x8;
2975         writel(tmp, fep->hwp + FEC_R_CNTRL);
2976 
2977         if (ndev->flags & IFF_ALLMULTI) {
2978                 /* Catch all multicast addresses, so set the
2979                  * filter to all 1's
2980                  */
2981                 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2982                 writel(0xffffffff, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2983 
2984                 return;
2985         }
2986 
2987         /* Clear filter and add the addresses in hash register
2988          */
2989         writel(0, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
2990         writel(0, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
2991 
2992         netdev_for_each_mc_addr(ha, ndev) {
2993                 /* calculate crc32 value of mac address */
2994                 crc = 0xffffffff;
2995 
2996                 for (i = 0; i < ndev->addr_len; i++) {
2997                         data = ha->addr[i];
2998                         for (bit = 0; bit < 8; bit++, data >>= 1) {
2999                                 crc = (crc >> 1) ^
3000                                 (((crc ^ data) & 1) ? CRC32_POLY : 0);
3001                         }
3002                 }
3003 
3004                 /* only upper 6 bits (HASH_BITS) are used
3005                  * which point to specific bit in he hash registers
3006                  */
3007                 hash = (crc >> (32 - HASH_BITS)) & 0x3f;
3008 
3009                 if (hash > 31) {
3010                         tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
3011                         tmp |= 1 << (hash - 32);
3012                         writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_HIGH);
3013                 } else {
3014                         tmp = readl(fep->hwp + FEC_GRP_HASH_TABLE_LOW);
3015                         tmp |= 1 << hash;
3016                         writel(tmp, fep->hwp + FEC_GRP_HASH_TABLE_LOW);
3017                 }
3018         }
3019 }
3020 
3021 /* Set a MAC change in hardware. */
3022 static int
3023 fec_set_mac_address(struct net_device *ndev, void *p)
3024 {
3025         struct fec_enet_private *fep = netdev_priv(ndev);
3026         struct sockaddr *addr = p;
3027 
3028         if (addr) {
3029                 if (!is_valid_ether_addr(addr->sa_data))
3030                         return -EADDRNOTAVAIL;
3031                 memcpy(ndev->dev_addr, addr->sa_data, ndev->addr_len);
3032         }
3033 
3034         /* Add netif status check here to avoid system hang in below case:
3035          * ifconfig ethx down; ifconfig ethx hw ether xx:xx:xx:xx:xx:xx;
3036          * After ethx down, fec all clocks are gated off and then register
3037          * access causes system hang.
3038          */
3039         if (!netif_running(ndev))
3040                 return 0;
3041 
3042         writel(ndev->dev_addr[3] | (ndev->dev_addr[2] << 8) |
3043                 (ndev->dev_addr[1] << 16) | (ndev->dev_addr[0] << 24),
3044                 fep->hwp + FEC_ADDR_LOW);
3045         writel((ndev->dev_addr[5] << 16) | (ndev->dev_addr[4] << 24),
3046                 fep->hwp + FEC_ADDR_HIGH);
3047         return 0;
3048 }
3049 
3050 #ifdef CONFIG_NET_POLL_CONTROLLER
3051 /**
3052  * fec_poll_controller - FEC Poll controller function
3053  * @dev: The FEC network adapter
3054  *
3055  * Polled functionality used by netconsole and others in non interrupt mode
3056  *
3057  */
3058 static void fec_poll_controller(struct net_device *dev)
3059 {
3060         int i;
3061         struct fec_enet_private *fep = netdev_priv(dev);
3062 
3063         for (i = 0; i < FEC_IRQ_NUM; i++) {
3064                 if (fep->irq[i] > 0) {
3065                         disable_irq(fep->irq[i]);
3066                         fec_enet_interrupt(fep->irq[i], dev);
3067                         enable_irq(fep->irq[i]);
3068                 }
3069         }
3070 }
3071 #endif
3072 
3073 static inline void fec_enet_set_netdev_features(struct net_device *netdev,
3074         netdev_features_t features)
3075 {
3076         struct fec_enet_private *fep = netdev_priv(netdev);
3077         netdev_features_t changed = features ^ netdev->features;
3078 
3079         netdev->features = features;
3080 
3081         /* Receive checksum has been changed */
3082         if (changed & NETIF_F_RXCSUM) {
3083                 if (features & NETIF_F_RXCSUM)
3084                         fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
3085                 else
3086                         fep->csum_flags &= ~FLAG_RX_CSUM_ENABLED;
3087         }
3088 }
3089 
3090 static int fec_set_features(struct net_device *netdev,
3091         netdev_features_t features)
3092 {
3093         struct fec_enet_private *fep = netdev_priv(netdev);
3094         netdev_features_t changed = features ^ netdev->features;
3095 
3096         if (netif_running(netdev) && changed & NETIF_F_RXCSUM) {
3097                 napi_disable(&fep->napi);
3098                 netif_tx_lock_bh(netdev);
3099                 fec_stop(netdev);
3100                 fec_enet_set_netdev_features(netdev, features);
3101                 fec_restart(netdev);
3102                 netif_tx_wake_all_queues(netdev);
3103                 netif_tx_unlock_bh(netdev);
3104                 napi_enable(&fep->napi);
3105         } else {
3106                 fec_enet_set_netdev_features(netdev, features);
3107         }
3108 
3109         return 0;
3110 }
3111 
3112 static const struct net_device_ops fec_netdev_ops = {
3113         .ndo_open               = fec_enet_open,
3114         .ndo_stop               = fec_enet_close,
3115         .ndo_start_xmit         = fec_enet_start_xmit,
3116         .ndo_set_rx_mode        = set_multicast_list,
3117         .ndo_change_mtu         = eth_change_mtu,
3118         .ndo_validate_addr      = eth_validate_addr,
3119         .ndo_tx_timeout         = fec_timeout,
3120         .ndo_set_mac_address    = fec_set_mac_address,
3121         .ndo_do_ioctl           = fec_enet_ioctl,
3122 #ifdef CONFIG_NET_POLL_CONTROLLER
3123         .ndo_poll_controller    = fec_poll_controller,
3124 #endif
3125         .ndo_set_features       = fec_set_features,
3126 };
3127 
3128  /*
3129   * XXX:  We need to clean up on failure exits here.
3130   *
3131   */
3132 static int fec_enet_init(struct net_device *ndev)
3133 {
3134         struct fec_enet_private *fep = netdev_priv(ndev);
3135         struct fec_enet_priv_tx_q *txq;
3136         struct fec_enet_priv_rx_q *rxq;
3137         struct bufdesc *cbd_base;
3138         dma_addr_t bd_dma;
3139         int bd_size;
3140         unsigned int i;
3141 
3142 #if defined(CONFIG_ARM)
3143         fep->rx_align = 0xf;
3144         fep->tx_align = 0xf;
3145 #else
3146         fep->rx_align = 0x3;
3147         fep->tx_align = 0x3;
3148 #endif
3149 
3150         fec_enet_alloc_queue(ndev);
3151 
3152         if (fep->bufdesc_ex)
3153                 fep->bufdesc_size = sizeof(struct bufdesc_ex);
3154         else
3155                 fep->bufdesc_size = sizeof(struct bufdesc);
3156         bd_size = (fep->total_tx_ring_size + fep->total_rx_ring_size) *
3157                         fep->bufdesc_size;
3158 
3159         /* Allocate memory for buffer descriptors. */
3160         cbd_base = dmam_alloc_coherent(&fep->pdev->dev, bd_size, &bd_dma,
3161                                        GFP_KERNEL);
3162         if (!cbd_base) {
3163                 return -ENOMEM;
3164         }
3165 
3166         memset(cbd_base, 0, bd_size);
3167 
3168         /* Get the Ethernet address */
3169         fec_get_mac(ndev);
3170         /* make sure MAC we just acquired is programmed into the hw */
3171         fec_set_mac_address(ndev, NULL);
3172 
3173         /* Set receive and transmit descriptor base. */
3174         for (i = 0; i < fep->num_rx_queues; i++) {
3175                 rxq = fep->rx_queue[i];
3176                 rxq->index = i;
3177                 rxq->rx_bd_base = (struct bufdesc *)cbd_base;
3178                 rxq->bd_dma = bd_dma;
3179                 if (fep->bufdesc_ex) {
3180                         bd_dma += sizeof(struct bufdesc_ex) * rxq->rx_ring_size;
3181                         cbd_base = (struct bufdesc *)
3182                                 (((struct bufdesc_ex *)cbd_base) + rxq->rx_ring_size);
3183                 } else {
3184                         bd_dma += sizeof(struct bufdesc) * rxq->rx_ring_size;
3185                         cbd_base += rxq->rx_ring_size;
3186                 }
3187         }
3188 
3189         for (i = 0; i < fep->num_tx_queues; i++) {
3190                 txq = fep->tx_queue[i];
3191                 txq->index = i;
3192                 txq->tx_bd_base = (struct bufdesc *)cbd_base;
3193                 txq->bd_dma = bd_dma;
3194                 if (fep->bufdesc_ex) {
3195                         bd_dma += sizeof(struct bufdesc_ex) * txq->tx_ring_size;
3196                         cbd_base = (struct bufdesc *)
3197                          (((struct bufdesc_ex *)cbd_base) + txq->tx_ring_size);
3198                 } else {
3199                         bd_dma += sizeof(struct bufdesc) * txq->tx_ring_size;
3200                         cbd_base += txq->tx_ring_size;
3201                 }
3202         }
3203 
3204 
3205         /* The FEC Ethernet specific entries in the device structure */
3206         ndev->watchdog_timeo = TX_TIMEOUT;
3207         ndev->netdev_ops = &fec_netdev_ops;
3208         ndev->ethtool_ops = &fec_enet_ethtool_ops;
3209 
3210         writel(FEC_RX_DISABLED_IMASK, fep->hwp + FEC_IMASK);
3211         netif_napi_add(ndev, &fep->napi, fec_enet_rx_napi, NAPI_POLL_WEIGHT);
3212 
3213         if (fep->quirks & FEC_QUIRK_HAS_VLAN)
3214                 /* enable hw VLAN support */
3215                 ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
3216 
3217         if (fep->quirks & FEC_QUIRK_HAS_CSUM) {
3218                 ndev->gso_max_segs = FEC_MAX_TSO_SEGS;
3219 
3220                 /* enable hw accelerator */
3221                 ndev->features |= (NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM
3222                                 | NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_TSO);
3223                 fep->csum_flags |= FLAG_RX_CSUM_ENABLED;
3224         }
3225 
3226         if (fep->quirks & FEC_QUIRK_HAS_AVB) {
3227                 fep->tx_align = 0;
3228                 fep->rx_align = 0x3f;
3229         }
3230 
3231         ndev->hw_features = ndev->features;
3232 
3233         fec_restart(ndev);
3234 
3235         return 0;
3236 }
3237 
3238 #ifdef CONFIG_OF
3239 static void fec_reset_phy(struct platform_device *pdev)
3240 {
3241         int err, phy_reset;
3242         int msec = 1;
3243         struct device_node *np = pdev->dev.of_node;
3244 
3245         if (!np)
3246                 return;
3247 
3248         of_property_read_u32(np, "phy-reset-duration", &msec);
3249         /* A sane reset duration should not be longer than 1s */
3250         if (msec > 1000)
3251                 msec = 1;
3252 
3253         phy_reset = of_get_named_gpio(np, "phy-reset-gpios", 0);
3254         if (!gpio_is_valid(phy_reset))
3255                 return;
3256 
3257         err = devm_gpio_request_one(&pdev->dev, phy_reset,
3258                                     GPIOF_OUT_INIT_LOW, "phy-reset");
3259         if (err) {
3260                 dev_err(&pdev->dev, "failed to get phy-reset-gpios: %d\n", err);
3261                 return;
3262         }
3263         msleep(msec);
3264         gpio_set_value_cansleep(phy_reset, 1);
3265 }
3266 #else /* CONFIG_OF */
3267 static void fec_reset_phy(struct platform_device *pdev)
3268 {
3269         /*
3270          * In case of platform probe, the reset has been done
3271          * by machine code.
3272          */
3273 }
3274 #endif /* CONFIG_OF */
3275 
3276 static void
3277 fec_enet_get_queue_num(struct platform_device *pdev, int *num_tx, int *num_rx)
3278 {
3279         struct device_node *np = pdev->dev.of_node;
3280         int err;
3281 
3282         *num_tx = *num_rx = 1;
3283 
3284         if (!np || !of_device_is_available(np))
3285                 return;
3286 
3287         /* parse the num of tx and rx queues */
3288         err = of_property_read_u32(np, "fsl,num-tx-queues", num_tx);
3289         if (err)
3290                 *num_tx = 1;
3291 
3292         err = of_property_read_u32(np, "fsl,num-rx-queues", num_rx);
3293         if (err)
3294                 *num_rx = 1;
3295 
3296         if (*num_tx < 1 || *num_tx > FEC_ENET_MAX_TX_QS) {
3297                 dev_warn(&pdev->dev, "Invalid num_tx(=%d), fall back to 1\n",
3298                          *num_tx);
3299                 *num_tx = 1;
3300                 return;
3301         }
3302 
3303         if (*num_rx < 1 || *num_rx > FEC_ENET_MAX_RX_QS) {
3304                 dev_warn(&pdev->dev, "Invalid num_rx(=%d), fall back to 1\n",
3305                          *num_rx);
3306                 *num_rx = 1;
3307                 return;
3308         }
3309 
3310 }
3311 
3312 static int
3313 fec_probe(struct platform_device *pdev)
3314 {
3315         struct fec_enet_private *fep;
3316         struct fec_platform_data *pdata;
3317         struct net_device *ndev;
3318         int i, irq, ret = 0;
3319         struct resource *r;
3320         const struct of_device_id *of_id;
3321         static int dev_id;
3322         struct device_node *np = pdev->dev.of_node, *phy_node;
3323         int num_tx_qs;
3324         int num_rx_qs;
3325 
3326         fec_enet_get_queue_num(pdev, &num_tx_qs, &num_rx_qs);
3327 
3328         /* Init network device */
3329         ndev = alloc_etherdev_mqs(sizeof(struct fec_enet_private),
3330                                   num_tx_qs, num_rx_qs);
3331         if (!ndev)
3332                 return -ENOMEM;
3333 
3334         SET_NETDEV_DEV(ndev, &pdev->dev);
3335 
3336         /* setup board info structure */
3337         fep = netdev_priv(ndev);
3338 
3339         of_id = of_match_device(fec_dt_ids, &pdev->dev);
3340         if (of_id)
3341                 pdev->id_entry = of_id->data;
3342         fep->quirks = pdev->id_entry->driver_data;
3343 
3344         fep->netdev = ndev;
3345         fep->num_rx_queues = num_rx_qs;
3346         fep->num_tx_queues = num_tx_qs;
3347 
3348 #if !defined(CONFIG_M5272)
3349         /* default enable pause frame auto negotiation */
3350         if (fep->quirks & FEC_QUIRK_HAS_GBIT)
3351                 fep->pause_flag |= FEC_PAUSE_FLAG_AUTONEG;
3352 #endif
3353 
3354         /* Select default pin state */
3355         pinctrl_pm_select_default_state(&pdev->dev);
3356 
3357         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
3358         fep->hwp = devm_ioremap_resource(&pdev->dev, r);
3359         if (IS_ERR(fep->hwp)) {
3360                 ret = PTR_ERR(fep->hwp);
3361                 goto failed_ioremap;
3362         }
3363 
3364         fep->pdev = pdev;
3365         fep->dev_id = dev_id++;
3366 
3367         platform_set_drvdata(pdev, ndev);
3368 
3369         if (of_get_property(np, "fsl,magic-packet", NULL))
3370                 fep->wol_flag |= FEC_WOL_HAS_MAGIC_PACKET;
3371 
3372         phy_node = of_parse_phandle(np, "phy-handle", 0);
3373         if (!phy_node && of_phy_is_fixed_link(np)) {
3374                 ret = of_phy_register_fixed_link(np);
3375                 if (ret < 0) {
3376                         dev_err(&pdev->dev,
3377                                 "broken fixed-link specification\n");
3378                         goto failed_phy;
3379                 }
3380                 phy_node = of_node_get(np);
3381         }
3382         fep->phy_node = phy_node;
3383 
3384         ret = of_get_phy_mode(pdev->dev.of_node);
3385         if (ret < 0) {
3386                 pdata = dev_get_platdata(&pdev->dev);
3387                 if (pdata)
3388                         fep->phy_interface = pdata->phy;
3389                 else
3390                         fep->phy_interface = PHY_INTERFACE_MODE_MII;
3391         } else {
3392                 fep->phy_interface = ret;
3393         }
3394 
3395         fep->clk_ipg = devm_clk_get(&pdev->dev, "ipg");
3396         if (IS_ERR(fep->clk_ipg)) {
3397                 ret = PTR_ERR(fep->clk_ipg);
3398                 goto failed_clk;
3399         }
3400 
3401         fep->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
3402         if (IS_ERR(fep->clk_ahb)) {
3403                 ret = PTR_ERR(fep->clk_ahb);
3404                 goto failed_clk;
3405         }
3406 
3407         fep->itr_clk_rate = clk_get_rate(fep->clk_ahb);
3408 
3409         /* enet_out is optional, depends on board */
3410         fep->clk_enet_out = devm_clk_get(&pdev->dev, "enet_out");
3411         if (IS_ERR(fep->clk_enet_out))
3412                 fep->clk_enet_out = NULL;
3413 
3414         fep->ptp_clk_on = false;
3415         mutex_init(&fep->ptp_clk_mutex);
3416 
3417         /* clk_ref is optional, depends on board */
3418         fep->clk_ref = devm_clk_get(&pdev->dev, "enet_clk_ref");
3419         if (IS_ERR(fep->clk_ref))
3420                 fep->clk_ref = NULL;
3421 
3422         fep->bufdesc_ex = fep->quirks & FEC_QUIRK_HAS_BUFDESC_EX;
3423         fep->clk_ptp = devm_clk_get(&pdev->dev, "ptp");
3424         if (IS_ERR(fep->clk_ptp)) {
3425                 fep->clk_ptp = NULL;
3426                 fep->bufdesc_ex = false;
3427         }
3428 
3429         ret = fec_enet_clk_enable(ndev, true);
3430         if (ret)
3431                 goto failed_clk;
3432 
3433         ret = clk_prepare_enable(fep->clk_ipg);
3434         if (ret)
3435                 goto failed_clk_ipg;
3436 
3437         fep->reg_phy = devm_regulator_get(&pdev->dev, "phy");
3438         if (!IS_ERR(fep->reg_phy)) {
3439                 ret = regulator_enable(fep->reg_phy);
3440                 if (ret) {
3441                         dev_err(&pdev->dev,
3442                                 "Failed to enable phy regulator: %d\n", ret);
3443                         goto failed_regulator;
3444                 }
3445         } else {
3446                 fep->reg_phy = NULL;
3447         }
3448 
3449         pm_runtime_set_autosuspend_delay(&pdev->dev, FEC_MDIO_PM_TIMEOUT);
3450         pm_runtime_use_autosuspend(&pdev->dev);
3451         pm_runtime_get_noresume(&pdev->dev);
3452         pm_runtime_set_active(&pdev->dev);
3453         pm_runtime_enable(&pdev->dev);
3454 
3455         fec_reset_phy(pdev);
3456 
3457         if (fep->bufdesc_ex)
3458                 fec_ptp_init(pdev);
3459 
3460         ret = fec_enet_init(ndev);
3461         if (ret)
3462                 goto failed_init;
3463 
3464         for (i = 0; i < FEC_IRQ_NUM; i++) {
3465                 irq = platform_get_irq(pdev, i);
3466                 if (irq < 0) {
3467                         if (i)
3468                                 break;
3469                         ret = irq;
3470                         goto failed_irq;
3471                 }
3472                 ret = devm_request_irq(&pdev->dev, irq, fec_enet_interrupt,
3473                                        0, pdev->name, ndev);
3474                 if (ret)
3475                         goto failed_irq;
3476 
3477                 fep->irq[i] = irq;
3478         }
3479 
3480         init_completion(&fep->mdio_done);
3481         ret = fec_enet_mii_init(pdev);
3482         if (ret)
3483                 goto failed_mii_init;
3484 
3485         /* Carrier starts down, phylib will bring it up */
3486         netif_carrier_off(ndev);
3487         fec_enet_clk_enable(ndev, false);
3488         pinctrl_pm_select_sleep_state(&pdev->dev);
3489 
3490         ret = register_netdev(ndev);
3491         if (ret)
3492                 goto failed_register;
3493 
3494         device_init_wakeup(&ndev->dev, fep->wol_flag &
3495                            FEC_WOL_HAS_MAGIC_PACKET);
3496 
3497         if (fep->bufdesc_ex && fep->ptp_clock)
3498                 netdev_info(ndev, "registered PHC device %d\n", fep->dev_id);
3499 
3500         fep->rx_copybreak = COPYBREAK_DEFAULT;
3501         INIT_WORK(&fep->tx_timeout_work, fec_enet_timeout_work);
3502 
3503         pm_runtime_mark_last_busy(&pdev->dev);
3504         pm_runtime_put_autosuspend(&pdev->dev);
3505 
3506         return 0;
3507 
3508 failed_register:
3509         fec_enet_mii_remove(fep);
3510 failed_mii_init:
3511 failed_irq:
3512 failed_init:
3513         fec_ptp_stop(pdev);
3514         if (fep->reg_phy)
3515                 regulator_disable(fep->reg_phy);
3516 failed_regulator:
3517         clk_disable_unprepare(fep->clk_ipg);
3518 failed_clk_ipg:
3519         fec_enet_clk_enable(ndev, false);
3520 failed_clk:
3521 failed_phy:
3522         of_node_put(phy_node);
3523 failed_ioremap:
3524         free_netdev(ndev);
3525 
3526         return ret;
3527 }
3528 
3529 static int
3530 fec_drv_remove(struct platform_device *pdev)
3531 {
3532         struct net_device *ndev = platform_get_drvdata(pdev);
3533         struct fec_enet_private *fep = netdev_priv(ndev);
3534 
3535         cancel_work_sync(&fep->tx_timeout_work);
3536         fec_ptp_stop(pdev);
3537         unregister_netdev(ndev);
3538         fec_enet_mii_remove(fep);
3539         if (fep->reg_phy)
3540                 regulator_disable(fep->reg_phy);
3541         of_node_put(fep->phy_node);
3542         free_netdev(ndev);
3543 
3544         return 0;
3545 }
3546 
3547 static int __maybe_unused fec_suspend(struct device *dev)
3548 {
3549         struct net_device *ndev = dev_get_drvdata(dev);
3550         struct fec_enet_private *fep = netdev_priv(ndev);
3551 
3552         rtnl_lock();
3553         if (netif_running(ndev)) {
3554                 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE)
3555                         fep->wol_flag |= FEC_WOL_FLAG_SLEEP_ON;
3556                 phy_stop(fep->phy_dev);
3557                 napi_disable(&fep->napi);
3558                 netif_tx_lock_bh(ndev);
3559                 netif_device_detach(ndev);
3560                 netif_tx_unlock_bh(ndev);
3561                 fec_stop(ndev);
3562                 fec_enet_clk_enable(ndev, false);
3563                 if (!(fep->wol_flag & FEC_WOL_FLAG_ENABLE))
3564                         pinctrl_pm_select_sleep_state(&fep->pdev->dev);
3565         }
3566         rtnl_unlock();
3567 
3568         if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE))
3569                 regulator_disable(fep->reg_phy);
3570 
3571         /* SOC supply clock to phy, when clock is disabled, phy link down
3572          * SOC control phy regulator, when regulator is disabled, phy link down
3573          */
3574         if (fep->clk_enet_out || fep->reg_phy)
3575                 fep->link = 0;
3576 
3577         return 0;
3578 }
3579 
3580 static int __maybe_unused fec_resume(struct device *dev)
3581 {
3582         struct net_device *ndev = dev_get_drvdata(dev);
3583         struct fec_enet_private *fep = netdev_priv(ndev);
3584         struct fec_platform_data *pdata = fep->pdev->dev.platform_data;
3585         int ret;
3586         int val;
3587 
3588         if (fep->reg_phy && !(fep->wol_flag & FEC_WOL_FLAG_ENABLE)) {
3589                 ret = regulator_enable(fep->reg_phy);
3590                 if (ret)
3591                         return ret;
3592         }
3593 
3594         rtnl_lock();
3595         if (netif_running(ndev)) {
3596                 ret = fec_enet_clk_enable(ndev, true);
3597                 if (ret) {
3598                         rtnl_unlock();
3599                         goto failed_clk;
3600                 }
3601                 if (fep->wol_flag & FEC_WOL_FLAG_ENABLE) {
3602                         if (pdata && pdata->sleep_mode_enable)
3603                                 pdata->sleep_mode_enable(false);
3604                         val = readl(fep->hwp + FEC_ECNTRL);
3605                         val &= ~(FEC_ECR_MAGICEN | FEC_ECR_SLEEP);
3606                         writel(val, fep->hwp + FEC_ECNTRL);
3607                         fep->wol_flag &= ~FEC_WOL_FLAG_SLEEP_ON;
3608                 } else {
3609                         pinctrl_pm_select_default_state(&fep->pdev->dev);
3610                 }
3611                 fec_restart(ndev);
3612                 netif_tx_lock_bh(ndev);
3613                 netif_device_attach(ndev);
3614                 netif_tx_unlock_bh(ndev);
3615                 napi_enable(&fep->napi);
3616                 phy_start(fep->phy_dev);
3617         }
3618         rtnl_unlock();
3619 
3620         return 0;
3621 
3622 failed_clk:
3623         if (fep->reg_phy)
3624                 regulator_disable(fep->reg_phy);
3625         return ret;
3626 }
3627 
3628 static int __maybe_unused fec_runtime_suspend(struct device *dev)
3629 {
3630         struct net_device *ndev = dev_get_drvdata(dev);
3631         struct fec_enet_private *fep = netdev_priv(ndev);
3632 
3633         clk_disable_unprepare(fep->clk_ipg);
3634 
3635         return 0;
3636 }
3637 
3638 static int __maybe_unused fec_runtime_resume(struct device *dev)
3639 {
3640         struct net_device *ndev = dev_get_drvdata(dev);
3641         struct fec_enet_private *fep = netdev_priv(ndev);
3642 
3643         return clk_prepare_enable(fep->clk_ipg);
3644 }
3645 
3646 static const struct dev_pm_ops fec_pm_ops = {
3647         SET_SYSTEM_SLEEP_PM_OPS(fec_suspend, fec_resume)
3648         SET_RUNTIME_PM_OPS(fec_runtime_suspend, fec_runtime_resume, NULL)
3649 };
3650 
3651 static struct platform_driver fec_driver = {
3652         .driver = {
3653                 .name   = DRIVER_NAME,
3654                 .pm     = &fec_pm_ops,
3655                 .of_match_table = fec_dt_ids,
3656         },
3657         .id_table = fec_devtype,
3658         .probe  = fec_probe,
3659         .remove = fec_drv_remove,
3660 };
3661 
3662 module_platform_driver(fec_driver);
3663 
3664 MODULE_ALIAS("platform:"DRIVER_NAME);
3665 MODULE_LICENSE("GPL");
3666 

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