Version:  2.0.40 2.2.26 2.4.37 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0 4.1

Linux/drivers/net/ethernet/altera/altera_tse_main.c

  1 /* Altera Triple-Speed Ethernet MAC driver
  2  * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
  3  *
  4  * Contributors:
  5  *   Dalon Westergreen
  6  *   Thomas Chou
  7  *   Ian Abbott
  8  *   Yuriy Kozlov
  9  *   Tobias Klauser
 10  *   Andriy Smolskyy
 11  *   Roman Bulgakov
 12  *   Dmytro Mytarchuk
 13  *   Matthew Gerlach
 14  *
 15  * Original driver contributed by SLS.
 16  * Major updates contributed by GlobalLogic
 17  *
 18  * This program is free software; you can redistribute it and/or modify it
 19  * under the terms and conditions of the GNU General Public License,
 20  * version 2, as published by the Free Software Foundation.
 21  *
 22  * This program is distributed in the hope it will be useful, but WITHOUT
 23  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 24  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 25  * more details.
 26  *
 27  * You should have received a copy of the GNU General Public License along with
 28  * this program.  If not, see <http://www.gnu.org/licenses/>.
 29  */
 30 
 31 #include <linux/atomic.h>
 32 #include <linux/delay.h>
 33 #include <linux/etherdevice.h>
 34 #include <linux/if_vlan.h>
 35 #include <linux/init.h>
 36 #include <linux/interrupt.h>
 37 #include <linux/io.h>
 38 #include <linux/kernel.h>
 39 #include <linux/module.h>
 40 #include <linux/netdevice.h>
 41 #include <linux/of_device.h>
 42 #include <linux/of_mdio.h>
 43 #include <linux/of_net.h>
 44 #include <linux/of_platform.h>
 45 #include <linux/phy.h>
 46 #include <linux/platform_device.h>
 47 #include <linux/skbuff.h>
 48 #include <asm/cacheflush.h>
 49 
 50 #include "altera_utils.h"
 51 #include "altera_tse.h"
 52 #include "altera_sgdma.h"
 53 #include "altera_msgdma.h"
 54 
 55 static atomic_t instance_count = ATOMIC_INIT(~0);
 56 /* Module parameters */
 57 static int debug = -1;
 58 module_param(debug, int, S_IRUGO | S_IWUSR);
 59 MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
 60 
 61 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 62                                         NETIF_MSG_LINK | NETIF_MSG_IFUP |
 63                                         NETIF_MSG_IFDOWN);
 64 
 65 #define RX_DESCRIPTORS 64
 66 static int dma_rx_num = RX_DESCRIPTORS;
 67 module_param(dma_rx_num, int, S_IRUGO | S_IWUSR);
 68 MODULE_PARM_DESC(dma_rx_num, "Number of descriptors in the RX list");
 69 
 70 #define TX_DESCRIPTORS 64
 71 static int dma_tx_num = TX_DESCRIPTORS;
 72 module_param(dma_tx_num, int, S_IRUGO | S_IWUSR);
 73 MODULE_PARM_DESC(dma_tx_num, "Number of descriptors in the TX list");
 74 
 75 
 76 #define POLL_PHY (-1)
 77 
 78 /* Make sure DMA buffer size is larger than the max frame size
 79  * plus some alignment offset and a VLAN header. If the max frame size is
 80  * 1518, a VLAN header would be additional 4 bytes and additional
 81  * headroom for alignment is 2 bytes, 2048 is just fine.
 82  */
 83 #define ALTERA_RXDMABUFFER_SIZE 2048
 84 
 85 /* Allow network stack to resume queueing packets after we've
 86  * finished transmitting at least 1/4 of the packets in the queue.
 87  */
 88 #define TSE_TX_THRESH(x)        (x->tx_ring_size / 4)
 89 
 90 #define TXQUEUESTOP_THRESHHOLD  2
 91 
 92 static const struct of_device_id altera_tse_ids[];
 93 
 94 static inline u32 tse_tx_avail(struct altera_tse_private *priv)
 95 {
 96         return priv->tx_cons + priv->tx_ring_size - priv->tx_prod - 1;
 97 }
 98 
 99 /* MDIO specific functions
100  */
101 static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
102 {
103         struct net_device *ndev = bus->priv;
104         struct altera_tse_private *priv = netdev_priv(ndev);
105 
106         /* set MDIO address */
107         csrwr32((mii_id & 0x1f), priv->mac_dev,
108                 tse_csroffs(mdio_phy1_addr));
109 
110         /* get the data */
111         return csrrd32(priv->mac_dev,
112                        tse_csroffs(mdio_phy1) + regnum * 4) & 0xffff;
113 }
114 
115 static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
116                                  u16 value)
117 {
118         struct net_device *ndev = bus->priv;
119         struct altera_tse_private *priv = netdev_priv(ndev);
120 
121         /* set MDIO address */
122         csrwr32((mii_id & 0x1f), priv->mac_dev,
123                 tse_csroffs(mdio_phy1_addr));
124 
125         /* write the data */
126         csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy1) + regnum * 4);
127         return 0;
128 }
129 
130 static int altera_tse_mdio_create(struct net_device *dev, unsigned int id)
131 {
132         struct altera_tse_private *priv = netdev_priv(dev);
133         int ret;
134         int i;
135         struct device_node *mdio_node = NULL;
136         struct mii_bus *mdio = NULL;
137         struct device_node *child_node = NULL;
138 
139         for_each_child_of_node(priv->device->of_node, child_node) {
140                 if (of_device_is_compatible(child_node, "altr,tse-mdio")) {
141                         mdio_node = child_node;
142                         break;
143                 }
144         }
145 
146         if (mdio_node) {
147                 netdev_dbg(dev, "FOUND MDIO subnode\n");
148         } else {
149                 netdev_dbg(dev, "NO MDIO subnode\n");
150                 return 0;
151         }
152 
153         mdio = mdiobus_alloc();
154         if (mdio == NULL) {
155                 netdev_err(dev, "Error allocating MDIO bus\n");
156                 return -ENOMEM;
157         }
158 
159         mdio->name = ALTERA_TSE_RESOURCE_NAME;
160         mdio->read = &altera_tse_mdio_read;
161         mdio->write = &altera_tse_mdio_write;
162         snprintf(mdio->id, MII_BUS_ID_SIZE, "%s-%u", mdio->name, id);
163 
164         mdio->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);
165         if (mdio->irq == NULL) {
166                 ret = -ENOMEM;
167                 goto out_free_mdio;
168         }
169         for (i = 0; i < PHY_MAX_ADDR; i++)
170                 mdio->irq[i] = PHY_POLL;
171 
172         mdio->priv = dev;
173         mdio->parent = priv->device;
174 
175         ret = of_mdiobus_register(mdio, mdio_node);
176         if (ret != 0) {
177                 netdev_err(dev, "Cannot register MDIO bus %s\n",
178                            mdio->id);
179                 goto out_free_mdio_irq;
180         }
181 
182         if (netif_msg_drv(priv))
183                 netdev_info(dev, "MDIO bus %s: created\n", mdio->id);
184 
185         priv->mdio = mdio;
186         return 0;
187 out_free_mdio_irq:
188         kfree(mdio->irq);
189 out_free_mdio:
190         mdiobus_free(mdio);
191         mdio = NULL;
192         return ret;
193 }
194 
195 static void altera_tse_mdio_destroy(struct net_device *dev)
196 {
197         struct altera_tse_private *priv = netdev_priv(dev);
198 
199         if (priv->mdio == NULL)
200                 return;
201 
202         if (netif_msg_drv(priv))
203                 netdev_info(dev, "MDIO bus %s: removed\n",
204                             priv->mdio->id);
205 
206         mdiobus_unregister(priv->mdio);
207         kfree(priv->mdio->irq);
208         mdiobus_free(priv->mdio);
209         priv->mdio = NULL;
210 }
211 
212 static int tse_init_rx_buffer(struct altera_tse_private *priv,
213                               struct tse_buffer *rxbuffer, int len)
214 {
215         rxbuffer->skb = netdev_alloc_skb_ip_align(priv->dev, len);
216         if (!rxbuffer->skb)
217                 return -ENOMEM;
218 
219         rxbuffer->dma_addr = dma_map_single(priv->device, rxbuffer->skb->data,
220                                                 len,
221                                                 DMA_FROM_DEVICE);
222 
223         if (dma_mapping_error(priv->device, rxbuffer->dma_addr)) {
224                 netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
225                 dev_kfree_skb_any(rxbuffer->skb);
226                 return -EINVAL;
227         }
228         rxbuffer->dma_addr &= (dma_addr_t)~3;
229         rxbuffer->len = len;
230         return 0;
231 }
232 
233 static void tse_free_rx_buffer(struct altera_tse_private *priv,
234                                struct tse_buffer *rxbuffer)
235 {
236         struct sk_buff *skb = rxbuffer->skb;
237         dma_addr_t dma_addr = rxbuffer->dma_addr;
238 
239         if (skb != NULL) {
240                 if (dma_addr)
241                         dma_unmap_single(priv->device, dma_addr,
242                                          rxbuffer->len,
243                                          DMA_FROM_DEVICE);
244                 dev_kfree_skb_any(skb);
245                 rxbuffer->skb = NULL;
246                 rxbuffer->dma_addr = 0;
247         }
248 }
249 
250 /* Unmap and free Tx buffer resources
251  */
252 static void tse_free_tx_buffer(struct altera_tse_private *priv,
253                                struct tse_buffer *buffer)
254 {
255         if (buffer->dma_addr) {
256                 if (buffer->mapped_as_page)
257                         dma_unmap_page(priv->device, buffer->dma_addr,
258                                        buffer->len, DMA_TO_DEVICE);
259                 else
260                         dma_unmap_single(priv->device, buffer->dma_addr,
261                                          buffer->len, DMA_TO_DEVICE);
262                 buffer->dma_addr = 0;
263         }
264         if (buffer->skb) {
265                 dev_kfree_skb_any(buffer->skb);
266                 buffer->skb = NULL;
267         }
268 }
269 
270 static int alloc_init_skbufs(struct altera_tse_private *priv)
271 {
272         unsigned int rx_descs = priv->rx_ring_size;
273         unsigned int tx_descs = priv->tx_ring_size;
274         int ret = -ENOMEM;
275         int i;
276 
277         /* Create Rx ring buffer */
278         priv->rx_ring = kcalloc(rx_descs, sizeof(struct tse_buffer),
279                                 GFP_KERNEL);
280         if (!priv->rx_ring)
281                 goto err_rx_ring;
282 
283         /* Create Tx ring buffer */
284         priv->tx_ring = kcalloc(tx_descs, sizeof(struct tse_buffer),
285                                 GFP_KERNEL);
286         if (!priv->tx_ring)
287                 goto err_tx_ring;
288 
289         priv->tx_cons = 0;
290         priv->tx_prod = 0;
291 
292         /* Init Rx ring */
293         for (i = 0; i < rx_descs; i++) {
294                 ret = tse_init_rx_buffer(priv, &priv->rx_ring[i],
295                                          priv->rx_dma_buf_sz);
296                 if (ret)
297                         goto err_init_rx_buffers;
298         }
299 
300         priv->rx_cons = 0;
301         priv->rx_prod = 0;
302 
303         return 0;
304 err_init_rx_buffers:
305         while (--i >= 0)
306                 tse_free_rx_buffer(priv, &priv->rx_ring[i]);
307         kfree(priv->tx_ring);
308 err_tx_ring:
309         kfree(priv->rx_ring);
310 err_rx_ring:
311         return ret;
312 }
313 
314 static void free_skbufs(struct net_device *dev)
315 {
316         struct altera_tse_private *priv = netdev_priv(dev);
317         unsigned int rx_descs = priv->rx_ring_size;
318         unsigned int tx_descs = priv->tx_ring_size;
319         int i;
320 
321         /* Release the DMA TX/RX socket buffers */
322         for (i = 0; i < rx_descs; i++)
323                 tse_free_rx_buffer(priv, &priv->rx_ring[i]);
324         for (i = 0; i < tx_descs; i++)
325                 tse_free_tx_buffer(priv, &priv->tx_ring[i]);
326 
327 
328         kfree(priv->tx_ring);
329 }
330 
331 /* Reallocate the skb for the reception process
332  */
333 static inline void tse_rx_refill(struct altera_tse_private *priv)
334 {
335         unsigned int rxsize = priv->rx_ring_size;
336         unsigned int entry;
337         int ret;
338 
339         for (; priv->rx_cons - priv->rx_prod > 0;
340                         priv->rx_prod++) {
341                 entry = priv->rx_prod % rxsize;
342                 if (likely(priv->rx_ring[entry].skb == NULL)) {
343                         ret = tse_init_rx_buffer(priv, &priv->rx_ring[entry],
344                                 priv->rx_dma_buf_sz);
345                         if (unlikely(ret != 0))
346                                 break;
347                         priv->dmaops->add_rx_desc(priv, &priv->rx_ring[entry]);
348                 }
349         }
350 }
351 
352 /* Pull out the VLAN tag and fix up the packet
353  */
354 static inline void tse_rx_vlan(struct net_device *dev, struct sk_buff *skb)
355 {
356         struct ethhdr *eth_hdr;
357         u16 vid;
358         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
359             !__vlan_get_tag(skb, &vid)) {
360                 eth_hdr = (struct ethhdr *)skb->data;
361                 memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
362                 skb_pull(skb, VLAN_HLEN);
363                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
364         }
365 }
366 
367 /* Receive a packet: retrieve and pass over to upper levels
368  */
369 static int tse_rx(struct altera_tse_private *priv, int limit)
370 {
371         unsigned int count = 0;
372         unsigned int next_entry;
373         struct sk_buff *skb;
374         unsigned int entry = priv->rx_cons % priv->rx_ring_size;
375         u32 rxstatus;
376         u16 pktlength;
377         u16 pktstatus;
378 
379         /* Check for count < limit first as get_rx_status is changing
380         * the response-fifo so we must process the next packet
381         * after calling get_rx_status if a response is pending.
382         * (reading the last byte of the response pops the value from the fifo.)
383         */
384         while ((count < limit) &&
385                ((rxstatus = priv->dmaops->get_rx_status(priv)) != 0)) {
386                 pktstatus = rxstatus >> 16;
387                 pktlength = rxstatus & 0xffff;
388 
389                 if ((pktstatus & 0xFF) || (pktlength == 0))
390                         netdev_err(priv->dev,
391                                    "RCV pktstatus %08X pktlength %08X\n",
392                                    pktstatus, pktlength);
393 
394                 /* DMA trasfer from TSE starts with 2 aditional bytes for
395                  * IP payload alignment. Status returned by get_rx_status()
396                  * contains DMA transfer length. Packet is 2 bytes shorter.
397                  */
398                 pktlength -= 2;
399 
400                 count++;
401                 next_entry = (++priv->rx_cons) % priv->rx_ring_size;
402 
403                 skb = priv->rx_ring[entry].skb;
404                 if (unlikely(!skb)) {
405                         netdev_err(priv->dev,
406                                    "%s: Inconsistent Rx descriptor chain\n",
407                                    __func__);
408                         priv->dev->stats.rx_dropped++;
409                         break;
410                 }
411                 priv->rx_ring[entry].skb = NULL;
412 
413                 skb_put(skb, pktlength);
414 
415                 /* make cache consistent with receive packet buffer */
416                 dma_sync_single_for_cpu(priv->device,
417                                         priv->rx_ring[entry].dma_addr,
418                                         priv->rx_ring[entry].len,
419                                         DMA_FROM_DEVICE);
420 
421                 dma_unmap_single(priv->device, priv->rx_ring[entry].dma_addr,
422                                  priv->rx_ring[entry].len, DMA_FROM_DEVICE);
423 
424                 if (netif_msg_pktdata(priv)) {
425                         netdev_info(priv->dev, "frame received %d bytes\n",
426                                     pktlength);
427                         print_hex_dump(KERN_ERR, "data: ", DUMP_PREFIX_OFFSET,
428                                        16, 1, skb->data, pktlength, true);
429                 }
430 
431                 tse_rx_vlan(priv->dev, skb);
432 
433                 skb->protocol = eth_type_trans(skb, priv->dev);
434                 skb_checksum_none_assert(skb);
435 
436                 napi_gro_receive(&priv->napi, skb);
437 
438                 priv->dev->stats.rx_packets++;
439                 priv->dev->stats.rx_bytes += pktlength;
440 
441                 entry = next_entry;
442 
443                 tse_rx_refill(priv);
444         }
445 
446         return count;
447 }
448 
449 /* Reclaim resources after transmission completes
450  */
451 static int tse_tx_complete(struct altera_tse_private *priv)
452 {
453         unsigned int txsize = priv->tx_ring_size;
454         u32 ready;
455         unsigned int entry;
456         struct tse_buffer *tx_buff;
457         int txcomplete = 0;
458 
459         spin_lock(&priv->tx_lock);
460 
461         ready = priv->dmaops->tx_completions(priv);
462 
463         /* Free sent buffers */
464         while (ready && (priv->tx_cons != priv->tx_prod)) {
465                 entry = priv->tx_cons % txsize;
466                 tx_buff = &priv->tx_ring[entry];
467 
468                 if (netif_msg_tx_done(priv))
469                         netdev_dbg(priv->dev, "%s: curr %d, dirty %d\n",
470                                    __func__, priv->tx_prod, priv->tx_cons);
471 
472                 if (likely(tx_buff->skb))
473                         priv->dev->stats.tx_packets++;
474 
475                 tse_free_tx_buffer(priv, tx_buff);
476                 priv->tx_cons++;
477 
478                 txcomplete++;
479                 ready--;
480         }
481 
482         if (unlikely(netif_queue_stopped(priv->dev) &&
483                      tse_tx_avail(priv) > TSE_TX_THRESH(priv))) {
484                 netif_tx_lock(priv->dev);
485                 if (netif_queue_stopped(priv->dev) &&
486                     tse_tx_avail(priv) > TSE_TX_THRESH(priv)) {
487                         if (netif_msg_tx_done(priv))
488                                 netdev_dbg(priv->dev, "%s: restart transmit\n",
489                                            __func__);
490                         netif_wake_queue(priv->dev);
491                 }
492                 netif_tx_unlock(priv->dev);
493         }
494 
495         spin_unlock(&priv->tx_lock);
496         return txcomplete;
497 }
498 
499 /* NAPI polling function
500  */
501 static int tse_poll(struct napi_struct *napi, int budget)
502 {
503         struct altera_tse_private *priv =
504                         container_of(napi, struct altera_tse_private, napi);
505         int rxcomplete = 0;
506         unsigned long int flags;
507 
508         tse_tx_complete(priv);
509 
510         rxcomplete = tse_rx(priv, budget);
511 
512         if (rxcomplete < budget) {
513 
514                 napi_gro_flush(napi, false);
515                 __napi_complete(napi);
516 
517                 netdev_dbg(priv->dev,
518                            "NAPI Complete, did %d packets with budget %d\n",
519                            rxcomplete, budget);
520 
521                 spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
522                 priv->dmaops->enable_rxirq(priv);
523                 priv->dmaops->enable_txirq(priv);
524                 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
525         }
526         return rxcomplete;
527 }
528 
529 /* DMA TX & RX FIFO interrupt routing
530  */
531 static irqreturn_t altera_isr(int irq, void *dev_id)
532 {
533         struct net_device *dev = dev_id;
534         struct altera_tse_private *priv;
535 
536         if (unlikely(!dev)) {
537                 pr_err("%s: invalid dev pointer\n", __func__);
538                 return IRQ_NONE;
539         }
540         priv = netdev_priv(dev);
541 
542         spin_lock(&priv->rxdma_irq_lock);
543         /* reset IRQs */
544         priv->dmaops->clear_rxirq(priv);
545         priv->dmaops->clear_txirq(priv);
546         spin_unlock(&priv->rxdma_irq_lock);
547 
548         if (likely(napi_schedule_prep(&priv->napi))) {
549                 spin_lock(&priv->rxdma_irq_lock);
550                 priv->dmaops->disable_rxirq(priv);
551                 priv->dmaops->disable_txirq(priv);
552                 spin_unlock(&priv->rxdma_irq_lock);
553                 __napi_schedule(&priv->napi);
554         }
555 
556 
557         return IRQ_HANDLED;
558 }
559 
560 /* Transmit a packet (called by the kernel). Dispatches
561  * either the SGDMA method for transmitting or the
562  * MSGDMA method, assumes no scatter/gather support,
563  * implying an assumption that there's only one
564  * physically contiguous fragment starting at
565  * skb->data, for length of skb_headlen(skb).
566  */
567 static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev)
568 {
569         struct altera_tse_private *priv = netdev_priv(dev);
570         unsigned int txsize = priv->tx_ring_size;
571         unsigned int entry;
572         struct tse_buffer *buffer = NULL;
573         int nfrags = skb_shinfo(skb)->nr_frags;
574         unsigned int nopaged_len = skb_headlen(skb);
575         enum netdev_tx ret = NETDEV_TX_OK;
576         dma_addr_t dma_addr;
577 
578         spin_lock_bh(&priv->tx_lock);
579 
580         if (unlikely(tse_tx_avail(priv) < nfrags + 1)) {
581                 if (!netif_queue_stopped(dev)) {
582                         netif_stop_queue(dev);
583                         /* This is a hard error, log it. */
584                         netdev_err(priv->dev,
585                                    "%s: Tx list full when queue awake\n",
586                                    __func__);
587                 }
588                 ret = NETDEV_TX_BUSY;
589                 goto out;
590         }
591 
592         /* Map the first skb fragment */
593         entry = priv->tx_prod % txsize;
594         buffer = &priv->tx_ring[entry];
595 
596         dma_addr = dma_map_single(priv->device, skb->data, nopaged_len,
597                                   DMA_TO_DEVICE);
598         if (dma_mapping_error(priv->device, dma_addr)) {
599                 netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
600                 ret = NETDEV_TX_OK;
601                 goto out;
602         }
603 
604         buffer->skb = skb;
605         buffer->dma_addr = dma_addr;
606         buffer->len = nopaged_len;
607 
608         /* Push data out of the cache hierarchy into main memory */
609         dma_sync_single_for_device(priv->device, buffer->dma_addr,
610                                    buffer->len, DMA_TO_DEVICE);
611 
612         priv->dmaops->tx_buffer(priv, buffer);
613 
614         skb_tx_timestamp(skb);
615 
616         priv->tx_prod++;
617         dev->stats.tx_bytes += skb->len;
618 
619         if (unlikely(tse_tx_avail(priv) <= TXQUEUESTOP_THRESHHOLD)) {
620                 if (netif_msg_hw(priv))
621                         netdev_dbg(priv->dev, "%s: stop transmitted packets\n",
622                                    __func__);
623                 netif_stop_queue(dev);
624         }
625 
626 out:
627         spin_unlock_bh(&priv->tx_lock);
628 
629         return ret;
630 }
631 
632 /* Called every time the controller might need to be made
633  * aware of new link state.  The PHY code conveys this
634  * information through variables in the phydev structure, and this
635  * function converts those variables into the appropriate
636  * register values, and can bring down the device if needed.
637  */
638 static void altera_tse_adjust_link(struct net_device *dev)
639 {
640         struct altera_tse_private *priv = netdev_priv(dev);
641         struct phy_device *phydev = priv->phydev;
642         int new_state = 0;
643 
644         /* only change config if there is a link */
645         spin_lock(&priv->mac_cfg_lock);
646         if (phydev->link) {
647                 /* Read old config */
648                 u32 cfg_reg = ioread32(&priv->mac_dev->command_config);
649 
650                 /* Check duplex */
651                 if (phydev->duplex != priv->oldduplex) {
652                         new_state = 1;
653                         if (!(phydev->duplex))
654                                 cfg_reg |= MAC_CMDCFG_HD_ENA;
655                         else
656                                 cfg_reg &= ~MAC_CMDCFG_HD_ENA;
657 
658                         netdev_dbg(priv->dev, "%s: Link duplex = 0x%x\n",
659                                    dev->name, phydev->duplex);
660 
661                         priv->oldduplex = phydev->duplex;
662                 }
663 
664                 /* Check speed */
665                 if (phydev->speed != priv->oldspeed) {
666                         new_state = 1;
667                         switch (phydev->speed) {
668                         case 1000:
669                                 cfg_reg |= MAC_CMDCFG_ETH_SPEED;
670                                 cfg_reg &= ~MAC_CMDCFG_ENA_10;
671                                 break;
672                         case 100:
673                                 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
674                                 cfg_reg &= ~MAC_CMDCFG_ENA_10;
675                                 break;
676                         case 10:
677                                 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
678                                 cfg_reg |= MAC_CMDCFG_ENA_10;
679                                 break;
680                         default:
681                                 if (netif_msg_link(priv))
682                                         netdev_warn(dev, "Speed (%d) is not 10/100/1000!\n",
683                                                     phydev->speed);
684                                 break;
685                         }
686                         priv->oldspeed = phydev->speed;
687                 }
688                 iowrite32(cfg_reg, &priv->mac_dev->command_config);
689 
690                 if (!priv->oldlink) {
691                         new_state = 1;
692                         priv->oldlink = 1;
693                 }
694         } else if (priv->oldlink) {
695                 new_state = 1;
696                 priv->oldlink = 0;
697                 priv->oldspeed = 0;
698                 priv->oldduplex = -1;
699         }
700 
701         if (new_state && netif_msg_link(priv))
702                 phy_print_status(phydev);
703 
704         spin_unlock(&priv->mac_cfg_lock);
705 }
706 static struct phy_device *connect_local_phy(struct net_device *dev)
707 {
708         struct altera_tse_private *priv = netdev_priv(dev);
709         struct phy_device *phydev = NULL;
710         char phy_id_fmt[MII_BUS_ID_SIZE + 3];
711 
712         if (priv->phy_addr != POLL_PHY) {
713                 snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
714                          priv->mdio->id, priv->phy_addr);
715 
716                 netdev_dbg(dev, "trying to attach to %s\n", phy_id_fmt);
717 
718                 phydev = phy_connect(dev, phy_id_fmt, &altera_tse_adjust_link,
719                                      priv->phy_iface);
720                 if (IS_ERR(phydev))
721                         netdev_err(dev, "Could not attach to PHY\n");
722 
723         } else {
724                 int ret;
725                 phydev = phy_find_first(priv->mdio);
726                 if (phydev == NULL) {
727                         netdev_err(dev, "No PHY found\n");
728                         return phydev;
729                 }
730 
731                 ret = phy_connect_direct(dev, phydev, &altera_tse_adjust_link,
732                                 priv->phy_iface);
733                 if (ret != 0) {
734                         netdev_err(dev, "Could not attach to PHY\n");
735                         phydev = NULL;
736                 }
737         }
738         return phydev;
739 }
740 
741 static int altera_tse_phy_get_addr_mdio_create(struct net_device *dev)
742 {
743         struct altera_tse_private *priv = netdev_priv(dev);
744         struct device_node *np = priv->device->of_node;
745         int ret = 0;
746 
747         priv->phy_iface = of_get_phy_mode(np);
748 
749         /* Avoid get phy addr and create mdio if no phy is present */
750         if (!priv->phy_iface)
751                 return 0;
752 
753         /* try to get PHY address from device tree, use PHY autodetection if
754          * no valid address is given
755          */
756 
757         if (of_property_read_u32(priv->device->of_node, "phy-addr",
758                          &priv->phy_addr)) {
759                 priv->phy_addr = POLL_PHY;
760         }
761 
762         if (!((priv->phy_addr == POLL_PHY) ||
763                   ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) {
764                 netdev_err(dev, "invalid phy-addr specified %d\n",
765                         priv->phy_addr);
766                 return -ENODEV;
767         }
768 
769         /* Create/attach to MDIO bus */
770         ret = altera_tse_mdio_create(dev,
771                                          atomic_add_return(1, &instance_count));
772 
773         if (ret)
774                 return -ENODEV;
775 
776         return 0;
777 }
778 
779 /* Initialize driver's PHY state, and attach to the PHY
780  */
781 static int init_phy(struct net_device *dev)
782 {
783         struct altera_tse_private *priv = netdev_priv(dev);
784         struct phy_device *phydev;
785         struct device_node *phynode;
786         bool fixed_link = false;
787         int rc = 0;
788 
789         /* Avoid init phy in case of no phy present */
790         if (!priv->phy_iface)
791                 return 0;
792 
793         priv->oldlink = 0;
794         priv->oldspeed = 0;
795         priv->oldduplex = -1;
796 
797         phynode = of_parse_phandle(priv->device->of_node, "phy-handle", 0);
798 
799         if (!phynode) {
800                 /* check if a fixed-link is defined in device-tree */
801                 if (of_phy_is_fixed_link(priv->device->of_node)) {
802                         rc = of_phy_register_fixed_link(priv->device->of_node);
803                         if (rc < 0) {
804                                 netdev_err(dev, "cannot register fixed PHY\n");
805                                 return rc;
806                         }
807 
808                         /* In the case of a fixed PHY, the DT node associated
809                          * to the PHY is the Ethernet MAC DT node.
810                          */
811                         phynode = of_node_get(priv->device->of_node);
812                         fixed_link = true;
813 
814                         netdev_dbg(dev, "fixed-link detected\n");
815                         phydev = of_phy_connect(dev, phynode,
816                                                 &altera_tse_adjust_link,
817                                                 0, priv->phy_iface);
818                 } else {
819                         netdev_dbg(dev, "no phy-handle found\n");
820                         if (!priv->mdio) {
821                                 netdev_err(dev, "No phy-handle nor local mdio specified\n");
822                                 return -ENODEV;
823                         }
824                         phydev = connect_local_phy(dev);
825                 }
826         } else {
827                 netdev_dbg(dev, "phy-handle found\n");
828                 phydev = of_phy_connect(dev, phynode,
829                         &altera_tse_adjust_link, 0, priv->phy_iface);
830         }
831 
832         if (!phydev) {
833                 netdev_err(dev, "Could not find the PHY\n");
834                 return -ENODEV;
835         }
836 
837         /* Stop Advertising 1000BASE Capability if interface is not GMII
838          * Note: Checkpatch throws CHECKs for the camel case defines below,
839          * it's ok to ignore.
840          */
841         if ((priv->phy_iface == PHY_INTERFACE_MODE_MII) ||
842             (priv->phy_iface == PHY_INTERFACE_MODE_RMII))
843                 phydev->advertising &= ~(SUPPORTED_1000baseT_Half |
844                                          SUPPORTED_1000baseT_Full);
845 
846         /* Broken HW is sometimes missing the pull-up resistor on the
847          * MDIO line, which results in reads to non-existent devices returning
848          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
849          * device as well. If a fixed-link is used the phy_id is always 0.
850          * Note: phydev->phy_id is the result of reading the UID PHY registers.
851          */
852         if ((phydev->phy_id == 0) && !fixed_link) {
853                 netdev_err(dev, "Bad PHY UID 0x%08x\n", phydev->phy_id);
854                 phy_disconnect(phydev);
855                 return -ENODEV;
856         }
857 
858         netdev_dbg(dev, "attached to PHY %d UID 0x%08x Link = %d\n",
859                    phydev->addr, phydev->phy_id, phydev->link);
860 
861         priv->phydev = phydev;
862         return 0;
863 }
864 
865 static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr)
866 {
867         u32 msb;
868         u32 lsb;
869 
870         msb = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
871         lsb = ((addr[5] << 8) | addr[4]) & 0xffff;
872 
873         /* Set primary MAC address */
874         csrwr32(msb, priv->mac_dev, tse_csroffs(mac_addr_0));
875         csrwr32(lsb, priv->mac_dev, tse_csroffs(mac_addr_1));
876 }
877 
878 /* MAC software reset.
879  * When reset is triggered, the MAC function completes the current
880  * transmission or reception, and subsequently disables the transmit and
881  * receive logic, flushes the receive FIFO buffer, and resets the statistics
882  * counters.
883  */
884 static int reset_mac(struct altera_tse_private *priv)
885 {
886         int counter;
887         u32 dat;
888 
889         dat = csrrd32(priv->mac_dev, tse_csroffs(command_config));
890         dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
891         dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET;
892         csrwr32(dat, priv->mac_dev, tse_csroffs(command_config));
893 
894         counter = 0;
895         while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
896                 if (tse_bit_is_clear(priv->mac_dev, tse_csroffs(command_config),
897                                      MAC_CMDCFG_SW_RESET))
898                         break;
899                 udelay(1);
900         }
901 
902         if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
903                 dat = csrrd32(priv->mac_dev, tse_csroffs(command_config));
904                 dat &= ~MAC_CMDCFG_SW_RESET;
905                 csrwr32(dat, priv->mac_dev, tse_csroffs(command_config));
906                 return -1;
907         }
908         return 0;
909 }
910 
911 /* Initialize MAC core registers
912 */
913 static int init_mac(struct altera_tse_private *priv)
914 {
915         unsigned int cmd = 0;
916         u32 frm_length;
917 
918         /* Setup Rx FIFO */
919         csrwr32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY,
920                 priv->mac_dev, tse_csroffs(rx_section_empty));
921 
922         csrwr32(ALTERA_TSE_RX_SECTION_FULL, priv->mac_dev,
923                 tse_csroffs(rx_section_full));
924 
925         csrwr32(ALTERA_TSE_RX_ALMOST_EMPTY, priv->mac_dev,
926                 tse_csroffs(rx_almost_empty));
927 
928         csrwr32(ALTERA_TSE_RX_ALMOST_FULL, priv->mac_dev,
929                 tse_csroffs(rx_almost_full));
930 
931         /* Setup Tx FIFO */
932         csrwr32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY,
933                 priv->mac_dev, tse_csroffs(tx_section_empty));
934 
935         csrwr32(ALTERA_TSE_TX_SECTION_FULL, priv->mac_dev,
936                 tse_csroffs(tx_section_full));
937 
938         csrwr32(ALTERA_TSE_TX_ALMOST_EMPTY, priv->mac_dev,
939                 tse_csroffs(tx_almost_empty));
940 
941         csrwr32(ALTERA_TSE_TX_ALMOST_FULL, priv->mac_dev,
942                 tse_csroffs(tx_almost_full));
943 
944         /* MAC Address Configuration */
945         tse_update_mac_addr(priv, priv->dev->dev_addr);
946 
947         /* MAC Function Configuration */
948         frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN;
949         csrwr32(frm_length, priv->mac_dev, tse_csroffs(frm_length));
950 
951         csrwr32(ALTERA_TSE_TX_IPG_LENGTH, priv->mac_dev,
952                 tse_csroffs(tx_ipg_length));
953 
954         /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit
955          * start address
956          */
957         tse_set_bit(priv->mac_dev, tse_csroffs(rx_cmd_stat),
958                     ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16);
959 
960         tse_clear_bit(priv->mac_dev, tse_csroffs(tx_cmd_stat),
961                       ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 |
962                       ALTERA_TSE_TX_CMD_STAT_OMIT_CRC);
963 
964         /* Set the MAC options */
965         cmd = csrrd32(priv->mac_dev, tse_csroffs(command_config));
966         cmd &= ~MAC_CMDCFG_PAD_EN;      /* No padding Removal on Receive */
967         cmd &= ~MAC_CMDCFG_CRC_FWD;     /* CRC Removal */
968         cmd |= MAC_CMDCFG_RX_ERR_DISC;  /* Automatically discard frames
969                                          * with CRC errors
970                                          */
971         cmd |= MAC_CMDCFG_CNTL_FRM_ENA;
972         cmd &= ~MAC_CMDCFG_TX_ENA;
973         cmd &= ~MAC_CMDCFG_RX_ENA;
974 
975         /* Default speed and duplex setting, full/100 */
976         cmd &= ~MAC_CMDCFG_HD_ENA;
977         cmd &= ~MAC_CMDCFG_ETH_SPEED;
978         cmd &= ~MAC_CMDCFG_ENA_10;
979 
980         csrwr32(cmd, priv->mac_dev, tse_csroffs(command_config));
981 
982         csrwr32(ALTERA_TSE_PAUSE_QUANTA, priv->mac_dev,
983                 tse_csroffs(pause_quanta));
984 
985         if (netif_msg_hw(priv))
986                 dev_dbg(priv->device,
987                         "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd);
988 
989         return 0;
990 }
991 
992 /* Start/stop MAC transmission logic
993  */
994 static void tse_set_mac(struct altera_tse_private *priv, bool enable)
995 {
996         u32 value = csrrd32(priv->mac_dev, tse_csroffs(command_config));
997 
998         if (enable)
999                 value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA;
1000         else
1001                 value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
1002 
1003         csrwr32(value, priv->mac_dev, tse_csroffs(command_config));
1004 }
1005 
1006 /* Change the MTU
1007  */
1008 static int tse_change_mtu(struct net_device *dev, int new_mtu)
1009 {
1010         struct altera_tse_private *priv = netdev_priv(dev);
1011         unsigned int max_mtu = priv->max_mtu;
1012         unsigned int min_mtu = ETH_ZLEN + ETH_FCS_LEN;
1013 
1014         if (netif_running(dev)) {
1015                 netdev_err(dev, "must be stopped to change its MTU\n");
1016                 return -EBUSY;
1017         }
1018 
1019         if ((new_mtu < min_mtu) || (new_mtu > max_mtu)) {
1020                 netdev_err(dev, "invalid MTU, max MTU is: %u\n", max_mtu);
1021                 return -EINVAL;
1022         }
1023 
1024         dev->mtu = new_mtu;
1025         netdev_update_features(dev);
1026 
1027         return 0;
1028 }
1029 
1030 static void altera_tse_set_mcfilter(struct net_device *dev)
1031 {
1032         struct altera_tse_private *priv = netdev_priv(dev);
1033         int i;
1034         struct netdev_hw_addr *ha;
1035 
1036         /* clear the hash filter */
1037         for (i = 0; i < 64; i++)
1038                 csrwr32(0, priv->mac_dev, tse_csroffs(hash_table) + i * 4);
1039 
1040         netdev_for_each_mc_addr(ha, dev) {
1041                 unsigned int hash = 0;
1042                 int mac_octet;
1043 
1044                 for (mac_octet = 5; mac_octet >= 0; mac_octet--) {
1045                         unsigned char xor_bit = 0;
1046                         unsigned char octet = ha->addr[mac_octet];
1047                         unsigned int bitshift;
1048 
1049                         for (bitshift = 0; bitshift < 8; bitshift++)
1050                                 xor_bit ^= ((octet >> bitshift) & 0x01);
1051 
1052                         hash = (hash << 1) | xor_bit;
1053                 }
1054                 csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + hash * 4);
1055         }
1056 }
1057 
1058 
1059 static void altera_tse_set_mcfilterall(struct net_device *dev)
1060 {
1061         struct altera_tse_private *priv = netdev_priv(dev);
1062         int i;
1063 
1064         /* set the hash filter */
1065         for (i = 0; i < 64; i++)
1066                 csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + i * 4);
1067 }
1068 
1069 /* Set or clear the multicast filter for this adaptor
1070  */
1071 static void tse_set_rx_mode_hashfilter(struct net_device *dev)
1072 {
1073         struct altera_tse_private *priv = netdev_priv(dev);
1074 
1075         spin_lock(&priv->mac_cfg_lock);
1076 
1077         if (dev->flags & IFF_PROMISC)
1078                 tse_set_bit(priv->mac_dev, tse_csroffs(command_config),
1079                             MAC_CMDCFG_PROMIS_EN);
1080 
1081         if (dev->flags & IFF_ALLMULTI)
1082                 altera_tse_set_mcfilterall(dev);
1083         else
1084                 altera_tse_set_mcfilter(dev);
1085 
1086         spin_unlock(&priv->mac_cfg_lock);
1087 }
1088 
1089 /* Set or clear the multicast filter for this adaptor
1090  */
1091 static void tse_set_rx_mode(struct net_device *dev)
1092 {
1093         struct altera_tse_private *priv = netdev_priv(dev);
1094 
1095         spin_lock(&priv->mac_cfg_lock);
1096 
1097         if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) ||
1098             !netdev_mc_empty(dev) || !netdev_uc_empty(dev))
1099                 tse_set_bit(priv->mac_dev, tse_csroffs(command_config),
1100                             MAC_CMDCFG_PROMIS_EN);
1101         else
1102                 tse_clear_bit(priv->mac_dev, tse_csroffs(command_config),
1103                               MAC_CMDCFG_PROMIS_EN);
1104 
1105         spin_unlock(&priv->mac_cfg_lock);
1106 }
1107 
1108 /* Open and initialize the interface
1109  */
1110 static int tse_open(struct net_device *dev)
1111 {
1112         struct altera_tse_private *priv = netdev_priv(dev);
1113         int ret = 0;
1114         int i;
1115         unsigned long int flags;
1116 
1117         /* Reset and configure TSE MAC and probe associated PHY */
1118         ret = priv->dmaops->init_dma(priv);
1119         if (ret != 0) {
1120                 netdev_err(dev, "Cannot initialize DMA\n");
1121                 goto phy_error;
1122         }
1123 
1124         if (netif_msg_ifup(priv))
1125                 netdev_warn(dev, "device MAC address %pM\n",
1126                             dev->dev_addr);
1127 
1128         if ((priv->revision < 0xd00) || (priv->revision > 0xe00))
1129                 netdev_warn(dev, "TSE revision %x\n", priv->revision);
1130 
1131         spin_lock(&priv->mac_cfg_lock);
1132         ret = reset_mac(priv);
1133         /* Note that reset_mac will fail if the clocks are gated by the PHY
1134          * due to the PHY being put into isolation or power down mode.
1135          * This is not an error if reset fails due to no clock.
1136          */
1137         if (ret)
1138                 netdev_dbg(dev, "Cannot reset MAC core (error: %d)\n", ret);
1139 
1140         ret = init_mac(priv);
1141         spin_unlock(&priv->mac_cfg_lock);
1142         if (ret) {
1143                 netdev_err(dev, "Cannot init MAC core (error: %d)\n", ret);
1144                 goto alloc_skbuf_error;
1145         }
1146 
1147         priv->dmaops->reset_dma(priv);
1148 
1149         /* Create and initialize the TX/RX descriptors chains. */
1150         priv->rx_ring_size = dma_rx_num;
1151         priv->tx_ring_size = dma_tx_num;
1152         ret = alloc_init_skbufs(priv);
1153         if (ret) {
1154                 netdev_err(dev, "DMA descriptors initialization failed\n");
1155                 goto alloc_skbuf_error;
1156         }
1157 
1158 
1159         /* Register RX interrupt */
1160         ret = request_irq(priv->rx_irq, altera_isr, IRQF_SHARED,
1161                           dev->name, dev);
1162         if (ret) {
1163                 netdev_err(dev, "Unable to register RX interrupt %d\n",
1164                            priv->rx_irq);
1165                 goto init_error;
1166         }
1167 
1168         /* Register TX interrupt */
1169         ret = request_irq(priv->tx_irq, altera_isr, IRQF_SHARED,
1170                           dev->name, dev);
1171         if (ret) {
1172                 netdev_err(dev, "Unable to register TX interrupt %d\n",
1173                            priv->tx_irq);
1174                 goto tx_request_irq_error;
1175         }
1176 
1177         /* Enable DMA interrupts */
1178         spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1179         priv->dmaops->enable_rxirq(priv);
1180         priv->dmaops->enable_txirq(priv);
1181 
1182         /* Setup RX descriptor chain */
1183         for (i = 0; i < priv->rx_ring_size; i++)
1184                 priv->dmaops->add_rx_desc(priv, &priv->rx_ring[i]);
1185 
1186         spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1187 
1188         if (priv->phydev)
1189                 phy_start(priv->phydev);
1190 
1191         napi_enable(&priv->napi);
1192         netif_start_queue(dev);
1193 
1194         priv->dmaops->start_rxdma(priv);
1195 
1196         /* Start MAC Rx/Tx */
1197         spin_lock(&priv->mac_cfg_lock);
1198         tse_set_mac(priv, true);
1199         spin_unlock(&priv->mac_cfg_lock);
1200 
1201         return 0;
1202 
1203 tx_request_irq_error:
1204         free_irq(priv->rx_irq, dev);
1205 init_error:
1206         free_skbufs(dev);
1207 alloc_skbuf_error:
1208 phy_error:
1209         return ret;
1210 }
1211 
1212 /* Stop TSE MAC interface and put the device in an inactive state
1213  */
1214 static int tse_shutdown(struct net_device *dev)
1215 {
1216         struct altera_tse_private *priv = netdev_priv(dev);
1217         int ret;
1218         unsigned long int flags;
1219 
1220         /* Stop the PHY */
1221         if (priv->phydev)
1222                 phy_stop(priv->phydev);
1223 
1224         netif_stop_queue(dev);
1225         napi_disable(&priv->napi);
1226 
1227         /* Disable DMA interrupts */
1228         spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1229         priv->dmaops->disable_rxirq(priv);
1230         priv->dmaops->disable_txirq(priv);
1231         spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1232 
1233         /* Free the IRQ lines */
1234         free_irq(priv->rx_irq, dev);
1235         free_irq(priv->tx_irq, dev);
1236 
1237         /* disable and reset the MAC, empties fifo */
1238         spin_lock(&priv->mac_cfg_lock);
1239         spin_lock(&priv->tx_lock);
1240 
1241         ret = reset_mac(priv);
1242         /* Note that reset_mac will fail if the clocks are gated by the PHY
1243          * due to the PHY being put into isolation or power down mode.
1244          * This is not an error if reset fails due to no clock.
1245          */
1246         if (ret)
1247                 netdev_dbg(dev, "Cannot reset MAC core (error: %d)\n", ret);
1248         priv->dmaops->reset_dma(priv);
1249         free_skbufs(dev);
1250 
1251         spin_unlock(&priv->tx_lock);
1252         spin_unlock(&priv->mac_cfg_lock);
1253 
1254         priv->dmaops->uninit_dma(priv);
1255 
1256         return 0;
1257 }
1258 
1259 static struct net_device_ops altera_tse_netdev_ops = {
1260         .ndo_open               = tse_open,
1261         .ndo_stop               = tse_shutdown,
1262         .ndo_start_xmit         = tse_start_xmit,
1263         .ndo_set_mac_address    = eth_mac_addr,
1264         .ndo_set_rx_mode        = tse_set_rx_mode,
1265         .ndo_change_mtu         = tse_change_mtu,
1266         .ndo_validate_addr      = eth_validate_addr,
1267 };
1268 
1269 static int request_and_map(struct platform_device *pdev, const char *name,
1270                            struct resource **res, void __iomem **ptr)
1271 {
1272         struct resource *region;
1273         struct device *device = &pdev->dev;
1274 
1275         *res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
1276         if (*res == NULL) {
1277                 dev_err(device, "resource %s not defined\n", name);
1278                 return -ENODEV;
1279         }
1280 
1281         region = devm_request_mem_region(device, (*res)->start,
1282                                          resource_size(*res), dev_name(device));
1283         if (region == NULL) {
1284                 dev_err(device, "unable to request %s\n", name);
1285                 return -EBUSY;
1286         }
1287 
1288         *ptr = devm_ioremap_nocache(device, region->start,
1289                                     resource_size(region));
1290         if (*ptr == NULL) {
1291                 dev_err(device, "ioremap_nocache of %s failed!", name);
1292                 return -ENOMEM;
1293         }
1294 
1295         return 0;
1296 }
1297 
1298 /* Probe Altera TSE MAC device
1299  */
1300 static int altera_tse_probe(struct platform_device *pdev)
1301 {
1302         struct net_device *ndev;
1303         int ret = -ENODEV;
1304         struct resource *control_port;
1305         struct resource *dma_res;
1306         struct altera_tse_private *priv;
1307         const unsigned char *macaddr;
1308         void __iomem *descmap;
1309         const struct of_device_id *of_id = NULL;
1310 
1311         ndev = alloc_etherdev(sizeof(struct altera_tse_private));
1312         if (!ndev) {
1313                 dev_err(&pdev->dev, "Could not allocate network device\n");
1314                 return -ENODEV;
1315         }
1316 
1317         SET_NETDEV_DEV(ndev, &pdev->dev);
1318 
1319         priv = netdev_priv(ndev);
1320         priv->device = &pdev->dev;
1321         priv->dev = ndev;
1322         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1323 
1324         of_id = of_match_device(altera_tse_ids, &pdev->dev);
1325 
1326         if (of_id)
1327                 priv->dmaops = (struct altera_dmaops *)of_id->data;
1328 
1329 
1330         if (priv->dmaops &&
1331             priv->dmaops->altera_dtype == ALTERA_DTYPE_SGDMA) {
1332                 /* Get the mapped address to the SGDMA descriptor memory */
1333                 ret = request_and_map(pdev, "s1", &dma_res, &descmap);
1334                 if (ret)
1335                         goto err_free_netdev;
1336 
1337                 /* Start of that memory is for transmit descriptors */
1338                 priv->tx_dma_desc = descmap;
1339 
1340                 /* First half is for tx descriptors, other half for tx */
1341                 priv->txdescmem = resource_size(dma_res)/2;
1342 
1343                 priv->txdescmem_busaddr = (dma_addr_t)dma_res->start;
1344 
1345                 priv->rx_dma_desc = (void __iomem *)((uintptr_t)(descmap +
1346                                                      priv->txdescmem));
1347                 priv->rxdescmem = resource_size(dma_res)/2;
1348                 priv->rxdescmem_busaddr = dma_res->start;
1349                 priv->rxdescmem_busaddr += priv->txdescmem;
1350 
1351                 if (upper_32_bits(priv->rxdescmem_busaddr)) {
1352                         dev_dbg(priv->device,
1353                                 "SGDMA bus addresses greater than 32-bits\n");
1354                         goto err_free_netdev;
1355                 }
1356                 if (upper_32_bits(priv->txdescmem_busaddr)) {
1357                         dev_dbg(priv->device,
1358                                 "SGDMA bus addresses greater than 32-bits\n");
1359                         goto err_free_netdev;
1360                 }
1361         } else if (priv->dmaops &&
1362                    priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) {
1363                 ret = request_and_map(pdev, "rx_resp", &dma_res,
1364                                       &priv->rx_dma_resp);
1365                 if (ret)
1366                         goto err_free_netdev;
1367 
1368                 ret = request_and_map(pdev, "tx_desc", &dma_res,
1369                                       &priv->tx_dma_desc);
1370                 if (ret)
1371                         goto err_free_netdev;
1372 
1373                 priv->txdescmem = resource_size(dma_res);
1374                 priv->txdescmem_busaddr = dma_res->start;
1375 
1376                 ret = request_and_map(pdev, "rx_desc", &dma_res,
1377                                       &priv->rx_dma_desc);
1378                 if (ret)
1379                         goto err_free_netdev;
1380 
1381                 priv->rxdescmem = resource_size(dma_res);
1382                 priv->rxdescmem_busaddr = dma_res->start;
1383 
1384         } else {
1385                 goto err_free_netdev;
1386         }
1387 
1388         if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask)))
1389                 dma_set_coherent_mask(priv->device,
1390                                       DMA_BIT_MASK(priv->dmaops->dmamask));
1391         else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32)))
1392                 dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32));
1393         else
1394                 goto err_free_netdev;
1395 
1396         /* MAC address space */
1397         ret = request_and_map(pdev, "control_port", &control_port,
1398                               (void __iomem **)&priv->mac_dev);
1399         if (ret)
1400                 goto err_free_netdev;
1401 
1402         /* xSGDMA Rx Dispatcher address space */
1403         ret = request_and_map(pdev, "rx_csr", &dma_res,
1404                               &priv->rx_dma_csr);
1405         if (ret)
1406                 goto err_free_netdev;
1407 
1408 
1409         /* xSGDMA Tx Dispatcher address space */
1410         ret = request_and_map(pdev, "tx_csr", &dma_res,
1411                               &priv->tx_dma_csr);
1412         if (ret)
1413                 goto err_free_netdev;
1414 
1415 
1416         /* Rx IRQ */
1417         priv->rx_irq = platform_get_irq_byname(pdev, "rx_irq");
1418         if (priv->rx_irq == -ENXIO) {
1419                 dev_err(&pdev->dev, "cannot obtain Rx IRQ\n");
1420                 ret = -ENXIO;
1421                 goto err_free_netdev;
1422         }
1423 
1424         /* Tx IRQ */
1425         priv->tx_irq = platform_get_irq_byname(pdev, "tx_irq");
1426         if (priv->tx_irq == -ENXIO) {
1427                 dev_err(&pdev->dev, "cannot obtain Tx IRQ\n");
1428                 ret = -ENXIO;
1429                 goto err_free_netdev;
1430         }
1431 
1432         /* get FIFO depths from device tree */
1433         if (of_property_read_u32(pdev->dev.of_node, "rx-fifo-depth",
1434                                  &priv->rx_fifo_depth)) {
1435                 dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n");
1436                 ret = -ENXIO;
1437                 goto err_free_netdev;
1438         }
1439 
1440         if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
1441                                  &priv->tx_fifo_depth)) {
1442                 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n");
1443                 ret = -ENXIO;
1444                 goto err_free_netdev;
1445         }
1446 
1447         /* get hash filter settings for this instance */
1448         priv->hash_filter =
1449                 of_property_read_bool(pdev->dev.of_node,
1450                                       "altr,has-hash-multicast-filter");
1451 
1452         /* Set hash filter to not set for now until the
1453          * multicast filter receive issue is debugged
1454          */
1455         priv->hash_filter = 0;
1456 
1457         /* get supplemental address settings for this instance */
1458         priv->added_unicast =
1459                 of_property_read_bool(pdev->dev.of_node,
1460                                       "altr,has-supplementary-unicast");
1461 
1462         /* Max MTU is 1500, ETH_DATA_LEN */
1463         priv->max_mtu = ETH_DATA_LEN;
1464 
1465         /* Get the max mtu from the device tree. Note that the
1466          * "max-frame-size" parameter is actually max mtu. Definition
1467          * in the ePAPR v1.1 spec and usage differ, so go with usage.
1468          */
1469         of_property_read_u32(pdev->dev.of_node, "max-frame-size",
1470                              &priv->max_mtu);
1471 
1472         /* The DMA buffer size already accounts for an alignment bias
1473          * to avoid unaligned access exceptions for the NIOS processor,
1474          */
1475         priv->rx_dma_buf_sz = ALTERA_RXDMABUFFER_SIZE;
1476 
1477         /* get default MAC address from device tree */
1478         macaddr = of_get_mac_address(pdev->dev.of_node);
1479         if (macaddr)
1480                 ether_addr_copy(ndev->dev_addr, macaddr);
1481         else
1482                 eth_hw_addr_random(ndev);
1483 
1484         /* get phy addr and create mdio */
1485         ret = altera_tse_phy_get_addr_mdio_create(ndev);
1486 
1487         if (ret)
1488                 goto err_free_netdev;
1489 
1490         /* initialize netdev */
1491         ndev->mem_start = control_port->start;
1492         ndev->mem_end = control_port->end;
1493         ndev->netdev_ops = &altera_tse_netdev_ops;
1494         altera_tse_set_ethtool_ops(ndev);
1495 
1496         altera_tse_netdev_ops.ndo_set_rx_mode = tse_set_rx_mode;
1497 
1498         if (priv->hash_filter)
1499                 altera_tse_netdev_ops.ndo_set_rx_mode =
1500                         tse_set_rx_mode_hashfilter;
1501 
1502         /* Scatter/gather IO is not supported,
1503          * so it is turned off
1504          */
1505         ndev->hw_features &= ~NETIF_F_SG;
1506         ndev->features |= ndev->hw_features | NETIF_F_HIGHDMA;
1507 
1508         /* VLAN offloading of tagging, stripping and filtering is not
1509          * supported by hardware, but driver will accommodate the
1510          * extra 4-byte VLAN tag for processing by upper layers
1511          */
1512         ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
1513 
1514         /* setup NAPI interface */
1515         netif_napi_add(ndev, &priv->napi, tse_poll, NAPI_POLL_WEIGHT);
1516 
1517         spin_lock_init(&priv->mac_cfg_lock);
1518         spin_lock_init(&priv->tx_lock);
1519         spin_lock_init(&priv->rxdma_irq_lock);
1520 
1521         ret = register_netdev(ndev);
1522         if (ret) {
1523                 dev_err(&pdev->dev, "failed to register TSE net device\n");
1524                 goto err_register_netdev;
1525         }
1526 
1527         platform_set_drvdata(pdev, ndev);
1528 
1529         priv->revision = ioread32(&priv->mac_dev->megacore_revision);
1530 
1531         if (netif_msg_probe(priv))
1532                 dev_info(&pdev->dev, "Altera TSE MAC version %d.%d at 0x%08lx irq %d/%d\n",
1533                          (priv->revision >> 8) & 0xff,
1534                          priv->revision & 0xff,
1535                          (unsigned long) control_port->start, priv->rx_irq,
1536                          priv->tx_irq);
1537 
1538         ret = init_phy(ndev);
1539         if (ret != 0) {
1540                 netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret);
1541                 goto err_init_phy;
1542         }
1543         return 0;
1544 
1545 err_init_phy:
1546         unregister_netdev(ndev);
1547 err_register_netdev:
1548         netif_napi_del(&priv->napi);
1549         altera_tse_mdio_destroy(ndev);
1550 err_free_netdev:
1551         free_netdev(ndev);
1552         return ret;
1553 }
1554 
1555 /* Remove Altera TSE MAC device
1556  */
1557 static int altera_tse_remove(struct platform_device *pdev)
1558 {
1559         struct net_device *ndev = platform_get_drvdata(pdev);
1560         struct altera_tse_private *priv = netdev_priv(ndev);
1561 
1562         if (priv->phydev)
1563                 phy_disconnect(priv->phydev);
1564 
1565         platform_set_drvdata(pdev, NULL);
1566         altera_tse_mdio_destroy(ndev);
1567         unregister_netdev(ndev);
1568         free_netdev(ndev);
1569 
1570         return 0;
1571 }
1572 
1573 static const struct altera_dmaops altera_dtype_sgdma = {
1574         .altera_dtype = ALTERA_DTYPE_SGDMA,
1575         .dmamask = 32,
1576         .reset_dma = sgdma_reset,
1577         .enable_txirq = sgdma_enable_txirq,
1578         .enable_rxirq = sgdma_enable_rxirq,
1579         .disable_txirq = sgdma_disable_txirq,
1580         .disable_rxirq = sgdma_disable_rxirq,
1581         .clear_txirq = sgdma_clear_txirq,
1582         .clear_rxirq = sgdma_clear_rxirq,
1583         .tx_buffer = sgdma_tx_buffer,
1584         .tx_completions = sgdma_tx_completions,
1585         .add_rx_desc = sgdma_add_rx_desc,
1586         .get_rx_status = sgdma_rx_status,
1587         .init_dma = sgdma_initialize,
1588         .uninit_dma = sgdma_uninitialize,
1589         .start_rxdma = sgdma_start_rxdma,
1590 };
1591 
1592 static const struct altera_dmaops altera_dtype_msgdma = {
1593         .altera_dtype = ALTERA_DTYPE_MSGDMA,
1594         .dmamask = 64,
1595         .reset_dma = msgdma_reset,
1596         .enable_txirq = msgdma_enable_txirq,
1597         .enable_rxirq = msgdma_enable_rxirq,
1598         .disable_txirq = msgdma_disable_txirq,
1599         .disable_rxirq = msgdma_disable_rxirq,
1600         .clear_txirq = msgdma_clear_txirq,
1601         .clear_rxirq = msgdma_clear_rxirq,
1602         .tx_buffer = msgdma_tx_buffer,
1603         .tx_completions = msgdma_tx_completions,
1604         .add_rx_desc = msgdma_add_rx_desc,
1605         .get_rx_status = msgdma_rx_status,
1606         .init_dma = msgdma_initialize,
1607         .uninit_dma = msgdma_uninitialize,
1608         .start_rxdma = msgdma_start_rxdma,
1609 };
1610 
1611 static const struct of_device_id altera_tse_ids[] = {
1612         { .compatible = "altr,tse-msgdma-1.0", .data = &altera_dtype_msgdma, },
1613         { .compatible = "altr,tse-1.0", .data = &altera_dtype_sgdma, },
1614         { .compatible = "ALTR,tse-1.0", .data = &altera_dtype_sgdma, },
1615         {},
1616 };
1617 MODULE_DEVICE_TABLE(of, altera_tse_ids);
1618 
1619 static struct platform_driver altera_tse_driver = {
1620         .probe          = altera_tse_probe,
1621         .remove         = altera_tse_remove,
1622         .suspend        = NULL,
1623         .resume         = NULL,
1624         .driver         = {
1625                 .name   = ALTERA_TSE_RESOURCE_NAME,
1626                 .of_match_table = altera_tse_ids,
1627         },
1628 };
1629 
1630 module_platform_driver(altera_tse_driver);
1631 
1632 MODULE_AUTHOR("Altera Corporation");
1633 MODULE_DESCRIPTION("Altera Triple Speed Ethernet MAC driver");
1634 MODULE_LICENSE("GPL v2");
1635 

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