Version:  2.0.40 2.2.26 2.4.37 3.4 3.5 3.6 3.7 3.8 3.9 3.10 3.11 3.12 3.13 3.14 3.15 3.16 3.17 3.18 3.19 4.0

Linux/drivers/net/ethernet/altera/altera_tse_main.c

  1 /* Altera Triple-Speed Ethernet MAC driver
  2  * Copyright (C) 2008-2014 Altera Corporation. All rights reserved
  3  *
  4  * Contributors:
  5  *   Dalon Westergreen
  6  *   Thomas Chou
  7  *   Ian Abbott
  8  *   Yuriy Kozlov
  9  *   Tobias Klauser
 10  *   Andriy Smolskyy
 11  *   Roman Bulgakov
 12  *   Dmytro Mytarchuk
 13  *   Matthew Gerlach
 14  *
 15  * Original driver contributed by SLS.
 16  * Major updates contributed by GlobalLogic
 17  *
 18  * This program is free software; you can redistribute it and/or modify it
 19  * under the terms and conditions of the GNU General Public License,
 20  * version 2, as published by the Free Software Foundation.
 21  *
 22  * This program is distributed in the hope it will be useful, but WITHOUT
 23  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 24  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 25  * more details.
 26  *
 27  * You should have received a copy of the GNU General Public License along with
 28  * this program.  If not, see <http://www.gnu.org/licenses/>.
 29  */
 30 
 31 #include <linux/atomic.h>
 32 #include <linux/delay.h>
 33 #include <linux/etherdevice.h>
 34 #include <linux/if_vlan.h>
 35 #include <linux/init.h>
 36 #include <linux/interrupt.h>
 37 #include <linux/io.h>
 38 #include <linux/kernel.h>
 39 #include <linux/module.h>
 40 #include <linux/netdevice.h>
 41 #include <linux/of_device.h>
 42 #include <linux/of_mdio.h>
 43 #include <linux/of_net.h>
 44 #include <linux/of_platform.h>
 45 #include <linux/phy.h>
 46 #include <linux/platform_device.h>
 47 #include <linux/skbuff.h>
 48 #include <asm/cacheflush.h>
 49 
 50 #include "altera_utils.h"
 51 #include "altera_tse.h"
 52 #include "altera_sgdma.h"
 53 #include "altera_msgdma.h"
 54 
 55 static atomic_t instance_count = ATOMIC_INIT(~0);
 56 /* Module parameters */
 57 static int debug = -1;
 58 module_param(debug, int, S_IRUGO | S_IWUSR);
 59 MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
 60 
 61 static const u32 default_msg_level = (NETIF_MSG_DRV | NETIF_MSG_PROBE |
 62                                         NETIF_MSG_LINK | NETIF_MSG_IFUP |
 63                                         NETIF_MSG_IFDOWN);
 64 
 65 #define RX_DESCRIPTORS 64
 66 static int dma_rx_num = RX_DESCRIPTORS;
 67 module_param(dma_rx_num, int, S_IRUGO | S_IWUSR);
 68 MODULE_PARM_DESC(dma_rx_num, "Number of descriptors in the RX list");
 69 
 70 #define TX_DESCRIPTORS 64
 71 static int dma_tx_num = TX_DESCRIPTORS;
 72 module_param(dma_tx_num, int, S_IRUGO | S_IWUSR);
 73 MODULE_PARM_DESC(dma_tx_num, "Number of descriptors in the TX list");
 74 
 75 
 76 #define POLL_PHY (-1)
 77 
 78 /* Make sure DMA buffer size is larger than the max frame size
 79  * plus some alignment offset and a VLAN header. If the max frame size is
 80  * 1518, a VLAN header would be additional 4 bytes and additional
 81  * headroom for alignment is 2 bytes, 2048 is just fine.
 82  */
 83 #define ALTERA_RXDMABUFFER_SIZE 2048
 84 
 85 /* Allow network stack to resume queueing packets after we've
 86  * finished transmitting at least 1/4 of the packets in the queue.
 87  */
 88 #define TSE_TX_THRESH(x)        (x->tx_ring_size / 4)
 89 
 90 #define TXQUEUESTOP_THRESHHOLD  2
 91 
 92 static struct of_device_id altera_tse_ids[];
 93 
 94 static inline u32 tse_tx_avail(struct altera_tse_private *priv)
 95 {
 96         return priv->tx_cons + priv->tx_ring_size - priv->tx_prod - 1;
 97 }
 98 
 99 /* MDIO specific functions
100  */
101 static int altera_tse_mdio_read(struct mii_bus *bus, int mii_id, int regnum)
102 {
103         struct net_device *ndev = bus->priv;
104         struct altera_tse_private *priv = netdev_priv(ndev);
105 
106         /* set MDIO address */
107         csrwr32((mii_id & 0x1f), priv->mac_dev,
108                 tse_csroffs(mdio_phy0_addr));
109 
110         /* get the data */
111         return csrrd32(priv->mac_dev,
112                        tse_csroffs(mdio_phy0) + regnum * 4) & 0xffff;
113 }
114 
115 static int altera_tse_mdio_write(struct mii_bus *bus, int mii_id, int regnum,
116                                  u16 value)
117 {
118         struct net_device *ndev = bus->priv;
119         struct altera_tse_private *priv = netdev_priv(ndev);
120 
121         /* set MDIO address */
122         csrwr32((mii_id & 0x1f), priv->mac_dev,
123                 tse_csroffs(mdio_phy0_addr));
124 
125         /* write the data */
126         csrwr32(value, priv->mac_dev, tse_csroffs(mdio_phy0) + regnum * 4);
127         return 0;
128 }
129 
130 static int altera_tse_mdio_create(struct net_device *dev, unsigned int id)
131 {
132         struct altera_tse_private *priv = netdev_priv(dev);
133         int ret;
134         int i;
135         struct device_node *mdio_node = NULL;
136         struct mii_bus *mdio = NULL;
137         struct device_node *child_node = NULL;
138 
139         for_each_child_of_node(priv->device->of_node, child_node) {
140                 if (of_device_is_compatible(child_node, "altr,tse-mdio")) {
141                         mdio_node = child_node;
142                         break;
143                 }
144         }
145 
146         if (mdio_node) {
147                 netdev_dbg(dev, "FOUND MDIO subnode\n");
148         } else {
149                 netdev_dbg(dev, "NO MDIO subnode\n");
150                 return 0;
151         }
152 
153         mdio = mdiobus_alloc();
154         if (mdio == NULL) {
155                 netdev_err(dev, "Error allocating MDIO bus\n");
156                 return -ENOMEM;
157         }
158 
159         mdio->name = ALTERA_TSE_RESOURCE_NAME;
160         mdio->read = &altera_tse_mdio_read;
161         mdio->write = &altera_tse_mdio_write;
162         snprintf(mdio->id, MII_BUS_ID_SIZE, "%s-%u", mdio->name, id);
163 
164         mdio->irq = kcalloc(PHY_MAX_ADDR, sizeof(int), GFP_KERNEL);
165         if (mdio->irq == NULL) {
166                 ret = -ENOMEM;
167                 goto out_free_mdio;
168         }
169         for (i = 0; i < PHY_MAX_ADDR; i++)
170                 mdio->irq[i] = PHY_POLL;
171 
172         mdio->priv = dev;
173         mdio->parent = priv->device;
174 
175         ret = of_mdiobus_register(mdio, mdio_node);
176         if (ret != 0) {
177                 netdev_err(dev, "Cannot register MDIO bus %s\n",
178                            mdio->id);
179                 goto out_free_mdio_irq;
180         }
181 
182         if (netif_msg_drv(priv))
183                 netdev_info(dev, "MDIO bus %s: created\n", mdio->id);
184 
185         priv->mdio = mdio;
186         return 0;
187 out_free_mdio_irq:
188         kfree(mdio->irq);
189 out_free_mdio:
190         mdiobus_free(mdio);
191         mdio = NULL;
192         return ret;
193 }
194 
195 static void altera_tse_mdio_destroy(struct net_device *dev)
196 {
197         struct altera_tse_private *priv = netdev_priv(dev);
198 
199         if (priv->mdio == NULL)
200                 return;
201 
202         if (netif_msg_drv(priv))
203                 netdev_info(dev, "MDIO bus %s: removed\n",
204                             priv->mdio->id);
205 
206         mdiobus_unregister(priv->mdio);
207         kfree(priv->mdio->irq);
208         mdiobus_free(priv->mdio);
209         priv->mdio = NULL;
210 }
211 
212 static int tse_init_rx_buffer(struct altera_tse_private *priv,
213                               struct tse_buffer *rxbuffer, int len)
214 {
215         rxbuffer->skb = netdev_alloc_skb_ip_align(priv->dev, len);
216         if (!rxbuffer->skb)
217                 return -ENOMEM;
218 
219         rxbuffer->dma_addr = dma_map_single(priv->device, rxbuffer->skb->data,
220                                                 len,
221                                                 DMA_FROM_DEVICE);
222 
223         if (dma_mapping_error(priv->device, rxbuffer->dma_addr)) {
224                 netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
225                 dev_kfree_skb_any(rxbuffer->skb);
226                 return -EINVAL;
227         }
228         rxbuffer->dma_addr &= (dma_addr_t)~3;
229         rxbuffer->len = len;
230         return 0;
231 }
232 
233 static void tse_free_rx_buffer(struct altera_tse_private *priv,
234                                struct tse_buffer *rxbuffer)
235 {
236         struct sk_buff *skb = rxbuffer->skb;
237         dma_addr_t dma_addr = rxbuffer->dma_addr;
238 
239         if (skb != NULL) {
240                 if (dma_addr)
241                         dma_unmap_single(priv->device, dma_addr,
242                                          rxbuffer->len,
243                                          DMA_FROM_DEVICE);
244                 dev_kfree_skb_any(skb);
245                 rxbuffer->skb = NULL;
246                 rxbuffer->dma_addr = 0;
247         }
248 }
249 
250 /* Unmap and free Tx buffer resources
251  */
252 static void tse_free_tx_buffer(struct altera_tse_private *priv,
253                                struct tse_buffer *buffer)
254 {
255         if (buffer->dma_addr) {
256                 if (buffer->mapped_as_page)
257                         dma_unmap_page(priv->device, buffer->dma_addr,
258                                        buffer->len, DMA_TO_DEVICE);
259                 else
260                         dma_unmap_single(priv->device, buffer->dma_addr,
261                                          buffer->len, DMA_TO_DEVICE);
262                 buffer->dma_addr = 0;
263         }
264         if (buffer->skb) {
265                 dev_kfree_skb_any(buffer->skb);
266                 buffer->skb = NULL;
267         }
268 }
269 
270 static int alloc_init_skbufs(struct altera_tse_private *priv)
271 {
272         unsigned int rx_descs = priv->rx_ring_size;
273         unsigned int tx_descs = priv->tx_ring_size;
274         int ret = -ENOMEM;
275         int i;
276 
277         /* Create Rx ring buffer */
278         priv->rx_ring = kcalloc(rx_descs, sizeof(struct tse_buffer),
279                                 GFP_KERNEL);
280         if (!priv->rx_ring)
281                 goto err_rx_ring;
282 
283         /* Create Tx ring buffer */
284         priv->tx_ring = kcalloc(tx_descs, sizeof(struct tse_buffer),
285                                 GFP_KERNEL);
286         if (!priv->tx_ring)
287                 goto err_tx_ring;
288 
289         priv->tx_cons = 0;
290         priv->tx_prod = 0;
291 
292         /* Init Rx ring */
293         for (i = 0; i < rx_descs; i++) {
294                 ret = tse_init_rx_buffer(priv, &priv->rx_ring[i],
295                                          priv->rx_dma_buf_sz);
296                 if (ret)
297                         goto err_init_rx_buffers;
298         }
299 
300         priv->rx_cons = 0;
301         priv->rx_prod = 0;
302 
303         return 0;
304 err_init_rx_buffers:
305         while (--i >= 0)
306                 tse_free_rx_buffer(priv, &priv->rx_ring[i]);
307         kfree(priv->tx_ring);
308 err_tx_ring:
309         kfree(priv->rx_ring);
310 err_rx_ring:
311         return ret;
312 }
313 
314 static void free_skbufs(struct net_device *dev)
315 {
316         struct altera_tse_private *priv = netdev_priv(dev);
317         unsigned int rx_descs = priv->rx_ring_size;
318         unsigned int tx_descs = priv->tx_ring_size;
319         int i;
320 
321         /* Release the DMA TX/RX socket buffers */
322         for (i = 0; i < rx_descs; i++)
323                 tse_free_rx_buffer(priv, &priv->rx_ring[i]);
324         for (i = 0; i < tx_descs; i++)
325                 tse_free_tx_buffer(priv, &priv->tx_ring[i]);
326 
327 
328         kfree(priv->tx_ring);
329 }
330 
331 /* Reallocate the skb for the reception process
332  */
333 static inline void tse_rx_refill(struct altera_tse_private *priv)
334 {
335         unsigned int rxsize = priv->rx_ring_size;
336         unsigned int entry;
337         int ret;
338 
339         for (; priv->rx_cons - priv->rx_prod > 0;
340                         priv->rx_prod++) {
341                 entry = priv->rx_prod % rxsize;
342                 if (likely(priv->rx_ring[entry].skb == NULL)) {
343                         ret = tse_init_rx_buffer(priv, &priv->rx_ring[entry],
344                                 priv->rx_dma_buf_sz);
345                         if (unlikely(ret != 0))
346                                 break;
347                         priv->dmaops->add_rx_desc(priv, &priv->rx_ring[entry]);
348                 }
349         }
350 }
351 
352 /* Pull out the VLAN tag and fix up the packet
353  */
354 static inline void tse_rx_vlan(struct net_device *dev, struct sk_buff *skb)
355 {
356         struct ethhdr *eth_hdr;
357         u16 vid;
358         if ((dev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
359             !__vlan_get_tag(skb, &vid)) {
360                 eth_hdr = (struct ethhdr *)skb->data;
361                 memmove(skb->data + VLAN_HLEN, eth_hdr, ETH_ALEN * 2);
362                 skb_pull(skb, VLAN_HLEN);
363                 __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vid);
364         }
365 }
366 
367 /* Receive a packet: retrieve and pass over to upper levels
368  */
369 static int tse_rx(struct altera_tse_private *priv, int limit)
370 {
371         unsigned int count = 0;
372         unsigned int next_entry;
373         struct sk_buff *skb;
374         unsigned int entry = priv->rx_cons % priv->rx_ring_size;
375         u32 rxstatus;
376         u16 pktlength;
377         u16 pktstatus;
378 
379         while (((rxstatus = priv->dmaops->get_rx_status(priv)) != 0) &&
380                (count < limit))  {
381                 pktstatus = rxstatus >> 16;
382                 pktlength = rxstatus & 0xffff;
383 
384                 if ((pktstatus & 0xFF) || (pktlength == 0))
385                         netdev_err(priv->dev,
386                                    "RCV pktstatus %08X pktlength %08X\n",
387                                    pktstatus, pktlength);
388 
389                 count++;
390                 next_entry = (++priv->rx_cons) % priv->rx_ring_size;
391 
392                 skb = priv->rx_ring[entry].skb;
393                 if (unlikely(!skb)) {
394                         netdev_err(priv->dev,
395                                    "%s: Inconsistent Rx descriptor chain\n",
396                                    __func__);
397                         priv->dev->stats.rx_dropped++;
398                         break;
399                 }
400                 priv->rx_ring[entry].skb = NULL;
401 
402                 skb_put(skb, pktlength);
403 
404                 /* make cache consistent with receive packet buffer */
405                 dma_sync_single_for_cpu(priv->device,
406                                         priv->rx_ring[entry].dma_addr,
407                                         priv->rx_ring[entry].len,
408                                         DMA_FROM_DEVICE);
409 
410                 dma_unmap_single(priv->device, priv->rx_ring[entry].dma_addr,
411                                  priv->rx_ring[entry].len, DMA_FROM_DEVICE);
412 
413                 if (netif_msg_pktdata(priv)) {
414                         netdev_info(priv->dev, "frame received %d bytes\n",
415                                     pktlength);
416                         print_hex_dump(KERN_ERR, "data: ", DUMP_PREFIX_OFFSET,
417                                        16, 1, skb->data, pktlength, true);
418                 }
419 
420                 tse_rx_vlan(priv->dev, skb);
421 
422                 skb->protocol = eth_type_trans(skb, priv->dev);
423                 skb_checksum_none_assert(skb);
424 
425                 napi_gro_receive(&priv->napi, skb);
426 
427                 priv->dev->stats.rx_packets++;
428                 priv->dev->stats.rx_bytes += pktlength;
429 
430                 entry = next_entry;
431 
432                 tse_rx_refill(priv);
433         }
434 
435         return count;
436 }
437 
438 /* Reclaim resources after transmission completes
439  */
440 static int tse_tx_complete(struct altera_tse_private *priv)
441 {
442         unsigned int txsize = priv->tx_ring_size;
443         u32 ready;
444         unsigned int entry;
445         struct tse_buffer *tx_buff;
446         int txcomplete = 0;
447 
448         spin_lock(&priv->tx_lock);
449 
450         ready = priv->dmaops->tx_completions(priv);
451 
452         /* Free sent buffers */
453         while (ready && (priv->tx_cons != priv->tx_prod)) {
454                 entry = priv->tx_cons % txsize;
455                 tx_buff = &priv->tx_ring[entry];
456 
457                 if (netif_msg_tx_done(priv))
458                         netdev_dbg(priv->dev, "%s: curr %d, dirty %d\n",
459                                    __func__, priv->tx_prod, priv->tx_cons);
460 
461                 if (likely(tx_buff->skb))
462                         priv->dev->stats.tx_packets++;
463 
464                 tse_free_tx_buffer(priv, tx_buff);
465                 priv->tx_cons++;
466 
467                 txcomplete++;
468                 ready--;
469         }
470 
471         if (unlikely(netif_queue_stopped(priv->dev) &&
472                      tse_tx_avail(priv) > TSE_TX_THRESH(priv))) {
473                 netif_tx_lock(priv->dev);
474                 if (netif_queue_stopped(priv->dev) &&
475                     tse_tx_avail(priv) > TSE_TX_THRESH(priv)) {
476                         if (netif_msg_tx_done(priv))
477                                 netdev_dbg(priv->dev, "%s: restart transmit\n",
478                                            __func__);
479                         netif_wake_queue(priv->dev);
480                 }
481                 netif_tx_unlock(priv->dev);
482         }
483 
484         spin_unlock(&priv->tx_lock);
485         return txcomplete;
486 }
487 
488 /* NAPI polling function
489  */
490 static int tse_poll(struct napi_struct *napi, int budget)
491 {
492         struct altera_tse_private *priv =
493                         container_of(napi, struct altera_tse_private, napi);
494         int rxcomplete = 0;
495         unsigned long int flags;
496 
497         tse_tx_complete(priv);
498 
499         rxcomplete = tse_rx(priv, budget);
500 
501         if (rxcomplete < budget) {
502 
503                 napi_gro_flush(napi, false);
504                 __napi_complete(napi);
505 
506                 netdev_dbg(priv->dev,
507                            "NAPI Complete, did %d packets with budget %d\n",
508                            rxcomplete, budget);
509 
510                 spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
511                 priv->dmaops->enable_rxirq(priv);
512                 priv->dmaops->enable_txirq(priv);
513                 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
514         }
515         return rxcomplete;
516 }
517 
518 /* DMA TX & RX FIFO interrupt routing
519  */
520 static irqreturn_t altera_isr(int irq, void *dev_id)
521 {
522         struct net_device *dev = dev_id;
523         struct altera_tse_private *priv;
524 
525         if (unlikely(!dev)) {
526                 pr_err("%s: invalid dev pointer\n", __func__);
527                 return IRQ_NONE;
528         }
529         priv = netdev_priv(dev);
530 
531         spin_lock(&priv->rxdma_irq_lock);
532         /* reset IRQs */
533         priv->dmaops->clear_rxirq(priv);
534         priv->dmaops->clear_txirq(priv);
535         spin_unlock(&priv->rxdma_irq_lock);
536 
537         if (likely(napi_schedule_prep(&priv->napi))) {
538                 spin_lock(&priv->rxdma_irq_lock);
539                 priv->dmaops->disable_rxirq(priv);
540                 priv->dmaops->disable_txirq(priv);
541                 spin_unlock(&priv->rxdma_irq_lock);
542                 __napi_schedule(&priv->napi);
543         }
544 
545 
546         return IRQ_HANDLED;
547 }
548 
549 /* Transmit a packet (called by the kernel). Dispatches
550  * either the SGDMA method for transmitting or the
551  * MSGDMA method, assumes no scatter/gather support,
552  * implying an assumption that there's only one
553  * physically contiguous fragment starting at
554  * skb->data, for length of skb_headlen(skb).
555  */
556 static int tse_start_xmit(struct sk_buff *skb, struct net_device *dev)
557 {
558         struct altera_tse_private *priv = netdev_priv(dev);
559         unsigned int txsize = priv->tx_ring_size;
560         unsigned int entry;
561         struct tse_buffer *buffer = NULL;
562         int nfrags = skb_shinfo(skb)->nr_frags;
563         unsigned int nopaged_len = skb_headlen(skb);
564         enum netdev_tx ret = NETDEV_TX_OK;
565         dma_addr_t dma_addr;
566 
567         spin_lock_bh(&priv->tx_lock);
568 
569         if (unlikely(tse_tx_avail(priv) < nfrags + 1)) {
570                 if (!netif_queue_stopped(dev)) {
571                         netif_stop_queue(dev);
572                         /* This is a hard error, log it. */
573                         netdev_err(priv->dev,
574                                    "%s: Tx list full when queue awake\n",
575                                    __func__);
576                 }
577                 ret = NETDEV_TX_BUSY;
578                 goto out;
579         }
580 
581         /* Map the first skb fragment */
582         entry = priv->tx_prod % txsize;
583         buffer = &priv->tx_ring[entry];
584 
585         dma_addr = dma_map_single(priv->device, skb->data, nopaged_len,
586                                   DMA_TO_DEVICE);
587         if (dma_mapping_error(priv->device, dma_addr)) {
588                 netdev_err(priv->dev, "%s: DMA mapping error\n", __func__);
589                 ret = NETDEV_TX_OK;
590                 goto out;
591         }
592 
593         buffer->skb = skb;
594         buffer->dma_addr = dma_addr;
595         buffer->len = nopaged_len;
596 
597         /* Push data out of the cache hierarchy into main memory */
598         dma_sync_single_for_device(priv->device, buffer->dma_addr,
599                                    buffer->len, DMA_TO_DEVICE);
600 
601         priv->dmaops->tx_buffer(priv, buffer);
602 
603         skb_tx_timestamp(skb);
604 
605         priv->tx_prod++;
606         dev->stats.tx_bytes += skb->len;
607 
608         if (unlikely(tse_tx_avail(priv) <= TXQUEUESTOP_THRESHHOLD)) {
609                 if (netif_msg_hw(priv))
610                         netdev_dbg(priv->dev, "%s: stop transmitted packets\n",
611                                    __func__);
612                 netif_stop_queue(dev);
613         }
614 
615 out:
616         spin_unlock_bh(&priv->tx_lock);
617 
618         return ret;
619 }
620 
621 /* Called every time the controller might need to be made
622  * aware of new link state.  The PHY code conveys this
623  * information through variables in the phydev structure, and this
624  * function converts those variables into the appropriate
625  * register values, and can bring down the device if needed.
626  */
627 static void altera_tse_adjust_link(struct net_device *dev)
628 {
629         struct altera_tse_private *priv = netdev_priv(dev);
630         struct phy_device *phydev = priv->phydev;
631         int new_state = 0;
632 
633         /* only change config if there is a link */
634         spin_lock(&priv->mac_cfg_lock);
635         if (phydev->link) {
636                 /* Read old config */
637                 u32 cfg_reg = ioread32(&priv->mac_dev->command_config);
638 
639                 /* Check duplex */
640                 if (phydev->duplex != priv->oldduplex) {
641                         new_state = 1;
642                         if (!(phydev->duplex))
643                                 cfg_reg |= MAC_CMDCFG_HD_ENA;
644                         else
645                                 cfg_reg &= ~MAC_CMDCFG_HD_ENA;
646 
647                         netdev_dbg(priv->dev, "%s: Link duplex = 0x%x\n",
648                                    dev->name, phydev->duplex);
649 
650                         priv->oldduplex = phydev->duplex;
651                 }
652 
653                 /* Check speed */
654                 if (phydev->speed != priv->oldspeed) {
655                         new_state = 1;
656                         switch (phydev->speed) {
657                         case 1000:
658                                 cfg_reg |= MAC_CMDCFG_ETH_SPEED;
659                                 cfg_reg &= ~MAC_CMDCFG_ENA_10;
660                                 break;
661                         case 100:
662                                 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
663                                 cfg_reg &= ~MAC_CMDCFG_ENA_10;
664                                 break;
665                         case 10:
666                                 cfg_reg &= ~MAC_CMDCFG_ETH_SPEED;
667                                 cfg_reg |= MAC_CMDCFG_ENA_10;
668                                 break;
669                         default:
670                                 if (netif_msg_link(priv))
671                                         netdev_warn(dev, "Speed (%d) is not 10/100/1000!\n",
672                                                     phydev->speed);
673                                 break;
674                         }
675                         priv->oldspeed = phydev->speed;
676                 }
677                 iowrite32(cfg_reg, &priv->mac_dev->command_config);
678 
679                 if (!priv->oldlink) {
680                         new_state = 1;
681                         priv->oldlink = 1;
682                 }
683         } else if (priv->oldlink) {
684                 new_state = 1;
685                 priv->oldlink = 0;
686                 priv->oldspeed = 0;
687                 priv->oldduplex = -1;
688         }
689 
690         if (new_state && netif_msg_link(priv))
691                 phy_print_status(phydev);
692 
693         spin_unlock(&priv->mac_cfg_lock);
694 }
695 static struct phy_device *connect_local_phy(struct net_device *dev)
696 {
697         struct altera_tse_private *priv = netdev_priv(dev);
698         struct phy_device *phydev = NULL;
699         char phy_id_fmt[MII_BUS_ID_SIZE + 3];
700 
701         if (priv->phy_addr != POLL_PHY) {
702                 snprintf(phy_id_fmt, MII_BUS_ID_SIZE + 3, PHY_ID_FMT,
703                          priv->mdio->id, priv->phy_addr);
704 
705                 netdev_dbg(dev, "trying to attach to %s\n", phy_id_fmt);
706 
707                 phydev = phy_connect(dev, phy_id_fmt, &altera_tse_adjust_link,
708                                      priv->phy_iface);
709                 if (IS_ERR(phydev))
710                         netdev_err(dev, "Could not attach to PHY\n");
711 
712         } else {
713                 int ret;
714                 phydev = phy_find_first(priv->mdio);
715                 if (phydev == NULL) {
716                         netdev_err(dev, "No PHY found\n");
717                         return phydev;
718                 }
719 
720                 ret = phy_connect_direct(dev, phydev, &altera_tse_adjust_link,
721                                 priv->phy_iface);
722                 if (ret != 0) {
723                         netdev_err(dev, "Could not attach to PHY\n");
724                         phydev = NULL;
725                 }
726         }
727         return phydev;
728 }
729 
730 static int altera_tse_phy_get_addr_mdio_create(struct net_device *dev)
731 {
732         struct altera_tse_private *priv = netdev_priv(dev);
733         struct device_node *np = priv->device->of_node;
734         int ret = 0;
735 
736         priv->phy_iface = of_get_phy_mode(np);
737 
738         /* Avoid get phy addr and create mdio if no phy is present */
739         if (!priv->phy_iface)
740                 return 0;
741 
742         /* try to get PHY address from device tree, use PHY autodetection if
743          * no valid address is given
744          */
745 
746         if (of_property_read_u32(priv->device->of_node, "phy-addr",
747                          &priv->phy_addr)) {
748                 priv->phy_addr = POLL_PHY;
749         }
750 
751         if (!((priv->phy_addr == POLL_PHY) ||
752                   ((priv->phy_addr >= 0) && (priv->phy_addr < PHY_MAX_ADDR)))) {
753                 netdev_err(dev, "invalid phy-addr specified %d\n",
754                         priv->phy_addr);
755                 return -ENODEV;
756         }
757 
758         /* Create/attach to MDIO bus */
759         ret = altera_tse_mdio_create(dev,
760                                          atomic_add_return(1, &instance_count));
761 
762         if (ret)
763                 return -ENODEV;
764 
765         return 0;
766 }
767 
768 /* Initialize driver's PHY state, and attach to the PHY
769  */
770 static int init_phy(struct net_device *dev)
771 {
772         struct altera_tse_private *priv = netdev_priv(dev);
773         struct phy_device *phydev;
774         struct device_node *phynode;
775 
776         /* Avoid init phy in case of no phy present */
777         if (!priv->phy_iface)
778                 return 0;
779 
780         priv->oldlink = 0;
781         priv->oldspeed = 0;
782         priv->oldduplex = -1;
783 
784         phynode = of_parse_phandle(priv->device->of_node, "phy-handle", 0);
785 
786         if (!phynode) {
787                 netdev_dbg(dev, "no phy-handle found\n");
788                 if (!priv->mdio) {
789                         netdev_err(dev,
790                                    "No phy-handle nor local mdio specified\n");
791                         return -ENODEV;
792                 }
793                 phydev = connect_local_phy(dev);
794         } else {
795                 netdev_dbg(dev, "phy-handle found\n");
796                 phydev = of_phy_connect(dev, phynode,
797                         &altera_tse_adjust_link, 0, priv->phy_iface);
798         }
799 
800         if (!phydev) {
801                 netdev_err(dev, "Could not find the PHY\n");
802                 return -ENODEV;
803         }
804 
805         /* Stop Advertising 1000BASE Capability if interface is not GMII
806          * Note: Checkpatch throws CHECKs for the camel case defines below,
807          * it's ok to ignore.
808          */
809         if ((priv->phy_iface == PHY_INTERFACE_MODE_MII) ||
810             (priv->phy_iface == PHY_INTERFACE_MODE_RMII))
811                 phydev->advertising &= ~(SUPPORTED_1000baseT_Half |
812                                          SUPPORTED_1000baseT_Full);
813 
814         /* Broken HW is sometimes missing the pull-up resistor on the
815          * MDIO line, which results in reads to non-existent devices returning
816          * 0 rather than 0xffff. Catch this here and treat 0 as a non-existent
817          * device as well.
818          * Note: phydev->phy_id is the result of reading the UID PHY registers.
819          */
820         if (phydev->phy_id == 0) {
821                 netdev_err(dev, "Bad PHY UID 0x%08x\n", phydev->phy_id);
822                 phy_disconnect(phydev);
823                 return -ENODEV;
824         }
825 
826         netdev_dbg(dev, "attached to PHY %d UID 0x%08x Link = %d\n",
827                    phydev->addr, phydev->phy_id, phydev->link);
828 
829         priv->phydev = phydev;
830         return 0;
831 }
832 
833 static void tse_update_mac_addr(struct altera_tse_private *priv, u8 *addr)
834 {
835         u32 msb;
836         u32 lsb;
837 
838         msb = (addr[3] << 24) | (addr[2] << 16) | (addr[1] << 8) | addr[0];
839         lsb = ((addr[5] << 8) | addr[4]) & 0xffff;
840 
841         /* Set primary MAC address */
842         csrwr32(msb, priv->mac_dev, tse_csroffs(mac_addr_0));
843         csrwr32(lsb, priv->mac_dev, tse_csroffs(mac_addr_1));
844 }
845 
846 /* MAC software reset.
847  * When reset is triggered, the MAC function completes the current
848  * transmission or reception, and subsequently disables the transmit and
849  * receive logic, flushes the receive FIFO buffer, and resets the statistics
850  * counters.
851  */
852 static int reset_mac(struct altera_tse_private *priv)
853 {
854         int counter;
855         u32 dat;
856 
857         dat = csrrd32(priv->mac_dev, tse_csroffs(command_config));
858         dat &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
859         dat |= MAC_CMDCFG_SW_RESET | MAC_CMDCFG_CNT_RESET;
860         csrwr32(dat, priv->mac_dev, tse_csroffs(command_config));
861 
862         counter = 0;
863         while (counter++ < ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
864                 if (tse_bit_is_clear(priv->mac_dev, tse_csroffs(command_config),
865                                      MAC_CMDCFG_SW_RESET))
866                         break;
867                 udelay(1);
868         }
869 
870         if (counter >= ALTERA_TSE_SW_RESET_WATCHDOG_CNTR) {
871                 dat = csrrd32(priv->mac_dev, tse_csroffs(command_config));
872                 dat &= ~MAC_CMDCFG_SW_RESET;
873                 csrwr32(dat, priv->mac_dev, tse_csroffs(command_config));
874                 return -1;
875         }
876         return 0;
877 }
878 
879 /* Initialize MAC core registers
880 */
881 static int init_mac(struct altera_tse_private *priv)
882 {
883         unsigned int cmd = 0;
884         u32 frm_length;
885 
886         /* Setup Rx FIFO */
887         csrwr32(priv->rx_fifo_depth - ALTERA_TSE_RX_SECTION_EMPTY,
888                 priv->mac_dev, tse_csroffs(rx_section_empty));
889 
890         csrwr32(ALTERA_TSE_RX_SECTION_FULL, priv->mac_dev,
891                 tse_csroffs(rx_section_full));
892 
893         csrwr32(ALTERA_TSE_RX_ALMOST_EMPTY, priv->mac_dev,
894                 tse_csroffs(rx_almost_empty));
895 
896         csrwr32(ALTERA_TSE_RX_ALMOST_FULL, priv->mac_dev,
897                 tse_csroffs(rx_almost_full));
898 
899         /* Setup Tx FIFO */
900         csrwr32(priv->tx_fifo_depth - ALTERA_TSE_TX_SECTION_EMPTY,
901                 priv->mac_dev, tse_csroffs(tx_section_empty));
902 
903         csrwr32(ALTERA_TSE_TX_SECTION_FULL, priv->mac_dev,
904                 tse_csroffs(tx_section_full));
905 
906         csrwr32(ALTERA_TSE_TX_ALMOST_EMPTY, priv->mac_dev,
907                 tse_csroffs(tx_almost_empty));
908 
909         csrwr32(ALTERA_TSE_TX_ALMOST_FULL, priv->mac_dev,
910                 tse_csroffs(tx_almost_full));
911 
912         /* MAC Address Configuration */
913         tse_update_mac_addr(priv, priv->dev->dev_addr);
914 
915         /* MAC Function Configuration */
916         frm_length = ETH_HLEN + priv->dev->mtu + ETH_FCS_LEN;
917         csrwr32(frm_length, priv->mac_dev, tse_csroffs(frm_length));
918 
919         csrwr32(ALTERA_TSE_TX_IPG_LENGTH, priv->mac_dev,
920                 tse_csroffs(tx_ipg_length));
921 
922         /* Disable RX/TX shift 16 for alignment of all received frames on 16-bit
923          * start address
924          */
925         tse_set_bit(priv->mac_dev, tse_csroffs(rx_cmd_stat),
926                     ALTERA_TSE_RX_CMD_STAT_RX_SHIFT16);
927 
928         tse_clear_bit(priv->mac_dev, tse_csroffs(tx_cmd_stat),
929                       ALTERA_TSE_TX_CMD_STAT_TX_SHIFT16 |
930                       ALTERA_TSE_TX_CMD_STAT_OMIT_CRC);
931 
932         /* Set the MAC options */
933         cmd = csrrd32(priv->mac_dev, tse_csroffs(command_config));
934         cmd &= ~MAC_CMDCFG_PAD_EN;      /* No padding Removal on Receive */
935         cmd &= ~MAC_CMDCFG_CRC_FWD;     /* CRC Removal */
936         cmd |= MAC_CMDCFG_RX_ERR_DISC;  /* Automatically discard frames
937                                          * with CRC errors
938                                          */
939         cmd |= MAC_CMDCFG_CNTL_FRM_ENA;
940         cmd &= ~MAC_CMDCFG_TX_ENA;
941         cmd &= ~MAC_CMDCFG_RX_ENA;
942 
943         /* Default speed and duplex setting, full/100 */
944         cmd &= ~MAC_CMDCFG_HD_ENA;
945         cmd &= ~MAC_CMDCFG_ETH_SPEED;
946         cmd &= ~MAC_CMDCFG_ENA_10;
947 
948         csrwr32(cmd, priv->mac_dev, tse_csroffs(command_config));
949 
950         csrwr32(ALTERA_TSE_PAUSE_QUANTA, priv->mac_dev,
951                 tse_csroffs(pause_quanta));
952 
953         if (netif_msg_hw(priv))
954                 dev_dbg(priv->device,
955                         "MAC post-initialization: CMD_CONFIG = 0x%08x\n", cmd);
956 
957         return 0;
958 }
959 
960 /* Start/stop MAC transmission logic
961  */
962 static void tse_set_mac(struct altera_tse_private *priv, bool enable)
963 {
964         u32 value = csrrd32(priv->mac_dev, tse_csroffs(command_config));
965 
966         if (enable)
967                 value |= MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA;
968         else
969                 value &= ~(MAC_CMDCFG_TX_ENA | MAC_CMDCFG_RX_ENA);
970 
971         csrwr32(value, priv->mac_dev, tse_csroffs(command_config));
972 }
973 
974 /* Change the MTU
975  */
976 static int tse_change_mtu(struct net_device *dev, int new_mtu)
977 {
978         struct altera_tse_private *priv = netdev_priv(dev);
979         unsigned int max_mtu = priv->max_mtu;
980         unsigned int min_mtu = ETH_ZLEN + ETH_FCS_LEN;
981 
982         if (netif_running(dev)) {
983                 netdev_err(dev, "must be stopped to change its MTU\n");
984                 return -EBUSY;
985         }
986 
987         if ((new_mtu < min_mtu) || (new_mtu > max_mtu)) {
988                 netdev_err(dev, "invalid MTU, max MTU is: %u\n", max_mtu);
989                 return -EINVAL;
990         }
991 
992         dev->mtu = new_mtu;
993         netdev_update_features(dev);
994 
995         return 0;
996 }
997 
998 static void altera_tse_set_mcfilter(struct net_device *dev)
999 {
1000         struct altera_tse_private *priv = netdev_priv(dev);
1001         int i;
1002         struct netdev_hw_addr *ha;
1003 
1004         /* clear the hash filter */
1005         for (i = 0; i < 64; i++)
1006                 csrwr32(0, priv->mac_dev, tse_csroffs(hash_table) + i * 4);
1007 
1008         netdev_for_each_mc_addr(ha, dev) {
1009                 unsigned int hash = 0;
1010                 int mac_octet;
1011 
1012                 for (mac_octet = 5; mac_octet >= 0; mac_octet--) {
1013                         unsigned char xor_bit = 0;
1014                         unsigned char octet = ha->addr[mac_octet];
1015                         unsigned int bitshift;
1016 
1017                         for (bitshift = 0; bitshift < 8; bitshift++)
1018                                 xor_bit ^= ((octet >> bitshift) & 0x01);
1019 
1020                         hash = (hash << 1) | xor_bit;
1021                 }
1022                 csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + hash * 4);
1023         }
1024 }
1025 
1026 
1027 static void altera_tse_set_mcfilterall(struct net_device *dev)
1028 {
1029         struct altera_tse_private *priv = netdev_priv(dev);
1030         int i;
1031 
1032         /* set the hash filter */
1033         for (i = 0; i < 64; i++)
1034                 csrwr32(1, priv->mac_dev, tse_csroffs(hash_table) + i * 4);
1035 }
1036 
1037 /* Set or clear the multicast filter for this adaptor
1038  */
1039 static void tse_set_rx_mode_hashfilter(struct net_device *dev)
1040 {
1041         struct altera_tse_private *priv = netdev_priv(dev);
1042 
1043         spin_lock(&priv->mac_cfg_lock);
1044 
1045         if (dev->flags & IFF_PROMISC)
1046                 tse_set_bit(priv->mac_dev, tse_csroffs(command_config),
1047                             MAC_CMDCFG_PROMIS_EN);
1048 
1049         if (dev->flags & IFF_ALLMULTI)
1050                 altera_tse_set_mcfilterall(dev);
1051         else
1052                 altera_tse_set_mcfilter(dev);
1053 
1054         spin_unlock(&priv->mac_cfg_lock);
1055 }
1056 
1057 /* Set or clear the multicast filter for this adaptor
1058  */
1059 static void tse_set_rx_mode(struct net_device *dev)
1060 {
1061         struct altera_tse_private *priv = netdev_priv(dev);
1062 
1063         spin_lock(&priv->mac_cfg_lock);
1064 
1065         if ((dev->flags & IFF_PROMISC) || (dev->flags & IFF_ALLMULTI) ||
1066             !netdev_mc_empty(dev) || !netdev_uc_empty(dev))
1067                 tse_set_bit(priv->mac_dev, tse_csroffs(command_config),
1068                             MAC_CMDCFG_PROMIS_EN);
1069         else
1070                 tse_clear_bit(priv->mac_dev, tse_csroffs(command_config),
1071                               MAC_CMDCFG_PROMIS_EN);
1072 
1073         spin_unlock(&priv->mac_cfg_lock);
1074 }
1075 
1076 /* Open and initialize the interface
1077  */
1078 static int tse_open(struct net_device *dev)
1079 {
1080         struct altera_tse_private *priv = netdev_priv(dev);
1081         int ret = 0;
1082         int i;
1083         unsigned long int flags;
1084 
1085         /* Reset and configure TSE MAC and probe associated PHY */
1086         ret = priv->dmaops->init_dma(priv);
1087         if (ret != 0) {
1088                 netdev_err(dev, "Cannot initialize DMA\n");
1089                 goto phy_error;
1090         }
1091 
1092         if (netif_msg_ifup(priv))
1093                 netdev_warn(dev, "device MAC address %pM\n",
1094                             dev->dev_addr);
1095 
1096         if ((priv->revision < 0xd00) || (priv->revision > 0xe00))
1097                 netdev_warn(dev, "TSE revision %x\n", priv->revision);
1098 
1099         spin_lock(&priv->mac_cfg_lock);
1100         ret = reset_mac(priv);
1101         if (ret)
1102                 netdev_err(dev, "Cannot reset MAC core (error: %d)\n", ret);
1103 
1104         ret = init_mac(priv);
1105         spin_unlock(&priv->mac_cfg_lock);
1106         if (ret) {
1107                 netdev_err(dev, "Cannot init MAC core (error: %d)\n", ret);
1108                 goto alloc_skbuf_error;
1109         }
1110 
1111         priv->dmaops->reset_dma(priv);
1112 
1113         /* Create and initialize the TX/RX descriptors chains. */
1114         priv->rx_ring_size = dma_rx_num;
1115         priv->tx_ring_size = dma_tx_num;
1116         ret = alloc_init_skbufs(priv);
1117         if (ret) {
1118                 netdev_err(dev, "DMA descriptors initialization failed\n");
1119                 goto alloc_skbuf_error;
1120         }
1121 
1122 
1123         /* Register RX interrupt */
1124         ret = request_irq(priv->rx_irq, altera_isr, IRQF_SHARED,
1125                           dev->name, dev);
1126         if (ret) {
1127                 netdev_err(dev, "Unable to register RX interrupt %d\n",
1128                            priv->rx_irq);
1129                 goto init_error;
1130         }
1131 
1132         /* Register TX interrupt */
1133         ret = request_irq(priv->tx_irq, altera_isr, IRQF_SHARED,
1134                           dev->name, dev);
1135         if (ret) {
1136                 netdev_err(dev, "Unable to register TX interrupt %d\n",
1137                            priv->tx_irq);
1138                 goto tx_request_irq_error;
1139         }
1140 
1141         /* Enable DMA interrupts */
1142         spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1143         priv->dmaops->enable_rxirq(priv);
1144         priv->dmaops->enable_txirq(priv);
1145 
1146         /* Setup RX descriptor chain */
1147         for (i = 0; i < priv->rx_ring_size; i++)
1148                 priv->dmaops->add_rx_desc(priv, &priv->rx_ring[i]);
1149 
1150         spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1151 
1152         if (priv->phydev)
1153                 phy_start(priv->phydev);
1154 
1155         napi_enable(&priv->napi);
1156         netif_start_queue(dev);
1157 
1158         priv->dmaops->start_rxdma(priv);
1159 
1160         /* Start MAC Rx/Tx */
1161         spin_lock(&priv->mac_cfg_lock);
1162         tse_set_mac(priv, true);
1163         spin_unlock(&priv->mac_cfg_lock);
1164 
1165         return 0;
1166 
1167 tx_request_irq_error:
1168         free_irq(priv->rx_irq, dev);
1169 init_error:
1170         free_skbufs(dev);
1171 alloc_skbuf_error:
1172 phy_error:
1173         return ret;
1174 }
1175 
1176 /* Stop TSE MAC interface and put the device in an inactive state
1177  */
1178 static int tse_shutdown(struct net_device *dev)
1179 {
1180         struct altera_tse_private *priv = netdev_priv(dev);
1181         int ret;
1182         unsigned long int flags;
1183 
1184         /* Stop the PHY */
1185         if (priv->phydev)
1186                 phy_stop(priv->phydev);
1187 
1188         netif_stop_queue(dev);
1189         napi_disable(&priv->napi);
1190 
1191         /* Disable DMA interrupts */
1192         spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
1193         priv->dmaops->disable_rxirq(priv);
1194         priv->dmaops->disable_txirq(priv);
1195         spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
1196 
1197         /* Free the IRQ lines */
1198         free_irq(priv->rx_irq, dev);
1199         free_irq(priv->tx_irq, dev);
1200 
1201         /* disable and reset the MAC, empties fifo */
1202         spin_lock(&priv->mac_cfg_lock);
1203         spin_lock(&priv->tx_lock);
1204 
1205         ret = reset_mac(priv);
1206         if (ret)
1207                 netdev_err(dev, "Cannot reset MAC core (error: %d)\n", ret);
1208         priv->dmaops->reset_dma(priv);
1209         free_skbufs(dev);
1210 
1211         spin_unlock(&priv->tx_lock);
1212         spin_unlock(&priv->mac_cfg_lock);
1213 
1214         priv->dmaops->uninit_dma(priv);
1215 
1216         return 0;
1217 }
1218 
1219 static struct net_device_ops altera_tse_netdev_ops = {
1220         .ndo_open               = tse_open,
1221         .ndo_stop               = tse_shutdown,
1222         .ndo_start_xmit         = tse_start_xmit,
1223         .ndo_set_mac_address    = eth_mac_addr,
1224         .ndo_set_rx_mode        = tse_set_rx_mode,
1225         .ndo_change_mtu         = tse_change_mtu,
1226         .ndo_validate_addr      = eth_validate_addr,
1227 };
1228 
1229 static int request_and_map(struct platform_device *pdev, const char *name,
1230                            struct resource **res, void __iomem **ptr)
1231 {
1232         struct resource *region;
1233         struct device *device = &pdev->dev;
1234 
1235         *res = platform_get_resource_byname(pdev, IORESOURCE_MEM, name);
1236         if (*res == NULL) {
1237                 dev_err(device, "resource %s not defined\n", name);
1238                 return -ENODEV;
1239         }
1240 
1241         region = devm_request_mem_region(device, (*res)->start,
1242                                          resource_size(*res), dev_name(device));
1243         if (region == NULL) {
1244                 dev_err(device, "unable to request %s\n", name);
1245                 return -EBUSY;
1246         }
1247 
1248         *ptr = devm_ioremap_nocache(device, region->start,
1249                                     resource_size(region));
1250         if (*ptr == NULL) {
1251                 dev_err(device, "ioremap_nocache of %s failed!", name);
1252                 return -ENOMEM;
1253         }
1254 
1255         return 0;
1256 }
1257 
1258 /* Probe Altera TSE MAC device
1259  */
1260 static int altera_tse_probe(struct platform_device *pdev)
1261 {
1262         struct net_device *ndev;
1263         int ret = -ENODEV;
1264         struct resource *control_port;
1265         struct resource *dma_res;
1266         struct altera_tse_private *priv;
1267         const unsigned char *macaddr;
1268         void __iomem *descmap;
1269         const struct of_device_id *of_id = NULL;
1270 
1271         ndev = alloc_etherdev(sizeof(struct altera_tse_private));
1272         if (!ndev) {
1273                 dev_err(&pdev->dev, "Could not allocate network device\n");
1274                 return -ENODEV;
1275         }
1276 
1277         SET_NETDEV_DEV(ndev, &pdev->dev);
1278 
1279         priv = netdev_priv(ndev);
1280         priv->device = &pdev->dev;
1281         priv->dev = ndev;
1282         priv->msg_enable = netif_msg_init(debug, default_msg_level);
1283 
1284         of_id = of_match_device(altera_tse_ids, &pdev->dev);
1285 
1286         if (of_id)
1287                 priv->dmaops = (struct altera_dmaops *)of_id->data;
1288 
1289 
1290         if (priv->dmaops &&
1291             priv->dmaops->altera_dtype == ALTERA_DTYPE_SGDMA) {
1292                 /* Get the mapped address to the SGDMA descriptor memory */
1293                 ret = request_and_map(pdev, "s1", &dma_res, &descmap);
1294                 if (ret)
1295                         goto err_free_netdev;
1296 
1297                 /* Start of that memory is for transmit descriptors */
1298                 priv->tx_dma_desc = descmap;
1299 
1300                 /* First half is for tx descriptors, other half for tx */
1301                 priv->txdescmem = resource_size(dma_res)/2;
1302 
1303                 priv->txdescmem_busaddr = (dma_addr_t)dma_res->start;
1304 
1305                 priv->rx_dma_desc = (void __iomem *)((uintptr_t)(descmap +
1306                                                      priv->txdescmem));
1307                 priv->rxdescmem = resource_size(dma_res)/2;
1308                 priv->rxdescmem_busaddr = dma_res->start;
1309                 priv->rxdescmem_busaddr += priv->txdescmem;
1310 
1311                 if (upper_32_bits(priv->rxdescmem_busaddr)) {
1312                         dev_dbg(priv->device,
1313                                 "SGDMA bus addresses greater than 32-bits\n");
1314                         goto err_free_netdev;
1315                 }
1316                 if (upper_32_bits(priv->txdescmem_busaddr)) {
1317                         dev_dbg(priv->device,
1318                                 "SGDMA bus addresses greater than 32-bits\n");
1319                         goto err_free_netdev;
1320                 }
1321         } else if (priv->dmaops &&
1322                    priv->dmaops->altera_dtype == ALTERA_DTYPE_MSGDMA) {
1323                 ret = request_and_map(pdev, "rx_resp", &dma_res,
1324                                       &priv->rx_dma_resp);
1325                 if (ret)
1326                         goto err_free_netdev;
1327 
1328                 ret = request_and_map(pdev, "tx_desc", &dma_res,
1329                                       &priv->tx_dma_desc);
1330                 if (ret)
1331                         goto err_free_netdev;
1332 
1333                 priv->txdescmem = resource_size(dma_res);
1334                 priv->txdescmem_busaddr = dma_res->start;
1335 
1336                 ret = request_and_map(pdev, "rx_desc", &dma_res,
1337                                       &priv->rx_dma_desc);
1338                 if (ret)
1339                         goto err_free_netdev;
1340 
1341                 priv->rxdescmem = resource_size(dma_res);
1342                 priv->rxdescmem_busaddr = dma_res->start;
1343 
1344         } else {
1345                 goto err_free_netdev;
1346         }
1347 
1348         if (!dma_set_mask(priv->device, DMA_BIT_MASK(priv->dmaops->dmamask)))
1349                 dma_set_coherent_mask(priv->device,
1350                                       DMA_BIT_MASK(priv->dmaops->dmamask));
1351         else if (!dma_set_mask(priv->device, DMA_BIT_MASK(32)))
1352                 dma_set_coherent_mask(priv->device, DMA_BIT_MASK(32));
1353         else
1354                 goto err_free_netdev;
1355 
1356         /* MAC address space */
1357         ret = request_and_map(pdev, "control_port", &control_port,
1358                               (void __iomem **)&priv->mac_dev);
1359         if (ret)
1360                 goto err_free_netdev;
1361 
1362         /* xSGDMA Rx Dispatcher address space */
1363         ret = request_and_map(pdev, "rx_csr", &dma_res,
1364                               &priv->rx_dma_csr);
1365         if (ret)
1366                 goto err_free_netdev;
1367 
1368 
1369         /* xSGDMA Tx Dispatcher address space */
1370         ret = request_and_map(pdev, "tx_csr", &dma_res,
1371                               &priv->tx_dma_csr);
1372         if (ret)
1373                 goto err_free_netdev;
1374 
1375 
1376         /* Rx IRQ */
1377         priv->rx_irq = platform_get_irq_byname(pdev, "rx_irq");
1378         if (priv->rx_irq == -ENXIO) {
1379                 dev_err(&pdev->dev, "cannot obtain Rx IRQ\n");
1380                 ret = -ENXIO;
1381                 goto err_free_netdev;
1382         }
1383 
1384         /* Tx IRQ */
1385         priv->tx_irq = platform_get_irq_byname(pdev, "tx_irq");
1386         if (priv->tx_irq == -ENXIO) {
1387                 dev_err(&pdev->dev, "cannot obtain Tx IRQ\n");
1388                 ret = -ENXIO;
1389                 goto err_free_netdev;
1390         }
1391 
1392         /* get FIFO depths from device tree */
1393         if (of_property_read_u32(pdev->dev.of_node, "rx-fifo-depth",
1394                                  &priv->rx_fifo_depth)) {
1395                 dev_err(&pdev->dev, "cannot obtain rx-fifo-depth\n");
1396                 ret = -ENXIO;
1397                 goto err_free_netdev;
1398         }
1399 
1400         if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
1401                                  &priv->tx_fifo_depth)) {
1402                 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n");
1403                 ret = -ENXIO;
1404                 goto err_free_netdev;
1405         }
1406 
1407         /* get hash filter settings for this instance */
1408         priv->hash_filter =
1409                 of_property_read_bool(pdev->dev.of_node,
1410                                       "altr,has-hash-multicast-filter");
1411 
1412         /* Set hash filter to not set for now until the
1413          * multicast filter receive issue is debugged
1414          */
1415         priv->hash_filter = 0;
1416 
1417         /* get supplemental address settings for this instance */
1418         priv->added_unicast =
1419                 of_property_read_bool(pdev->dev.of_node,
1420                                       "altr,has-supplementary-unicast");
1421 
1422         /* Max MTU is 1500, ETH_DATA_LEN */
1423         priv->max_mtu = ETH_DATA_LEN;
1424 
1425         /* Get the max mtu from the device tree. Note that the
1426          * "max-frame-size" parameter is actually max mtu. Definition
1427          * in the ePAPR v1.1 spec and usage differ, so go with usage.
1428          */
1429         of_property_read_u32(pdev->dev.of_node, "max-frame-size",
1430                              &priv->max_mtu);
1431 
1432         /* The DMA buffer size already accounts for an alignment bias
1433          * to avoid unaligned access exceptions for the NIOS processor,
1434          */
1435         priv->rx_dma_buf_sz = ALTERA_RXDMABUFFER_SIZE;
1436 
1437         /* get default MAC address from device tree */
1438         macaddr = of_get_mac_address(pdev->dev.of_node);
1439         if (macaddr)
1440                 ether_addr_copy(ndev->dev_addr, macaddr);
1441         else
1442                 eth_hw_addr_random(ndev);
1443 
1444         /* get phy addr and create mdio */
1445         ret = altera_tse_phy_get_addr_mdio_create(ndev);
1446 
1447         if (ret)
1448                 goto err_free_netdev;
1449 
1450         /* initialize netdev */
1451         ndev->mem_start = control_port->start;
1452         ndev->mem_end = control_port->end;
1453         ndev->netdev_ops = &altera_tse_netdev_ops;
1454         altera_tse_set_ethtool_ops(ndev);
1455 
1456         altera_tse_netdev_ops.ndo_set_rx_mode = tse_set_rx_mode;
1457 
1458         if (priv->hash_filter)
1459                 altera_tse_netdev_ops.ndo_set_rx_mode =
1460                         tse_set_rx_mode_hashfilter;
1461 
1462         /* Scatter/gather IO is not supported,
1463          * so it is turned off
1464          */
1465         ndev->hw_features &= ~NETIF_F_SG;
1466         ndev->features |= ndev->hw_features | NETIF_F_HIGHDMA;
1467 
1468         /* VLAN offloading of tagging, stripping and filtering is not
1469          * supported by hardware, but driver will accommodate the
1470          * extra 4-byte VLAN tag for processing by upper layers
1471          */
1472         ndev->features |= NETIF_F_HW_VLAN_CTAG_RX;
1473 
1474         /* setup NAPI interface */
1475         netif_napi_add(ndev, &priv->napi, tse_poll, NAPI_POLL_WEIGHT);
1476 
1477         spin_lock_init(&priv->mac_cfg_lock);
1478         spin_lock_init(&priv->tx_lock);
1479         spin_lock_init(&priv->rxdma_irq_lock);
1480 
1481         ret = register_netdev(ndev);
1482         if (ret) {
1483                 dev_err(&pdev->dev, "failed to register TSE net device\n");
1484                 goto err_register_netdev;
1485         }
1486 
1487         platform_set_drvdata(pdev, ndev);
1488 
1489         priv->revision = ioread32(&priv->mac_dev->megacore_revision);
1490 
1491         if (netif_msg_probe(priv))
1492                 dev_info(&pdev->dev, "Altera TSE MAC version %d.%d at 0x%08lx irq %d/%d\n",
1493                          (priv->revision >> 8) & 0xff,
1494                          priv->revision & 0xff,
1495                          (unsigned long) control_port->start, priv->rx_irq,
1496                          priv->tx_irq);
1497 
1498         ret = init_phy(ndev);
1499         if (ret != 0) {
1500                 netdev_err(ndev, "Cannot attach to PHY (error: %d)\n", ret);
1501                 goto err_init_phy;
1502         }
1503         return 0;
1504 
1505 err_init_phy:
1506         unregister_netdev(ndev);
1507 err_register_netdev:
1508         netif_napi_del(&priv->napi);
1509         altera_tse_mdio_destroy(ndev);
1510 err_free_netdev:
1511         free_netdev(ndev);
1512         return ret;
1513 }
1514 
1515 /* Remove Altera TSE MAC device
1516  */
1517 static int altera_tse_remove(struct platform_device *pdev)
1518 {
1519         struct net_device *ndev = platform_get_drvdata(pdev);
1520         struct altera_tse_private *priv = netdev_priv(ndev);
1521 
1522         if (priv->phydev)
1523                 phy_disconnect(priv->phydev);
1524 
1525         platform_set_drvdata(pdev, NULL);
1526         altera_tse_mdio_destroy(ndev);
1527         unregister_netdev(ndev);
1528         free_netdev(ndev);
1529 
1530         return 0;
1531 }
1532 
1533 static const struct altera_dmaops altera_dtype_sgdma = {
1534         .altera_dtype = ALTERA_DTYPE_SGDMA,
1535         .dmamask = 32,
1536         .reset_dma = sgdma_reset,
1537         .enable_txirq = sgdma_enable_txirq,
1538         .enable_rxirq = sgdma_enable_rxirq,
1539         .disable_txirq = sgdma_disable_txirq,
1540         .disable_rxirq = sgdma_disable_rxirq,
1541         .clear_txirq = sgdma_clear_txirq,
1542         .clear_rxirq = sgdma_clear_rxirq,
1543         .tx_buffer = sgdma_tx_buffer,
1544         .tx_completions = sgdma_tx_completions,
1545         .add_rx_desc = sgdma_add_rx_desc,
1546         .get_rx_status = sgdma_rx_status,
1547         .init_dma = sgdma_initialize,
1548         .uninit_dma = sgdma_uninitialize,
1549         .start_rxdma = sgdma_start_rxdma,
1550 };
1551 
1552 static const struct altera_dmaops altera_dtype_msgdma = {
1553         .altera_dtype = ALTERA_DTYPE_MSGDMA,
1554         .dmamask = 64,
1555         .reset_dma = msgdma_reset,
1556         .enable_txirq = msgdma_enable_txirq,
1557         .enable_rxirq = msgdma_enable_rxirq,
1558         .disable_txirq = msgdma_disable_txirq,
1559         .disable_rxirq = msgdma_disable_rxirq,
1560         .clear_txirq = msgdma_clear_txirq,
1561         .clear_rxirq = msgdma_clear_rxirq,
1562         .tx_buffer = msgdma_tx_buffer,
1563         .tx_completions = msgdma_tx_completions,
1564         .add_rx_desc = msgdma_add_rx_desc,
1565         .get_rx_status = msgdma_rx_status,
1566         .init_dma = msgdma_initialize,
1567         .uninit_dma = msgdma_uninitialize,
1568         .start_rxdma = msgdma_start_rxdma,
1569 };
1570 
1571 static struct of_device_id altera_tse_ids[] = {
1572         { .compatible = "altr,tse-msgdma-1.0", .data = &altera_dtype_msgdma, },
1573         { .compatible = "altr,tse-1.0", .data = &altera_dtype_sgdma, },
1574         { .compatible = "ALTR,tse-1.0", .data = &altera_dtype_sgdma, },
1575         {},
1576 };
1577 MODULE_DEVICE_TABLE(of, altera_tse_ids);
1578 
1579 static struct platform_driver altera_tse_driver = {
1580         .probe          = altera_tse_probe,
1581         .remove         = altera_tse_remove,
1582         .suspend        = NULL,
1583         .resume         = NULL,
1584         .driver         = {
1585                 .name   = ALTERA_TSE_RESOURCE_NAME,
1586                 .of_match_table = altera_tse_ids,
1587         },
1588 };
1589 
1590 module_platform_driver(altera_tse_driver);
1591 
1592 MODULE_AUTHOR("Altera Corporation");
1593 MODULE_DESCRIPTION("Altera Triple Speed Ethernet MAC driver");
1594 MODULE_LICENSE("GPL v2");
1595 

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