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Linux/drivers/mtd/nand/sharpsl.c

  1 /*
  2  * drivers/mtd/nand/sharpsl.c
  3  *
  4  *  Copyright (C) 2004 Richard Purdie
  5  *  Copyright (C) 2008 Dmitry Baryshkov
  6  *
  7  *  Based on Sharp's NAND driver sharp_sl.c
  8  *
  9  * This program is free software; you can redistribute it and/or modify
 10  * it under the terms of the GNU General Public License version 2 as
 11  * published by the Free Software Foundation.
 12  *
 13  */
 14 
 15 #include <linux/genhd.h>
 16 #include <linux/slab.h>
 17 #include <linux/module.h>
 18 #include <linux/delay.h>
 19 #include <linux/mtd/mtd.h>
 20 #include <linux/mtd/nand.h>
 21 #include <linux/mtd/nand_ecc.h>
 22 #include <linux/mtd/partitions.h>
 23 #include <linux/mtd/sharpsl.h>
 24 #include <linux/interrupt.h>
 25 #include <linux/platform_device.h>
 26 
 27 #include <asm/io.h>
 28 #include <mach/hardware.h>
 29 #include <asm/mach-types.h>
 30 
 31 struct sharpsl_nand {
 32         struct nand_chip        chip;
 33 
 34         void __iomem            *io;
 35 };
 36 
 37 static inline struct sharpsl_nand *mtd_to_sharpsl(struct mtd_info *mtd)
 38 {
 39         return container_of(mtd_to_nand(mtd), struct sharpsl_nand, chip);
 40 }
 41 
 42 /* register offset */
 43 #define ECCLPLB         0x00    /* line parity 7 - 0 bit */
 44 #define ECCLPUB         0x04    /* line parity 15 - 8 bit */
 45 #define ECCCP           0x08    /* column parity 5 - 0 bit */
 46 #define ECCCNTR         0x0C    /* ECC byte counter */
 47 #define ECCCLRR         0x10    /* cleare ECC */
 48 #define FLASHIO         0x14    /* Flash I/O */
 49 #define FLASHCTL        0x18    /* Flash Control */
 50 
 51 /* Flash control bit */
 52 #define FLRYBY          (1 << 5)
 53 #define FLCE1           (1 << 4)
 54 #define FLWP            (1 << 3)
 55 #define FLALE           (1 << 2)
 56 #define FLCLE           (1 << 1)
 57 #define FLCE0           (1 << 0)
 58 
 59 /*
 60  *      hardware specific access to control-lines
 61  *      ctrl:
 62  *      NAND_CNE: bit 0 -> ! bit 0 & 4
 63  *      NAND_CLE: bit 1 -> bit 1
 64  *      NAND_ALE: bit 2 -> bit 2
 65  *
 66  */
 67 static void sharpsl_nand_hwcontrol(struct mtd_info *mtd, int cmd,
 68                                    unsigned int ctrl)
 69 {
 70         struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
 71         struct nand_chip *chip = mtd_to_nand(mtd);
 72 
 73         if (ctrl & NAND_CTRL_CHANGE) {
 74                 unsigned char bits = ctrl & 0x07;
 75 
 76                 bits |= (ctrl & 0x01) << 4;
 77 
 78                 bits ^= 0x11;
 79 
 80                 writeb((readb(sharpsl->io + FLASHCTL) & ~0x17) | bits, sharpsl->io + FLASHCTL);
 81         }
 82 
 83         if (cmd != NAND_CMD_NONE)
 84                 writeb(cmd, chip->IO_ADDR_W);
 85 }
 86 
 87 static int sharpsl_nand_dev_ready(struct mtd_info *mtd)
 88 {
 89         struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
 90         return !((readb(sharpsl->io + FLASHCTL) & FLRYBY) == 0);
 91 }
 92 
 93 static void sharpsl_nand_enable_hwecc(struct mtd_info *mtd, int mode)
 94 {
 95         struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
 96         writeb(0, sharpsl->io + ECCCLRR);
 97 }
 98 
 99 static int sharpsl_nand_calculate_ecc(struct mtd_info *mtd, const u_char * dat, u_char * ecc_code)
100 {
101         struct sharpsl_nand *sharpsl = mtd_to_sharpsl(mtd);
102         ecc_code[0] = ~readb(sharpsl->io + ECCLPUB);
103         ecc_code[1] = ~readb(sharpsl->io + ECCLPLB);
104         ecc_code[2] = (~readb(sharpsl->io + ECCCP) << 2) | 0x03;
105         return readb(sharpsl->io + ECCCNTR) != 0;
106 }
107 
108 /*
109  * Main initialization routine
110  */
111 static int sharpsl_nand_probe(struct platform_device *pdev)
112 {
113         struct nand_chip *this;
114         struct mtd_info *mtd;
115         struct resource *r;
116         int err = 0;
117         struct sharpsl_nand *sharpsl;
118         struct sharpsl_nand_platform_data *data = dev_get_platdata(&pdev->dev);
119 
120         if (!data) {
121                 dev_err(&pdev->dev, "no platform data!\n");
122                 return -EINVAL;
123         }
124 
125         /* Allocate memory for MTD device structure and private data */
126         sharpsl = kzalloc(sizeof(struct sharpsl_nand), GFP_KERNEL);
127         if (!sharpsl)
128                 return -ENOMEM;
129 
130         r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
131         if (!r) {
132                 dev_err(&pdev->dev, "no io memory resource defined!\n");
133                 err = -ENODEV;
134                 goto err_get_res;
135         }
136 
137         /* map physical address */
138         sharpsl->io = ioremap(r->start, resource_size(r));
139         if (!sharpsl->io) {
140                 dev_err(&pdev->dev, "ioremap to access Sharp SL NAND chip failed\n");
141                 err = -EIO;
142                 goto err_ioremap;
143         }
144 
145         /* Get pointer to private data */
146         this = (struct nand_chip *)(&sharpsl->chip);
147 
148         /* Link the private data with the MTD structure */
149         mtd = nand_to_mtd(this);
150         mtd->dev.parent = &pdev->dev;
151 
152         platform_set_drvdata(pdev, sharpsl);
153 
154         /*
155          * PXA initialize
156          */
157         writeb(readb(sharpsl->io + FLASHCTL) | FLWP, sharpsl->io + FLASHCTL);
158 
159         /* Set address of NAND IO lines */
160         this->IO_ADDR_R = sharpsl->io + FLASHIO;
161         this->IO_ADDR_W = sharpsl->io + FLASHIO;
162         /* Set address of hardware control function */
163         this->cmd_ctrl = sharpsl_nand_hwcontrol;
164         this->dev_ready = sharpsl_nand_dev_ready;
165         /* 15 us command delay time */
166         this->chip_delay = 15;
167         /* set eccmode using hardware ECC */
168         this->ecc.mode = NAND_ECC_HW;
169         this->ecc.size = 256;
170         this->ecc.bytes = 3;
171         this->ecc.strength = 1;
172         this->badblock_pattern = data->badblock_pattern;
173         this->ecc.layout = data->ecc_layout;
174         this->ecc.hwctl = sharpsl_nand_enable_hwecc;
175         this->ecc.calculate = sharpsl_nand_calculate_ecc;
176         this->ecc.correct = nand_correct_data;
177 
178         /* Scan to find existence of the device */
179         err = nand_scan(mtd, 1);
180         if (err)
181                 goto err_scan;
182 
183         /* Register the partitions */
184         mtd->name = "sharpsl-nand";
185 
186         err = mtd_device_parse_register(mtd, NULL, NULL,
187                                         data->partitions, data->nr_partitions);
188         if (err)
189                 goto err_add;
190 
191         /* Return happy */
192         return 0;
193 
194 err_add:
195         nand_release(mtd);
196 
197 err_scan:
198         iounmap(sharpsl->io);
199 err_ioremap:
200 err_get_res:
201         kfree(sharpsl);
202         return err;
203 }
204 
205 /*
206  * Clean up routine
207  */
208 static int sharpsl_nand_remove(struct platform_device *pdev)
209 {
210         struct sharpsl_nand *sharpsl = platform_get_drvdata(pdev);
211 
212         /* Release resources, unregister device */
213         nand_release(nand_to_mtd(&sharpsl->chip));
214 
215         iounmap(sharpsl->io);
216 
217         /* Free the MTD device structure */
218         kfree(sharpsl);
219 
220         return 0;
221 }
222 
223 static struct platform_driver sharpsl_nand_driver = {
224         .driver = {
225                 .name   = "sharpsl-nand",
226         },
227         .probe          = sharpsl_nand_probe,
228         .remove         = sharpsl_nand_remove,
229 };
230 
231 module_platform_driver(sharpsl_nand_driver);
232 
233 MODULE_LICENSE("GPL");
234 MODULE_AUTHOR("Richard Purdie <rpurdie@rpsys.net>");
235 MODULE_DESCRIPTION("Device specific logic for NAND flash on Sharp SL-C7xx Series");
236 

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